2 * This file is part of the coreboot project.
4 * Copyright (C) 2003-2004 Linux Networx
5 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
6 * Copyright (C) 2004 David Hendricks <sc@flagen.com>
7 * Copyright (C) 2004 Li-Ta Lo <ollie@lanl.gov>
8 * Copyright (C) 2005-2006 Tyan
9 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
10 * Copyright (C) 2005-2006 Stefan Reinauer <stepan@openbios.org>
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; version 2 of the License.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
27 2005.11 yhlu add let the real sb to use small uintid
31 #include <console/console.h>
32 #include <device/device.h>
33 #include <device/path.h>
34 #include <device/pci.h>
35 #include <device/pci_ids.h>
36 #include <device/hypertransport.h>
37 #include <part/hard_reset.h>
38 #include <part/fallback_boot.h>
40 /* The hypertransport link is already optimized in pre-ram code
41 * so don't do it again
46 #include <cpu/amd/model_fxx_rev.h>
49 static device_t ht_scan_get_devs(device_t *old_devices)
54 /* Extract the chain of devices to (first through last)
55 * for the next hypertransport device.
57 while(last && last->sibling &&
58 (last->sibling->path.type == DEVICE_PATH_PCI) &&
59 (last->sibling->path.pci.devfn > last->path.pci.devfn))
65 /* Unlink the chain from the list of old devices */
66 *old_devices = last->sibling;
69 /* Now add the device to the list of devices on the bus.
71 /* Find the last child of our parent */
72 for(child = first->bus->children; child && child->sibling; ) {
73 child = child->sibling;
75 /* Place the chain on the list of children of their parent. */
77 child->sibling = first;
79 first->bus->children = first;
86 static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
88 /* Handle bugs in valid hypertransport frequency reporting */
91 freq_cap = pci_read_config16(dev, pos);
92 freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
94 /* AMD 8131 Errata 48 */
95 if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
96 (dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
97 freq_cap &= ~(1 << HT_FREQ_800Mhz);
99 /* AMD 8151 Errata 23 */
100 if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
101 (dev->device == PCI_DEVICE_ID_AMD_8151_SYSCTRL)) {
102 freq_cap &= ~(1 << HT_FREQ_800Mhz);
104 /* AMD K8 Unsupported 1Ghz? */
105 if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
106 #if CONFIG_K8_HT_FREQ_1G_SUPPORT == 1
107 #if CONFIG_K8_REV_F_SUPPORT == 0
108 if (is_cpu_pre_e0()) { // only e0 later suupport 1GHz HT
109 freq_cap &= ~(1 << HT_FREQ_1000Mhz);
113 freq_cap &= ~(1 << HT_FREQ_1000Mhz);
124 unsigned char ctrl_off, config_off, freq_off, freq_cap_off;
127 static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
130 static const uint8_t link_width_to_pow2[]= { 3, 4, 0, 5, 1, 2, 0, 0 };
131 static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
132 unsigned present_width_cap, upstream_width_cap;
133 unsigned present_freq_cap, upstream_freq_cap;
134 unsigned ln_present_width_in, ln_upstream_width_in;
135 unsigned ln_present_width_out, ln_upstream_width_out;
136 unsigned freq, old_freq;
137 unsigned present_width, upstream_width, old_width;
139 struct ht_link cur[1];
143 /* Set the hypertransport link width and frequency */
145 /* See which side of the device our previous write to
146 * set the unitid came from.
150 linkb_to_host = (pci_read_config16(cur->dev, cur->pos + PCI_CAP_FLAGS) >> 10) & 1;
151 if (!linkb_to_host) {
152 cur->ctrl_off = PCI_HT_CAP_SLAVE_CTRL0;
153 cur->config_off = PCI_HT_CAP_SLAVE_WIDTH0;
154 cur->freq_off = PCI_HT_CAP_SLAVE_FREQ0;
155 cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
158 cur->ctrl_off = PCI_HT_CAP_SLAVE_CTRL1;
159 cur->config_off = PCI_HT_CAP_SLAVE_WIDTH1;
160 cur->freq_off = PCI_HT_CAP_SLAVE_FREQ1;
161 cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
164 /* Read the capabilities */
165 present_freq_cap = ht_read_freq_cap(cur->dev, cur->pos + cur->freq_cap_off);
166 upstream_freq_cap = ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
167 present_width_cap = pci_read_config8(cur->dev, cur->pos + cur->config_off);
168 upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off);
170 /* Calculate the highest useable frequency */
171 freq = log2(present_freq_cap & upstream_freq_cap);
173 /* Calculate the highest width */
174 ln_upstream_width_in = link_width_to_pow2[upstream_width_cap & 7];
175 ln_present_width_out = link_width_to_pow2[(present_width_cap >> 4) & 7];
176 if (ln_upstream_width_in > ln_present_width_out) {
177 ln_upstream_width_in = ln_present_width_out;
179 upstream_width = pow2_to_link_width[ln_upstream_width_in];
180 present_width = pow2_to_link_width[ln_upstream_width_in] << 4;
182 ln_upstream_width_out = link_width_to_pow2[(upstream_width_cap >> 4) & 7];
183 ln_present_width_in = link_width_to_pow2[present_width_cap & 7];
184 if (ln_upstream_width_out > ln_present_width_in) {
185 ln_upstream_width_out = ln_present_width_in;
187 upstream_width |= pow2_to_link_width[ln_upstream_width_out] << 4;
188 present_width |= pow2_to_link_width[ln_upstream_width_out];
190 /* Set the current device */
191 old_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
193 if (freq != old_freq) {
195 pci_write_config8(cur->dev, cur->pos + cur->freq_off, freq);
197 printk_spew("HyperT FreqP old %x new %x\n",old_freq,freq);
198 new_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
200 if (new_freq != freq) {
201 printk_err("%s Hypertransport frequency would not set wanted: %x got: %x\n",
202 dev_path(dev), freq, new_freq);
205 old_width = pci_read_config8(cur->dev, cur->pos + cur->config_off + 1);
206 if (present_width != old_width) {
208 pci_write_config8(cur->dev, cur->pos + cur->config_off + 1,
211 printk_spew("HyperT widthP old %x new %x\n",old_width, present_width);
212 new_width = pci_read_config8(cur->dev, cur->pos + cur->config_off + 1);
213 if (new_width != present_width) {
214 printk_err("%s Hypertransport width would not set wanted: %x got: %x\n",
215 dev_path(dev), present_width, new_width);
219 /* Set the upstream device */
220 old_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
222 if (freq != old_freq) {
224 pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq);
226 printk_spew("HyperT freqU old %x new %x\n", old_freq, freq);
227 new_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
229 if (new_freq != freq) {
230 printk_err("%s Hypertransport frequency would not set wanted: %x got: %x\n",
231 dev_path(prev->dev), freq, new_freq);
234 old_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
235 if (upstream_width != old_width) {
237 pci_write_config8(prev->dev, prev->pos + prev->config_off + 1, upstream_width);
239 printk_spew("HyperT widthU old %x new %x\n", old_width, upstream_width);
240 new_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
241 if (new_width != upstream_width) {
242 printk_err("%s Hypertransport width would not set wanted: %x got: %x\n",
243 dev_path(prev->dev), upstream_width, new_width);
248 /* Remember the current link as the previous link,
249 * But look at the other offsets.
251 prev->dev = cur->dev;
252 prev->pos = cur->pos;
253 if (cur->ctrl_off == PCI_HT_CAP_SLAVE_CTRL0) {
254 prev->ctrl_off = PCI_HT_CAP_SLAVE_CTRL1;
255 prev->config_off = PCI_HT_CAP_SLAVE_WIDTH1;
256 prev->freq_off = PCI_HT_CAP_SLAVE_FREQ1;
257 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
259 prev->ctrl_off = PCI_HT_CAP_SLAVE_CTRL0;
260 prev->config_off = PCI_HT_CAP_SLAVE_WIDTH0;
261 prev->freq_off = PCI_HT_CAP_SLAVE_FREQ0;
262 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
269 static unsigned ht_lookup_slave_capability(struct device *dev)
274 pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos);
277 flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
278 printk_spew("flags: 0x%04x\n", flags);
279 if ((flags >> 13) == 0) {
280 /* Entry is a Slave secondary, success... */
288 static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_unitid)
294 /* Initialize the hypertransport enumeration state */
297 prev.ctrl_off = PCI_HT_CAP_HOST_CTRL;
298 prev.config_off = PCI_HT_CAP_HOST_WIDTH;
299 prev.freq_off = PCI_HT_CAP_HOST_FREQ;
300 prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
302 /* Wait until the link initialization is complete */
304 ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
305 /* Is this the end of the hypertransport chain */
306 if (ctrl & (1 << 6)) {
309 /* Has the link failed? */
310 if (ctrl & (1 << 4)) {
312 * Either the link has failed, or we have
314 * Sometimes this can happen due to link
315 * retrain, so lets knock it down and see
318 ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc
319 pci_write_config16(prev.dev, prev.pos + prev.ctrl_off, ctrl);
320 ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
321 if (ctrl & ((1 << 4) | (1 << 8))) {
322 printk_alert("Detected error on Hypertransport Link\n");
326 } while((ctrl & (1 << 5)) == 0);
328 //actually, only for one HT device HT chain, and unitid is 0
329 #if CONFIG_HT_CHAIN_UNITID_BASE == 0
335 /* Check if is already collapsed */
336 if((!offset_unitid)|| (offset_unitid && (!((CONFIG_HT_CHAIN_END_UNITID_BASE == 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE <CONFIG_HT_CHAIN_UNITID_BASE))))) {
340 dummy.path.type = DEVICE_PATH_PCI;
341 dummy.path.pci.devfn = PCI_DEVFN(0, 0);
342 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
343 if ( ! ( (id == 0xffffffff) || (id == 0x00000000) ||
344 (id == 0x0000ffff) || (id == 0xffff0000) ) ) {
349 /* Spin through the devices and collapse any early
350 * hypertransport enumeration.
352 for(devfn = PCI_DEVFN(1, 0); devfn <= 0xff; devfn += 8) {
357 dummy.path.type = DEVICE_PATH_PCI;
358 dummy.path.pci.devfn = devfn;
359 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
360 if ( (id == 0xffffffff) || (id == 0x00000000) ||
361 (id == 0x0000ffff) || (id == 0xffff0000)) {
364 dummy.vendor = id & 0xffff;
365 dummy.device = (id >> 16) & 0xffff;
366 dummy.hdr_type = pci_read_config8(&dummy, PCI_HEADER_TYPE);
367 pos = ht_lookup_slave_capability(&dummy);
372 /* Clear the unitid */
373 flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
375 pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
376 printk_spew("Collapsing %s [%04x/%04x]\n",
377 dev_path(&dummy), dummy.vendor, dummy.device);
381 unsigned int hypertransport_scan_chain(struct bus *bus,
382 unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unitid_base, unsigned offset_unitid)
384 //even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
385 unsigned next_unitid, last_unitid;
386 device_t old_devices, dev, func;
387 unsigned min_unitid = (offset_unitid) ? CONFIG_HT_CHAIN_UNITID_BASE:1;
389 device_t last_func = 0;
393 #if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
394 //let't record the device of last ht device, So we can set the Unitid to CONFIG_HT_CHAIN_END_UNITID_BASE
395 unsigned real_last_unitid=0;
396 uint8_t real_last_pos=0;
397 device_t real_last_dev=NULL;
398 unsigned end_used = 0;
401 /* Restore the hypertransport chain to it's unitialized state */
402 ht_collapse_early_enumeration(bus, offset_unitid);
404 /* See which static device nodes I have */
405 old_devices = bus->children;
408 /* Initialize the hypertransport enumeration state */
411 prev.ctrl_off = PCI_HT_CAP_HOST_CTRL;
412 prev.config_off = PCI_HT_CAP_HOST_WIDTH;
413 prev.freq_off = PCI_HT_CAP_HOST_FREQ;
414 prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
416 /* If present assign unitid to a hypertransport chain */
417 last_unitid = min_unitid -1;
418 max_unitid = next_unitid = min_unitid;
422 unsigned count, static_count;
425 last_unitid = next_unitid;
427 /* Wait until the link initialization is complete */
429 ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
432 goto end_of_chain; // End of chain
434 if (ctrl & ((1 << 4) | (1 << 8))) {
436 * Either the link has failed, or we have
438 * Sometimes this can happen due to link
439 * retrain, so lets knock it down and see
442 ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc
443 pci_write_config16(prev.dev, prev.pos + prev.ctrl_off, ctrl);
444 ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
445 if (ctrl & ((1 << 4) | (1 << 8))) {
446 printk_alert("Detected error on Hypertransport Link\n");
450 } while((ctrl & (1 << 5)) == 0);
453 /* Get and setup the device_structure */
454 dev = ht_scan_get_devs(&old_devices);
456 /* See if a device is present and setup the
459 dev = pci_probe_dev(dev, bus, 0);
460 if (!dev || !dev->enabled) {
464 /* Find the hypertransport link capability */
465 pos = ht_lookup_slave_capability(dev);
467 printk_err("%s Hypertransport link capability not found",
472 /* Update the Unitid of the current device */
473 flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
475 /* If the devices has a unitid set and is at devfn 0 we are done.
476 * This can happen with shadow hypertransport devices,
477 * or if we have reached the bottom of a
478 * hypertransport device chain.
483 flags &= ~0x1f; /* mask out base Unit ID */
485 count = (flags >> 5) & 0x1f; /* get unit count */
486 #if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
488 if(next_unitid > (max_devfn>>3)) { // max_devfn will be (0x17<<3)|7 or (0x1f<<3)|7
490 next_unitid = CONFIG_HT_CHAIN_END_UNITID_BASE;
500 flags |= next_unitid & 0x1f;
501 pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
503 /* Update the Unitd id in the device structure */
505 for(func = dev; func; func = func->sibling) {
506 func->path.pci.devfn += (next_unitid << 3);
507 static_count = (func->path.pci.devfn >> 3)
508 - (dev->path.pci.devfn >> 3) + 1;
511 /* Compute the number of unitids consumed */
512 printk_spew("%s count: %04x static_count: %04x\n",
513 dev_path(dev), count, static_count);
514 if (count < static_count) {
515 count = static_count;
518 /* Update the Unitid of the next device */
519 ht_unitid_base[ht_dev_num] = next_unitid;
522 #if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
525 real_last_unitid = next_unitid;
529 next_unitid += count;
530 if (next_unitid > max_unitid) {
531 max_unitid = next_unitid;
534 /* Setup the hypetransport link */
535 bus->reset_needed |= ht_setup_link(&prev, dev, pos);
537 printk_debug("%s [%04x/%04x] %s next_unitid: %04x\n",
539 dev->vendor, dev->device,
540 (dev->enabled? "enabled": "disabled"), next_unitid);
542 } while (last_unitid != next_unitid);
545 if(bus->reset_needed) {
546 printk_info("HyperT reset needed\n");
549 printk_debug("HyperT reset not needed\n");
553 #if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
554 if(offset_unitid && (ht_dev_num>1) && (real_last_unitid != CONFIG_HT_CHAIN_END_UNITID_BASE) && !end_used) {
556 device_t last_func = 0;
557 flags = pci_read_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS);
559 flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & 0x1f;
560 pci_write_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS, flags);
562 for(func = real_last_dev; func; func = func->sibling) {
563 func->path.pci.devfn -= ((real_last_unitid - CONFIG_HT_CHAIN_END_UNITID_BASE) << 3);
567 ht_unitid_base[ht_dev_num-1] = CONFIG_HT_CHAIN_END_UNITID_BASE; // update last one
569 printk_debug(" unitid: %04x --> %04x\n",
570 real_last_unitid, CONFIG_HT_CHAIN_END_UNITID_BASE);
574 next_unitid = max_unitid;
576 if (next_unitid > 0x20) {
579 if( (bus->secondary == 0) && (next_unitid > 0x18)) {
580 next_unitid = 0x18; /* avoid K8 on bus 0 */
583 /* Die if any leftover Static devices are are found.
584 * There's probably a problem in the Config.lb.
588 for(left = old_devices; left; left = left->sibling) {
589 printk_debug("%s\n", dev_path(left));
591 printk_err("HT: Left over static devices. Check your Config.lb\n");
592 if(last_func && !last_func->sibling) // put back the left over static device, and let pci_scan_bus disable it
593 last_func->sibling = old_devices;
596 /* Now that nothing is overlapping it is safe to scan the
599 max = pci_scan_bus(bus, 0x00, ((next_unitid-1) << 3)|7, max);
604 * @brief Scan a PCI bridge and the buses behind the bridge.
606 * Determine the existence of buses behind the bridge. Set up the bridge
607 * according to the result of the scan.
609 * This function is the default scan_bus() method for PCI bridge devices.
611 * @param dev pointer to the bridge device
612 * @param max the highest bus number assgined up to now
614 * @return The maximum bus number found, after scanning all subordinate busses
616 unsigned int hypertransport_scan_chain_x(struct bus *bus,
617 unsigned min_devfn, unsigned max_devfn, unsigned int max)
619 unsigned ht_unitid_base[4];
620 unsigned offset_unitid = 1;
621 return hypertransport_scan_chain(bus, min_devfn, max_devfn, max, ht_unitid_base, offset_unitid);
624 unsigned int ht_scan_bridge(struct device *dev, unsigned int max)
626 return do_pci_scan_bridge(dev, max, hypertransport_scan_chain_x);
630 /** Default device operations for hypertransport bridges */
631 static struct pci_operations ht_bus_ops_pci = {
635 struct device_operations default_ht_ops_bus = {
636 .read_resources = pci_bus_read_resources,
637 .set_resources = pci_dev_set_resources,
638 .enable_resources = pci_bus_enable_resources,
640 .scan_bus = ht_scan_bridge,
642 .reset_bus = pci_bus_reset,
643 .ops_pci = &ht_bus_ops_pci,