2 * This file is part of the coreboot project.
4 * It was originally based on the Linux kernel (arch/i386/kernel/pci-pc.c).
7 * Copyright (C) 2003 Eric Biederman <ebiederm@xmission.com>
8 * Copyright (C) 2003-2004 Linux Networx
9 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
10 * Copyright (C) 2003 Ronald G. Minnich <rminnich@gmail.com>
11 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
12 * Copyright (C) 2005-2006 Tyan
13 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
14 * Copyright (C) 2005-2006 Stefan Reinauer <stepan@openbios.org>
15 * Copyright (C) 2009 Myles Watson <mylesgw@gmail.com>
19 * (c) 1999--2000 Martin Mares <mj@suse.cz>
21 /* lots of mods by ron minnich (rminnich@lanl.gov), with
22 * the final architecture guidance from Tom Merritt (tjm@codegen.com)
23 * In particular, we changed from the one-pass original version to
24 * Tom's recommended multiple-pass version. I wasn't sure about doing
25 * it with multiple passes, until I actually started doing it and saw
26 * the wisdom of Tom's recommendations ...
28 * Lots of cleanups by Eric Biederman to handle bridges, and to
29 * handle resource allocation for non-pci devices.
32 #include <console/console.h>
35 #include <device/device.h>
36 #include <device/pci.h>
37 #include <device/pci_ids.h>
40 #include <smp/spinlock.h>
42 /** Linked list of ALL devices */
43 struct device *all_devices = &dev_root;
44 /** Pointer to the last device */
45 extern struct device **last_dev_p;
49 * @brief Allocate a new device structure.
51 * Allocte a new device structure and attached it to the device tree as a
52 * child of the parent bus.
54 * @param parent parent bus the newly created device attached to.
55 * @param path path to the device to be created.
57 * @return pointer to the newly created device structure.
62 DECLARE_SPIN_LOCK(dev_lock)
64 device_t alloc_dev(struct bus *parent, struct device_path *path)
71 /* Find the last child of our parent. */
72 for (child = parent->children; child && child->sibling; /* */ ) {
73 child = child->sibling;
76 dev = malloc(sizeof(*dev));
78 die("DEV: out of memory.\n");
80 memset(dev, 0, sizeof(*dev));
81 memcpy(&dev->path, path, sizeof(*path));
83 /* Initialize the back pointers in the link fields. */
84 for (link = 0; link < MAX_LINKS; link++) {
85 dev->link[link].dev = dev;
86 dev->link[link].link = link;
89 /* By default devices are enabled. */
92 /* Add the new device to the list of children of the bus. */
97 parent->children = dev;
100 /* Append a new device to the global device list.
101 * The list is used to find devices once everything is set up.
104 last_dev_p = &dev->next;
106 spin_unlock(&dev_lock);
111 * @brief round a number up to an alignment.
112 * @param val the starting value
113 * @param roundup Alignment as a power of two
114 * @returns rounded up number
116 static resource_t round(resource_t val, unsigned long pow)
119 mask = (1ULL << pow) - 1ULL;
125 /** Read the resources on all devices of a given bus.
126 * @param bus bus to read the resources on.
128 static void read_resources(struct bus *bus)
130 struct device *curdev;
132 printk(BIOS_SPEW, "%s %s bus %x link: %d\n", dev_path(bus->dev), __func__,
133 bus->secondary, bus->link);
135 /* Walk through all devices and find which resources they need. */
136 for (curdev = bus->children; curdev; curdev = curdev->sibling) {
138 if (!curdev->enabled) {
141 if (!curdev->ops || !curdev->ops->read_resources) {
142 printk(BIOS_ERR, "%s missing read_resources\n",
146 curdev->ops->read_resources(curdev);
148 /* Read in the resources behind the current device's links. */
149 for (i = 0; i < curdev->links; i++)
150 read_resources(&curdev->link[i]);
152 printk(BIOS_SPEW, "%s read_resources bus %d link: %d done\n",
153 dev_path(bus->dev), bus->secondary, bus->link);
156 struct pick_largest_state {
157 struct resource *last;
158 struct device *result_dev;
159 struct resource *result;
163 static void pick_largest_resource(void *gp, struct device *dev,
164 struct resource *resource)
166 struct pick_largest_state *state = gp;
167 struct resource *last;
171 /* Be certain to pick the successor to last. */
172 if (resource == last) {
173 state->seen_last = 1;
176 if (resource->flags & IORESOURCE_FIXED)
178 if (last && ((last->align < resource->align) ||
179 ((last->align == resource->align) &&
180 (last->size < resource->size)) ||
181 ((last->align == resource->align) &&
182 (last->size == resource->size) && (!state->seen_last)))) {
185 if (!state->result ||
186 (state->result->align < resource->align) ||
187 ((state->result->align == resource->align) &&
188 (state->result->size < resource->size))) {
189 state->result_dev = dev;
190 state->result = resource;
194 static struct device *largest_resource(struct bus *bus,
195 struct resource **result_res,
196 unsigned long type_mask,
199 struct pick_largest_state state;
201 state.last = *result_res;
202 state.result_dev = NULL;
206 search_bus_resources(bus, type_mask, type, pick_largest_resource,
209 *result_res = state.result;
210 return state.result_dev;
213 /* Compute allocate resources is the guts of the resource allocator.
216 * - Allocate resource locations for every device.
217 * - Don't overlap, and follow the rules of bridges.
218 * - Don't overlap with resources in fixed locations.
219 * - Be efficient so we don't have ugly strategies.
222 * - Devices that have fixed addresses are the minority so don't
223 * worry about them too much. Instead only use part of the address
224 * space for devices with programmable addresses. This easily handles
225 * everything except bridges.
227 * - PCI devices are required to have their sizes and their alignments
228 * equal. In this case an optimal solution to the packing problem
229 * exists. Allocate all devices from highest alignment to least
230 * alignment or vice versa. Use this.
232 * - So we can handle more than PCI run two allocation passes on bridges. The
233 * first to see how large the resources are behind the bridge, and what
234 * their alignment requirements are. The second to assign a safe address to
235 * the devices behind the bridge. This allows us to treat a bridge as just
236 * a device with a couple of resources, and not need to special case it in
237 * the allocator. Also this allows handling of other types of bridges.
240 static void compute_resources(struct bus *bus, struct resource *bridge,
241 unsigned long type_mask, unsigned long type)
244 struct resource *resource;
246 base = round(bridge->base, bridge->align);
248 printk(BIOS_SPEW, "%s %s_%s: base: %llx size: %llx align: %d gran: %d limit: %llx\n",
249 dev_path(bus->dev), __func__,
250 (type & IORESOURCE_IO) ? "io" : (type & IORESOURCE_PREFETCH) ?
252 base, bridge->size, bridge->align, bridge->gran, bridge->limit);
254 /* For each child which is a bridge, compute_resource_needs. */
255 for (dev = bus->children; dev; dev = dev->sibling) {
257 struct resource *child_bridge;
262 /* Find the resources with matching type flags. */
263 for (i = 0; i < dev->resources; i++) {
265 child_bridge = &dev->resource[i];
267 if (!(child_bridge->flags & IORESOURCE_BRIDGE) ||
268 (child_bridge->flags & type_mask) != type)
271 /* Split prefetchable memory if combined. Many domains
272 * use the same address space for prefetchable memory
273 * and non-prefetchable memory. Bridges below them
274 * need it separated. Add the PREFETCH flag to the
275 * type_mask and type.
277 link = IOINDEX_LINK(child_bridge->index);
278 compute_resources(&dev->link[link], child_bridge,
279 type_mask | IORESOURCE_PREFETCH,
280 type | (child_bridge->flags &
281 IORESOURCE_PREFETCH));
285 /* Remember we haven't found anything yet. */
288 /* Walk through all the resources on the current bus and compute the
289 * amount of address space taken by them. Take granularity and
290 * alignment into account.
292 while ((dev = largest_resource(bus, &resource, type_mask, type))) {
294 /* Size 0 resources can be skipped. */
295 if (!resource->size) {
299 /* Propagate the resource alignment to the bridge resource. */
300 if (resource->align > bridge->align) {
301 bridge->align = resource->align;
304 /* Propagate the resource limit to the bridge register. */
305 if (bridge->limit > resource->limit) {
306 bridge->limit = resource->limit;
309 /* Warn if it looks like APICs aren't declared. */
310 if ((resource->limit == 0xffffffff) &&
311 (resource->flags & IORESOURCE_ASSIGNED)) {
312 printk(BIOS_ERR, "Resource limit looks wrong! (no APIC?)\n");
313 printk(BIOS_ERR, "%s %02lx limit %08Lx\n", dev_path(dev),
314 resource->index, resource->limit);
317 if (resource->flags & IORESOURCE_IO) {
318 /* Don't allow potential aliases over the legacy PCI
319 * expansion card addresses. The legacy PCI decodes
320 * only 10 bits, uses 0x100 - 0x3ff. Therefore, only
321 * 0x00 - 0xff can be used out of each 0x400 block of
324 if ((base & 0x300) != 0) {
325 base = (base & ~0x3ff) + 0x400;
327 /* Don't allow allocations in the VGA I/O range.
328 * PCI has special cases for that.
330 else if ((base >= 0x3b0) && (base <= 0x3df)) {
334 /* Base must be aligned. */
335 base = round(base, resource->align);
336 resource->base = base;
337 base += resource->size;
339 printk(BIOS_SPEW, "%s %02lx * [0x%llx - 0x%llx] %s\n",
340 dev_path(dev), resource->index,
342 resource->base + resource->size - 1,
343 (resource->flags & IORESOURCE_IO) ? "io" :
344 (resource->flags & IORESOURCE_PREFETCH) ?
347 /* A pci bridge resource does not need to be a power
348 * of two size, but it does have a minimum granularity.
349 * Round the size up to that minimum granularity so we
350 * know not to place something else at an address postitively
351 * decoded by the bridge.
353 bridge->size = round(base, bridge->gran) -
354 round(bridge->base, bridge->align);
356 printk(BIOS_SPEW, "%s %s_%s: base: %llx size: %llx align: %d gran: %d limit: %llx done\n",
357 dev_path(bus->dev), __func__,
358 (bridge->flags & IORESOURCE_IO) ? "io" :
359 (bridge->flags & IORESOURCE_PREFETCH) ? "prefmem" : "mem",
360 base, bridge->size, bridge->align, bridge->gran, bridge->limit);
364 * This function is the second part of the resource allocator.
367 * - Allocate resource locations for every device.
368 * - Don't overlap, and follow the rules of bridges.
369 * - Don't overlap with resources in fixed locations.
370 * - Be efficient so we don't have ugly strategies.
373 * - Devices that have fixed addresses are the minority so don't
374 * worry about them too much. Instead only use part of the address
375 * space for devices with programmable addresses. This easily handles
376 * everything except bridges.
378 * - PCI devices are required to have their sizes and their alignments
379 * equal. In this case an optimal solution to the packing problem
380 * exists. Allocate all devices from highest alignment to least
381 * alignment or vice versa. Use this.
383 * - So we can handle more than PCI run two allocation passes on bridges. The
384 * first to see how large the resources are behind the bridge, and what
385 * their alignment requirements are. The second to assign a safe address to
386 * the devices behind the bridge. This allows us to treat a bridge as just
387 * a device with a couple of resources, and not need to special case it in
388 * the allocator. Also this allows handling of other types of bridges.
390 * - This function assigns the resources a value.
392 * @param bus The bus we are traversing.
393 * @param bridge The bridge resource which must contain the bus' resources.
394 * @param type_mask This value gets anded with the resource type.
395 * @param type This value must match the result of the and.
397 static void allocate_resources(struct bus *bus, struct resource *bridge,
398 unsigned long type_mask, unsigned long type)
401 struct resource *resource;
405 printk(BIOS_SPEW, "%s %s_%s: base:%llx size:%llx align:%d gran:%d limit:%llx\n",
406 dev_path(bus->dev), __func__,
407 (type & IORESOURCE_IO) ? "io" : (type & IORESOURCE_PREFETCH) ?
409 base, bridge->size, bridge->align, bridge->gran, bridge->limit);
411 /* Remember we haven't found anything yet. */
414 /* Walk through all the resources on the current bus and allocate them
417 while ((dev = largest_resource(bus, &resource, type_mask, type))) {
419 /* Propagate the bridge limit to the resource register. */
420 if (resource->limit > bridge->limit) {
421 resource->limit = bridge->limit;
424 /* Size 0 resources can be skipped. */
425 if (!resource->size) {
426 /* Set the base to limit so it doesn't confuse tolm. */
427 resource->base = resource->limit;
428 resource->flags |= IORESOURCE_ASSIGNED;
432 if (resource->flags & IORESOURCE_IO) {
433 /* Don't allow potential aliases over the legacy PCI
434 * expansion card addresses. The legacy PCI decodes
435 * only 10 bits, uses 0x100 - 0x3ff. Therefore, only
436 * 0x00 - 0xff can be used out of each 0x400 block of
439 if ((base & 0x300) != 0) {
440 base = (base & ~0x3ff) + 0x400;
442 /* Don't allow allocations in the VGA I/O range.
443 * PCI has special cases for that.
445 else if ((base >= 0x3b0) && (base <= 0x3df)) {
450 if ((round(base, resource->align) + resource->size - 1) <=
452 /* Base must be aligned. */
453 base = round(base, resource->align);
454 resource->base = base;
455 resource->flags |= IORESOURCE_ASSIGNED;
456 resource->flags &= ~IORESOURCE_STORED;
457 base += resource->size;
459 printk(BIOS_ERR, "!! Resource didn't fit !!\n");
460 printk(BIOS_ERR, " aligned base %llx size %llx limit %llx\n",
461 round(base, resource->align), resource->size,
463 printk(BIOS_ERR, " %llx needs to be <= %llx (limit)\n",
464 (round(base, resource->align) +
465 resource->size) - 1, resource->limit);
466 printk(BIOS_ERR, " %s%s %02lx * [0x%llx - 0x%llx] %s\n",
468 flags & IORESOURCE_ASSIGNED) ? "Assigned: " :
469 "", dev_path(dev), resource->index,
471 resource->base + resource->size - 1,
473 flags & IORESOURCE_IO) ? "io" : (resource->
476 ? "prefmem" : "mem");
479 printk(BIOS_SPEW, "%s%s %02lx * [0x%llx - 0x%llx] %s\n",
480 (resource->flags & IORESOURCE_ASSIGNED) ? "Assigned: "
482 dev_path(dev), resource->index, resource->base,
483 resource->size ? resource->base + resource->size - 1 :
485 (resource->flags & IORESOURCE_IO) ? "io" :
486 (resource->flags & IORESOURCE_PREFETCH) ? "prefmem" :
489 /* A PCI bridge resource does not need to be a power of two size, but
490 * it does have a minimum granularity. Round the size up to that
491 * minimum granularity so we know not to place something else at an
492 * address positively decoded by the bridge.
495 bridge->flags |= IORESOURCE_ASSIGNED;
497 printk(BIOS_SPEW, "%s %s_%s: next_base: %llx size: %llx align: %d gran: %d done\n",
498 dev_path(bus->dev), __func__,
499 (type & IORESOURCE_IO) ? "io" : (type & IORESOURCE_PREFETCH) ?
501 base, bridge->size, bridge->align, bridge->gran);
503 /* For each child which is a bridge, allocate_resources. */
504 for (dev = bus->children; dev; dev = dev->sibling) {
506 struct resource *child_bridge;
511 /* Find the resources with matching type flags. */
512 for (i = 0; i < dev->resources; i++) {
514 child_bridge = &dev->resource[i];
516 if (!(child_bridge->flags & IORESOURCE_BRIDGE) ||
517 (child_bridge->flags & type_mask) != type)
520 /* Split prefetchable memory if combined. Many domains
521 * use the same address space for prefetchable memory
522 * and non-prefetchable memory. Bridges below them
523 * need it separated. Add the PREFETCH flag to the
524 * type_mask and type.
526 link = IOINDEX_LINK(child_bridge->index);
527 allocate_resources(&dev->link[link], child_bridge,
528 type_mask | IORESOURCE_PREFETCH,
529 type | (child_bridge->flags &
530 IORESOURCE_PREFETCH));
535 #if CONFIG_PCI_64BIT_PREF_MEM == 1
536 #define MEM_MASK (IORESOURCE_PREFETCH | IORESOURCE_MEM)
538 #define MEM_MASK (IORESOURCE_MEM)
540 #define IO_MASK (IORESOURCE_IO)
541 #define PREF_TYPE (IORESOURCE_PREFETCH | IORESOURCE_MEM)
542 #define MEM_TYPE (IORESOURCE_MEM)
543 #define IO_TYPE (IORESOURCE_IO)
546 struct resource pref, io, mem;
549 static void constrain_resources(struct device *dev, struct constraints* limits)
551 struct device *child;
552 struct resource *res;
553 struct resource *lim;
556 printk(BIOS_SPEW, "%s: %s\n", __func__, dev_path(dev));
558 /* Constrain limits based on the fixed resources of this device. */
559 for (i = 0; i < dev->resources; i++) {
560 res = &dev->resource[i];
561 if (!(res->flags & IORESOURCE_FIXED))
564 /* It makes no sense to have 0-sized, fixed resources.*/
565 printk(BIOS_ERR, "skipping %s@%lx fixed resource, size=0!\n",
566 dev_path(dev), res->index);
570 /* PREFETCH, MEM, or I/O - skip any others. */
571 if ((res->flags & MEM_MASK) == PREF_TYPE)
573 else if ((res->flags & MEM_MASK) == MEM_TYPE)
575 else if ((res->flags & IO_MASK) == IO_TYPE)
580 /* Is it already outside the limits? */
581 if (((res->base + res->size -1) < lim->base) || (res->base > lim->limit))
584 /* Choose to be above or below fixed resources. This
585 * check is signed so that "negative" amounts of space
586 * are handled correctly.
588 if ((signed long long)(lim->limit - (res->base + res->size -1)) >
589 (signed long long)(res->base - lim->base))
590 lim->base = res->base + res->size;
592 lim->limit = res->base -1;
595 /* Descend into every enabled child and look for fixed resources. */
596 for (i = 0; i < dev->links; i++)
597 for (child = dev->link[i].children; child;
598 child = child->sibling)
600 constrain_resources(child, limits);
603 static void avoid_fixed_resources(struct device *dev)
605 struct constraints limits;
606 struct resource *res;
609 printk(BIOS_SPEW, "%s: %s\n", __func__, dev_path(dev));
610 /* Initialize constraints to maximum size. */
612 limits.pref.base = 0;
613 limits.pref.limit = 0xffffffffffffffffULL;
615 limits.io.limit = 0xffffffffffffffffULL;
617 limits.mem.limit = 0xffffffffffffffffULL;
619 /* Constrain the limits to dev's initial resources. */
620 for (i = 0; i < dev->resources; i++) {
621 res = &dev->resource[i];
622 if ((res->flags & IORESOURCE_FIXED))
624 printk(BIOS_SPEW, "%s:@%s %02lx limit %08Lx\n", __func__,
625 dev_path(dev), res->index, res->limit);
626 if ((res->flags & MEM_MASK) == PREF_TYPE &&
627 (res->limit < limits.pref.limit))
628 limits.pref.limit = res->limit;
629 if ((res->flags & MEM_MASK) == MEM_TYPE &&
630 (res->limit < limits.mem.limit))
631 limits.mem.limit = res->limit;
632 if ((res->flags & IO_MASK) == IO_TYPE &&
633 (res->limit < limits.io.limit))
634 limits.io.limit = res->limit;
637 /* Look through the tree for fixed resources and update the limits. */
638 constrain_resources(dev, &limits);
640 /* Update dev's resources with new limits. */
641 for (i = 0; i < dev->resources; i++) {
642 struct resource *lim;
643 res = &dev->resource[i];
645 if ((res->flags & IORESOURCE_FIXED))
648 /* PREFETCH, MEM, or I/O - skip any others. */
649 if ((res->flags & MEM_MASK) == PREF_TYPE)
651 else if ((res->flags & MEM_MASK) == MEM_TYPE)
653 else if ((res->flags & IO_MASK) == IO_TYPE)
658 printk(BIOS_SPEW, "%s2: %s@%02lx limit %08Lx\n", __func__,
659 dev_path(dev), res->index, res->limit);
660 printk(BIOS_SPEW, "\tlim->base %08Lx lim->limit %08Lx\n",
661 lim->base, lim->limit);
663 /* Is the resource outside the limits? */
664 if (lim->base > res->base)
665 res->base = lim->base;
666 if (res->limit > lim->limit)
667 res->limit = lim->limit;
671 #if CONFIG_VGA_BRIDGE_SETUP == 1
672 device_t vga_pri = 0;
673 static void set_vga_bridge_bits(void)
676 * FIXME: Modify set_vga_bridge so it is less PCI centric!
677 * This function knows too much about PCI stuff, it should be just
678 * an iterator/visitor.
681 /* FIXME: Handle the VGA palette snooping. */
682 struct device *dev, *vga, *vga_onboard, *vga_first, *vga_last;
689 for (dev = all_devices; dev; dev = dev->next) {
692 if (((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) &&
693 ((dev->class >> 8) != PCI_CLASS_DISPLAY_OTHER)) {
695 if (dev->on_mainboard) {
701 if (dev->on_mainboard) {
708 /* It isn't safe to enable other VGA cards. */
709 dev->command &= ~(PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
718 #if CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST == 1
719 if (vga_onboard) // Will use on board VGA as pri.
721 if (!vga) // Will use last add on adapter as pri.
728 /* VGA is first add on card or the only onboard VGA. */
729 printk(BIOS_DEBUG, "Setting up VGA for %s\n", dev_path(vga));
730 /* All legacy VGA cards have MEM & I/O space registers. */
731 vga->command |= (PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
735 /* Now walk up the bridges setting the VGA enable. */
737 printk(BIOS_DEBUG, "Setting PCI_BRIDGE_CTL_VGA for bridge %s\n",
739 bus->bridge_ctrl |= PCI_BRIDGE_CTL_VGA;
740 bus = (bus == bus->dev->bus) ? 0 : bus->dev->bus;
747 * @brief Assign the computed resources to the devices on the bus.
749 * @param bus Pointer to the structure for this bus
751 * Use the device specific set_resources method to store the computed
752 * resources to hardware. For bridge devices, the set_resources() method
753 * has to recurse into every down stream buses.
756 * assign_resources() -> device_operation::set_resources()
757 * device_operation::set_resources() -> assign_resources()
759 void assign_resources(struct bus *bus)
761 struct device *curdev;
763 printk(BIOS_SPEW, "%s assign_resources, bus %d link: %d\n",
764 dev_path(bus->dev), bus->secondary, bus->link);
766 for (curdev = bus->children; curdev; curdev = curdev->sibling) {
767 if (!curdev->enabled || !curdev->resources) {
770 if (!curdev->ops || !curdev->ops->set_resources) {
771 printk(BIOS_ERR, "%s missing set_resources\n",
775 curdev->ops->set_resources(curdev);
777 printk(BIOS_SPEW, "%s assign_resources, bus %d link: %d\n",
778 dev_path(bus->dev), bus->secondary, bus->link);
782 * @brief Enable the resources for a specific device
784 * @param dev the device whose resources are to be enabled
786 * Enable resources of the device by calling the device specific
787 * enable_resources() method.
789 * The parent's resources should be enabled first to avoid having enabling
790 * order problem. This is done by calling the parent's enable_resources()
791 * method and let that method to call it's children's enable_resoruces()
792 * method via the (global) enable_childrens_resources().
794 * Indirect mutual recursion:
795 * enable_resources() -> device_operations::enable_resource()
796 * device_operations::enable_resource() -> enable_children_resources()
797 * enable_children_resources() -> enable_resources()
799 void enable_resources(struct device *dev)
804 if (!dev->ops || !dev->ops->enable_resources) {
805 printk(BIOS_ERR, "%s missing enable_resources\n", dev_path(dev));
808 dev->ops->enable_resources(dev);
812 * @brief Reset all of the devices a bus
814 * Reset all of the devices on a bus and clear the bus's reset_needed flag.
816 * @param bus pointer to the bus structure
818 * @return 1 if the bus was successfully reset, 0 otherwise.
821 int reset_bus(struct bus *bus)
823 if (bus && bus->dev && bus->dev->ops && bus->dev->ops->reset_bus) {
824 bus->dev->ops->reset_bus(bus);
825 bus->reset_needed = 0;
832 * @brief Scan for devices on a bus.
834 * If there are bridges on the bus, recursively scan the buses behind the
835 * bridges. If the setting up and tuning of the bus causes a reset to be
836 * required, reset the bus and scan it again.
838 * @param busdev Pointer to the bus device.
839 * @param max Current bus number.
840 * @return The maximum bus number found, after scanning all subordinate buses.
842 unsigned int scan_bus(struct device *busdev, unsigned int max)
844 unsigned int new_max;
846 if (!busdev || !busdev->enabled || !busdev->ops ||
847 !busdev->ops->scan_bus) {
852 while (do_scan_bus) {
854 new_max = busdev->ops->scan_bus(busdev, max);
856 for (link = 0; link < busdev->links; link++) {
857 if (busdev->link[link].reset_needed) {
858 if (reset_bus(&busdev->link[link])) {
861 busdev->bus->reset_needed = 1;
870 * @brief Determine the existence of devices and extend the device tree.
872 * Most of the devices in the system are listed in the mainboard Config.lb
873 * file. The device structures for these devices are generated at compile
874 * time by the config tool and are organized into the device tree. This
875 * function determines if the devices created at compile time actually exist
876 * in the physical system.
878 * For devices in the physical system but not listed in the Config.lb file,
879 * the device structures have to be created at run time and attached to the
882 * This function starts from the root device 'dev_root', scan the buses in
883 * the system recursively, modify the device tree according to the result of
886 * This function has no idea how to scan and probe buses and devices at all.
887 * It depends on the bus/device specific scan_bus() method to do it. The
888 * scan_bus() method also has to create the device structure and attach
889 * it to the device tree.
891 void dev_enumerate(void)
894 printk(BIOS_INFO, "Enumerating buses...\n");
897 show_all_devs(BIOS_SPEW, "Before Device Enumeration.");
898 printk(BIOS_SPEW, "Compare with tree...\n");
899 show_devs_tree(root, BIOS_SPEW, 0, 0);
901 if (root->chip_ops && root->chip_ops->enable_dev) {
902 root->chip_ops->enable_dev(root);
904 if (!root->ops || !root->ops->scan_bus) {
905 printk(BIOS_ERR, "dev_root missing scan_bus operation");
909 printk(BIOS_INFO, "done\n");
913 * @brief Configure devices on the devices tree.
915 * Starting at the root of the device tree, travel it recursively in two
916 * passes. In the first pass, we compute and allocate resources (ranges)
917 * requried by each device. In the second pass, the resources ranges are
918 * relocated to their final position and stored to the hardware.
920 * I/O resources grow upward. MEM resources grow downward.
922 * Since the assignment is hierarchical we set the values into the dev_root
925 void dev_configure(void)
927 struct resource *res;
929 struct device *child;
932 #if CONFIG_VGA_BRIDGE_SETUP == 1
933 set_vga_bridge_bits();
936 printk(BIOS_INFO, "Allocating resources...\n");
940 /* Each domain should create resources which contain the entire address
941 * space for IO, MEM, and PREFMEM resources in the domain. The
942 * allocation of device resources will be done from this address space.
945 /* Read the resources for the entire tree. */
947 printk(BIOS_INFO, "Reading resources...\n");
948 read_resources(&root->link[0]);
949 printk(BIOS_INFO, "Done reading resources.\n");
951 print_resource_tree(root, BIOS_SPEW, "After reading.");
953 /* Compute resources for all domains. */
954 for (child = root->link[0].children; child; child = child->sibling) {
955 if (!(child->path.type == DEVICE_PATH_PCI_DOMAIN))
957 for (i = 0; i < child->resources; i++) {
958 res = &child->resource[i];
959 if (res->flags & IORESOURCE_FIXED)
961 if (res->flags & IORESOURCE_PREFETCH) {
962 compute_resources(&child->link[0],
963 res, MEM_MASK, PREF_TYPE);
966 if (res->flags & IORESOURCE_MEM) {
967 compute_resources(&child->link[0],
968 res, MEM_MASK, MEM_TYPE);
971 if (res->flags & IORESOURCE_IO) {
972 compute_resources(&child->link[0],
973 res, IO_MASK, IO_TYPE);
979 /* For all domains. */
980 for (child = root->link[0].children; child; child=child->sibling)
981 if (child->path.type == DEVICE_PATH_PCI_DOMAIN)
982 avoid_fixed_resources(child);
984 /* Now we need to adjust the resources. MEM resources need to start at
985 * the highest address managable.
987 for (child = root->link[0].children; child; child = child->sibling) {
988 if (child->path.type != DEVICE_PATH_PCI_DOMAIN)
990 for (i = 0; i < child->resources; i++) {
991 res = &child->resource[i];
992 if (!(res->flags & IORESOURCE_MEM) ||
993 res->flags & IORESOURCE_FIXED)
995 res->base = resource_max(res);
999 /* Store the computed resource allocations into device registers ... */
1000 printk(BIOS_INFO, "Setting resources...\n");
1001 for (child = root->link[0].children; child; child = child->sibling) {
1002 if (!(child->path.type == DEVICE_PATH_PCI_DOMAIN))
1004 for (i = 0; i < child->resources; i++) {
1005 res = &child->resource[i];
1006 if (res->flags & IORESOURCE_FIXED)
1008 if (res->flags & IORESOURCE_PREFETCH) {
1009 allocate_resources(&child->link[0],
1010 res, MEM_MASK, PREF_TYPE);
1013 if (res->flags & IORESOURCE_MEM) {
1014 allocate_resources(&child->link[0],
1015 res, MEM_MASK, MEM_TYPE);
1018 if (res->flags & IORESOURCE_IO) {
1019 allocate_resources(&child->link[0],
1020 res, IO_MASK, IO_TYPE);
1025 assign_resources(&root->link[0]);
1026 printk(BIOS_INFO, "Done setting resources.\n");
1027 print_resource_tree(root, BIOS_SPEW, "After assigning values.");
1029 printk(BIOS_INFO, "Done allocating resources.\n");
1033 * @brief Enable devices on the device tree.
1035 * Starting at the root, walk the tree and enable all devices/bridges by
1036 * calling the device's enable_resources() method.
1038 void dev_enable(void)
1040 printk(BIOS_INFO, "Enabling resources...\n");
1042 /* now enable everything. */
1043 enable_resources(&dev_root);
1045 printk(BIOS_INFO, "done.\n");
1049 * @brief Initialize all devices in the global device list.
1051 * Starting at the first device on the global device link list,
1052 * walk the list and call the device's init() method to do deivce
1055 void dev_initialize(void)
1059 printk(BIOS_INFO, "Initializing devices...\n");
1060 for (dev = all_devices; dev; dev = dev->next) {
1061 if (dev->enabled && !dev->initialized &&
1062 dev->ops && dev->ops->init) {
1063 if (dev->path.type == DEVICE_PATH_I2C) {
1064 printk(BIOS_DEBUG, "smbus: %s[%d]->",
1065 dev_path(dev->bus->dev),
1068 printk(BIOS_DEBUG, "%s init\n", dev_path(dev));
1069 dev->initialized = 1;
1070 dev->ops->init(dev);
1073 printk(BIOS_INFO, "Devices initialized\n");
1074 show_all_devs(BIOS_SPEW, "After init.");