1 #include <cpu/x86/lapic.h>
2 #include <console/console.h>
3 #include <cpu/x86/msr.h>
4 #include <cpu/x86/mtrr.h>
8 /* this is so interrupts work. This is very limited scope --
9 * linux will do better later, we hope ...
11 /* this is the first way we learned to do it. It fails on real SMP
12 * stuff. So we have to do things differently ...
13 * see the Intel mp1.4 spec, page A-3
17 /* Only Pentium Pro and later have those MSR stuff */
20 printk_info("Setting up local apic...");
22 /* Enable the local apic */
23 msr = rdmsr(LAPIC_BASE_MSR);
24 msr.lo |= LAPIC_BASE_MSR_ENABLE;
25 msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK;
26 msr.lo |= LAPIC_DEFAULT_BASE;
27 wrmsr(LAPIC_BASE_MSR, msr);
30 * Set Task Priority to 'accept all'.
32 lapic_write_around(LAPIC_TASKPRI,
33 lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK);
35 /* Put the local apic in virtual wire mode */
36 lapic_write_around(LAPIC_SPIV,
37 (lapic_read_around(LAPIC_SPIV) & ~(LAPIC_VECTOR_MASK))
39 lapic_write_around(LAPIC_LVT0,
40 (lapic_read_around(LAPIC_LVT0) &
41 ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
42 LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
43 LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 |
44 LAPIC_DELIVERY_MODE_MASK))
45 | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING |
46 LAPIC_DELIVERY_MODE_EXTINT)
48 lapic_write_around(LAPIC_LVT1,
49 (lapic_read_around(LAPIC_LVT1) &
50 ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
51 LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
52 LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 |
53 LAPIC_DELIVERY_MODE_MASK))
54 | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING |
55 LAPIC_DELIVERY_MODE_NMI)
58 printk_debug(" apic_id: %d ", lapicid());
60 #else /* !NEED_LLAPIC */
61 /* Only Pentium Pro and later have those MSR stuff */
64 printk_info("Disabling local apic...");
66 msr = rdmsr(LAPIC_BASE_MSR);
67 msr.lo &= ~LAPIC_BASE_MSR_ENABLE;
68 wrmsr(LAPIC_BASE_MSR, msr);
69 #endif /* !NEED_LAPIC */
70 printk_info("done.\n");