1 #include <cpu/k8/mtrr.h>
4 /* Save off the BIST value */
7 /* The fixed and variable MTRRs are powered-up with random values, clear them to
8 * MTRR_TYPE_UNCACHEABLE for safty reason
12 xorl %eax, %eax # clear %eax and %edx
14 movl $fixed_mtrr_msr, %esi
19 jz clear_fixed_var_mtrr_out
25 jmp clear_fixed_var_mtrr
26 clear_fixed_var_mtrr_out:
28 /* enable memory access for 0 - 1MB using top_mem */
31 movl $(((CONFIG_LB_MEM_TOPK << 10) + TOP_MEM_MASK) & ~TOP_MEM_MASK) , %eax
35 /* enable caching for 0 - 1MB using variable mtrr */
38 andl $0xfffffff0, %edx
40 andl $0x00000f00, %eax
41 orl $(0x00000000 | MTRR_TYPE_WRBACK), %eax
46 andl $0xfffffff0, %edx
48 andl $0x000007ff, %eax
49 orl $((~((CONFIG_LB_MEM_TOPK << 10) - 1)) | 0x800), %eax
52 #if defined(XIP_ROM_SIZE) && defined(XIP_ROM_BASE)
53 /* enable write base caching so we can do execute in place
58 movl $(XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
62 movl $0x0000000f, %edx
63 movl $(~(XIP_ROM_SIZE - 1) | 0x800), %eax
65 #endif /* XIP_ROM_SIZE && XIP_ROM_BASE */
68 /* Set the default memory type and enable fixed and variable MTRRs */
69 movl $MTRRdefType_MSR, %ecx
71 /* Enable Variable MTRRs */
72 movl $0x00000800, %eax
75 /* Enable the MTRRs in SYSCFG */
76 movl $SYSCFG_MSR, %ecx
78 orl $(SYSCFG_MSR_MtrrVarDramEn), %eax
89 .long 0x250, 0x258, 0x259
90 .long 0x268, 0x269, 0x26A
91 .long 0x26B, 0x26C, 0x26D
94 .long 0x200, 0x201, 0x202, 0x203
95 .long 0x204, 0x205, 0x206, 0x207
96 .long 0x208, 0x209, 0x20A, 0x20B
97 .long 0x20C, 0x20D, 0x20E, 0x20F
99 .long 0xC0010016, 0xC0010017, 0xC0010018, 0xC0010019
101 .long 0xC001001A, 0xC001001D
102 .long 0x000 /* NULL, end of table */
104 /* Restore the BIST value */