1 #include <cpu/k8/mtrr.h>
4 /* Save off the BIST value */
7 /* The fixed and variable MTRRs are powered-up with random values, clear them to
8 * MTRR_TYPE_UNCACHEABLE for safty reason
12 xorl %eax, %eax # clear %eax and %edx
14 movl $fixed_mtrr_msr, %esi
16 enable_fixed_mtrr_dram_modify:
17 /* Enable the access to AMD RdDram and WrDram extension bits */
18 movl $SYSCFG_MSR, %ecx
20 orl $SYSCFG_MSR_MtrrFixDramModEn, %eax
26 jz clear_fixed_var_mtrr_out
32 jmp clear_fixed_var_mtrr
33 clear_fixed_var_mtrr_out:
35 disable_fixed_mtrr_dram_modify:
36 /* Disable the access to AMD RdDram and WrDram extension bits */
37 movl $SYSCFG_MSR, %ecx
39 andl $(~SYSCFG_MSR_MtrrFixDramModEn), %eax
42 /* enable memory access for 0 - 1MB using top_mem */
45 movl $(((CONFIG_LB_MEM_TOPK << 10) + TOP_MEM_MASK) & ~TOP_MEM_MASK) , %eax
49 /* enable caching for 0 - 1MB using variable mtrr */
52 andl $0xfffffff0, %edx
54 andl $0x00000f00, %eax
55 orl $(0x00000000 | MTRR_TYPE_WRBACK), %eax
60 andl $0xfffffff0, %edx
62 andl $0x000007ff, %eax
63 orl $((~((CONFIG_LB_MEM_TOPK << 10) - 1)) | 0x800), %eax
66 #if defined(XIP_ROM_SIZE) && defined(XIP_ROM_BASE)
67 /* enable write base caching so we can do execute in place
72 movl $(XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
76 movl $0x0000000f, %edx
77 movl $(~(XIP_ROM_SIZE - 1) | 0x800), %eax
79 #endif /* XIP_ROM_SIZE && XIP_ROM_BASE */
82 /* Set the default memory type and enable fixed and variable MTRRs */
83 movl $MTRRdefType_MSR, %ecx
85 /* Enable Variable MTRRs */
86 movl $0x00000800, %eax
89 /* Enable the MTRRs and IORRs in SYSCFG */
90 movl $SYSCFG_MSR, %ecx
92 /* Don't enable SYSCFG_MSR_MtrrFixDramEn) untill we have done with VGA BIOS */
93 orl $(SYSCFG_MSR_MtrrVarDramEn), %eax
104 .long 0x250, 0x258, 0x259
105 .long 0x268, 0x269, 0x26A
106 .long 0x26B, 0x26C, 0x26D
109 .long 0x200, 0x201, 0x202, 0x203
110 .long 0x204, 0x205, 0x206, 0x207
111 .long 0x208, 0x209, 0x20A, 0x20B
112 .long 0x20C, 0x20D, 0x20E, 0x20F
114 .long 0xC0010016, 0xC0010017, 0xC0010018, 0xC0010019
116 .long 0xC001001A, 0xC001001D
117 .long 0x000 /* NULL, end of table */
119 /* Restore the BIST value */