1 #include <console/console.h>
2 #include <device/device.h>
3 #include <device/device.h>
4 #include <device/pci.h>
7 #include <cpu/x86/mtrr.h>
8 #include <cpu/x86/msr.h>
9 #include <cpu/x86/lapic.h>
10 #include <cpu/intel/microcode.h>
11 #include <cpu/x86/cache.h>
12 #include <cpu/x86/mtrr.h>
14 static uint32_t microcode_updates[] = {
15 /* WARNING - Intel has a new data structure that has variable length
16 * microcode update lengths. They are encoded in int 8 and 9. A
17 * dummy header of nulls must terminate the list.
19 #include "microcode_MU16810d.h"
20 #include "microcode_MU16830c.h"
21 /* Dummy terminator */
29 static void model_6xx_init(device_t dev)
31 /* Turn on caching if we haven't already */
36 /* Update the microcode */
37 intel_update_microcode(microcode_updates);
39 /* Enable the local cpu apics */
43 static struct device_operations cpu_dev_ops = {
44 .init = model_6xx_init,
46 static struct cpu_device_id cpu_table[] = {
47 { X86_VENDOR_INTEL, 0x0650 },
48 { X86_VENDOR_INTEL, 0x0652 },
49 { X86_VENDOR_INTEL, 0x0660 }, /* Celeron (Mendocino) */
50 { X86_VENDOR_INTEL, 0x0665 },
51 { X86_VENDOR_INTEL, 0x0672 },
52 { X86_VENDOR_INTEL, 0x0673 },
53 { X86_VENDOR_INTEL, 0x0680 },
54 { X86_VENDOR_INTEL, 0x0681 },
55 { X86_VENDOR_INTEL, 0x0683 },
56 { X86_VENDOR_INTEL, 0x0686 },
57 { X86_VENDOR_INTEL, 0x06A0 },
58 { X86_VENDOR_INTEL, 0x06A1 },
59 { X86_VENDOR_INTEL, 0x06A4 },
63 static const struct cpu_driver driver __cpu_driver = {
65 .id_table = cpu_table,