2 This software and ancillary information (herein called SOFTWARE )
3 called LinuxBIOS is made available under the terms described
4 here. The SOFTWARE has been approved for release with associated
5 LA-CC Number 00-34 . Unless otherwise indicated, this SOFTWARE has
6 been authored by an employee or employees of the University of
7 California, operator of the Los Alamos National Laboratory under
8 Contract No. W-7405-ENG-36 with the U.S. Department of Energy. The
9 U.S. Government has rights to use, reproduce, and distribute this
10 SOFTWARE. The public may copy, distribute, prepare derivative works
11 and publicly display this SOFTWARE without charge, provided that this
12 Notice and any statement of authorship are reproduced on all copies.
13 Neither the Government nor the University makes any warranty, express
14 or implied, or assumes any liability or responsibility for the use of
15 this SOFTWARE. If SOFTWARE is modified to produce derivative works,
16 such modified SOFTWARE should be clearly marked, so as not to confuse
17 it with the version available from LANL.
19 /* Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL
24 /** Start code to put an i386 or later processor into 32-bit
28 /* .section ".rom.text" */
29 #include <arch/rom_segs.h>
32 .type _start, @function
36 /* Save the BIST result */
39 /* thanks to kmliu@sis.tw.com for this TBL fix ... */
41 /* IMMEDIATELY invalidate the translation lookaside buffer before executing*/
42 /* any further code. Even though paging is disabled we could still get*/
43 /*false address translations due to the TLB if we didn't invalidate it.*/
46 movl %eax, %cr3 /* Invalidate TLB*/
48 /* invalidate the cache */
51 /* Note: gas handles memory addresses in 16 bit code very poorly.
52 * In particular it doesn't appear to have a directive allowing you
53 * associate a section or even an absolute offset with a segment register.
55 * This means that anything except cs:ip relative offsets are
56 * a real pain in 16 bit mode. And explains why it is almost
57 * imposible to get gas to do lgdt correctly.
59 * One way to work around this is to have the linker do the
60 * math instead of the assembler. This solves the very
61 * pratical problem of being able to write code that can
64 * An lgdt call before we have memory enabled cannot be
65 * position independent, as we cannot execute a call
66 * instruction to get our current instruction pointer.
67 * So while this code is relocateable it isn't arbitrarily
70 * The criteria for relocation have been relaxed to their
71 * utmost, so that we can use the same code for both
72 * our initial entry point and startup of the second cpu.
73 * The code assumes when executing at _start that:
74 * (((cs & 0xfff) == 0) and (ip == _start & 0xffff))
76 * ((cs == anything) and (ip == 0)).
78 * The restrictions in reset16.inc mean that _start initially
79 * must be loaded at or above 0xffff0000 or below 0x100000.
81 * The linker scripts computs gdtptr16_offset by simply returning
82 * the low 16 bits. This means that the intial segment used
83 * when start is called must be 64K aligned. This should not
84 * restrict the address as the ip address can be anything.
89 movw $gdtptr16_offset, %bx
94 andl $0x7FFAFFD1, %eax /* PG,AM,WP,NE,TS,EM,MP = 0 */
95 orl $0x60000001, %eax /* CD, NW, PE = 1 */
98 /* Restore BIST to %eax */
101 /* Now that we are in protected mode jump to a 32 bit code segment. */
102 data32 ljmp $ROM_CODE_SEG, $__protected_start
104 /** The gdt has a 4 Gb code segment at 0x10, and a 4 GB data segment
105 * at 0x18; these are Linux-compatible.
111 .word gdt_end - gdt -1 /* compute the table limit */
112 .long gdt /* we know the offset */