src/cpu/amd/model_10xxx/update_microcode.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20
  21 #ifndef __PRE_RAM__
  22 #include <console/console.h>
  23 #include <device/device.h>
  24 #include <device/pci.h>
  25 #include <string.h>
  26 #endif
  27
  28 #ifndef __ROMCC__
  29 #include <cpu/amd/microcode.h>
  30 #endif
  31
  32 static const u8 microcode_updates[] __attribute__ ((aligned(16))) = {
  33
  34 #ifdef __PRE_RAM__
  35
  36 /* From the Revision Guide :
  37  * Equivalent Processor Table for AMD Family 10h Processors
  38  *
  39  * Installed Processor   Equivalent Processor   Patch Level
  40  * Revision ID           Revision ID
  41  * 00100F00h             1000h                  01000020h
  42  * 00100F01h             1000h                  01000020h
  43  * 00100F02h             1000h                  01000020h
  44  * 00100F20h             1020h                  01000096h
  45  * 00100F21h (DR-B1)     1020h                  01000096h
  46  * 00100F2Ah (DR-BA)     1020h                  01000096h
  47  * 00100F22h (DR-B2)     1022h                  01000095h
  48  * 00100F23h (DR-B3)     1022h                  01000095h
  49  * 00100F42h (RB-C2)     1041h                  01000086h
  50  * 00100F43h (RB-C3)     1043h                  010000b6h
  51  * 00100F62h (DA-C2)     1062h                  0100009Fh
  52  * 00100F63h (DA-C3)     1043h                  010000b6h
  53  */
  54
  55 #include CONFIG_AMD_UCODE_PATCH_FILE
  56
  57 #endif
  58         /*  Dummy terminator  */
  59         0x0, 0x0, 0x0, 0x0,
  60         0x0, 0x0, 0x0, 0x0,
  61         0x0, 0x0, 0x0, 0x0,
  62         0x0, 0x0, 0x0, 0x0,
  63 };
  64
  65 static u32 get_equivalent_processor_rev_id(u32 orig_id) {
  66         static unsigned id_mapping_table[] = {
  67                 0x100f00, 0x1000,
  68                 0x100f01, 0x1000,
  69                 0x100f02, 0x1000,
  70                 0x100f20, 0x1020,
  71                 0x100f21, 0x1020,
  72                 0x100f2A, 0x1020,
  73                 0x100f22, 0x1022,
  74                 0x100f23, 0x1022,
  75                 0x100f42, 0x1041,
  76                 0x100f43, 0x1043,
  77                 0x100f62, 0x1062,
  78                 0x100f63, 0x1043,
  79         };
  80
  81         u32 new_id;
  82         int i;
  83
  84         new_id = 0;
  85
  86         for (i = 0; i < sizeof(id_mapping_table); i += 2 ) {
  87                 if(id_mapping_table[i]==orig_id) {
  88                         new_id = id_mapping_table[i + 1];
  89                         break;
  90                 }
  91         }
  92
  93         return new_id;
  94
  95 }
  96
  97 void update_microcode(u32 cpu_deviceid)
  98 {
  99         u32 equivalent_processor_rev_id;
 100
 101         /* Update the microcode */
 102         equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid );
 103         if (equivalent_processor_rev_id != 0) {
 104                 amd_update_microcode((void *) microcode_updates, equivalent_processor_rev_id);
 105         } else {
 106                 printk(BIOS_DEBUG, "microcode: rev id not found. Skipping microcode patch!\n");
 107         }
 108
 109 }