2 ## Compute the location and size of where this firmware image
3 ## (coreboot plus bootloader) will live in the boot rom chip.
6 default ROM_SECTION_SIZE = FAILOVER_SIZE
7 default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE )
10 default ROM_SECTION_SIZE = FALLBACK_SIZE
11 default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
14 default ROM_SECTION_SIZE = FALLBACK_SIZE
15 default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
17 default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE )
18 default ROM_SECTION_OFFSET = 0
24 ## Compute the start location and size size of
25 ## The coreboot bootloader.
27 default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
28 default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
31 ## Compute where this copy of coreboot will start in the boot rom
33 default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
36 ## Compute a range of ROM that can cached to speed up coreboot,
39 ## XIP_ROM_SIZE must be a power of 2.
40 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
42 default XIP_ROM_SIZE = 64 * 1024
45 default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)
48 default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE)
50 default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)