1 #######################################################
3 # Main options file for LinuxBIOS
5 # Each option used by a part must be defined in
6 # this file. The format for options is:
9 # default <expr> | {<expr>} | "<string>" | none
11 # export always | used | never
17 # <name> is the name of the option
18 # <expr> is a numeric expression
19 # <string> is a string
21 # Either a default value or 'default none' must
22 # be specified for every option. An option
23 # specified as 'default none' will not be exported
24 # (i.e. will remain undefined) unless it has
25 # been assigned a value.
27 # Option values can be an immediate expression that
28 # evaluates to a numeric value, a delayed expression
29 # (surrounded by curley braces), or a string
30 # (surrounded by double quotes.)
32 # Immediate expressions are evaluated at the time an
33 # option is defined or set and the numeric result
34 # becomes the value of the option.
36 # Delayed expression are evaluated at the time the
37 # option is used, either in another expression or
38 # when being exported.
40 # String values will have the double quotes removed
43 # Format strings determine the print format that is
44 # used when exporting options. The default format
45 # is "%s" for strings and "%d" for numbers.
47 # Exported options generate entries in the
48 # Makefile.settings file. Options can be always
49 # exported, exported only if used, or never exported.
51 # A comment string must be supplied for every option.
53 #######################################################
55 ###############################################
56 # Architecture options
57 ###############################################
62 comment "Default architecture is i386, options are alpha and ppc"
67 comment "This cpu supports the MOVNTI directive"
70 ###############################################
72 ###############################################
77 comment "Cross compiler prefix"
80 default "$(CROSS_COMPILE)gcc"
82 comment "Target C Compiler"
87 comment "Host C Compiler"
92 comment "Additional per-cpu CFLAGS"
95 default "$(CROSS_COMPILE)objcopy --gap-fill 0xff"
97 comment "Objcopy command"
99 define LINUXBIOS_VERSION
103 comment "LinuxBIOS version"
105 define LINUXBIOS_EXTRA_VERSION
109 comment "LinuxBIOS extra version"
111 define LINUXBIOS_BUILD
112 default "$(shell date)"
117 define LINUXBIOS_COMPILE_TIME
118 default "$(shell date +%T)"
123 define LINUXBIOS_COMPILE_BY
124 default "$(shell whoami)"
127 comment "Who build this image"
129 define LINUXBIOS_COMPILE_HOST
130 default "$(shell hostname)"
136 define LINUXBIOS_COMPILE_DOMAIN
137 default "$(shell dnsdomainname)"
140 comment "Build domain name"
142 define LINUXBIOS_COMPILER
143 default "$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -n 1)"
146 comment "Build compiler"
148 define LINUXBIOS_LINKER
149 default "$(shell $(CC) -Wl,--version 2>&1 | grep version | tail -n 1)"
152 comment "Build linker"
154 define LINUXBIOS_ASSEMBLER
155 default "$(shell touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o )"
158 comment "Build assembler"
160 define CONFIG_CHIP_CONFIGURE
163 comment "Use new chip_configure method for configuring (non-pci) devices"
165 define CONFIG_USE_INIT
168 comment "Use stage 1 initialization code"
171 ###############################################
173 ###############################################
175 define HAVE_FALLBACK_BOOT
179 comment "Set if fallback booting required"
181 define HAVE_FAILOVER_BOOT
185 comment "Set if failover booting required"
187 define USE_FALLBACK_IMAGE
191 comment "Set to build a fallback image"
193 define USE_FAILOVER_IMAGE
197 comment "Set to build a failover image"
203 comment "Default fallback image size"
209 comment "Default failover image size"
215 comment "Size of your ROM"
217 define ROM_IMAGE_SIZE
221 comment "Default image size"
223 define ROM_SECTION_SIZE
224 default {FALLBACK_SIZE}
227 comment "Default rom section size"
229 define ROM_SECTION_OFFSET
230 default {ROM_SIZE - FALLBACK_SIZE}
233 comment "Default rom section offset"
236 default {ROM_SECTION_SIZE - ROM_IMAGE_SIZE}
239 comment "Default payload size"
242 default {PAYLOAD_SIZE}
245 comment "Base address of LinuxBIOS in ROM"
251 comment "Start address of LinuxBIOS in ROM"
257 comment "Hardware reset vector address"
259 define _EXCEPTION_VECTORS
260 default {_ROMBASE+0x100}
263 comment "Address of exception vector table"
269 comment "Default stack size"
275 comment "Default heap size"
281 comment "Base address of LinuxBIOS in RAM"
287 comment "Start address of LinuxBIOS in RAM"
289 define USE_DCACHE_RAM
292 comment "Use data cache as temporary RAM if possible"
294 define DCACHE_RAM_BASE
298 comment "Base address of data cache when using it for temporary RAM"
300 define DCACHE_RAM_SIZE
304 comment "Size of data cache when using it for temporary RAM"
306 define DCACHE_RAM_GLOBAL_VAR_SIZE
310 comment "Size of region that for global variable of cache as ram stage"
312 define CONFIG_AP_CODE_IN_CAR
315 comment "will copy linuxbios_apc to AP cache ane execute in AP"
320 comment "0: three for in bsp, 1: on every core0, 2: one for on bsp"
322 define WAIT_BEFORE_CPUS_INIT
325 comment "execute cpus_ready_for_init if it is set to 1"
331 comment "Start address of area to cache during LinuxBIOS execution directly from ROM"
337 comment "Size of area to cache during LinuxBIOS execution directly from ROM"
339 define CONFIG_COMPRESS
342 comment "Set for compressed image"
344 define CONFIG_UNCOMPRESSED
346 default {!CONFIG_COMPRESS}
348 comment "Set for uncompressed image"
350 define CONFIG_LB_MEM_TOPK
354 comment "Kilobytes of memory to initialized before executing code from RAM"
356 define HAVE_OPTION_TABLE
359 comment "Export CMOS option table"
361 define USE_OPTION_TABLE
363 default {HAVE_OPTION_TABLE && !USE_FALLBACK_IMAGE}
365 comment "Use option table"
368 ###############################################
369 # CMOS variable options
370 ###############################################
371 define LB_CKS_RANGE_START
375 comment "First CMOS byte to use for LinuxBIOS options"
377 define LB_CKS_RANGE_END
381 comment "Last CMOS byte to use for LinuxBIOS options"
387 comment "Pair of bytes to use for CMOS checksum"
391 ###############################################
393 ###############################################
396 default "$(TOP)/src/arch/$(ARCH)/init/crt0.S.lb"
398 comment "Main initialization target"
401 ###############################################
402 # Debugging/Logging options
403 ###############################################
408 comment "Enable debugging code"
410 define CONFIG_CONSOLE_VGA
413 comment "Log messages to VGA"
415 define CONFIG_CONSOLE_VGA_MULTI
418 comment "Multi VGA console"
420 define CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST
423 comment "Use onboard VGA instead of add on VGA card"
425 define CONFIG_CONSOLE_BTEXT
428 comment "Log messages to btext fb console"
430 define CONFIG_CONSOLE_LOGBUF
433 comment "Log messages to buffer"
435 define CONFIG_CONSOLE_SROM
438 comment "Log messages to SROM console"
440 define CONFIG_CONSOLE_SERIAL8250
443 comment "Log messages to 8250 uart based serial console"
445 define CONFIG_USBDEBUG_DIRECT
448 comment "Log messages to ehci debug port console"
450 define DEFAULT_CONSOLE_LOGLEVEL
453 comment "Console will log at this level unless changed"
455 define MAXIMUM_CONSOLE_LOGLEVEL
458 comment "Error messages up to this level can be printed"
460 define CONFIG_SERIAL_POST
463 comment "Enable SERIAL POST codes"
468 comment "Disable POST codes"
474 comment "Base address for 8250 uart for the serial console"
479 comment "Default baud rate for serial console"
485 comment "Allow UART divisor to be set explicitly"
491 comment "Default flow control settings for the 8250 serial console uart"
494 define CONFIG_USE_PRINTK_IN_CAR
497 comment "use printk instead of print in CAR stage code"
501 ###############################################
503 ###############################################
506 default "Mainboard_not_set"
508 comment "Mainboard name"
510 define MAINBOARD_PART_NUMBER
511 default "Part_number_not_set"
514 comment "Part number of mainboard"
516 define MAINBOARD_VENDOR
517 default "Vendor_not_set"
520 comment "Vendor of mainboard"
522 define MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
525 comment "PCI Vendor ID of mainboard manufacturer"
527 define MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
531 comment "PCI susbsystem device id assigned my mainboard manufacturer"
533 define MAINBOARD_POWER_ON_AFTER_POWER_FAIL
536 comment "Default power on after power fail setting"
538 define CONFIG_SYS_CLK_FREQ
541 comment "System clock frequency in MHz"
543 define CONFIG_MAX_PCI_BUSES
546 comment "Maximum number of PCI buses to search for devices"
548 ###############################################
550 ###############################################
555 comment "Define if we support SMP"
557 define CONFIG_MAX_CPUS
560 comment "Maximum CPU count for this machine"
562 define CONFIG_MAX_PHYSICAL_CPUS
565 comment "Maximum physical CPU count for this machine"
567 define CONFIG_LOGICAL_CPUS
570 comment "Should multiple cpus per die be enabled?"
575 comment "Define to build an MP table"
577 define SERIAL_CPU_INIT
580 comment "Serialize CPU init"
582 define APIC_ID_OFFSET
585 comment "We need to share this value between cache_as_ram_auto.c and northbridge.c"
587 define ENABLE_APIC_EXT_ID
590 comment "Enable APIC ext id mode 8 bit"
592 define LIFT_BSP_APIC_ID
595 comment "decide if we lift bsp apic id while ap apic id"
597 ###############################################
599 ###############################################
601 define CONFIG_IDE_PAYLOAD
604 comment "Boot from IDE device"
606 define CONFIG_ROM_PAYLOAD
609 comment "Boot image is located in ROM"
611 define CONFIG_ROM_PAYLOAD_START
612 default {0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1}
615 comment "ROM stream start location"
617 define CONFIG_COMPRESSED_PAYLOAD_NRV2B
620 comment "NRV2B compressed boot image is located in ROM"
622 define CONFIG_COMPRESSED_PAYLOAD_LZMA
625 comment "LZMA compressed boot image is located in ROM"
627 define CONFIG_PRECOMPRESSED_PAYLOAD
630 comment "boot image is already compressed"
632 define CONFIG_SERIAL_PAYLOAD
635 comment "Download boot image from serial port"
637 define CONFIG_FS_PAYLOAD
640 comment "Boot from a filesystem"
642 define CONFIG_FS_EXT2
645 comment "Enable ext2 filesystem support"
647 define CONFIG_FS_ISO9660
650 comment "Enable ISO9660 filesystem support"
655 comment "Enable FAT filesystem support"
657 define AUTOBOOT_DELAY
660 comment "Delay (in seconds) before autobooting"
662 define AUTOBOOT_CMDLINE
663 default "hdc1:/vmlinuz root=/dev/hdc3 console=tty0 console=ttyS0,115200"
666 comment "Default command line when autobooting"
669 define USE_WATCHDOG_ON_BOOT
672 comment "Use the watchdog on booting"
675 ###############################################
676 # Plugin Device support options
677 ###############################################
679 define CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT
682 comment "Enable support for plugin Hypertransport busses"
684 define CONFIG_AGP_PLUGIN_SUPPORT
687 comment "Enable support for plugin AGP busses"
689 define CONFIG_CARDBUS_PLUGIN_SUPPORT
692 comment "Enable support cardbus plugin cards"
694 define CONFIG_PCIX_PLUGIN_SUPPORT
697 comment "Enable support for plugin PCI-X busses"
699 define CONFIG_PCIEXP_PLUGIN_SUPPORT
702 comment "Enable support for plugin PCI-E busses"
705 ###############################################
707 ###############################################
709 define HAVE_PIRQ_TABLE
712 comment "Define if we have a PIRQ table"
714 define IRQ_SLOT_COUNT
717 comment "Number of IRQ slots"
719 define CONFIG_PCIBIOS_IRQ
722 comment "PCIBIOS IRQ support"
727 comment "IOAPIC support"
730 ###############################################
731 # IDE specific options
732 ###############################################
737 comment "Define to include IDE support"
739 define IDE_BOOT_DRIVE
742 comment "Disk number of boot drive"
747 comment "Swap bytes when reading from IDE device"
752 comment "Sector at which to start searching for boot image"
755 ###############################################
756 # Options for memory mapped I/O
757 ###############################################
759 define PCI_IO_CFG_EXT
762 comment "allow 4K register space via io CFG port"
769 comment "Address of PCI Configuration Address Register"
775 comment "Address of PCI Configuration Data Register"
781 comment "Base address of PCI/ISA I/O address range"
787 comment "Base address of PCI/ISA memory address range"
793 comment "PNP Configuration Address Register offset"
799 comment "PNP Configuration Data Register offset"
805 comment "Base address of memory mapped I/O operations"
808 ###############################################
809 # Options for embedded systems
810 ###############################################
812 define EMBEDDED_RAM_SIZE
815 comment "Embedded boards generally have fixed RAM size"
818 ###############################################
820 ###############################################
822 define CONFIG_CHIP_NAME
825 comment "Compile in the chip name"
828 define CONFIG_GDB_STUB
831 comment "Compile in gdb stub support?"
834 define HAVE_INIT_TIMER
837 comment "Have a init_timer function"
839 define HAVE_HARD_RESET
842 comment "Have hard reset"
847 comment "Set to deal with memory hole"
849 define MAX_REBOOT_CNT
852 comment "Set maximum reboots"
855 ###############################################
856 # Misc device options
857 ###############################################
859 define CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
862 comment "Use timer2 to callibrate the x86 time stamp counter"
864 define INTEL_PPRO_MTRR
869 define CONFIG_UDELAY_TSC
872 comment "Implement udelay with the x86 time stamp counter"
874 define CONFIG_UDELAY_IO
877 comment "Implement udelay with x86 io registers"
882 comment "Use this to fake spd rom values"
885 define HAVE_ACPI_TABLES
888 comment "Define to build ACPI tables"
891 define ACPI_SSDTX_NUM
894 comment "extra ssdt num for PCI Device"
897 define AGP_APERTURE_SIZE
901 comment "AGP graphics virtual memory aperture size"
904 define HT_CHAIN_UNITID_BASE
907 comment "this will be first hypertransport device's unitid base, if sb ht chain only has one ht device, it could be 0"
910 define HT_CHAIN_END_UNITID_BASE
913 comment "this will be unit id of the end of hypertransport chain (usually the real SB) if it is small than HT_CHAIN_UNITID_BASE, it could be 0"
916 define SB_HT_CHAIN_UNITID_OFFSET_ONLY
919 comment "this will decided if only offset SB hypertransport chain"
922 define SB_HT_CHAIN_ON_BUS0
925 comment "this will make SB hypertransport chain sit on bus 0, if it is 1, will put sb ht chain on bus 0, if it is 2 will put other chain on 0x40, 0x80, 0xc0"
928 define PCI_BUS_SEGN_BITS
931 comment "It could be 0, 1, 2, 3 and 4 only"
934 define MMCONF_SUPPORT
937 comment "enable mmconfig for pci conf"
940 define HW_MEM_HOLE_SIZEK
943 comment "Opteron E0 later memory hole size in K, 0 mean disable"
946 define HW_MEM_HOLE_SIZE_AUTO_INC
949 comment "Opteron E0 later memory hole size auto increase to avoid hole startk equal to basek"
952 define K8_HT_FREQ_1G_SUPPORT
955 comment "Optern E0 later could support 1G HT, but still depends MB design"
958 define K8_REV_F_SUPPORT
961 comment "Opteron Rev F (DDR2) support"
967 comment "Opteron cpu bus num base"
973 comment "Opteron cpu device num base"
980 comment "DIMM support: bit 0 - sdram, bit 1: ddr1, bit 2: ddr2, bit 3: ddr3, bit 4: fbdimm, bit 8: reg"
983 define CPU_SOCKET_TYPE
986 comment "cpu socket type, 0x10 mean Socket F, 0x11 mean socket M2, 0x20, Soxket G, and 0x21 mean socket M3"
992 comment "CPU hardware address lines num, for AMD K8 could be 40, and GH could be 48"
995 define CONFIG_PCI_ROM_RUN
998 comment "Init PCI device option rom"
1001 define CONFIG_PCI_64BIT_PREF_MEM
1004 comment "allow PCI device get 4G above Region as pref mem"
1010 comment "use AMD AGESA to init RAM instead of native code"
1013 define CONFIG_VIDEO_MB
1016 comment "Integrated graphics with UMA has dynamic setup"
1021 ###############################################
1022 # Board specific options
1023 ###############################################
1025 ###############################################
1026 # Options for motorola/sandpoint
1027 ###############################################
1028 define CONFIG_SANDPOINT_ALTIMUS
1031 comment "Configure Sandpoint with Altimus PMC"
1033 define CONFIG_SANDPOINT_TALUS
1036 comment "Configure Sandpoint with Talus PMC"
1038 define CONFIG_SANDPOINT_UNITY
1041 comment "Configure Sandpoint with Unity PMC"
1043 define CONFIG_SANDPOINT_VALIS
1046 comment "Configure Sandpoint with Valis PMC"
1048 define CONFIG_SANDPOINT_GYRUS
1051 comment "Configure Sandpoint with Gyrus PMC"
1054 ###############################################
1055 # Options for totalimpact/briq
1056 ###############################################
1057 define CONFIG_BRIQ_750FX
1060 comment "Configure briQ with PowerPC 750FX"
1062 define CONFIG_BRIQ_7400
1065 comment "Configure briQ with PowerPC G4"