1 #######################################################
3 # Main options file for LinuxBIOS
5 # Each option used by a part must be defined in
6 # this file. The format for options is:
9 # default <expr> | {<expr>} | "<string>" | none
11 # export always | used | never
17 # <name> is the name of the option
18 # <expr> is a numeric expression
19 # <string> is a string
21 # Either a default value or 'default none' must
22 # be specified for every option. An option
23 # specified as 'default none' will not be exported
24 # (i.e. will remain undefined) unless it has
25 # been assigned a value.
27 # Option values can be an immediate expression that
28 # evaluates to a numeric value, a delayed expression
29 # (surrounded by curley braces), or a string
30 # (surrounded by double quotes.)
32 # Immediate expressions are evaluated at the time an
33 # option is defined or set and the numeric result
34 # becomes the value of the option.
36 # Delayed expression are evaluated at the time the
37 # option is used, either in another expression or
38 # when being exported.
40 # String values will have the double quotes removed
43 # Format strings determine the print format that is
44 # used when exporting options. The default format
45 # is "%s" for strings and "%d" for numbers.
47 # Exported options generate entries in the
48 # Makefile.settings file. Options can be always
49 # exported, exported only if used, or never exported.
51 # A comment string must be supplied for every option.
53 #######################################################
55 ###############################################
56 # Architecture options
57 ###############################################
62 comment "Default architecture is i386, options are alpha and ppc"
87 comment "Do CPU fixups"
90 ###############################################
92 ###############################################
97 comment "Cross compiler prefix"
100 default "$(CROSS_COMPILE)gcc"
102 comment "Target C Compiler"
107 comment "Host C Compiler"
112 comment "Additional per-cpu CFLAGS"
115 default "$(CROSS_COMPILE)objcopy"
117 comment "Objcopy command"
119 define LINUXBIOS_VERSION
122 comment "LinuxBIOS version"
124 define LINUXBIOS_EXTRA_VERSION
127 comment "LinuxBIOS extra version"
129 define LINUXBIOS_BUILD
130 default "$(shell date)"
134 define LINUXBIOS_COMPILE_TIME
135 default "$(shell date +%T)"
139 define LINUXBIOS_COMPILE_BY
140 default "$(shell whoami)"
142 comment "Who build this image"
144 define LINUXBIOS_COMPILE_HOST
145 default "$(shell hostname)"
150 define LINUXBIOS_COMPILE_DOMAIN
151 default "$(shell dnsdomainname)"
153 comment "Build domain name"
155 define LINUXBIOS_COMPILER
156 default "$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -n 1)"
158 comment "Build compiler"
160 define LINUXBIOS_LINKER
161 default "$(shell $(CC) -Wl,-v 2>&1 | grep version | tail -n 1)"
163 comment "Build linker"
165 define LINUXBIOS_ASSEMBLER
166 default "$(shell touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o )"
168 comment "Build assembler"
170 define CONFIG_CHIP_CONFIGURE
173 comment "Use new chip_configure method for configuring (non-pci) devices"
175 define CONFIG_USE_INIT
178 comment "Use stage 1 initialization code"
181 ###############################################
183 ###############################################
185 define HAVE_FALLBACK_BOOT
189 comment "Set if fallback booting required"
191 define USE_FALLBACK_IMAGE
195 comment "Set to build a fallback image"
201 comment "Default fallback image size"
207 comment "Size of your ROM"
209 define ROM_IMAGE_SIZE
213 comment "Default image size"
215 define ROM_SECTION_SIZE
216 default {FALLBACK_SIZE}
219 comment "Default rom section size"
221 define ROM_SECTION_OFFSET
222 default {ROM_SIZE - FALLBACK_SIZE}
225 comment "Default rom section offset"
228 default {ROM_SECTION_SIZE - ROM_IMAGE_SIZE}
231 comment "Default payload size"
234 default {PAYLOAD_SIZE}
237 comment "Base address of LinuxBIOS in ROM"
243 comment "Start address of LinuxBIOS in ROM"
249 comment "Hardware reset vector address"
251 define _EXCEPTION_VECTORS
252 default {_ROMBASE+0x100}
255 comment "Address of exception vector table"
261 comment "Default stack size"
267 comment "Default heap size"
273 comment "Base address of LinuxBIOS in RAM"
279 comment "Start address of LinuxBIOS in RAM"
281 define USE_DCACHE_RAM
284 comment "Use data cache as temporary RAM if possible"
286 define DCACHE_RAM_BASE
290 comment "Base address of data cache when using it for temporary RAM"
292 define DCACHE_RAM_SIZE
296 comment "Size of data cache when using it for temporary RAM"
302 comment "Start address of area to cache during LinuxBIOS execution directly from ROM"
308 comment "Size of area to cache during LinuxBIOS execution directly from ROM"
310 define CONFIG_COMPRESS
313 comment "Set for compressed image"
315 define CONFIG_UNCOMPRESSED
317 default {!CONFIG_COMPRESS}
319 comment "Set for uncompressed image"
321 define CONFIG_LB_MEM_TOPK
325 comment "Kilobytes of memory to initialized before executing code from RAM"
327 define HAVE_OPTION_TABLE
330 comment "Export CMOS option table"
332 define USE_OPTION_TABLE
334 default {HAVE_OPTION_TABLE && !USE_FALLBACK_IMAGE}
336 comment "Use option table"
339 ###############################################
340 # CMOS variable options
341 ###############################################
342 define LB_CKS_RANGE_START
346 comment "First CMOS byte to use for LinuxBIOS options"
348 define LB_CKS_RANGE_END
352 comment "Last CMOS byte to use for LinuxBIOS options"
358 comment "Pair of bytes to use for CMOS checksum"
362 ###############################################
364 ###############################################
367 default "$(TOP)/src/arch/$(ARCH)/config/crt0.base"
369 comment "Main initialization target"
372 ###############################################
373 # Debugging/Logging options
374 ###############################################
379 comment "Enable debugging code"
381 define CONFIG_CONSOLE_VGA
384 comment "Log messages to VGA"
386 define CONFIG_CONSOLE_LOGBUF
389 comment "Log messages to buffer"
391 define CONFIG_CONSOLE_SROM
394 comment "Log messages to SROM console"
396 define CONFIG_CONSOLE_SERIAL8250
399 comment "Log messages to 8250 uart based serial console"
401 define DEFAULT_CONSOLE_LOGLEVEL
404 comment "Console will log at this level unless changed"
406 define MAXIMUM_CONSOLE_LOGLEVEL
409 comment "Error messages up to this level can be printed"
411 define CONFIG_SERIAL_POST
414 comment "Enable SERIAL POST codes"
419 comment "Disable POST codes"
425 comment "Base address for 8250 uart for the serial console"
430 comment "Default baud rate for serial console"
436 comment "Allow UART divisor to be set explicitly"
442 comment "Default flow control settings for the 8250 serial console uart"
445 ###############################################
447 ###############################################
450 default "Mainboard_not_set"
452 comment "Mainboard name"
454 define MAINBOARD_PART_NUMBER
455 default "Part_number_not_set"
457 comment "Part number of mainboard"
459 define MAINBOARD_VENDOR
460 default "Vendor_not_set"
462 comment "Vendor of mainboard"
464 define MAINBOARD_POWER_ON_AFTER_POWER_FAIL
467 comment "Default power on after power fail setting"
469 define CONFIG_SYS_CLK_FREQ
472 comment "System clock frequency in MHz"
474 define CONFIG_LEGACY_VGABIOS
477 comment "Support for legacy VGA BIOS"
480 ###############################################
482 ###############################################
487 comment "Define if we support SMP"
489 define CONFIG_MAX_CPUS
492 comment "Maximum CPU count for this machine"
494 define CONFIG_MAX_PHYSICAL_CPUS
495 default {CONFIG_MAX_CPUS}
497 comment "Physical CPU count for this machine"
499 define CONFIG_LOGICAL_CPUS
502 comment "Should multiple cpus per die be enabled?"
507 comment "Define to build an MP table"
510 ###############################################
512 ###############################################
514 define CONFIG_IDE_STREAM
517 comment "Boot from IDE device"
519 define CONFIG_ROM_STREAM
522 comment "Boot image is located in ROM"
524 define CONFIG_ROM_STREAM_START
525 default {0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1}
528 comment "ROM stream start location"
530 define CONFIG_FS_STREAM
533 comment "Boot from a filesystem"
535 define CONFIG_FS_EXT2
538 comment "Enable ext2 filesystem support"
540 define CONFIG_FS_ISO9660
543 comment "Enable ISO9660 filesystem support"
548 comment "Enable FAT filesystem support"
550 define AUTOBOOT_DELAY
553 comment "Delay (in seconds) before autobooting"
555 define AUTOBOOT_CMDLINE
556 default "hdc1:/vmlinuz root=/dev/hdc3 console=tty0 console=ttyS0,115200"
559 comment "Default command line when autobooting"
562 ###############################################
564 ###############################################
566 define HAVE_PIRQ_TABLE
569 comment "Define if we have a PIRQ table"
571 define IRQ_SLOT_COUNT
574 comment "Number of IRQ slots"
576 define CONFIG_PCIBIOS_IRQ
579 comment "PCIBIOS IRQ support"
584 comment "IOAPIC support"
587 ###############################################
588 # IDE specific options
589 ###############################################
594 comment "Define to include IDE support"
596 define IDE_BOOT_DRIVE
599 comment "Disk number of boot drive"
604 comment "Swap bytes when reading from IDE device"
609 comment "Sector at which to start searching for boot image"
612 ###############################################
613 # Options for memory mapped I/O
614 ###############################################
620 comment "Address of PCI Configuration Address Register"
626 comment "Address of PCI Configuration Data Register"
632 comment "Base address of PCI/ISA I/O address range"
638 comment "Base address of PCI/ISA memory address range"
644 comment "PNP Configuration Address Register offset"
650 comment "PNP Configuration Data Register offset"
656 comment "Base address of memory mapped I/O operations"
659 ###############################################
660 # Options for embedded systems
661 ###############################################
663 define EMBEDDED_RAM_SIZE
666 comment "Embedded boards generally have fixed RAM size"
669 ###############################################
671 ###############################################
673 define HAVE_HARD_RESET
676 comment "Have hard reset"
678 define HARD_RESET_BUS
681 comment "Bus number of southbridge device doing reset"
683 define HARD_RESET_DEVICE
686 comment "Device number of southbridge device doing reset"
688 define HARD_RESET_FUNCTION
691 comment "Function number of southbridge device doing reset"
696 comment "Set to deal with memory hole"
698 define MAX_REBOOT_CNT
701 comment "Set maximum reboots"
704 ###############################################
705 # Misc device options
706 ###############################################
708 define CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
711 comment "Use timer2 to callibrate the x86 time stamp counter"
713 define INTEL_PPRO_MTRR
718 define CONFIG_UDELAY_TSC
721 comment "Implement udelay with the x86 time stamp counter"
726 comment "Use this to fake spd rom values"
729 define HAVE_ACPI_TABLES
732 comment "Define to build ACPI tables"
735 define AGP_APERTURE_SIZE
738 comment "AGP graphics virtual memory aperture size"
741 ###############################################
742 # Board specific options
743 ###############################################
745 ###############################################
746 # Options for motorola/sandpoint
747 ###############################################
748 define CONFIG_SANDPOINT_ALTIMUS
751 comment "Configure Sandpoint with Altimus PMC"
753 define CONFIG_SANDPOINT_TALUS
756 comment "Configure Sandpoint with Talus PMC"
758 define CONFIG_SANDPOINT_UNITY
761 comment "Configure Sandpoint with Unity PMC"
763 define CONFIG_SANDPOINT_VALIS
766 comment "Configure Sandpoint with Valis PMC"
768 define CONFIG_SANDPOINT_GYRUS
771 comment "Configure Sandpoint with Gyrus PMC"
774 ###############################################
775 # Options for totalimpact/briq
776 ###############################################
777 define CONFIG_BRIQ_750FX
780 comment "Configure briQ with PowerPC 750FX"
782 define CONFIG_BRIQ_7400
785 comment "Configure briQ with PowerPC G4"