2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
5 use work.textmode_vga_component_pkg.all;
6 use work.textmode_vga_pkg.all;
7 use work.textmode_vga_platform_dependent_pkg.all;
8 use work.ps2_keyboard_controller_pkg.all;
13 CLK_50MHZ : in std_logic;
14 sys_res : in std_logic;
21 vsync_n : out std_logic;
22 hsync_n : out std_logic;
23 r : out std_logic_vector(RED_BITS - 1 downto 0);
24 g : out std_logic_vector(GREEN_BITS - 1 downto 0);
25 b : out std_logic_vector(BLUE_BITS - 1 downto 0);
27 ps2_clk : inout std_logic;
28 ps2_data : inout std_logic;
35 architecture top of calc is
37 signal sys_res_n : std_logic;
39 signal new_data : std_logic;
40 signal data : std_logic_vector(7 downto 0);
42 signal vga_clk, free : std_logic;
44 signal command : std_logic_vector(COMMAND_SIZE - 1 downto 0);
45 signal command_data : std_logic_vector(3 * COLOR_SIZE + CHAR_SIZE -1 downto 0);
47 signal d_new_eingabe, d_new_result, d_new_bs : std_logic;
48 signal d_zeile : hzeile;
49 signal d_spalte : hspalte;
50 signal d_get, d_done : std_logic;
51 signal d_char : hbyte;
53 signal s_char : hbyte;
54 signal s_take, s_done, s_backspace : std_logic;
56 signal p_rget : std_logic;
57 signal p_rdone : std_logic;
58 signal p_read : hbyte;
59 signal p_wtake : std_logic;
60 signal p_wdone : std_logic;
61 signal p_write : hbyte;
62 signal p_finished : std_logic;
64 signal do_it, finished : std_logic;
66 signal rx_new, rxd_sync : std_logic;
67 signal rx_data : std_logic_vector (7 downto 0);
68 signal tx_new, tx_done : std_logic;
69 signal tx_data : std_logic_vector (7 downto 0);
73 sys_res_n <= not sys_res;
76 textmode_vga_inst : entity work.textmode_vga(struct)
78 VGA_CLK_FREQ => 25000000,
79 BLINK_INTERVAL_MS => 500,
84 sys_res_n => sys_res_n,
86 command_data => command_data,
89 vga_res_n => sys_res_n,
98 clk_vga_s3e_inst : entity work.clk_vga_s3e(beh)
105 display_inst : entity work.display(beh)
107 sys_clk => CLK_50MHZ,
108 sys_res_n => sys_res_n,
110 d_new_eingabe => d_new_eingabe,
111 d_new_result => d_new_result,
112 d_new_bs => d_new_bs,
114 d_spalte => d_spalte,
120 command_data => command_data,
125 history_inst : entity work.history(beh)
127 sys_clk => CLK_50MHZ,
128 sys_res_n => sys_res_n,
133 s_backspace => s_backspace,
135 d_new_eingabe => d_new_eingabe,
136 d_new_result => d_new_result,
137 d_new_bs => d_new_bs,
139 d_spalte => d_spalte,
150 p_finished => p_finished
154 parser_inst : entity work.parser(beh)
156 sys_clk => CLK_50MHZ,
157 sys_res_n => sys_res_n,
165 p_finished => p_finished,
172 scanner_inst : entity work.scanner(beh)
174 sys_clk => CLK_50MHZ,
175 sys_res_n => sys_res_n,
177 new_data => new_data,
183 s_backspace => s_backspace,
186 finished => finished,
196 ps2_inst : entity work.ps2_keyboard_controller(beh)
198 CLK_FREQ => 50000000,
202 sys_clk => CLK_50MHZ,
203 sys_res_n => sys_res_n,
205 new_data => new_data,
211 -- synchronizer fuer rxd
212 sync_rxd_inst : entity work.sync(beh)
218 sys_clk => CLK_50MHZ,
219 sys_res_n => sys_res_n,
225 rs232rx_inst : entity work.uart_rx(beh)
227 CLK_FREQ => 50000000,
231 sys_clk => CLK_50MHZ,
232 sys_res_n => sys_res_n,
239 rs232tx_inst : entity work.uart_tx(beh)
241 CLK_FREQ => 50000000,
245 sys_clk => CLK_50MHZ,
246 sys_res_n => sys_res_n,
252 end architecture top;