2 This software and ancillary information (herein called SOFTWARE )
3 called LinuxBIOS is made available under the terms described
4 here. The SOFTWARE has been approved for release with associated
5 LA-CC Number 00-34 . Unless otherwise indicated, this SOFTWARE has
6 been authored by an employee or employees of the University of
7 California, operator of the Los Alamos National Laboratory under
8 Contract No. W-7405-ENG-36 with the U.S. Department of Energy. The
9 U.S. Government has rights to use, reproduce, and distribute this
10 SOFTWARE. The public may copy, distribute, prepare derivative works
11 and publicly display this SOFTWARE without charge, provided that this
12 Notice and any statement of authorship are reproduced on all copies.
13 Neither the Government nor the University makes any warranty, express
14 or implied, or assumes any liability or responsibility for the use of
15 this SOFTWARE. If SOFTWARE is modified to produce derivative works,
16 such modified SOFTWARE should be clearly marked, so as not to confuse
17 it with the version available from LANL.
19 /* Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL
25 * C Bootstrap code for the coreboot
28 #include <console/console.h>
30 #include <device/device.h>
31 #include <device/pci.h>
35 #include <boot/tables.h>
38 #if CONFIG_HAVE_ACPI_RESUME
39 #include <arch/acpi.h>
41 #if CONFIG_WRITE_HIGH_TABLES
44 #include <timestamp.h>
47 * @brief Main function of the RAM part of coreboot.
49 * Coreboot is divided into Pre-RAM part and RAM part.
52 * In the dev_enumerate() phase,
55 void hardwaremain(int boot_complete);
57 void hardwaremain(int boot_complete)
59 struct lb_memory *lb_mem;
62 timestamps[0] = rdtsc();
63 post_code(POST_ENTRY_RAMSTAGE);
65 /* console_init() MUST PRECEDE ALL printk()! */
68 post_code(POST_CONSOLE_READY);
70 printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n",
71 coreboot_version, coreboot_extra_version, coreboot_build,
72 (boot_complete)?"rebooting":"booting");
74 post_code(POST_CONSOLE_BOOT_MSG);
76 /* If we have already booted attempt a hard reboot */
81 /* FIXME: Is there a better way to handle this? */
84 timestamps[1] = rdtsc();
85 /* Find the devices we don't have hard coded knowledge about. */
87 post_code(POST_DEVICE_ENUMERATION_COMPLETE);
89 timestamps[2] = rdtsc();
90 /* Now compute and assign the bus resources. */
92 post_code(POST_DEVICE_CONFIGURATION_COMPLETE);
94 timestamps[3] = rdtsc();
95 /* Now actually enable devices on the bus */
98 timestamps[4] = rdtsc();
99 /* And of course initialize devices on the bus */
101 post_code(POST_DEVICES_ENABLED);
103 timestamps[5] = rdtsc();
104 #if CONFIG_WRITE_HIGH_TABLES == 1
106 #if CONFIG_CONSOLE_CBMEM
110 #if CONFIG_HAVE_ACPI_RESUME == 1
115 timestamp_add(TS_START_RAMSTAGE, timestamps[0]);
116 timestamp_add(TS_DEVICE_ENUMERATE, timestamps[1]);
117 timestamp_add(TS_DEVICE_CONFIGURE, timestamps[2]);
118 timestamp_add(TS_DEVICE_ENABLE, timestamps[3]);
119 timestamp_add(TS_DEVICE_INITIALIZE, timestamps[4]);
120 timestamp_add(TS_DEVICE_DONE, timestamps[5]);
121 timestamp_add_now(TS_WRITE_TABLES);
123 /* Now that we have collected all of our information
124 * write our configuration tables.
126 lb_mem = write_tables();
128 timestamp_add_now(TS_LOAD_PAYLOAD);
129 cbfs_load_payload(lb_mem, CONFIG_CBFS_PREFIX "/payload");
130 printk(BIOS_ERR, "Boot failed.\n");