4 #include "types.h" // u8
5 #include "config.h" // CONFIG_MAX_ATA_INTERFACES
16 extern struct ata_channel_s ATA_channels[CONFIG_MAX_ATA_INTERFACES];
17 int cdrom_read(struct disk_op_s *op);
18 int atapi_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize);
20 int process_ata_op(struct disk_op_s *op);
21 int process_atapi_op(struct disk_op_s *op);
23 // Global defines -- ATA register and register bits.
24 // command block & control block regs
25 #define ATA_CB_DATA 0 // data reg in/out pio_base_addr1+0
26 #define ATA_CB_ERR 1 // error in pio_base_addr1+1
27 #define ATA_CB_FR 1 // feature reg out pio_base_addr1+1
28 #define ATA_CB_SC 2 // sector count in/out pio_base_addr1+2
29 #define ATA_CB_SN 3 // sector number in/out pio_base_addr1+3
30 #define ATA_CB_CL 4 // cylinder low in/out pio_base_addr1+4
31 #define ATA_CB_CH 5 // cylinder high in/out pio_base_addr1+5
32 #define ATA_CB_DH 6 // device head in/out pio_base_addr1+6
33 #define ATA_CB_STAT 7 // primary status in pio_base_addr1+7
34 #define ATA_CB_CMD 7 // command out pio_base_addr1+7
36 #define ATA_CB_ASTAT 2 // alternate status in pio_base_addr2+2
37 #define ATA_CB_DC 2 // device control out pio_base_addr2+2
38 #define ATA_CB_DA 3 // device address in pio_base_addr2+3
40 #define ATA_CB_ER_ICRC 0x80 // ATA Ultra DMA bad CRC
41 #define ATA_CB_ER_BBK 0x80 // ATA bad block
42 #define ATA_CB_ER_UNC 0x40 // ATA uncorrected error
43 #define ATA_CB_ER_MC 0x20 // ATA media change
44 #define ATA_CB_ER_IDNF 0x10 // ATA id not found
45 #define ATA_CB_ER_MCR 0x08 // ATA media change request
46 #define ATA_CB_ER_ABRT 0x04 // ATA command aborted
47 #define ATA_CB_ER_NTK0 0x02 // ATA track 0 not found
48 #define ATA_CB_ER_NDAM 0x01 // ATA address mark not found
50 #define ATA_CB_ER_P_SNSKEY 0xf0 // ATAPI sense key (mask)
51 #define ATA_CB_ER_P_MCR 0x08 // ATAPI Media Change Request
52 #define ATA_CB_ER_P_ABRT 0x04 // ATAPI command abort
53 #define ATA_CB_ER_P_EOM 0x02 // ATAPI End of Media
54 #define ATA_CB_ER_P_ILI 0x01 // ATAPI Illegal Length Indication
56 // ATAPI Interrupt Reason bits in the Sector Count reg (CB_SC)
57 #define ATA_CB_SC_P_TAG 0xf8 // ATAPI tag (mask)
58 #define ATA_CB_SC_P_REL 0x04 // ATAPI release
59 #define ATA_CB_SC_P_IO 0x02 // ATAPI I/O
60 #define ATA_CB_SC_P_CD 0x01 // ATAPI C/D
62 // bits 7-4 of the device/head (CB_DH) reg
63 #define ATA_CB_DH_DEV0 0xa0 // select device 0
64 #define ATA_CB_DH_DEV1 0xb0 // select device 1
65 #define ATA_CB_DH_LBA 0x40 // use LBA
67 // status reg (CB_STAT and CB_ASTAT) bits
68 #define ATA_CB_STAT_BSY 0x80 // busy
69 #define ATA_CB_STAT_RDY 0x40 // ready
70 #define ATA_CB_STAT_DF 0x20 // device fault
71 #define ATA_CB_STAT_WFT 0x20 // write fault (old name)
72 #define ATA_CB_STAT_SKC 0x10 // seek complete
73 #define ATA_CB_STAT_SERV 0x10 // service
74 #define ATA_CB_STAT_DRQ 0x08 // data request
75 #define ATA_CB_STAT_CORR 0x04 // corrected
76 #define ATA_CB_STAT_IDX 0x02 // index
77 #define ATA_CB_STAT_ERR 0x01 // error (ATA)
78 #define ATA_CB_STAT_CHK 0x01 // check (ATAPI)
80 // device control reg (CB_DC) bits
81 #define ATA_CB_DC_HD15 0x08 // bit should always be set to one
82 #define ATA_CB_DC_SRST 0x04 // soft reset
83 #define ATA_CB_DC_NIEN 0x02 // disable interrupts
85 // Most mandtory and optional ATA commands (from ATA-3),
86 #define ATA_CMD_NOP 0x00
87 #define ATA_CMD_CFA_REQUEST_EXT_ERR_CODE 0x03
88 #define ATA_CMD_DEVICE_RESET 0x08
89 #define ATA_CMD_RECALIBRATE 0x10
90 #define ATA_CMD_READ_SECTORS 0x20
91 #define ATA_CMD_READ_SECTORS_EXT 0x24
92 #define ATA_CMD_READ_DMA_EXT 0x25
93 #define ATA_CMD_READ_DMA_QUEUED_EXT 0x26
94 #define ATA_CMD_READ_NATIVE_MAX_ADDRESS_EXT 0x27
95 #define ATA_CMD_READ_MULTIPLE_EXT 0x29
96 #define ATA_CMD_READ_LOG_EXT 0x2F
97 #define ATA_CMD_WRITE_SECTORS 0x30
98 #define ATA_CMD_WRITE_SECTORS_EXT 0x34
99 #define ATA_CMD_WRITE_DMA_EXT 0x35
100 #define ATA_CMD_WRITE_DMA_QUEUED_EXT 0x36
101 #define ATA_CMD_SET_MAX_ADDRESS_EXT 0x37
102 #define ATA_CMD_CFA_WRITE_SECTORS_WO_ERASE 0x38
103 #define ATA_CMD_WRITE_MULTIPLE_EXT 0x39
104 #define ATA_CMD_WRITE_VERIFY 0x3C
105 #define ATA_CMD_WRITE_LOG_EXT 0x3F
106 #define ATA_CMD_READ_VERIFY_SECTORS 0x40
107 #define ATA_CMD_READ_VERIFY_SECTORS_EXT 0x42
108 #define ATA_CMD_FORMAT_TRACK 0x50
109 #define ATA_CMD_SEEK 0x70
110 #define ATA_CMD_CFA_TRANSLATE_SECTOR 0x87
111 #define ATA_CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90
112 #define ATA_CMD_INITIALIZE_DEVICE_PARAMETERS 0x91
113 #define ATA_CMD_STANDBY_IMMEDIATE2 0x94
114 #define ATA_CMD_IDLE_IMMEDIATE2 0x95
115 #define ATA_CMD_STANDBY2 0x96
116 #define ATA_CMD_IDLE2 0x97
117 #define ATA_CMD_CHECK_POWER_MODE2 0x98
118 #define ATA_CMD_SLEEP2 0x99
119 #define ATA_CMD_PACKET 0xA0
120 #define ATA_CMD_IDENTIFY_PACKET_DEVICE 0xA1
121 #define ATA_CMD_CFA_ERASE_SECTORS 0xC0
122 #define ATA_CMD_READ_MULTIPLE 0xC4
123 #define ATA_CMD_WRITE_MULTIPLE 0xC5
124 #define ATA_CMD_SET_MULTIPLE_MODE 0xC6
125 #define ATA_CMD_READ_DMA_QUEUED 0xC7
126 #define ATA_CMD_READ_DMA 0xC8
127 #define ATA_CMD_WRITE_DMA 0xCA
128 #define ATA_CMD_WRITE_DMA_QUEUED 0xCC
129 #define ATA_CMD_CFA_WRITE_MULTIPLE_WO_ERASE 0xCD
130 #define ATA_CMD_STANDBY_IMMEDIATE 0xE0
131 #define ATA_CMD_IDLE_IMMEDIATE 0xE1
132 #define ATA_CMD_STANDBY 0xE2
133 #define ATA_CMD_IDLE 0xE3
134 #define ATA_CMD_READ_BUFFER 0xE4
135 #define ATA_CMD_CHECK_POWER_MODE 0xE5
136 #define ATA_CMD_SLEEP 0xE6
137 #define ATA_CMD_FLUSH_CACHE 0xE7
138 #define ATA_CMD_WRITE_BUFFER 0xE8
139 #define ATA_CMD_IDENTIFY_DEVICE 0xEC
140 #define ATA_CMD_SET_FEATURES 0xEF
141 #define ATA_CMD_READ_NATIVE_MAX_ADDRESS 0xF8
142 #define ATA_CMD_SET_MAX 0xF9