1 // Low level ATA disk access
3 // Copyright (C) 2008,2009 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
8 #include "types.h" // u8
9 #include "ioport.h" // inb
10 #include "util.h" // dprintf
11 #include "cmos.h" // inb_cmos
12 #include "pic.h" // enable_hwirq
13 #include "biosvar.h" // GET_EBDA
14 #include "pci.h" // foreachpci
15 #include "pci_ids.h" // PCI_CLASS_STORAGE_OTHER
16 #include "pci_regs.h" // PCI_INTERRUPT_LINE
17 #include "boot.h" // add_bcv_hd
18 #include "disk.h" // struct ata_s
19 #include "ata.h" // ATA_CB_STAT
20 #include "blockcmd.h" // CDB_CMD_READ_10
22 #define IDE_TIMEOUT 32000 //32 seconds max for IDE ops
25 /****************************************************************
27 ****************************************************************/
29 // Wait for the specified ide state
31 await_ide(u8 mask, u8 flags, u16 base, u16 timeout)
33 u64 end = calc_future_tsc(timeout);
35 u8 status = inb(base+ATA_CB_STAT);
36 if ((status & mask) == flags)
38 if (check_time(end)) {
46 // Wait for the device to be not-busy.
48 await_not_bsy(u16 base)
50 return await_ide(ATA_CB_STAT_BSY, 0, base, IDE_TIMEOUT);
53 // Wait for the device to be ready.
57 return await_ide(ATA_CB_STAT_RDY, ATA_CB_STAT_RDY, base, IDE_TIMEOUT);
60 // Wait for ide state - pauses for one ata cycle first.
62 pause_await_not_bsy(u16 iobase1, u16 iobase2)
64 // Wait one PIO transfer cycle.
65 inb(iobase2 + ATA_CB_ASTAT);
67 return await_not_bsy(iobase1);
70 // Wait for ide state - pause for 400ns first.
72 ndelay_await_not_bsy(u16 iobase1)
75 return await_not_bsy(iobase1);
80 ata_reset(struct atadrive_s *adrive_g)
82 struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
83 u8 slave = GET_GLOBAL(adrive_g->slave);
84 u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
85 u16 iobase2 = GET_GLOBALFLAT(chan_gf->iobase2);
87 dprintf(6, "ata_reset drive=%p\n", &adrive_g->drive);
89 outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN | ATA_CB_DC_SRST, iobase2+ATA_CB_DC);
91 outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN, iobase2+ATA_CB_DC);
94 // wait for device to become not busy.
95 int status = await_not_bsy(iobase1);
100 u64 end = calc_future_tsc(IDE_TIMEOUT);
102 outb(ATA_CB_DH_DEV1, iobase1 + ATA_CB_DH);
103 status = ndelay_await_not_bsy(iobase1);
106 if (inb(iobase1 + ATA_CB_DH) == ATA_CB_DH_DEV1)
108 // Change drive request failed to take effect - retry.
109 if (check_time(end)) {
115 // QEMU doesn't reset dh on reset, so set it explicitly.
116 outb(ATA_CB_DH_DEV0, iobase1 + ATA_CB_DH);
119 // On a user-reset request, wait for RDY if it is an ATA device.
120 u8 type=GET_GLOBAL(adrive_g->drive.type);
121 if (type == DTYPE_ATA)
122 status = await_rdy(iobase1);
126 outb(ATA_CB_DC_HD15, iobase2+ATA_CB_DC);
128 dprintf(6, "ata_reset exit status=%x\n", status);
131 // Check for drive RDY for 16bit interface command.
133 isready(struct atadrive_s *adrive_g)
135 // Read the status from controller
136 struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
137 u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
138 u8 status = inb(iobase1 + ATA_CB_STAT);
139 if ((status & (ATA_CB_STAT_BSY|ATA_CB_STAT_RDY)) == ATA_CB_STAT_RDY)
140 return DISK_RET_SUCCESS;
141 return DISK_RET_ENOTREADY;
144 // Default 16bit command demuxer for ATA and ATAPI devices.
146 process_ata_misc_op(struct disk_op_s *op)
151 struct atadrive_s *adrive_g = container_of(
152 op->drive_g, struct atadrive_s, drive);
153 switch (op->command) {
156 return DISK_RET_SUCCESS;
158 return isready(adrive_g);
162 return DISK_RET_SUCCESS;
165 return DISK_RET_EPARAM;
170 /****************************************************************
172 ****************************************************************/
174 struct ata_pio_command {
190 // Send an ata command to the drive.
192 send_cmd(struct atadrive_s *adrive_g, struct ata_pio_command *cmd)
194 struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
195 u8 slave = GET_GLOBAL(adrive_g->slave);
196 u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
199 int status = await_not_bsy(iobase1);
202 u8 newdh = ((cmd->device & ~ATA_CB_DH_DEV1)
203 | (slave ? ATA_CB_DH_DEV1 : ATA_CB_DH_DEV0));
204 u8 olddh = inb(iobase1 + ATA_CB_DH);
205 outb(newdh, iobase1 + ATA_CB_DH);
206 if ((olddh ^ newdh) & (1<<4)) {
207 // Was a device change - wait for device to become not busy.
208 status = ndelay_await_not_bsy(iobase1);
213 // Check for ATA_CMD_(READ|WRITE)_(SECTORS|DMA)_EXT commands.
214 if ((cmd->command & ~0x11) == ATA_CMD_READ_SECTORS_EXT) {
215 outb(cmd->feature2, iobase1 + ATA_CB_FR);
216 outb(cmd->sector_count2, iobase1 + ATA_CB_SC);
217 outb(cmd->lba_low2, iobase1 + ATA_CB_SN);
218 outb(cmd->lba_mid2, iobase1 + ATA_CB_CL);
219 outb(cmd->lba_high2, iobase1 + ATA_CB_CH);
221 outb(cmd->feature, iobase1 + ATA_CB_FR);
222 outb(cmd->sector_count, iobase1 + ATA_CB_SC);
223 outb(cmd->lba_low, iobase1 + ATA_CB_SN);
224 outb(cmd->lba_mid, iobase1 + ATA_CB_CL);
225 outb(cmd->lba_high, iobase1 + ATA_CB_CH);
226 outb(cmd->command, iobase1 + ATA_CB_CMD);
231 // Wait for data after calling 'send_cmd'.
233 ata_wait_data(u16 iobase1)
235 int status = ndelay_await_not_bsy(iobase1);
239 if (status & ATA_CB_STAT_ERR) {
240 dprintf(6, "send_cmd : read error (status=%02x err=%02x)\n"
241 , status, inb(iobase1 + ATA_CB_ERR));
244 if (!(status & ATA_CB_STAT_DRQ)) {
245 dprintf(6, "send_cmd : DRQ not set (status %02x)\n", status);
252 // Send an ata command that does not transfer any further data.
254 ata_cmd_nondata(struct atadrive_s *adrive_g, struct ata_pio_command *cmd)
256 struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
257 u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
258 u16 iobase2 = GET_GLOBALFLAT(chan_gf->iobase2);
260 // Disable interrupts
261 outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN, iobase2 + ATA_CB_DC);
263 int ret = send_cmd(adrive_g, cmd);
266 ret = ndelay_await_not_bsy(iobase1);
270 if (ret & ATA_CB_STAT_ERR) {
271 dprintf(6, "nondata cmd : read error (status=%02x err=%02x)\n"
272 , ret, inb(iobase1 + ATA_CB_ERR));
276 if (ret & ATA_CB_STAT_DRQ) {
277 dprintf(6, "nondata cmd : DRQ set (status %02x)\n", ret);
284 outb(ATA_CB_DC_HD15, iobase2+ATA_CB_DC);
290 /****************************************************************
292 ****************************************************************/
294 // Transfer 'op->count' blocks (of 'blocksize' bytes) to/from drive
297 ata_pio_transfer(struct disk_op_s *op, int iswrite, int blocksize)
299 dprintf(16, "ata_pio_transfer id=%p write=%d count=%d bs=%d buf=%p\n"
300 , op->drive_g, iswrite, op->count, blocksize, op->buf_fl);
302 struct atadrive_s *adrive_g = container_of(
303 op->drive_g, struct atadrive_s, drive);
304 struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
305 u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
306 u16 iobase2 = GET_GLOBALFLAT(chan_gf->iobase2);
307 int count = op->count;
308 void *buf_fl = op->buf_fl;
312 // Write data to controller
313 dprintf(16, "Write sector id=%p dest=%p\n", op->drive_g, buf_fl);
314 if (CONFIG_ATA_PIO32)
315 outsl_fl(iobase1, buf_fl, blocksize / 4);
317 outsw_fl(iobase1, buf_fl, blocksize / 2);
319 // Read data from controller
320 dprintf(16, "Read sector id=%p dest=%p\n", op->drive_g, buf_fl);
321 if (CONFIG_ATA_PIO32)
322 insl_fl(iobase1, buf_fl, blocksize / 4);
324 insw_fl(iobase1, buf_fl, blocksize / 2);
328 status = pause_await_not_bsy(iobase1, iobase2);
338 status &= (ATA_CB_STAT_BSY | ATA_CB_STAT_DRQ | ATA_CB_STAT_ERR);
339 if (status != ATA_CB_STAT_DRQ) {
340 dprintf(6, "ata_pio_transfer : more sectors left (status %02x)\n"
347 status &= (ATA_CB_STAT_BSY | ATA_CB_STAT_DF | ATA_CB_STAT_DRQ
350 status &= ~ATA_CB_STAT_DF;
352 dprintf(6, "ata_pio_transfer : no sectors left (status %02x)\n", status);
360 /****************************************************************
362 ****************************************************************/
365 #define BM_CMD_MEMWRITE 0x08
366 #define BM_CMD_START 0x01
368 #define BM_STATUS_IRQ 0x04
369 #define BM_STATUS_ERROR 0x02
370 #define BM_STATUS_ACTIVE 0x01
378 // Check if DMA available and setup transfer if so.
380 ata_try_dma(struct disk_op_s *op, int iswrite, int blocksize)
382 if (! CONFIG_ATA_DMA)
384 u32 dest = (u32)op->buf_fl;
386 // Need minimum alignment of 1.
388 struct atadrive_s *adrive_g = container_of(
389 op->drive_g, struct atadrive_s, drive);
390 struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
391 u16 iomaster = GET_GLOBALFLAT(chan_gf->iomaster);
394 u32 bytes = op->count * blocksize;
398 // Build PRD dma structure.
399 struct sff_dma_prd *dma = MAKE_FLATPTR(
401 , (void*)offsetof(struct extended_bios_data_area_s, extra_stack));
402 struct sff_dma_prd *origdma = dma;
404 if (dma >= &origdma[16])
405 // Too many descriptors..
408 u32 max = 0x10000 - (dest & 0xffff);
412 SET_FLATPTR(dma->buf_fl, dest);
417 dprintf(16, "dma@%p: %08x %08x\n", dma, dest, count);
419 SET_FLATPTR(dma->count, count);
423 // Program bus-master controller.
424 outl((u32)origdma, iomaster + BM_TABLE);
425 u8 oldcmd = inb(iomaster + BM_CMD) & ~(BM_CMD_MEMWRITE|BM_CMD_START);
426 outb(oldcmd | (iswrite ? 0x00 : BM_CMD_MEMWRITE), iomaster + BM_CMD);
427 outb(BM_STATUS_ERROR|BM_STATUS_IRQ, iomaster + BM_STATUS);
432 // Transfer data using DMA.
434 ata_dma_transfer(struct disk_op_s *op)
436 if (! CONFIG_ATA_DMA)
438 dprintf(16, "ata_dma_transfer id=%p buf=%p\n", op->drive_g, op->buf_fl);
440 struct atadrive_s *adrive_g = container_of(
441 op->drive_g, struct atadrive_s, drive);
442 struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
443 u16 iomaster = GET_GLOBALFLAT(chan_gf->iomaster);
445 // Start bus-master controller.
446 u8 oldcmd = inb(iomaster + BM_CMD);
447 outb(oldcmd | BM_CMD_START, iomaster + BM_CMD);
449 u64 end = calc_future_tsc(IDE_TIMEOUT);
452 status = inb(iomaster + BM_STATUS);
453 if (status & BM_STATUS_IRQ)
455 // Transfer in progress
456 if (check_time(end)) {
463 outb(oldcmd & ~BM_CMD_START, iomaster + BM_CMD);
465 u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
466 u16 iobase2 = GET_GLOBALFLAT(chan_gf->iobase2);
467 int idestatus = pause_await_not_bsy(iobase1, iobase2);
469 if ((status & (BM_STATUS_IRQ|BM_STATUS_ACTIVE)) == BM_STATUS_IRQ
471 && (idestatus & (ATA_CB_STAT_BSY | ATA_CB_STAT_DF | ATA_CB_STAT_DRQ
472 | ATA_CB_STAT_ERR)) == 0x00)
476 dprintf(6, "IDE DMA error (dma=%x ide=%x/%x/%x)\n", status, idestatus
477 , inb(iobase2 + ATA_CB_ASTAT), inb(iobase1 + ATA_CB_ERR));
483 /****************************************************************
484 * ATA hard drive functions
485 ****************************************************************/
487 // Transfer data to harddrive using PIO protocol.
489 ata_pio_cmd_data(struct disk_op_s *op, int iswrite, struct ata_pio_command *cmd)
491 struct atadrive_s *adrive_g = container_of(
492 op->drive_g, struct atadrive_s, drive);
493 struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
494 u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
495 u16 iobase2 = GET_GLOBALFLAT(chan_gf->iobase2);
497 // Disable interrupts
498 outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN, iobase2 + ATA_CB_DC);
500 int ret = send_cmd(adrive_g, cmd);
503 ret = ata_wait_data(iobase1);
506 ret = ata_pio_transfer(op, iswrite, DISK_SECTOR_SIZE);
510 outb(ATA_CB_DC_HD15, iobase2+ATA_CB_DC);
514 // Transfer data to harddrive using DMA protocol.
516 ata_dma_cmd_data(struct disk_op_s *op, struct ata_pio_command *cmd)
518 if (! CONFIG_ATA_DMA)
520 struct atadrive_s *adrive_g = container_of(
521 op->drive_g, struct atadrive_s, drive);
522 int ret = send_cmd(adrive_g, cmd);
525 return ata_dma_transfer(op);
528 // Read/write count blocks from a harddrive.
530 ata_readwrite(struct disk_op_s *op, int iswrite)
534 int usepio = ata_try_dma(op, iswrite, DISK_SECTOR_SIZE);
536 struct ata_pio_command cmd;
537 memset(&cmd, 0, sizeof(cmd));
539 if (op->count >= (1<<8) || lba + op->count >= (1<<28)) {
540 cmd.sector_count2 = op->count >> 8;
541 cmd.lba_low2 = lba >> 24;
542 cmd.lba_mid2 = lba >> 32;
543 cmd.lba_high2 = lba >> 40;
547 cmd.command = (iswrite ? ATA_CMD_WRITE_SECTORS_EXT
548 : ATA_CMD_READ_SECTORS_EXT);
550 cmd.command = (iswrite ? ATA_CMD_WRITE_DMA_EXT
551 : ATA_CMD_READ_DMA_EXT);
554 cmd.command = (iswrite ? ATA_CMD_WRITE_SECTORS
555 : ATA_CMD_READ_SECTORS);
557 cmd.command = (iswrite ? ATA_CMD_WRITE_DMA
561 cmd.sector_count = op->count;
563 cmd.lba_mid = lba >> 8;
564 cmd.lba_high = lba >> 16;
565 cmd.device = ((lba >> 24) & 0xf) | ATA_CB_DH_LBA;
569 ret = ata_pio_cmd_data(op, iswrite, &cmd);
571 ret = ata_dma_cmd_data(op, &cmd);
573 return DISK_RET_EBADTRACK;
574 return DISK_RET_SUCCESS;
577 // 16bit command demuxer for ATA harddrives.
579 process_ata_op(struct disk_op_s *op)
584 switch (op->command) {
586 return ata_readwrite(op, 0);
588 return ata_readwrite(op, 1);
590 return process_ata_misc_op(op);
595 /****************************************************************
597 ****************************************************************/
599 #define CDROM_CDB_SIZE 12
601 // Low-level atapi command transmit function.
603 atapi_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize)
605 struct atadrive_s *adrive_g = container_of(
606 op->drive_g, struct atadrive_s, drive);
607 struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
608 u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
609 u16 iobase2 = GET_GLOBALFLAT(chan_gf->iobase2);
611 struct ata_pio_command cmd;
612 memset(&cmd, 0, sizeof(cmd));
613 cmd.lba_mid = blocksize;
614 cmd.lba_high = blocksize >> 8;
615 cmd.command = ATA_CMD_PACKET;
617 // Disable interrupts
618 outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN, iobase2 + ATA_CB_DC);
620 int ret = send_cmd(adrive_g, &cmd);
623 ret = ata_wait_data(iobase1);
627 // Send command to device
628 outsw_fl(iobase1, MAKE_FLATPTR(GET_SEG(SS), cdbcmd), CDROM_CDB_SIZE / 2);
630 int status = pause_await_not_bsy(iobase1, iobase2);
636 if (status & ATA_CB_STAT_ERR) {
637 u8 err = inb(iobase1 + ATA_CB_ERR);
640 dprintf(6, "send_atapi_cmd : read error (status=%02x err=%02x)\n"
645 if (!(status & ATA_CB_STAT_DRQ)) {
646 dprintf(6, "send_atapi_cmd : DRQ not set (status %02x)\n", status);
651 ret = ata_pio_transfer(op, 0, blocksize);
655 outb(ATA_CB_DC_HD15, iobase2+ATA_CB_DC);
657 return DISK_RET_EBADTRACK;
658 return DISK_RET_SUCCESS;
661 // 16bit command demuxer for ATAPI cdroms.
663 process_atapi_op(struct disk_op_s *op)
665 switch (op->command) {
670 return DISK_RET_EWRITEPROTECT;
672 return process_ata_misc_op(op);
677 /****************************************************************
678 * ATA detect and init
679 ****************************************************************/
681 // Send an identify device or identify device packet command.
683 send_ata_identity(struct atadrive_s *adrive_g, u16 *buffer, int command)
685 memset(buffer, 0, DISK_SECTOR_SIZE);
687 struct disk_op_s dop;
688 memset(&dop, 0, sizeof(dop));
689 dop.drive_g = &adrive_g->drive;
692 dop.buf_fl = MAKE_FLATPTR(GET_SEG(SS), buffer);
694 struct ata_pio_command cmd;
695 memset(&cmd, 0, sizeof(cmd));
696 cmd.command = command;
698 return ata_pio_cmd_data(&dop, 0, &cmd);
701 // Extract the ATA/ATAPI version info.
703 extract_version(u16 *buffer)
705 // Extract ATA/ATAPI version.
706 u16 ataversion = buffer[80];
708 for (version=15; version>0; version--)
709 if (ataversion & (1<<version))
716 // Extract the ATA/ATAPI model info.
718 extract_model(char *model, u16 *buffer)
722 for (i=0; i<MAXMODEL/2; i++)
723 *(u16*)&model[i*2] = ntohs(buffer[27+i]);
724 model[MAXMODEL] = 0x00;
726 // Trim trailing spaces from model name.
727 for (i=MAXMODEL-1; i>0 && model[i] == 0x20; i--)
733 // Common init code between ata and atapi
734 static struct atadrive_s *
735 init_atadrive(struct atadrive_s *dummy, u16 *buffer)
737 char *desc = malloc_tmp(MAXDESCSIZE);
738 struct atadrive_s *adrive_g = malloc_fseg(sizeof(*adrive_g));
739 if (!adrive_g || !desc) {
745 memset(adrive_g, 0, sizeof(*adrive_g));
746 adrive_g->drive.desc = desc;
747 adrive_g->chan_gf = dummy->chan_gf;
748 adrive_g->slave = dummy->slave;
749 adrive_g->drive.cntl_id = adrive_g->chan_gf->chanid * 2 + dummy->slave;
750 adrive_g->drive.removable = (buffer[0] & 0x80) ? 1 : 0;
754 // Detect if the given drive is an atapi - initialize it if so.
755 static struct atadrive_s *
756 init_drive_atapi(struct atadrive_s *dummy, u16 *buffer)
758 // Send an IDENTIFY_DEVICE_PACKET command to device
759 int ret = send_ata_identity(dummy, buffer, ATA_CMD_IDENTIFY_PACKET_DEVICE);
763 // Success - setup as ATAPI.
764 struct atadrive_s *adrive_g = init_atadrive(dummy, buffer);
767 adrive_g->drive.type = DTYPE_ATAPI;
768 adrive_g->drive.blksize = CDROM_SECTOR_SIZE;
769 adrive_g->drive.sectors = (u64)-1;
770 u8 iscd = ((buffer[0] >> 8) & 0x1f) == 0x05;
771 char model[MAXMODEL+1];
772 snprintf(adrive_g->drive.desc, MAXDESCSIZE, "ata%d-%d: %s ATAPI-%d %s"
773 , adrive_g->chan_gf->chanid, adrive_g->slave
774 , extract_model(model, buffer), extract_version(buffer)
775 , (iscd ? "CD-Rom/DVD-Rom" : "Device"));
776 dprintf(1, "%s\n", adrive_g->drive.desc);
780 map_cd_drive(&adrive_g->drive);
785 // Detect if the given drive is a regular ata drive - initialize it if so.
786 static struct atadrive_s *
787 init_drive_ata(struct atadrive_s *dummy, u16 *buffer)
789 // Send an IDENTIFY_DEVICE command to device
790 int ret = send_ata_identity(dummy, buffer, ATA_CMD_IDENTIFY_DEVICE);
794 // Success - setup as ATA.
795 struct atadrive_s *adrive_g = init_atadrive(dummy, buffer);
798 adrive_g->drive.type = DTYPE_ATA;
799 adrive_g->drive.blksize = DISK_SECTOR_SIZE;
801 adrive_g->drive.pchs.cylinders = buffer[1];
802 adrive_g->drive.pchs.heads = buffer[3];
803 adrive_g->drive.pchs.spt = buffer[6];
806 if (buffer[83] & (1 << 10)) // word 83 - lba48 support
807 sectors = *(u64*)&buffer[100]; // word 100-103
809 sectors = *(u32*)&buffer[60]; // word 60 and word 61
810 adrive_g->drive.sectors = sectors;
811 u64 adjsize = sectors >> 11;
812 char adjprefix = 'M';
813 if (adjsize >= (1 << 16)) {
817 char model[MAXMODEL+1];
818 snprintf(adrive_g->drive.desc, MAXDESCSIZE
819 , "ata%d-%d: %s ATA-%d Hard-Disk (%u %ciBytes)"
820 , adrive_g->chan_gf->chanid, adrive_g->slave
821 , extract_model(model, buffer), extract_version(buffer)
822 , (u32)adjsize, adjprefix);
823 dprintf(1, "%s\n", adrive_g->drive.desc);
825 // Setup disk geometry translation.
826 setup_translation(&adrive_g->drive);
828 // Register with bcv system.
829 add_bcv_internal(&adrive_g->drive);
834 static u64 SpinupEnd;
836 // Wait for non-busy status and check for "floating bus" condition.
838 powerup_await_non_bsy(u16 base)
843 status = inb(base+ATA_CB_STAT);
844 if (!(status & ATA_CB_STAT_BSY))
847 if (orstatus == 0xff) {
848 dprintf(4, "powerup IDE floating\n");
851 if (check_time(SpinupEnd)) {
857 dprintf(6, "powerup iobase=%x st=%x\n", base, status);
861 // Detect any drives attached to a given controller.
863 ata_detect(void *data)
865 struct ata_channel_s *chan_gf = data;
866 struct atadrive_s dummy;
867 memset(&dummy, 0, sizeof(dummy));
868 dummy.chan_gf = chan_gf;
872 for (slave=0; slave<=1; slave++) {
874 u16 iobase1 = chan_gf->iobase1;
875 int status = powerup_await_non_bsy(iobase1);
878 u8 newdh = slave ? ATA_CB_DH_DEV1 : ATA_CB_DH_DEV0;
879 outb(newdh, iobase1+ATA_CB_DH);
881 status = powerup_await_non_bsy(iobase1);
885 // Check if ioport registers look valid.
886 outb(newdh, iobase1+ATA_CB_DH);
887 u8 dh = inb(iobase1+ATA_CB_DH);
888 outb(0x55, iobase1+ATA_CB_SC);
889 outb(0xaa, iobase1+ATA_CB_SN);
890 u8 sc = inb(iobase1+ATA_CB_SC);
891 u8 sn = inb(iobase1+ATA_CB_SN);
892 dprintf(6, "ata_detect ata%d-%d: sc=%x sn=%x dh=%x\n"
893 , chan_gf->chanid, slave, sc, sn, dh);
894 if (sc != 0x55 || sn != 0xaa || dh != newdh)
897 // Prepare new drive.
908 struct atadrive_s *adrive_g = init_drive_atapi(&dummy, buffer);
910 // Didn't find an ATAPI drive - look for ATA drive.
911 u8 st = inb(iobase1+ATA_CB_STAT);
913 // Status not set - can't be a valid drive.
917 int ret = await_rdy(iobase1);
922 adrive_g = init_drive_ata(&dummy, buffer);
924 // No ATA drive found
928 u16 resetresult = buffer[93];
929 dprintf(6, "ata_detect resetresult=%04x\n", resetresult);
930 if (!slave && (resetresult & 0xdf61) == 0x4041)
931 // resetresult looks valid and device 0 is responding to
932 // device 1 requests - device 1 must not be present - skip
938 // Initialize an ata controller and detect its drives.
940 init_controller(int chanid, int bdf, int irq, u32 port1, u32 port2, u32 master)
942 struct ata_channel_s *chan_gf = malloc_fseg(sizeof(*chan_gf));
947 chan_gf->chanid = chanid;
949 chan_gf->pci_bdf = bdf;
950 chan_gf->iobase1 = port1;
951 chan_gf->iobase2 = port2;
952 chan_gf->iomaster = master;
953 dprintf(1, "ATA controller %d at %x/%x/%x (irq %d dev %x)\n"
954 , chanid, port1, port2, master, irq, bdf);
955 run_thread(ata_detect, chan_gf);
961 // Locate and init ata controllers.
965 // Scan PCI bus for ATA adapters
966 int count=0, pcicount=0;
968 foreachpci(bdf, max) {
970 if (pci_config_readw(bdf, PCI_CLASS_DEVICE) != PCI_CLASS_STORAGE_IDE)
973 u8 pciirq = pci_config_readb(bdf, PCI_INTERRUPT_LINE);
974 u8 prog_if = pci_config_readb(bdf, PCI_CLASS_PROG);
976 if (CONFIG_ATA_DMA && prog_if & 0x80) {
977 // Check for bus-mastering.
978 u32 bar = pci_config_readl(bdf, PCI_BASE_ADDRESS_4);
979 if (bar & PCI_BASE_ADDRESS_SPACE_IO) {
980 master = bar & PCI_BASE_ADDRESS_IO_MASK;
981 pci_config_maskw(bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
985 u32 port1, port2, irq;
987 port1 = pci_config_readl(bdf, PCI_BASE_ADDRESS_0) & ~3;
988 port2 = pci_config_readl(bdf, PCI_BASE_ADDRESS_1) & ~3;
991 port1 = PORT_ATA1_CMD_BASE;
992 port2 = PORT_ATA1_CTRL_BASE;
995 init_controller(count, bdf, irq, port1, port2, master);
999 port1 = pci_config_readl(bdf, PCI_BASE_ADDRESS_2) & ~3;
1000 port2 = pci_config_readl(bdf, PCI_BASE_ADDRESS_3) & ~3;
1003 port1 = PORT_ATA2_CMD_BASE;
1004 port2 = PORT_ATA2_CTRL_BASE;
1007 init_controller(count, bdf, irq, port1, port2, master ? master + 8 : 0);
1011 if (!CONFIG_COREBOOT && !pcicount) {
1012 // No PCI devices found - probably a QEMU "-M isapc" machine.
1013 // Try using ISA ports for ATA controllers.
1014 init_controller(0, -1, IRQ_ATA1
1015 , PORT_ATA1_CMD_BASE, PORT_ATA1_CTRL_BASE, 0);
1016 init_controller(1, -1, IRQ_ATA2
1017 , PORT_ATA2_CMD_BASE, PORT_ATA2_CTRL_BASE, 0);
1028 dprintf(3, "init hard drives\n");
1030 SpinupEnd = calc_future_tsc(IDE_TIMEOUT);
1033 SET_BDA(disk_control_byte, 0xc0);
1035 enable_hwirq(14, entry_76);