1 #include <console/console.h>
3 #include <arch/pciconf.h>
4 #include <device/pci.h>
5 #include <device/pci_ids.h>
6 #include <device/pci_ops.h>
9 * Functions for accessing PCI configuration space with mmconf accesses
12 #define PCI_MMIO_ADDR(SEGBUS, DEVFN, WHERE) \
13 (CONFIG_MMCONF_BASE_ADDRESS |\
14 (((SEGBUS) & 0xFFF) << 20) |\
15 (((DEVFN) & 0xFF) << 12) |\
18 #include <arch/mmio_conf.h>
20 static uint8_t pci_mmconf_read_config8(struct bus *pbus, int bus, int devfn,
23 return (read8x(PCI_MMIO_ADDR(bus, devfn, where)));
26 static uint16_t pci_mmconf_read_config16(struct bus *pbus, int bus, int devfn,
29 return (read16x(PCI_MMIO_ADDR(bus, devfn, where) & ~1));
32 static uint32_t pci_mmconf_read_config32(struct bus *pbus, int bus, int devfn,
35 return (read32x(PCI_MMIO_ADDR(bus, devfn, where) & ~3));
38 static void pci_mmconf_write_config8(struct bus *pbus, int bus, int devfn,
39 int where, uint8_t value)
41 write8x(PCI_MMIO_ADDR(bus, devfn, where), value);
44 static void pci_mmconf_write_config16(struct bus *pbus, int bus, int devfn,
45 int where, uint16_t value)
47 write16x(PCI_MMIO_ADDR(bus, devfn, where) & ~1, value);
50 static void pci_mmconf_write_config32(struct bus *pbus, int bus, int devfn,
51 int where, uint32_t value)
53 write32x(PCI_MMIO_ADDR(bus, devfn, where) & ~3, value);
56 const struct pci_bus_operations pci_ops_mmconf = {
57 .read8 = pci_mmconf_read_config8,
58 .read16 = pci_mmconf_read_config16,
59 .read32 = pci_mmconf_read_config32,
60 .write8 = pci_mmconf_write_config8,
61 .write16 = pci_mmconf_write_config16,
62 .write32 = pci_mmconf_write_config32,