2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2009-2010 coresystems GmbH
5 ## Copyright (C) 2009 Ronald G. Minnich
7 ## This program is free software; you can redistribute it and/or modify
8 ## it under the terms of the GNU General Public License as published by
9 ## the Free Software Foundation; version 2 of the License.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #######################################################################
22 # Take care of subdirectories
29 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
30 cbfs-files-y += cmos_layout.bin
31 cmos_layout.bin-file = $(obj)/cmos_layout.bin
32 cmos_layout.bin-type = 0x01aa
34 OPTION_TABLE_H:=$(obj)/option_table.h
37 #######################################################################
38 # Build the final rom image
39 COREBOOT_ROM_DEPENDENCIES:=
40 ifeq ($(CONFIG_PAYLOAD_ELF),y)
41 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE)
43 ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
44 COREBOOT_ROM_DEPENDENCIES+=seabios
46 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
47 COREBOOT_ROM_DEPENDENCIES+=$(obj)/coreboot_ap
49 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
50 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_VSA_FILENAME)
53 extract_nth=$(word $(1), $(subst |, ,$(2)))
55 ifneq ($(CONFIG_UPDATE_IMAGE),y)
57 $(foreach file,$(cbfs-files), \
58 $(CBFSTOOL) $@ add $(call extract_nth,1,$(file)) $(call extract_nth,2,$(file)) $(call extract_nth,3,$(file)) $(call extract_nth,4,$(file)); )
59 prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
61 $(obj)/coreboot.pre1: $(obj)/coreboot.bootblock $$(prebuilt-files) $(CBFSTOOL)
63 $(CBFSTOOL) $@ create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(obj)/coreboot.bootblock
66 $(obj)/coreboot.pre1: $(CBFSTOOL)
67 mv $(obj)/coreboot.rom $@
70 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES))
71 @printf " CBFS $(subst $(obj)/,,$(@))\n"
72 cp $(obj)/coreboot.pre $@.tmp
73 if [ -f $(obj)/coreboot_ap ]; \
75 $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ap $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \
77 $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
78 ifeq ($(CONFIG_PAYLOAD_NONE),y)
79 @printf " PAYLOAD \e[1;31mnone (as specified by user)\e[0m\n"
81 ifeq ($(CONFIG_PAYLOAD_ELF),y)
82 @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
83 $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
85 ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
86 @printf " PAYLOAD SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
87 $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
89 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
90 @printf " VSA $(CONFIG_VSA_FILENAME)\n"
91 $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(CONFIG_VSA_FILENAME) $(obj)/vsa.o
92 $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(obj)/vsa.o -o $(obj)/vsa.elf
93 $(CBFSTOOL) $@.tmp add-stage $(obj)/vsa.elf vsa
96 @printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n"
99 stripped_vgabios_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_ID))
100 cbfs-files-$(CONFIG_VGA_BIOS) += pci$(stripped_vgabios_id).rom
101 pci$(stripped_vgabios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))
102 pci$(stripped_vgabios_id).rom-type := optionrom
104 cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin
105 mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE))
108 cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg
109 bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
110 bootsplash.jpg-type := bootsplash
112 #######################################################################
113 # i386 specific tools
115 $(OPTION_TABLE_H): $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
116 @printf " OPTION $(subst $(obj)/,,$(@))\n"
117 $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $@
119 $(obj)/cmos_layout.bin: $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
120 @printf " OPTION $(subst $(obj)/,,$(@))\n"
121 $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --binary $@
123 $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h
124 @printf " HOSTCC $(subst $(obj)/,,$(@))\n"
125 $(HOSTCC) $(HOSTCFLAGS) $< -o $@
127 #######################################################################
128 # Build the coreboot_ram (stage 2)
130 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldoptions
131 @printf " CC $(subst $(obj)/,,$(@))\n"
132 $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o
133 $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
134 $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ram.debug
135 $(OBJCOPY) --strip-debug $@
136 $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ram.debug $@
138 $(obj)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
139 @printf " CC $(subst $(obj)/,,$(@))\n"
140 $(CC) -nostdlib -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
142 $(obj)/coreboot.a: $$(ramstage-objs)
143 @printf " AR $(subst $(obj)/,,$(@))\n"
144 rm -f $(obj)/coreboot.a
145 $(AR) cr $(obj)/coreboot.a $^
147 #######################################################################
150 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
152 $(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
153 @printf " CC $(subst $(obj)/,,$(@))\n"
154 $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $^
155 $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ap.debug
156 $(OBJCOPY) --strip-debug $@
157 $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ap.debug $@
158 $(NM) -n $(obj)/coreboot_ap | sort > $(obj)/coreboot_ap.map
163 #######################################################################
166 crt0s = $(src)/arch/x86/init/prologue.inc
168 ldscripts += $(src)/arch/x86/init/ldscript_fallback_cbfs.lb
169 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
170 crt0s += $(src)/cpu/x86/16bit/entry16.inc
171 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
173 crt0s += $(src)/cpu/x86/32bit/entry32.inc
174 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
175 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
176 crt0s += $(src)/cpu/x86/16bit/reset16.inc
177 ldscripts += $(src)/cpu/x86/16bit/reset16.lds
178 crt0s += $(src)/arch/x86/lib/id.inc
179 ldscripts += $(src)/arch/x86/lib/id.lds
182 crt0s += $(src)/cpu/x86/fpu_enable.inc
183 ifeq ($(CONFIG_SSE),y)
184 crt0s += $(src)/cpu/x86/sse_enable.inc
190 # FIXME move to CPU_INTEL_SOCKET_MPGA604
192 ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
193 crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
196 ifeq ($(CONFIG_LLSHELL),y)
197 crt0s += $(src)/arch/x86/llshell/llshell.inc
200 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
202 ifeq ($(CONFIG_SSE),y)
203 crt0s += $(src)/cpu/x86/sse_disable.inc
205 ifeq ($(CONFIG_MMX),y)
206 crt0s += $(src)/cpu/x86/mmx_disable.inc
209 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
210 crt0s += $(chipset_bootblock_inc)
211 ldscripts += $(chipset_bootblock_lds)
214 ifeq ($(CONFIG_ROMCC),y)
215 crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
218 ifeq ($(CONFIG_ROMCC),y)
219 ROMCCFLAGS ?= -mcpu=p2 -O2
221 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
222 printf " ROMCC romstage.inc\n"
223 $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@
226 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
227 @printf " CC $(subst $(obj)/,,$(@))\n"
228 $(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@
230 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
231 @printf " CC romstage.inc\n"
232 $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
234 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
235 @printf " POST romstage.inc\n"
236 sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' $^ > $@.tmp
240 # Things that appear in every board
241 romstage-srcs += $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
242 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
243 ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
244 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c
246 ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
247 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
249 ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
250 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
252 ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
253 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
254 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl
255 # make doesn't have arithmetic operators or greater-than comparisons
256 ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4)
257 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl
258 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl
259 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl
261 ifeq ($(CONFIG_ACPI_SSDTX_NUM),5)
262 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl
264 ifeq ($(CONFIG_BOARD_HAS_FADT),y)
265 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
269 ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
270 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
273 ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
274 include $(src)/arch/x86/Makefile.bootblock.inc
276 include $(src)/arch/x86/Makefile.bigbootblock.inc
280 $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \
282 CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
283 OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
284 CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \
285 CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE)