2 /* Copyright 2000 AG Electronics Ltd. */
3 /* This code is distributed without warranty under the GPL v2 (see COPYING) */
8 unsigned __getmsr(void)
11 __asm__ volatile ("mfmsr %0" : "=r" (result));
15 unsigned __gethid0(void)
18 __asm__ volatile ("mfspr %0,1008" : "=r" (result));
22 unsigned __gethid1(void)
25 __asm__ volatile ("mfspr %0,1009" : "=r" (result));
29 void __sethid0(unsigned value)
31 __asm__ volatile ("mtspr 1008,%0" : : "r" (value));
34 unsigned __getpvr(void)
37 __asm__("mfspr %0, 287" : "=r" (result));
41 void __setmsr(unsigned value)
43 __asm__ volatile ("mtmsr %0; sync" :: "r" (value));
46 void __set1015(unsigned value)
48 __asm__ volatile ("mtspr 1015,%0" : : "r" (value));
51 extern void _init_float_registers(const double *);
52 /*RODATA static const double dummy_float = 1.0;*/
53 static const double dummy_float = 1.0;
55 #define HID0_DCACHE HID0_DCE
56 #define MSR_DATA MSR_DR
58 void ppc_setup_cpu(int icache)
60 int type = __getpvr() >> 16;
61 int version = __getpvr() & 0xffff;
65 if (version == 0x0200)
66 __set1015(0x19000004);
67 else if (((version & 0xff00) == 0x0200) &&
69 __set1015(0x01000000);
73 __sethid0(HID0_NHR | HID0_BHT | HID0_ICE | HID0_ICFI | HID0_BTIC
75 __sethid0(HID0_DPM | HID0_NHR | HID0_BHT | HID0_ICE | HID0_BTIC
80 __sethid0(HID0_DPM | HID0_NHR | HID0_BHT | HID0_BTIC | HID0_DCACHE);
83 /* if (type == 8 || type == 12) */
85 __setmsr(MSR_FP | MSR_DATA);
86 _init_float_registers(&dummy_float);
91 void ppc_enable_dcache(void)
94 * Already enabled in crt0.S
97 unsigned hid0 = __gethid0();
98 __sethid0(hid0 | HID0_DCFI | HID0_DCE);
99 __sethid0(hid0 | HID0_DCE);
103 void ppc_disable_dcache(void)
105 unsigned hid0 = __gethid0();
106 __sethid0(hid0 & ~HID0_DCE);
109 void ppc_enable_mmu(void)
111 unsigned msr = __getmsr();
112 __setmsr(msr | MSR_DR | MSR_IR);
115 void make_coherent(void *base, unsigned length)
117 unsigned hid0 = __gethid0();
122 unsigned offset = 0x1f & (unsigned) base;
123 unsigned adjusted_base = (unsigned) base & ~0x1f;
124 for(i = 0; i < length + offset; i+= 32)
125 __asm__ volatile ("dcbf %1,%0" : : "r" (adjusted_base), "r" (i));
127 for(i = 0; i < length + offset; i+= 32)
128 __asm__ volatile ("icbi %1,%0" : : "r" (adjusted_base), "r" (i));