ce76fb8197bf1ed696c73f8ec0794e91b52d639f
[coreboot.git] / src / arch / i386 / smp / mpspec.c
1 #include <console/console.h>
2 #include <device/device.h>
3 #include <device/path.h>
4 #include <device/pci_ids.h>
5 #include <cpu/cpu.h>
6 #include <arch/smp/mpspec.h>
7 #include <string.h>
8 #include <arch/cpu.h>
9 #include <cpu/x86/lapic.h>
10
11 unsigned char smp_compute_checksum(void *v, int len)
12 {
13         unsigned char *bytes;
14         unsigned char checksum;
15         int i;
16         bytes = v;
17         checksum = 0;
18         for(i = 0; i < len; i++) {
19                 checksum -= bytes[i];
20         }
21         return checksum;
22 }
23
24 void *smp_write_floating_table(unsigned long addr)
25 {
26         struct intel_mp_floating *mf;
27         void *v;
28         
29         /* 16 byte align the table address */
30         addr = (addr + 0xf) & (~0xf);
31         v = (void *)addr;
32
33         mf = v;
34         mf->mpf_signature[0] = '_';
35         mf->mpf_signature[1] = 'M';
36         mf->mpf_signature[2] = 'P';
37         mf->mpf_signature[3] = '_';
38         mf->mpf_physptr = (unsigned long)(((char *)v) + SMP_FLOATING_TABLE_LEN);
39         mf->mpf_length = 1;
40         mf->mpf_specification = 4;
41         mf->mpf_checksum = 0;
42         mf->mpf_feature1 = 0;
43         mf->mpf_feature2 = 0;
44         mf->mpf_feature3 = 0;
45         mf->mpf_feature4 = 0;
46         mf->mpf_feature5 = 0;
47         mf->mpf_checksum = smp_compute_checksum(mf, mf->mpf_length*16);
48         return v;
49 }
50
51 void *smp_write_floating_table_physaddr(unsigned long addr, unsigned long mpf_physptr)
52 {
53         struct intel_mp_floating *mf;
54         void *v;
55         
56         v = (void *)addr;
57         mf = v;
58         mf->mpf_signature[0] = '_';
59         mf->mpf_signature[1] = 'M';
60         mf->mpf_signature[2] = 'P';
61         mf->mpf_signature[3] = '_';
62         mf->mpf_physptr = mpf_physptr;
63         mf->mpf_length = 1;
64         mf->mpf_specification = 4;
65         mf->mpf_checksum = 0;
66         mf->mpf_feature1 = 0;
67         mf->mpf_feature2 = 0;
68         mf->mpf_feature3 = 0;
69         mf->mpf_feature4 = 0;
70         mf->mpf_feature5 = 0;
71         mf->mpf_checksum = smp_compute_checksum(mf, mf->mpf_length*16);
72         return v;
73 }
74
75 void *smp_next_mpc_entry(struct mp_config_table *mc)
76 {
77         void *v;
78         v = (void *)(((char *)mc) + mc->mpc_length);
79         return v;
80 }
81 static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
82 {
83         mc->mpc_length += length;
84         mc->mpc_entry_count++;
85 }
86
87 void *smp_next_mpe_entry(struct mp_config_table *mc)
88 {
89         void *v;
90         v = (void *)(((char *)mc) + mc->mpc_length + mc->mpe_length);
91         return v;
92 }
93 static void smp_add_mpe_entry(struct mp_config_table *mc, mpe_t mpe)
94 {
95         mc->mpe_length += mpe->mpe_length;
96 }
97
98 void smp_write_processor(struct mp_config_table *mc,
99         unsigned char apicid, unsigned char apicver,
100         unsigned char cpuflag, unsigned int cpufeature,
101         unsigned int featureflag)
102 {
103         struct mpc_config_processor *mpc;
104         mpc = smp_next_mpc_entry(mc);
105         memset(mpc, '\0', sizeof(*mpc));
106         mpc->mpc_type = MP_PROCESSOR;
107         mpc->mpc_apicid = apicid;
108         mpc->mpc_apicver = apicver;
109         mpc->mpc_cpuflag = cpuflag;
110         mpc->mpc_cpufeature = cpufeature;
111         mpc->mpc_featureflag = featureflag;
112         smp_add_mpc_entry(mc, sizeof(*mpc));
113 }
114
115 /* If we assume a symmetric processor configuration we can
116  * get all of the information we need to write the processor
117  * entry from the bootstrap processor.
118  * Plus I don't think linux really even cares.
119  * Having the proper apicid's in the table so the non-bootstrap
120  *  processors can be woken up should be enough.
121  */
122 void smp_write_processors(struct mp_config_table *mc)
123 {
124         int boot_apic_id;
125         unsigned apic_version;
126         unsigned cpu_features;
127         unsigned cpu_feature_flags;
128         struct cpuid_result result;
129         device_t cpu;
130         
131         boot_apic_id = lapicid();
132         apic_version = lapic_read(LAPIC_LVR) & 0xff;
133         result = cpuid(1);
134         cpu_features = result.eax;
135         cpu_feature_flags = result.edx;
136         for(cpu = all_devices; cpu; cpu = cpu->next) {
137                 unsigned long cpu_flag;
138                 if ((cpu->path.type != DEVICE_PATH_APIC) || 
139                         (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
140                 {
141                         continue;
142                 }
143                 if (!cpu->enabled) {
144                         continue;
145                 }
146                 cpu_flag = MPC_CPU_ENABLED;
147                 if (boot_apic_id == cpu->path.u.apic.apic_id) {
148                         cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
149                 }
150                 smp_write_processor(mc, 
151                         cpu->path.u.apic.apic_id, apic_version,
152                         cpu_flag, cpu_features, cpu_feature_flags
153                 );
154         }
155 }
156
157 void smp_write_bus(struct mp_config_table *mc,
158         unsigned char id, char *bustype)
159 {
160         struct mpc_config_bus *mpc;
161         mpc = smp_next_mpc_entry(mc);
162         memset(mpc, '\0', sizeof(*mpc));
163         mpc->mpc_type = MP_BUS;
164         mpc->mpc_busid = id;
165         memcpy(mpc->mpc_bustype, bustype, sizeof(mpc->mpc_bustype));
166         smp_add_mpc_entry(mc, sizeof(*mpc));
167 }
168
169 void smp_write_ioapic(struct mp_config_table *mc,
170         unsigned char id, unsigned char ver, 
171         unsigned long apicaddr)
172 {
173         struct mpc_config_ioapic *mpc;
174         mpc = smp_next_mpc_entry(mc);
175         memset(mpc, '\0', sizeof(*mpc));
176         mpc->mpc_type = MP_IOAPIC;
177         mpc->mpc_apicid = id;
178         mpc->mpc_apicver = ver;
179         mpc->mpc_flags = MPC_APIC_USABLE;
180         mpc->mpc_apicaddr = apicaddr;
181         smp_add_mpc_entry(mc, sizeof(*mpc));
182 }
183
184 void smp_write_intsrc(struct mp_config_table *mc,
185         unsigned char irqtype, unsigned short irqflag,
186         unsigned char srcbus, unsigned char srcbusirq,
187         unsigned char dstapic, unsigned char dstirq)
188 {
189         struct mpc_config_intsrc *mpc;
190         mpc = smp_next_mpc_entry(mc);
191         memset(mpc, '\0', sizeof(*mpc));
192         mpc->mpc_type = MP_INTSRC;
193         mpc->mpc_irqtype = irqtype;
194         mpc->mpc_irqflag = irqflag;
195         mpc->mpc_srcbus = srcbus;
196         mpc->mpc_srcbusirq = srcbusirq;
197         mpc->mpc_dstapic = dstapic;
198         mpc->mpc_dstirq = dstirq;
199         smp_add_mpc_entry(mc, sizeof(*mpc));
200 #if CONFIG_DEBUG_MPTABLE == 1
201         printk_info("add intsrc srcbus 0x%x srcbusirq 0x%x, dstapic 0x%x, dstirq 0x%x\n",
202                                 srcbus, srcbusirq, dstapic, dstirq);
203         hexdump(__FUNCTION__, mpc, sizeof(*mpc));
204 #endif
205 }
206
207 void smp_write_intsrc_pci_bridge(struct mp_config_table *mc,
208         unsigned char irqtype, unsigned short irqflag,
209         struct device *dev,
210         unsigned char dstapic, unsigned char *dstirq)
211 {
212         struct device *child;
213
214         int linkn;
215         int i;
216         int srcbus;
217         int slot;
218
219         struct bus *link;
220         unsigned char dstirq_x[4];
221
222         for (linkn = 0; linkn < dev->links; linkn++) {
223
224                 link = &dev->link[linkn];
225                 child = link->children;
226                 srcbus = link->secondary;
227
228                 while (child) {
229                         if (child->path.type != DEVICE_PATH_PCI)
230                                 goto next;
231
232                         slot = (child->path.u.pci.devfn >> 3);
233                         /* round pins */
234                         for (i = 0; i < 4; i++)
235                                 dstirq_x[i] = dstirq[(i + slot) % 4];
236
237                         if ((child->class >> 16) != PCI_BASE_CLASS_BRIDGE) {
238                                 /* pci device */
239                                 printk_debug("route irq: %s\n", dev_path(child));
240                                 for (i = 0; i < 4; i++)
241                                         smp_write_intsrc(mc, irqtype, irqflag, srcbus, (slot<<2)|i, dstapic, dstirq_x[i]);
242                                 goto next;
243                         }
244
245                         switch (child->class>>8) {
246                         case PCI_CLASS_BRIDGE_PCI:
247                         case PCI_CLASS_BRIDGE_PCMCIA:
248                         case PCI_CLASS_BRIDGE_CARDBUS:
249                                 printk_debug("route irq bridge: %s\n", dev_path(child));
250                                 smp_write_intsrc_pci_bridge(mc, irqtype, irqflag, child, dstapic, dstirq_x);
251                         }
252
253                 next:
254                         child = child->sibling;
255                 }
256
257         }
258 }
259
260 void smp_write_lintsrc(struct mp_config_table *mc,
261         unsigned char irqtype, unsigned short irqflag,
262         unsigned char srcbusid, unsigned char srcbusirq,
263         unsigned char destapic, unsigned char destapiclint)
264 {
265         struct mpc_config_lintsrc *mpc;
266         mpc = smp_next_mpc_entry(mc);
267         memset(mpc, '\0', sizeof(*mpc));
268         mpc->mpc_type = MP_LINTSRC;
269         mpc->mpc_irqtype = irqtype;
270         mpc->mpc_irqflag = irqflag;
271         mpc->mpc_srcbusid = srcbusid;
272         mpc->mpc_srcbusirq = srcbusirq;
273         mpc->mpc_destapic = destapic;
274         mpc->mpc_destapiclint = destapiclint;
275         smp_add_mpc_entry(mc, sizeof(*mpc));
276 }
277
278 void smp_write_address_space(struct mp_config_table *mc,
279         unsigned char busid, unsigned char address_type,
280         unsigned int address_base_low, unsigned int address_base_high,
281         unsigned int address_length_low, unsigned int address_length_high)
282 {
283         struct mp_exten_system_address_space *mpe;
284         mpe = smp_next_mpe_entry(mc);
285         memset(mpe, '\0', sizeof(*mpe));
286         mpe->mpe_type = MPE_SYSTEM_ADDRESS_SPACE;
287         mpe->mpe_length = sizeof(*mpe);
288         mpe->mpe_busid = busid;
289         mpe->mpe_address_type = address_type;
290         mpe->mpe_address_base_low  = address_base_low;
291         mpe->mpe_address_base_high = address_base_high;
292         mpe->mpe_address_length_low  = address_length_low;
293         mpe->mpe_address_length_high = address_length_high;
294         smp_add_mpe_entry(mc, (mpe_t)mpe);
295 }
296
297
298 void smp_write_bus_hierarchy(struct mp_config_table *mc,
299         unsigned char busid, unsigned char bus_info,
300         unsigned char parent_busid)
301 {
302         struct mp_exten_bus_hierarchy *mpe;
303         mpe = smp_next_mpe_entry(mc);
304         memset(mpe, '\0', sizeof(*mpe));
305         mpe->mpe_type = MPE_BUS_HIERARCHY;
306         mpe->mpe_length = sizeof(*mpe);
307         mpe->mpe_busid = busid;
308         mpe->mpe_bus_info = bus_info;
309         mpe->mpe_parent_busid = parent_busid;
310         smp_add_mpe_entry(mc, (mpe_t)mpe);
311 }
312
313 void smp_write_compatibility_address_space(struct mp_config_table *mc,
314         unsigned char busid, unsigned char address_modifier,
315         unsigned int range_list)
316 {
317         struct mp_exten_compatibility_address_space *mpe;
318         mpe = smp_next_mpe_entry(mc);
319         memset(mpe, '\0', sizeof(*mpe));
320         mpe->mpe_type = MPE_COMPATIBILITY_ADDRESS_SPACE;
321         mpe->mpe_length = sizeof(*mpe);
322         mpe->mpe_busid = busid;
323         mpe->mpe_address_modifier = address_modifier;
324         mpe->mpe_range_list = range_list;
325         smp_add_mpe_entry(mc, (mpe_t)mpe);
326 }
327