7 * Copyright (C) 1996-2002 Markus Franz Xaver Johannes Oberhumer
9 * This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * Originally this code was part of ucl the data compression library
15 * for upx the ``Ultimate Packer of eXecutables''.
17 * - Converted to gas assembly, and refitted to work with etherboot.
18 * Eric Biederman 20 Aug 2002
19 * - Merged the nrv2b decompressor into crt0.base of LinuxBIOS
20 * Eric Biederman 26 Sept 2002
25 #include <arch/intel.h>
26 #include <console/loglevel.h>
29 * This is the entry code the code in .reset section
30 * jumps to this address.
33 .section ".rom.data", "a", @progbits
34 .section ".rom.text", "ax", @progbits
36 intel_chip_post_macro(0x01) /* delay for chipsets */
38 #include "crt0_includes.h"
40 #if USE_DCACHE_RAM == 0
41 #ifndef CONSOLE_DEBUG_TX_STRING
42 /* uses: esp, ebx, ax, dx */
43 # define __CRT_CONSOLE_TX_STRING(string) \
45 CALLSP(crt_console_tx_string)
47 # if defined(TTYS0_BASE) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG)
48 # define CONSOLE_DEBUG_TX_STRING(string) __CRT_CONSOLE_TX_STRING(string)
50 # define CONSOLE_DEBUG_TX_STRING(string)
54 /* clear boot_complete flag */
57 CONSOLE_DEBUG_TX_STRING($str_copying_to_ram)
60 * Copy data into RAM and clear the BSS. Since these segments
61 * isn\'t really that big we just copy/clear using bytes, not
64 intel_chip_post_macro(0x11) /* post 11 */
66 cld /* clear direction flag */
68 /* copy linuxBIOS from it's initial load location to
69 * the location it is compiled to run at.
70 * Normally this is copying from FLASH ROM to RAM.
81 movl %ebp, %esp /* preserve %ebp */
82 movl $-1, %ebp /* last_m_off = -1 */
85 /* ------------- DECOMPRESSION -------------
104 subl $-4, %esi /* sets carry flag */
109 decompr_literals_n2b:
118 jc decompr_literals_n2b
120 incl %eax /* m_off = 1 */
123 adcl %eax, %eax /* m_off = m_off*2 + getbit() */
125 jnc loop1_n2b /* while(!getbit()) */
128 jb decompr_ebpeax_n2b /* if (m_off == 2) goto decompr_ebpeax_n2b ? */
130 movb (%esi), %al /* m_off = (m_off - 3)*256 + src[ilen++] */
133 jz decompr_end_n2b /* if (m_off == 0xffffffff) goto decomp_end_n2b */
134 movl %eax, %ebp /* last_m_off = m_off ?*/
137 adcl %ecx, %ecx /* m_len = getbit() */
139 adcl %ecx, %ecx /* m_len = m_len*2 + getbit()) */
140 jnz decompr_got_mlen_n2b /* if (m_len == 0) goto decompr_got_mlen_n2b */
141 incl %ecx /* m_len++ */
144 adcl %ecx, %ecx /* m_len = m_len*2 + getbit() */
146 jnc loop2_n2b /* while(!getbit()) */
148 incl %ecx /* m_len += 2 */
149 decompr_got_mlen_n2b:
151 adcl $1, %ecx /* m_len = m_len + 1 + (last_m_off > 0xd00) */
153 leal (%edi,%ebp), %esi /* m_pos = dst + olen + -m_off */
155 movsb /* dst[olen++] = *m_pos++ while(m_len > 0) */
159 intel_chip_post_macro(0x12) /* post 12 */
164 CONSOLE_DEBUG_TX_STRING($str_pre_main)
169 intel_chip_post_macro(0xee) /* post fe */
173 #ifdef __CRT_CONSOLE_TX_STRING
174 /* Uses esp, ebx, ax, dx */
175 crt_console_tx_string:
184 #define TTYS0_BASE 0x3f8
187 #define TTYS0_RBR (TTYS0_BASE+0x00)
190 #define TTYS0_TBR TTYS0_RBR
191 #define TTYS0_IER (TTYS0_BASE+0x01)
192 #define TTYS0_IIR (TTYS0_BASE+0x02)
193 #define TTYS0_FCR TTYS0_IIR
194 #define TTYS0_LCR (TTYS0_BASE+0x03)
195 #define TTYS0_MCR (TTYS0_BASE+0x04)
196 #define TTYS0_DLL TTYS0_RBR
197 #define TTYS0_DLM TTYS0_IER
200 #define TTYS0_LSR (TTYS0_BASE+0x05)
201 #define TTYS0_MSR (TTYS0_BASE+0x06)
202 #define TTYS0_SCR (TTYS0_BASE+0x07)
205 10: mov $TTYS0_LSR, %dx
213 jmp crt_console_tx_string
214 #endif /* __CRT_CONSOLE_TX_STRING */
216 #if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG)
218 str_copying_to_ram: .string "Copying LinuxBIOS to RAM.\r\n"
219 str_pre_main: .string "Jumping to LinuxBIOS.\r\n"
222 #endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
224 #endif /* USE_DCACHE_RAM */