4 #include <device/device.h>
6 * Structure definitions for SMP machines following the
7 * Intel Multiprocessing Specification 1.1 and 1.4.
11 * This tag identifies where the SMP configuration
15 #define SMP_MAGIC_IDENT (('_'<<24)|('P'<<16)|('M'<<8)|'_')
18 * a maximum of 16 APICs with the current APIC ID architecture.
23 #define SMP_FLOATING_TABLE_LEN sizeof(struct intel_mp_floating)
25 struct intel_mp_floating
27 char mpf_signature[4]; /* "_MP_" */
28 unsigned long mpf_physptr; /* Configuration table address */
29 unsigned char mpf_length; /* Our length (paragraphs) */
30 unsigned char mpf_specification;/* Specification version */
31 unsigned char mpf_checksum; /* Checksum (makes sum 0) */
32 unsigned char mpf_feature1; /* Standard or configuration ? */
33 unsigned char mpf_feature2; /* Bit7 set for IMCR|PIC */
34 unsigned char mpf_feature3; /* Unused (0) */
35 unsigned char mpf_feature4; /* Unused (0) */
36 unsigned char mpf_feature5; /* Unused (0) */
37 } __attribute__((packed));
39 struct mp_config_table
41 char mpc_signature[4];
42 #define MPC_SIGNATURE "PCMP"
43 unsigned short mpc_length; /* Size of table */
44 char mpc_spec; /* 0x01 */
47 char mpc_productid[12];
48 unsigned long mpc_oemptr; /* 0 if not present */
49 unsigned short mpc_oemsize; /* 0 if not present */
50 unsigned short mpc_entry_count;
51 unsigned long mpc_lapic; /* APIC address */
52 unsigned short mpe_length; /* Extended Table size */
53 unsigned char mpe_checksum; /* Extended Table checksum */
54 unsigned char reserved;
55 } __attribute__((packed));
57 /* Followed by entries */
59 #define MP_PROCESSOR 0
65 struct mpc_config_processor
67 unsigned char mpc_type;
68 unsigned char mpc_apicid; /* Local APIC number */
69 unsigned char mpc_apicver; /* Its versions */
70 unsigned char mpc_cpuflag;
71 #define MPC_CPU_ENABLED 1 /* Processor is available */
72 #define MPC_CPU_BOOTPROCESSOR 2 /* Processor is the BP */
73 unsigned long mpc_cpufeature;
74 #define MPC_CPU_STEPPING_MASK 0x0F
75 #define MPC_CPU_MODEL_MASK 0xF0
76 #define MPC_CPU_FAMILY_MASK 0xF00
77 unsigned long mpc_featureflag; /* CPUID feature value */
78 unsigned long mpc_reserved[2];
79 } __attribute__((packed));
83 unsigned char mpc_type;
84 unsigned char mpc_busid;
85 unsigned char mpc_bustype[6];
86 } __attribute__((packed));
88 #define BUSTYPE_EISA "EISA"
89 #define BUSTYPE_ISA "ISA"
90 #define BUSTYPE_INTERN "INTERN" /* Internal BUS */
91 #define BUSTYPE_MCA "MCA"
92 #define BUSTYPE_VL "VL" /* Local bus */
93 #define BUSTYPE_PCI "PCI"
94 #define BUSTYPE_PCMCIA "PCMCIA"
96 struct mpc_config_ioapic
98 unsigned char mpc_type;
99 unsigned char mpc_apicid;
100 unsigned char mpc_apicver;
101 unsigned char mpc_flags;
102 #define MPC_APIC_USABLE 0x01
103 unsigned long mpc_apicaddr;
104 } __attribute__((packed));
106 struct mpc_config_intsrc
108 unsigned char mpc_type;
109 unsigned char mpc_irqtype;
110 unsigned short mpc_irqflag;
111 unsigned char mpc_srcbus;
112 unsigned char mpc_srcbusirq;
113 unsigned char mpc_dstapic;
114 unsigned char mpc_dstirq;
115 } __attribute__((packed));
117 enum mp_irq_source_types {
124 #define MP_IRQ_POLARITY_DEFAULT 0x0
125 #define MP_IRQ_POLARITY_HIGH 0x1
126 #define MP_IRQ_POLARITY_LOW 0x3
127 #define MP_IRQ_POLARITY_MASK 0x3
128 #define MP_IRQ_TRIGGER_DEFAULT 0x0
129 #define MP_IRQ_TRIGGER_EDGE 0x4
130 #define MP_IRQ_TRIGGER_LEVEL 0xc
131 #define MP_IRQ_TRIGGER_MASK 0xc
134 struct mpc_config_lintsrc
136 unsigned char mpc_type;
137 unsigned char mpc_irqtype;
138 unsigned short mpc_irqflag;
139 unsigned char mpc_srcbusid;
140 unsigned char mpc_srcbusirq;
141 unsigned char mpc_destapic;
142 #define MP_APIC_ALL 0xFF
143 unsigned char mpc_destapiclint;
144 } __attribute__((packed));
147 * Default configurations
149 * 1 2 CPU ISA 82489DX
150 * 2 2 CPU EISA 82489DX neither IRQ 0 timer nor IRQ 13 DMA chaining
151 * 3 2 CPU EISA 82489DX
152 * 4 2 CPU MCA 82489DX
158 #define MAX_IRQ_SOURCES 128
159 #define MAX_MP_BUSSES 32
167 /* Followed by entries */
169 #define MPE_SYSTEM_ADDRESS_SPACE 0x80
170 #define MPE_BUS_HIERARCHY 0x81
171 #define MPE_COMPATIBILITY_ADDRESS_SPACE 0x82
173 struct mp_exten_config {
174 unsigned char mpe_type;
175 unsigned char mpe_length;
176 } __attribute__((packed));
178 typedef struct mp_exten_config *mpe_t;
180 struct mp_exten_system_address_space {
181 unsigned char mpe_type;
182 unsigned char mpe_length;
183 unsigned char mpe_busid;
184 unsigned char mpe_address_type;
185 #define ADDRESS_TYPE_IO 0
186 #define ADDRESS_TYPE_MEM 1
187 #define ADDRESS_TYPE_PREFETCH 2
188 unsigned int mpe_address_base_low;
189 unsigned int mpe_address_base_high;
190 unsigned int mpe_address_length_low;
191 unsigned int mpe_address_length_high;
192 } __attribute__((packed));
194 struct mp_exten_bus_hierarchy {
195 unsigned char mpe_type;
196 unsigned char mpe_length;
197 unsigned char mpe_busid;
198 unsigned char mpe_bus_info;
199 #define BUS_SUBTRACTIVE_DECODE 1
200 unsigned char mpe_parent_busid;
201 unsigned char reserved[3];
202 } __attribute__((packed));
204 struct mp_exten_compatibility_address_space {
205 unsigned char mpe_type;
206 unsigned char mpe_length;
207 unsigned char mpe_busid;
208 unsigned char mpe_address_modifier;
209 #define ADDRESS_RANGE_SUBTRACT 1
210 #define ADDRESS_RANGE_ADD 0
211 unsigned int mpe_range_list;
212 #define RANGE_LIST_IO_ISA 0
218 #define RANGE_LIST_IO_VGA 1
228 } __attribute__((packed));
230 /* Default local apic addr */
231 #define LAPIC_ADDR 0xFEE00000
233 void *smp_next_mpc_entry(struct mp_config_table *mc);
234 void *smp_next_mpe_entry(struct mp_config_table *mc);
236 void smp_write_processor(struct mp_config_table *mc,
237 unsigned char apicid, unsigned char apicver,
238 unsigned char cpuflag, unsigned int cpufeature,
239 unsigned int featureflag);
240 void smp_write_processors(struct mp_config_table *mc);
241 void smp_write_bus(struct mp_config_table *mc,
242 unsigned char id, char *bustype);
243 void smp_write_ioapic(struct mp_config_table *mc,
244 unsigned char id, unsigned char ver,
245 unsigned long apicaddr);
246 void smp_write_intsrc(struct mp_config_table *mc,
247 unsigned char irqtype, unsigned short irqflag,
248 unsigned char srcbus, unsigned char srcbusirq,
249 unsigned char dstapic, unsigned char dstirq);
250 void smp_write_intsrc_pci_bridge(struct mp_config_table *mc,
251 unsigned char irqtype, unsigned short irqflag,
253 unsigned char dstapic, unsigned char *dstirq);
254 void smp_write_lintsrc(struct mp_config_table *mc,
255 unsigned char irqtype, unsigned short irqflag,
256 unsigned char srcbusid, unsigned char srcbusirq,
257 unsigned char destapic, unsigned char destapiclint);
258 void smp_write_address_space(struct mp_config_table *mc,
259 unsigned char busid, unsigned char address_type,
260 unsigned int address_base_low, unsigned int address_base_high,
261 unsigned int address_length_low, unsigned int address_length_high);
262 void smp_write_bus_hierarchy(struct mp_config_table *mc,
263 unsigned char busid, unsigned char bus_info,
264 unsigned char parent_busid);
265 void smp_write_compatibility_address_space(struct mp_config_table *mc,
266 unsigned char busid, unsigned char address_modifier,
267 unsigned int range_list);
268 unsigned char smp_compute_checksum(void *v, int len);
269 void *smp_write_floating_table(unsigned long addr);
270 void *smp_write_floating_table_physaddr(unsigned long addr,
271 unsigned long mpf_physptr);
272 unsigned long write_smp_table(unsigned long addr);