1 #ifndef ARCH_ROMCC_IO_H
2 #define ARCH_ROMCC_IO_H 1
7 static inline __attribute__((always_inline)) uint8_t read8(unsigned long addr)
9 return *((volatile uint8_t *)(addr));
12 static inline __attribute__((always_inline)) uint16_t read16(unsigned long addr)
14 return *((volatile uint16_t *)(addr));
17 static inline __attribute__((always_inline)) uint32_t read32(unsigned long addr)
19 return *((volatile uint32_t *)(addr));
22 static inline __attribute__((always_inline)) void write8(unsigned long addr, uint8_t value)
24 *((volatile uint8_t *)(addr)) = value;
27 static inline __attribute__((always_inline)) void write16(unsigned long addr, uint16_t value)
29 *((volatile uint16_t *)(addr)) = value;
32 static inline __attribute__((always_inline)) void write32(unsigned long addr, uint32_t value)
34 *((volatile uint32_t *)(addr)) = value;
39 #include <arch/mmio_conf.h>
43 static inline int log2(int value)
51 : "=r" (r) : "r" (value));
55 static inline int log2f(int value)
63 : "=r" (r) : "r" (value));
68 #define PCI_ADDR(SEGBUS, DEV, FN, WHERE) ( \
69 (((SEGBUS) & 0xFFF) << 20) | \
70 (((DEV) & 0x1F) << 15) | \
71 (((FN) & 0x07) << 12) | \
74 #define PCI_DEV(SEGBUS, DEV, FN) ( \
75 (((SEGBUS) & 0xFFF) << 20) | \
76 (((DEV) & 0x1F) << 15) | \
77 (((FN) & 0x07) << 12))
79 #define PCI_ID(VENDOR_ID, DEVICE_ID) \
80 ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
83 #define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
85 typedef unsigned device_t; /* pci and pci_mmio need to have different ways to have dev */
87 /* FIXME: We need to make the LinuxBIOS to run at 64bit mode, So when read/write memory above 4G,
88 * We don't need to set %fs, and %gs anymore
89 * Before that We need to use %gs, and leave %fs to other RAM access
92 static inline __attribute__((always_inline)) uint8_t pci_io_read_config8(device_t dev, unsigned where)
95 #if PCI_IO_CFG_EXT == 0
96 addr = (dev>>4) | where;
98 addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); //seg == 0
100 outl(0x80000000 | (addr & ~3), 0xCF8);
101 return inb(0xCFC + (addr & 3));
105 static inline __attribute__((always_inline)) uint8_t pci_mmio_read_config8(device_t dev, unsigned where)
112 static inline __attribute__((always_inline)) uint8_t pci_read_config8(device_t dev, unsigned where)
115 return pci_mmio_read_config8(dev, where);
117 return pci_io_read_config8(dev, where);
121 static inline __attribute__((always_inline)) uint16_t pci_io_read_config16(device_t dev, unsigned where)
124 #if PCI_IO_CFG_EXT == 0
125 addr = (dev>>4) | where;
127 addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
129 outl(0x80000000 | (addr & ~3), 0xCF8);
130 return inw(0xCFC + (addr & 2));
134 static inline __attribute__((always_inline)) uint16_t pci_mmio_read_config16(device_t dev, unsigned where)
138 return read16x(addr);
142 static inline __attribute__((always_inline)) uint16_t pci_read_config16(device_t dev, unsigned where)
145 return pci_mmio_read_config16(dev, where);
147 return pci_io_read_config16(dev, where);
152 static inline __attribute__((always_inline)) uint32_t pci_io_read_config32(device_t dev, unsigned where)
155 #if PCI_IO_CFG_EXT == 0
156 addr = (dev>>4) | where;
158 addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
160 outl(0x80000000 | (addr & ~3), 0xCF8);
165 static inline __attribute__((always_inline)) uint32_t pci_mmio_read_config32(device_t dev, unsigned where)
169 return read32x(addr);
173 static inline __attribute__((always_inline)) uint32_t pci_read_config32(device_t dev, unsigned where)
176 return pci_mmio_read_config32(dev, where);
178 return pci_io_read_config32(dev, where);
182 static inline __attribute__((always_inline)) void pci_io_write_config8(device_t dev, unsigned where, uint8_t value)
185 #if PCI_IO_CFG_EXT == 0
186 addr = (dev>>4) | where;
188 addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
190 outl(0x80000000 | (addr & ~3), 0xCF8);
191 outb(value, 0xCFC + (addr & 3));
195 static inline __attribute__((always_inline)) void pci_mmio_write_config8(device_t dev, unsigned where, uint8_t value)
199 write8x(addr, value);
203 static inline __attribute__((always_inline)) void pci_write_config8(device_t dev, unsigned where, uint8_t value)
206 pci_mmio_write_config8(dev, where, value);
208 pci_io_write_config8(dev, where, value);
213 static inline __attribute__((always_inline)) void pci_io_write_config16(device_t dev, unsigned where, uint16_t value)
216 #if PCI_IO_CFG_EXT == 0
217 addr = (dev>>4) | where;
219 addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
221 outl(0x80000000 | (addr & ~3), 0xCF8);
222 outw(value, 0xCFC + (addr & 2));
226 static inline __attribute__((always_inline)) void pci_mmio_write_config16(device_t dev, unsigned where, uint16_t value)
230 write16x(addr, value);
234 static inline __attribute__((always_inline)) void pci_write_config16(device_t dev, unsigned where, uint16_t value)
237 pci_mmio_write_config16(dev, where, value);
239 pci_io_write_config16(dev, where, value);
244 static inline __attribute__((always_inline)) void pci_io_write_config32(device_t dev, unsigned where, uint32_t value)
247 #if PCI_IO_CFG_EXT == 0
248 addr = (dev>>4) | where;
250 addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
252 outl(0x80000000 | (addr & ~3), 0xCF8);
257 static inline __attribute__((always_inline)) void pci_mmio_write_config32(device_t dev, unsigned where, uint32_t value)
261 write32x(addr, value);
265 static inline __attribute__((always_inline)) void pci_write_config32(device_t dev, unsigned where, uint32_t value)
268 pci_mmio_write_config32(dev, where, value);
270 pci_io_write_config32(dev, where, value);
274 #define PCI_DEV_INVALID (0xffffffffU)
275 static device_t pci_io_locate_device(unsigned pci_id, device_t dev)
277 for(; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
279 id = pci_io_read_config32(dev, 0);
284 return PCI_DEV_INVALID;
287 static device_t pci_locate_device(unsigned pci_id, device_t dev)
289 for(; dev <= PCI_DEV(255|(((1<<PCI_BUS_SEGN_BITS)-1)<<8), 31, 7); dev += PCI_DEV(0,0,1)) {
291 id = pci_read_config32(dev, 0);
296 return PCI_DEV_INVALID;
299 static device_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
303 dev = PCI_DEV(bus, 0, 0);
304 last = PCI_DEV(bus, 31, 7);
306 for(; dev <=last; dev += PCI_DEV(0,0,1)) {
308 id = pci_read_config32(dev, 0);
313 return PCI_DEV_INVALID;
316 /* Generic functions for pnp devices */
317 static inline __attribute__((always_inline)) void pnp_write_config(device_t dev, uint8_t reg, uint8_t value)
319 unsigned port = dev >> 8;
321 outb(value, port +1);
324 static inline __attribute__((always_inline)) uint8_t pnp_read_config(device_t dev, uint8_t reg)
326 unsigned port = dev >> 8;
331 static inline __attribute__((always_inline)) void pnp_set_logical_device(device_t dev)
333 unsigned device = dev & 0xff;
334 pnp_write_config(dev, 0x07, device);
337 static inline __attribute__((always_inline)) void pnp_set_enable(device_t dev, int enable)
339 pnp_write_config(dev, 0x30, enable?0x1:0x0);
342 static inline __attribute__((always_inline)) int pnp_read_enable(device_t dev)
344 return !!pnp_read_config(dev, 0x30);
347 static inline __attribute__((always_inline)) void pnp_set_iobase(device_t dev, unsigned index, unsigned iobase)
349 pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
350 pnp_write_config(dev, index + 1, iobase & 0xff);
353 static inline __attribute__((always_inline)) uint16_t pnp_read_iobase(device_t dev, unsigned index)
355 return ((uint16_t)(pnp_read_config(dev, index)) << 8) | pnp_read_config(dev, index + 1);
358 static inline __attribute__((always_inline)) void pnp_set_irq(device_t dev, unsigned index, unsigned irq)
360 pnp_write_config(dev, index, irq);
363 static inline __attribute__((always_inline)) void pnp_set_drq(device_t dev, unsigned index, unsigned drq)
365 pnp_write_config(dev, index, drq & 0xff);
368 #endif /* ARCH_ROMCC_IO_H */