2 * This file is part of the coreboot project.
4 * Copyright (C) .... others
5 * Copyright (C) 2008-2009 coresystems GmbH
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 /* 2006.1 yhlu add mptable cross 0x467 processing */
23 #include <console/console.h>
25 #include <boot/tables.h>
26 #include <boot/coreboot_tables.h>
27 #include <arch/pirq_routing.h>
28 #include <arch/smp/mpspec.h>
29 #include <arch/acpi.h>
31 #include <cpu/x86/multiboot.h>
32 #include "coreboot_table.h"
34 // Global Descriptor Table, defined in c_start.S
36 extern uint8_t gdt_end;
38 /* i386 lgdt argument */
42 } __attribute__((packed));
44 // Copy GDT to new location and reload it
45 // 2003-07 by SONE Takeshi
46 // Ported from Etherboot to coreboot 2005-08 by Steve Magnani
47 void move_gdt(unsigned long newgdt)
49 uint16_t num_gdt_bytes = &gdt_end - &gdt;
52 printk_debug("Moving GDT to %#lx...", newgdt);
53 memcpy((void*)newgdt, &gdt, num_gdt_bytes);
55 gdtarg.limit = num_gdt_bytes - 1;
56 __asm__ __volatile__ ("lgdt %0\n\t" : : "m" (gdtarg));
60 #if HAVE_HIGH_TABLES == 1
61 uint64_t high_tables_base = 0;
62 uint64_t high_tables_size;
65 struct lb_memory *write_tables(void)
67 unsigned long low_table_start, low_table_end;
68 unsigned long rom_table_start, rom_table_end;
69 #if HAVE_MP_TABLE == 1
70 unsigned long new_low_table_end;
73 #if HAVE_HIGH_TABLES == 1
74 /* Even if high tables are configured, all tables are copied both to the
75 * low and the high area, so payloads and OSes don't need to know about
78 unsigned long high_table_start=0, high_table_end=0;
80 if (high_tables_base) {
81 printk_debug("High Tables Base is %llx.\n", high_tables_base);
82 high_table_start = high_tables_base;
83 high_table_end = high_tables_base;
85 printk_debug("High Tables Base is not set.\n");
89 rom_table_start = 0xf0000;
90 rom_table_end = 0xf0000;
91 /* Start low addr at 16 bytes instead of 0 because of a buglet
92 * in the generic linux unzip code, as it tests for the a20 line.
99 #if HAVE_LOW_TABLES == 1
100 /* This table must be betweeen 0xf0000 & 0x100000 */
101 rom_table_end = write_pirq_routing_table(rom_table_end);
102 rom_table_end = (rom_table_end + 1023) & ~1023;
104 #if HAVE_HIGH_TABLES == 1
105 if (high_tables_base) {
106 high_table_end = write_pirq_routing_table(high_table_end);
107 high_table_end = (high_table_end + 1023) & ~1023;
111 /* Write ACPI tables */
112 /* write them in the rom area because DSDT can be large (8K on epia-m) which
113 * pushes coreboot table out of first 4K if set up in low table area
115 #if HAVE_ACPI_TABLES == 1
116 #if HAVE_HIGH_TABLES == 1
117 unsigned long high_rsdp=ALIGN(high_table_end, 16);
118 if (high_tables_base) {
119 high_table_end = write_acpi_tables(high_table_end);
120 high_table_end = (high_table_end+1023) & ~1023;
122 #if HAVE_LOW_TABLES == 1
123 unsigned long rsdt_location=(unsigned long*)(((acpi_rsdp_t*)high_rsdp)->rsdt_address);
124 acpi_write_rsdp(rom_table_end, rsdt_location);
125 rom_table_end = ALIGN(ALIGN(rom_table_end, 16) + sizeof(acpi_rsdp_t), 16);
128 #if HAVE_LOW_TABLES == 1
129 rom_table_end = write_acpi_tables(rom_table_end);
130 rom_table_end = (rom_table_end+1023) & ~1023;
134 /* copy the smp block to address 0 */
137 #if HAVE_MP_TABLE == 1
139 /* The smp table must be in 0-1K, 639K-640K, or 960K-1M */
140 #if HAVE_LOW_TABLES == 1
141 new_low_table_end = write_smp_table(low_table_end); // low_table_end is 0x10 at this point
142 /* Don't write anything in the traditional x86 BIOS data segment,
143 * for example the linux kernel smp need to use 0x467 to pass reset vector
144 * or use 0x40e/0x413 for EBDA finding...
146 if(new_low_table_end>0x400){
147 unsigned mptable_size;
149 low_table_end += SMP_FLOATING_TABLE_LEN; /* keep the mpf in 1k low, so kernel can find it */
150 mptable_size = new_low_table_end - low_table_end;
151 /* We can not put mptable low, we need to copy them to somewhere else*/
152 if((rom_table_end+mptable_size)<0x100000) {
153 /* We can copy mptable on rom_table */
154 mpc_start = rom_table_end;
155 rom_table_end += mptable_size;
156 rom_table_end = (rom_table_end+1023) & ~1023;
158 /* We can need to put mptable before rom_table */
159 mpc_start = rom_table_start - mptable_size;
161 rom_table_start = mpc_start;
163 printk_debug("move mptable from 0x%0lx to 0x%0x, size 0x%0x\n", low_table_end, mpc_start, mptable_size);
164 memcpy((unsigned char *)mpc_start, (unsigned char *)low_table_end, mptable_size);
165 smp_write_floating_table_physaddr(low_table_end - SMP_FLOATING_TABLE_LEN, mpc_start);
166 memset((unsigned char *)low_table_end, '\0', mptable_size);
168 #endif /* HAVE_LOW_TABLES */
170 #if HAVE_HIGH_TABLES == 1
171 if (high_tables_base) {
172 high_table_end = write_smp_table(high_table_end);
173 high_table_end = (high_table_end+1023) & ~1023;
176 #endif /* HAVE_MP_TABLE */
178 if (low_table_end < 0x500) {
179 low_table_end = 0x500;
182 // Relocate the GDT to reserved memory, so it won't get clobbered
183 #if HAVE_HIGH_TABLES == 1
184 if (high_tables_base) {
185 move_gdt(high_table_end);
186 high_table_end += &gdt_end - &gdt;
187 high_table_end = (high_table_end+1023) & ~1023;
190 move_gdt(low_table_end);
191 low_table_end += &gdt_end - &gdt;
192 #if HAVE_HIGH_TABLES == 1
197 /* The Multiboot information structure */
198 mbi = (struct multiboot_info *)rom_table_end;
199 rom_table_end = write_multiboot_info(
200 low_table_start, low_table_end,
201 rom_table_start, rom_table_end);
204 #if HAVE_HIGH_TABLES == 1
205 if (high_tables_base) {
206 write_coreboot_table(low_table_start, low_table_end,
207 high_table_start, high_table_end);
209 printk_err("ERROR: No high_tables_base.\n");
210 write_coreboot_table(low_table_start, low_table_end,
211 rom_table_start, rom_table_end);
214 /* The coreboot table must be in 0-4K or 960K-1M */
215 write_coreboot_table(low_table_start, low_table_end,
216 rom_table_start, rom_table_end);