src/arch/i386/Makefile.inc

   1 #######################################################################
   2 # Take care of subdirectories
   3 subdirs-y += boot
   4 # subdirs-y += init
   5 subdirs-y += lib
   6 subdirs-y += smp
   7
   8 obj-$(CONFIG_HAVE_OPTION_TABLE) += ../../option_table.o
   9
  10 ifdef POST_EVALUATION
  11
  12 #######################################################################
  13 # Build the final rom image
  14 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL)
  15         cp $(obj)/coreboot.pre $@
  16         if [ -f fallback/coreboot_apc ]; \
  17         then \
  18                 $(CBFSTOOL) $@ add-stage fallback/coreboot_apc $(CONFIG_CBFS_PREFIX)/coreboot_apc $(CBFS_COMPRESS_FLAG); \
  19         fi
  20         $(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
  21 ifeq ($(CONFIG_PAYLOAD_NONE),y)
  22         @printf "    PAYLOAD    none (as specified by user)\n"
  23 else
  24         @printf "    PAYLOAD    $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CBFS_PAYLOAD_COMPRESS_FLAG)\n"
  25         $(CBFSTOOL) $(obj)/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
  26 endif
  27 ifeq ($(CONFIG_VGA_BIOS),y)
  28         @printf "    VGABIOS    $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
  29         $(CBFSTOOL) $(obj)/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
  30 endif
  31         @printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
  32         $(CBFSTOOL) $(obj)/coreboot.rom print
  33
  34 #######################################################################
  35 # i386 specific tools
  36
  37 $(obj)/option_table.h $(obj)/option_table.c $(obj)/arch/i386/../../option_table.c: $(obj)/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
  38         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
  39         $(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c
  40
  41 $(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h $(obj)/config.h
  42         @printf "    HOSTCC     $(subst $(obj)/,,$(@))\n"
  43         $(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@
  44
  45 #######################################################################
  46 # Build the coreboot_ram (stage 2)
  47
  48 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/i386/coreboot_ram.ld #ldoptions
  49         @printf "    CC         $(subst $(obj)/,,$(@))\n"
  50         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/i386/coreboot_ram.ld $(obj)/coreboot_ram.o
  51         $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
  52
  53 $(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $(drivers) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
  54         @printf "    CC         $(subst $(obj)/,,$(@))\n"
  55         $(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,-\( $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,-\)
  56
  57 $(obj)/coreboot.a: $(objs)
  58         @printf "    AR         $(subst $(obj)/,,$(@))\n"
  59         rm -f $(obj)/coreboot.a
  60         $(AR) cr $(obj)/coreboot.a $(objs)
  61
  62 #######################################################################
  63 # done
  64
  65 crt0s :=
  66 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
  67 crt0s += $(src)/cpu/x86/16bit/entry16.inc
  68 endif
  69 crt0s += $(src)/cpu/x86/32bit/entry32.inc
  70 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
  71 crt0s += $(src)/cpu/x86/16bit/reset16.inc
  72 ifeq ($(CONFIG_ROMCC),y)
  73 crt0s += $(src)/arch/i386/lib/cpu_reset.inc
  74 endif
  75 crt0s += $(src)/arch/i386/lib/id.inc
  76 endif
  77
  78 crt0s += $(src)/cpu/x86/fpu_enable.inc
  79 ifeq ($(CONFIG_CPU_AMD_GX1),y)
  80 crt0s += $(src)/cpu/amd/model_gx1/cpu_setup.inc
  81 crt0s += $(src)/cpu/amd/model_gx1/gx_setup.inc
  82 endif
  83 ifeq ($(CONFIG_SSE),y)
  84 crt0s += $(src)/cpu/x86/sse_enable.inc
  85 endif
  86
  87 ifeq ($(CONFIG_CPU_AMD_LX),y)
  88 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
  89 endif
  90 ifeq ($(CONFIG_CPU_AMD_SOCKET_F),y)
  91 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
  92 endif
  93 ifeq ($(CONFIG_CPU_AMD_SOCKET_F_1207),y)
  94 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
  95 endif
  96 ifeq ($(CONFIG_CPU_AMD_SOCKET_AM2),y)
  97 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
  98 endif
  99 ifeq ($(CONFIG_CPU_AMD_SOCKET_S1G1),y)
 100 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 101 endif
 102 ifeq ($(CONFIG_CPU_AMD_SOCKET_754),y)
 103 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 104 endif
 105 ifeq ($(CONFIG_CPU_AMD_SOCKET_939),y)
 106 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 107 endif
 108 ifeq ($(CONFIG_CPU_AMD_SOCKET_940),y)
 109 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 110 endif
 111 ifeq ($(CONFIG_CPU_INTEL_CORE),y)
 112 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
 113 endif
 114 # Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
 115 ifeq ($(CONFIG_CPU_INTEL_SOCKET_BGA956),y)
 116 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
 117 endif
 118 # should be CONFIG_CPU_VIA_C7, but bcom/winnetp680, jetway/j7f24, via/epia-cn, via/pc2500e don't use CAR yet
 119 ifeq ($(CONFIG_BOARD_VIA_VT8454C),y)
 120 crt0s += $(src)/cpu/via/car/cache_as_ram.inc
 121 endif
 122 ifeq ($(CONFIG_BOARD_VIA_EPIA_M700),y)
 123 crt0s += $(src)/cpu/via/car/cache_as_ram.inc
 124 endif
 125 # who else could use this?
 126 ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
 127 crt0s += $(src)/cpu/x86/car/cache_as_ram.inc
 128 endif
 129
 130 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 131 ifeq ($(CONFIG_ROMCC),y)
 132 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc
 133 endif
 134 endif
 135 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 136
 137 ifeq ($(CONFIG_SSE),y)
 138 crt0s += $(src)/cpu/x86/sse_disable.inc
 139 endif
 140 ifeq ($(CONFIG_MMX),y)
 141 crt0s += $(src)/cpu/x86/mmx_disable.inc
 142 endif
 143
 144 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 145 ifeq ($(CONFIG_SOUTHBRIDGE_NVIDIA_CK804),y)
 146 crt0s += $(src)/southbridge/nvidia/ck804/romstrap.inc
 147 endif
 148 ifeq ($(CONFIG_SOUTHBRIDGE_NVIDIA_MCP55),y)
 149 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
 150 endif
 151 ifeq ($(CONFIG_SOUTHBRIDGE_VIA_K8T890),y)
 152 crt0s += $(src)/southbridge/via/k8t890/romstrap.inc
 153 endif
 154 ifeq ($(CONFIG_NORTHBRIDGE_VIA_VX800),y)
 155 crt0s += $(src)/northbridge/via/vx800/romstrap.inc
 156 endif
 157 endif
 158
 159 OPTION_TABLE_H:=
 160 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
 161 OPTION_TABLE_H:=$(obj)/option_table.h
 162 endif
 163
 164 ifeq ($(CONFIG_ROMCC),y)
 165 ROMCCFLAGS ?= -mcpu=p2 -O2
 166
 167 $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib/failover.c
 168         $(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
 169
 170 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/romcc $(OPTION_TABLE_H) $(obj)/build.h
 171         $(obj)/romcc $(ROMCCFLAGS) -include $(obj)/build.h $(INCLUDES) $< -o $@
 172
 173 else
 174
 175 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h
 176         $(CC) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
 177
 178 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h
 179         $(CC) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -include $(obj)/build.h -I$(src) -I. -c -S $< -o $@.tmp1
 180         sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' $@.tmp1 > $@.tmp
 181         mv $@.tmp $@
 182         rm -f $@.tmp1
 183 endif
 184 endif
 185
 186 ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
 187 include $(src)/arch/i386/Makefile.bootblock.inc
 188 else
 189 include $(src)/arch/i386/Makefile.bigbootblock.inc
 190 endif