src/arch/i386/Makefile.inc

   1 #######################################################################
   2 # Take care of subdirectories
   3 subdirs-y += boot
   4 # subdirs-y += init
   5 subdirs-y += lib
   6 subdirs-y += smp
   7
   8 obj-$(CONFIG_HAVE_OPTION_TABLE) += ../../option_table.o
   9
  10 ifdef POST_EVALUATION
  11
  12 #######################################################################
  13 # Build the final rom image
  14 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL)
  15         cp $(obj)/coreboot.pre $@
  16         if [ -f fallback/coreboot_apc ]; \
  17         then \
  18                 $(CBFSTOOL) $@ add-stage fallback/coreboot_apc $(CONFIG_CBFS_PREFIX)/coreboot_apc $(CBFS_COMPRESS_FLAG); \
  19         fi
  20         $(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
  21 ifeq ($(CONFIG_PAYLOAD_NONE),y)
  22         @printf "    PAYLOAD    none (as specified by user)\n"
  23 else
  24         @printf "    PAYLOAD    $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CBFS_PAYLOAD_COMPRESS_FLAG)\n"
  25         $(CBFSTOOL) $(obj)/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
  26 endif
  27 ifeq ($(CONFIG_VGA_BIOS),y)
  28         @printf "    VGABIOS    $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
  29         $(CBFSTOOL) $(obj)/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
  30 endif
  31 ifeq ($(CONFIG_INTEL_MBI),y)
  32         @printf "    MBI        $(CONFIG_FALLBACK_MBI_FILE)\n"
  33         $(CBFSTOOL) $(obj)/coreboot.rom add $(CONFIG_FALLBACK_MBI_FILE) mbi.bin mbi
  34 endif
  35 ifeq ($(CONFIG_BOOTSPLASH),y)
  36         @printf "    BOOTSPLASH $(CONFIG_FALLBACK_BOOTSPLASH_FILE)\n"
  37         $(CBFSTOOL) $(obj)/coreboot.rom add $(CONFIG_FALLBACK_BOOTSPLASH_FILE) bootsplash.jpg bootsplash
  38 endif
  39         @printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
  40         $(CBFSTOOL) $(obj)/coreboot.rom print
  41
  42 #######################################################################
  43 # i386 specific tools
  44
  45 $(obj)/option_table.h $(obj)/option_table.c $(obj)/arch/i386/../../option_table.c: $(obj)/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
  46         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
  47         $(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c
  48
  49 $(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h $(obj)/config.h
  50         @printf "    HOSTCC     $(subst $(obj)/,,$(@))\n"
  51         $(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@
  52
  53 #######################################################################
  54 # Build the coreboot_ram (stage 2)
  55
  56 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/i386/coreboot_ram.ld #ldoptions
  57         @printf "    CC         $(subst $(obj)/,,$(@))\n"
  58         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/i386/coreboot_ram.ld $(obj)/coreboot_ram.o
  59         $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
  60
  61 $(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $(drivers) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
  62         @printf "    CC         $(subst $(obj)/,,$(@))\n"
  63         $(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,-\( $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,-\)
  64
  65 $(obj)/coreboot.a: $(objs)
  66         @printf "    AR         $(subst $(obj)/,,$(@))\n"
  67         rm -f $(obj)/coreboot.a
  68         $(AR) cr $(obj)/coreboot.a $(objs)
  69
  70 #######################################################################
  71 # done
  72
  73 crt0s :=
  74 ldscripts :=
  75 ldscripts += $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
  76 ldscripts += $(src)/arch/i386/lib/failover.lds
  77 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
  78 crt0s += $(src)/cpu/x86/16bit/entry16.inc
  79 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
  80 endif
  81 crt0s += $(src)/cpu/x86/32bit/entry32.inc
  82 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
  83 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
  84 crt0s += $(src)/cpu/x86/16bit/reset16.inc
  85 ldscripts += $(src)/cpu/x86/16bit/reset16.lds
  86 ifeq ($(CONFIG_ROMCC),y)
  87 crt0s += $(src)/arch/i386/lib/cpu_reset.inc
  88 endif
  89 crt0s += $(src)/arch/i386/lib/id.inc
  90 ldscripts += $(src)/arch/i386/lib/id.lds
  91 endif
  92
  93 crt0s += $(src)/cpu/x86/fpu_enable.inc
  94 ifeq ($(CONFIG_CPU_AMD_GX1),y)
  95 crt0s += $(src)/cpu/amd/model_gx1/cpu_setup.inc
  96 crt0s += $(src)/cpu/amd/model_gx1/gx_setup.inc
  97 endif
  98 ifeq ($(CONFIG_SSE),y)
  99 crt0s += $(src)/cpu/x86/sse_enable.inc
 100 endif
 101
 102 ifeq ($(CONFIG_CPU_AMD_LX),y)
 103 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
 104 endif
 105 ifeq ($(CONFIG_CPU_AMD_SOCKET_F),y)
 106 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 107 endif
 108 ifeq ($(CONFIG_CPU_AMD_SOCKET_F_1207),y)
 109 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 110 endif
 111 ifeq ($(CONFIG_CPU_AMD_SOCKET_AM2),y)
 112 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 113 endif
 114 ifeq ($(CONFIG_CPU_AMD_SOCKET_S1G1),y)
 115 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 116 endif
 117 ifeq ($(CONFIG_CPU_AMD_SOCKET_754),y)
 118 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 119 endif
 120 ifeq ($(CONFIG_CPU_AMD_SOCKET_939),y)
 121 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 122 endif
 123 ifeq ($(CONFIG_CPU_AMD_SOCKET_940),y)
 124 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 125 endif
 126 ifeq ($(CONFIG_CPU_INTEL_CORE),y)
 127 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
 128 endif
 129 # Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
 130 ifeq ($(CONFIG_CPU_INTEL_SOCKET_BGA956),y)
 131 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
 132 endif
 133 # should be CONFIG_CPU_VIA_C7, but bcom/winnetp680, jetway/j7f24, via/epia-cn, via/pc2500e don't use CAR yet
 134 ifeq ($(CONFIG_BOARD_VIA_VT8454C),y)
 135 crt0s += $(src)/cpu/via/car/cache_as_ram.inc
 136 endif
 137 ifeq ($(CONFIG_BOARD_VIA_EPIA_M700),y)
 138 crt0s += $(src)/cpu/via/car/cache_as_ram.inc
 139 endif
 140 # who else could use this?
 141 ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
 142 crt0s += $(src)/cpu/x86/car/cache_as_ram.inc
 143 ldscripts += $(src)/cpu/x86/car/cache_as_ram.lds
 144 endif
 145
 146 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 147 ifeq ($(CONFIG_ROMCC),y)
 148 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc
 149 endif
 150 endif
 151 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 152
 153 ifeq ($(CONFIG_SSE),y)
 154 crt0s += $(src)/cpu/x86/sse_disable.inc
 155 endif
 156 ifeq ($(CONFIG_MMX),y)
 157 crt0s += $(src)/cpu/x86/mmx_disable.inc
 158 endif
 159
 160 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
 161 ldscripts += $(src)/arch/i386/init/ldscript_apc.lb
 162 endif
 163
 164 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 165 crt0s += $(chipset_bootblock_inc)
 166 ldscripts += $(chipset_bootblock_lds)
 167 endif
 168
 169 OPTION_TABLE_H:=
 170 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
 171 OPTION_TABLE_H:=$(obj)/option_table.h
 172 endif
 173
 174 ifeq ($(CONFIG_ROMCC),y)
 175 ROMCCFLAGS ?= -mcpu=p2 -O2
 176
 177 $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib/failover.c
 178         $(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
 179
 180 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/romcc $(OPTION_TABLE_H) $(obj)/build.h
 181         $(obj)/romcc $(ROMCCFLAGS) -include $(obj)/build.h $(INCLUDES) $< -o $@
 182
 183 else
 184
 185 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h
 186         $(CC) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
 187
 188 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h
 189         $(CC) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -include $(obj)/build.h -I$(src) -I. -c -S $< -o $@.tmp1
 190         sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' $@.tmp1 > $@.tmp
 191         mv $@.tmp $@
 192         rm -f $@.tmp1
 193 endif
 194
 195 else
 196 # Only in first pass
 197
 198 # Things that appear in every board
 199 initobjs += $(obj)/mainboard/$(MAINBOARDDIR)/crt0.o
 200 objs += $(obj)/mainboard/$(MAINBOARDDIR)/mainboard.o
 201 ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
 202 objs += $(obj)/mainboard/$(MAINBOARDDIR)/mptable.o
 203 endif
 204 ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
 205 objs += $(obj)/mainboard/$(MAINBOARDDIR)/irq_tables.o
 206 endif
 207 ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
 208 objs += $(obj)/mainboard/$(MAINBOARDDIR)/reset.o
 209 endif
 210 ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
 211 objs += $(obj)/mainboard/$(MAINBOARDDIR)/acpi_tables.o
 212 objs += $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o
 213 # make doesn't have arithmetic operators or greater-than comparisons
 214 ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4)
 215 objs += $(obj)/mainboard/$(MAINBOARDDIR)/ssdt2.o
 216 objs += $(obj)/mainboard/$(MAINBOARDDIR)/ssdt3.o
 217 objs += $(obj)/mainboard/$(MAINBOARDDIR)/ssdt4.o
 218 endif
 219 ifeq ($(CONFIG_ACPI_SSDTX_NUM),5)
 220 objs += $(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.o
 221 endif
 222 ifeq ($(CONFIG_BOARD_HAS_FADT),y)
 223 objs += $(obj)/mainboard/$(MAINBOARDDIR)/fadt.o
 224 endif
 225 endif
 226
 227 ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
 228 objs += $(obj)/mainboard/$(MAINBOARDDIR)/get_bus_conf.o
 229 endif
 230
 231 endif
 232
 233 ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
 234 include $(src)/arch/i386/Makefile.bootblock.inc
 235 else
 236 include $(src)/arch/i386/Makefile.bigbootblock.inc
 237 endif