1 #######################################################################
2 # Take care of subdirectories
8 obj-$(CONFIG_HAVE_OPTION_TABLE) += ../../option_table.o
13 #######################################################################
14 # Build the final rom image
16 $(obj)/coreboot.rom: $(obj)/coreboot.bootblock $(obj)/coreboot_ram $(CBFSTOOL)
18 $(CBFSTOOL) $@ create $(shell expr 1024 \* $(CONFIG_COREBOOT_ROMSIZE_KB)) $(BOOTBLOCK_SIZE) $(obj)/coreboot.bootblock
19 if [ -f fallback/coreboot_apc ]; \
21 $(CBFSTOOL) $@ add-stage fallback/coreboot_apc fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \
23 $(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram fallback/coreboot_ram $(CBFS_COMPRESS_FLAG)
24 ifeq ($(CONFIG_PAYLOAD_NONE),y)
25 @printf " PAYLOAD none (as specified by user)\n"
27 @printf " PAYLOAD $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CBFS_PAYLOAD_COMPRESS_FLAG)\n"
28 $(CBFSTOOL) ./build/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
30 ifeq ($(CONFIG_VGA_BIOS),y)
31 @printf " VGABIOS $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
32 $(CBFSTOOL) ./build/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
34 @printf " CBFSPRINT build/coreboot.rom\n\n"
35 $(CBFSTOOL) build/coreboot.rom print
38 #######################################################################
41 $(obj)/coreboot.bootblock: $(obj)/coreboot
42 @printf " OBJCOPY $(subst $(shell pwd)/,,$(@))\n"
43 $(OBJCOPY) -O binary $< $@
45 $(obj)/ldscript.ld: $(ldscripts) $(obj)/ldoptions
46 printf 'INCLUDE "ldoptions"\n' > $@
47 printf '$(foreach ldscript,$(ldscripts),INCLUDE "$(ldscript)"\n)' >> $@
49 $(obj)/crt0_includes.h: $(crt0s)
50 printf '$(foreach crt0,$(obj)/config.h $(crt0s),#include "$(crt0)"\n)' > $@
52 $(obj)/mainboard/$(MAINBOARDDIR)/crt0.o: $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
53 $(CC) -I$(obj) -Wa,-acdlns -c -o $@ $< > $(dir $@)/crt0.disasm
55 $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(src)/arch/i386/init/crt0.S.lb $(obj)/crt0_includes.h
56 $(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< > $@.new && mv $@.new $@
58 $(obj)/coreboot: $(initobjs) $(obj)/ldscript.ld
59 @printf " LINK $(subst $(shell pwd)/,,$(@))\n"
60 $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/ldscript.ld $(initobjs)
61 $(NM) -n $(obj)/coreboot | sort > $(obj)/coreboot.map
63 #######################################################################
66 $(obj)/option_table.h $(obj)/option_table.c: $(obj)/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
67 @printf " OPTION $(subst $(shell pwd)/,,$(@))\n"
68 $(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c
70 $(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h $(obj)/config.h
71 @printf " HOSTCC $(subst $(shell pwd)/,,$(@))\n"
72 $(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@
74 #######################################################################
75 # Build the coreboot_ram (stage 2)
77 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/config/coreboot_ram.ld #ldoptions
78 @printf " CC $(subst $(shell pwd)/,,$(@))\n"
79 $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/config/coreboot_ram.ld $(obj)/coreboot_ram.o
80 $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
82 $(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $(drivers) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
83 @printf " CC $(subst $(shell pwd)/,,$(@))\n"
84 $(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,-\( $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,-\)
86 $(obj)/coreboot.a: $(objs)
87 @printf " AR $(subst $(shell pwd)/,,$(@))\n"
88 rm -f $(obj)/coreboot.a
89 $(AR) cr $(obj)/coreboot.a $(objs)
91 #######################################################################