2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2009-2010 coresystems GmbH
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; version 2 of the License.
10 ## This program is distributed in the hope that it will be useful,
11 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
12 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 ## GNU General Public License for more details.
15 ## You should have received a copy of the GNU General Public License
16 ## along with this program; if not, write to the Free Software
17 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 mainmenu "Coreboot Configuration"
27 This allows you to select certain advanced configuration options.
29 Warning: Only enable this option if you really know what you are
30 doing! You have been warned!
33 string "Local version string"
35 Append an extra string to the end of the coreboot version.
37 This can be useful if, for instance, you want to append the
38 respective board's hostname or some other identifying string to
39 the coreboot version number, so that you can easily distinguish
40 boot logs of different boards from each other.
43 string "CBFS prefix to use"
46 Select the prefix to all files put into the image. It's "fallback"
47 by default, "normal" is a common alternative.
53 This option allows you to select the compiler used for building
58 config COMPILER_LLVM_CLANG
62 config SCANBUILD_ENABLE
63 bool "Build with scan-build for static analysis"
66 Changes the build process to scan-build is used.
67 Requires scan-build in path.
69 config SCANBUILD_REPORT_LOCATION
70 string "Directory to put scan-build report in"
72 depends on SCANBUILD_ENABLE
74 Where the scan-build report should be stored
80 Enables the use of ccache for faster builds.
81 Requires ccache in path.
83 config SCONFIG_GENPARSER
84 bool "Generate SCONFIG parser using flex and bison"
88 Enable this option if you are working on the sconfig
89 device tree parser and made changes to sconfig.l and
93 config USE_OPTION_TABLE
94 bool "Use CMOS for configuration values"
96 depends on HAVE_OPTION_TABLE
98 Enable this option if coreboot shall read options from the "CMOS"
99 NVRAM instead of using hard coded values.
101 config COMPRESS_RAMSTAGE
102 bool "Compress ramstage with LZMA"
105 Compress ramstage to save memory in the flash image. Note
106 that decompression might slow down booting if the boot flash
107 is connected through a slow Link (i.e. SPI)
109 config INCLUDE_CONFIG_FILE
110 bool "Include the coreboot config file into the ROM image"
113 Include in CBFS the coreboot config file that was used to compile the ROM image
117 source src/mainboard/Kconfig
119 # This option is used to set the architecture of a mainboard to X86.
120 # It is usually set in mainboard/*/Kconfig.
126 source src/arch/x86/Kconfig
132 source src/cpu/Kconfig
133 comment "Northbridge"
134 source src/northbridge/Kconfig
135 comment "Southbridge"
136 source src/southbridge/Kconfig
138 source src/superio/Kconfig
140 source src/devices/Kconfig
141 comment "Embedded Controllers"
142 source src/ec/Kconfig
146 menu "Generic Drivers"
147 source src/drivers/Kconfig
150 config PCI_BUS_SEGN_BITS
166 config MMCONF_SUPPORT_DEFAULT
170 config MMCONF_SUPPORT
174 source src/console/Kconfig
176 # This should default to N and be set by SuperI/O drivers that have an UART
177 config HAVE_UART_IO_MAPPED
181 config HAVE_UART_MEMORY_MAPPED
185 config HAVE_ACPI_RESUME
189 config HAVE_ACPI_SLIC
193 config ACPI_SSDTX_NUM
197 config HAVE_HARD_RESET
199 default y if BOARD_HAS_HARD_RESET
202 This variable specifies whether a given board has a hard_reset
203 function, no matter if it's provided by board code or chipset code.
205 config HAVE_INIT_TIMER
207 default n if UDELAY_IO
210 config HAVE_MAINBOARD_RESOURCES
214 config USE_OPTION_TABLE
218 config HAVE_OPTION_TABLE
222 This variable specifies whether a given board has a cmos.layout
223 file containing NVRAM/CMOS bit definitions.
224 It defaults to 'n' but can be selected in mainboard/*/Kconfig.
230 config HAVE_SMI_HANDLER
234 config PCI_IO_CFG_EXT
242 # TODO: Can probably be removed once all chipsets have kconfig options for it.
247 config USE_WATCHDOG_ON_BOOT
255 Build board-specific VGA code.
261 Enable Unified Memory Architecture for graphics.
268 config HAVE_ACPI_TABLES
271 This variable specifies whether a given board has ACPI table support.
272 It is usually set in mainboard/*/Kconfig.
273 Whether or not the ACPI tables are actually generated by coreboot
274 is configurable by the user via GENERATE_ACPI_TABLES.
279 This variable specifies whether a given board has MP table support.
280 It is usually set in mainboard/*/Kconfig.
281 Whether or not the MP table is actually generated by coreboot
282 is configurable by the user via GENERATE_MP_TABLE.
284 config HAVE_PIRQ_TABLE
287 This variable specifies whether a given board has PIRQ table support.
288 It is usually set in mainboard/*/Kconfig.
289 Whether or not the PIRQ table is actually generated by coreboot
290 is configurable by the user via GENERATE_PIRQ_TABLE.
292 #These Options are here to avoid "undefined" warnings.
293 #The actual selection and help texts are in the following menu.
295 config GENERATE_ACPI_TABLES
297 default HAVE_ACPI_TABLES
299 config GENERATE_MP_TABLE
301 default HAVE_MP_TABLE
303 config GENERATE_PIRQ_TABLE
305 default HAVE_PIRQ_TABLE
307 config GENERATE_SMBIOS_TABLES
313 config WRITE_HIGH_TABLES
314 bool "Write 'high' tables to avoid being overwritten in F segment"
318 bool "Generate Multiboot tables (for GRUB2)"
321 config GENERATE_ACPI_TABLES
322 depends on HAVE_ACPI_TABLES
323 bool "Generate ACPI tables"
326 Generate ACPI tables for this board.
330 config GENERATE_MP_TABLE
331 depends on HAVE_MP_TABLE
332 bool "Generate an MP table"
335 Generate an MP table (conforming to the Intel MultiProcessor
336 specification 1.4) for this board.
340 config GENERATE_PIRQ_TABLE
341 depends on HAVE_PIRQ_TABLE
342 bool "Generate a PIRQ table"
345 Generate a PIRQ table for this board.
349 config GENERATE_SMBIOS_TABLES
351 bool "Generate SMBIOS tables"
354 Generate SMBIOS tables for this board.
363 prompt "Add a payload"
364 default PAYLOAD_NONE if !ARCH_X86
365 default PAYLOAD_SEABIOS if ARCH_X86
370 Select this option if you want to create an "empty" coreboot
371 ROM image for a certain mainboard, i.e. a coreboot ROM image
372 which does not yet contain a payload.
374 For such an image to be useful, you have to use 'cbfstool'
375 to add a payload to the ROM image later.
378 bool "An ELF executable payload"
380 Select this option if you have a payload image (an ELF file)
381 which coreboot should run as soon as the basic hardware
382 initialization is completed.
384 You will be able to specify the location and file name of the
387 config PAYLOAD_SEABIOS
391 Select this option if you want to build a coreboot image
392 with a SeaBIOS payload. If you don't know what this is
393 about, just leave it enabled.
395 See http://coreboot.org/Payloads for more information.
400 Select this option if you want to build a coreboot image
401 with a FILO payload. If you don't know what this is
402 about, just leave it enabled.
404 See http://coreboot.org/Payloads for more information.
409 prompt "SeaBIOS version"
410 default SEABIOS_STABLE
411 depends on PAYLOAD_SEABIOS
413 config SEABIOS_STABLE
416 Stable SeaBIOS version
417 config SEABIOS_MASTER
420 Newest SeaBIOS version
424 prompt "FILO version"
426 depends on PAYLOAD_FILO
439 string "Payload path and filename"
440 depends on PAYLOAD_ELF
441 default "payload.elf"
443 The path and filename of the ELF executable file to use as payload.
446 depends on PAYLOAD_SEABIOS
447 default "payloads/external/SeaBIOS/seabios/out/bios.bin.elf"
450 depends on PAYLOAD_FILO
451 default "payloads/external/FILO/filo/build/filo.elf"
453 # TODO: Defined if no payload? Breaks build?
454 config COMPRESSED_PAYLOAD_LZMA
455 bool "Use LZMA compression for payloads"
457 depends on PAYLOAD_ELF || PAYLOAD_SEABIOS || PAYLOAD_FILO
459 In order to reduce the size payloads take up in the ROM chip
460 coreboot can compress them using the LZMA algorithm.
462 config COMPRESSED_PAYLOAD_NRV2B
471 bool "Add a VGA BIOS image"
473 Select this option if you have a VGA BIOS image that you would
474 like to add to your ROM.
476 You will be able to specify the location and file name of the
480 string "VGA BIOS path and filename"
482 default "vgabios.bin"
484 The path and filename of the file to use as VGA BIOS.
487 string "VGA device PCI IDs"
491 The comma-separated PCI vendor and device ID that would associate
492 your VGA BIOS to your video card.
496 In the above example 1106 is the PCI vendor ID (in hex, but without
497 the "0x" prefix) and 3230 specifies the PCI device ID of the
498 video card (also in hex, without "0x" prefix).
501 bool "Add an MBI image"
502 depends on NORTHBRIDGE_INTEL_I82830
504 Select this option if you have an Intel MBI image that you would
505 like to add to your ROM.
507 You will be able to specify the location and file name of the
511 string "Intel MBI path and filename"
515 The path and filename of the file to use as VGA BIOS.
520 depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE
522 config FRAMEBUFFER_SET_VESA_MODE
523 prompt "Set VESA framebuffer mode"
525 depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE
527 Set VESA framebuffer mode (needed for bootsplash)
529 # TODO: Turn this into a "choice".
530 config FRAMEBUFFER_VESA_MODE
531 prompt "VESA framebuffer video mode"
534 depends on FRAMEBUFFER_SET_VESA_MODE
536 This option sets the resolution used for the coreboot framebuffer (and
537 bootsplash screen). Set to 0x117 for 1024x768x16. A diligent soul will
538 some day make this a "choice".
540 config FRAMEBUFFER_KEEP_VESA_MODE
541 prompt "Keep VESA framebuffer"
543 depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE
545 This option keeps the framebuffer mode set after coreboot finishes
546 execution. If this option is enabled, coreboot will pass a
547 framebuffer entry in its coreboot table and the payload will need a
548 framebuffer driver. If this option is disabled, coreboot will switch
549 back to text mode before handing control to a payload.
552 prompt "Show graphical bootsplash"
554 depends on FRAMEBUFFER_SET_VESA_MODE
556 This option shows a graphical bootsplash screen. The grapics are
557 loaded from the CBFS file bootsplash.jpg.
559 config BOOTSPLASH_FILE
560 string "Bootsplash path and filename"
561 depends on BOOTSPLASH
562 default "bootsplash.jpg"
564 The path and filename of the file to use as graphical bootsplash
565 screen. The file format has to be jpg.
570 # TODO: Better help text and detailed instructions.
572 bool "GDB debugging support"
575 If enabled, you will be able to set breakpoints for gdb debugging.
576 See src/arch/x86/lib/c_start.S for details.
578 config HAVE_DEBUG_RAM_SETUP
581 config DEBUG_RAM_SETUP
582 bool "Output verbose RAM init debug messages"
584 depends on HAVE_DEBUG_RAM_SETUP
586 This option enables additional RAM init related debug messages.
587 It is recommended to enable this when debugging issues on your
588 board which might be RAM init related.
590 Note: This option will increase the size of the coreboot image.
594 config HAVE_DEBUG_CAR
599 depends on HAVE_DEBUG_CAR
601 if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
602 # Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
603 # printk(BIOS_DEBUG, ...) calls.
605 bool "Output verbose Cache-as-RAM debug messages"
607 depends on HAVE_DEBUG_CAR
609 This option enables additional CAR related debug messages.
613 bool "Check PIRQ table consistency"
615 depends on GENERATE_PIRQ_TABLE
619 config HAVE_DEBUG_SMBUS
623 bool "Output verbose SMBus debug messages"
625 depends on HAVE_DEBUG_SMBUS
627 This option enables additional SMBus (and SPD) debug messages.
629 Note: This option will increase the size of the coreboot image.
634 bool "Output verbose SMI debug messages"
636 depends on HAVE_SMI_HANDLER
638 This option enables additional SMI related debug messages.
640 Note: This option will increase the size of the coreboot image.
644 config DEBUG_SMM_RELOCATION
645 bool "Debug SMM relocation code"
647 depends on HAVE_SMI_HANDLER
649 This option enables additional SMM handler relocation related
652 Note: This option will increase the size of the coreboot image.
659 # Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
660 # printk(BIOS_DEBUG, ...) calls.
661 if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
663 bool "Output verbose malloc debug messages"
666 This option enables additional malloc related debug messages.
668 Note: This option will increase the size of the coreboot image.
676 # Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
677 # printk(BIOS_DEBUG, ...) calls.
678 if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
680 bool "Output verbose ACPI debug messages"
683 This option enables additional ACPI related debug messages.
685 Note: This option will slightly increase the size of the coreboot image.
690 config REALMODE_DEBUG
692 depends on PCI_OPTION_ROM_RUN_REALMODE
694 if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
695 # Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
696 # printk(BIOS_DEBUG, ...) calls.
697 config REALMODE_DEBUG
698 bool "Enable debug messages for option ROM execution"
700 depends on PCI_OPTION_ROM_RUN_REALMODE
702 This option enables additional x86emu related debug messages.
704 Note: This option will increase the time to emulate a ROM.
710 bool "Output verbose x86emu debug messages"
712 depends on PCI_OPTION_ROM_RUN_YABEL
714 This option enables additional x86emu related debug messages.
716 Note: This option will increase the size of the coreboot image.
720 config X86EMU_DEBUG_JMP
721 bool "Trace JMP/RETF"
723 depends on X86EMU_DEBUG
725 Print information about JMP and RETF opcodes from x86emu.
727 Note: This option will increase the size of the coreboot image.
731 config X86EMU_DEBUG_TRACE
732 bool "Trace all opcodes"
734 depends on X86EMU_DEBUG
736 Print _all_ opcodes that are executed by x86emu.
738 WARNING: This will produce a LOT of output and take a long time.
740 Note: This option will increase the size of the coreboot image.
744 config X86EMU_DEBUG_PNP
745 bool "Log Plug&Play accesses"
747 depends on X86EMU_DEBUG
749 Print Plug And Play accesses made by option ROMs.
751 Note: This option will increase the size of the coreboot image.
755 config X86EMU_DEBUG_DISK
758 depends on X86EMU_DEBUG
760 Print Disk I/O related messages.
762 Note: This option will increase the size of the coreboot image.
766 config X86EMU_DEBUG_PMM
769 depends on X86EMU_DEBUG
771 Print messages related to POST Memory Manager (PMM).
773 Note: This option will increase the size of the coreboot image.
778 config X86EMU_DEBUG_VBE
779 bool "Debug VESA BIOS Extensions"
781 depends on X86EMU_DEBUG
783 Print messages related to VESA BIOS Extension (VBE) functions.
785 Note: This option will increase the size of the coreboot image.
789 config X86EMU_DEBUG_INT10
790 bool "Redirect INT10 output to console"
792 depends on X86EMU_DEBUG
794 Let INT10 (i.e. character output) calls print messages to debug output.
796 Note: This option will increase the size of the coreboot image.
800 config X86EMU_DEBUG_INTERRUPTS
801 bool "Log intXX calls"
803 depends on X86EMU_DEBUG
805 Print messages related to interrupt handling.
807 Note: This option will increase the size of the coreboot image.
811 config X86EMU_DEBUG_CHECK_VMEM_ACCESS
812 bool "Log special memory accesses"
814 depends on X86EMU_DEBUG
816 Print messages related to accesses to certain areas of the virtual
817 memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
819 Note: This option will increase the size of the coreboot image.
823 config X86EMU_DEBUG_MEM
824 bool "Log all memory accesses"
826 depends on X86EMU_DEBUG
828 Print memory accesses made by option ROM.
829 Note: This also includes accesses to fetch instructions.
831 Note: This option will increase the size of the coreboot image.
835 config X86EMU_DEBUG_IO
836 bool "Log IO accesses"
838 depends on X86EMU_DEBUG
840 Print I/O accesses made by option ROM.
842 Note: This option will increase the size of the coreboot image.
847 bool "Built-in low-level shell"
850 If enabled, you will have a low level shell to examine your machine.
851 Put llshell() in your (romstage) code to start the shell.
852 See src/arch/x86/llshell/llshell.inc for details.
855 bool "Trace function calls"
858 If enabled, every function will print information to console once
859 the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd)
860 the 0xaaaabbbb is the actual function and 0xccccdddd is EIP
861 of calling function. Please note some printk releated functions
862 are omitted from trace to have good looking console dumps.
865 config LIFT_BSP_APIC_ID
869 # These probably belong somewhere else, but they are needed somewhere.
870 config AP_CODE_IN_CAR
874 config RAMINIT_SYSINFO
878 config ENABLE_APIC_EXT_ID
882 config WARNINGS_ARE_ERRORS
886 config ID_SECTION_OFFSET
890 # The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE,
891 # POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are
892 # mutually exclusive. One of these options must be selected in the
893 # mainboard Kconfig if the chipset supports enabling and disabling of
894 # the power button. Chipset code uses the ENABLE_POWER_BUTTON option set
895 # in mainboard/Kconfig to know if the button should be enabled or not.
897 config POWER_BUTTON_DEFAULT_ENABLE
900 Select when the board has a power button which can optionally be
901 disabled by the user.
903 config POWER_BUTTON_DEFAULT_DISABLE
906 Select when the board has a power button which can optionally be
907 enabled by the user, e.g. when the board ships with a jumper over
908 the power switch contacts.
910 config POWER_BUTTON_FORCE_ENABLE
913 Select when the board requires that the power button is always
916 config POWER_BUTTON_FORCE_DISABLE
919 Select when the board requires that the power button is always
920 disabled, e.g. when it has been hardwired to ground.
922 config POWER_BUTTON_IS_OPTIONAL
924 default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE
925 default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE)
927 Internal option that controls ENABLE_POWER_BUTTON visibility.
929 source src/Kconfig.deprecated_options