2 * tramp-amd64.c: JIT trampoline code for amd64
5 * Dietmar Maurer (dietmar@ximian.com)
6 * Zoltan Varga (vargaz@gmail.com)
8 * (C) 2001 Ximian, Inc.
14 #include <mono/metadata/appdomain.h>
15 #include <mono/metadata/marshal.h>
16 #include <mono/metadata/tabledefs.h>
17 #include <mono/metadata/mono-debug-debugger.h>
18 #include <mono/arch/amd64/amd64-codegen.h>
20 #ifdef HAVE_VALGRIND_MEMCHECK_H
21 #include <valgrind/memcheck.h>
25 #include "mini-amd64.h"
27 #define IS_REX(inst) (((inst) >= 0x40) && ((inst) <= 0x4f))
29 static guint8* nullified_class_init_trampoline;
32 * mono_arch_get_unbox_trampoline:
33 * @gsctx: the generic sharing context
35 * @addr: pointer to native code for @m
37 * when value type methods are called through the vtable we need to unbox the
38 * this argument. This method returns a pointer to a trampoline which does
39 * unboxing before calling the method
42 mono_arch_get_unbox_trampoline (MonoGenericSharingContext *gsctx, MonoMethod *m, gpointer addr)
47 MonoDomain *domain = mono_domain_get ();
49 this_reg = mono_arch_get_this_arg_reg (mono_method_signature (m), gsctx, NULL);
51 mono_domain_lock (domain);
52 start = code = mono_code_manager_reserve (domain->code_mp, 20);
53 mono_domain_unlock (domain);
55 amd64_alu_reg_imm (code, X86_ADD, this_reg, sizeof (MonoObject));
56 /* FIXME: Optimize this */
57 amd64_mov_reg_imm (code, AMD64_RAX, addr);
58 amd64_jump_reg (code, AMD64_RAX);
59 g_assert ((code - start) < 20);
61 mono_arch_flush_icache (start, code - start);
67 * mono_arch_patch_callsite:
69 * Patch the callsite whose address is given by ORIG_CODE so it calls ADDR. ORIG_CODE
70 * points to the pc right after the call.
73 mono_arch_patch_callsite (guint8 *method_start, guint8 *orig_code, guint8 *addr)
77 gboolean can_write = mono_breakpoint_clean_code (method_start, orig_code, 14, buf, sizeof (buf));
81 if (((code [-13] == 0x49) && (code [-12] == 0xbb)) || (code [-5] == 0xe8)) {
82 if (code [-5] != 0xe8) {
84 InterlockedExchangePointer ((gpointer*)(orig_code - 11), addr);
85 #ifdef HAVE_VALGRIND_MEMCHECK_H
86 VALGRIND_DISCARD_TRANSLATIONS (orig_code - 11, sizeof (gpointer));
90 if ((((guint64)(addr)) >> 32) != 0) {
91 /* Print some diagnostics */
92 MonoJitInfo *ji = mono_jit_info_table_find (mono_domain_get (), (char*)orig_code);
94 fprintf (stderr, "At %s, offset 0x%zx\n", mono_method_full_name (ji->method, TRUE), (guint8*)orig_code - (guint8*)ji->code_start);
95 fprintf (stderr, "Addr: %p\n", addr);
96 ji = mono_jit_info_table_find (mono_domain_get (), (char*)addr);
98 fprintf (stderr, "Callee: %s\n", mono_method_full_name (ji->method, TRUE));
99 g_assert_not_reached ();
101 g_assert ((((guint64)(orig_code)) >> 32) == 0);
103 InterlockedExchange ((gint32*)(orig_code - 4), ((gint64)addr - (gint64)orig_code));
104 #ifdef HAVE_VALGRIND_MEMCHECK_H
105 VALGRIND_DISCARD_TRANSLATIONS (orig_code - 5, 4);
110 else if ((code [-7] == 0x41) && (code [-6] == 0xff) && (code [-5] == 0x15)) {
111 /* call *<OFFSET>(%rip) */
112 gpointer *got_entry = (gpointer*)((guint8*)orig_code + (*(guint32*)(orig_code - 4)));
114 InterlockedExchangePointer (got_entry, addr);
115 #ifdef HAVE_VALGRIND_MEMCHECK_H
116 VALGRIND_DISCARD_TRANSLATIONS (orig_code - 5, sizeof (gpointer));
123 mono_arch_patch_plt_entry (guint8 *code, guint8 *addr)
126 gpointer *plt_jump_table_entry;
128 /* A PLT entry: jmp *<DISP>(%rip) */
129 g_assert (code [0] == 0xff);
130 g_assert (code [1] == 0x25);
132 disp = *(gint32*)(code + 2);
134 plt_jump_table_entry = (gpointer*)(code + 6 + disp);
136 InterlockedExchangePointer (plt_jump_table_entry, addr);
140 mono_arch_nullify_class_init_trampoline (guint8 *code, gssize *regs)
143 gboolean can_write = mono_breakpoint_clean_code (NULL, code, 7, buf, sizeof (buf));
151 * A given byte sequence can match more than case here, so we have to be
152 * really careful about the ordering of the cases. Longer sequences
155 if ((code [-4] == 0x41) && (code [-3] == 0xff) && (code [-2] == 0x15)) {
156 gpointer *vtable_slot;
158 /* call *<OFFSET>(%rip) */
159 vtable_slot = mono_arch_get_vcall_slot_addr (code + 3, (gpointer*)regs);
160 g_assert (vtable_slot);
162 *vtable_slot = nullified_class_init_trampoline;
163 } else if (code [-2] == 0xe8) {
165 guint8 *buf = code - 2;
172 } else if ((code [0] == 0x41) && (code [1] == 0xff)) {
174 /* happens on machines without MAP_32BIT like freebsd */
175 /* amd64_set_reg_template is 10 bytes long */
176 guint8* buf = code - 10;
178 /* FIXME: Make this thread safe */
179 /* Padding code suggested by the AMD64 Opt Manual */
193 } else if (code [0] == 0x90 || code [0] == 0xeb || code [0] == 0x66) {
194 /* Already changed by another thread */
197 printf ("Invalid trampoline sequence: %x %x %x %x %x %x %x\n", code [0], code [1], code [2], code [3],
198 code [4], code [5], code [6]);
199 g_assert_not_reached ();
204 mono_arch_nullify_plt_entry (guint8 *code)
206 if (mono_aot_only && !nullified_class_init_trampoline)
207 nullified_class_init_trampoline = mono_aot_get_named_code ("nullified_class_init_trampoline");
209 mono_arch_patch_plt_entry (code, nullified_class_init_trampoline);
213 mono_arch_create_trampoline_code (MonoTrampolineType tramp_type)
218 return mono_arch_create_trampoline_code_full (tramp_type, &code_size, &ji, FALSE);
222 mono_arch_create_trampoline_code_full (MonoTrampolineType tramp_type, guint32 *code_size, MonoJumpInfo **ji, gboolean aot)
224 guint8 *buf, *code, *tramp, *br [2], *r11_save_code, *after_r11_save_code;
225 int i, lmf_offset, offset, res_offset, arg_offset, tramp_offset, saved_regs_offset;
226 int saved_fpregs_offset, rbp_offset, framesize, orig_rsp_to_rbp_offset;
229 if (tramp_type == MONO_TRAMPOLINE_JUMP)
234 code = buf = mono_global_codeman_reserve (524);
238 framesize = 524 + sizeof (MonoLMF);
239 framesize = (framesize + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1);
241 if (tramp_type == MONO_TRAMPOLINE_GENERIC_CLASS_INIT) {
242 static int byte_offset = -1;
243 static guint8 bitmask;
248 mono_marshal_find_bitfield_offset (MonoVTable, initialized, &byte_offset, &bitmask);
250 amd64_test_membase_imm_size (code, MONO_ARCH_VTABLE_REG, byte_offset, bitmask, 1);
252 amd64_branch8 (code, X86_CC_Z, -1, 1);
256 x86_patch (jump, code);
259 orig_rsp_to_rbp_offset = 0;
260 r11_save_code = code;
261 /* Reserve 5 bytes for the mov_membase_reg to save R11 */
263 after_r11_save_code = code;
266 * The generic class init trampoline is called directly by
267 * JITted code, there is no specific trampoline. The lazy
268 * fetch trampolines behave like generic class init
271 if (tramp_type != MONO_TRAMPOLINE_GENERIC_CLASS_INIT &&
272 tramp_type != MONO_TRAMPOLINE_RGCTX_LAZY_FETCH) {
273 /* Pop the return address off the stack */
274 amd64_pop_reg (code, AMD64_R11);
275 orig_rsp_to_rbp_offset += 8;
279 * Allocate a new stack frame
281 amd64_push_reg (code, AMD64_RBP);
282 orig_rsp_to_rbp_offset -= 8;
283 amd64_mov_reg_reg (code, AMD64_RBP, AMD64_RSP, 8);
284 amd64_alu_reg_imm (code, X86_SUB, AMD64_RSP, framesize);
287 rbp_offset = - offset;
290 tramp_offset = - offset;
293 arg_offset = - offset;
295 if (tramp_type != MONO_TRAMPOLINE_GENERIC_CLASS_INIT &&
296 tramp_type != MONO_TRAMPOLINE_RGCTX_LAZY_FETCH) {
297 /* Compute the trampoline address from the return address */
299 /* 7 = length of call *<offset>(rip) */
300 amd64_alu_reg_imm (code, X86_SUB, AMD64_R11, 7);
302 /* 5 = length of amd64_call_membase () */
303 amd64_alu_reg_imm (code, X86_SUB, AMD64_R11, 5);
305 amd64_mov_membase_reg (code, AMD64_RBP, tramp_offset, AMD64_R11, 8);
307 amd64_mov_membase_imm (code, AMD64_RBP, tramp_offset, 0, 8);
311 res_offset = - offset;
313 /* Save all registers */
315 offset += AMD64_NREG * 8;
316 saved_regs_offset = - offset;
317 for (i = 0; i < AMD64_NREG; ++i) {
318 if (i == AMD64_RBP) {
319 /* RAX is already saved */
320 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_RBP, rbp_offset, 8);
321 amd64_mov_membase_reg (code, AMD64_RBP, saved_regs_offset + (i * 8), AMD64_RAX, 8);
322 } else if (i != AMD64_R11) {
323 amd64_mov_membase_reg (code, AMD64_RBP, saved_regs_offset + (i * 8), i, 8);
326 /* We have to save R11 right at the start of
327 the trampoline code because it's used as a
329 amd64_mov_membase_reg (r11_save_code, AMD64_RSP, saved_regs_offset + orig_rsp_to_rbp_offset + (i * 8), i, 8);
330 g_assert (r11_save_code == after_r11_save_code);
334 saved_fpregs_offset = - offset;
335 for (i = 0; i < 8; ++i)
336 amd64_movsd_membase_reg (code, AMD64_RBP, saved_fpregs_offset + (i * 8), i);
338 if (tramp_type != MONO_TRAMPOLINE_GENERIC_CLASS_INIT &&
339 tramp_type != MONO_TRAMPOLINE_RGCTX_LAZY_FETCH) {
340 /* Obtain the trampoline argument which is encoded in the instruction stream */
342 /* Load the GOT offset */
343 amd64_mov_reg_membase (code, AMD64_R11, AMD64_RBP, tramp_offset, 8);
344 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_R11, 7, 4);
345 /* Compute the address of the GOT slot */
346 amd64_alu_reg_reg_size (code, X86_ADD, AMD64_R11, AMD64_RAX, 8);
348 amd64_mov_reg_membase (code, AMD64_R11, AMD64_R11, 0, 8);
350 amd64_mov_reg_membase (code, AMD64_R11, AMD64_RBP, tramp_offset, 8);
351 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_R11, 5, 1);
352 amd64_widen_reg (code, AMD64_RAX, AMD64_RAX, TRUE, FALSE);
353 amd64_alu_reg_imm_size (code, X86_CMP, AMD64_RAX, 4, 1);
355 x86_branch8 (code, X86_CC_NE, 6, FALSE);
356 /* 32 bit immediate */
357 amd64_mov_reg_membase (code, AMD64_R11, AMD64_R11, 6, 4);
359 x86_jump8 (code, 10);
360 /* 64 bit immediate */
361 mono_amd64_patch (br [0], code);
362 amd64_mov_reg_membase (code, AMD64_R11, AMD64_R11, 6, 8);
363 mono_amd64_patch (br [1], code);
365 amd64_mov_membase_reg (code, AMD64_RBP, arg_offset, AMD64_R11, 8);
367 amd64_mov_membase_reg (code, AMD64_RBP, arg_offset, MONO_ARCH_VTABLE_REG, 8);
372 offset += sizeof (MonoLMF);
373 lmf_offset = - offset;
377 amd64_mov_reg_membase (code, AMD64_R11, AMD64_RBP, 8, 8);
379 amd64_mov_reg_imm (code, AMD64_R11, 0);
380 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, rip), AMD64_R11, 8);
382 amd64_mov_reg_membase (code, AMD64_R11, AMD64_RSP, framesize, 8);
383 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, rbp), AMD64_R11, 8);
385 amd64_mov_reg_reg (code, AMD64_R11, AMD64_RSP, 8);
386 amd64_alu_reg_imm (code, X86_ADD, AMD64_R11, framesize + 16);
387 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, rsp), AMD64_R11, 8);
389 if (tramp_type == MONO_TRAMPOLINE_JIT || tramp_type == MONO_TRAMPOLINE_JUMP) {
390 amd64_mov_reg_membase (code, AMD64_R11, AMD64_RBP, arg_offset, 8);
391 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method), AMD64_R11, 8);
393 amd64_mov_membase_imm (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method), 0, 8);
395 /* Save callee saved regs */
396 #ifdef PLATFORM_WIN32
397 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, rdi), AMD64_RDI, 8);
398 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, rsi), AMD64_RSI, 8);
400 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, rbx), AMD64_RBX, 8);
401 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, r12), AMD64_R12, 8);
402 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, r13), AMD64_R13, 8);
403 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, r14), AMD64_R14, 8);
404 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, r15), AMD64_R15, 8);
407 *ji = mono_patch_info_list_prepend (*ji, code - buf, MONO_PATCH_INFO_JIT_ICALL_ADDR, "mono_get_lmf_addr");
408 amd64_mov_reg_membase (code, AMD64_R11, AMD64_RIP, 0, 8);
410 amd64_mov_reg_imm (code, AMD64_R11, mono_get_lmf_addr);
412 amd64_call_reg (code, AMD64_R11);
415 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), AMD64_RAX, 8);
416 /* Save previous_lmf */
417 /* Set the lowest bit to 1 to signal that this LMF has the ip field set */
418 amd64_mov_reg_membase (code, AMD64_R11, AMD64_RAX, 0, 8);
419 amd64_alu_reg_imm_size (code, X86_ADD, AMD64_R11, 1, 8);
420 amd64_mov_membase_reg (code, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), AMD64_R11, 8);
422 amd64_lea_membase (code, AMD64_R11, AMD64_RBP, lmf_offset);
423 amd64_mov_membase_reg (code, AMD64_RAX, 0, AMD64_R11, 8);
427 /* Arg1 is the pointer to the saved registers */
428 amd64_lea_membase (code, AMD64_ARG_REG1, AMD64_RBP, saved_regs_offset);
430 /* Arg2 is the address of the calling code */
432 amd64_mov_reg_membase (code, AMD64_ARG_REG2, AMD64_RBP, 8, 8);
434 amd64_mov_reg_imm (code, AMD64_ARG_REG2, 0);
436 /* Arg3 is the method/vtable ptr */
437 amd64_mov_reg_membase (code, AMD64_ARG_REG3, AMD64_RBP, arg_offset, 8);
439 /* Arg4 is the trampoline address */
440 amd64_mov_reg_membase (code, AMD64_ARG_REG4, AMD64_RBP, tramp_offset, 8);
443 char *icall_name = g_strdup_printf ("trampoline_func_%d", tramp_type);
444 *ji = mono_patch_info_list_prepend (*ji, code - buf, MONO_PATCH_INFO_JIT_ICALL_ADDR, icall_name);
445 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_RIP, 0, 8);
447 tramp = (guint8*)mono_get_trampoline_func (tramp_type);
448 amd64_mov_reg_imm (code, AMD64_RAX, tramp);
450 amd64_call_reg (code, AMD64_RAX);
452 /* Check for thread interruption */
453 /* This is not perf critical code so no need to check the interrupt flag */
455 * Have to call the _force_ variant, since there could be a protected wrapper on the top of the stack.
457 amd64_mov_membase_reg (code, AMD64_RBP, res_offset, AMD64_RAX, 8);
459 *ji = mono_patch_info_list_prepend (*ji, code - buf, MONO_PATCH_INFO_JIT_ICALL_ADDR, "mono_thread_force_interruption_checkpoint");
460 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_RIP, 0, 8);
462 amd64_mov_reg_imm (code, AMD64_RAX, (guint8*)mono_thread_force_interruption_checkpoint);
464 amd64_call_reg (code, AMD64_RAX);
465 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_RBP, res_offset, 8);
469 amd64_mov_reg_membase (code, AMD64_RCX, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), 8);
470 amd64_alu_reg_imm_size (code, X86_SUB, AMD64_RCX, 1, 8);
471 amd64_mov_reg_membase (code, AMD64_R11, AMD64_RBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), 8);
472 amd64_mov_membase_reg (code, AMD64_R11, 0, AMD64_RCX, 8);
474 /* Restore argument registers, r10 (needed to pass rgctx to
475 static shared generic methods) and r11 (imt register for
477 for (i = 0; i < AMD64_NREG; ++i)
478 if (AMD64_IS_ARGUMENT_REG (i) || i == AMD64_R10 || i == AMD64_R11)
479 amd64_mov_reg_membase (code, i, AMD64_RBP, saved_regs_offset + (i * 8), 8);
482 * FIXME: When using aot-only, the called code might be a C vararg function
483 * which uses %rax as well.
484 * We could restore it, but we would have to use another register to store the
485 * target address, and we don't have any left.
486 * Also, the default AOT plt trampolines overwrite 'rax'.
489 for (i = 0; i < 8; ++i)
490 amd64_movsd_reg_membase (code, i, AMD64_RBP, saved_fpregs_offset + (i * 8));
495 if (tramp_type == MONO_TRAMPOLINE_CLASS_INIT ||
496 tramp_type == MONO_TRAMPOLINE_GENERIC_CLASS_INIT ||
497 tramp_type == MONO_TRAMPOLINE_RGCTX_LAZY_FETCH)
500 /* call the compiled method */
501 amd64_jump_reg (code, AMD64_RAX);
504 g_assert ((code - buf) <= 524);
506 mono_arch_flush_icache (buf, code - buf);
508 *code_size = code - buf;
510 if (tramp_type == MONO_TRAMPOLINE_CLASS_INIT) {
513 /* Initialize the nullified class init trampoline used in the AOT case */
514 nullified_class_init_trampoline = mono_arch_get_nullified_class_init_trampoline (&code_len);
521 mono_arch_get_nullified_class_init_trampoline (guint32 *code_len)
525 code = buf = mono_global_codeman_reserve (16);
528 mono_arch_flush_icache (buf, code - buf);
530 *code_len = code - buf;
536 mono_arch_create_specific_trampoline (gpointer arg1, MonoTrampolineType tramp_type, MonoDomain *domain, guint32 *code_len)
538 guint8 *code, *buf, *tramp;
541 tramp = mono_get_trampoline_code (tramp_type);
543 if ((((guint64)arg1) >> 32) == 0)
548 mono_domain_lock (domain);
549 code = buf = mono_code_manager_reserve_align (domain->code_mp, size, 1);
550 mono_domain_unlock (domain);
552 amd64_call_code (code, tramp);
553 /* The trampoline code will obtain the argument from the instruction stream */
554 if ((((guint64)arg1) >> 32) == 0) {
556 *(guint32*)(code + 1) = (gint64)arg1;
560 *(guint64*)(code + 1) = (gint64)arg1;
564 g_assert ((code - buf) <= size);
569 mono_arch_flush_icache (buf, size);
575 mono_arch_create_rgctx_lazy_fetch_trampoline (guint32 slot)
577 guint8 *tramp = mono_get_trampoline_code (MONO_TRAMPOLINE_RGCTX_LAZY_FETCH);
579 guint8 **rgctx_null_jumps;
587 mrgctx = MONO_RGCTX_SLOT_IS_MRGCTX (slot);
588 index = MONO_RGCTX_SLOT_INDEX (slot);
590 index += sizeof (MonoMethodRuntimeGenericContext) / sizeof (gpointer);
591 for (depth = 0; ; ++depth) {
592 int size = mono_class_rgctx_get_array_size (depth, mrgctx);
594 if (index < size - 1)
599 tramp_size = 36 + 8 * depth;
601 code = buf = mono_global_codeman_reserve (tramp_size);
603 rgctx_null_jumps = g_malloc (sizeof (guint8*) * (depth + 2));
607 amd64_mov_reg_reg (buf, AMD64_RAX, AMD64_ARG_REG1, 8);
609 /* load rgctx ptr from vtable */
610 amd64_mov_reg_membase (buf, AMD64_RAX, AMD64_ARG_REG1, G_STRUCT_OFFSET (MonoVTable, runtime_generic_context), 8);
611 /* is the rgctx ptr null? */
612 amd64_test_reg_reg (buf, AMD64_RAX, AMD64_RAX);
613 /* if yes, jump to actual trampoline */
614 rgctx_null_jumps [0] = buf;
615 amd64_branch8 (buf, X86_CC_Z, -1, 1);
618 for (i = 0; i < depth; ++i) {
619 /* load ptr to next array */
620 if (mrgctx && i == 0)
621 amd64_mov_reg_membase (buf, AMD64_RAX, AMD64_RAX, sizeof (MonoMethodRuntimeGenericContext), 8);
623 amd64_mov_reg_membase (buf, AMD64_RAX, AMD64_RAX, 0, 8);
624 /* is the ptr null? */
625 amd64_test_reg_reg (buf, AMD64_RAX, AMD64_RAX);
626 /* if yes, jump to actual trampoline */
627 rgctx_null_jumps [i + 1] = buf;
628 amd64_branch8 (buf, X86_CC_Z, -1, 1);
632 amd64_mov_reg_membase (buf, AMD64_RAX, AMD64_RAX, sizeof (gpointer) * (index + 1), 8);
633 /* is the slot null? */
634 amd64_test_reg_reg (buf, AMD64_RAX, AMD64_RAX);
635 /* if yes, jump to actual trampoline */
636 rgctx_null_jumps [depth + 1] = buf;
637 amd64_branch8 (buf, X86_CC_Z, -1, 1);
638 /* otherwise return */
641 for (i = mrgctx ? 1 : 0; i <= depth + 1; ++i)
642 x86_patch (rgctx_null_jumps [i], buf);
644 g_free (rgctx_null_jumps);
646 /* move the rgctx pointer to the VTABLE register */
647 amd64_mov_reg_reg (buf, MONO_ARCH_VTABLE_REG, AMD64_ARG_REG1, 8);
648 /* store the slot in RAX */
649 amd64_mov_reg_imm (buf, AMD64_RAX, slot);
650 /* jump to the actual trampoline */
651 amd64_jump_code (buf, tramp);
653 mono_arch_flush_icache (code, buf - code);
655 g_assert (buf - code <= tramp_size);
661 mono_arch_get_rgctx_lazy_fetch_offset (gpointer *regs)
663 return (guint32)(gulong)(regs [AMD64_RAX]);
667 mono_arch_invalidate_method (MonoJitInfo *ji, void *func, gpointer func_arg)
669 /* FIXME: This is not thread safe */
670 guint8 *code = ji->code_start;
672 amd64_mov_reg_imm (code, AMD64_ARG_REG1, func_arg);
673 amd64_mov_reg_imm (code, AMD64_R11, func);
675 x86_push_imm (code, (guint64)func_arg);
676 amd64_call_reg (code, AMD64_R11);