mono/mini/mini-x86.c

   1 /*
   2  * mini-x86.c: x86 backend for the Mono code generator
   3  *
   4  * Authors:
   5  *   Paolo Molaro (lupus@ximian.com)
   6  *   Dietmar Maurer (dietmar@ximian.com)
   7  *
   8  * (C) 2003 Ximian, Inc.
   9  */
  10 #include "mini.h"
  11 #include <string.h>
  12 #include <math.h>
  13
  14 #include <mono/metadata/appdomain.h>
  15 #include <mono/metadata/debug-helpers.h>
  16 #include <mono/metadata/profiler-private.h>
  17
  18 #include "mini-x86.h"
  19 #include "inssel.h"
  20 #include "cpu-pentium.h"
  21
  22 const char*
  23 mono_arch_regname (int reg) {
  24         switch (reg) {
  25         case X86_EAX: return "%eax";
  26         case X86_EBX: return "%ebx";
  27         case X86_ECX: return "%ecx";
  28         case X86_EDX: return "%edx";
  29         case X86_ESP: return "%esp";
  30         case X86_EBP: return "%ebp";
  31         case X86_EDI: return "%edi";
  32         case X86_ESI: return "%esi";
  33         }
  34         return "unknown";
  35 }
  36
  37 typedef struct {
  38         guint16 size;
  39         guint16 offset;
  40         guint8  pad;
  41 } MonoJitArgumentInfo;
  42
  43 /*
  44  * arch_get_argument_info:
  45  * @csig:  a method signature
  46  * @param_count: the number of parameters to consider
  47  * @arg_info: an array to store the result infos
  48  *
  49  * Gathers information on parameters such as size, alignment and
  50  * padding. arg_info should be large enought to hold param_count + 1 entries.
  51  *
  52  * Returns the size of the activation frame.
  53  */
  54 static int
  55 arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
  56 {
  57         int k, frame_size = 0;
  58         int size, align, pad;
  59         int offset = 8;
  60
  61         if (MONO_TYPE_ISSTRUCT (csig->ret)) {
  62                 frame_size += sizeof (gpointer);
  63                 offset += 4;
  64         }
  65
  66         arg_info [0].offset = offset;
  67
  68         if (csig->hasthis) {
  69                 frame_size += sizeof (gpointer);
  70                 offset += 4;
  71         }
  72
  73         arg_info [0].size = frame_size;
  74
  75         for (k = 0; k < param_count; k++) {
  76
  77                 if (csig->pinvoke)
  78                         size = mono_type_native_stack_size (csig->params [k], &align);
  79                 else
  80                         size = mono_type_stack_size (csig->params [k], &align);
  81
  82                 /* ignore alignment for now */
  83                 align = 1;
  84
  85                 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
  86                 arg_info [k].pad = pad;
  87                 frame_size += size;
  88                 arg_info [k + 1].pad = 0;
  89                 arg_info [k + 1].size = size;
  90                 offset += pad;
  91                 arg_info [k + 1].offset = offset;
  92                 offset += size;
  93         }
  94
  95         align = MONO_ARCH_FRAME_ALIGNMENT;
  96         frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
  97         arg_info [k].pad = pad;
  98
  99         return frame_size;
 100 }
 101
 102 static int indent_level = 0;
 103
 104 static void indent (int diff) {
 105         int v = indent_level;
 106         while (v-- > 0) {
 107                 printf (". ");
 108         }
 109         indent_level += diff;
 110 }
 111
 112 static void
 113 enter_method (MonoMethod *method, char *ebp)
 114 {
 115         int i, j;
 116         MonoClass *class;
 117         MonoObject *o;
 118         MonoJitArgumentInfo *arg_info;
 119         MonoMethodSignature *sig;
 120         char *fname;
 121
 122         fname = mono_method_full_name (method, TRUE);
 123         indent (1);
 124         printf ("ENTER: %s(", fname);
 125         g_free (fname);
 126
 127         if (((int)ebp & (MONO_ARCH_FRAME_ALIGNMENT - 1)) != 0) {
 128                 g_error ("unaligned stack detected (%p)", ebp);
 129         }
 130
 131         sig = method->signature;
 132
 133         arg_info = alloca (sizeof (MonoJitArgumentInfo) * (sig->param_count + 1));
 134
 135         arch_get_argument_info (sig, sig->param_count, arg_info);
 136
 137         if (MONO_TYPE_ISSTRUCT (method->signature->ret)) {
 138                 g_assert (!method->signature->ret->byref);
 139
 140                 printf ("VALUERET:%p, ", *((gpointer *)(ebp + 8)));
 141         }
 142
 143         if (method->signature->hasthis) {
 144                 gpointer *this = (gpointer *)(ebp + arg_info [0].offset);
 145                 if (method->klass->valuetype) {
 146                         printf ("value:%p, ", *this);
 147                 } else {
 148                         o = *((MonoObject **)this);
 149
 150                         if (o) {
 151                                 class = o->vtable->klass;
 152
 153                                 if (class == mono_defaults.string_class) {
 154                                         printf ("this:[STRING:%p:%s], ", o, mono_string_to_utf8 ((MonoString *)o));
 155                                 } else {
 156                                         printf ("this:%p[%s.%s], ", o, class->name_space, class->name);
 157                                 }
 158                         } else
 159                                 printf ("this:NULL, ");
 160                 }
 161         }
 162
 163         for (i = 0; i < method->signature->param_count; ++i) {
 164                 gpointer *cpos = (gpointer *)(ebp + arg_info [i + 1].offset);
 165                 int size = arg_info [i + 1].size;
 166
 167                 MonoType *type = method->signature->params [i];
 168
 169                 if (type->byref) {
 170                         printf ("[BYREF:%p], ", *cpos);
 171                 } else switch (type->type) {
 172
 173                 case MONO_TYPE_I:
 174                 case MONO_TYPE_U:
 175                         printf ("%p, ", (gpointer)*((int *)(cpos)));
 176                         break;
 177                 case MONO_TYPE_BOOLEAN:
 178                 case MONO_TYPE_CHAR:
 179                 case MONO_TYPE_I1:
 180                 case MONO_TYPE_U1:
 181                 case MONO_TYPE_I2:
 182                 case MONO_TYPE_U2:
 183                 case MONO_TYPE_I4:
 184                 case MONO_TYPE_U4:
 185                         printf ("%d, ", *((int *)(cpos)));
 186                         break;
 187                 case MONO_TYPE_STRING: {
 188                         MonoString *s = *((MonoString **)cpos);
 189                         if (s) {
 190                                 g_assert (((MonoObject *)s)->vtable->klass == mono_defaults.string_class);
 191                                 printf ("[STRING:%p:%s], ", s, mono_string_to_utf8 (s));
 192                         } else
 193                                 printf ("[STRING:null], ");
 194                         break;
 195                 }
 196                 case MONO_TYPE_CLASS:
 197                 case MONO_TYPE_OBJECT: {
 198                         o = *((MonoObject **)cpos);
 199                         if (o) {
 200                                 class = o->vtable->klass;
 201
 202                                 if (class == mono_defaults.string_class) {
 203                                         printf ("[STRING:%p:%s], ", o, mono_string_to_utf8 ((MonoString *)o));
 204                                 } else if (class == mono_defaults.int32_class) {
 205                                         printf ("[INT32:%p:%d], ", o, *(gint32 *)((char *)o + sizeof (MonoObject)));
 206                                 } else
 207                                         printf ("[%s.%s:%p], ", class->name_space, class->name, o);
 208                         } else {
 209                                 printf ("%p, ", *((gpointer *)(cpos)));
 210                         }
 211                         break;
 212                 }
 213                 case MONO_TYPE_PTR:
 214                 case MONO_TYPE_FNPTR:
 215                 case MONO_TYPE_ARRAY:
 216                 case MONO_TYPE_SZARRAY:
 217                         printf ("%p, ", *((gpointer *)(cpos)));
 218                         break;
 219                 case MONO_TYPE_I8:
 220                 case MONO_TYPE_U8:
 221                         printf ("0x%016llx, ", *((gint64 *)(cpos)));
 222                         break;
 223                 case MONO_TYPE_R4:
 224                         printf ("%f, ", *((float *)(cpos)));
 225                         break;
 226                 case MONO_TYPE_R8:
 227                         printf ("%f, ", *((double *)(cpos)));
 228                         break;
 229                 case MONO_TYPE_VALUETYPE:
 230                         printf ("[");
 231                         for (j = 0; j < size; j++)
 232                                 printf ("%02x,", *((guint8*)cpos +j));
 233                         printf ("], ");
 234                         break;
 235                 default:
 236                         printf ("XX, ");
 237                 }
 238         }
 239
 240         printf (")\n");
 241 }
 242
 243 static void
 244 leave_method (MonoMethod *method, ...)
 245 {
 246         MonoType *type;
 247         char *fname;
 248         va_list ap;
 249
 250         va_start(ap, method);
 251
 252         fname = mono_method_full_name (method, TRUE);
 253         indent (-1);
 254         printf ("LEAVE: %s", fname);
 255         g_free (fname);
 256
 257         type = method->signature->ret;
 258
 259 handle_enum:
 260         switch (type->type) {
 261         case MONO_TYPE_VOID:
 262                 break;
 263         case MONO_TYPE_BOOLEAN: {
 264                 int eax = va_arg (ap, int);
 265                 if (eax)
 266                         printf ("TRUE:%d", eax);
 267                 else
 268                         printf ("FALSE");
 269
 270                 break;
 271         }
 272         case MONO_TYPE_CHAR:
 273         case MONO_TYPE_I1:
 274         case MONO_TYPE_U1:
 275         case MONO_TYPE_I2:
 276         case MONO_TYPE_U2:
 277         case MONO_TYPE_I4:
 278         case MONO_TYPE_U4:
 279         case MONO_TYPE_I:
 280         case MONO_TYPE_U: {
 281                 int eax = va_arg (ap, int);
 282                 printf ("EAX=%d", eax);
 283                 break;
 284         }
 285         case MONO_TYPE_STRING: {
 286                 MonoString *s = va_arg (ap, MonoString *);
 287 ;
 288                 if (s) {
 289                         g_assert (((MonoObject *)s)->vtable->klass == mono_defaults.string_class);
 290                         printf ("[STRING:%p:%s]", s, mono_string_to_utf8 (s));
 291                 } else
 292                         printf ("[STRING:null], ");
 293                 break;
 294         }
 295         case MONO_TYPE_CLASS:
 296         case MONO_TYPE_OBJECT: {
 297                 MonoObject *o = va_arg (ap, MonoObject *);
 298
 299                 if (o) {
 300                         if (o->vtable->klass == mono_defaults.boolean_class) {
 301                                 printf ("[BOOLEAN:%p:%d]", o, *((guint8 *)o + sizeof (MonoObject)));
 302                         } else if  (o->vtable->klass == mono_defaults.int32_class) {
 303                                 printf ("[INT32:%p:%d]", o, *((gint32 *)((char *)o + sizeof (MonoObject))));
 304                         } else if  (o->vtable->klass == mono_defaults.int64_class) {
 305                                 printf ("[INT64:%p:%lld]", o, *((gint64 *)((char *)o + sizeof (MonoObject))));
 306                         } else
 307                                 printf ("[%s.%s:%p]", o->vtable->klass->name_space, o->vtable->klass->name, o);
 308                 } else
 309                         printf ("[OBJECT:%p]", o);
 310
 311                 break;
 312         }
 313         case MONO_TYPE_PTR:
 314         case MONO_TYPE_FNPTR:
 315         case MONO_TYPE_ARRAY:
 316         case MONO_TYPE_SZARRAY: {
 317                 gpointer p = va_arg (ap, gpointer);
 318                 printf ("EAX=%p", p);
 319                 break;
 320         }
 321         case MONO_TYPE_I8: {
 322                 gint64 l =  va_arg (ap, gint64);
 323                 printf ("EAX/EDX=0x%16llx", l);
 324                 break;
 325         }
 326         case MONO_TYPE_U8: {
 327                 gint64 l =  va_arg (ap, gint64);
 328                 printf ("EAX/EDX=0x%16llx", l);
 329                 break;
 330         }
 331         case MONO_TYPE_R8: {
 332                 double f = va_arg (ap, double);
 333                 printf ("FP=%f\n", f);
 334                 break;
 335         }
 336         case MONO_TYPE_VALUETYPE:
 337                 if (type->data.klass->enumtype) {
 338                         type = type->data.klass->enum_basetype;
 339                         goto handle_enum;
 340                 } else {
 341                         guint8 *p = va_arg (ap, gpointer);
 342                         int j, size, align;
 343                         size = mono_type_size (type, &align);
 344                         printf ("[");
 345                         for (j = 0; p && j < size; j++)
 346                                 printf ("%02x,", p [j]);
 347                         printf ("]");
 348                 }
 349                 break;
 350         default:
 351                 printf ("(unknown return type %x)", method->signature->ret->type);
 352         }
 353
 354         printf ("\n");
 355 }
 356
 357 static const guchar cpuid_impl [] = {
 358         0x55,                           /* push   %ebp */
 359         0x89, 0xe5,                     /* mov    %esp,%ebp */
 360         0x53,                           /* push   %ebx */
 361         0x8b, 0x45, 0x08,               /* mov    0x8(%ebp),%eax */
 362         0x0f, 0xa2,                     /* cpuid   */
 363         0x50,                           /* push   %eax */
 364         0x8b, 0x45, 0x10,               /* mov    0x10(%ebp),%eax */
 365         0x89, 0x18,                     /* mov    %ebx,(%eax) */
 366         0x8b, 0x45, 0x14,               /* mov    0x14(%ebp),%eax */
 367         0x89, 0x08,                     /* mov    %ecx,(%eax) */
 368         0x8b, 0x45, 0x18,               /* mov    0x18(%ebp),%eax */
 369         0x89, 0x10,                     /* mov    %edx,(%eax) */
 370         0x58,                           /* pop    %eax */
 371         0x8b, 0x55, 0x0c,               /* mov    0xc(%ebp),%edx */
 372         0x89, 0x02,                     /* mov    %eax,(%edx) */
 373         0x5b,                           /* pop    %ebx */
 374         0xc9,                           /* leave   */
 375         0xc3,                           /* ret     */
 376 };
 377
 378 typedef void (*CpuidFunc) (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx);
 379
 380 static int
 381 cpuid (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx)
 382 {
 383         int have_cpuid = 0;
 384         __asm__  __volatile__ (
 385                 "pushfl\n"
 386                 "popl %%eax\n"
 387                 "movl %%eax, %%edx\n"
 388                 "xorl $0x200000, %%eax\n"
 389                 "pushl %%eax\n"
 390                 "popfl\n"
 391                 "pushfl\n"
 392                 "popl %%eax\n"
 393                 "xorl %%edx, %%eax\n"
 394                 "andl $0x200000, %%eax\n"
 395                 "movl %%eax, %0"
 396                 : "=r" (have_cpuid)
 397                 :
 398                 : "%eax", "%edx"
 399         );
 400
 401         if (have_cpuid) {
 402                 CpuidFunc func = (CpuidFunc)cpuid_impl;
 403                 func (id, p_eax, p_ebx, p_ecx, p_edx);
 404                 /*
 405                  * We use this approach because of issues with gcc and pic code, see:
 406                  * http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=7329
 407                 __asm__ __volatile__ ("cpuid"
 408                         : "=a" (*p_eax), "=b" (*p_ebx), "=c" (*p_ecx), "=d" (*p_edx)
 409                         : "a" (id));
 410                 */
 411                 return 1;
 412         }
 413         return 0;
 414 }
 415
 416 /*
 417  * This function returns the optimizations supported on this cpu.
 418  */
 419 guint32
 420 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
 421 {
 422         int eax, ebx, ecx, edx;
 423         guint32 opts = 0;
 424
 425         *exclude_mask = 0;
 426         /* Feature Flags function, flags returned in EDX. */
 427         if (cpuid (1, &eax, &ebx, &ecx, &edx)) {
 428                 if (edx & (1 << 15)) {
 429                         opts |= MONO_OPT_CMOV;
 430                         if (edx & 1)
 431                                 opts |= MONO_OPT_FCMOV;
 432                         else
 433                                 *exclude_mask |= MONO_OPT_FCMOV;
 434                 } else
 435                         *exclude_mask |= MONO_OPT_CMOV;
 436         }
 437         return opts;
 438 }
 439
 440 static gboolean
 441 is_regsize_var (MonoType *t) {
 442         if (t->byref)
 443                 return TRUE;
 444         switch (t->type) {
 445         case MONO_TYPE_I4:
 446         case MONO_TYPE_U4:
 447         case MONO_TYPE_I:
 448         case MONO_TYPE_U:
 449                 return TRUE;
 450         case MONO_TYPE_OBJECT:
 451         case MONO_TYPE_STRING:
 452         case MONO_TYPE_CLASS:
 453         case MONO_TYPE_SZARRAY:
 454         case MONO_TYPE_ARRAY:
 455                 return TRUE;
 456         case MONO_TYPE_VALUETYPE:
 457                 if (t->data.klass->enumtype)
 458                         return is_regsize_var (t->data.klass->enum_basetype);
 459                 return FALSE;
 460         }
 461         return FALSE;
 462 }
 463
 464 GList *
 465 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
 466 {
 467         GList *vars = NULL;
 468         int i;
 469
 470         for (i = 0; i < cfg->num_varinfo; i++) {
 471                 MonoInst *ins = cfg->varinfo [i];
 472                 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
 473
 474                 /* unused vars */
 475                 if (vmv->range.first_use.abs_pos > vmv->range.last_use.abs_pos)
 476                         continue;
 477
 478                 if ((ins->flags & (MONO_INST_IS_DEAD|MONO_INST_VOLATILE|MONO_INST_INDIRECT)) ||
 479                     (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
 480                         continue;
 481
 482                 /* we dont allocate I1 to registers because there is no simply way to sign extend
 483                  * 8bit quantities in caller saved registers on x86 */
 484                 if (is_regsize_var (ins->inst_vtype) || (ins->inst_vtype->type == MONO_TYPE_BOOLEAN) ||
 485                     (ins->inst_vtype->type == MONO_TYPE_U1) || (ins->inst_vtype->type == MONO_TYPE_U2)||
 486                     (ins->inst_vtype->type == MONO_TYPE_I2) || (ins->inst_vtype->type == MONO_TYPE_CHAR)) {
 487                         g_assert (MONO_VARINFO (cfg, i)->reg == -1);
 488                         g_assert (i == vmv->idx);
 489                         vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
 490                 }
 491         }
 492
 493         return vars;
 494 }
 495
 496 GList *
 497 mono_arch_get_global_int_regs (MonoCompile *cfg)
 498 {
 499         GList *regs = NULL;
 500
 501         /* we can use 3 registers for global allocation */
 502         regs = g_list_prepend (regs, (gpointer)X86_EBX);
 503         regs = g_list_prepend (regs, (gpointer)X86_ESI);
 504         regs = g_list_prepend (regs, (gpointer)X86_EDI);
 505
 506         return regs;
 507 }
 508
 509 /*
 510  * Set var information according to the calling convention. X86 version.
 511  * The locals var stuff should most likely be split in another method.
 512  */
 513 void
 514 mono_arch_allocate_vars (MonoCompile *m)
 515 {
 516         MonoMethodSignature *sig;
 517         MonoMethodHeader *header;
 518         MonoInst *inst;
 519         int i, offset, size, align, curinst;
 520
 521         header = ((MonoMethodNormal *)m->method)->header;
 522
 523         sig = m->method->signature;
 524
 525         offset = 8;
 526         curinst = 0;
 527         if (MONO_TYPE_ISSTRUCT (sig->ret)) {
 528                 m->ret->opcode = OP_REGOFFSET;
 529                 m->ret->inst_basereg = X86_EBP;
 530                 m->ret->inst_offset = offset;
 531                 offset += sizeof (gpointer);
 532         } else {
 533                 /* FIXME: handle long and FP values */
 534                 switch (sig->ret->type) {
 535                 case MONO_TYPE_VOID:
 536                         break;
 537                 default:
 538                         m->ret->opcode = OP_REGVAR;
 539                         m->ret->inst_c0 = X86_EAX;
 540                         break;
 541                 }
 542         }
 543         if (sig->hasthis) {
 544                 inst = m->varinfo [curinst];
 545                 if (inst->opcode != OP_REGVAR) {
 546                         inst->opcode = OP_REGOFFSET;
 547                         inst->inst_basereg = X86_EBP;
 548                 }
 549                 inst->inst_offset = offset;
 550                 offset += sizeof (gpointer);
 551                 curinst++;
 552         }
 553
 554         if (sig->call_convention == MONO_CALL_VARARG) {
 555                 m->sig_cookie = offset;
 556                 offset += sizeof (gpointer);
 557         }
 558
 559         for (i = 0; i < sig->param_count; ++i) {
 560                 inst = m->varinfo [curinst];
 561                 if (inst->opcode != OP_REGVAR) {
 562                         inst->opcode = OP_REGOFFSET;
 563                         inst->inst_basereg = X86_EBP;
 564                 }
 565                 inst->inst_offset = offset;
 566                 size = mono_type_size (sig->params [i], &align);
 567                 size += 4 - 1;
 568                 size &= ~(4 - 1);
 569                 offset += size;
 570                 curinst++;
 571         }
 572
 573         offset = 0;
 574
 575         /* reserve space to save LMF and caller saved registers */
 576
 577         if (m->method->save_lmf) {
 578                 offset += sizeof (MonoLMF);
 579         } else {
 580                 if (m->used_int_regs & (1 << X86_EBX)) {
 581                         offset += 4;
 582                 }
 583
 584                 if (m->used_int_regs & (1 << X86_EDI)) {
 585                         offset += 4;
 586                 }
 587
 588                 if (m->used_int_regs & (1 << X86_ESI)) {
 589                         offset += 4;
 590                 }
 591         }
 592
 593         for (i = curinst; i < m->num_varinfo; ++i) {
 594                 inst = m->varinfo [i];
 595
 596                 if ((inst->flags & MONO_INST_IS_DEAD) || inst->opcode == OP_REGVAR)
 597                         continue;
 598
 599                 /* inst->unused indicates native sized value types, this is used by the
 600                 * pinvoke wrappers when they call functions returning structure */
 601                 if (inst->unused && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
 602                         size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
 603                 else
 604                         size = mono_type_size (inst->inst_vtype, &align);
 605
 606                 offset += size;
 607                 offset += align - 1;
 608                 offset &= ~(align - 1);
 609                 inst->opcode = OP_REGOFFSET;
 610                 inst->inst_basereg = X86_EBP;
 611                 inst->inst_offset = -offset;
 612                 //g_print ("allocating local %d to %d\n", i, -offset);
 613         }
 614         offset += (MONO_ARCH_FRAME_ALIGNMENT - 1);
 615         offset &= ~(MONO_ARCH_FRAME_ALIGNMENT - 1);
 616
 617         /* change sign? */
 618         m->stack_offset = -offset;
 619 }
 620
 621 /* Fixme: we need an alignment solution for enter_method and mono_arch_call_opcode,
 622  * currently alignment in mono_arch_call_opcode is computed without arch_get_argument_info
 623  */
 624
 625 /*
 626  * take the arguments and generate the arch-specific
 627  * instructions to properly call the function in call.
 628  * This includes pushing, moving arguments to the right register
 629  * etc.
 630  * Issue: who does the spilling if needed, and when?
 631  */
 632 MonoCallInst*
 633 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
 634         MonoInst *arg, *in, **rev_args;
 635         MonoMethodSignature *sig;
 636         int i, n, stack_size, type;
 637         MonoType *ptype;
 638
 639         sig = call->signature;
 640         n = sig->param_count + sig->hasthis;
 641         rev_args = mono_mempool_alloc (cfg->mempool, sizeof (MonoInst*) * n);
 642
 643         if (sig->ret && (sig->ret->type == MONO_TYPE_I8 || sig->ret->type == MONO_TYPE_U8)) {
 644                 //g_warning ("long value returned");
 645         }
 646         if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret))
 647                 stack_size = 4;
 648         else
 649                 stack_size = 0;
 650         for (i = 0; i < n; ++i) {
 651                 if (is_virtual && i == 0) {
 652                         /* the argument will be attached to the call instrucion */
 653                         rev_args [n - 1] = arg = NULL;
 654                         in = call->args [i];
 655                         stack_size += 4;
 656                 } else {
 657                         MONO_INST_NEW (cfg, arg, OP_OUTARG);
 658                         in = call->args [i];
 659                         arg->cil_code = in->cil_code;
 660                         arg->inst_left = in;
 661                         arg->type = in->type;
 662                         rev_args [n - i - 1] = arg;
 663                         if (i >= sig->hasthis) {
 664                                 ptype = sig->params [i - sig->hasthis];
 665                                 if (ptype->byref)
 666                                         type = MONO_TYPE_U;
 667                                 else
 668                                         type = ptype->type;
 669 handle_enum:
 670                                 /* FIXME: validate arguments... */
 671                                 switch (type) {
 672                                 case MONO_TYPE_I:
 673                                 case MONO_TYPE_U:
 674                                 case MONO_TYPE_BOOLEAN:
 675                                 case MONO_TYPE_CHAR:
 676                                 case MONO_TYPE_I1:
 677                                 case MONO_TYPE_U1:
 678                                 case MONO_TYPE_I2:
 679                                 case MONO_TYPE_U2:
 680                                 case MONO_TYPE_I4:
 681                                 case MONO_TYPE_U4:
 682                                 case MONO_TYPE_STRING:
 683                                 case MONO_TYPE_CLASS:
 684                                 case MONO_TYPE_OBJECT:
 685                                 case MONO_TYPE_PTR:
 686                                 case MONO_TYPE_FNPTR:
 687                                 case MONO_TYPE_ARRAY:
 688                                 case MONO_TYPE_SZARRAY:
 689                                         stack_size += 4;
 690                                         break;
 691                                 case MONO_TYPE_I8:
 692                                 case MONO_TYPE_U8:
 693                                         stack_size += 8;
 694                                         break;
 695                                 case MONO_TYPE_R4:
 696                                         stack_size += 4;
 697                                         arg->opcode = OP_OUTARG_R4;
 698                                         break;
 699                                 case MONO_TYPE_R8:
 700                                         stack_size += 8;
 701                                         arg->opcode = OP_OUTARG_R8;
 702                                         break;
 703                                 case MONO_TYPE_VALUETYPE:
 704                                         if (MONO_TYPE_ISSTRUCT (ptype)) {
 705                                                 int size;
 706                                                 if (sig->pinvoke)
 707                                                         size = mono_type_native_stack_size (&in->klass->byval_arg, NULL);
 708                                                 else
 709                                                         size = mono_type_stack_size (&in->klass->byval_arg, NULL);
 710
 711                                                 stack_size += size;
 712                                                 arg->opcode = OP_OUTARG_VT;
 713                                                 arg->klass = in->klass;
 714                                                 arg->unused = sig->pinvoke;
 715                                                 arg->inst_imm = size;
 716                                         } else {
 717                                                 type = ptype->data.klass->enum_basetype->type;
 718                                                 goto handle_enum;
 719                                         }
 720                                         break;
 721                                 case MONO_TYPE_TYPEDBYREF:
 722                                         stack_size += sizeof (MonoTypedRef);
 723                                         arg->opcode = OP_OUTARG_VT;
 724                                         arg->klass = in->klass;
 725                                         arg->unused = sig->pinvoke;
 726                                         arg->inst_imm = sizeof (MonoTypedRef);
 727                                         break;
 728                                 default:
 729                                         g_error ("unknown type 0x%02x in mono_arch_call_opcode\n", type);
 730                                 }
 731                         } else {
 732                                 /* the this argument */
 733                                 stack_size += 4;
 734                         }
 735                 }
 736         }
 737         /* they need to be pushed in reverse order */
 738         /* if the function returns a struct, the called method already does a ret $0x4 */
 739         if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret))
 740                 stack_size -= 4;
 741         call->args = rev_args;
 742         call->stack_usage = stack_size;
 743         /*
 744          * should set more info in call, such as the stack space
 745          * used by the args that needs to be added back to esp
 746          */
 747
 748         return call;
 749 }
 750
 751 /*
 752  * Allow tracing to work with this interface (with an optional argument)
 753  */
 754
 755 /*
 756  * This may be needed on some archs or for debugging support.
 757  */
 758 void
 759 mono_arch_instrument_mem_needs (MonoMethod *method, int *stack, int *code)
 760 {
 761         /* no stack room needed now (may be needed for FASTCALL-trace support) */
 762         *stack = 0;
 763         /* split prolog-epilog requirements? */
 764         *code = 50; /* max bytes needed: check this number */
 765 }
 766
 767 void*
 768 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
 769 {
 770         guchar *code = p;
 771
 772         /* if some args are passed in registers, we need to save them here */
 773         x86_push_reg (code, X86_EBP);
 774         mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, cfg->method);
 775         x86_push_imm (code, cfg->method);
 776         mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
 777         x86_call_code (code, 0);
 778         x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
 779
 780         return code;
 781 }
 782
 783 enum {
 784         SAVE_NONE,
 785         SAVE_STRUCT,
 786         SAVE_EAX,
 787         SAVE_EAX_EDX,
 788         SAVE_FP
 789 };
 790
 791 void*
 792 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
 793 {
 794         guchar *code = p;
 795         int arg_size = 0, save_mode = SAVE_NONE;
 796         MonoMethod *method = cfg->method;
 797         int rtype = method->signature->ret->type;
 798
 799 handle_enum:
 800         switch (rtype) {
 801         case MONO_TYPE_VOID:
 802                 /* special case string .ctor icall */
 803                 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
 804                         save_mode = SAVE_EAX;
 805                 else
 806                         save_mode = SAVE_NONE;
 807                 break;
 808         case MONO_TYPE_I8:
 809         case MONO_TYPE_U8:
 810                 save_mode = SAVE_EAX_EDX;
 811                 break;
 812         case MONO_TYPE_R4:
 813         case MONO_TYPE_R8:
 814                 save_mode = SAVE_FP;
 815                 break;
 816         case MONO_TYPE_VALUETYPE:
 817                 if (method->signature->ret->data.klass->enumtype) {
 818                         rtype = method->signature->ret->data.klass->enum_basetype->type;
 819                         goto handle_enum;
 820                 }
 821                 save_mode = SAVE_STRUCT;
 822                 break;
 823         default:
 824                 save_mode = SAVE_EAX;
 825                 break;
 826         }
 827
 828         switch (save_mode) {
 829         case SAVE_EAX_EDX:
 830                 x86_push_reg (code, X86_EDX);
 831                 x86_push_reg (code, X86_EAX);
 832                 if (enable_arguments) {
 833                         x86_push_reg (code, X86_EDX);
 834                         x86_push_reg (code, X86_EAX);
 835                         arg_size = 8;
 836                 }
 837                 break;
 838         case SAVE_EAX:
 839                 x86_push_reg (code, X86_EAX);
 840                 if (enable_arguments) {
 841                         x86_push_reg (code, X86_EAX);
 842                         arg_size = 4;
 843                 }
 844                 break;
 845         case SAVE_FP:
 846                 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
 847                 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
 848                 if (enable_arguments) {
 849                         x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
 850                         x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
 851                         arg_size = 8;
 852                 }
 853                 break;
 854         case SAVE_STRUCT:
 855                 if (enable_arguments) {
 856                         x86_push_membase (code, X86_EBP, 8);
 857                         arg_size = 4;
 858                 }
 859                 break;
 860         case SAVE_NONE:
 861         default:
 862                 break;
 863         }
 864
 865
 866         mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, method);
 867         x86_push_imm (code, method);
 868         mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
 869         x86_call_code (code, 0);
 870         x86_alu_reg_imm (code, X86_ADD, X86_ESP, arg_size + 4);
 871
 872         switch (save_mode) {
 873         case SAVE_EAX_EDX:
 874                 x86_pop_reg (code, X86_EAX);
 875                 x86_pop_reg (code, X86_EDX);
 876                 break;
 877         case SAVE_EAX:
 878                 x86_pop_reg (code, X86_EAX);
 879                 break;
 880         case SAVE_FP:
 881                 x86_fld_membase (code, X86_ESP, 0, TRUE);
 882                 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
 883                 break;
 884         case SAVE_NONE:
 885         default:
 886                 break;
 887         }
 888
 889         return code;
 890 }
 891
 892 #define EMIT_COND_BRANCH(ins,cond,sign) \
 893 if (ins->flags & MONO_INST_BRLABEL) { \
 894         if (ins->inst_i0->inst_c0) { \
 895                 x86_branch (code, cond, cfg->native_code + ins->inst_i0->inst_c0, sign); \
 896         } else { \
 897                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
 898                 x86_branch32 (code, cond, 0, sign); \
 899         } \
 900 } else { \
 901         if (ins->inst_true_bb->native_offset) { \
 902                 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
 903         } else { \
 904                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
 905                 if ((cfg->opt & MONO_OPT_BRANCH) && \
 906                     x86_is_imm8 (ins->inst_true_bb->max_offset - cpos)) \
 907                         x86_branch8 (code, cond, 0, sign); \
 908                 else \
 909                         x86_branch32 (code, cond, 0, sign); \
 910         } \
 911 }
 912
 913 /* emit an exception if condition is fail */
 914 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name)            \
 915         do {                                                        \
 916                 mono_add_patch_info (cfg, code - cfg->native_code,   \
 917                                     MONO_PATCH_INFO_EXC, exc_name);  \
 918                 x86_branch32 (code, cond, 0, signed);               \
 919         } while (0);
 920
 921 #define EMIT_FPCOMPARE(code) do { \
 922         x86_fcompp (code); \
 923         x86_fnstsw (code); \
 924 } while (0);
 925
 926 static void
 927 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
 928 {
 929         MonoInst *ins, *last_ins = NULL;
 930         ins = bb->code;
 931
 932         while (ins) {
 933
 934                 switch (ins->opcode) {
 935                 case OP_ICONST:
 936                         /* reg = 0 -> XOR (reg, reg) */
 937                         /* XOR sets cflags on x86, so we cant do it always */
 938                         if (ins->inst_c0 == 0 && ins->next &&
 939                             (ins->next->opcode == CEE_BR)) {
 940                                 ins->opcode = CEE_XOR;
 941                                 ins->sreg1 = ins->dreg;
 942                                 ins->sreg2 = ins->dreg;
 943                         }
 944                         break;
 945                 case OP_MUL_IMM:
 946                         /* remove unnecessary multiplication with 1 */
 947                         if (ins->inst_imm == 1) {
 948                                 if (ins->dreg != ins->sreg1) {
 949                                         ins->opcode = OP_MOVE;
 950                                 } else {
 951                                         last_ins->next = ins->next;
 952                                         ins = ins->next;
 953                                         continue;
 954                                 }
 955                         }
 956                         break;
 957                 case OP_COMPARE_IMM:
 958                         /* OP_COMPARE_IMM (reg, 0) --> OP_X86_TEST_NULL (reg) */
 959                         if (ins->inst_imm == 0 && ins->next &&
 960                             (ins->next->opcode == CEE_BEQ || ins->next->opcode == CEE_BNE_UN ||
 961                              ins->next->opcode == OP_CEQ)) {
 962                                 ins->opcode = OP_X86_TEST_NULL;
 963                         }
 964                         break;
 965                 case OP_LOAD_MEMBASE:
 966                 case OP_LOADI4_MEMBASE:
 967                         /*
 968                          * OP_STORE_MEMBASE_REG reg, offset(basereg)
 969                          * OP_LOAD_MEMBASE offset(basereg), reg
 970                          */
 971                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
 972                                          || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
 973                             ins->inst_basereg == last_ins->inst_destbasereg &&
 974                             ins->inst_offset == last_ins->inst_offset) {
 975                                 if (ins->dreg == last_ins->sreg1) {
 976                                         last_ins->next = ins->next;
 977                                         ins = ins->next;
 978                                         continue;
 979                                 } else {
 980                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
 981                                         ins->opcode = OP_MOVE;
 982                                         ins->sreg1 = last_ins->sreg1;
 983                                 }
 984
 985                         /*
 986                          * Note: reg1 must be different from the basereg in the second load
 987                          * OP_LOAD_MEMBASE offset(basereg), reg1
 988                          * OP_LOAD_MEMBASE offset(basereg), reg2
 989                          * -->
 990                          * OP_LOAD_MEMBASE offset(basereg), reg1
 991                          * OP_MOVE reg1, reg2
 992                          */
 993                         } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
 994                                            || last_ins->opcode == OP_LOAD_MEMBASE) &&
 995                               ins->inst_basereg != last_ins->dreg &&
 996                               ins->inst_basereg == last_ins->inst_basereg &&
 997                               ins->inst_offset == last_ins->inst_offset) {
 998
 999                                 if (ins->dreg == last_ins->dreg) {
1000                                         last_ins->next = ins->next;
1001                                         ins = ins->next;
1002                                         continue;
1003                                 } else {
1004                                         ins->opcode = OP_MOVE;
1005                                         ins->sreg1 = last_ins->dreg;
1006                                 }
1007
1008                                 //g_assert_not_reached ();
1009
1010 #if 0
1011                         /*
1012                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1013                          * OP_LOAD_MEMBASE offset(basereg), reg
1014                          * -->
1015                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1016                          * OP_ICONST reg, imm
1017                          */
1018                         } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1019                                                 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1020                                    ins->inst_basereg == last_ins->inst_destbasereg &&
1021                                    ins->inst_offset == last_ins->inst_offset) {
1022                                 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1023                                 ins->opcode = OP_ICONST;
1024                                 ins->inst_c0 = last_ins->inst_imm;
1025                                 g_assert_not_reached (); // check this rule
1026 #endif
1027                         }
1028                         break;
1029                 case OP_LOADU1_MEMBASE:
1030                 case OP_LOADI1_MEMBASE:
1031                   /*
1032                    * FIXME: Missing explanation
1033                    */
1034                         if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1035                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1036                                         ins->inst_offset == last_ins->inst_offset) {
1037                                 if (ins->dreg == last_ins->sreg1) {
1038                                         last_ins->next = ins->next;
1039                                         ins = ins->next;
1040                                         continue;
1041                                 } else {
1042                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1043                                         ins->opcode = OP_MOVE;
1044                                         ins->sreg1 = last_ins->sreg1;
1045                                 }
1046                         }
1047                         break;
1048                 case OP_LOADU2_MEMBASE:
1049                 case OP_LOADI2_MEMBASE:
1050                   /*
1051                    * FIXME: Missing explanation
1052                    */
1053                         if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1054                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1055                                         ins->inst_offset == last_ins->inst_offset) {
1056                                 if (ins->dreg == last_ins->sreg1) {
1057                                         last_ins->next = ins->next;
1058                                         ins = ins->next;
1059                                         continue;
1060                                 } else {
1061                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1062                                         ins->opcode = OP_MOVE;
1063                                         ins->sreg1 = last_ins->sreg1;
1064                                 }
1065                         }
1066                         break;
1067                 case CEE_CONV_I4:
1068                 case CEE_CONV_U4:
1069                 case OP_MOVE:
1070                         /*
1071                          * OP_MOVE reg, reg
1072                          */
1073                         if (ins->dreg == ins->sreg1) {
1074                                 if (last_ins)
1075                                         last_ins->next = ins->next;
1076                                 ins = ins->next;
1077                                 continue;
1078                         }
1079                         /*
1080                          * OP_MOVE sreg, dreg
1081                          * OP_MOVE dreg, sreg
1082                          */
1083                         if (last_ins && last_ins->opcode == OP_MOVE &&
1084                             ins->sreg1 == last_ins->dreg &&
1085                             ins->dreg == last_ins->sreg1) {
1086                                 last_ins->next = ins->next;
1087                                 ins = ins->next;
1088                                 continue;
1089                         }
1090                         break;
1091                 }
1092                 last_ins = ins;
1093                 ins = ins->next;
1094         }
1095         bb->last_ins = last_ins;
1096 }
1097
1098 static const int
1099 branch_cc_table [] = {
1100         X86_CC_EQ, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1101         X86_CC_NE, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1102         X86_CC_O, X86_CC_NO, X86_CC_C, X86_CC_NC
1103 };
1104
1105 #define DEBUG(a) if (cfg->verbose_level > 1) a
1106 //#define DEBUG(a)
1107 #define reg_is_freeable(r) ((r) >= 0 && (r) <= 7 && X86_IS_CALLEE ((r)))
1108
1109 typedef struct {
1110         int born_in;
1111         int killed_in;
1112         int last_use;
1113         int prev_use;
1114 } RegTrack;
1115
1116 static const char*const * ins_spec = pentium_desc;
1117
1118 static void
1119 print_ins (int i, MonoInst *ins)
1120 {
1121         const char *spec = ins_spec [ins->opcode];
1122         g_print ("\t%-2d %s", i, mono_inst_name (ins->opcode));
1123         if (spec [MONO_INST_DEST]) {
1124                 if (ins->dreg >= MONO_MAX_IREGS)
1125                         g_print (" R%d <-", ins->dreg);
1126                 else
1127                         g_print (" %s <-", mono_arch_regname (ins->dreg));
1128         }
1129         if (spec [MONO_INST_SRC1]) {
1130                 if (ins->sreg1 >= MONO_MAX_IREGS)
1131                         g_print (" R%d", ins->sreg1);
1132                 else
1133                         g_print (" %s", mono_arch_regname (ins->sreg1));
1134         }
1135         if (spec [MONO_INST_SRC2]) {
1136                 if (ins->sreg2 >= MONO_MAX_IREGS)
1137                         g_print (" R%d", ins->sreg2);
1138                 else
1139                         g_print (" %s", mono_arch_regname (ins->sreg2));
1140         }
1141         if (spec [MONO_INST_CLOB])
1142                 g_print (" clobbers: %c", spec [MONO_INST_CLOB]);
1143         g_print ("\n");
1144 }
1145
1146 static void
1147 print_regtrack (RegTrack *t, int num)
1148 {
1149         int i;
1150         char buf [32];
1151         const char *r;
1152
1153         for (i = 0; i < num; ++i) {
1154                 if (!t [i].born_in)
1155                         continue;
1156                 if (i >= MONO_MAX_IREGS) {
1157                         g_snprintf (buf, sizeof(buf), "R%d", i);
1158                         r = buf;
1159                 } else
1160                         r = mono_arch_regname (i);
1161                 g_print ("liveness: %s [%d - %d]\n", r, t [i].born_in, t[i].last_use);
1162         }
1163 }
1164
1165 typedef struct InstList InstList;
1166
1167 struct InstList {
1168         InstList *prev;
1169         InstList *next;
1170         MonoInst *data;
1171 };
1172
1173 static inline InstList*
1174 inst_list_prepend (MonoMemPool *pool, InstList *list, MonoInst *data)
1175 {
1176         InstList *item = mono_mempool_alloc (pool, sizeof (InstList));
1177         item->data = data;
1178         item->prev = NULL;
1179         item->next = list;
1180         if (list)
1181                 list->prev = item;
1182         return item;
1183 }
1184
1185 /*
1186  * Force the spilling of the variable in the symbolic register 'reg'.
1187  */
1188 static int
1189 get_register_force_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, int reg)
1190 {
1191         MonoInst *load;
1192         int i, sel, spill;
1193
1194         sel = cfg->rs->iassign [reg];
1195         /*i = cfg->rs->isymbolic [sel];
1196         g_assert (i == reg);*/
1197         i = reg;
1198         spill = ++cfg->spill_count;
1199         cfg->rs->iassign [i] = -spill - 1;
1200         mono_regstate_free_int (cfg->rs, sel);
1201         /* we need to create a spill var and insert a load to sel after the current instruction */
1202         MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1203         load->dreg = sel;
1204         load->inst_basereg = X86_EBP;
1205         load->inst_offset = mono_spillvar_offset (cfg, spill);
1206         if (item->prev) {
1207                 while (ins->next != item->prev->data)
1208                         ins = ins->next;
1209         }
1210         load->next = ins->next;
1211         ins->next = load;
1212         DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%ebp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1213         i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1214         g_assert (i == sel);
1215
1216         return sel;
1217 }
1218
1219 static int
1220 get_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, guint32 regmask, int reg)
1221 {
1222         MonoInst *load;
1223         int i, sel, spill;
1224
1225         DEBUG (g_print ("start regmask to assign R%d: 0x%08x (R%d <- R%d R%d)\n", reg, regmask, ins->dreg, ins->sreg1, ins->sreg2));
1226         /* exclude the registers in the current instruction */
1227         if (reg != ins->sreg1 && (reg_is_freeable (ins->sreg1) || (ins->sreg1 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg1] >= 0))) {
1228                 if (ins->sreg1 >= MONO_MAX_IREGS)
1229                         regmask &= ~ (1 << cfg->rs->iassign [ins->sreg1]);
1230                 else
1231                         regmask &= ~ (1 << ins->sreg1);
1232                 DEBUG (g_print ("excluding sreg1 %s\n", mono_arch_regname (ins->sreg1)));
1233         }
1234         if (reg != ins->sreg2 && (reg_is_freeable (ins->sreg2) || (ins->sreg2 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg2] >= 0))) {
1235                 if (ins->sreg2 >= MONO_MAX_IREGS)
1236                         regmask &= ~ (1 << cfg->rs->iassign [ins->sreg2]);
1237                 else
1238                         regmask &= ~ (1 << ins->sreg2);
1239                 DEBUG (g_print ("excluding sreg2 %s %d\n", mono_arch_regname (ins->sreg2), ins->sreg2));
1240         }
1241         if (reg != ins->dreg && reg_is_freeable (ins->dreg)) {
1242                 regmask &= ~ (1 << ins->dreg);
1243                 DEBUG (g_print ("excluding dreg %s\n", mono_arch_regname (ins->dreg)));
1244         }
1245
1246         DEBUG (g_print ("available regmask: 0x%08x\n", regmask));
1247         g_assert (regmask); /* need at least a register we can free */
1248         sel = -1;
1249         /* we should track prev_use and spill the register that's farther */
1250         for (i = 0; i < MONO_MAX_IREGS; ++i) {
1251                 if (regmask & (1 << i)) {
1252                         sel = i;
1253                         DEBUG (g_print ("selected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->iassign [sel]));
1254                         break;
1255                 }
1256         }
1257         i = cfg->rs->isymbolic [sel];
1258         spill = ++cfg->spill_count;
1259         cfg->rs->iassign [i] = -spill - 1;
1260         mono_regstate_free_int (cfg->rs, sel);
1261         /* we need to create a spill var and insert a load to sel after the current instruction */
1262         MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1263         load->dreg = sel;
1264         load->inst_basereg = X86_EBP;
1265         load->inst_offset = mono_spillvar_offset (cfg, spill);
1266         if (item->prev) {
1267                 while (ins->next != item->prev->data)
1268                         ins = ins->next;
1269         }
1270         load->next = ins->next;
1271         ins->next = load;
1272         DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%ebp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1273         i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1274         g_assert (i == sel);
1275
1276         return sel;
1277 }
1278
1279 static MonoInst*
1280 create_copy_ins (MonoCompile *cfg, int dest, int src, MonoInst *ins)
1281 {
1282         MonoInst *copy;
1283         MONO_INST_NEW (cfg, copy, OP_MOVE);
1284         copy->dreg = dest;
1285         copy->sreg1 = src;
1286         if (ins) {
1287                 copy->next = ins->next;
1288                 ins->next = copy;
1289         }
1290         DEBUG (g_print ("\tforced copy from %s to %s\n", mono_arch_regname (src), mono_arch_regname (dest)));
1291         return copy;
1292 }
1293
1294 static MonoInst*
1295 create_spilled_store (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins)
1296 {
1297         MonoInst *store;
1298         MONO_INST_NEW (cfg, store, OP_STORE_MEMBASE_REG);
1299         store->sreg1 = reg;
1300         store->inst_destbasereg = X86_EBP;
1301         store->inst_offset = mono_spillvar_offset (cfg, spill);
1302         if (ins) {
1303                 store->next = ins->next;
1304                 ins->next = store;
1305         }
1306         DEBUG (g_print ("SPILLED STORE (%d at 0x%08x(%%ebp)) R%d (from %s)\n", spill, store->inst_offset, prev_reg, mono_arch_regname (reg)));
1307         return store;
1308 }
1309
1310 static void
1311 insert_before_ins (MonoInst *ins, InstList *item, MonoInst* to_insert)
1312 {
1313         MonoInst *prev;
1314         if (item->next) {
1315                 prev = item->next->data;
1316
1317                 while (prev->next != ins)
1318                         prev = prev->next;
1319                 to_insert->next = ins;
1320                 prev->next = to_insert;
1321         } else {
1322                 to_insert->next = ins;
1323         }
1324         /*
1325          * needed otherwise in the next instruction we can add an ins to the
1326          * end and that would get past this instruction.
1327          */
1328         item->data = to_insert;
1329 }
1330
1331 #if  0
1332 static int
1333 alloc_int_reg (MonoCompile *cfg, InstList *curinst, MonoInst *ins, int sym_reg, guint32 allow_mask)
1334 {
1335         int val = cfg->rs->iassign [sym_reg];
1336         if (val < 0) {
1337                 int spill = 0;
1338                 if (val < -1) {
1339                         /* the register gets spilled after this inst */
1340                         spill = -val -1;
1341                 }
1342                 val = mono_regstate_alloc_int (cfg->rs, allow_mask);
1343                 if (val < 0)
1344                         val = get_register_spilling (cfg, curinst, ins, allow_mask, sym_reg);
1345                 cfg->rs->iassign [sym_reg] = val;
1346                 /* add option to store before the instruction for src registers */
1347                 if (spill)
1348                         create_spilled_store (cfg, spill, val, sym_reg, ins);
1349         }
1350         cfg->rs->isymbolic [val] = sym_reg;
1351         return val;
1352 }
1353 #endif
1354
1355 #include "cprop.c"
1356
1357 /*
1358  * Local register allocation.
1359  * We first scan the list of instructions and we save the liveness info of
1360  * each register (when the register is first used, when it's value is set etc.).
1361  * We also reverse the list of instructions (in the InstList list) because assigning
1362  * registers backwards allows for more tricks to be used.
1363  */
1364 void
1365 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1366 {
1367         MonoInst *ins;
1368         MonoRegState *rs = cfg->rs;
1369         int i, val, fpcount;
1370         RegTrack *reginfo, *reginfof;
1371         RegTrack *reginfo1, *reginfo2, *reginfod;
1372         InstList *tmp, *reversed = NULL;
1373         const char *spec;
1374         guint32 src1_mask, src2_mask, dest_mask;
1375
1376         if (!bb->code)
1377                 return;
1378         rs->next_vireg = bb->max_ireg;
1379         rs->next_vfreg = bb->max_freg;
1380         mono_regstate_assign (rs);
1381         reginfo = mono_mempool_alloc0 (cfg->mempool, sizeof (RegTrack) * rs->next_vireg);
1382         reginfof = mono_mempool_alloc0 (cfg->mempool, sizeof (RegTrack) * rs->next_vfreg);
1383         rs->ifree_mask = X86_CALLEE_REGS;
1384
1385         ins = bb->code;
1386
1387         if (cfg->opt & MONO_OPT_COPYPROP)
1388                 local_copy_prop (cfg, ins);
1389
1390         i = 1;
1391         fpcount = 0; /* FIXME: track fp stack utilization */
1392         DEBUG (g_print ("LOCAL regalloc: basic block: %d\n", bb->block_num));
1393         /* forward pass on the instructions to collect register liveness info */
1394         while (ins) {
1395                 spec = ins_spec [ins->opcode];
1396                 DEBUG (print_ins (i, ins));
1397                 if (spec [MONO_INST_SRC1]) {
1398                         if (spec [MONO_INST_SRC1] == 'f')
1399                                 reginfo1 = reginfof;
1400                         else
1401                                 reginfo1 = reginfo;
1402                         reginfo1 [ins->sreg1].prev_use = reginfo1 [ins->sreg1].last_use;
1403                         reginfo1 [ins->sreg1].last_use = i;
1404                 } else {
1405                         ins->sreg1 = -1;
1406                 }
1407                 if (spec [MONO_INST_SRC2]) {
1408                         if (spec [MONO_INST_SRC2] == 'f')
1409                                 reginfo2 = reginfof;
1410                         else
1411                                 reginfo2 = reginfo;
1412                         reginfo2 [ins->sreg2].prev_use = reginfo2 [ins->sreg2].last_use;
1413                         reginfo2 [ins->sreg2].last_use = i;
1414                 } else {
1415                         ins->sreg2 = -1;
1416                 }
1417                 if (spec [MONO_INST_DEST]) {
1418                         if (spec [MONO_INST_DEST] == 'f')
1419                                 reginfod = reginfof;
1420                         else
1421                                 reginfod = reginfo;
1422                         if (spec [MONO_INST_DEST] != 'b') /* it's not just a base register */
1423                                 reginfod [ins->dreg].killed_in = i;
1424                         reginfod [ins->dreg].prev_use = reginfod [ins->dreg].last_use;
1425                         reginfod [ins->dreg].last_use = i;
1426                         if (reginfod [ins->dreg].born_in == 0 || reginfod [ins->dreg].born_in > i)
1427                                 reginfod [ins->dreg].born_in = i;
1428                         if (spec [MONO_INST_DEST] == 'l') {
1429                                 /* result in eax:edx, the virtual register is allocated sequentially */
1430                                 reginfod [ins->dreg + 1].prev_use = reginfod [ins->dreg + 1].last_use;
1431                                 reginfod [ins->dreg + 1].last_use = i;
1432                                 if (reginfod [ins->dreg + 1].born_in == 0 || reginfod [ins->dreg + 1].born_in > i)
1433                                         reginfod [ins->dreg + 1].born_in = i;
1434                         }
1435                 } else {
1436                         ins->dreg = -1;
1437                 }
1438                 reversed = inst_list_prepend (cfg->mempool, reversed, ins);
1439                 ++i;
1440                 ins = ins->next;
1441         }
1442
1443         DEBUG (print_regtrack (reginfo, rs->next_vireg));
1444         DEBUG (print_regtrack (reginfof, rs->next_vfreg));
1445         tmp = reversed;
1446         while (tmp) {
1447                 int prev_dreg, prev_sreg1, prev_sreg2;
1448                 dest_mask = src1_mask = src2_mask = X86_CALLEE_REGS;
1449                 --i;
1450                 ins = tmp->data;
1451                 spec = ins_spec [ins->opcode];
1452                 DEBUG (g_print ("processing:"));
1453                 DEBUG (print_ins (i, ins));
1454                 if (spec [MONO_INST_CLOB] == 's') {
1455                         if (rs->ifree_mask & (1 << X86_ECX)) {
1456                                 DEBUG (g_print ("\tshortcut assignment of R%d to ECX\n", ins->sreg2));
1457                                 rs->iassign [ins->sreg2] = X86_ECX;
1458                                 rs->isymbolic [X86_ECX] = ins->sreg2;
1459                                 ins->sreg2 = X86_ECX;
1460                                 rs->ifree_mask &= ~ (1 << X86_ECX);
1461                         } else {
1462                                 int need_ecx_spill = TRUE;
1463                                 /*
1464                                  * we first check if src1/dreg is already assigned a register
1465                                  * and then we force a spill of the var assigned to ECX.
1466                                  */
1467                                 /* the destination register can't be ECX */
1468                                 dest_mask &= ~ (1 << X86_ECX);
1469                                 src1_mask &= ~ (1 << X86_ECX);
1470                                 val = rs->iassign [ins->dreg];
1471                                 /*
1472                                  * the destination register is already assigned to ECX:
1473                                  * we need to allocate another register for it and then
1474                                  * copy from this to ECX.
1475                                  */
1476                                 if (val == X86_ECX && ins->dreg != ins->sreg2) {
1477                                         int new_dest = mono_regstate_alloc_int (rs, dest_mask);
1478                                         if (new_dest < 0)
1479                                                 new_dest = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1480                                         g_assert (new_dest >= 0);
1481                                         ins->dreg = new_dest;
1482                                         create_copy_ins (cfg, X86_ECX, new_dest, ins);
1483                                         need_ecx_spill = FALSE;
1484                                         /*DEBUG (g_print ("\tforced spill of R%d\n", ins->dreg));
1485                                         val = get_register_force_spilling (cfg, tmp, ins, ins->dreg);
1486                                         rs->iassign [ins->dreg] = val;
1487                                         rs->isymbolic [val] = prev_dreg;
1488                                         ins->dreg = val;*/
1489                                 }
1490                                 val = rs->iassign [ins->sreg1];
1491                                 if (val == X86_ECX) {
1492                                         g_assert_not_reached ();
1493                                 } else if (val >= 0) {
1494                                         /*
1495                                          * the first src reg was already assigned to a register,
1496                                          * we need to copy it to the dest register because the
1497                                          * shift instruction clobbers the first operand.
1498                                          */
1499                                         MonoInst *copy = create_copy_ins (cfg, ins->dreg, val, NULL);
1500                                         insert_before_ins (ins, tmp, copy);
1501                                 }
1502                                 val = rs->iassign [ins->sreg2];
1503                                 if (val >= 0 && val != X86_ECX) {
1504                                         MonoInst *move = create_copy_ins (cfg, X86_ECX, val, NULL);
1505                                         DEBUG (g_print ("\tmoved arg from R%d (%d) to ECX\n", val, ins->sreg2));
1506                                         move->next = ins;
1507                                         g_assert_not_reached ();
1508                                         /* FIXME: where is move connected to the instruction list? */
1509                                         //tmp->prev->data->next = move;
1510                                 }
1511                                 if (need_ecx_spill && !(rs->ifree_mask & (1 << X86_ECX))) {
1512                                         DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_ECX]));
1513                                         get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_ECX]);
1514                                         mono_regstate_free_int (rs, X86_ECX);
1515                                 }
1516                                 /* force-set sreg2 */
1517                                 rs->iassign [ins->sreg2] = X86_ECX;
1518                                 rs->isymbolic [X86_ECX] = ins->sreg2;
1519                                 ins->sreg2 = X86_ECX;
1520                                 rs->ifree_mask &= ~ (1 << X86_ECX);
1521                         }
1522                 } else if (spec [MONO_INST_CLOB] == 'd') { /* division */
1523                         int dest_reg = X86_EAX;
1524                         int clob_reg = X86_EDX;
1525                         if (spec [MONO_INST_DEST] == 'd') {
1526                                 dest_reg = X86_EDX; /* reminder */
1527                                 clob_reg = X86_EAX;
1528                         }
1529                         val = rs->iassign [ins->dreg];
1530                         if (0 && val >= 0 && val != dest_reg && !(rs->ifree_mask & (1 << dest_reg))) {
1531                                 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [dest_reg]));
1532                                 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [dest_reg]);
1533                                 mono_regstate_free_int (rs, dest_reg);
1534                         }
1535                         if (val < 0) {
1536                                 if (val < -1) {
1537                                         /* the register gets spilled after this inst */
1538                                         int spill = -val -1;
1539                                         dest_mask = 1 << clob_reg;
1540                                         prev_dreg = ins->dreg;
1541                                         val = mono_regstate_alloc_int (rs, dest_mask);
1542                                         if (val < 0)
1543                                                 val = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1544                                         rs->iassign [ins->dreg] = val;
1545                                         if (spill)
1546                                                 create_spilled_store (cfg, spill, val, prev_dreg, ins);
1547                                         DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
1548                                         rs->isymbolic [val] = prev_dreg;
1549                                         ins->dreg = val;
1550                                         if (val != dest_reg) { /* force a copy */
1551                                                 create_copy_ins (cfg, val, dest_reg, ins);
1552                                         }
1553                                 } else {
1554                                         DEBUG (g_print ("\tshortcut assignment of R%d to %s\n", ins->dreg, mono_arch_regname (dest_reg)));
1555                                         rs->iassign [ins->dreg] = dest_reg;
1556                                         rs->isymbolic [dest_reg] = ins->dreg;
1557                                         ins->dreg = dest_reg;
1558                                         rs->ifree_mask &= ~ (1 << dest_reg);
1559                                 }
1560                         } else {
1561                                 //DEBUG (g_print ("dest reg in div assigned: %s\n", mono_arch_regname (val)));
1562                                 if (val != dest_reg) { /* force a copy */
1563                                         create_copy_ins (cfg, val, dest_reg, ins);
1564                                         if (!(rs->ifree_mask & (1 << dest_reg)) && rs->isymbolic [dest_reg] >= MONO_MAX_IREGS) {
1565                                                 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [dest_reg]));
1566                                                 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [dest_reg]);
1567                                                 mono_regstate_free_int (rs, dest_reg);
1568                                         }
1569                                 }
1570                         }
1571                         src1_mask = 1 << X86_EAX;
1572                         src2_mask = 1 << X86_ECX;
1573                 }
1574                 if (spec [MONO_INST_DEST] == 'l') {
1575                         if (!(rs->ifree_mask & (1 << X86_EAX))) {
1576                                 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_EAX]));
1577                                 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_EAX]);
1578                                 mono_regstate_free_int (rs, X86_EAX);
1579                         }
1580                         if (!(rs->ifree_mask & (1 << X86_EDX))) {
1581                                 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_EDX]));
1582                                 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_EDX]);
1583                                 mono_regstate_free_int (rs, X86_EDX);
1584                         }
1585                 }
1586                 /* update for use with FP regs... */
1587                 if (spec [MONO_INST_DEST] != 'f' && ins->dreg >= MONO_MAX_IREGS) {
1588                         val = rs->iassign [ins->dreg];
1589                         prev_dreg = ins->dreg;
1590                         if (val < 0) {
1591                                 int spill = 0;
1592                                 if (val < -1) {
1593                                         /* the register gets spilled after this inst */
1594                                         spill = -val -1;
1595                                 }
1596                                 val = mono_regstate_alloc_int (rs, dest_mask);
1597                                 if (val < 0)
1598                                         val = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1599                                 rs->iassign [ins->dreg] = val;
1600                                 if (spill)
1601                                         create_spilled_store (cfg, spill, val, prev_dreg, ins);
1602                         }
1603                         DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
1604                         rs->isymbolic [val] = prev_dreg;
1605                         ins->dreg = val;
1606                         if (spec [MONO_INST_DEST] == 'l') {
1607                                 int hreg = prev_dreg + 1;
1608                                 val = rs->iassign [hreg];
1609                                 if (val < 0) {
1610                                         int spill = 0;
1611                                         if (val < -1) {
1612                                                 /* the register gets spilled after this inst */
1613                                                 spill = -val -1;
1614                                         }
1615                                         val = mono_regstate_alloc_int (rs, dest_mask);
1616                                         if (val < 0)
1617                                                 val = get_register_spilling (cfg, tmp, ins, dest_mask, hreg);
1618                                         rs->iassign [hreg] = val;
1619                                         if (spill)
1620                                                 create_spilled_store (cfg, spill, val, hreg, ins);
1621                                 }
1622                                 DEBUG (g_print ("\tassigned hreg %s to dest R%d\n", mono_arch_regname (val), hreg));
1623                                 rs->isymbolic [val] = hreg;
1624                                 /* FIXME:? ins->dreg = val; */
1625                                 if (ins->dreg == X86_EAX) {
1626                                         if (val != X86_EDX)
1627                                                 create_copy_ins (cfg, val, X86_EDX, ins);
1628                                 } else if (ins->dreg == X86_EDX) {
1629                                         if (val == X86_EAX) {
1630                                                 /* swap */
1631                                                 g_assert_not_reached ();
1632                                         } else {
1633                                                 /* two forced copies */
1634                                                 create_copy_ins (cfg, val, X86_EDX, ins);
1635                                                 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
1636                                         }
1637                                 } else {
1638                                         if (val == X86_EDX) {
1639                                                 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
1640                                         } else {
1641                                                 /* two forced copies */
1642                                                 create_copy_ins (cfg, val, X86_EDX, ins);
1643                                                 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
1644                                         }
1645                                 }
1646                                 if (reg_is_freeable (val) && hreg >= 0 && reginfo [hreg].born_in >= i) {
1647                                         DEBUG (g_print ("\tfreeable %s (R%d)\n", mono_arch_regname (val), hreg));
1648                                         mono_regstate_free_int (rs, val);
1649                                 }
1650                         } else if (spec [MONO_INST_DEST] == 'a' && ins->dreg != X86_EAX && spec [MONO_INST_CLOB] != 'd') {
1651                                 /* this instruction only outputs to EAX, need to copy */
1652                                 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
1653                         } else if (spec [MONO_INST_DEST] == 'd' && ins->dreg != X86_EDX && spec [MONO_INST_CLOB] != 'd') {
1654                                 create_copy_ins (cfg, ins->dreg, X86_EDX, ins);
1655                         }
1656                 } else {
1657                         prev_dreg = -1;
1658                 }
1659                 if (spec [MONO_INST_DEST] != 'f' && reg_is_freeable (ins->dreg) && prev_dreg >= 0 && reginfo [prev_dreg].born_in >= i) {
1660                         DEBUG (g_print ("\tfreeable %s (R%d) (born in %d)\n", mono_arch_regname (ins->dreg), prev_dreg, reginfo [prev_dreg].born_in));
1661                         mono_regstate_free_int (rs, ins->dreg);
1662                 }
1663                 /* put src1 in EAX if it needs to be */
1664                 if (spec [MONO_INST_SRC1] == 'a') {
1665                         if (!(rs->ifree_mask & (1 << X86_EAX))) {
1666                                 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_EAX]));
1667                                 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_EAX]);
1668                                 mono_regstate_free_int (rs, X86_EAX);
1669                         }
1670                         /* force-set sreg1 */
1671                         rs->iassign [ins->sreg1] = X86_EAX;
1672                         rs->isymbolic [X86_EAX] = ins->sreg1;
1673                         ins->sreg1 = X86_EAX;
1674                         rs->ifree_mask &= ~ (1 << X86_EAX);
1675                 }
1676                 if (spec [MONO_INST_SRC1] != 'f' && ins->sreg1 >= MONO_MAX_IREGS) {
1677                         val = rs->iassign [ins->sreg1];
1678                         prev_sreg1 = ins->sreg1;
1679                         if (val < 0) {
1680                                 int spill = 0;
1681                                 if (val < -1) {
1682                                         /* the register gets spilled after this inst */
1683                                         spill = -val -1;
1684                                 }
1685                                 if (0 && ins->opcode == OP_MOVE) {
1686                                         /*
1687                                          * small optimization: the dest register is already allocated
1688                                          * but the src one is not: we can simply assign the same register
1689                                          * here and peephole will get rid of the instruction later.
1690                                          * This optimization may interfere with the clobbering handling:
1691                                          * it removes a mov operation that will be added again to handle clobbering.
1692                                          * There are also some other issues that should with make testjit.
1693                                          */
1694                                         mono_regstate_alloc_int (rs, 1 << ins->dreg);
1695                                         val = rs->iassign [ins->sreg1] = ins->dreg;
1696                                         //g_assert (val >= 0);
1697                                         DEBUG (g_print ("\tfast assigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1698                                 } else {
1699                                         //g_assert (val == -1); /* source cannot be spilled */
1700                                         val = mono_regstate_alloc_int (rs, src1_mask);
1701                                         if (val < 0)
1702                                                 val = get_register_spilling (cfg, tmp, ins, src1_mask, ins->sreg1);
1703                                         rs->iassign [ins->sreg1] = val;
1704                                         DEBUG (g_print ("\tassigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1705                                 }
1706                                 if (spill) {
1707                                         MonoInst *store = create_spilled_store (cfg, spill, val, prev_sreg1, NULL);
1708                                         insert_before_ins (ins, tmp, store);
1709                                 }
1710                         }
1711                         rs->isymbolic [val] = prev_sreg1;
1712                         ins->sreg1 = val;
1713                 } else {
1714                         prev_sreg1 = -1;
1715                 }
1716                 /* handle clobbering of sreg1 */
1717                 if ((spec [MONO_INST_CLOB] == '1' || spec [MONO_INST_CLOB] == 's') && ins->dreg != ins->sreg1) {
1718                         MonoInst *copy = create_copy_ins (cfg, ins->dreg, ins->sreg1, NULL);
1719                         DEBUG (g_print ("\tneed to copy sreg1 %s to dreg %s\n", mono_arch_regname (ins->sreg1), mono_arch_regname (ins->dreg)));
1720                         if (ins->sreg2 == -1 || spec [MONO_INST_CLOB] == 's') {
1721                                 /* note: the copy is inserted before the current instruction! */
1722                                 insert_before_ins (ins, tmp, copy);
1723                                 /* we set sreg1 to dest as well */
1724                                 prev_sreg1 = ins->sreg1 = ins->dreg;
1725                         } else {
1726                                 /* inserted after the operation */
1727                                 copy->next = ins->next;
1728                                 ins->next = copy;
1729                         }
1730                 }
1731                 if (spec [MONO_INST_SRC2] != 'f' && ins->sreg2 >= MONO_MAX_IREGS) {
1732                         val = rs->iassign [ins->sreg2];
1733                         prev_sreg2 = ins->sreg2;
1734                         if (val < 0) {
1735                                 int spill = 0;
1736                                 if (val < -1) {
1737                                         /* the register gets spilled after this inst */
1738                                         spill = -val -1;
1739                                 }
1740                                 val = mono_regstate_alloc_int (rs, src2_mask);
1741                                 if (val < 0)
1742                                         val = get_register_spilling (cfg, tmp, ins, src2_mask, ins->sreg2);
1743                                 rs->iassign [ins->sreg2] = val;
1744                                 DEBUG (g_print ("\tassigned sreg2 %s to R%d\n", mono_arch_regname (val), ins->sreg2));
1745                                 if (spill)
1746                                         create_spilled_store (cfg, spill, val, prev_sreg2, ins);
1747                         }
1748                         rs->isymbolic [val] = prev_sreg2;
1749                         ins->sreg2 = val;
1750                         if (spec [MONO_INST_CLOB] == 's' && ins->sreg2 != X86_ECX) {
1751                                 DEBUG (g_print ("\tassigned sreg2 %s to R%d, but ECX is needed (R%d)\n", mono_arch_regname (val), ins->sreg2, rs->iassign [X86_ECX]));
1752                         }
1753                 } else {
1754                         prev_sreg2 = -1;
1755                 }
1756
1757                 if (spec [MONO_INST_CLOB] == 'c') {
1758                         int j, s;
1759                         guint32 clob_mask = X86_CALLEE_REGS;
1760                         for (j = 0; j < MONO_MAX_IREGS; ++j) {
1761                                 s = 1 << j;
1762                                 if ((clob_mask & s) && !(rs->ifree_mask & s) && j != ins->sreg1) {
1763                                         //g_warning ("register %s busy at call site\n", mono_arch_regname (j));
1764                                 }
1765                         }
1766                 }
1767                 /*if (reg_is_freeable (ins->sreg1) && prev_sreg1 >= 0 && reginfo [prev_sreg1].born_in >= i) {
1768                         DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg1)));
1769                         mono_regstate_free_int (rs, ins->sreg1);
1770                 }
1771                 if (reg_is_freeable (ins->sreg2) && prev_sreg2 >= 0 && reginfo [prev_sreg2].born_in >= i) {
1772                         DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg2)));
1773                         mono_regstate_free_int (rs, ins->sreg2);
1774                 }*/
1775
1776                 //DEBUG (print_ins (i, ins));
1777                 /* this may result from a insert_before call */
1778                 if (!tmp->next)
1779                         bb->code = tmp->data;
1780                 tmp = tmp->next;
1781         }
1782 }
1783
1784 static unsigned char*
1785 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int size, gboolean is_signed)
1786 {
1787         x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
1788         x86_fnstcw_membase(code, X86_ESP, 0);
1789         x86_mov_reg_membase (code, dreg, X86_ESP, 0, 2);
1790         x86_alu_reg_imm (code, X86_OR, dreg, 0xc00);
1791         x86_mov_membase_reg (code, X86_ESP, 2, dreg, 2);
1792         x86_fldcw_membase (code, X86_ESP, 2);
1793         if (size == 8) {
1794                 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1795                 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
1796                 x86_pop_reg (code, dreg);
1797                 /* FIXME: need the high register
1798                  * x86_pop_reg (code, dreg_high);
1799                  */
1800         } else {
1801                 x86_push_reg (code, X86_EAX); // SP = SP - 4
1802                 x86_fist_pop_membase (code, X86_ESP, 0, FALSE);
1803                 x86_pop_reg (code, dreg);
1804         }
1805         x86_fldcw_membase (code, X86_ESP, 0);
1806         x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
1807
1808         if (size == 1)
1809                 x86_widen_reg (code, dreg, dreg, is_signed, FALSE);
1810         else if (size == 2)
1811                 x86_widen_reg (code, dreg, dreg, is_signed, TRUE);
1812         return code;
1813 }
1814
1815 static unsigned char*
1816 mono_emit_stack_alloc (guchar *code, MonoInst* tree)
1817 {
1818         int sreg = tree->sreg1;
1819 #ifdef PLATFORM_WIN32
1820         guint8* br[5];
1821
1822         /*
1823          * Under Windows:
1824          * If requested stack size is larger than one page,
1825          * perform stack-touch operation
1826          */
1827         /*
1828          * Generate stack probe code.
1829          * Under Windows, it is necessary to allocate one page at a time,
1830          * "touching" stack after each successful sub-allocation. This is
1831          * because of the way stack growth is implemented - there is a
1832          * guard page before the lowest stack page that is currently commited.
1833          * Stack normally grows sequentially so OS traps access to the
1834          * guard page and commits more pages when needed.
1835          */
1836         x86_test_reg_imm (code, sreg, ~0xFFF);
1837         br[0] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1838
1839         br[2] = code; /* loop */
1840         x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
1841         x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
1842         x86_alu_reg_imm (code, X86_SUB, sreg, 0x1000);
1843         x86_alu_reg_imm (code, X86_CMP, sreg, 0x1000);
1844         br[3] = code; x86_branch8 (code, X86_CC_AE, 0, FALSE);
1845         x86_patch (br[3], br[2]);
1846         x86_test_reg_reg (code, sreg, sreg);
1847         br[4] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1848         x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1849
1850         br[1] = code; x86_jump8 (code, 0);
1851
1852         x86_patch (br[0], code);
1853         x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1854         x86_patch (br[1], code);
1855         x86_patch (br[4], code);
1856 #else /* PLATFORM_WIN32 */
1857         x86_alu_reg_reg (code, X86_SUB, X86_ESP, tree->sreg1);
1858 #endif
1859         if (tree->flags & MONO_INST_INIT) {
1860                 int offset = 0;
1861                 if (tree->dreg != X86_EAX && sreg != X86_EAX) {
1862                         x86_push_reg (code, X86_EAX);
1863                         offset += 4;
1864                 }
1865                 if (tree->dreg != X86_ECX && sreg != X86_ECX) {
1866                         x86_push_reg (code, X86_ECX);
1867                         offset += 4;
1868                 }
1869                 if (tree->dreg != X86_EDI && sreg != X86_EDI) {
1870                         x86_push_reg (code, X86_EDI);
1871                         offset += 4;
1872                 }
1873
1874                 x86_shift_reg_imm (code, X86_SHR, sreg, 2);
1875                 if (sreg != X86_ECX)
1876                         x86_mov_reg_reg (code, X86_ECX, sreg, 4);
1877                 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
1878
1879                 x86_lea_membase (code, X86_EDI, X86_ESP, offset);
1880                 x86_cld (code);
1881                 x86_prefix (code, X86_REP_PREFIX);
1882                 x86_stosl (code);
1883
1884                 if (tree->dreg != X86_EDI && sreg != X86_EDI)
1885                         x86_pop_reg (code, X86_EDI);
1886                 if (tree->dreg != X86_ECX && sreg != X86_ECX)
1887                         x86_pop_reg (code, X86_ECX);
1888                 if (tree->dreg != X86_EAX && sreg != X86_EAX)
1889                         x86_pop_reg (code, X86_EAX);
1890         }
1891         return code;
1892 }
1893
1894 #define REAL_PRINT_REG(text,reg) \
1895 mono_assert (reg >= 0); \
1896 x86_push_reg (code, X86_EAX); \
1897 x86_push_reg (code, X86_EDX); \
1898 x86_push_reg (code, X86_ECX); \
1899 x86_push_reg (code, reg); \
1900 x86_push_imm (code, reg); \
1901 x86_push_imm (code, text " %d %p\n"); \
1902 x86_mov_reg_imm (code, X86_EAX, printf); \
1903 x86_call_reg (code, X86_EAX); \
1904 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 3*4); \
1905 x86_pop_reg (code, X86_ECX); \
1906 x86_pop_reg (code, X86_EDX); \
1907 x86_pop_reg (code, X86_EAX);
1908
1909 void
1910 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
1911 {
1912         MonoInst *ins;
1913         MonoCallInst *call;
1914         guint offset;
1915         guint8 *code = cfg->native_code + cfg->code_len;
1916         MonoInst *last_ins = NULL;
1917         guint last_offset = 0;
1918         int max_len, cpos;
1919
1920         if (cfg->opt & MONO_OPT_PEEPHOLE)
1921                 peephole_pass (cfg, bb);
1922
1923 #if 0
1924         /*
1925          * various stratgies to align BBs. Using real loop detection or simply
1926          * aligning every block leads to more consistent benchmark results,
1927          * but usually slows down the code
1928          * we should do the alignment outside this function or we should adjust
1929          * bb->native offset as well or the code is effectively slowed down!
1930          */
1931         /* align all blocks */
1932 //      if ((pad = (cfg->code_len & (align - 1)))) {
1933         /* poor man loop start detection */
1934 //      if (bb->code && bb->in_count && bb->in_bb [0]->cil_code > bb->cil_code && (pad = (cfg->code_len & (align - 1)))) {
1935         /* consider real loop detection and nesting level */
1936 //      if (bb->loop_blocks && bb->nesting < 3 && (pad = (cfg->code_len & (align - 1)))) {
1937         /* consider real loop detection */
1938         if (bb->loop_blocks && (pad = (cfg->code_len & (align - 1)))) {
1939                 pad = align - pad;
1940                 x86_padding (code, pad);
1941                 cfg->code_len += pad;
1942                 bb->native_offset = cfg->code_len;
1943         }
1944 #endif
1945
1946         if (cfg->verbose_level > 2)
1947                 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
1948
1949         cpos = bb->max_offset;
1950
1951         if (mono_trace_coverage) {
1952                 MonoCoverageInfo *cov = mono_get_coverage_info (cfg->method);
1953                 g_assert (!mono_compile_aot);
1954                 cpos += 6;
1955
1956                 // fixme: make this work with inlining
1957                 g_assert_not_reached ();
1958                 //if (bb->cil_code)
1959                 //cov->data [bb->dfn].iloffset = bb->cil_code - cfg->cil_code;
1960                 /* this is not thread save, but good enough */
1961                 /* fixme: howto handle overflows? */
1962                 x86_inc_mem (code, &cov->data [bb->dfn].count);
1963         }
1964
1965         offset = code - cfg->native_code;
1966
1967         ins = bb->code;
1968         while (ins) {
1969                 offset = code - cfg->native_code;
1970
1971                 max_len = ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
1972
1973                 if (offset > (cfg->code_size - max_len - 16)) {
1974                         cfg->code_size *= 2;
1975                         cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
1976                         code = cfg->native_code + offset;
1977                         mono_jit_stats.code_reallocs++;
1978                 }
1979
1980                 mono_debug_record_line_number (cfg, ins, offset);
1981
1982                 switch (ins->opcode) {
1983                 case OP_BIGMUL:
1984                         x86_mul_reg (code, ins->sreg2, FALSE);
1985                         break;
1986                 case OP_X86_SETEQ_MEMBASE:
1987                         x86_set_membase (code, X86_CC_EQ, ins->inst_basereg, ins->inst_offset, TRUE);
1988                         break;
1989                 case OP_STOREI1_MEMBASE_IMM:
1990                         x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 1);
1991                         break;
1992                 case OP_STOREI2_MEMBASE_IMM:
1993                         x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 2);
1994                         break;
1995                 case OP_STORE_MEMBASE_IMM:
1996                 case OP_STOREI4_MEMBASE_IMM:
1997                         x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 4);
1998                         break;
1999                 case OP_STOREI1_MEMBASE_REG:
2000                         x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 1);
2001                         break;
2002                 case OP_STOREI2_MEMBASE_REG:
2003                         x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 2);
2004                         break;
2005                 case OP_STORE_MEMBASE_REG:
2006                 case OP_STOREI4_MEMBASE_REG:
2007                         x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 4);
2008                         break;
2009                 case CEE_LDIND_I:
2010                 case CEE_LDIND_I4:
2011                 case CEE_LDIND_U4:
2012                         x86_mov_reg_mem (code, ins->dreg, ins->inst_p0, 4);
2013                         break;
2014                 case OP_LOADU4_MEM:
2015                         x86_mov_reg_imm (code, ins->dreg, ins->inst_p0);
2016                         x86_mov_reg_membase (code, ins->dreg, ins->dreg, 0, 4);
2017                         break;
2018                 case OP_LOAD_MEMBASE:
2019                 case OP_LOADI4_MEMBASE:
2020                 case OP_LOADU4_MEMBASE:
2021                         x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, 4);
2022                         break;
2023                 case OP_LOADU1_MEMBASE:
2024                         x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE);
2025                         break;
2026                 case OP_LOADI1_MEMBASE:
2027                         x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, FALSE);
2028                         break;
2029                 case OP_LOADU2_MEMBASE:
2030                         x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE);
2031                         break;
2032                 case OP_LOADI2_MEMBASE:
2033                         x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, TRUE);
2034                         break;
2035                 case CEE_CONV_I1:
2036                         x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, FALSE);
2037                         break;
2038                 case CEE_CONV_I2:
2039                         x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, TRUE);
2040                         break;
2041                 case CEE_CONV_U1:
2042                         x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, FALSE);
2043                         break;
2044                 case CEE_CONV_U2:
2045                         x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, TRUE);
2046                         break;
2047                 case OP_COMPARE:
2048                         x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
2049                         break;
2050                 case OP_COMPARE_IMM:
2051                         x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
2052                         break;
2053                 case OP_X86_COMPARE_MEMBASE_REG:
2054                         x86_alu_membase_reg (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2055                         break;
2056                 case OP_X86_COMPARE_MEMBASE_IMM:
2057                         x86_alu_membase_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2058                         break;
2059                 case OP_X86_COMPARE_REG_MEMBASE:
2060                         x86_alu_reg_membase (code, X86_CMP, ins->sreg1, ins->sreg2, ins->inst_offset);
2061                         break;
2062                 case OP_X86_TEST_NULL:
2063                         x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
2064                         break;
2065                 case OP_X86_ADD_MEMBASE_IMM:
2066                         x86_alu_membase_imm (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2067                         break;
2068                 case OP_X86_SUB_MEMBASE_IMM:
2069                         x86_alu_membase_imm (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2070                         break;
2071                 case OP_X86_INC_MEMBASE:
2072                         x86_inc_membase (code, ins->inst_basereg, ins->inst_offset);
2073                         break;
2074                 case OP_X86_INC_REG:
2075                         x86_inc_reg (code, ins->dreg);
2076                         break;
2077                 case OP_X86_DEC_MEMBASE:
2078                         x86_dec_membase (code, ins->inst_basereg, ins->inst_offset);
2079                         break;
2080                 case OP_X86_DEC_REG:
2081                         x86_dec_reg (code, ins->dreg);
2082                         break;
2083                 case CEE_BREAK:
2084                         x86_breakpoint (code);
2085                         break;
2086                 case OP_ADDCC:
2087                 case CEE_ADD:
2088                         x86_alu_reg_reg (code, X86_ADD, ins->sreg1, ins->sreg2);
2089                         break;
2090                 case OP_ADC:
2091                         x86_alu_reg_reg (code, X86_ADC, ins->sreg1, ins->sreg2);
2092                         break;
2093                 case OP_ADD_IMM:
2094                         x86_alu_reg_imm (code, X86_ADD, ins->dreg, ins->inst_imm);
2095                         break;
2096                 case OP_ADC_IMM:
2097                         x86_alu_reg_imm (code, X86_ADC, ins->dreg, ins->inst_imm);
2098                         break;
2099                 case OP_SUBCC:
2100                 case CEE_SUB:
2101                         x86_alu_reg_reg (code, X86_SUB, ins->sreg1, ins->sreg2);
2102                         break;
2103                 case OP_SBB:
2104                         x86_alu_reg_reg (code, X86_SBB, ins->sreg1, ins->sreg2);
2105                         break;
2106                 case OP_SUB_IMM:
2107                         x86_alu_reg_imm (code, X86_SUB, ins->dreg, ins->inst_imm);
2108                         break;
2109                 case OP_SBB_IMM:
2110                         x86_alu_reg_imm (code, X86_SBB, ins->dreg, ins->inst_imm);
2111                         break;
2112                 case CEE_AND:
2113                         x86_alu_reg_reg (code, X86_AND, ins->sreg1, ins->sreg2);
2114                         break;
2115                 case OP_AND_IMM:
2116                         x86_alu_reg_imm (code, X86_AND, ins->sreg1, ins->inst_imm);
2117                         break;
2118                 case CEE_DIV:
2119                         x86_cdq (code);
2120                         x86_div_reg (code, ins->sreg2, TRUE);
2121                         break;
2122                 case CEE_DIV_UN:
2123                         x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2124                         x86_div_reg (code, ins->sreg2, FALSE);
2125                         break;
2126                 case OP_DIV_IMM:
2127                         x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
2128                         x86_cdq (code);
2129                         x86_div_reg (code, ins->sreg2, TRUE);
2130                         break;
2131                 case CEE_REM:
2132                         x86_cdq (code);
2133                         x86_div_reg (code, ins->sreg2, TRUE);
2134                         break;
2135                 case CEE_REM_UN:
2136                         x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2137                         x86_div_reg (code, ins->sreg2, FALSE);
2138                         break;
2139                 case OP_REM_IMM:
2140                         x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
2141                         x86_cdq (code);
2142                         x86_div_reg (code, ins->sreg2, TRUE);
2143                         break;
2144                 case CEE_OR:
2145                         x86_alu_reg_reg (code, X86_OR, ins->sreg1, ins->sreg2);
2146                         break;
2147                 case OP_OR_IMM:
2148                         x86_alu_reg_imm (code, X86_OR, ins->sreg1, ins->inst_imm);
2149                         break;
2150                 case CEE_XOR:
2151                         x86_alu_reg_reg (code, X86_XOR, ins->sreg1, ins->sreg2);
2152                         break;
2153                 case OP_XOR_IMM:
2154                         x86_alu_reg_imm (code, X86_XOR, ins->sreg1, ins->inst_imm);
2155                         break;
2156                 case CEE_SHL:
2157                         g_assert (ins->sreg2 == X86_ECX);
2158                         x86_shift_reg (code, X86_SHL, ins->dreg);
2159                         break;
2160                 case CEE_SHR:
2161                         g_assert (ins->sreg2 == X86_ECX);
2162                         x86_shift_reg (code, X86_SAR, ins->dreg);
2163                         break;
2164                 case OP_SHR_IMM:
2165                         x86_shift_reg_imm (code, X86_SAR, ins->dreg, ins->inst_imm);
2166                         break;
2167                 case OP_SHR_UN_IMM:
2168                         x86_shift_reg_imm (code, X86_SHR, ins->dreg, ins->inst_imm);
2169                         break;
2170                 case CEE_SHR_UN:
2171                         g_assert (ins->sreg2 == X86_ECX);
2172                         x86_shift_reg (code, X86_SHR, ins->dreg);
2173                         break;
2174                 case OP_SHL_IMM:
2175                         x86_shift_reg_imm (code, X86_SHL, ins->dreg, ins->inst_imm);
2176                         break;
2177                 case CEE_NOT:
2178                         x86_not_reg (code, ins->sreg1);
2179                         break;
2180                 case CEE_NEG:
2181                         x86_neg_reg (code, ins->sreg1);
2182                         break;
2183                 case OP_SEXT_I1:
2184                         x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, FALSE);
2185                         break;
2186                 case OP_SEXT_I2:
2187                         x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, TRUE);
2188                         break;
2189                 case CEE_MUL:
2190                         x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2191                         break;
2192                 case OP_MUL_IMM:
2193                         x86_imul_reg_reg_imm (code, ins->dreg, ins->sreg1, ins->inst_imm);
2194                         break;
2195                 case CEE_MUL_OVF:
2196                         x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2197                         EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2198                         break;
2199                 case CEE_MUL_OVF_UN: {
2200                         /* the mul operation and the exception check should most likely be split */
2201                         int non_eax_reg, saved_eax = FALSE, saved_edx = FALSE;
2202                         /*g_assert (ins->sreg2 == X86_EAX);
2203                         g_assert (ins->dreg == X86_EAX);*/
2204                         if (ins->sreg2 == X86_EAX) {
2205                                 non_eax_reg = ins->sreg1;
2206                         } else if (ins->sreg1 == X86_EAX) {
2207                                 non_eax_reg = ins->sreg2;
2208                         } else {
2209                                 /* no need to save since we're going to store to it anyway */
2210                                 if (ins->dreg != X86_EAX) {
2211                                         saved_eax = TRUE;
2212                                         x86_push_reg (code, X86_EAX);
2213                                 }
2214                                 x86_mov_reg_reg (code, X86_EAX, ins->sreg1, 4);
2215                                 non_eax_reg = ins->sreg2;
2216                         }
2217                         if (ins->dreg == X86_EDX) {
2218                                 if (!saved_eax) {
2219                                         saved_eax = TRUE;
2220                                         x86_push_reg (code, X86_EAX);
2221                                 }
2222                         } else if (ins->dreg != X86_EAX) {
2223                                 saved_edx = TRUE;
2224                                 x86_push_reg (code, X86_EDX);
2225                         }
2226                         x86_mul_reg (code, non_eax_reg, FALSE);
2227                         /* save before the check since pop and mov don't change the flags */
2228                         if (saved_edx)
2229                                 x86_pop_reg (code, X86_EDX);
2230                         if (saved_eax)
2231                                 x86_pop_reg (code, X86_EAX);
2232                         if (ins->dreg != X86_EAX)
2233                                 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
2234                         EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2235                         break;
2236                 }
2237                 case OP_ICONST:
2238                         x86_mov_reg_imm (code, ins->dreg, ins->inst_c0);
2239                         break;
2240                 case OP_AOTCONST:
2241                         mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2242                         x86_mov_reg_imm (code, ins->dreg, 0);
2243                         break;
2244                 case CEE_CONV_I4:
2245                 case CEE_CONV_U4:
2246                 case OP_MOVE:
2247                         x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2248                         break;
2249                 case CEE_JMP: {
2250                         /*
2251                          * Note: this 'frame destruction' logic is useful for tail calls, too.
2252                          * Keep in sync with the code in emit_epilog.
2253                          */
2254                         int pos = 0;
2255
2256                         /* FIXME: no tracing support... */
2257                         if (mono_jit_profile)
2258                                 code = mono_arch_instrument_epilog (cfg, mono_profiler_method_leave, code, FALSE);
2259                         /* reset offset to make max_len work */
2260                         offset = code - cfg->native_code;
2261
2262                         g_assert (!cfg->method->save_lmf);
2263
2264                         if (cfg->used_int_regs & (1 << X86_EBX))
2265                                 pos -= 4;
2266                         if (cfg->used_int_regs & (1 << X86_EDI))
2267                                 pos -= 4;
2268                         if (cfg->used_int_regs & (1 << X86_ESI))
2269                                 pos -= 4;
2270                         if (pos)
2271                                 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
2272
2273                         if (cfg->used_int_regs & (1 << X86_ESI))
2274                                 x86_pop_reg (code, X86_ESI);
2275                         if (cfg->used_int_regs & (1 << X86_EDI))
2276                                 x86_pop_reg (code, X86_EDI);
2277                         if (cfg->used_int_regs & (1 << X86_EBX))
2278                                 x86_pop_reg (code, X86_EBX);
2279
2280                         /* restore ESP/EBP */
2281                         x86_leave (code);
2282                         offset = code - cfg->native_code;
2283                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2284                         x86_jump32 (code, 0);
2285                         break;
2286                 }
2287                 case OP_CHECK_THIS:
2288                         /* ensure ins->sreg1 is not NULL */
2289                         x86_alu_membase_imm (code, X86_CMP, ins->sreg1, 0, 0);
2290                         break;
2291                 case OP_ARGLIST: {
2292                         int hreg = ins->sreg1 == X86_EAX? X86_ECX: X86_EAX;
2293                         x86_push_reg (code, hreg);
2294                         x86_lea_membase (code, hreg, X86_EBP, cfg->sig_cookie);
2295                         x86_mov_membase_reg (code, ins->sreg1, 0, hreg, 4);
2296                         x86_pop_reg (code, hreg);
2297                         break;
2298                 }
2299                 case OP_FCALL:
2300                 case OP_LCALL:
2301                 case OP_VCALL:
2302                 case OP_VOIDCALL:
2303                 case CEE_CALL:
2304                         call = (MonoCallInst*)ins;
2305                         if (call->signature->call_convention == MONO_CALL_VARARG) {
2306                                 /* FIXME: hack */
2307                                 x86_push_imm (code, call->signature);
2308                                 offset = code - cfg->native_code;
2309                         }
2310                         if (ins->flags & MONO_INST_HAS_METHOD)
2311                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD, call->method);
2312                         else {
2313                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, call->fptr);
2314                         }
2315                         x86_call_code (code, 0);
2316                         if (call->stack_usage && (call->signature->call_convention != MONO_CALL_STDCALL))
2317                                 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2318                         break;
2319                 case OP_FCALL_REG:
2320                 case OP_LCALL_REG:
2321                 case OP_VCALL_REG:
2322                 case OP_VOIDCALL_REG:
2323                 case OP_CALL_REG:
2324                         call = (MonoCallInst*)ins;
2325                         x86_call_reg (code, ins->sreg1);
2326                         if (call->stack_usage && (call->signature->call_convention != MONO_CALL_STDCALL))
2327                                 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2328                         break;
2329                 case OP_FCALL_MEMBASE:
2330                 case OP_LCALL_MEMBASE:
2331                 case OP_VCALL_MEMBASE:
2332                 case OP_VOIDCALL_MEMBASE:
2333                 case OP_CALL_MEMBASE:
2334                         call = (MonoCallInst*)ins;
2335                         x86_call_membase (code, ins->sreg1, ins->inst_offset);
2336                         if (call->stack_usage && (call->signature->call_convention != MONO_CALL_STDCALL))
2337                                 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2338                         break;
2339                 case OP_OUTARG:
2340                 case OP_X86_PUSH:
2341                         x86_push_reg (code, ins->sreg1);
2342                         break;
2343                 case OP_X86_PUSH_IMM:
2344                         x86_push_imm (code, ins->inst_imm);
2345                         break;
2346                 case OP_X86_PUSH_MEMBASE:
2347                         x86_push_membase (code, ins->inst_basereg, ins->inst_offset);
2348                         break;
2349                 case OP_X86_PUSH_OBJ:
2350                         x86_alu_reg_imm (code, X86_SUB, X86_ESP, ins->inst_imm);
2351                         x86_push_reg (code, X86_EDI);
2352                         x86_push_reg (code, X86_ESI);
2353                         x86_push_reg (code, X86_ECX);
2354                         if (ins->inst_offset)
2355                                 x86_lea_membase (code, X86_ESI, ins->inst_basereg, ins->inst_offset);
2356                         else
2357                                 x86_mov_reg_reg (code, X86_ESI, ins->inst_basereg, 4);
2358                         x86_lea_membase (code, X86_EDI, X86_ESP, 12);
2359                         x86_mov_reg_imm (code, X86_ECX, (ins->inst_imm >> 2));
2360                         x86_cld (code);
2361                         x86_prefix (code, X86_REP_PREFIX);
2362                         x86_movsd (code);
2363                         x86_pop_reg (code, X86_ECX);
2364                         x86_pop_reg (code, X86_ESI);
2365                         x86_pop_reg (code, X86_EDI);
2366                         break;
2367                 case OP_X86_LEA:
2368                         x86_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->unused);
2369                         break;
2370                 case OP_X86_XCHG:
2371                         x86_xchg_reg_reg (code, ins->sreg1, ins->sreg2, 4);
2372                         break;
2373                 case OP_LOCALLOC:
2374                         /* keep alignment */
2375                         x86_alu_reg_imm (code, X86_ADD, ins->sreg1, MONO_ARCH_FRAME_ALIGNMENT - 1);
2376                         x86_alu_reg_imm (code, X86_AND, ins->sreg1, ~(MONO_ARCH_FRAME_ALIGNMENT - 1));
2377                         code = mono_emit_stack_alloc (code, ins);
2378                         x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2379                         break;
2380                 case CEE_RET:
2381                         x86_ret (code);
2382                         break;
2383                 case CEE_THROW: {
2384                         x86_push_reg (code, ins->sreg1);
2385                         mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2386                                              (gpointer)"mono_arch_throw_exception");
2387                         x86_call_code (code, 0);
2388                         break;
2389                 }
2390                 case OP_CALL_HANDLER:
2391                         mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2392                         x86_call_imm (code, 0);
2393                         break;
2394                 case OP_LABEL:
2395                         ins->inst_c0 = code - cfg->native_code;
2396                         break;
2397                 case CEE_BR:
2398                         //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
2399                         //if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
2400                         //break;
2401                         if (ins->flags & MONO_INST_BRLABEL) {
2402                                 if (ins->inst_i0->inst_c0) {
2403                                         x86_jump_code (code, cfg->native_code + ins->inst_i0->inst_c0);
2404                                 } else {
2405                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
2406                                         x86_jump32 (code, 0);
2407                                 }
2408                         } else {
2409                                 if (ins->inst_target_bb->native_offset) {
2410                                         x86_jump_code (code, cfg->native_code + ins->inst_target_bb->native_offset);
2411                                 } else {
2412                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2413                                         if ((cfg->opt & MONO_OPT_BRANCH) &&
2414                                             x86_is_imm8 (ins->inst_target_bb->max_offset - cpos))
2415                                                 x86_jump8 (code, 0);
2416                                         else
2417                                                 x86_jump32 (code, 0);
2418                                 }
2419                         }
2420                         break;
2421                 case OP_BR_REG:
2422                         x86_jump_reg (code, ins->sreg1);
2423                         break;
2424                 case OP_CEQ:
2425                         x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
2426                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2427                         break;
2428                 case OP_CLT:
2429                         x86_set_reg (code, X86_CC_LT, ins->dreg, TRUE);
2430                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2431                         break;
2432                 case OP_CLT_UN:
2433                         x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
2434                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2435                         break;
2436                 case OP_CGT:
2437                         x86_set_reg (code, X86_CC_GT, ins->dreg, TRUE);
2438                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2439                         break;
2440                 case OP_CGT_UN:
2441                         x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
2442                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2443                         break;
2444                 case OP_COND_EXC_EQ:
2445                 case OP_COND_EXC_NE_UN:
2446                 case OP_COND_EXC_LT:
2447                 case OP_COND_EXC_LT_UN:
2448                 case OP_COND_EXC_GT:
2449                 case OP_COND_EXC_GT_UN:
2450                 case OP_COND_EXC_GE:
2451                 case OP_COND_EXC_GE_UN:
2452                 case OP_COND_EXC_LE:
2453                 case OP_COND_EXC_LE_UN:
2454                 case OP_COND_EXC_OV:
2455                 case OP_COND_EXC_NO:
2456                 case OP_COND_EXC_C:
2457                 case OP_COND_EXC_NC:
2458                         EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_EQ],
2459                                                     (ins->opcode < OP_COND_EXC_NE_UN), ins->inst_p1);
2460                         break;
2461                 case CEE_BEQ:
2462                 case CEE_BNE_UN:
2463                 case CEE_BLT:
2464                 case CEE_BLT_UN:
2465                 case CEE_BGT:
2466                 case CEE_BGT_UN:
2467                 case CEE_BGE:
2468                 case CEE_BGE_UN:
2469                 case CEE_BLE:
2470                 case CEE_BLE_UN:
2471                         EMIT_COND_BRANCH (ins, branch_cc_table [ins->opcode - CEE_BEQ], (ins->opcode < CEE_BNE_UN));
2472                         break;
2473
2474                 /* floating point opcodes */
2475                 case OP_R8CONST: {
2476                         double d = *(double *)ins->inst_p0;
2477
2478                         if ((d == 0.0) && (signbit (d) == 0)) {
2479                                 x86_fldz (code);
2480                         } else if (d == 1.0) {
2481                                 x86_fld1 (code);
2482                         } else {
2483                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
2484                                 x86_fld (code, NULL, TRUE);
2485                         }
2486                         break;
2487                 }
2488                 case OP_R4CONST: {
2489                         float f = *(float *)ins->inst_p0;
2490
2491                         if ((f == 0.0) && (signbit (f) == 0)) {
2492                                 x86_fldz (code);
2493                         } else if (f == 1.0) {
2494                                 x86_fld1 (code);
2495                         } else {
2496                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
2497                                 x86_fld (code, NULL, FALSE);
2498                         }
2499                         break;
2500                 }
2501                 case OP_STORER8_MEMBASE_REG:
2502                         x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, TRUE, TRUE);
2503                         break;
2504                 case OP_LOADR8_MEMBASE:
2505                         x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
2506                         break;
2507                 case OP_STORER4_MEMBASE_REG:
2508                         x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, FALSE, TRUE);
2509                         break;
2510                 case OP_LOADR4_MEMBASE:
2511                         x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
2512                         break;
2513                 case CEE_CONV_R4: /* FIXME: change precision */
2514                 case CEE_CONV_R8:
2515                         x86_push_reg (code, ins->sreg1);
2516                         x86_fild_membase (code, X86_ESP, 0, FALSE);
2517                         x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2518                         break;
2519                 case OP_X86_FP_LOAD_I8:
2520                         x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
2521                         break;
2522                 case OP_X86_FP_LOAD_I4:
2523                         x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
2524                         break;
2525                 case OP_FCONV_TO_I1:
2526                         code = emit_float_to_int (cfg, code, ins->dreg, 1, TRUE);
2527                         break;
2528                 case OP_FCONV_TO_U1:
2529                         code = emit_float_to_int (cfg, code, ins->dreg, 1, FALSE);
2530                         break;
2531                 case OP_FCONV_TO_I2:
2532                         code = emit_float_to_int (cfg, code, ins->dreg, 2, TRUE);
2533                         break;
2534                 case OP_FCONV_TO_U2:
2535                         code = emit_float_to_int (cfg, code, ins->dreg, 2, FALSE);
2536                         break;
2537                 case OP_FCONV_TO_I4:
2538                 case OP_FCONV_TO_I:
2539                         code = emit_float_to_int (cfg, code, ins->dreg, 4, TRUE);
2540                         break;
2541                 case OP_FCONV_TO_I8:
2542                         /* we defined this instruction to output only to eax:edx */
2543                         x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
2544                         x86_fnstcw_membase(code, X86_ESP, 0);
2545                         x86_mov_reg_membase (code, X86_EAX, X86_ESP, 0, 2);
2546                         x86_alu_reg_imm (code, X86_OR, X86_EAX, 0xc00);
2547                         x86_mov_membase_reg (code, X86_ESP, 2, X86_EAX, 2);
2548                         x86_fldcw_membase (code, X86_ESP, 2);
2549                         x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
2550                         x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
2551                         x86_pop_reg (code, X86_EAX);
2552                         x86_pop_reg (code, X86_EDX);
2553                         x86_fldcw_membase (code, X86_ESP, 0);
2554                         x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2555                         break;
2556                 case OP_LCONV_TO_R_UN: {
2557                         static guint8 mn[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x40 };
2558                         guint8 *br;
2559
2560                         /* load 64bit integer to FP stack */
2561                         x86_push_imm (code, 0);
2562                         x86_push_reg (code, ins->sreg2);
2563                         x86_push_reg (code, ins->sreg1);
2564                         x86_fild_membase (code, X86_ESP, 0, TRUE);
2565                         /* store as 80bit FP value */
2566                         x86_fst80_membase (code, X86_ESP, 0);
2567
2568                         /* test if lreg is negative */
2569                         x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
2570                         br = code; x86_branch8 (code, X86_CC_GEZ, 0, TRUE);
2571
2572                         /* add correction constant mn */
2573                         x86_fld80_mem (code, mn);
2574                         x86_fld80_membase (code, X86_ESP, 0);
2575                         x86_fp_op_reg (code, X86_FADD, 1, TRUE);
2576                         x86_fst80_membase (code, X86_ESP, 0);
2577
2578                         x86_patch (br, code);
2579
2580                         x86_fld80_membase (code, X86_ESP, 0);
2581                         x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
2582
2583                         break;
2584                 }
2585                 case OP_LCONV_TO_OVF_I: {
2586                         guint8 *br [3], *label [1];
2587
2588                         /*
2589                          * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
2590                          */
2591                         x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
2592
2593                         /* If the low word top bit is set, see if we are negative */
2594                         br [0] = code; x86_branch8 (code, X86_CC_LT, 0, TRUE);
2595                         /* We are not negative (no top bit set, check for our top word to be zero */
2596                         x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
2597                         br [1] = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
2598                         label [0] = code;
2599
2600                         /* throw exception */
2601                         mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC, "OverflowException");
2602                         x86_jump32 (code, 0);
2603
2604                         x86_patch (br [0], code);
2605                         /* our top bit is set, check that top word is 0xfffffff */
2606                         x86_alu_reg_imm (code, X86_CMP, ins->sreg2, 0xffffffff);
2607
2608                         x86_patch (br [1], code);
2609                         /* nope, emit exception */
2610                         br [2] = code; x86_branch8 (code, X86_CC_NE, 0, TRUE);
2611                         x86_patch (br [2], label [0]);
2612
2613                         if (ins->dreg != ins->sreg1)
2614                                 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2615                         break;
2616                 }
2617                 case OP_FADD:
2618                         x86_fp_op_reg (code, X86_FADD, 1, TRUE);
2619                         break;
2620                 case OP_FSUB:
2621                         x86_fp_op_reg (code, X86_FSUB, 1, TRUE);
2622                         break;
2623                 case OP_FMUL:
2624                         x86_fp_op_reg (code, X86_FMUL, 1, TRUE);
2625                         break;
2626                 case OP_FDIV:
2627                         x86_fp_op_reg (code, X86_FDIV, 1, TRUE);
2628                         break;
2629                 case OP_FNEG:
2630                         x86_fchs (code);
2631                         break;
2632                 case OP_SIN:
2633                         x86_fsin (code);
2634                         break;
2635                 case OP_COS:
2636                         x86_fcos (code);
2637                         break;
2638                 case OP_ABS:
2639                         x86_fabs (code);
2640                         break;
2641                 case OP_TAN: {
2642                         /*
2643                          * it really doesn't make sense to inline all this code,
2644                          * it's here just to show that things may not be as simple
2645                          * as they appear.
2646                          */
2647                         guchar *check_pos, *end_tan, *pop_jump;
2648                         x86_push_reg (code, X86_EAX);
2649                         x86_fptan (code);
2650                         x86_fnstsw (code);
2651                         x86_test_reg_imm (code, X86_EAX, 0x400);
2652                         check_pos = code;
2653                         x86_branch8 (code, X86_CC_NE, 0, FALSE);
2654                         x86_fstp (code, 0); /* pop the 1.0 */
2655                         end_tan = code;
2656                         x86_jump8 (code, 0);
2657                         x86_fldpi (code);
2658                         x86_fp_op (code, X86_FADD, 0);
2659                         x86_fxch (code, 1);
2660                         x86_fprem1 (code);
2661                         x86_fstsw (code);
2662                         x86_test_reg_imm (code, X86_EAX, 0x400);
2663                         pop_jump = code;
2664                         x86_branch8 (code, X86_CC_NE, 0, FALSE);
2665                         x86_fstp (code, 1);
2666                         x86_fptan (code);
2667                         x86_patch (pop_jump, code);
2668                         x86_fstp (code, 0); /* pop the 1.0 */
2669                         x86_patch (check_pos, code);
2670                         x86_patch (end_tan, code);
2671                         x86_pop_reg (code, X86_EAX);
2672                         break;
2673                 }
2674                 case OP_ATAN:
2675                         x86_fld1 (code);
2676                         x86_fpatan (code);
2677                         break;
2678                 case OP_SQRT:
2679                         x86_fsqrt (code);
2680                         break;
2681                 case OP_X86_FPOP:
2682                         x86_fstp (code, 0);
2683                         break;
2684                 case OP_FREM: {
2685                         guint8 *l1, *l2;
2686
2687                         x86_push_reg (code, X86_EAX);
2688                         /* we need to exchange ST(0) with ST(1) */
2689                         x86_fxch (code, 1);
2690
2691                         /* this requires a loop, because fprem somtimes
2692                          * returns a partial remainder */
2693                         l1 = code;
2694                         /* looks like MS is using fprem instead of the IEEE compatible fprem1 */
2695                         /* x86_fprem1 (code); */
2696                         x86_fprem (code);
2697                         x86_fnstsw (code);
2698                         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x0400);
2699                         l2 = code + 2;
2700                         x86_branch8 (code, X86_CC_NE, l1 - l2, FALSE);
2701
2702                         /* pop result */
2703                         x86_fstp (code, 1);
2704
2705                         x86_pop_reg (code, X86_EAX);
2706                         break;
2707                 }
2708                 case OP_FCOMPARE:
2709                         if (cfg->opt & MONO_OPT_FCMOV) {
2710                                 x86_fcomip (code, 1);
2711                                 x86_fstp (code, 0);
2712                                 break;
2713                         }
2714                         /* this overwrites EAX */
2715                         EMIT_FPCOMPARE(code);
2716                         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4500);
2717                         break;
2718                 case OP_FCEQ:
2719                         if (cfg->opt & MONO_OPT_FCMOV) {
2720                                 /* zeroing the register at the start results in
2721                                  * shorter and faster code (we can also remove the widening op)
2722                                  */
2723                                 guchar *unordered_check;
2724                                 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
2725                                 x86_fcomip (code, 1);
2726                                 x86_fstp (code, 0);
2727                                 unordered_check = code;
2728                                 x86_branch8 (code, X86_CC_P, 0, FALSE);
2729                                 x86_set_reg (code, X86_CC_EQ, ins->dreg, FALSE);
2730                                 x86_patch (unordered_check, code);
2731                                 break;
2732                         }
2733                         if (ins->dreg != X86_EAX)
2734                                 x86_push_reg (code, X86_EAX);
2735
2736                         EMIT_FPCOMPARE(code);
2737                         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4500);
2738                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
2739                         x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
2740                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2741
2742                         if (ins->dreg != X86_EAX)
2743                                 x86_pop_reg (code, X86_EAX);
2744                         break;
2745                 case OP_FCLT:
2746                 case OP_FCLT_UN:
2747                         if (cfg->opt & MONO_OPT_FCMOV) {
2748                                 /* zeroing the register at the start results in
2749                                  * shorter and faster code (we can also remove the widening op)
2750                                  */
2751                                 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
2752                                 x86_fcomip (code, 1);
2753                                 x86_fstp (code, 0);
2754                                 if (ins->opcode == OP_FCLT_UN) {
2755                                         guchar *unordered_check = code;
2756                                         guchar *jump_to_end;
2757                                         x86_branch8 (code, X86_CC_P, 0, FALSE);
2758                                         x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
2759                                         jump_to_end = code;
2760                                         x86_jump8 (code, 0);
2761                                         x86_patch (unordered_check, code);
2762                                         x86_inc_reg (code, ins->dreg);
2763                                         x86_patch (jump_to_end, code);
2764                                 } else {
2765                                         x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
2766                                 }
2767                                 break;
2768                         }
2769                         if (ins->dreg != X86_EAX)
2770                                 x86_push_reg (code, X86_EAX);
2771
2772                         EMIT_FPCOMPARE(code);
2773                         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4500);
2774                         if (ins->opcode == OP_FCLT_UN) {
2775                                 guchar *is_not_zero_check, *end_jump;
2776                                 is_not_zero_check = code;
2777                                 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
2778                                 end_jump = code;
2779                                 x86_jump8 (code, 0);
2780                                 x86_patch (is_not_zero_check, code);
2781                                 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4500);
2782
2783                                 x86_patch (end_jump, code);
2784                         }
2785                         x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
2786                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2787
2788                         if (ins->dreg != X86_EAX)
2789                                 x86_pop_reg (code, X86_EAX);
2790                         break;
2791                 case OP_FCGT:
2792                 case OP_FCGT_UN:
2793                         if (cfg->opt & MONO_OPT_FCMOV) {
2794                                 /* zeroing the register at the start results in
2795                                  * shorter and faster code (we can also remove the widening op)
2796                                  */
2797                                 guchar *unordered_check;
2798                                 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
2799                                 x86_fcomip (code, 1);
2800                                 x86_fstp (code, 0);
2801                                 if (ins->opcode == OP_FCGT) {
2802                                         unordered_check = code;
2803                                         x86_branch8 (code, X86_CC_P, 0, FALSE);
2804                                         x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
2805                                         x86_patch (unordered_check, code);
2806                                 } else {
2807                                         x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
2808                                 }
2809                                 break;
2810                         }
2811                         if (ins->dreg != X86_EAX)
2812                                 x86_push_reg (code, X86_EAX);
2813
2814                         EMIT_FPCOMPARE(code);
2815                         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4500);
2816                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x0100);
2817                         if (ins->opcode == OP_FCGT_UN) {
2818                                 guchar *is_not_zero_check, *end_jump;
2819                                 is_not_zero_check = code;
2820                                 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
2821                                 end_jump = code;
2822                                 x86_jump8 (code, 0);
2823                                 x86_patch (is_not_zero_check, code);
2824                                 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4500);
2825
2826                                 x86_patch (end_jump, code);
2827                         }
2828                         x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
2829                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2830
2831                         if (ins->dreg != X86_EAX)
2832                                 x86_pop_reg (code, X86_EAX);
2833                         break;
2834                 case OP_FBEQ:
2835                         if (cfg->opt & MONO_OPT_FCMOV) {
2836                                 guchar *jump = code;
2837                                 x86_branch8 (code, X86_CC_P, 0, TRUE);
2838                                 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2839                                 x86_patch (jump, code);
2840                                 break;
2841                         }
2842                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
2843                         EMIT_COND_BRANCH (ins, X86_CC_EQ, TRUE);
2844                         break;
2845                 case OP_FBNE_UN:
2846                         if (cfg->opt & MONO_OPT_FCMOV) {
2847                                 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
2848                                 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
2849                                 break;
2850                         }
2851                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
2852                         EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
2853                         break;
2854                 case OP_FBLT:
2855                         if (cfg->opt & MONO_OPT_FCMOV) {
2856                                 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
2857                                 break;
2858                         }
2859                         EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2860                         break;
2861                 case OP_FBLT_UN:
2862                         if (cfg->opt & MONO_OPT_FCMOV) {
2863                                 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
2864                                 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
2865                                 break;
2866                         }
2867                         if (ins->opcode == OP_FBLT_UN) {
2868                                 guchar *is_not_zero_check, *end_jump;
2869                                 is_not_zero_check = code;
2870                                 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
2871                                 end_jump = code;
2872                                 x86_jump8 (code, 0);
2873                                 x86_patch (is_not_zero_check, code);
2874                                 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4500);
2875
2876                                 x86_patch (end_jump, code);
2877                         }
2878                         EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2879                         break;
2880                 case OP_FBGT:
2881                 case OP_FBGT_UN:
2882                         if (cfg->opt & MONO_OPT_FCMOV) {
2883                                 EMIT_COND_BRANCH (ins, X86_CC_LT, FALSE);
2884                                 break;
2885                         }
2886                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x0100);
2887                         if (ins->opcode == OP_FBGT_UN) {
2888                                 guchar *is_not_zero_check, *end_jump;
2889                                 is_not_zero_check = code;
2890                                 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
2891                                 end_jump = code;
2892                                 x86_jump8 (code, 0);
2893                                 x86_patch (is_not_zero_check, code);
2894                                 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4500);
2895
2896                                 x86_patch (end_jump, code);
2897                         }
2898                         EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2899                         break;
2900                 case OP_FBGE:
2901                 case OP_FBGE_UN:
2902                         if (cfg->opt & MONO_OPT_FCMOV) {
2903                                 EMIT_COND_BRANCH (ins, X86_CC_LE, FALSE);
2904                                 break;
2905                         }
2906                         EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
2907                         break;
2908                 case OP_FBLE:
2909                 case OP_FBLE_UN:
2910                         if (cfg->opt & MONO_OPT_FCMOV) {
2911                                 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
2912                                 EMIT_COND_BRANCH (ins, X86_CC_GE, FALSE);
2913                                 break;
2914                         }
2915                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x0100);
2916                         EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
2917                         break;
2918                 case CEE_CKFINITE: {
2919                         x86_push_reg (code, X86_EAX);
2920                         x86_fxam (code);
2921                         x86_fnstsw (code);
2922                         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4100);
2923                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x0100);
2924                         x86_pop_reg (code, X86_EAX);
2925                         EMIT_COND_SYSTEM_EXCEPTION (X86_CC_EQ, FALSE, "ArithmeticException");
2926                         break;
2927                 }
2928                 default:
2929                         g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
2930                         g_assert_not_reached ();
2931                 }
2932
2933                 if ((code - cfg->native_code - offset) > max_len) {
2934                         g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
2935                                    mono_inst_name (ins->opcode), max_len, code - cfg->native_code - offset);
2936                         g_assert_not_reached ();
2937                 }
2938
2939                 cpos += max_len;
2940
2941                 last_ins = ins;
2942                 last_offset = offset;
2943
2944                 ins = ins->next;
2945         }
2946
2947         cfg->code_len = code - cfg->native_code;
2948 }
2949
2950 void
2951 mono_arch_register_lowlevel_calls (void)
2952 {
2953         mono_register_jit_icall (enter_method, "mono_enter_method", NULL, TRUE);
2954         mono_register_jit_icall (leave_method, "mono_leave_method", NULL, TRUE);
2955 }
2956
2957 void
2958 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji)
2959 {
2960         MonoJumpInfo *patch_info;
2961
2962         for (patch_info = ji; patch_info; patch_info = patch_info->next) {
2963                 unsigned char *ip = patch_info->ip.i + code;
2964                 const unsigned char *target = NULL;
2965
2966                 switch (patch_info->type) {
2967                 case MONO_PATCH_INFO_BB:
2968                         target = patch_info->data.bb->native_offset + code;
2969                         break;
2970                 case MONO_PATCH_INFO_ABS:
2971                         target = patch_info->data.target;
2972                         break;
2973                 case MONO_PATCH_INFO_LABEL:
2974                         target = patch_info->data.inst->inst_c0 + code;
2975                         break;
2976                 case MONO_PATCH_INFO_IP:
2977                         *((gpointer *)(ip)) = ip;
2978                         continue;
2979                 case MONO_PATCH_INFO_INTERNAL_METHOD: {
2980                         MonoJitICallInfo *mi = mono_find_jit_icall_by_name (patch_info->data.name);
2981                         if (!mi) {
2982                                 g_warning ("unknown MONO_PATCH_INFO_INTERNAL_METHOD %s", patch_info->data.name);
2983                                 g_assert_not_reached ();
2984                         }
2985                         target = mono_icall_get_wrapper (mi);
2986                         break;
2987                 }
2988                 case MONO_PATCH_INFO_METHOD_JUMP:
2989                         /* get the trampoline to the method from the domain */
2990                         if (!(target = g_hash_table_lookup (domain->jit_code_hash, patch_info->data.method))) {
2991                                 GSList *list;
2992                                 target = mono_arch_create_jump_trampoline (patch_info->data.method);
2993                                 if (!domain->jump_target_hash)
2994                                         domain->jump_target_hash = g_hash_table_new (NULL, NULL);
2995                                 list = g_hash_table_lookup (domain->jump_target_hash, patch_info->data.method);
2996                                 list = g_slist_prepend (list, ip);
2997                                 g_hash_table_insert (domain->jump_target_hash, patch_info->data.method, list);
2998                         }
2999                         break;
3000                 case MONO_PATCH_INFO_METHOD:
3001                         if (patch_info->data.method == method) {
3002                                 target = code;
3003                         } else {
3004                                 /* get the trampoline to the method from the domain */
3005                                 if (!(target = g_hash_table_lookup (domain->jit_code_hash, patch_info->data.method)))
3006                                         target = mono_arch_create_jit_trampoline (patch_info->data.method);
3007                         }
3008                         break;
3009                 case MONO_PATCH_INFO_SWITCH: {
3010                         gpointer *table = (gpointer *)patch_info->data.target;
3011                         int i;
3012
3013                         *((gconstpointer *)(ip + 2)) = patch_info->data.target;
3014
3015                         for (i = 0; i < patch_info->table_size; i++) {
3016                                 table [i] = (int)patch_info->data.table [i] + code;
3017                         }
3018                         /* we put into the table the absolute address, no need fo x86_patch in this case */
3019                         continue;
3020                 }
3021                 case MONO_PATCH_INFO_METHODCONST:
3022                 case MONO_PATCH_INFO_CLASS:
3023                 case MONO_PATCH_INFO_IMAGE:
3024                 case MONO_PATCH_INFO_FIELD:
3025                         *((gconstpointer *)(ip + 1)) = patch_info->data.target;
3026                         continue;
3027                 case MONO_PATCH_INFO_R4:
3028                 case MONO_PATCH_INFO_R8:
3029                         *((gconstpointer *)(ip + 2)) = patch_info->data.target;
3030                         continue;
3031                 default:
3032                         g_assert_not_reached ();
3033                 }
3034                 x86_patch (ip, target);
3035         }
3036 }
3037
3038 int
3039 mono_arch_max_epilog_size (MonoCompile *cfg)
3040 {
3041         int exc_count = 0, max_epilog_size = 16;
3042         MonoJumpInfo *patch_info;
3043
3044         if (cfg->method->save_lmf)
3045                 max_epilog_size += 128;
3046
3047         if (mono_jit_trace_calls)
3048                 max_epilog_size += 50;
3049
3050         if (mono_jit_profile)
3051                 max_epilog_size += 50;
3052
3053         /* count the number of exception infos */
3054
3055         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3056                 if (patch_info->type == MONO_PATCH_INFO_EXC)
3057                         exc_count++;
3058         }
3059
3060         /*
3061          * make sure we have enough space for exceptions
3062          * 16 is the size of two push_imm instructions and a call
3063          */
3064         max_epilog_size += exc_count*16;
3065
3066         return max_epilog_size;
3067 }
3068
3069 guint8 *
3070 mono_arch_emit_prolog (MonoCompile *cfg)
3071 {
3072         MonoMethod *method = cfg->method;
3073         MonoBasicBlock *bb;
3074         MonoMethodSignature *sig;
3075         MonoInst *inst;
3076         int alloc_size, pos, max_offset, i;
3077         guint8 *code;
3078
3079         cfg->code_size =  MAX (((MonoMethodNormal *)method)->header->code_size * 4, 256);
3080         code = cfg->native_code = g_malloc (cfg->code_size);
3081
3082         x86_push_reg (code, X86_EBP);
3083         x86_mov_reg_reg (code, X86_EBP, X86_ESP, 4);
3084
3085         alloc_size = - cfg->stack_offset;
3086         pos = 0;
3087
3088         if (method->save_lmf) {
3089                 pos += sizeof (MonoLMF);
3090
3091                 /* save the current IP */
3092                 mono_add_patch_info (cfg, code + 1 - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3093                 x86_push_imm (code, 0);
3094
3095                 /* save all caller saved regs */
3096                 x86_push_reg (code, X86_EBX);
3097                 x86_push_reg (code, X86_EDI);
3098                 x86_push_reg (code, X86_ESI);
3099                 x86_push_reg (code, X86_EBP);
3100
3101                 /* save method info */
3102                 x86_push_imm (code, method);
3103
3104                 /* get the address of lmf for the current thread */
3105                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3106                                      (gpointer)"mono_get_lmf_addr");
3107                 x86_call_code (code, 0);
3108
3109                 /* push lmf */
3110                 x86_push_reg (code, X86_EAX);
3111                 /* push *lfm (previous_lmf) */
3112                 x86_push_membase (code, X86_EAX, 0);
3113                 /* *(lmf) = ESP */
3114                 x86_mov_membase_reg (code, X86_EAX, 0, X86_ESP, 4);
3115         } else {
3116
3117                 if (cfg->used_int_regs & (1 << X86_EBX)) {
3118                         x86_push_reg (code, X86_EBX);
3119                         pos += 4;
3120                 }
3121
3122                 if (cfg->used_int_regs & (1 << X86_EDI)) {
3123                         x86_push_reg (code, X86_EDI);
3124                         pos += 4;
3125                 }
3126
3127                 if (cfg->used_int_regs & (1 << X86_ESI)) {
3128                         x86_push_reg (code, X86_ESI);
3129                         pos += 4;
3130                 }
3131         }
3132
3133         alloc_size -= pos;
3134
3135         if (alloc_size)
3136                 x86_alu_reg_imm (code, X86_SUB, X86_ESP, alloc_size);
3137
3138         /* compute max_offset in order to use short forward jumps */
3139         max_offset = 0;
3140         if (cfg->opt & MONO_OPT_BRANCH) {
3141                 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
3142                         MonoInst *ins = bb->code;
3143                         bb->max_offset = max_offset;
3144
3145                         if (mono_trace_coverage)
3146                                 max_offset += 6;
3147
3148                         while (ins) {
3149                                 max_offset += ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
3150                                 ins = ins->next;
3151                         }
3152                 }
3153         }
3154
3155         if (mono_jit_trace_calls)
3156                 code = mono_arch_instrument_prolog (cfg, enter_method, code, TRUE);
3157
3158         /* load arguments allocated to register from the stack */
3159         sig = method->signature;
3160         pos = 0;
3161
3162         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3163                 inst = cfg->varinfo [pos];
3164                 if (inst->opcode == OP_REGVAR) {
3165                         x86_mov_reg_membase (code, inst->dreg, X86_EBP, inst->inst_offset, 4);
3166                         if (cfg->verbose_level > 2)
3167                                 g_print ("Argument %d assigned to register %s\n", pos, mono_arch_regname (inst->dreg));
3168                 }
3169                 pos++;
3170         }
3171
3172         cfg->code_len = code - cfg->native_code;
3173
3174         return code;
3175 }
3176
3177 void
3178 mono_arch_emit_epilog (MonoCompile *cfg)
3179 {
3180         MonoJumpInfo *patch_info;
3181         MonoMethod *method = cfg->method;
3182         int pos;
3183         guint8 *code;
3184
3185         code = cfg->native_code + cfg->code_len;
3186
3187         if (mono_jit_trace_calls)
3188                 code = mono_arch_instrument_epilog (cfg, leave_method, code, TRUE);
3189
3190         /* the code restoring the registers must be kept in sync with CEE_JMP */
3191         pos = 0;
3192
3193         if (method->save_lmf) {
3194                 pos = -sizeof (MonoLMF);
3195         } else {
3196                 if (cfg->used_int_regs & (1 << X86_EBX)) {
3197                         pos -= 4;
3198                 }
3199                 if (cfg->used_int_regs & (1 << X86_EDI)) {
3200                         pos -= 4;
3201                 }
3202                 if (cfg->used_int_regs & (1 << X86_ESI)) {
3203                         pos -= 4;
3204                 }
3205         }
3206
3207         if (pos)
3208                 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
3209
3210         if (method->save_lmf) {
3211                 /* ebx = previous_lmf */
3212                 x86_pop_reg (code, X86_EBX);
3213                 /* edi = lmf */
3214                 x86_pop_reg (code, X86_EDI);
3215                 /* *(lmf) = previous_lmf */
3216                 x86_mov_membase_reg (code, X86_EDI, 0, X86_EBX, 4);
3217
3218                 /* discard method info */
3219                 x86_pop_reg (code, X86_ESI);
3220
3221                 /* restore caller saved regs */
3222                 x86_pop_reg (code, X86_EBP);
3223                 x86_pop_reg (code, X86_ESI);
3224                 x86_pop_reg (code, X86_EDI);
3225                 x86_pop_reg (code, X86_EBX);
3226
3227         } else {
3228
3229                 if (cfg->used_int_regs & (1 << X86_ESI)) {
3230                         x86_pop_reg (code, X86_ESI);
3231                 }
3232                 if (cfg->used_int_regs & (1 << X86_EDI)) {
3233                         x86_pop_reg (code, X86_EDI);
3234                 }
3235                 if (cfg->used_int_regs & (1 << X86_EBX)) {
3236                         x86_pop_reg (code, X86_EBX);
3237                 }
3238         }
3239
3240         x86_leave (code);
3241         /* FIXME: add another check to support stdcall convention here */
3242         if (MONO_TYPE_ISSTRUCT (cfg->method->signature->ret))
3243                 x86_ret_imm (code, 4);
3244         else
3245                 x86_ret (code);
3246
3247         /* add code to raise exceptions */
3248         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3249                 switch (patch_info->type) {
3250                 case MONO_PATCH_INFO_EXC:
3251                         x86_patch (patch_info->ip.i + cfg->native_code, code);
3252                         x86_push_imm (code, patch_info->data.target);
3253                         x86_push_imm (code, patch_info->ip.i + cfg->native_code);
3254                         patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
3255                         patch_info->data.name = "mono_arch_throw_exception_by_name";
3256                         patch_info->ip.i = code - cfg->native_code;
3257                         x86_jump_code (code, 0);
3258                         break;
3259                 default:
3260                         /* do nothing */
3261                         break;
3262                 }
3263         }
3264
3265         cfg->code_len = code - cfg->native_code;
3266
3267         g_assert (cfg->code_len < cfg->code_size);
3268
3269 }
3270
3271 void
3272 mono_arch_flush_icache (guint8 *code, gint size)
3273 {
3274         /* not needed */
3275 }
3276