2 * mini-x86.c: x86 backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
9 * (C) 2003 Ximian, Inc.
18 #include <mono/metadata/appdomain.h>
19 #include <mono/metadata/debug-helpers.h>
20 #include <mono/metadata/threads.h>
21 #include <mono/metadata/profiler-private.h>
22 #include <mono/metadata/mono-debug.h>
23 #include <mono/utils/mono-math.h>
30 /* On windows, these hold the key returned by TlsAlloc () */
31 static gint lmf_tls_offset = -1;
32 static gint lmf_addr_tls_offset = -1;
33 static gint appdomain_tls_offset = -1;
34 static gint thread_tls_offset = -1;
37 static gboolean optimize_for_xen = TRUE;
39 #define optimize_for_xen 0
43 static gboolean is_win32 = TRUE;
45 static gboolean is_win32 = FALSE;
48 /* This mutex protects architecture specific caches */
49 #define mono_mini_arch_lock() EnterCriticalSection (&mini_arch_mutex)
50 #define mono_mini_arch_unlock() LeaveCriticalSection (&mini_arch_mutex)
51 static CRITICAL_SECTION mini_arch_mutex;
53 #define ALIGN_TO(val,align) ((((guint64)val) + ((align) - 1)) & ~((align) - 1))
58 /* Under windows, the default pinvoke calling convention is stdcall */
59 #define CALLCONV_IS_STDCALL(sig) ((((sig)->call_convention) == MONO_CALL_STDCALL) || ((sig)->pinvoke && ((sig)->call_convention) == MONO_CALL_DEFAULT))
61 #define CALLCONV_IS_STDCALL(sig) (((sig)->call_convention) == MONO_CALL_STDCALL)
65 mono_breakpoint_info [MONO_BREAKPOINT_ARRAY_SIZE];
68 mono_arch_regname (int reg)
71 case X86_EAX: return "%eax";
72 case X86_EBX: return "%ebx";
73 case X86_ECX: return "%ecx";
74 case X86_EDX: return "%edx";
75 case X86_ESP: return "%esp";
76 case X86_EBP: return "%ebp";
77 case X86_EDI: return "%edi";
78 case X86_ESI: return "%esi";
84 mono_arch_fregname (int reg)
124 /* Only if storage == ArgValuetypeInReg */
125 ArgStorage pair_storage [2];
134 gboolean need_stack_align;
135 guint32 stack_align_amount;
143 #define FLOAT_PARAM_REGS 0
145 static X86_Reg_No param_regs [] = { 0 };
147 #if defined(PLATFORM_WIN32) || defined(__APPLE__) || defined(__FreeBSD__)
148 #define SMALL_STRUCTS_IN_REGS
149 static X86_Reg_No return_regs [] = { X86_EAX, X86_EDX };
153 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo)
155 ainfo->offset = *stack_size;
157 if (*gr >= PARAM_REGS) {
158 ainfo->storage = ArgOnStack;
159 (*stack_size) += sizeof (gpointer);
162 ainfo->storage = ArgInIReg;
163 ainfo->reg = param_regs [*gr];
169 add_general_pair (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo)
171 ainfo->offset = *stack_size;
173 g_assert (PARAM_REGS == 0);
175 ainfo->storage = ArgOnStack;
176 (*stack_size) += sizeof (gpointer) * 2;
180 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean is_double)
182 ainfo->offset = *stack_size;
184 if (*gr >= FLOAT_PARAM_REGS) {
185 ainfo->storage = ArgOnStack;
186 (*stack_size) += is_double ? 8 : 4;
189 /* A double register */
191 ainfo->storage = ArgInDoubleSSEReg;
193 ainfo->storage = ArgInFloatSSEReg;
201 add_valuetype (MonoGenericSharingContext *gsctx, MonoMethodSignature *sig, ArgInfo *ainfo, MonoType *type,
203 guint32 *gr, guint32 *fr, guint32 *stack_size)
208 klass = mono_class_from_mono_type (type);
210 size = mono_type_native_stack_size (&klass->byval_arg, NULL);
212 size = mini_type_stack_size (gsctx, &klass->byval_arg, NULL);
214 #ifdef SMALL_STRUCTS_IN_REGS
215 if (sig->pinvoke && is_return) {
216 MonoMarshalType *info;
219 * the exact rules are not very well documented, the code below seems to work with the
220 * code generated by gcc 3.3.3 -mno-cygwin.
222 info = mono_marshal_load_type_info (klass);
225 ainfo->pair_storage [0] = ainfo->pair_storage [1] = ArgNone;
227 /* Special case structs with only a float member */
228 if ((info->native_size == 8) && (info->num_fields == 1) && (info->fields [0].field->type->type == MONO_TYPE_R8)) {
229 ainfo->storage = ArgValuetypeInReg;
230 ainfo->pair_storage [0] = ArgOnDoubleFpStack;
233 if ((info->native_size == 4) && (info->num_fields == 1) && (info->fields [0].field->type->type == MONO_TYPE_R4)) {
234 ainfo->storage = ArgValuetypeInReg;
235 ainfo->pair_storage [0] = ArgOnFloatFpStack;
238 if ((info->native_size == 1) || (info->native_size == 2) || (info->native_size == 4) || (info->native_size == 8)) {
239 ainfo->storage = ArgValuetypeInReg;
240 ainfo->pair_storage [0] = ArgInIReg;
241 ainfo->pair_regs [0] = return_regs [0];
242 if (info->native_size > 4) {
243 ainfo->pair_storage [1] = ArgInIReg;
244 ainfo->pair_regs [1] = return_regs [1];
251 ainfo->offset = *stack_size;
252 ainfo->storage = ArgOnStack;
253 *stack_size += ALIGN_TO (size, sizeof (gpointer));
259 * Obtain information about a call according to the calling convention.
260 * For x86 ELF, see the "System V Application Binary Interface Intel386
261 * Architecture Processor Supplment, Fourth Edition" document for more
263 * For x86 win32, see ???.
266 get_call_info (MonoGenericSharingContext *gsctx, MonoMemPool *mp, MonoMethodSignature *sig, gboolean is_pinvoke)
270 int n = sig->hasthis + sig->param_count;
271 guint32 stack_size = 0;
275 cinfo = mono_mempool_alloc0 (mp, sizeof (CallInfo) + (sizeof (ArgInfo) * n));
277 cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
284 ret_type = mono_type_get_underlying_type (sig->ret);
285 ret_type = mini_get_basic_type_from_generic (gsctx, ret_type);
286 switch (ret_type->type) {
287 case MONO_TYPE_BOOLEAN:
298 case MONO_TYPE_FNPTR:
299 case MONO_TYPE_CLASS:
300 case MONO_TYPE_OBJECT:
301 case MONO_TYPE_SZARRAY:
302 case MONO_TYPE_ARRAY:
303 case MONO_TYPE_STRING:
304 cinfo->ret.storage = ArgInIReg;
305 cinfo->ret.reg = X86_EAX;
309 cinfo->ret.storage = ArgInIReg;
310 cinfo->ret.reg = X86_EAX;
313 cinfo->ret.storage = ArgOnFloatFpStack;
316 cinfo->ret.storage = ArgOnDoubleFpStack;
318 case MONO_TYPE_GENERICINST:
319 if (!mono_type_generic_inst_is_valuetype (sig->ret)) {
320 cinfo->ret.storage = ArgInIReg;
321 cinfo->ret.reg = X86_EAX;
325 case MONO_TYPE_VALUETYPE: {
326 guint32 tmp_gr = 0, tmp_fr = 0, tmp_stacksize = 0;
328 add_valuetype (gsctx, sig, &cinfo->ret, sig->ret, TRUE, &tmp_gr, &tmp_fr, &tmp_stacksize);
329 if (cinfo->ret.storage == ArgOnStack)
330 /* The caller passes the address where the value is stored */
331 add_general (&gr, &stack_size, &cinfo->ret);
334 case MONO_TYPE_TYPEDBYREF:
335 /* Same as a valuetype with size 24 */
336 add_general (&gr, &stack_size, &cinfo->ret);
340 cinfo->ret.storage = ArgNone;
343 g_error ("Can't handle as return value 0x%x", sig->ret->type);
349 add_general (&gr, &stack_size, cinfo->args + 0);
351 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
353 fr = FLOAT_PARAM_REGS;
355 /* Emit the signature cookie just before the implicit arguments */
356 add_general (&gr, &stack_size, &cinfo->sig_cookie);
359 for (i = 0; i < sig->param_count; ++i) {
360 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
363 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
364 /* We allways pass the sig cookie on the stack for simplicity */
366 * Prevent implicit arguments + the sig cookie from being passed
370 fr = FLOAT_PARAM_REGS;
372 /* Emit the signature cookie just before the implicit arguments */
373 add_general (&gr, &stack_size, &cinfo->sig_cookie);
376 if (sig->params [i]->byref) {
377 add_general (&gr, &stack_size, ainfo);
380 ptype = mono_type_get_underlying_type (sig->params [i]);
381 ptype = mini_get_basic_type_from_generic (gsctx, ptype);
382 switch (ptype->type) {
383 case MONO_TYPE_BOOLEAN:
386 add_general (&gr, &stack_size, ainfo);
391 add_general (&gr, &stack_size, ainfo);
395 add_general (&gr, &stack_size, ainfo);
400 case MONO_TYPE_FNPTR:
401 case MONO_TYPE_CLASS:
402 case MONO_TYPE_OBJECT:
403 case MONO_TYPE_STRING:
404 case MONO_TYPE_SZARRAY:
405 case MONO_TYPE_ARRAY:
406 add_general (&gr, &stack_size, ainfo);
408 case MONO_TYPE_GENERICINST:
409 if (!mono_type_generic_inst_is_valuetype (sig->params [i])) {
410 add_general (&gr, &stack_size, ainfo);
414 case MONO_TYPE_VALUETYPE:
415 add_valuetype (gsctx, sig, ainfo, sig->params [i], FALSE, &gr, &fr, &stack_size);
417 case MONO_TYPE_TYPEDBYREF:
418 stack_size += sizeof (MonoTypedRef);
419 ainfo->storage = ArgOnStack;
423 add_general_pair (&gr, &stack_size, ainfo);
426 add_float (&fr, &stack_size, ainfo, FALSE);
429 add_float (&fr, &stack_size, ainfo, TRUE);
432 g_error ("unexpected type 0x%x", ptype->type);
433 g_assert_not_reached ();
437 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
439 fr = FLOAT_PARAM_REGS;
441 /* Emit the signature cookie just before the implicit arguments */
442 add_general (&gr, &stack_size, &cinfo->sig_cookie);
445 #if defined(__APPLE__)
446 if ((stack_size % 16) != 0) {
447 cinfo->need_stack_align = TRUE;
448 stack_size += cinfo->stack_align_amount = 16-(stack_size % 16);
452 cinfo->stack_usage = stack_size;
453 cinfo->reg_usage = gr;
454 cinfo->freg_usage = fr;
459 * mono_arch_get_argument_info:
460 * @csig: a method signature
461 * @param_count: the number of parameters to consider
462 * @arg_info: an array to store the result infos
464 * Gathers information on parameters such as size, alignment and
465 * padding. arg_info should be large enought to hold param_count + 1 entries.
467 * Returns the size of the activation frame.
470 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
472 int k, frame_size = 0;
478 cinfo = get_call_info (NULL, NULL, csig, FALSE);
480 if (MONO_TYPE_ISSTRUCT (csig->ret) && (cinfo->ret.storage == ArgOnStack)) {
481 frame_size += sizeof (gpointer);
485 arg_info [0].offset = offset;
488 frame_size += sizeof (gpointer);
492 arg_info [0].size = frame_size;
494 for (k = 0; k < param_count; k++) {
497 size = mono_type_native_stack_size (csig->params [k], &align);
500 size = mini_type_stack_size (NULL, csig->params [k], &ialign);
504 /* ignore alignment for now */
507 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
508 arg_info [k].pad = pad;
510 arg_info [k + 1].pad = 0;
511 arg_info [k + 1].size = size;
513 arg_info [k + 1].offset = offset;
517 align = MONO_ARCH_FRAME_ALIGNMENT;
518 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
519 arg_info [k].pad = pad;
526 static const guchar cpuid_impl [] = {
527 0x55, /* push %ebp */
528 0x89, 0xe5, /* mov %esp,%ebp */
529 0x53, /* push %ebx */
530 0x8b, 0x45, 0x08, /* mov 0x8(%ebp),%eax */
531 0x0f, 0xa2, /* cpuid */
532 0x50, /* push %eax */
533 0x8b, 0x45, 0x10, /* mov 0x10(%ebp),%eax */
534 0x89, 0x18, /* mov %ebx,(%eax) */
535 0x8b, 0x45, 0x14, /* mov 0x14(%ebp),%eax */
536 0x89, 0x08, /* mov %ecx,(%eax) */
537 0x8b, 0x45, 0x18, /* mov 0x18(%ebp),%eax */
538 0x89, 0x10, /* mov %edx,(%eax) */
540 0x8b, 0x55, 0x0c, /* mov 0xc(%ebp),%edx */
541 0x89, 0x02, /* mov %eax,(%edx) */
547 typedef void (*CpuidFunc) (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx);
550 cpuid (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx)
554 __asm__ __volatile__ (
557 "movl %%eax, %%edx\n"
558 "xorl $0x200000, %%eax\n"
563 "xorl %%edx, %%eax\n"
564 "andl $0x200000, %%eax\n"
586 /* Have to use the code manager to get around WinXP DEP */
587 static CpuidFunc func = NULL;
590 ptr = mono_global_codeman_reserve (sizeof (cpuid_impl));
591 memcpy (ptr, cpuid_impl, sizeof (cpuid_impl));
592 func = (CpuidFunc)ptr;
594 func (id, p_eax, p_ebx, p_ecx, p_edx);
597 * We use this approach because of issues with gcc and pic code, see:
598 * http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=7329
599 __asm__ __volatile__ ("cpuid"
600 : "=a" (*p_eax), "=b" (*p_ebx), "=c" (*p_ecx), "=d" (*p_edx)
609 * Initialize the cpu to execute managed code.
612 mono_arch_cpu_init (void)
614 /* spec compliance requires running with double precision */
618 __asm__ __volatile__ ("fnstcw %0\n": "=m" (fpcw));
619 fpcw &= ~X86_FPCW_PRECC_MASK;
620 fpcw |= X86_FPCW_PREC_DOUBLE;
621 __asm__ __volatile__ ("fldcw %0\n": : "m" (fpcw));
622 __asm__ __volatile__ ("fnstcw %0\n": "=m" (fpcw));
624 _control87 (_PC_53, MCW_PC);
629 * Initialize architecture specific code.
632 mono_arch_init (void)
634 InitializeCriticalSection (&mini_arch_mutex);
638 * Cleanup architecture specific code.
641 mono_arch_cleanup (void)
643 DeleteCriticalSection (&mini_arch_mutex);
647 * This function returns the optimizations supported on this cpu.
650 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
652 int eax, ebx, ecx, edx;
656 /* Feature Flags function, flags returned in EDX. */
657 if (cpuid (1, &eax, &ebx, &ecx, &edx)) {
658 if (edx & (1 << 15)) {
659 opts |= MONO_OPT_CMOV;
661 opts |= MONO_OPT_FCMOV;
663 *exclude_mask |= MONO_OPT_FCMOV;
665 *exclude_mask |= MONO_OPT_CMOV;
667 opts |= MONO_OPT_SSE2;
669 *exclude_mask |= MONO_OPT_SSE2;
675 * Determine whenever the trap whose info is in SIGINFO is caused by
679 mono_arch_is_int_overflow (void *sigctx, void *info)
684 mono_arch_sigctx_to_monoctx (sigctx, &ctx);
686 ip = (guint8*)ctx.eip;
688 if ((ip [0] == 0xf7) && (x86_modrm_mod (ip [1]) == 0x3) && (x86_modrm_reg (ip [1]) == 0x7)) {
692 switch (x86_modrm_rm (ip [1])) {
712 g_assert_not_reached ();
724 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
729 for (i = 0; i < cfg->num_varinfo; i++) {
730 MonoInst *ins = cfg->varinfo [i];
731 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
734 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
737 if ((ins->flags & (MONO_INST_IS_DEAD|MONO_INST_VOLATILE|MONO_INST_INDIRECT)) ||
738 (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
741 /* we dont allocate I1 to registers because there is no simply way to sign extend
742 * 8bit quantities in caller saved registers on x86 */
743 if (mono_is_regsize_var (ins->inst_vtype) && (ins->inst_vtype->type != MONO_TYPE_I1)) {
744 g_assert (MONO_VARINFO (cfg, i)->reg == -1);
745 g_assert (i == vmv->idx);
746 vars = g_list_prepend (vars, vmv);
750 vars = mono_varlist_sort (cfg, vars, 0);
756 mono_arch_get_global_int_regs (MonoCompile *cfg)
760 /* we can use 3 registers for global allocation */
761 regs = g_list_prepend (regs, (gpointer)X86_EBX);
762 regs = g_list_prepend (regs, (gpointer)X86_ESI);
763 regs = g_list_prepend (regs, (gpointer)X86_EDI);
769 * mono_arch_regalloc_cost:
771 * Return the cost, in number of memory references, of the action of
772 * allocating the variable VMV into a register during global register
776 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
778 MonoInst *ins = cfg->varinfo [vmv->idx];
780 if (cfg->method->save_lmf)
781 /* The register is already saved */
782 return (ins->opcode == OP_ARG) ? 1 : 0;
784 /* push+pop+possible load if it is an argument */
785 return (ins->opcode == OP_ARG) ? 3 : 2;
789 * Set var information according to the calling convention. X86 version.
790 * The locals var stuff should most likely be split in another method.
793 mono_arch_allocate_vars (MonoCompile *cfg)
795 MonoMethodSignature *sig;
796 MonoMethodHeader *header;
798 guint32 locals_stack_size, locals_stack_align;
803 header = mono_method_get_header (cfg->method);
804 sig = mono_method_signature (cfg->method);
806 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
808 cfg->frame_reg = MONO_ARCH_BASEREG;
811 /* Reserve space to save LMF and caller saved registers */
813 if (cfg->method->save_lmf) {
814 offset += sizeof (MonoLMF);
816 if (cfg->used_int_regs & (1 << X86_EBX)) {
820 if (cfg->used_int_regs & (1 << X86_EDI)) {
824 if (cfg->used_int_regs & (1 << X86_ESI)) {
829 switch (cinfo->ret.storage) {
830 case ArgValuetypeInReg:
831 /* Allocate a local to hold the result, the epilog will copy it to the correct place */
833 cfg->ret->opcode = OP_REGOFFSET;
834 cfg->ret->inst_basereg = X86_EBP;
835 cfg->ret->inst_offset = - offset;
841 /* Allocate locals */
842 offsets = mono_allocate_stack_slots (cfg, &locals_stack_size, &locals_stack_align);
843 if (locals_stack_align) {
844 offset += (locals_stack_align - 1);
845 offset &= ~(locals_stack_align - 1);
847 for (i = cfg->locals_start; i < cfg->num_varinfo; i++) {
848 if (offsets [i] != -1) {
849 MonoInst *inst = cfg->varinfo [i];
850 inst->opcode = OP_REGOFFSET;
851 inst->inst_basereg = X86_EBP;
852 inst->inst_offset = - (offset + offsets [i]);
853 //printf ("allocated local %d to ", i); mono_print_tree_nl (inst);
856 offset += locals_stack_size;
860 * Allocate arguments+return value
863 switch (cinfo->ret.storage) {
865 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
867 * In the new IR, the cfg->vret_addr variable represents the
868 * vtype return value.
870 cfg->vret_addr->opcode = OP_REGOFFSET;
871 cfg->vret_addr->inst_basereg = cfg->frame_reg;
872 cfg->vret_addr->inst_offset = cinfo->ret.offset + ARGS_OFFSET;
873 if (G_UNLIKELY (cfg->verbose_level > 1)) {
874 printf ("vret_addr =");
875 mono_print_ins (cfg->vret_addr);
878 cfg->ret->opcode = OP_REGOFFSET;
879 cfg->ret->inst_basereg = X86_EBP;
880 cfg->ret->inst_offset = cinfo->ret.offset + ARGS_OFFSET;
883 case ArgValuetypeInReg:
886 cfg->ret->opcode = OP_REGVAR;
887 cfg->ret->inst_c0 = cinfo->ret.reg;
890 case ArgOnFloatFpStack:
891 case ArgOnDoubleFpStack:
894 g_assert_not_reached ();
897 if (sig->call_convention == MONO_CALL_VARARG) {
898 g_assert (cinfo->sig_cookie.storage == ArgOnStack);
899 cfg->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
902 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
903 ArgInfo *ainfo = &cinfo->args [i];
904 inst = cfg->args [i];
905 if (inst->opcode != OP_REGVAR) {
906 inst->opcode = OP_REGOFFSET;
907 inst->inst_basereg = X86_EBP;
909 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
912 offset += (MONO_ARCH_FRAME_ALIGNMENT - 1);
913 offset &= ~(MONO_ARCH_FRAME_ALIGNMENT - 1);
915 cfg->stack_offset = offset;
919 mono_arch_create_vars (MonoCompile *cfg)
921 MonoMethodSignature *sig;
924 sig = mono_method_signature (cfg->method);
926 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
928 if (cinfo->ret.storage == ArgValuetypeInReg)
929 cfg->ret_var_is_local = TRUE;
930 if ((cinfo->ret.storage != ArgValuetypeInReg) && MONO_TYPE_ISSTRUCT (sig->ret)) {
931 cfg->vret_addr = mono_compile_create_var (cfg, &mono_defaults.int_class->byval_arg, OP_ARG);
935 /* Fixme: we need an alignment solution for enter_method and mono_arch_call_opcode,
936 * currently alignment in mono_arch_call_opcode is computed without arch_get_argument_info
940 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call)
943 MonoMethodSignature *tmp_sig;
946 /* FIXME: Add support for signature tokens to AOT */
947 cfg->disable_aot = TRUE;
948 MONO_INST_NEW (cfg, arg, OP_OUTARG);
951 * mono_ArgIterator_Setup assumes the signature cookie is
952 * passed first and all the arguments which were before it are
953 * passed on the stack after the signature. So compensate by
954 * passing a different signature.
956 tmp_sig = mono_metadata_signature_dup (call->signature);
957 tmp_sig->param_count -= call->signature->sentinelpos;
958 tmp_sig->sentinelpos = 0;
959 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
961 MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
962 sig_arg->inst_p0 = tmp_sig;
964 arg->inst_left = sig_arg;
965 arg->type = STACK_PTR;
966 MONO_INST_LIST_ADD (&arg->node, &call->out_args);
970 * It is expensive to adjust esp for each individual fp argument pushed on the stack
971 * so we try to do it just once when we have multiple fp arguments in a row.
972 * We don't use this mechanism generally because for int arguments the generated code
973 * is slightly bigger and new generation cpus optimize away the dependency chains
974 * created by push instructions on the esp value.
975 * fp_arg_setup is the first argument in the execution sequence where the esp register
979 collect_fp_stack_space (MonoMethodSignature *sig, int start_arg, int *fp_arg_setup)
984 for (; start_arg < sig->param_count; ++start_arg) {
985 t = mono_type_get_underlying_type (sig->params [start_arg]);
986 if (!t->byref && t->type == MONO_TYPE_R8) {
987 fp_space += sizeof (double);
988 *fp_arg_setup = start_arg;
997 * take the arguments and generate the arch-specific
998 * instructions to properly call the function in call.
999 * This includes pushing, moving arguments to the right register
1003 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
1005 MonoMethodSignature *sig;
1008 int sentinelpos = 0;
1009 int fp_args_space = 0, fp_args_offset = 0, fp_arg_setup = -1;
1011 sig = call->signature;
1012 n = sig->param_count + sig->hasthis;
1014 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
1016 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG))
1017 sentinelpos = sig->sentinelpos + (is_virtual ? 1 : 0);
1019 for (i = 0; i < n; ++i) {
1020 ArgInfo *ainfo = cinfo->args + i;
1022 /* Emit the signature cookie just before the implicit arguments */
1023 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sentinelpos)) {
1024 emit_sig_cookie (cfg, call);
1027 if (is_virtual && i == 0) {
1028 /* the argument will be attached to the call instrucion */
1029 in = call->args [i];
1033 if (i >= sig->hasthis)
1034 t = sig->params [i - sig->hasthis];
1036 t = &mono_defaults.int_class->byval_arg;
1037 t = mono_type_get_underlying_type (t);
1039 MONO_INST_NEW (cfg, arg, OP_OUTARG);
1040 in = call->args [i];
1041 arg->cil_code = in->cil_code;
1042 arg->inst_left = in;
1043 arg->type = in->type;
1044 MONO_INST_LIST_ADD (&arg->node, &call->out_args);
1046 if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(t))) {
1047 guint32 size, align;
1049 if (t->type == MONO_TYPE_TYPEDBYREF) {
1050 size = sizeof (MonoTypedRef);
1051 align = sizeof (gpointer);
1055 size = mono_type_native_stack_size (&in->klass->byval_arg, &align);
1058 size = mini_type_stack_size (cfg->generic_sharing_context, &in->klass->byval_arg, &ialign);
1061 arg->opcode = OP_OUTARG_VT;
1062 arg->klass = in->klass;
1063 arg->backend.is_pinvoke = sig->pinvoke;
1064 arg->inst_imm = size;
1067 switch (ainfo->storage) {
1069 arg->opcode = OP_OUTARG;
1071 if (t->type == MONO_TYPE_R4) {
1072 arg->opcode = OP_OUTARG_R4;
1073 } else if (t->type == MONO_TYPE_R8) {
1074 arg->opcode = OP_OUTARG_R8;
1075 /* we store in the upper bits of backen.arg_info the needed
1076 * esp adjustment and in the lower bits the offset from esp
1077 * where the arg needs to be stored
1079 if (!fp_args_space) {
1080 fp_args_space = collect_fp_stack_space (sig, i - sig->hasthis, &fp_arg_setup);
1081 fp_args_offset = fp_args_space;
1083 arg->backend.arg_info = fp_args_space - fp_args_offset;
1084 fp_args_offset -= sizeof (double);
1085 if (i - sig->hasthis == fp_arg_setup) {
1086 arg->backend.arg_info |= fp_args_space << 16;
1088 if (fp_args_offset == 0) {
1089 /* the allocated esp stack is finished:
1090 * prepare for an eventual second run of fp args
1098 g_assert_not_reached ();
1104 /* Handle the case where there are no implicit arguments */
1105 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sentinelpos)) {
1106 emit_sig_cookie (cfg, call);
1109 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1110 if (cinfo->ret.storage == ArgValuetypeInReg) {
1111 MonoInst *zero_inst;
1113 * After the call, the struct is in registers, but needs to be saved to the memory pointed
1114 * to by vt_arg in this_vret_args. This means that vt_arg needs to be saved somewhere
1115 * before calling the function. So we add a dummy instruction to represent pushing the
1116 * struct return address to the stack. The return address will be saved to this stack slot
1117 * by the code emitted in this_vret_args.
1119 MONO_INST_NEW (cfg, arg, OP_OUTARG);
1120 MONO_INST_NEW (cfg, zero_inst, OP_ICONST);
1121 zero_inst->inst_p0 = 0;
1122 arg->inst_left = zero_inst;
1123 arg->type = STACK_PTR;
1124 MONO_INST_LIST_ADD (&arg->node, &call->out_args);
1126 /* if the function returns a struct, the called method already does a ret $0x4 */
1127 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret))
1128 cinfo->stack_usage -= 4;
1132 call->stack_usage = cinfo->stack_usage;
1134 #if defined(__APPLE__)
1135 if (cinfo->need_stack_align) {
1136 MONO_INST_NEW (cfg, arg, OP_X86_OUTARG_ALIGN_STACK);
1137 arg->inst_c0 = cinfo->stack_align_amount;
1138 MONO_INST_LIST_ADD (&arg->node, &call->out_args);
1146 * Allow tracing to work with this interface (with an optional argument)
1149 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
1154 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1157 /* if some args are passed in registers, we need to save them here */
1158 x86_push_reg (code, X86_EBP);
1160 if (cfg->compile_aot) {
1161 x86_push_imm (code, cfg->method);
1162 x86_mov_reg_imm (code, X86_EAX, func);
1163 x86_call_reg (code, X86_EAX);
1165 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, cfg->method);
1166 x86_push_imm (code, cfg->method);
1167 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
1168 x86_call_code (code, 0);
1171 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 16);
1173 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1188 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
1191 int arg_size = 0, save_mode = SAVE_NONE;
1192 MonoMethod *method = cfg->method;
1194 switch (mono_type_get_underlying_type (mono_method_signature (method)->ret)->type) {
1195 case MONO_TYPE_VOID:
1196 /* special case string .ctor icall */
1197 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
1198 save_mode = SAVE_EAX;
1200 save_mode = SAVE_NONE;
1204 save_mode = SAVE_EAX_EDX;
1208 save_mode = SAVE_FP;
1210 case MONO_TYPE_GENERICINST:
1211 if (!mono_type_generic_inst_is_valuetype (mono_method_signature (method)->ret)) {
1212 save_mode = SAVE_EAX;
1216 case MONO_TYPE_VALUETYPE:
1217 save_mode = SAVE_STRUCT;
1220 save_mode = SAVE_EAX;
1224 switch (save_mode) {
1226 x86_push_reg (code, X86_EDX);
1227 x86_push_reg (code, X86_EAX);
1228 if (enable_arguments) {
1229 x86_push_reg (code, X86_EDX);
1230 x86_push_reg (code, X86_EAX);
1235 x86_push_reg (code, X86_EAX);
1236 if (enable_arguments) {
1237 x86_push_reg (code, X86_EAX);
1242 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1243 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1244 if (enable_arguments) {
1245 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1246 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1251 if (enable_arguments) {
1252 x86_push_membase (code, X86_EBP, 8);
1261 if (cfg->compile_aot) {
1262 x86_push_imm (code, method);
1263 x86_mov_reg_imm (code, X86_EAX, func);
1264 x86_call_reg (code, X86_EAX);
1266 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, method);
1267 x86_push_imm (code, method);
1268 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
1269 x86_call_code (code, 0);
1271 x86_alu_reg_imm (code, X86_ADD, X86_ESP, arg_size + 4);
1273 switch (save_mode) {
1275 x86_pop_reg (code, X86_EAX);
1276 x86_pop_reg (code, X86_EDX);
1279 x86_pop_reg (code, X86_EAX);
1282 x86_fld_membase (code, X86_ESP, 0, TRUE);
1283 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1293 #define EMIT_COND_BRANCH(ins,cond,sign) \
1294 if (ins->flags & MONO_INST_BRLABEL) { \
1295 if (ins->inst_i0->inst_c0) { \
1296 x86_branch (code, cond, cfg->native_code + ins->inst_i0->inst_c0, sign); \
1298 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
1299 if ((cfg->opt & MONO_OPT_BRANCH) && \
1300 x86_is_imm8 (ins->inst_i0->inst_c1 - cpos)) \
1301 x86_branch8 (code, cond, 0, sign); \
1303 x86_branch32 (code, cond, 0, sign); \
1306 if (ins->inst_true_bb->native_offset) { \
1307 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
1309 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1310 if ((cfg->opt & MONO_OPT_BRANCH) && \
1311 x86_is_imm8 (ins->inst_true_bb->max_offset - cpos)) \
1312 x86_branch8 (code, cond, 0, sign); \
1314 x86_branch32 (code, cond, 0, sign); \
1319 * Emit an exception if condition is fail and
1320 * if possible do a directly branch to target
1322 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
1324 MonoInst *tins = mono_branch_optimize_exception_target (cfg, bb, exc_name); \
1325 if (tins == NULL) { \
1326 mono_add_patch_info (cfg, code - cfg->native_code, \
1327 MONO_PATCH_INFO_EXC, exc_name); \
1328 x86_branch32 (code, cond, 0, signed); \
1330 EMIT_COND_BRANCH (tins, cond, signed); \
1334 #define EMIT_FPCOMPARE(code) do { \
1335 x86_fcompp (code); \
1336 x86_fnstsw (code); \
1341 emit_call (MonoCompile *cfg, guint8 *code, guint32 patch_type, gconstpointer data)
1343 mono_add_patch_info (cfg, code - cfg->native_code, patch_type, data);
1344 x86_call_code (code, 0);
1349 #define INST_IGNORES_CFLAGS(opcode) (!(((opcode) == OP_ADC) || ((opcode) == OP_IADC) || ((opcode) == OP_ADC_IMM) || ((opcode) == OP_IADC_IMM) || ((opcode) == OP_SBB) || ((opcode) == OP_ISBB) || ((opcode) == OP_SBB_IMM) || ((opcode) == OP_ISBB_IMM)))
1352 * mono_peephole_pass_1:
1354 * Perform peephole opts which should/can be performed before local regalloc
1357 mono_arch_peephole_pass_1 (MonoCompile *cfg, MonoBasicBlock *bb)
1361 MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
1362 MonoInst *last_ins = mono_inst_list_prev (&ins->node, &bb->ins_list);
1363 switch (ins->opcode) {
1366 if ((ins->sreg1 < MONO_MAX_IREGS) && (ins->dreg >= MONO_MAX_IREGS)) {
1368 * X86_LEA is like ADD, but doesn't have the
1369 * sreg1==dreg restriction.
1371 ins->opcode = OP_X86_LEA_MEMBASE;
1372 ins->inst_basereg = ins->sreg1;
1373 } else if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1374 ins->opcode = OP_X86_INC_REG;
1378 if ((ins->sreg1 < MONO_MAX_IREGS) && (ins->dreg >= MONO_MAX_IREGS)) {
1379 ins->opcode = OP_X86_LEA_MEMBASE;
1380 ins->inst_basereg = ins->sreg1;
1381 ins->inst_imm = -ins->inst_imm;
1382 } else if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1383 ins->opcode = OP_X86_DEC_REG;
1385 case OP_COMPARE_IMM:
1386 case OP_ICOMPARE_IMM:
1387 /* OP_COMPARE_IMM (reg, 0)
1389 * OP_X86_TEST_NULL (reg)
1392 ins->opcode = OP_X86_TEST_NULL;
1394 case OP_X86_COMPARE_MEMBASE_IMM:
1396 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1397 * OP_X86_COMPARE_MEMBASE_IMM offset(basereg), imm
1399 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1400 * OP_COMPARE_IMM reg, imm
1402 * Note: if imm = 0 then OP_COMPARE_IMM replaced with OP_X86_TEST_NULL
1404 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG) &&
1405 ins->inst_basereg == last_ins->inst_destbasereg &&
1406 ins->inst_offset == last_ins->inst_offset) {
1407 ins->opcode = OP_COMPARE_IMM;
1408 ins->sreg1 = last_ins->sreg1;
1410 /* check if we can remove cmp reg,0 with test null */
1412 ins->opcode = OP_X86_TEST_NULL;
1416 case OP_X86_PUSH_MEMBASE:
1417 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG ||
1418 last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1419 ins->inst_basereg == last_ins->inst_destbasereg &&
1420 ins->inst_offset == last_ins->inst_offset) {
1421 ins->opcode = OP_X86_PUSH;
1422 ins->sreg1 = last_ins->sreg1;
1427 mono_peephole_ins (bb, ins);
1432 mono_arch_peephole_pass_2 (MonoCompile *cfg, MonoBasicBlock *bb)
1436 MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
1437 switch (ins->opcode) {
1441 /* reg = 0 -> XOR (reg, reg) */
1442 /* XOR sets cflags on x86, so we cant do it always */
1443 next = mono_inst_list_next (&ins->node, &bb->ins_list);
1444 if (ins->inst_c0 == 0 && (!next ||
1445 (next && INST_IGNORES_CFLAGS (next->opcode)))) {
1448 ins->opcode = OP_IXOR;
1449 ins->sreg1 = ins->dreg;
1450 ins->sreg2 = ins->dreg;
1453 * Convert succeeding STORE_MEMBASE_IMM 0 ins to STORE_MEMBASE_REG
1454 * since it takes 3 bytes instead of 7.
1456 for (ins2 = mono_inst_list_next (&ins->node, &bb->ins_list); ins2;
1457 ins2 = mono_inst_list_next (&ins2->node, &bb->ins_list)) {
1458 if ((ins2->opcode == OP_STORE_MEMBASE_IMM) && (ins2->inst_imm == 0)) {
1459 ins2->opcode = OP_STORE_MEMBASE_REG;
1460 ins2->sreg1 = ins->dreg;
1461 } else if ((ins2->opcode == OP_STOREI4_MEMBASE_IMM) && (ins2->inst_imm == 0)) {
1462 ins2->opcode = OP_STOREI4_MEMBASE_REG;
1463 ins2->sreg1 = ins->dreg;
1464 } else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM)) {
1465 /* Continue iteration */
1474 if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1475 ins->opcode = OP_X86_INC_REG;
1479 if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1480 ins->opcode = OP_X86_DEC_REG;
1484 mono_peephole_ins (bb, ins);
1489 mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1494 branch_cc_table [] = {
1495 X86_CC_EQ, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1496 X86_CC_NE, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1497 X86_CC_O, X86_CC_NO, X86_CC_C, X86_CC_NC
1500 /* Maps CMP_... constants to X86_CC_... constants */
1503 X86_CC_EQ, X86_CC_NE, X86_CC_LE, X86_CC_GE, X86_CC_LT, X86_CC_GT,
1504 X86_CC_LE, X86_CC_GE, X86_CC_LT, X86_CC_GT
1508 cc_signed_table [] = {
1509 TRUE, TRUE, TRUE, TRUE, TRUE, TRUE,
1510 FALSE, FALSE, FALSE, FALSE
1513 static unsigned char*
1514 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int size, gboolean is_signed)
1516 #define XMM_TEMP_REG 0
1517 if (cfg->opt & MONO_OPT_SSE2 && size < 8) {
1518 /* optimize by assigning a local var for this use so we avoid
1519 * the stack manipulations */
1520 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1521 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1522 x86_movsd_reg_membase (code, XMM_TEMP_REG, X86_ESP, 0);
1523 x86_cvttsd2si (code, dreg, XMM_TEMP_REG);
1524 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1526 x86_widen_reg (code, dreg, dreg, is_signed, FALSE);
1528 x86_widen_reg (code, dreg, dreg, is_signed, TRUE);
1531 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
1532 x86_fnstcw_membase(code, X86_ESP, 0);
1533 x86_mov_reg_membase (code, dreg, X86_ESP, 0, 2);
1534 x86_alu_reg_imm (code, X86_OR, dreg, 0xc00);
1535 x86_mov_membase_reg (code, X86_ESP, 2, dreg, 2);
1536 x86_fldcw_membase (code, X86_ESP, 2);
1538 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1539 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
1540 x86_pop_reg (code, dreg);
1541 /* FIXME: need the high register
1542 * x86_pop_reg (code, dreg_high);
1545 x86_push_reg (code, X86_EAX); // SP = SP - 4
1546 x86_fist_pop_membase (code, X86_ESP, 0, FALSE);
1547 x86_pop_reg (code, dreg);
1549 x86_fldcw_membase (code, X86_ESP, 0);
1550 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
1553 x86_widen_reg (code, dreg, dreg, is_signed, FALSE);
1555 x86_widen_reg (code, dreg, dreg, is_signed, TRUE);
1559 static unsigned char*
1560 mono_emit_stack_alloc (guchar *code, MonoInst* tree)
1562 int sreg = tree->sreg1;
1563 int need_touch = FALSE;
1565 #if defined(PLATFORM_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
1574 * If requested stack size is larger than one page,
1575 * perform stack-touch operation
1578 * Generate stack probe code.
1579 * Under Windows, it is necessary to allocate one page at a time,
1580 * "touching" stack after each successful sub-allocation. This is
1581 * because of the way stack growth is implemented - there is a
1582 * guard page before the lowest stack page that is currently commited.
1583 * Stack normally grows sequentially so OS traps access to the
1584 * guard page and commits more pages when needed.
1586 x86_test_reg_imm (code, sreg, ~0xFFF);
1587 br[0] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1589 br[2] = code; /* loop */
1590 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
1591 x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
1594 * By the end of the loop, sreg2 is smaller than 0x1000, so the init routine
1595 * that follows only initializes the last part of the area.
1597 /* Same as the init code below with size==0x1000 */
1598 if (tree->flags & MONO_INST_INIT) {
1599 x86_push_reg (code, X86_EAX);
1600 x86_push_reg (code, X86_ECX);
1601 x86_push_reg (code, X86_EDI);
1602 x86_mov_reg_imm (code, X86_ECX, (0x1000 >> 2));
1603 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
1604 x86_lea_membase (code, X86_EDI, X86_ESP, 12);
1606 x86_prefix (code, X86_REP_PREFIX);
1608 x86_pop_reg (code, X86_EDI);
1609 x86_pop_reg (code, X86_ECX);
1610 x86_pop_reg (code, X86_EAX);
1613 x86_alu_reg_imm (code, X86_SUB, sreg, 0x1000);
1614 x86_alu_reg_imm (code, X86_CMP, sreg, 0x1000);
1615 br[3] = code; x86_branch8 (code, X86_CC_AE, 0, FALSE);
1616 x86_patch (br[3], br[2]);
1617 x86_test_reg_reg (code, sreg, sreg);
1618 br[4] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1619 x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1621 br[1] = code; x86_jump8 (code, 0);
1623 x86_patch (br[0], code);
1624 x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1625 x86_patch (br[1], code);
1626 x86_patch (br[4], code);
1629 x86_alu_reg_reg (code, X86_SUB, X86_ESP, tree->sreg1);
1631 if (tree->flags & MONO_INST_INIT) {
1633 if (tree->dreg != X86_EAX && sreg != X86_EAX) {
1634 x86_push_reg (code, X86_EAX);
1637 if (tree->dreg != X86_ECX && sreg != X86_ECX) {
1638 x86_push_reg (code, X86_ECX);
1641 if (tree->dreg != X86_EDI && sreg != X86_EDI) {
1642 x86_push_reg (code, X86_EDI);
1646 x86_shift_reg_imm (code, X86_SHR, sreg, 2);
1647 if (sreg != X86_ECX)
1648 x86_mov_reg_reg (code, X86_ECX, sreg, 4);
1649 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
1651 x86_lea_membase (code, X86_EDI, X86_ESP, offset);
1653 x86_prefix (code, X86_REP_PREFIX);
1656 if (tree->dreg != X86_EDI && sreg != X86_EDI)
1657 x86_pop_reg (code, X86_EDI);
1658 if (tree->dreg != X86_ECX && sreg != X86_ECX)
1659 x86_pop_reg (code, X86_ECX);
1660 if (tree->dreg != X86_EAX && sreg != X86_EAX)
1661 x86_pop_reg (code, X86_EAX);
1668 emit_move_return_value (MonoCompile *cfg, MonoInst *ins, guint8 *code)
1673 /* Move return value to the target register */
1674 switch (ins->opcode) {
1677 case OP_CALL_MEMBASE:
1678 if (ins->dreg != X86_EAX)
1679 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
1683 case OP_VCALL_MEMBASE:
1684 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, ((MonoCallInst*)ins)->signature, FALSE);
1685 if (cinfo->ret.storage == ArgValuetypeInReg) {
1686 /* Pop the destination address from the stack */
1687 x86_pop_reg (code, X86_ECX);
1689 for (quad = 0; quad < 2; quad ++) {
1690 switch (cinfo->ret.pair_storage [quad]) {
1692 g_assert (cinfo->ret.pair_regs [quad] != X86_ECX);
1693 x86_mov_membase_reg (code, X86_ECX, (quad * sizeof (gpointer)), cinfo->ret.pair_regs [quad], sizeof (gpointer));
1698 g_assert_not_reached ();
1711 * @code: buffer to store code to
1712 * @dreg: hard register where to place the result
1713 * @tls_offset: offset info
1715 * emit_tls_get emits in @code the native code that puts in the dreg register
1716 * the item in the thread local storage identified by tls_offset.
1718 * Returns: a pointer to the end of the stored code
1721 emit_tls_get (guint8* code, int dreg, int tls_offset)
1723 #ifdef PLATFORM_WIN32
1725 * See the Under the Hood article in the May 1996 issue of Microsoft Systems
1726 * Journal and/or a disassembly of the TlsGet () function.
1728 g_assert (tls_offset < 64);
1729 x86_prefix (code, X86_FS_PREFIX);
1730 x86_mov_reg_mem (code, dreg, 0x18, 4);
1731 /* Dunno what this does but TlsGetValue () contains it */
1732 x86_alu_membase_imm (code, X86_AND, dreg, 0x34, 0);
1733 x86_mov_reg_membase (code, dreg, dreg, 3600 + (tls_offset * 4), 4);
1735 if (optimize_for_xen) {
1736 x86_prefix (code, X86_GS_PREFIX);
1737 x86_mov_reg_mem (code, dreg, 0, 4);
1738 x86_mov_reg_membase (code, dreg, dreg, tls_offset, 4);
1740 x86_prefix (code, X86_GS_PREFIX);
1741 x86_mov_reg_mem (code, dreg, tls_offset, 4);
1748 * emit_load_volatile_arguments:
1750 * Load volatile arguments from the stack to the original input registers.
1751 * Required before a tail call.
1754 emit_load_volatile_arguments (MonoCompile *cfg, guint8 *code)
1756 MonoMethod *method = cfg->method;
1757 MonoMethodSignature *sig;
1762 /* FIXME: Generate intermediate code instead */
1764 sig = mono_method_signature (method);
1766 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
1768 /* This is the opposite of the code in emit_prolog */
1770 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
1771 ArgInfo *ainfo = cinfo->args + i;
1773 inst = cfg->args [i];
1775 if (sig->hasthis && (i == 0))
1776 arg_type = &mono_defaults.object_class->byval_arg;
1778 arg_type = sig->params [i - sig->hasthis];
1781 * On x86, the arguments are either in their original stack locations, or in
1784 if (inst->opcode == OP_REGVAR) {
1785 g_assert (ainfo->storage == ArgOnStack);
1787 x86_mov_membase_reg (code, X86_EBP, inst->inst_offset, inst->dreg, 4);
1794 #define REAL_PRINT_REG(text,reg) \
1795 mono_assert (reg >= 0); \
1796 x86_push_reg (code, X86_EAX); \
1797 x86_push_reg (code, X86_EDX); \
1798 x86_push_reg (code, X86_ECX); \
1799 x86_push_reg (code, reg); \
1800 x86_push_imm (code, reg); \
1801 x86_push_imm (code, text " %d %p\n"); \
1802 x86_mov_reg_imm (code, X86_EAX, printf); \
1803 x86_call_reg (code, X86_EAX); \
1804 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 3*4); \
1805 x86_pop_reg (code, X86_ECX); \
1806 x86_pop_reg (code, X86_EDX); \
1807 x86_pop_reg (code, X86_EAX);
1809 /* benchmark and set based on cpu */
1810 #define LOOP_ALIGNMENT 8
1811 #define bb_is_loop_start(bb) ((bb)->loop_body_start && (bb)->nesting)
1814 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
1819 guint8 *code = cfg->native_code + cfg->code_len;
1822 if (cfg->opt & MONO_OPT_LOOP) {
1823 int pad, align = LOOP_ALIGNMENT;
1824 /* set alignment depending on cpu */
1825 if (bb_is_loop_start (bb) && (pad = (cfg->code_len & (align - 1)))) {
1827 /*g_print ("adding %d pad at %x to loop in %s\n", pad, cfg->code_len, cfg->method->name);*/
1828 x86_padding (code, pad);
1829 cfg->code_len += pad;
1830 bb->native_offset = cfg->code_len;
1834 if (cfg->verbose_level > 2)
1835 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
1837 cpos = bb->max_offset;
1839 if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
1840 MonoProfileCoverageInfo *cov = cfg->coverage_info;
1841 g_assert (!cfg->compile_aot);
1844 cov->data [bb->dfn].cil_code = bb->cil_code;
1845 /* this is not thread save, but good enough */
1846 x86_inc_mem (code, &cov->data [bb->dfn].count);
1849 offset = code - cfg->native_code;
1851 mono_debug_open_block (cfg, bb, offset);
1853 MONO_BB_FOR_EACH_INS (bb, ins) {
1854 offset = code - cfg->native_code;
1856 max_len = ((guint8 *)ins_get_spec (ins->opcode))[MONO_INST_LEN];
1858 if (G_UNLIKELY (offset > (cfg->code_size - max_len - 16))) {
1859 cfg->code_size *= 2;
1860 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
1861 code = cfg->native_code + offset;
1862 mono_jit_stats.code_reallocs++;
1865 if (cfg->debug_info)
1866 mono_debug_record_line_number (cfg, ins, offset);
1868 switch (ins->opcode) {
1870 x86_mul_reg (code, ins->sreg2, TRUE);
1873 x86_mul_reg (code, ins->sreg2, FALSE);
1875 case OP_X86_SETEQ_MEMBASE:
1876 case OP_X86_SETNE_MEMBASE:
1877 x86_set_membase (code, ins->opcode == OP_X86_SETEQ_MEMBASE ? X86_CC_EQ : X86_CC_NE,
1878 ins->inst_basereg, ins->inst_offset, TRUE);
1880 case OP_STOREI1_MEMBASE_IMM:
1881 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 1);
1883 case OP_STOREI2_MEMBASE_IMM:
1884 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 2);
1886 case OP_STORE_MEMBASE_IMM:
1887 case OP_STOREI4_MEMBASE_IMM:
1888 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 4);
1890 case OP_STOREI1_MEMBASE_REG:
1891 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 1);
1893 case OP_STOREI2_MEMBASE_REG:
1894 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 2);
1896 case OP_STORE_MEMBASE_REG:
1897 case OP_STOREI4_MEMBASE_REG:
1898 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 4);
1900 case OP_STORE_MEM_IMM:
1901 x86_mov_mem_imm (code, ins->inst_p0, ins->inst_c0, 4);
1904 x86_mov_reg_imm (code, ins->dreg, ins->inst_p0);
1905 x86_mov_reg_membase (code, ins->dreg, ins->dreg, 0, 4);
1909 /* These are created by the cprop pass so they use inst_imm as the source */
1910 x86_mov_reg_mem (code, ins->dreg, ins->inst_imm, 4);
1913 x86_widen_mem (code, ins->dreg, ins->inst_imm, FALSE, FALSE);
1916 x86_widen_mem (code, ins->dreg, ins->inst_imm, FALSE, TRUE);
1918 case OP_LOAD_MEMBASE:
1919 case OP_LOADI4_MEMBASE:
1920 case OP_LOADU4_MEMBASE:
1921 x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, 4);
1923 case OP_LOADU1_MEMBASE:
1924 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE);
1926 case OP_LOADI1_MEMBASE:
1927 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, FALSE);
1929 case OP_LOADU2_MEMBASE:
1930 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE);
1932 case OP_LOADI2_MEMBASE:
1933 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, TRUE);
1935 case OP_ICONV_TO_I1:
1937 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, FALSE);
1939 case OP_ICONV_TO_I2:
1941 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, TRUE);
1943 case OP_ICONV_TO_U1:
1944 x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, FALSE);
1946 case OP_ICONV_TO_U2:
1947 x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, TRUE);
1951 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
1953 case OP_COMPARE_IMM:
1954 case OP_ICOMPARE_IMM:
1955 x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
1957 case OP_X86_COMPARE_MEMBASE_REG:
1958 x86_alu_membase_reg (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2);
1960 case OP_X86_COMPARE_MEMBASE_IMM:
1961 x86_alu_membase_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
1963 case OP_X86_COMPARE_MEMBASE8_IMM:
1964 x86_alu_membase8_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
1966 case OP_X86_COMPARE_REG_MEMBASE:
1967 x86_alu_reg_membase (code, X86_CMP, ins->sreg1, ins->sreg2, ins->inst_offset);
1969 case OP_X86_COMPARE_MEM_IMM:
1970 x86_alu_mem_imm (code, X86_CMP, ins->inst_offset, ins->inst_imm);
1972 case OP_X86_TEST_NULL:
1973 x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
1975 case OP_X86_ADD_MEMBASE_IMM:
1976 x86_alu_membase_imm (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
1978 case OP_X86_ADD_REG_MEMBASE:
1979 x86_alu_reg_membase (code, X86_ADD, ins->sreg1, ins->sreg2, ins->inst_offset);
1981 case OP_X86_SUB_MEMBASE_IMM:
1982 x86_alu_membase_imm (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
1984 case OP_X86_SUB_REG_MEMBASE:
1985 x86_alu_reg_membase (code, X86_SUB, ins->sreg1, ins->sreg2, ins->inst_offset);
1987 case OP_X86_AND_MEMBASE_IMM:
1988 x86_alu_membase_imm (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
1990 case OP_X86_OR_MEMBASE_IMM:
1991 x86_alu_membase_imm (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
1993 case OP_X86_XOR_MEMBASE_IMM:
1994 x86_alu_membase_imm (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
1996 case OP_X86_ADD_MEMBASE_REG:
1997 x86_alu_membase_reg (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2);
1999 case OP_X86_SUB_MEMBASE_REG:
2000 x86_alu_membase_reg (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2002 case OP_X86_AND_MEMBASE_REG:
2003 x86_alu_membase_reg (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2005 case OP_X86_OR_MEMBASE_REG:
2006 x86_alu_membase_reg (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2008 case OP_X86_XOR_MEMBASE_REG:
2009 x86_alu_membase_reg (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2011 case OP_X86_INC_MEMBASE:
2012 x86_inc_membase (code, ins->inst_basereg, ins->inst_offset);
2014 case OP_X86_INC_REG:
2015 x86_inc_reg (code, ins->dreg);
2017 case OP_X86_DEC_MEMBASE:
2018 x86_dec_membase (code, ins->inst_basereg, ins->inst_offset);
2020 case OP_X86_DEC_REG:
2021 x86_dec_reg (code, ins->dreg);
2023 case OP_X86_MUL_REG_MEMBASE:
2024 x86_imul_reg_membase (code, ins->sreg1, ins->sreg2, ins->inst_offset);
2026 case OP_X86_AND_REG_MEMBASE:
2027 x86_alu_reg_membase (code, X86_AND, ins->sreg1, ins->sreg2, ins->inst_offset);
2029 case OP_X86_OR_REG_MEMBASE:
2030 x86_alu_reg_membase (code, X86_OR, ins->sreg1, ins->sreg2, ins->inst_offset);
2032 case OP_X86_XOR_REG_MEMBASE:
2033 x86_alu_reg_membase (code, X86_XOR, ins->sreg1, ins->sreg2, ins->inst_offset);
2036 x86_breakpoint (code);
2040 case OP_DUMMY_STORE:
2041 case OP_NOT_REACHED:
2047 x86_alu_reg_reg (code, X86_ADD, ins->sreg1, ins->sreg2);
2051 x86_alu_reg_reg (code, X86_ADC, ins->sreg1, ins->sreg2);
2056 x86_alu_reg_imm (code, X86_ADD, ins->dreg, ins->inst_imm);
2060 x86_alu_reg_imm (code, X86_ADC, ins->dreg, ins->inst_imm);
2065 x86_alu_reg_reg (code, X86_SUB, ins->sreg1, ins->sreg2);
2069 x86_alu_reg_reg (code, X86_SBB, ins->sreg1, ins->sreg2);
2074 x86_alu_reg_imm (code, X86_SUB, ins->dreg, ins->inst_imm);
2078 x86_alu_reg_imm (code, X86_SBB, ins->dreg, ins->inst_imm);
2081 x86_alu_reg_reg (code, X86_AND, ins->sreg1, ins->sreg2);
2085 x86_alu_reg_imm (code, X86_AND, ins->sreg1, ins->inst_imm);
2090 * The code is the same for div/rem, the allocator will allocate dreg
2091 * to RAX/RDX as appropriate.
2093 if (ins->sreg2 == X86_EDX) {
2094 /* cdq clobbers this */
2095 x86_push_reg (code, ins->sreg2);
2097 x86_div_membase (code, X86_ESP, 0, TRUE);
2098 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2101 x86_div_reg (code, ins->sreg2, TRUE);
2106 if (ins->sreg2 == X86_EDX) {
2107 x86_push_reg (code, ins->sreg2);
2108 x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2109 x86_div_membase (code, X86_ESP, 0, FALSE);
2110 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2112 x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2113 x86_div_reg (code, ins->sreg2, FALSE);
2117 x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
2119 x86_div_reg (code, ins->sreg2, TRUE);
2122 x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
2124 x86_div_reg (code, ins->sreg2, TRUE);
2127 x86_alu_reg_reg (code, X86_OR, ins->sreg1, ins->sreg2);
2131 x86_alu_reg_imm (code, X86_OR, ins->sreg1, ins->inst_imm);
2134 x86_alu_reg_reg (code, X86_XOR, ins->sreg1, ins->sreg2);
2138 x86_alu_reg_imm (code, X86_XOR, ins->sreg1, ins->inst_imm);
2141 g_assert (ins->sreg2 == X86_ECX);
2142 x86_shift_reg (code, X86_SHL, ins->dreg);
2145 g_assert (ins->sreg2 == X86_ECX);
2146 x86_shift_reg (code, X86_SAR, ins->dreg);
2150 x86_shift_reg_imm (code, X86_SAR, ins->dreg, ins->inst_imm);
2153 case OP_ISHR_UN_IMM:
2154 x86_shift_reg_imm (code, X86_SHR, ins->dreg, ins->inst_imm);
2157 g_assert (ins->sreg2 == X86_ECX);
2158 x86_shift_reg (code, X86_SHR, ins->dreg);
2162 x86_shift_reg_imm (code, X86_SHL, ins->dreg, ins->inst_imm);
2165 guint8 *jump_to_end;
2167 /* handle shifts below 32 bits */
2168 x86_shld_reg (code, ins->backend.reg3, ins->sreg1);
2169 x86_shift_reg (code, X86_SHL, ins->sreg1);
2171 x86_test_reg_imm (code, X86_ECX, 32);
2172 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
2174 /* handle shift over 32 bit */
2175 x86_mov_reg_reg (code, ins->backend.reg3, ins->sreg1, 4);
2176 x86_clear_reg (code, ins->sreg1);
2178 x86_patch (jump_to_end, code);
2182 guint8 *jump_to_end;
2184 /* handle shifts below 32 bits */
2185 x86_shrd_reg (code, ins->sreg1, ins->backend.reg3);
2186 x86_shift_reg (code, X86_SAR, ins->backend.reg3);
2188 x86_test_reg_imm (code, X86_ECX, 32);
2189 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, FALSE);
2191 /* handle shifts over 31 bits */
2192 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2193 x86_shift_reg_imm (code, X86_SAR, ins->backend.reg3, 31);
2195 x86_patch (jump_to_end, code);
2199 guint8 *jump_to_end;
2201 /* handle shifts below 32 bits */
2202 x86_shrd_reg (code, ins->sreg1, ins->backend.reg3);
2203 x86_shift_reg (code, X86_SHR, ins->backend.reg3);
2205 x86_test_reg_imm (code, X86_ECX, 32);
2206 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, FALSE);
2208 /* handle shifts over 31 bits */
2209 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2210 x86_clear_reg (code, ins->backend.reg3);
2212 x86_patch (jump_to_end, code);
2216 if (ins->inst_imm >= 32) {
2217 x86_mov_reg_reg (code, ins->backend.reg3, ins->sreg1, 4);
2218 x86_clear_reg (code, ins->sreg1);
2219 x86_shift_reg_imm (code, X86_SHL, ins->backend.reg3, ins->inst_imm - 32);
2221 x86_shld_reg_imm (code, ins->backend.reg3, ins->sreg1, ins->inst_imm);
2222 x86_shift_reg_imm (code, X86_SHL, ins->sreg1, ins->inst_imm);
2226 if (ins->inst_imm >= 32) {
2227 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2228 x86_shift_reg_imm (code, X86_SAR, ins->backend.reg3, 0x1f);
2229 x86_shift_reg_imm (code, X86_SAR, ins->sreg1, ins->inst_imm - 32);
2231 x86_shrd_reg_imm (code, ins->sreg1, ins->backend.reg3, ins->inst_imm);
2232 x86_shift_reg_imm (code, X86_SAR, ins->backend.reg3, ins->inst_imm);
2235 case OP_LSHR_UN_IMM:
2236 if (ins->inst_imm >= 32) {
2237 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2238 x86_clear_reg (code, ins->backend.reg3);
2239 x86_shift_reg_imm (code, X86_SHR, ins->sreg1, ins->inst_imm - 32);
2241 x86_shrd_reg_imm (code, ins->sreg1, ins->backend.reg3, ins->inst_imm);
2242 x86_shift_reg_imm (code, X86_SHR, ins->backend.reg3, ins->inst_imm);
2246 x86_not_reg (code, ins->sreg1);
2249 x86_neg_reg (code, ins->sreg1);
2253 x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2257 switch (ins->inst_imm) {
2261 if (ins->dreg != ins->sreg1)
2262 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2263 x86_alu_reg_reg (code, X86_ADD, ins->dreg, ins->dreg);
2266 /* LEA r1, [r2 + r2*2] */
2267 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 1);
2270 /* LEA r1, [r2 + r2*4] */
2271 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2274 /* LEA r1, [r2 + r2*2] */
2276 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 1);
2277 x86_alu_reg_reg (code, X86_ADD, ins->dreg, ins->dreg);
2280 /* LEA r1, [r2 + r2*8] */
2281 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 3);
2284 /* LEA r1, [r2 + r2*4] */
2286 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2287 x86_alu_reg_reg (code, X86_ADD, ins->dreg, ins->dreg);
2290 /* LEA r1, [r2 + r2*2] */
2292 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 1);
2293 x86_shift_reg_imm (code, X86_SHL, ins->dreg, 2);
2296 /* LEA r1, [r2 + r2*4] */
2297 /* LEA r1, [r1 + r1*4] */
2298 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2299 x86_lea_memindex (code, ins->dreg, ins->dreg, 0, ins->dreg, 2);
2302 /* LEA r1, [r2 + r2*4] */
2304 /* LEA r1, [r1 + r1*4] */
2305 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2306 x86_shift_reg_imm (code, X86_SHL, ins->dreg, 2);
2307 x86_lea_memindex (code, ins->dreg, ins->dreg, 0, ins->dreg, 2);
2310 x86_imul_reg_reg_imm (code, ins->dreg, ins->sreg1, ins->inst_imm);
2315 x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2316 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2318 case OP_IMUL_OVF_UN: {
2319 /* the mul operation and the exception check should most likely be split */
2320 int non_eax_reg, saved_eax = FALSE, saved_edx = FALSE;
2321 /*g_assert (ins->sreg2 == X86_EAX);
2322 g_assert (ins->dreg == X86_EAX);*/
2323 if (ins->sreg2 == X86_EAX) {
2324 non_eax_reg = ins->sreg1;
2325 } else if (ins->sreg1 == X86_EAX) {
2326 non_eax_reg = ins->sreg2;
2328 /* no need to save since we're going to store to it anyway */
2329 if (ins->dreg != X86_EAX) {
2331 x86_push_reg (code, X86_EAX);
2333 x86_mov_reg_reg (code, X86_EAX, ins->sreg1, 4);
2334 non_eax_reg = ins->sreg2;
2336 if (ins->dreg == X86_EDX) {
2339 x86_push_reg (code, X86_EAX);
2341 } else if (ins->dreg != X86_EAX) {
2343 x86_push_reg (code, X86_EDX);
2345 x86_mul_reg (code, non_eax_reg, FALSE);
2346 /* save before the check since pop and mov don't change the flags */
2347 if (ins->dreg != X86_EAX)
2348 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
2350 x86_pop_reg (code, X86_EDX);
2352 x86_pop_reg (code, X86_EAX);
2353 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2357 x86_mov_reg_imm (code, ins->dreg, ins->inst_c0);
2360 g_assert_not_reached ();
2361 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2362 x86_mov_reg_imm (code, ins->dreg, 0);
2364 case OP_LOAD_GOTADDR:
2365 x86_call_imm (code, 0);
2367 * The patch needs to point to the pop, since the GOT offset needs
2368 * to be added to that address.
2370 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_GOT_OFFSET, NULL);
2371 x86_pop_reg (code, ins->dreg);
2372 x86_alu_reg_imm (code, X86_ADD, ins->dreg, 0xf0f0f0f0);
2375 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_right->inst_i1, ins->inst_right->inst_p0);
2376 x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, 0xf0f0f0f0, 4);
2378 case OP_X86_PUSH_GOT_ENTRY:
2379 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_right->inst_i1, ins->inst_right->inst_p0);
2380 x86_push_membase (code, ins->inst_basereg, 0xf0f0f0f0);
2383 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2387 * Note: this 'frame destruction' logic is useful for tail calls, too.
2388 * Keep in sync with the code in emit_epilog.
2392 /* FIXME: no tracing support... */
2393 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
2394 code = mono_arch_instrument_epilog (cfg, mono_profiler_method_leave, code, FALSE);
2395 /* reset offset to make max_len work */
2396 offset = code - cfg->native_code;
2398 g_assert (!cfg->method->save_lmf);
2400 code = emit_load_volatile_arguments (cfg, code);
2402 if (cfg->used_int_regs & (1 << X86_EBX))
2404 if (cfg->used_int_regs & (1 << X86_EDI))
2406 if (cfg->used_int_regs & (1 << X86_ESI))
2409 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
2411 if (cfg->used_int_regs & (1 << X86_ESI))
2412 x86_pop_reg (code, X86_ESI);
2413 if (cfg->used_int_regs & (1 << X86_EDI))
2414 x86_pop_reg (code, X86_EDI);
2415 if (cfg->used_int_regs & (1 << X86_EBX))
2416 x86_pop_reg (code, X86_EBX);
2418 /* restore ESP/EBP */
2420 offset = code - cfg->native_code;
2421 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2422 x86_jump32 (code, 0);
2426 /* ensure ins->sreg1 is not NULL
2427 * note that cmp DWORD PTR [eax], eax is one byte shorter than
2428 * cmp DWORD PTR [eax], 0
2430 x86_alu_membase_reg (code, X86_CMP, ins->sreg1, 0, ins->sreg1);
2433 int hreg = ins->sreg1 == X86_EAX? X86_ECX: X86_EAX;
2434 x86_push_reg (code, hreg);
2435 x86_lea_membase (code, hreg, X86_EBP, cfg->sig_cookie);
2436 x86_mov_membase_reg (code, ins->sreg1, 0, hreg, 4);
2437 x86_pop_reg (code, hreg);
2445 call = (MonoCallInst*)ins;
2446 if (ins->flags & MONO_INST_HAS_METHOD)
2447 code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2449 code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2450 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
2451 /* a pop is one byte, while an add reg, imm is 3. So if there are 4 or 8
2452 * bytes to pop, we want to use pops. GCC does this (note it won't happen
2453 * for P4 or i686 because gcc will avoid using pop push at all. But we aren't
2454 * smart enough to do that optimization yet
2456 * It turns out that on my P4, doing two pops for 8 bytes on the stack makes
2457 * mcs botstrap slow down. However, doing 1 pop for 4 bytes creates a small,
2458 * (most likely from locality benefits). People with other processors should
2459 * check on theirs to see what happens.
2461 if (call->stack_usage == 4) {
2462 /* we want to use registers that won't get used soon, so use
2463 * ecx, as eax will get allocated first. edx is used by long calls,
2464 * so we can't use that.
2467 x86_pop_reg (code, X86_ECX);
2469 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2472 code = emit_move_return_value (cfg, ins, code);
2477 case OP_VOIDCALL_REG:
2479 call = (MonoCallInst*)ins;
2480 x86_call_reg (code, ins->sreg1);
2481 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
2482 if (call->stack_usage == 4)
2483 x86_pop_reg (code, X86_ECX);
2485 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2487 code = emit_move_return_value (cfg, ins, code);
2489 case OP_FCALL_MEMBASE:
2490 case OP_LCALL_MEMBASE:
2491 case OP_VCALL_MEMBASE:
2492 case OP_VOIDCALL_MEMBASE:
2493 case OP_CALL_MEMBASE:
2494 call = (MonoCallInst*)ins;
2495 x86_call_membase (code, ins->sreg1, ins->inst_offset);
2496 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
2497 if (call->stack_usage == 4)
2498 x86_pop_reg (code, X86_ECX);
2500 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2502 code = emit_move_return_value (cfg, ins, code);
2506 x86_push_reg (code, ins->sreg1);
2508 case OP_X86_PUSH_IMM:
2509 x86_push_imm (code, ins->inst_imm);
2511 case OP_X86_PUSH_MEMBASE:
2512 x86_push_membase (code, ins->inst_basereg, ins->inst_offset);
2514 case OP_X86_PUSH_OBJ:
2515 x86_alu_reg_imm (code, X86_SUB, X86_ESP, ins->inst_imm);
2516 x86_push_reg (code, X86_EDI);
2517 x86_push_reg (code, X86_ESI);
2518 x86_push_reg (code, X86_ECX);
2519 if (ins->inst_offset)
2520 x86_lea_membase (code, X86_ESI, ins->inst_basereg, ins->inst_offset);
2522 x86_mov_reg_reg (code, X86_ESI, ins->inst_basereg, 4);
2523 x86_lea_membase (code, X86_EDI, X86_ESP, 12);
2524 x86_mov_reg_imm (code, X86_ECX, (ins->inst_imm >> 2));
2526 x86_prefix (code, X86_REP_PREFIX);
2528 x86_pop_reg (code, X86_ECX);
2529 x86_pop_reg (code, X86_ESI);
2530 x86_pop_reg (code, X86_EDI);
2533 x86_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->backend.shift_amount);
2535 case OP_X86_LEA_MEMBASE:
2536 x86_lea_membase (code, ins->dreg, ins->sreg1, ins->inst_imm);
2539 x86_xchg_reg_reg (code, ins->sreg1, ins->sreg2, 4);
2542 /* keep alignment */
2543 x86_alu_reg_imm (code, X86_ADD, ins->sreg1, MONO_ARCH_LOCALLOC_ALIGNMENT - 1);
2544 x86_alu_reg_imm (code, X86_AND, ins->sreg1, ~(MONO_ARCH_LOCALLOC_ALIGNMENT - 1));
2545 code = mono_emit_stack_alloc (code, ins);
2546 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2548 case OP_LOCALLOC_IMM: {
2549 guint32 size = ins->inst_imm;
2550 size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1);
2552 if (ins->flags & MONO_INST_INIT) {
2553 /* FIXME: Optimize this */
2554 x86_mov_reg_imm (code, ins->dreg, size);
2555 ins->sreg1 = ins->dreg;
2557 code = mono_emit_stack_alloc (code, ins);
2558 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2560 x86_alu_reg_imm (code, X86_SUB, X86_ESP, size);
2561 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2566 x86_push_reg (code, ins->sreg1);
2567 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD,
2568 (gpointer)"mono_arch_throw_exception");
2572 x86_push_reg (code, ins->sreg1);
2573 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD,
2574 (gpointer)"mono_arch_rethrow_exception");
2577 case OP_CALL_HANDLER:
2580 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 12);
2582 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2583 x86_call_imm (code, 0);
2585 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
2588 case OP_START_HANDLER: {
2589 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2590 x86_mov_membase_reg (code, spvar->inst_basereg, spvar->inst_offset, X86_ESP, 4);
2593 case OP_ENDFINALLY: {
2594 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2595 x86_mov_reg_membase (code, X86_ESP, spvar->inst_basereg, spvar->inst_offset, 4);
2599 case OP_ENDFILTER: {
2600 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2601 x86_mov_reg_membase (code, X86_ESP, spvar->inst_basereg, spvar->inst_offset, 4);
2602 /* The local allocator will put the result into EAX */
2608 ins->inst_c0 = code - cfg->native_code;
2611 if (ins->flags & MONO_INST_BRLABEL) {
2612 if (ins->inst_i0->inst_c0) {
2613 x86_jump_code (code, cfg->native_code + ins->inst_i0->inst_c0);
2615 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
2616 if ((cfg->opt & MONO_OPT_BRANCH) &&
2617 x86_is_imm8 (ins->inst_i0->inst_c1 - cpos))
2618 x86_jump8 (code, 0);
2620 x86_jump32 (code, 0);
2623 if (ins->inst_target_bb->native_offset) {
2624 x86_jump_code (code, cfg->native_code + ins->inst_target_bb->native_offset);
2626 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2627 if ((cfg->opt & MONO_OPT_BRANCH) &&
2628 x86_is_imm8 (ins->inst_target_bb->max_offset - cpos))
2629 x86_jump8 (code, 0);
2631 x86_jump32 (code, 0);
2636 x86_jump_reg (code, ins->sreg1);
2649 x86_set_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
2650 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2652 case OP_COND_EXC_EQ:
2653 case OP_COND_EXC_NE_UN:
2654 case OP_COND_EXC_LT:
2655 case OP_COND_EXC_LT_UN:
2656 case OP_COND_EXC_GT:
2657 case OP_COND_EXC_GT_UN:
2658 case OP_COND_EXC_GE:
2659 case OP_COND_EXC_GE_UN:
2660 case OP_COND_EXC_LE:
2661 case OP_COND_EXC_LE_UN:
2662 case OP_COND_EXC_IEQ:
2663 case OP_COND_EXC_INE_UN:
2664 case OP_COND_EXC_ILT:
2665 case OP_COND_EXC_ILT_UN:
2666 case OP_COND_EXC_IGT:
2667 case OP_COND_EXC_IGT_UN:
2668 case OP_COND_EXC_IGE:
2669 case OP_COND_EXC_IGE_UN:
2670 case OP_COND_EXC_ILE:
2671 case OP_COND_EXC_ILE_UN:
2672 EMIT_COND_SYSTEM_EXCEPTION (cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], ins->inst_p1);
2674 case OP_COND_EXC_OV:
2675 case OP_COND_EXC_NO:
2677 case OP_COND_EXC_NC:
2678 EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_EQ], (ins->opcode < OP_COND_EXC_NE_UN), ins->inst_p1);
2680 case OP_COND_EXC_IOV:
2681 case OP_COND_EXC_INO:
2682 case OP_COND_EXC_IC:
2683 case OP_COND_EXC_INC:
2684 EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_IEQ], (ins->opcode < OP_COND_EXC_INE_UN), ins->inst_p1);
2696 EMIT_COND_BRANCH (ins, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
2699 /* floating point opcodes */
2701 double d = *(double *)ins->inst_p0;
2703 if ((d == 0.0) && (mono_signbit (d) == 0)) {
2705 } else if (d == 1.0) {
2708 if (cfg->compile_aot) {
2709 guint32 *val = (guint32*)&d;
2710 x86_push_imm (code, val [1]);
2711 x86_push_imm (code, val [0]);
2712 x86_fld_membase (code, X86_ESP, 0, TRUE);
2713 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
2716 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_R8, ins->inst_p0);
2717 x86_fld (code, NULL, TRUE);
2723 float f = *(float *)ins->inst_p0;
2725 if ((f == 0.0) && (mono_signbit (f) == 0)) {
2727 } else if (f == 1.0) {
2730 if (cfg->compile_aot) {
2731 guint32 val = *(guint32*)&f;
2732 x86_push_imm (code, val);
2733 x86_fld_membase (code, X86_ESP, 0, FALSE);
2734 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2737 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_R4, ins->inst_p0);
2738 x86_fld (code, NULL, FALSE);
2743 case OP_STORER8_MEMBASE_REG:
2744 x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, TRUE, TRUE);
2746 case OP_LOADR8_SPILL_MEMBASE:
2747 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
2750 case OP_LOADR8_MEMBASE:
2751 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
2753 case OP_STORER4_MEMBASE_REG:
2754 x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, FALSE, TRUE);
2756 case OP_LOADR4_MEMBASE:
2757 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
2759 case OP_ICONV_TO_R4: /* FIXME: change precision */
2760 case OP_ICONV_TO_R8:
2761 x86_push_reg (code, ins->sreg1);
2762 x86_fild_membase (code, X86_ESP, 0, FALSE);
2763 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2765 case OP_ICONV_TO_R_UN:
2766 x86_push_imm (code, 0);
2767 x86_push_reg (code, ins->sreg1);
2768 x86_fild_membase (code, X86_ESP, 0, TRUE);
2769 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
2771 case OP_X86_FP_LOAD_I8:
2772 x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
2774 case OP_X86_FP_LOAD_I4:
2775 x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
2777 case OP_FCONV_TO_R4:
2778 /* FIXME: nothing to do ?? */
2780 case OP_FCONV_TO_I1:
2781 code = emit_float_to_int (cfg, code, ins->dreg, 1, TRUE);
2783 case OP_FCONV_TO_U1:
2784 code = emit_float_to_int (cfg, code, ins->dreg, 1, FALSE);
2786 case OP_FCONV_TO_I2:
2787 code = emit_float_to_int (cfg, code, ins->dreg, 2, TRUE);
2789 case OP_FCONV_TO_U2:
2790 code = emit_float_to_int (cfg, code, ins->dreg, 2, FALSE);
2792 case OP_FCONV_TO_I4:
2794 code = emit_float_to_int (cfg, code, ins->dreg, 4, TRUE);
2796 case OP_FCONV_TO_I8:
2797 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
2798 x86_fnstcw_membase(code, X86_ESP, 0);
2799 x86_mov_reg_membase (code, ins->dreg, X86_ESP, 0, 2);
2800 x86_alu_reg_imm (code, X86_OR, ins->dreg, 0xc00);
2801 x86_mov_membase_reg (code, X86_ESP, 2, ins->dreg, 2);
2802 x86_fldcw_membase (code, X86_ESP, 2);
2803 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
2804 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
2805 x86_pop_reg (code, ins->dreg);
2806 x86_pop_reg (code, ins->backend.reg3);
2807 x86_fldcw_membase (code, X86_ESP, 0);
2808 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2810 case OP_LCONV_TO_R_UN: {
2811 static guint8 mn[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x40 };
2814 /* load 64bit integer to FP stack */
2815 x86_push_imm (code, 0);
2816 x86_push_reg (code, ins->sreg2);
2817 x86_push_reg (code, ins->sreg1);
2818 x86_fild_membase (code, X86_ESP, 0, TRUE);
2819 /* store as 80bit FP value */
2820 x86_fst80_membase (code, X86_ESP, 0);
2822 /* test if lreg is negative */
2823 x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
2824 br = code; x86_branch8 (code, X86_CC_GEZ, 0, TRUE);
2826 /* add correction constant mn */
2827 x86_fld80_mem (code, mn);
2828 x86_fld80_membase (code, X86_ESP, 0);
2829 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
2830 x86_fst80_membase (code, X86_ESP, 0);
2832 x86_patch (br, code);
2834 x86_fld80_membase (code, X86_ESP, 0);
2835 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
2839 case OP_LCONV_TO_OVF_I: {
2840 guint8 *br [3], *label [1];
2844 * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
2846 x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
2848 /* If the low word top bit is set, see if we are negative */
2849 br [0] = code; x86_branch8 (code, X86_CC_LT, 0, TRUE);
2850 /* We are not negative (no top bit set, check for our top word to be zero */
2851 x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
2852 br [1] = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
2855 /* throw exception */
2856 tins = mono_branch_optimize_exception_target (cfg, bb, "OverflowException");
2858 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, tins->inst_true_bb);
2859 if ((cfg->opt & MONO_OPT_BRANCH) && x86_is_imm8 (tins->inst_true_bb->max_offset - cpos))
2860 x86_jump8 (code, 0);
2862 x86_jump32 (code, 0);
2864 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC, "OverflowException");
2865 x86_jump32 (code, 0);
2869 x86_patch (br [0], code);
2870 /* our top bit is set, check that top word is 0xfffffff */
2871 x86_alu_reg_imm (code, X86_CMP, ins->sreg2, 0xffffffff);
2873 x86_patch (br [1], code);
2874 /* nope, emit exception */
2875 br [2] = code; x86_branch8 (code, X86_CC_NE, 0, TRUE);
2876 x86_patch (br [2], label [0]);
2878 if (ins->dreg != ins->sreg1)
2879 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2883 /* Not needed on the fp stack */
2886 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
2889 x86_fp_op_reg (code, X86_FSUB, 1, TRUE);
2892 x86_fp_op_reg (code, X86_FMUL, 1, TRUE);
2895 x86_fp_op_reg (code, X86_FDIV, 1, TRUE);
2903 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
2908 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
2915 * it really doesn't make sense to inline all this code,
2916 * it's here just to show that things may not be as simple
2919 guchar *check_pos, *end_tan, *pop_jump;
2920 x86_push_reg (code, X86_EAX);
2923 x86_test_reg_imm (code, X86_EAX, X86_FP_C2);
2925 x86_branch8 (code, X86_CC_NE, 0, FALSE);
2926 x86_fstp (code, 0); /* pop the 1.0 */
2928 x86_jump8 (code, 0);
2930 x86_fp_op (code, X86_FADD, 0);
2934 x86_test_reg_imm (code, X86_EAX, X86_FP_C2);
2936 x86_branch8 (code, X86_CC_NE, 0, FALSE);
2939 x86_patch (pop_jump, code);
2940 x86_fstp (code, 0); /* pop the 1.0 */
2941 x86_patch (check_pos, code);
2942 x86_patch (end_tan, code);
2944 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
2945 x86_pop_reg (code, X86_EAX);
2952 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
2958 g_assert (cfg->opt & MONO_OPT_CMOV);
2959 g_assert (ins->dreg == ins->sreg1);
2960 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
2961 x86_cmov_reg (code, X86_CC_GT, TRUE, ins->dreg, ins->sreg2);
2964 g_assert (cfg->opt & MONO_OPT_CMOV);
2965 g_assert (ins->dreg == ins->sreg1);
2966 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
2967 x86_cmov_reg (code, X86_CC_LT, TRUE, ins->dreg, ins->sreg2);
2973 x86_fxch (code, ins->inst_imm);
2978 x86_push_reg (code, X86_EAX);
2979 /* we need to exchange ST(0) with ST(1) */
2982 /* this requires a loop, because fprem somtimes
2983 * returns a partial remainder */
2985 /* looks like MS is using fprem instead of the IEEE compatible fprem1 */
2986 /* x86_fprem1 (code); */
2989 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_C2);
2991 x86_branch8 (code, X86_CC_NE, l1 - l2, FALSE);
2996 x86_pop_reg (code, X86_EAX);
3000 if (cfg->opt & MONO_OPT_FCMOV) {
3001 x86_fcomip (code, 1);
3005 /* this overwrites EAX */
3006 EMIT_FPCOMPARE(code);
3007 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3010 if (cfg->opt & MONO_OPT_FCMOV) {
3011 /* zeroing the register at the start results in
3012 * shorter and faster code (we can also remove the widening op)
3014 guchar *unordered_check;
3015 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3016 x86_fcomip (code, 1);
3018 unordered_check = code;
3019 x86_branch8 (code, X86_CC_P, 0, FALSE);
3020 x86_set_reg (code, X86_CC_EQ, ins->dreg, FALSE);
3021 x86_patch (unordered_check, code);
3024 if (ins->dreg != X86_EAX)
3025 x86_push_reg (code, X86_EAX);
3027 EMIT_FPCOMPARE(code);
3028 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3029 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
3030 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3031 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3033 if (ins->dreg != X86_EAX)
3034 x86_pop_reg (code, X86_EAX);
3038 if (cfg->opt & MONO_OPT_FCMOV) {
3039 /* zeroing the register at the start results in
3040 * shorter and faster code (we can also remove the widening op)
3042 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3043 x86_fcomip (code, 1);
3045 if (ins->opcode == OP_FCLT_UN) {
3046 guchar *unordered_check = code;
3047 guchar *jump_to_end;
3048 x86_branch8 (code, X86_CC_P, 0, FALSE);
3049 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
3051 x86_jump8 (code, 0);
3052 x86_patch (unordered_check, code);
3053 x86_inc_reg (code, ins->dreg);
3054 x86_patch (jump_to_end, code);
3056 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
3060 if (ins->dreg != X86_EAX)
3061 x86_push_reg (code, X86_EAX);
3063 EMIT_FPCOMPARE(code);
3064 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3065 if (ins->opcode == OP_FCLT_UN) {
3066 guchar *is_not_zero_check, *end_jump;
3067 is_not_zero_check = code;
3068 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3070 x86_jump8 (code, 0);
3071 x86_patch (is_not_zero_check, code);
3072 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3074 x86_patch (end_jump, code);
3076 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3077 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3079 if (ins->dreg != X86_EAX)
3080 x86_pop_reg (code, X86_EAX);
3084 if (cfg->opt & MONO_OPT_FCMOV) {
3085 /* zeroing the register at the start results in
3086 * shorter and faster code (we can also remove the widening op)
3088 guchar *unordered_check;
3089 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3090 x86_fcomip (code, 1);
3092 if (ins->opcode == OP_FCGT) {
3093 unordered_check = code;
3094 x86_branch8 (code, X86_CC_P, 0, FALSE);
3095 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
3096 x86_patch (unordered_check, code);
3098 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
3102 if (ins->dreg != X86_EAX)
3103 x86_push_reg (code, X86_EAX);
3105 EMIT_FPCOMPARE(code);
3106 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3107 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3108 if (ins->opcode == OP_FCGT_UN) {
3109 guchar *is_not_zero_check, *end_jump;
3110 is_not_zero_check = code;
3111 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3113 x86_jump8 (code, 0);
3114 x86_patch (is_not_zero_check, code);
3115 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3117 x86_patch (end_jump, code);
3119 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3120 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3122 if (ins->dreg != X86_EAX)
3123 x86_pop_reg (code, X86_EAX);
3126 if (cfg->opt & MONO_OPT_FCMOV) {
3127 guchar *jump = code;
3128 x86_branch8 (code, X86_CC_P, 0, TRUE);
3129 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3130 x86_patch (jump, code);
3133 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
3134 EMIT_COND_BRANCH (ins, X86_CC_EQ, TRUE);
3137 /* Branch if C013 != 100 */
3138 if (cfg->opt & MONO_OPT_FCMOV) {
3139 /* branch if !ZF or (PF|CF) */
3140 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3141 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3142 EMIT_COND_BRANCH (ins, X86_CC_B, FALSE);
3145 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C3);
3146 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3149 if (cfg->opt & MONO_OPT_FCMOV) {
3150 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
3153 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3156 if (cfg->opt & MONO_OPT_FCMOV) {
3157 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3158 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
3161 if (ins->opcode == OP_FBLT_UN) {
3162 guchar *is_not_zero_check, *end_jump;
3163 is_not_zero_check = code;
3164 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3166 x86_jump8 (code, 0);
3167 x86_patch (is_not_zero_check, code);
3168 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3170 x86_patch (end_jump, code);
3172 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3176 if (cfg->opt & MONO_OPT_FCMOV) {
3177 if (ins->opcode == OP_FBGT) {
3180 /* skip branch if C1=1 */
3182 x86_branch8 (code, X86_CC_P, 0, FALSE);
3183 /* branch if (C0 | C3) = 1 */
3184 EMIT_COND_BRANCH (ins, X86_CC_LT, FALSE);
3185 x86_patch (br1, code);
3187 EMIT_COND_BRANCH (ins, X86_CC_LT, FALSE);
3191 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3192 if (ins->opcode == OP_FBGT_UN) {
3193 guchar *is_not_zero_check, *end_jump;
3194 is_not_zero_check = code;
3195 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3197 x86_jump8 (code, 0);
3198 x86_patch (is_not_zero_check, code);
3199 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3201 x86_patch (end_jump, code);
3203 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3206 /* Branch if C013 == 100 or 001 */
3207 if (cfg->opt & MONO_OPT_FCMOV) {
3210 /* skip branch if C1=1 */
3212 x86_branch8 (code, X86_CC_P, 0, FALSE);
3213 /* branch if (C0 | C3) = 1 */
3214 EMIT_COND_BRANCH (ins, X86_CC_BE, FALSE);
3215 x86_patch (br1, code);
3218 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3219 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3220 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C3);
3221 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3224 /* Branch if C013 == 000 */
3225 if (cfg->opt & MONO_OPT_FCMOV) {
3226 EMIT_COND_BRANCH (ins, X86_CC_LE, FALSE);
3229 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3232 /* Branch if C013=000 or 100 */
3233 if (cfg->opt & MONO_OPT_FCMOV) {
3236 /* skip branch if C1=1 */
3238 x86_branch8 (code, X86_CC_P, 0, FALSE);
3239 /* branch if C0=0 */
3240 EMIT_COND_BRANCH (ins, X86_CC_NB, FALSE);
3241 x86_patch (br1, code);
3244 x86_alu_reg_imm (code, X86_AND, X86_EAX, (X86_FP_C0|X86_FP_C1));
3245 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0);
3246 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3249 /* Branch if C013 != 001 */
3250 if (cfg->opt & MONO_OPT_FCMOV) {
3251 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3252 EMIT_COND_BRANCH (ins, X86_CC_GE, FALSE);
3255 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3256 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3260 x86_push_reg (code, X86_EAX);
3263 x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4100);
3264 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3265 x86_pop_reg (code, X86_EAX);
3267 /* Have to clean up the fp stack before throwing the exception */
3269 x86_branch8 (code, X86_CC_NE, 0, FALSE);
3272 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_EQ, FALSE, "ArithmeticException");
3274 x86_patch (br1, code);
3278 code = emit_tls_get (code, ins->dreg, ins->inst_offset);
3281 case OP_MEMORY_BARRIER: {
3282 /* Not needed on x86 */
3285 case OP_ATOMIC_ADD_I4: {
3286 int dreg = ins->dreg;
3288 if (dreg == ins->inst_basereg) {
3289 x86_push_reg (code, ins->sreg2);
3293 if (dreg != ins->sreg2)
3294 x86_mov_reg_reg (code, ins->dreg, ins->sreg2, 4);
3296 x86_prefix (code, X86_LOCK_PREFIX);
3297 x86_xadd_membase_reg (code, ins->inst_basereg, ins->inst_offset, dreg, 4);
3299 if (dreg != ins->dreg) {
3300 x86_mov_reg_reg (code, ins->dreg, dreg, 4);
3301 x86_pop_reg (code, dreg);
3306 case OP_ATOMIC_ADD_NEW_I4: {
3307 int dreg = ins->dreg;
3309 /* hack: limit in regalloc, dreg != sreg1 && dreg != sreg2 */
3310 if (ins->sreg2 == dreg) {
3311 if (dreg == X86_EBX) {
3313 if (ins->inst_basereg == X86_EDI)
3317 if (ins->inst_basereg == X86_EBX)
3320 } else if (ins->inst_basereg == dreg) {
3321 if (dreg == X86_EBX) {
3323 if (ins->sreg2 == X86_EDI)
3327 if (ins->sreg2 == X86_EBX)
3332 if (dreg != ins->dreg) {
3333 x86_push_reg (code, dreg);
3336 x86_mov_reg_reg (code, dreg, ins->sreg2, 4);
3337 x86_prefix (code, X86_LOCK_PREFIX);
3338 x86_xadd_membase_reg (code, ins->inst_basereg, ins->inst_offset, dreg, 4);
3339 /* dreg contains the old value, add with sreg2 value */
3340 x86_alu_reg_reg (code, X86_ADD, dreg, ins->sreg2);
3342 if (ins->dreg != dreg) {
3343 x86_mov_reg_reg (code, ins->dreg, dreg, 4);
3344 x86_pop_reg (code, dreg);
3349 case OP_ATOMIC_EXCHANGE_I4: {
3351 int sreg2 = ins->sreg2;
3352 int breg = ins->inst_basereg;
3354 /* cmpxchg uses eax as comperand, need to make sure we can use it
3355 * hack to overcome limits in x86 reg allocator
3356 * (req: dreg == eax and sreg2 != eax and breg != eax)
3358 if (ins->dreg != X86_EAX)
3359 x86_push_reg (code, X86_EAX);
3361 /* We need the EAX reg for the cmpxchg */
3362 if (ins->sreg2 == X86_EAX) {
3363 x86_push_reg (code, X86_EDX);
3364 x86_mov_reg_reg (code, X86_EDX, X86_EAX, 4);
3368 if (breg == X86_EAX) {
3369 x86_push_reg (code, X86_ESI);
3370 x86_mov_reg_reg (code, X86_ESI, X86_EAX, 4);
3374 x86_mov_reg_membase (code, X86_EAX, breg, ins->inst_offset, 4);
3376 br [0] = code; x86_prefix (code, X86_LOCK_PREFIX);
3377 x86_cmpxchg_membase_reg (code, breg, ins->inst_offset, sreg2);
3378 br [1] = code; x86_branch8 (code, X86_CC_NE, -1, FALSE);
3379 x86_patch (br [1], br [0]);
3381 if (breg != ins->inst_basereg)
3382 x86_pop_reg (code, X86_ESI);
3384 if (ins->dreg != X86_EAX) {
3385 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
3386 x86_pop_reg (code, X86_EAX);
3389 if (ins->sreg2 != sreg2)
3390 x86_pop_reg (code, X86_EDX);
3395 g_warning ("unknown opcode %s\n", mono_inst_name (ins->opcode));
3396 g_assert_not_reached ();
3399 if (G_UNLIKELY ((code - cfg->native_code - offset) > max_len)) {
3400 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3401 mono_inst_name (ins->opcode), max_len, code - cfg->native_code - offset);
3402 g_assert_not_reached ();
3408 cfg->code_len = code - cfg->native_code;
3412 mono_arch_register_lowlevel_calls (void)
3417 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3419 MonoJumpInfo *patch_info;
3420 gboolean compile_aot = !run_cctors;
3422 for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3423 unsigned char *ip = patch_info->ip.i + code;
3424 const unsigned char *target;
3426 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3429 switch (patch_info->type) {
3430 case MONO_PATCH_INFO_BB:
3431 case MONO_PATCH_INFO_LABEL:
3434 /* No need to patch these */
3439 switch (patch_info->type) {
3440 case MONO_PATCH_INFO_IP:
3441 *((gconstpointer *)(ip)) = target;
3443 case MONO_PATCH_INFO_CLASS_INIT: {
3445 /* Might already been changed to a nop */
3446 x86_call_code (code, 0);
3447 x86_patch (ip, target);
3450 case MONO_PATCH_INFO_ABS:
3451 case MONO_PATCH_INFO_METHOD:
3452 case MONO_PATCH_INFO_METHOD_JUMP:
3453 case MONO_PATCH_INFO_INTERNAL_METHOD:
3454 case MONO_PATCH_INFO_BB:
3455 case MONO_PATCH_INFO_LABEL:
3456 x86_patch (ip, target);
3458 case MONO_PATCH_INFO_NONE:
3461 guint32 offset = mono_arch_get_patch_offset (ip);
3462 *((gconstpointer *)(ip + offset)) = target;
3470 mono_arch_emit_prolog (MonoCompile *cfg)
3472 MonoMethod *method = cfg->method;
3474 MonoMethodSignature *sig;
3476 int alloc_size, pos, max_offset, i;
3479 cfg->code_size = MAX (mono_method_get_header (method)->code_size * 4, 10240);
3481 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
3482 cfg->code_size += 512;
3484 code = cfg->native_code = g_malloc (cfg->code_size);
3486 x86_push_reg (code, X86_EBP);
3487 x86_mov_reg_reg (code, X86_EBP, X86_ESP, 4);
3489 alloc_size = cfg->stack_offset;
3492 if (method->wrapper_type == MONO_WRAPPER_NATIVE_TO_MANAGED) {
3493 /* Might need to attach the thread to the JIT or change the domain for the callback */
3494 if (appdomain_tls_offset != -1 && lmf_tls_offset != -1) {
3495 guint8 *buf, *no_domain_branch;
3497 code = emit_tls_get (code, X86_EAX, appdomain_tls_offset);
3498 x86_alu_reg_imm (code, X86_CMP, X86_EAX, GPOINTER_TO_UINT (cfg->domain));
3499 no_domain_branch = code;
3500 x86_branch8 (code, X86_CC_NE, 0, 0);
3501 code = emit_tls_get ( code, X86_EAX, lmf_tls_offset);
3502 x86_test_reg_reg (code, X86_EAX, X86_EAX);
3504 x86_branch8 (code, X86_CC_NE, 0, 0);
3505 x86_patch (no_domain_branch, code);
3506 x86_push_imm (code, cfg->domain);
3507 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_jit_thread_attach");
3508 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3509 x86_patch (buf, code);
3510 #ifdef PLATFORM_WIN32
3511 /* The TLS key actually contains a pointer to the MonoJitTlsData structure */
3512 /* FIXME: Add a separate key for LMF to avoid this */
3513 x86_alu_reg_imm (code, X86_ADD, X86_EAX, G_STRUCT_OFFSET (MonoJitTlsData, lmf));
3516 g_assert (!cfg->compile_aot);
3517 x86_push_imm (code, cfg->domain);
3518 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_jit_thread_attach");
3519 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3523 if (method->save_lmf) {
3524 pos += sizeof (MonoLMF);
3526 /* save the current IP */
3527 mono_add_patch_info (cfg, code + 1 - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3528 x86_push_imm_template (code);
3530 /* save all caller saved regs */
3531 x86_push_reg (code, X86_EBP);
3532 x86_push_reg (code, X86_ESI);
3533 x86_push_reg (code, X86_EDI);
3534 x86_push_reg (code, X86_EBX);
3536 if ((lmf_tls_offset != -1) && !is_win32 && !optimize_for_xen) {
3538 * Optimized version which uses the mono_lmf TLS variable instead of indirection
3539 * through the mono_lmf_addr TLS variable.
3541 /* %eax = previous_lmf */
3542 x86_prefix (code, X86_GS_PREFIX);
3543 x86_mov_reg_mem (code, X86_EAX, lmf_tls_offset, 4);
3544 /* skip esp + method_info + lmf */
3545 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 12);
3546 /* push previous_lmf */
3547 x86_push_reg (code, X86_EAX);
3549 x86_prefix (code, X86_GS_PREFIX);
3550 x86_mov_mem_reg (code, lmf_tls_offset, X86_ESP, 4);
3552 /* get the address of lmf for the current thread */
3554 * This is performance critical so we try to use some tricks to make
3558 if (lmf_addr_tls_offset != -1) {
3559 /* Load lmf quicky using the GS register */
3560 code = emit_tls_get (code, X86_EAX, lmf_addr_tls_offset);
3561 #ifdef PLATFORM_WIN32
3562 /* The TLS key actually contains a pointer to the MonoJitTlsData structure */
3563 /* FIXME: Add a separate key for LMF to avoid this */
3564 x86_alu_reg_imm (code, X86_ADD, X86_EAX, G_STRUCT_OFFSET (MonoJitTlsData, lmf));
3567 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_get_lmf_addr");
3570 /* Skip esp + method info */
3571 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
3574 x86_push_reg (code, X86_EAX);
3575 /* push *lfm (previous_lmf) */
3576 x86_push_membase (code, X86_EAX, 0);
3578 x86_mov_membase_reg (code, X86_EAX, 0, X86_ESP, 4);
3582 if (cfg->used_int_regs & (1 << X86_EBX)) {
3583 x86_push_reg (code, X86_EBX);
3587 if (cfg->used_int_regs & (1 << X86_EDI)) {
3588 x86_push_reg (code, X86_EDI);
3592 if (cfg->used_int_regs & (1 << X86_ESI)) {
3593 x86_push_reg (code, X86_ESI);
3601 /* the original alloc_size is already aligned: there is %ebp and retip pushed, so realign */
3603 int tot = alloc_size + pos + 4 + 4; /* ret ip + ebp */
3615 /* See mono_emit_stack_alloc */
3616 #if defined(PLATFORM_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
3617 guint32 remaining_size = alloc_size;
3618 while (remaining_size >= 0x1000) {
3619 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
3620 x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
3621 remaining_size -= 0x1000;
3624 x86_alu_reg_imm (code, X86_SUB, X86_ESP, remaining_size);
3626 x86_alu_reg_imm (code, X86_SUB, X86_ESP, alloc_size);
3631 /* check the stack is aligned */
3632 x86_mov_reg_reg (code, X86_EDX, X86_ESP, 4);
3633 x86_alu_reg_imm (code, X86_AND, X86_EDX, 15);
3634 x86_alu_reg_imm (code, X86_CMP, X86_EDX, 0);
3635 x86_branch_disp (code, X86_CC_EQ, 3, FALSE);
3636 x86_breakpoint (code);
3639 /* compute max_offset in order to use short forward jumps */
3641 if (cfg->opt & MONO_OPT_BRANCH) {
3642 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
3644 bb->max_offset = max_offset;
3646 if (cfg->prof_options & MONO_PROFILE_COVERAGE)
3648 /* max alignment for loops */
3649 if ((cfg->opt & MONO_OPT_LOOP) && bb_is_loop_start (bb))
3650 max_offset += LOOP_ALIGNMENT;
3652 MONO_BB_FOR_EACH_INS (bb, ins) {
3653 if (ins->opcode == OP_LABEL)
3654 ins->inst_c1 = max_offset;
3656 max_offset += ((guint8 *)ins_get_spec (ins->opcode))[MONO_INST_LEN];
3661 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3662 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
3664 /* store runtime generic context */
3665 if (cfg->rgctx_var) {
3666 g_assert (cfg->rgctx_var->opcode == OP_REGOFFSET && cfg->rgctx_var->inst_basereg == X86_EBP);
3668 x86_mov_membase_reg (code, X86_EBP, cfg->rgctx_var->inst_offset, MONO_ARCH_RGCTX_REG, 4);
3671 /* load arguments allocated to register from the stack */
3672 sig = mono_method_signature (method);
3675 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3676 inst = cfg->args [pos];
3677 if (inst->opcode == OP_REGVAR) {
3678 x86_mov_reg_membase (code, inst->dreg, X86_EBP, inst->inst_offset, 4);
3679 if (cfg->verbose_level > 2)
3680 g_print ("Argument %d assigned to register %s\n", pos, mono_arch_regname (inst->dreg));
3685 cfg->code_len = code - cfg->native_code;
3687 g_assert (cfg->code_len < cfg->code_size);
3693 mono_arch_emit_epilog (MonoCompile *cfg)
3695 MonoMethod *method = cfg->method;
3696 MonoMethodSignature *sig = mono_method_signature (method);
3698 guint32 stack_to_pop;
3700 int max_epilog_size = 16;
3703 if (cfg->method->save_lmf)
3704 max_epilog_size += 128;
3706 while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
3707 cfg->code_size *= 2;
3708 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
3709 mono_jit_stats.code_reallocs++;
3712 code = cfg->native_code + cfg->code_len;
3714 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3715 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
3717 /* the code restoring the registers must be kept in sync with OP_JMP */
3720 if (method->save_lmf) {
3721 gint32 prev_lmf_reg;
3722 gint32 lmf_offset = -sizeof (MonoLMF);
3724 if ((lmf_tls_offset != -1) && !is_win32 && !optimize_for_xen) {
3726 * Optimized version which uses the mono_lmf TLS variable instead of indirection
3727 * through the mono_lmf_addr TLS variable.
3729 /* reg = previous_lmf */
3730 x86_mov_reg_membase (code, X86_ECX, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), 4);
3732 /* lmf = previous_lmf */
3733 x86_prefix (code, X86_GS_PREFIX);
3734 x86_mov_mem_reg (code, lmf_tls_offset, X86_ECX, 4);
3736 /* Find a spare register */
3737 switch (mono_type_get_underlying_type (sig->ret)->type) {
3740 prev_lmf_reg = X86_EDI;
3741 cfg->used_int_regs |= (1 << X86_EDI);
3744 prev_lmf_reg = X86_EDX;
3748 /* reg = previous_lmf */
3749 x86_mov_reg_membase (code, prev_lmf_reg, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), 4);
3752 x86_mov_reg_membase (code, X86_ECX, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), 4);
3754 /* *(lmf) = previous_lmf */
3755 x86_mov_membase_reg (code, X86_ECX, 0, prev_lmf_reg, 4);
3758 /* restore caller saved regs */
3759 if (cfg->used_int_regs & (1 << X86_EBX)) {
3760 x86_mov_reg_membase (code, X86_EBX, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebx), 4);
3763 if (cfg->used_int_regs & (1 << X86_EDI)) {
3764 x86_mov_reg_membase (code, X86_EDI, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, edi), 4);
3766 if (cfg->used_int_regs & (1 << X86_ESI)) {
3767 x86_mov_reg_membase (code, X86_ESI, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, esi), 4);
3770 /* EBP is restored by LEAVE */
3772 if (cfg->used_int_regs & (1 << X86_EBX)) {
3775 if (cfg->used_int_regs & (1 << X86_EDI)) {
3778 if (cfg->used_int_regs & (1 << X86_ESI)) {
3783 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
3785 if (cfg->used_int_regs & (1 << X86_ESI)) {
3786 x86_pop_reg (code, X86_ESI);
3788 if (cfg->used_int_regs & (1 << X86_EDI)) {
3789 x86_pop_reg (code, X86_EDI);
3791 if (cfg->used_int_regs & (1 << X86_EBX)) {
3792 x86_pop_reg (code, X86_EBX);
3796 /* Load returned vtypes into registers if needed */
3797 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
3798 if (cinfo->ret.storage == ArgValuetypeInReg) {
3799 for (quad = 0; quad < 2; quad ++) {
3800 switch (cinfo->ret.pair_storage [quad]) {
3802 x86_mov_reg_membase (code, cinfo->ret.pair_regs [quad], cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), 4);
3804 case ArgOnFloatFpStack:
3805 x86_fld_membase (code, cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), FALSE);
3807 case ArgOnDoubleFpStack:
3808 x86_fld_membase (code, cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), TRUE);
3813 g_assert_not_reached ();
3820 if (CALLCONV_IS_STDCALL (sig)) {
3821 MonoJitArgumentInfo *arg_info = alloca (sizeof (MonoJitArgumentInfo) * (sig->param_count + 1));
3823 stack_to_pop = mono_arch_get_argument_info (sig, sig->param_count, arg_info);
3824 } else if (MONO_TYPE_ISSTRUCT (mono_method_signature (cfg->method)->ret) && (cinfo->ret.storage == ArgOnStack))
3830 x86_ret_imm (code, stack_to_pop);
3834 cfg->code_len = code - cfg->native_code;
3836 g_assert (cfg->code_len < cfg->code_size);
3840 mono_arch_emit_exceptions (MonoCompile *cfg)
3842 MonoJumpInfo *patch_info;
3845 MonoClass *exc_classes [16];
3846 guint8 *exc_throw_start [16], *exc_throw_end [16];
3850 /* Compute needed space */
3851 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3852 if (patch_info->type == MONO_PATCH_INFO_EXC)
3857 * make sure we have enough space for exceptions
3858 * 16 is the size of two push_imm instructions and a call
3860 if (cfg->compile_aot)
3861 code_size = exc_count * 32;
3863 code_size = exc_count * 16;
3865 while (cfg->code_len + code_size > (cfg->code_size - 16)) {
3866 cfg->code_size *= 2;
3867 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
3868 mono_jit_stats.code_reallocs++;
3871 code = cfg->native_code + cfg->code_len;
3874 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3875 switch (patch_info->type) {
3876 case MONO_PATCH_INFO_EXC: {
3877 MonoClass *exc_class;
3881 x86_patch (patch_info->ip.i + cfg->native_code, code);
3883 exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
3884 g_assert (exc_class);
3885 throw_ip = patch_info->ip.i;
3887 /* Find a throw sequence for the same exception class */
3888 for (i = 0; i < nthrows; ++i)
3889 if (exc_classes [i] == exc_class)
3892 x86_push_imm (code, (exc_throw_end [i] - cfg->native_code) - throw_ip);
3893 x86_jump_code (code, exc_throw_start [i]);
3894 patch_info->type = MONO_PATCH_INFO_NONE;
3899 /* Compute size of code following the push <OFFSET> */
3902 if ((code - cfg->native_code) - throw_ip < 126 - size) {
3903 /* Use the shorter form */
3905 x86_push_imm (code, 0);
3909 x86_push_imm (code, 0xf0f0f0f0);
3914 exc_classes [nthrows] = exc_class;
3915 exc_throw_start [nthrows] = code;
3918 x86_push_imm (code, exc_class->type_token - MONO_TOKEN_TYPE_DEF);
3919 patch_info->data.name = "mono_arch_throw_corlib_exception";
3920 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
3921 patch_info->ip.i = code - cfg->native_code;
3922 x86_call_code (code, 0);
3923 x86_push_imm (buf, (code - cfg->native_code) - throw_ip);
3928 exc_throw_end [nthrows] = code;
3940 cfg->code_len = code - cfg->native_code;
3942 g_assert (cfg->code_len < cfg->code_size);
3946 mono_arch_flush_icache (guint8 *code, gint size)
3952 mono_arch_flush_register_windows (void)
3957 * Support for fast access to the thread-local lmf structure using the GS
3958 * segment register on NPTL + kernel 2.6.x.
3961 static gboolean tls_offset_inited = FALSE;
3964 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
3966 if (!tls_offset_inited) {
3967 if (!getenv ("MONO_NO_TLS")) {
3968 #ifdef PLATFORM_WIN32
3970 * We need to init this multiple times, since when we are first called, the key might not
3971 * be initialized yet.
3973 appdomain_tls_offset = mono_domain_get_tls_key ();
3974 lmf_tls_offset = mono_get_jit_tls_key ();
3975 thread_tls_offset = mono_thread_get_tls_key ();
3977 /* Only 64 tls entries can be accessed using inline code */
3978 if (appdomain_tls_offset >= 64)
3979 appdomain_tls_offset = -1;
3980 if (lmf_tls_offset >= 64)
3981 lmf_tls_offset = -1;
3982 if (thread_tls_offset >= 64)
3983 thread_tls_offset = -1;
3986 optimize_for_xen = access ("/proc/xen", F_OK) == 0;
3988 tls_offset_inited = TRUE;
3989 appdomain_tls_offset = mono_domain_get_tls_offset ();
3990 lmf_tls_offset = mono_get_lmf_tls_offset ();
3991 lmf_addr_tls_offset = mono_get_lmf_addr_tls_offset ();
3992 thread_tls_offset = mono_thread_get_tls_offset ();
3999 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4004 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, int this_reg, int this_type, int vt_reg)
4006 MonoCallInst *call = (MonoCallInst*)inst;
4007 CallInfo *cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, inst->signature, FALSE);
4009 /* add the this argument */
4010 if (this_reg != -1) {
4011 if (cinfo->args [0].storage == ArgInIReg) {
4013 MONO_INST_NEW (cfg, this, OP_MOVE);
4014 this->type = this_type;
4015 this->sreg1 = this_reg;
4016 this->dreg = mono_regstate_next_int (cfg->rs);
4017 mono_bblock_add_inst (cfg->cbb, this);
4019 mono_call_inst_add_outarg_reg (cfg, call, this->dreg, cinfo->args [0].reg, FALSE);
4023 MONO_INST_NEW (cfg, this, OP_OUTARG);
4024 this->type = this_type;
4025 this->sreg1 = this_reg;
4026 mono_bblock_add_inst (cfg->cbb, this);
4033 if (cinfo->ret.storage == ArgValuetypeInReg) {
4035 * The valuetype is in EAX:EDX after the call, needs to be copied to
4036 * the stack. Save the address here, so the call instruction can
4039 MONO_INST_NEW (cfg, vtarg, OP_STORE_MEMBASE_REG);
4040 vtarg->inst_destbasereg = X86_ESP;
4041 vtarg->inst_offset = inst->stack_usage;
4042 vtarg->sreg1 = vt_reg;
4043 mono_bblock_add_inst (cfg->cbb, vtarg);
4045 else if (cinfo->ret.storage == ArgInIReg) {
4046 /* The return address is passed in a register */
4047 MONO_INST_NEW (cfg, vtarg, OP_MOVE);
4048 vtarg->sreg1 = vt_reg;
4049 vtarg->dreg = mono_regstate_next_int (cfg->rs);
4050 mono_bblock_add_inst (cfg->cbb, vtarg);
4052 mono_call_inst_add_outarg_reg (cfg, call, vtarg->dreg, cinfo->ret.reg, FALSE);
4055 MONO_INST_NEW (cfg, vtarg, OP_OUTARG);
4056 vtarg->type = STACK_MP;
4057 vtarg->sreg1 = vt_reg;
4058 mono_bblock_add_inst (cfg->cbb, vtarg);
4063 #ifdef MONO_ARCH_HAVE_IMT
4065 // Linear handler, the bsearch head compare is shorter
4066 //[2 + 4] x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
4067 //[1 + 1] x86_branch8(inst,cond,imm,is_signed)
4068 // x86_patch(ins,target)
4069 //[1 + 5] x86_jump_mem(inst,mem)
4072 #define BR_SMALL_SIZE 2
4073 #define BR_LARGE_SIZE 5
4074 #define JUMP_IMM_SIZE 6
4075 #define ENABLE_WRONG_METHOD_CHECK 0
4078 imt_branch_distance (MonoIMTCheckItem **imt_entries, int start, int target)
4080 int i, distance = 0;
4081 for (i = start; i < target; ++i)
4082 distance += imt_entries [i]->chunk_size;
4087 * LOCKING: called with the domain lock held
4090 mono_arch_build_imt_thunk (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count)
4094 guint8 *code, *start;
4096 for (i = 0; i < count; ++i) {
4097 MonoIMTCheckItem *item = imt_entries [i];
4098 if (item->is_equals) {
4099 if (item->check_target_idx) {
4100 if (!item->compare_done)
4101 item->chunk_size += CMP_SIZE;
4102 item->chunk_size += BR_SMALL_SIZE + JUMP_IMM_SIZE;
4104 item->chunk_size += JUMP_IMM_SIZE;
4105 #if ENABLE_WRONG_METHOD_CHECK
4106 item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
4110 item->chunk_size += CMP_SIZE + BR_LARGE_SIZE;
4111 imt_entries [item->check_target_idx]->compare_done = TRUE;
4113 size += item->chunk_size;
4115 code = mono_code_manager_reserve (domain->code_mp, size);
4117 for (i = 0; i < count; ++i) {
4118 MonoIMTCheckItem *item = imt_entries [i];
4119 item->code_target = code;
4120 if (item->is_equals) {
4121 if (item->check_target_idx) {
4122 if (!item->compare_done)
4123 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->method);
4124 item->jmp_code = code;
4125 x86_branch8 (code, X86_CC_NE, 0, FALSE);
4126 x86_jump_mem (code, & (vtable->vtable [item->vtable_slot]));
4128 /* enable the commented code to assert on wrong method */
4129 #if ENABLE_WRONG_METHOD_CHECK
4130 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->method);
4131 item->jmp_code = code;
4132 x86_branch8 (code, X86_CC_NE, 0, FALSE);
4134 x86_jump_mem (code, & (vtable->vtable [item->vtable_slot]));
4135 #if ENABLE_WRONG_METHOD_CHECK
4136 x86_patch (item->jmp_code, code);
4137 x86_breakpoint (code);
4138 item->jmp_code = NULL;
4142 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->method);
4143 item->jmp_code = code;
4144 if (x86_is_imm8 (imt_branch_distance (imt_entries, i, item->check_target_idx)))
4145 x86_branch8 (code, X86_CC_GE, 0, FALSE);
4147 x86_branch32 (code, X86_CC_GE, 0, FALSE);
4150 /* patch the branches to get to the target items */
4151 for (i = 0; i < count; ++i) {
4152 MonoIMTCheckItem *item = imt_entries [i];
4153 if (item->jmp_code) {
4154 if (item->check_target_idx) {
4155 x86_patch (item->jmp_code, imt_entries [item->check_target_idx]->code_target);
4160 mono_stats.imt_thunks_size += code - start;
4161 g_assert (code - start <= size);
4166 mono_arch_find_imt_method (gpointer *regs, guint8 *code)
4168 return (MonoMethod*) regs [MONO_ARCH_IMT_REG];
4172 mono_arch_find_this_argument (gpointer *regs, MonoMethod *method, MonoGenericSharingContext *gsctx)
4174 MonoMethodSignature *sig = mono_method_signature (method);
4175 CallInfo *cinfo = get_call_info (gsctx, NULL, sig, FALSE);
4176 int this_argument_offset;
4177 MonoObject *this_argument;
4180 * this is the offset of the this arg from esp as saved at the start of
4181 * mono_arch_create_trampoline_code () in tramp-x86.c.
4183 this_argument_offset = 5;
4184 if (MONO_TYPE_ISSTRUCT (sig->ret) && (cinfo->ret.storage == ArgOnStack))
4185 this_argument_offset++;
4187 this_argument = * (MonoObject**) (((guint8*) regs [X86_ESP]) + this_argument_offset * sizeof (gpointer));
4190 return this_argument;
4195 mono_arch_find_static_call_vtable (gpointer *regs, guint8 *code)
4197 return (MonoVTable*) regs [MONO_ARCH_RGCTX_REG];
4201 mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4203 MonoInst *ins = NULL;
4205 if (cmethod->klass == mono_defaults.math_class) {
4206 if (strcmp (cmethod->name, "Sin") == 0) {
4207 MONO_INST_NEW (cfg, ins, OP_SIN);
4208 ins->inst_i0 = args [0];
4209 } else if (strcmp (cmethod->name, "Cos") == 0) {
4210 MONO_INST_NEW (cfg, ins, OP_COS);
4211 ins->inst_i0 = args [0];
4212 } else if (strcmp (cmethod->name, "Tan") == 0) {
4213 MONO_INST_NEW (cfg, ins, OP_TAN);
4214 ins->inst_i0 = args [0];
4215 } else if (strcmp (cmethod->name, "Atan") == 0) {
4216 MONO_INST_NEW (cfg, ins, OP_ATAN);
4217 ins->inst_i0 = args [0];
4218 } else if (strcmp (cmethod->name, "Sqrt") == 0) {
4219 MONO_INST_NEW (cfg, ins, OP_SQRT);
4220 ins->inst_i0 = args [0];
4221 } else if (strcmp (cmethod->name, "Abs") == 0 && fsig->params [0]->type == MONO_TYPE_R8) {
4222 MONO_INST_NEW (cfg, ins, OP_ABS);
4223 ins->inst_i0 = args [0];
4226 if (cfg->opt & MONO_OPT_CMOV) {
4229 if (strcmp (cmethod->name, "Min") == 0) {
4230 if (fsig->params [0]->type == MONO_TYPE_I4)
4232 } else if (strcmp (cmethod->name, "Max") == 0) {
4233 if (fsig->params [0]->type == MONO_TYPE_I4)
4238 MONO_INST_NEW (cfg, ins, opcode);
4239 ins->inst_i0 = args [0];
4240 ins->inst_i1 = args [1];
4245 /* OP_FREM is not IEEE compatible */
4246 else if (strcmp (cmethod->name, "IEEERemainder") == 0) {
4247 MONO_INST_NEW (cfg, ins, OP_FREM);
4248 ins->inst_i0 = args [0];
4249 ins->inst_i1 = args [1];
4259 mono_arch_print_tree (MonoInst *tree, int arity)
4264 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
4268 if (appdomain_tls_offset == -1)
4271 MONO_INST_NEW (cfg, ins, OP_TLS_GET);
4272 ins->inst_offset = appdomain_tls_offset;
4276 MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
4280 if (thread_tls_offset == -1)
4283 MONO_INST_NEW (cfg, ins, OP_TLS_GET);
4284 ins->inst_offset = thread_tls_offset;
4289 mono_arch_get_patch_offset (guint8 *code)
4291 if ((code [0] == 0x8b) && (x86_modrm_mod (code [1]) == 0x2))
4293 else if ((code [0] == 0xba))
4295 else if ((code [0] == 0x68))
4298 else if ((code [0] == 0xff) && (x86_modrm_reg (code [1]) == 0x6))
4299 /* push <OFFSET>(<REG>) */
4301 else if ((code [0] == 0xff) && (x86_modrm_reg (code [1]) == 0x2))
4302 /* call *<OFFSET>(<REG>) */
4304 else if ((code [0] == 0xdd) || (code [0] == 0xd9))
4307 else if ((code [0] == 0x58) && (code [1] == 0x05))
4308 /* pop %eax; add <OFFSET>, %eax */
4310 else if ((code [0] >= 0x58) && (code [0] <= 0x58 + X86_NREG) && (code [1] == 0x81))
4311 /* pop <REG>; add <OFFSET>, <REG> */
4313 else if ((code [0] >= 0xb8) && (code [0] < 0xb8 + 8))
4314 /* mov <REG>, imm */
4317 g_assert_not_reached ();
4323 * mono_breakpoint_clean_code:
4325 * Copy @size bytes from @code - @offset to the buffer @buf. If the debugger inserted software
4326 * breakpoints in the original code, they are removed in the copy.
4328 * Returns TRUE if no sw breakpoint was present.
4331 mono_breakpoint_clean_code (guint8 *method_start, guint8 *code, int offset, guint8 *buf, int size)
4334 gboolean can_write = TRUE;
4336 * If method_start is non-NULL we need to perform bound checks, since we access memory
4337 * at code - offset we could go before the start of the method and end up in a different
4338 * page of memory that is not mapped or read incorrect data anyway. We zero-fill the bytes
4341 if (!method_start || code - offset >= method_start) {
4342 memcpy (buf, code - offset, size);
4344 int diff = code - method_start;
4345 memset (buf, 0, size);
4346 memcpy (buf + offset - diff, method_start, diff + size - offset);
4349 for (i = 0; i < MONO_BREAKPOINT_ARRAY_SIZE; ++i) {
4350 int idx = mono_breakpoint_info_index [i];
4354 ptr = mono_breakpoint_info [idx].address;
4355 if (ptr >= code && ptr < code + size) {
4356 guint8 saved_byte = mono_breakpoint_info [idx].saved_byte;
4358 /*g_print ("patching %p with 0x%02x (was: 0x%02x)\n", ptr, saved_byte, buf [ptr - code]);*/
4359 buf [ptr - code] = saved_byte;
4366 mono_arch_get_vcall_slot (guint8 *code, gpointer *regs, int *displacement)
4372 mono_breakpoint_clean_code (NULL, code, 8, buf, sizeof (buf));
4377 /* go to the start of the call instruction
4379 * address_byte = (m << 6) | (o << 3) | reg
4380 * call opcode: 0xff address_byte displacement
4382 * 0xff m=2,o=2 imm32
4387 * A given byte sequence can match more than case here, so we have to be
4388 * really careful about the ordering of the cases. Longer sequences
4391 if ((code [-2] == 0x8b) && (x86_modrm_mod (code [-1]) == 0x2) && (code [4] == 0xff) && (x86_modrm_reg (code [5]) == 0x2) && (x86_modrm_mod (code [5]) == 0x0)) {
4393 * This is an interface call
4394 * 8b 80 0c e8 ff ff mov 0xffffe80c(%eax),%eax
4395 * ff 10 call *(%eax)
4397 reg = x86_modrm_rm (code [5]);
4399 #ifdef MONO_ARCH_HAVE_IMT
4400 } else if ((code [-2] == 0xba) && (code [3] == 0xff) && (x86_modrm_mod (code [4]) == 1) && (x86_modrm_reg (code [4]) == 2) && ((signed char)code [5] < 0)) {
4401 /* IMT-based interface calls: with MONO_ARCH_IMT_REG == edx
4402 * ba 14 f8 28 08 mov $0x828f814,%edx
4403 * ff 50 fc call *0xfffffffc(%eax)
4405 reg = code [4] & 0x07;
4406 disp = (signed char)code [5];
4408 } else if ((code [1] != 0xe8) && (code [3] == 0xff) && ((code [4] & 0x18) == 0x10) && ((code [4] >> 6) == 1)) {
4409 reg = code [4] & 0x07;
4410 disp = (signed char)code [5];
4412 if ((code [0] == 0xff) && ((code [1] & 0x18) == 0x10) && ((code [1] >> 6) == 2)) {
4413 reg = code [1] & 0x07;
4414 disp = *((gint32*)(code + 2));
4415 } else if ((code [1] == 0xe8)) {
4417 } else if ((code [4] == 0xff) && (((code [5] >> 6) & 0x3) == 0) && (((code [5] >> 3) & 0x7) == 2)) {
4419 * This is a interface call
4420 * 8b 40 30 mov 0x30(%eax),%eax
4421 * ff 10 call *(%eax)
4424 reg = code [5] & 0x07;
4430 *displacement = disp;
4435 mono_arch_get_vcall_slot_addr (guint8 *code, gpointer *regs)
4439 vt = mono_arch_get_vcall_slot (code, regs, &displacement);
4442 return (gpointer*)((char*)vt + displacement);
4446 mono_arch_get_this_arg_from_call (MonoMethodSignature *sig, gssize *regs, guint8 *code)
4448 guint32 esp = regs [X86_ESP];
4452 cinfo = get_call_info (NULL, NULL, sig, FALSE);
4455 * The stack looks like:
4458 * <possible vtype return address>
4460 * <4 pointers pushed by mono_arch_create_trampoline_code ()>
4462 res = (((MonoObject**)esp) [5 + (cinfo->args [0].offset / 4)]);
4467 #define MAX_ARCH_DELEGATE_PARAMS 10
4470 mono_arch_get_delegate_invoke_impl (MonoMethodSignature *sig, gboolean has_target)
4472 guint8 *code, *start;
4474 if (sig->param_count > MAX_ARCH_DELEGATE_PARAMS)
4477 /* FIXME: Support more cases */
4478 if (MONO_TYPE_ISSTRUCT (sig->ret))
4482 * The stack contains:
4488 static guint8* cached = NULL;
4489 mono_mini_arch_lock ();
4491 mono_mini_arch_unlock ();
4495 start = code = mono_global_codeman_reserve (64);
4497 /* Replace the this argument with the target */
4498 x86_mov_reg_membase (code, X86_EAX, X86_ESP, 4, 4);
4499 x86_mov_reg_membase (code, X86_ECX, X86_EAX, G_STRUCT_OFFSET (MonoDelegate, target), 4);
4500 x86_mov_membase_reg (code, X86_ESP, 4, X86_ECX, 4);
4501 x86_jump_membase (code, X86_EAX, G_STRUCT_OFFSET (MonoDelegate, method_ptr));
4503 g_assert ((code - start) < 64);
4506 mono_debug_add_delegate_trampoline (start, code - start);
4507 mono_mini_arch_unlock ();
4509 static guint8* cache [MAX_ARCH_DELEGATE_PARAMS + 1] = {NULL};
4511 /* 8 for mov_reg and jump, plus 8 for each parameter */
4512 int code_reserve = 8 + (sig->param_count * 8);
4514 for (i = 0; i < sig->param_count; ++i)
4515 if (!mono_is_regsize_var (sig->params [i]))
4518 mono_mini_arch_lock ();
4519 code = cache [sig->param_count];
4521 mono_mini_arch_unlock ();
4526 * The stack contains:
4527 * <args in reverse order>
4532 * <args in reverse order>
4535 * without unbalancing the stack.
4536 * So move each arg up a spot in the stack (overwriting un-needed 'this' arg)
4537 * and leaving original spot of first arg as placeholder in stack so
4538 * when callee pops stack everything works.
4541 start = code = mono_global_codeman_reserve (code_reserve);
4543 /* store delegate for access to method_ptr */
4544 x86_mov_reg_membase (code, X86_ECX, X86_ESP, 4, 4);
4547 for (i = 0; i < sig->param_count; ++i) {
4548 x86_mov_reg_membase (code, X86_EAX, X86_ESP, (i+2)*4, 4);
4549 x86_mov_membase_reg (code, X86_ESP, (i+1)*4, X86_EAX, 4);
4552 x86_jump_membase (code, X86_ECX, G_STRUCT_OFFSET (MonoDelegate, method_ptr));
4554 g_assert ((code - start) < code_reserve);
4556 cache [sig->param_count] = start;
4558 mono_debug_add_delegate_trampoline (start, code - start);
4559 mono_mini_arch_unlock ();
4566 mono_arch_context_get_int_reg (MonoContext *ctx, int reg)
4569 case X86_ECX: return (gpointer)ctx->ecx;
4570 case X86_EDX: return (gpointer)ctx->edx;
4571 case X86_EBP: return (gpointer)ctx->ebp;
4572 case X86_ESP: return (gpointer)ctx->esp;
4573 default: return ((gpointer)(&ctx->eax)[reg]);