2 * mini-x86.c: x86 backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
9 * (C) 2003 Ximian, Inc.
18 #include <mono/metadata/appdomain.h>
19 #include <mono/metadata/debug-helpers.h>
20 #include <mono/metadata/threads.h>
21 #include <mono/metadata/profiler-private.h>
22 #include <mono/metadata/mono-debug.h>
23 #include <mono/utils/mono-math.h>
24 #include <mono/utils/mono-counters.h>
31 /* On windows, these hold the key returned by TlsAlloc () */
32 static gint lmf_tls_offset = -1;
33 static gint lmf_addr_tls_offset = -1;
34 static gint appdomain_tls_offset = -1;
35 static gint thread_tls_offset = -1;
38 static gboolean optimize_for_xen = TRUE;
40 #define optimize_for_xen 0
44 static gboolean is_win32 = TRUE;
46 static gboolean is_win32 = FALSE;
49 /* This mutex protects architecture specific caches */
50 #define mono_mini_arch_lock() EnterCriticalSection (&mini_arch_mutex)
51 #define mono_mini_arch_unlock() LeaveCriticalSection (&mini_arch_mutex)
52 static CRITICAL_SECTION mini_arch_mutex;
54 #define ALIGN_TO(val,align) ((((guint64)val) + ((align) - 1)) & ~((align) - 1))
59 /* Under windows, the default pinvoke calling convention is stdcall */
60 #define CALLCONV_IS_STDCALL(sig) ((((sig)->call_convention) == MONO_CALL_STDCALL) || ((sig)->pinvoke && ((sig)->call_convention) == MONO_CALL_DEFAULT))
62 #define CALLCONV_IS_STDCALL(sig) (((sig)->call_convention) == MONO_CALL_STDCALL)
66 mono_breakpoint_info [MONO_BREAKPOINT_ARRAY_SIZE];
69 mono_arch_regname (int reg)
72 case X86_EAX: return "%eax";
73 case X86_EBX: return "%ebx";
74 case X86_ECX: return "%ecx";
75 case X86_EDX: return "%edx";
76 case X86_ESP: return "%esp";
77 case X86_EBP: return "%ebp";
78 case X86_EDI: return "%edi";
79 case X86_ESI: return "%esi";
85 mono_arch_fregname (int reg)
110 mono_arch_xregname (int reg)
151 /* Only if storage == ArgValuetypeInReg */
152 ArgStorage pair_storage [2];
161 gboolean need_stack_align;
162 guint32 stack_align_amount;
170 #define FLOAT_PARAM_REGS 0
172 static X86_Reg_No param_regs [] = { 0 };
174 #if defined(PLATFORM_WIN32) || defined(__APPLE__) || defined(__FreeBSD__)
175 #define SMALL_STRUCTS_IN_REGS
176 static X86_Reg_No return_regs [] = { X86_EAX, X86_EDX };
180 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo)
182 ainfo->offset = *stack_size;
184 if (*gr >= PARAM_REGS) {
185 ainfo->storage = ArgOnStack;
186 (*stack_size) += sizeof (gpointer);
189 ainfo->storage = ArgInIReg;
190 ainfo->reg = param_regs [*gr];
196 add_general_pair (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo)
198 ainfo->offset = *stack_size;
200 g_assert (PARAM_REGS == 0);
202 ainfo->storage = ArgOnStack;
203 (*stack_size) += sizeof (gpointer) * 2;
207 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean is_double)
209 ainfo->offset = *stack_size;
211 if (*gr >= FLOAT_PARAM_REGS) {
212 ainfo->storage = ArgOnStack;
213 (*stack_size) += is_double ? 8 : 4;
216 /* A double register */
218 ainfo->storage = ArgInDoubleSSEReg;
220 ainfo->storage = ArgInFloatSSEReg;
228 add_valuetype (MonoGenericSharingContext *gsctx, MonoMethodSignature *sig, ArgInfo *ainfo, MonoType *type,
230 guint32 *gr, guint32 *fr, guint32 *stack_size)
235 klass = mono_class_from_mono_type (type);
236 size = mini_type_stack_size_full (gsctx, &klass->byval_arg, NULL, sig->pinvoke);
238 #ifdef SMALL_STRUCTS_IN_REGS
239 if (sig->pinvoke && is_return) {
240 MonoMarshalType *info;
243 * the exact rules are not very well documented, the code below seems to work with the
244 * code generated by gcc 3.3.3 -mno-cygwin.
246 info = mono_marshal_load_type_info (klass);
249 ainfo->pair_storage [0] = ainfo->pair_storage [1] = ArgNone;
251 /* Special case structs with only a float member */
252 if ((info->native_size == 8) && (info->num_fields == 1) && (info->fields [0].field->type->type == MONO_TYPE_R8)) {
253 ainfo->storage = ArgValuetypeInReg;
254 ainfo->pair_storage [0] = ArgOnDoubleFpStack;
257 if ((info->native_size == 4) && (info->num_fields == 1) && (info->fields [0].field->type->type == MONO_TYPE_R4)) {
258 ainfo->storage = ArgValuetypeInReg;
259 ainfo->pair_storage [0] = ArgOnFloatFpStack;
262 if ((info->native_size == 1) || (info->native_size == 2) || (info->native_size == 4) || (info->native_size == 8)) {
263 ainfo->storage = ArgValuetypeInReg;
264 ainfo->pair_storage [0] = ArgInIReg;
265 ainfo->pair_regs [0] = return_regs [0];
266 if (info->native_size > 4) {
267 ainfo->pair_storage [1] = ArgInIReg;
268 ainfo->pair_regs [1] = return_regs [1];
275 ainfo->offset = *stack_size;
276 ainfo->storage = ArgOnStack;
277 *stack_size += ALIGN_TO (size, sizeof (gpointer));
283 * Obtain information about a call according to the calling convention.
284 * For x86 ELF, see the "System V Application Binary Interface Intel386
285 * Architecture Processor Supplment, Fourth Edition" document for more
287 * For x86 win32, see ???.
290 get_call_info (MonoGenericSharingContext *gsctx, MonoMemPool *mp, MonoMethodSignature *sig, gboolean is_pinvoke)
294 int n = sig->hasthis + sig->param_count;
295 guint32 stack_size = 0;
299 cinfo = mono_mempool_alloc0 (mp, sizeof (CallInfo) + (sizeof (ArgInfo) * n));
301 cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
308 ret_type = mini_type_get_underlying_type (gsctx, sig->ret);
309 switch (ret_type->type) {
310 case MONO_TYPE_BOOLEAN:
321 case MONO_TYPE_FNPTR:
322 case MONO_TYPE_CLASS:
323 case MONO_TYPE_OBJECT:
324 case MONO_TYPE_SZARRAY:
325 case MONO_TYPE_ARRAY:
326 case MONO_TYPE_STRING:
327 cinfo->ret.storage = ArgInIReg;
328 cinfo->ret.reg = X86_EAX;
332 cinfo->ret.storage = ArgInIReg;
333 cinfo->ret.reg = X86_EAX;
336 cinfo->ret.storage = ArgOnFloatFpStack;
339 cinfo->ret.storage = ArgOnDoubleFpStack;
341 case MONO_TYPE_GENERICINST:
342 if (!mono_type_generic_inst_is_valuetype (sig->ret)) {
343 cinfo->ret.storage = ArgInIReg;
344 cinfo->ret.reg = X86_EAX;
348 case MONO_TYPE_VALUETYPE: {
349 guint32 tmp_gr = 0, tmp_fr = 0, tmp_stacksize = 0;
351 add_valuetype (gsctx, sig, &cinfo->ret, sig->ret, TRUE, &tmp_gr, &tmp_fr, &tmp_stacksize);
352 if (cinfo->ret.storage == ArgOnStack)
353 /* The caller passes the address where the value is stored */
354 add_general (&gr, &stack_size, &cinfo->ret);
357 case MONO_TYPE_TYPEDBYREF:
358 /* Same as a valuetype with size 24 */
359 add_general (&gr, &stack_size, &cinfo->ret);
363 cinfo->ret.storage = ArgNone;
366 g_error ("Can't handle as return value 0x%x", sig->ret->type);
372 add_general (&gr, &stack_size, cinfo->args + 0);
374 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
376 fr = FLOAT_PARAM_REGS;
378 /* Emit the signature cookie just before the implicit arguments */
379 add_general (&gr, &stack_size, &cinfo->sig_cookie);
382 for (i = 0; i < sig->param_count; ++i) {
383 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
386 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
387 /* We allways pass the sig cookie on the stack for simplicity */
389 * Prevent implicit arguments + the sig cookie from being passed
393 fr = FLOAT_PARAM_REGS;
395 /* Emit the signature cookie just before the implicit arguments */
396 add_general (&gr, &stack_size, &cinfo->sig_cookie);
399 if (sig->params [i]->byref) {
400 add_general (&gr, &stack_size, ainfo);
403 ptype = mini_type_get_underlying_type (gsctx, sig->params [i]);
404 switch (ptype->type) {
405 case MONO_TYPE_BOOLEAN:
408 add_general (&gr, &stack_size, ainfo);
413 add_general (&gr, &stack_size, ainfo);
417 add_general (&gr, &stack_size, ainfo);
422 case MONO_TYPE_FNPTR:
423 case MONO_TYPE_CLASS:
424 case MONO_TYPE_OBJECT:
425 case MONO_TYPE_STRING:
426 case MONO_TYPE_SZARRAY:
427 case MONO_TYPE_ARRAY:
428 add_general (&gr, &stack_size, ainfo);
430 case MONO_TYPE_GENERICINST:
431 if (!mono_type_generic_inst_is_valuetype (sig->params [i])) {
432 add_general (&gr, &stack_size, ainfo);
436 case MONO_TYPE_VALUETYPE:
437 add_valuetype (gsctx, sig, ainfo, sig->params [i], FALSE, &gr, &fr, &stack_size);
439 case MONO_TYPE_TYPEDBYREF:
440 stack_size += sizeof (MonoTypedRef);
441 ainfo->storage = ArgOnStack;
445 add_general_pair (&gr, &stack_size, ainfo);
448 add_float (&fr, &stack_size, ainfo, FALSE);
451 add_float (&fr, &stack_size, ainfo, TRUE);
454 g_error ("unexpected type 0x%x", ptype->type);
455 g_assert_not_reached ();
459 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
461 fr = FLOAT_PARAM_REGS;
463 /* Emit the signature cookie just before the implicit arguments */
464 add_general (&gr, &stack_size, &cinfo->sig_cookie);
467 #if defined(__APPLE__)
468 if ((stack_size % 16) != 0) {
469 cinfo->need_stack_align = TRUE;
470 stack_size += cinfo->stack_align_amount = 16-(stack_size % 16);
474 cinfo->stack_usage = stack_size;
475 cinfo->reg_usage = gr;
476 cinfo->freg_usage = fr;
481 * mono_arch_get_argument_info:
482 * @csig: a method signature
483 * @param_count: the number of parameters to consider
484 * @arg_info: an array to store the result infos
486 * Gathers information on parameters such as size, alignment and
487 * padding. arg_info should be large enought to hold param_count + 1 entries.
489 * Returns the size of the argument area on the stack.
492 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
494 int k, args_size = 0;
500 cinfo = get_call_info (NULL, NULL, csig, FALSE);
502 if (MONO_TYPE_ISSTRUCT (csig->ret) && (cinfo->ret.storage == ArgOnStack)) {
503 args_size += sizeof (gpointer);
507 arg_info [0].offset = offset;
510 args_size += sizeof (gpointer);
514 arg_info [0].size = args_size;
516 for (k = 0; k < param_count; k++) {
517 size = mini_type_stack_size_full (NULL, csig->params [k], &align, csig->pinvoke);
519 /* ignore alignment for now */
522 args_size += pad = (align - (args_size & (align - 1))) & (align - 1);
523 arg_info [k].pad = pad;
525 arg_info [k + 1].pad = 0;
526 arg_info [k + 1].size = size;
528 arg_info [k + 1].offset = offset;
533 args_size += pad = (align - (args_size & (align - 1))) & (align - 1);
534 arg_info [k].pad = pad;
541 static const guchar cpuid_impl [] = {
542 0x55, /* push %ebp */
543 0x89, 0xe5, /* mov %esp,%ebp */
544 0x53, /* push %ebx */
545 0x8b, 0x45, 0x08, /* mov 0x8(%ebp),%eax */
546 0x0f, 0xa2, /* cpuid */
547 0x50, /* push %eax */
548 0x8b, 0x45, 0x10, /* mov 0x10(%ebp),%eax */
549 0x89, 0x18, /* mov %ebx,(%eax) */
550 0x8b, 0x45, 0x14, /* mov 0x14(%ebp),%eax */
551 0x89, 0x08, /* mov %ecx,(%eax) */
552 0x8b, 0x45, 0x18, /* mov 0x18(%ebp),%eax */
553 0x89, 0x10, /* mov %edx,(%eax) */
555 0x8b, 0x55, 0x0c, /* mov 0xc(%ebp),%edx */
556 0x89, 0x02, /* mov %eax,(%edx) */
562 typedef void (*CpuidFunc) (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx);
565 cpuid (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx)
569 __asm__ __volatile__ (
572 "movl %%eax, %%edx\n"
573 "xorl $0x200000, %%eax\n"
578 "xorl %%edx, %%eax\n"
579 "andl $0x200000, %%eax\n"
601 /* Have to use the code manager to get around WinXP DEP */
602 static CpuidFunc func = NULL;
605 ptr = mono_global_codeman_reserve (sizeof (cpuid_impl));
606 memcpy (ptr, cpuid_impl, sizeof (cpuid_impl));
607 func = (CpuidFunc)ptr;
609 func (id, p_eax, p_ebx, p_ecx, p_edx);
612 * We use this approach because of issues with gcc and pic code, see:
613 * http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=7329
614 __asm__ __volatile__ ("cpuid"
615 : "=a" (*p_eax), "=b" (*p_ebx), "=c" (*p_ecx), "=d" (*p_edx)
624 * Initialize the cpu to execute managed code.
627 mono_arch_cpu_init (void)
629 /* spec compliance requires running with double precision */
633 __asm__ __volatile__ ("fnstcw %0\n": "=m" (fpcw));
634 fpcw &= ~X86_FPCW_PRECC_MASK;
635 fpcw |= X86_FPCW_PREC_DOUBLE;
636 __asm__ __volatile__ ("fldcw %0\n": : "m" (fpcw));
637 __asm__ __volatile__ ("fnstcw %0\n": "=m" (fpcw));
639 _control87 (_PC_53, MCW_PC);
644 * Initialize architecture specific code.
647 mono_arch_init (void)
649 InitializeCriticalSection (&mini_arch_mutex);
653 * Cleanup architecture specific code.
656 mono_arch_cleanup (void)
658 DeleteCriticalSection (&mini_arch_mutex);
662 * This function returns the optimizations supported on this cpu.
665 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
667 int eax, ebx, ecx, edx;
671 /* Feature Flags function, flags returned in EDX. */
672 if (cpuid (1, &eax, &ebx, &ecx, &edx)) {
673 if (edx & (1 << 15)) {
674 opts |= MONO_OPT_CMOV;
676 opts |= MONO_OPT_FCMOV;
678 *exclude_mask |= MONO_OPT_FCMOV;
680 *exclude_mask |= MONO_OPT_CMOV;
682 opts |= MONO_OPT_SSE2;
684 *exclude_mask |= MONO_OPT_SSE2;
686 #ifdef MONO_ARCH_SIMD_INTRINSICS
687 /*SIMD intrinsics require at least SSE2.*/
688 if (!(opts & MONO_OPT_SSE2))
689 *exclude_mask |= MONO_OPT_SIMD;
696 * This function test for all SSE functions supported.
698 * Returns a bitmask corresponding to all supported versions.
700 * TODO detect other versions like SSE4a.
703 mono_arch_cpu_enumerate_simd_versions (void)
705 int eax, ebx, ecx, edx;
706 guint32 sse_opts = 0;
708 if (cpuid (1, &eax, &ebx, &ecx, &edx)) {
710 sse_opts |= 1 << SIMD_VERSION_SSE1;
712 sse_opts |= 1 << SIMD_VERSION_SSE2;
714 sse_opts |= 1 << SIMD_VERSION_SSE3;
716 sse_opts |= 1 << SIMD_VERSION_SSSE3;
718 sse_opts |= 1 << SIMD_VERSION_SSE41;
720 sse_opts |= 1 << SIMD_VERSION_SSE42;
726 * Determine whenever the trap whose info is in SIGINFO is caused by
730 mono_arch_is_int_overflow (void *sigctx, void *info)
735 mono_arch_sigctx_to_monoctx (sigctx, &ctx);
737 ip = (guint8*)ctx.eip;
739 if ((ip [0] == 0xf7) && (x86_modrm_mod (ip [1]) == 0x3) && (x86_modrm_reg (ip [1]) == 0x7)) {
743 switch (x86_modrm_rm (ip [1])) {
763 g_assert_not_reached ();
775 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
780 for (i = 0; i < cfg->num_varinfo; i++) {
781 MonoInst *ins = cfg->varinfo [i];
782 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
785 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
788 if ((ins->flags & (MONO_INST_IS_DEAD|MONO_INST_VOLATILE|MONO_INST_INDIRECT)) ||
789 (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
792 /* we dont allocate I1 to registers because there is no simply way to sign extend
793 * 8bit quantities in caller saved registers on x86 */
794 if (mono_is_regsize_var (ins->inst_vtype) && (ins->inst_vtype->type != MONO_TYPE_I1)) {
795 g_assert (MONO_VARINFO (cfg, i)->reg == -1);
796 g_assert (i == vmv->idx);
797 vars = g_list_prepend (vars, vmv);
801 vars = mono_varlist_sort (cfg, vars, 0);
807 mono_arch_get_global_int_regs (MonoCompile *cfg)
811 /* we can use 3 registers for global allocation */
812 regs = g_list_prepend (regs, (gpointer)X86_EBX);
813 regs = g_list_prepend (regs, (gpointer)X86_ESI);
814 regs = g_list_prepend (regs, (gpointer)X86_EDI);
820 * mono_arch_regalloc_cost:
822 * Return the cost, in number of memory references, of the action of
823 * allocating the variable VMV into a register during global register
827 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
829 MonoInst *ins = cfg->varinfo [vmv->idx];
831 if (cfg->method->save_lmf)
832 /* The register is already saved */
833 return (ins->opcode == OP_ARG) ? 1 : 0;
835 /* push+pop+possible load if it is an argument */
836 return (ins->opcode == OP_ARG) ? 3 : 2;
840 * Set var information according to the calling convention. X86 version.
841 * The locals var stuff should most likely be split in another method.
844 mono_arch_allocate_vars (MonoCompile *cfg)
846 MonoMethodSignature *sig;
847 MonoMethodHeader *header;
849 guint32 locals_stack_size, locals_stack_align;
854 header = mono_method_get_header (cfg->method);
855 sig = mono_method_signature (cfg->method);
857 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
859 cfg->frame_reg = X86_EBP;
862 /* Reserve space to save LMF and caller saved registers */
864 if (cfg->method->save_lmf) {
865 offset += sizeof (MonoLMF);
867 if (cfg->used_int_regs & (1 << X86_EBX)) {
871 if (cfg->used_int_regs & (1 << X86_EDI)) {
875 if (cfg->used_int_regs & (1 << X86_ESI)) {
880 switch (cinfo->ret.storage) {
881 case ArgValuetypeInReg:
882 /* Allocate a local to hold the result, the epilog will copy it to the correct place */
884 cfg->ret->opcode = OP_REGOFFSET;
885 cfg->ret->inst_basereg = X86_EBP;
886 cfg->ret->inst_offset = - offset;
892 /* Allocate locals */
893 offsets = mono_allocate_stack_slots (cfg, &locals_stack_size, &locals_stack_align);
894 if (locals_stack_align) {
895 offset += (locals_stack_align - 1);
896 offset &= ~(locals_stack_align - 1);
898 for (i = cfg->locals_start; i < cfg->num_varinfo; i++) {
899 if (offsets [i] != -1) {
900 MonoInst *inst = cfg->varinfo [i];
901 inst->opcode = OP_REGOFFSET;
902 inst->inst_basereg = X86_EBP;
903 inst->inst_offset = - (offset + offsets [i]);
904 //printf ("allocated local %d to ", i); mono_print_tree_nl (inst);
907 offset += locals_stack_size;
911 * Allocate arguments+return value
914 switch (cinfo->ret.storage) {
916 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
918 * In the new IR, the cfg->vret_addr variable represents the
919 * vtype return value.
921 cfg->vret_addr->opcode = OP_REGOFFSET;
922 cfg->vret_addr->inst_basereg = cfg->frame_reg;
923 cfg->vret_addr->inst_offset = cinfo->ret.offset + ARGS_OFFSET;
924 if (G_UNLIKELY (cfg->verbose_level > 1)) {
925 printf ("vret_addr =");
926 mono_print_ins (cfg->vret_addr);
929 cfg->ret->opcode = OP_REGOFFSET;
930 cfg->ret->inst_basereg = X86_EBP;
931 cfg->ret->inst_offset = cinfo->ret.offset + ARGS_OFFSET;
934 case ArgValuetypeInReg:
937 cfg->ret->opcode = OP_REGVAR;
938 cfg->ret->inst_c0 = cinfo->ret.reg;
939 cfg->ret->dreg = cinfo->ret.reg;
942 case ArgOnFloatFpStack:
943 case ArgOnDoubleFpStack:
946 g_assert_not_reached ();
949 if (sig->call_convention == MONO_CALL_VARARG) {
950 g_assert (cinfo->sig_cookie.storage == ArgOnStack);
951 cfg->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
954 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
955 ArgInfo *ainfo = &cinfo->args [i];
956 inst = cfg->args [i];
957 if (inst->opcode != OP_REGVAR) {
958 inst->opcode = OP_REGOFFSET;
959 inst->inst_basereg = X86_EBP;
961 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
964 offset += (MONO_ARCH_FRAME_ALIGNMENT - 1);
965 offset &= ~(MONO_ARCH_FRAME_ALIGNMENT - 1);
967 cfg->stack_offset = offset;
971 mono_arch_create_vars (MonoCompile *cfg)
973 MonoMethodSignature *sig;
976 sig = mono_method_signature (cfg->method);
978 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
980 if (cinfo->ret.storage == ArgValuetypeInReg)
981 cfg->ret_var_is_local = TRUE;
982 if ((cinfo->ret.storage != ArgValuetypeInReg) && MONO_TYPE_ISSTRUCT (sig->ret)) {
983 cfg->vret_addr = mono_compile_create_var (cfg, &mono_defaults.int_class->byval_arg, OP_ARG);
988 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call)
991 MonoMethodSignature *tmp_sig;
994 /* FIXME: Add support for signature tokens to AOT */
995 cfg->disable_aot = TRUE;
996 MONO_INST_NEW (cfg, arg, OP_OUTARG);
999 * mono_ArgIterator_Setup assumes the signature cookie is
1000 * passed first and all the arguments which were before it are
1001 * passed on the stack after the signature. So compensate by
1002 * passing a different signature.
1004 tmp_sig = mono_metadata_signature_dup (call->signature);
1005 tmp_sig->param_count -= call->signature->sentinelpos;
1006 tmp_sig->sentinelpos = 0;
1007 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1009 MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
1010 sig_arg->inst_p0 = tmp_sig;
1012 arg->inst_left = sig_arg;
1013 arg->type = STACK_PTR;
1014 /* prepend, so they get reversed */
1015 arg->next = call->out_args;
1016 call->out_args = arg;
1020 * It is expensive to adjust esp for each individual fp argument pushed on the stack
1021 * so we try to do it just once when we have multiple fp arguments in a row.
1022 * We don't use this mechanism generally because for int arguments the generated code
1023 * is slightly bigger and new generation cpus optimize away the dependency chains
1024 * created by push instructions on the esp value.
1025 * fp_arg_setup is the first argument in the execution sequence where the esp register
1029 collect_fp_stack_space (MonoMethodSignature *sig, int start_arg, int *fp_arg_setup)
1034 for (; start_arg < sig->param_count; ++start_arg) {
1035 t = mini_type_get_underlying_type (NULL, sig->params [start_arg]);
1036 if (!t->byref && t->type == MONO_TYPE_R8) {
1037 fp_space += sizeof (double);
1038 *fp_arg_setup = start_arg;
1047 * take the arguments and generate the arch-specific
1048 * instructions to properly call the function in call.
1049 * This includes pushing, moving arguments to the right register
1053 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
1055 MonoMethodSignature *sig;
1058 int sentinelpos = 0;
1059 int fp_args_space = 0, fp_args_offset = 0, fp_arg_setup = -1;
1061 sig = call->signature;
1062 n = sig->param_count + sig->hasthis;
1064 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
1066 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG))
1067 sentinelpos = sig->sentinelpos + (is_virtual ? 1 : 0);
1069 for (i = 0; i < n; ++i) {
1070 ArgInfo *ainfo = cinfo->args + i;
1072 /* Emit the signature cookie just before the implicit arguments */
1073 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sentinelpos)) {
1074 emit_sig_cookie (cfg, call);
1077 if (is_virtual && i == 0) {
1078 /* the argument will be attached to the call instrucion */
1079 in = call->args [i];
1083 if (i >= sig->hasthis)
1084 t = sig->params [i - sig->hasthis];
1086 t = &mono_defaults.int_class->byval_arg;
1087 t = mini_type_get_underlying_type (cfg->generic_sharing_context, t);
1089 MONO_INST_NEW (cfg, arg, OP_OUTARG);
1090 in = call->args [i];
1091 arg->cil_code = in->cil_code;
1092 arg->inst_left = in;
1093 arg->type = in->type;
1094 /* prepend, so they get reversed */
1095 arg->next = call->out_args;
1096 call->out_args = arg;
1098 if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(t))) {
1103 if (t->type == MONO_TYPE_TYPEDBYREF) {
1104 size = sizeof (MonoTypedRef);
1105 align = sizeof (gpointer);
1108 size = mini_type_stack_size_full (cfg->generic_sharing_context, &in->klass->byval_arg, &ialign, sig->pinvoke);
1110 arg->opcode = OP_OUTARG_VT;
1111 arg->klass = in->klass;
1112 arg->backend.is_pinvoke = sig->pinvoke;
1113 arg->inst_imm = size;
1116 switch (ainfo->storage) {
1118 arg->opcode = OP_OUTARG;
1120 if (t->type == MONO_TYPE_R4) {
1121 arg->opcode = OP_OUTARG_R4;
1122 } else if (t->type == MONO_TYPE_R8) {
1123 arg->opcode = OP_OUTARG_R8;
1124 /* we store in the upper bits of backen.arg_info the needed
1125 * esp adjustment and in the lower bits the offset from esp
1126 * where the arg needs to be stored
1128 if (!fp_args_space) {
1129 fp_args_space = collect_fp_stack_space (sig, i - sig->hasthis, &fp_arg_setup);
1130 fp_args_offset = fp_args_space;
1132 arg->backend.arg_info = fp_args_space - fp_args_offset;
1133 fp_args_offset -= sizeof (double);
1134 if (i - sig->hasthis == fp_arg_setup) {
1135 arg->backend.arg_info |= fp_args_space << 16;
1137 if (fp_args_offset == 0) {
1138 /* the allocated esp stack is finished:
1139 * prepare for an eventual second run of fp args
1147 g_assert_not_reached ();
1153 /* Handle the case where there are no implicit arguments */
1154 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sentinelpos)) {
1155 emit_sig_cookie (cfg, call);
1158 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1159 if (cinfo->ret.storage == ArgValuetypeInReg) {
1160 MonoInst *zero_inst;
1162 * After the call, the struct is in registers, but needs to be saved to the memory pointed
1163 * to by vt_arg in this_vret_args. This means that vt_arg needs to be saved somewhere
1164 * before calling the function. So we add a dummy instruction to represent pushing the
1165 * struct return address to the stack. The return address will be saved to this stack slot
1166 * by the code emitted in this_vret_args.
1168 MONO_INST_NEW (cfg, arg, OP_OUTARG);
1169 MONO_INST_NEW (cfg, zero_inst, OP_ICONST);
1170 zero_inst->inst_p0 = 0;
1171 arg->inst_left = zero_inst;
1172 arg->type = STACK_PTR;
1173 /* prepend, so they get reversed */
1174 arg->next = call->out_args;
1175 call->out_args = arg;
1178 /* if the function returns a struct, the called method already does a ret $0x4 */
1179 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret))
1180 cinfo->stack_usage -= 4;
1183 call->stack_usage = cinfo->stack_usage;
1185 #if defined(__APPLE__)
1186 if (cinfo->need_stack_align) {
1187 MONO_INST_NEW (cfg, arg, OP_X86_OUTARG_ALIGN_STACK);
1188 arg->inst_c0 = cinfo->stack_align_amount;
1189 arg->next = call->out_args;
1190 call->out_args = arg;
1198 emit_sig_cookie2 (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo)
1200 MonoMethodSignature *tmp_sig;
1202 /* FIXME: Add support for signature tokens to AOT */
1203 cfg->disable_aot = TRUE;
1206 * mono_ArgIterator_Setup assumes the signature cookie is
1207 * passed first and all the arguments which were before it are
1208 * passed on the stack after the signature. So compensate by
1209 * passing a different signature.
1211 tmp_sig = mono_metadata_signature_dup (call->signature);
1212 tmp_sig->param_count -= call->signature->sentinelpos;
1213 tmp_sig->sentinelpos = 0;
1214 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1216 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_X86_PUSH_IMM, -1, -1, tmp_sig);
1220 mono_arch_emit_call (MonoCompile *cfg, MonoCallInst *call)
1223 MonoMethodSignature *sig;
1226 int sentinelpos = 0;
1228 sig = call->signature;
1229 n = sig->param_count + sig->hasthis;
1231 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
1233 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG))
1234 sentinelpos = sig->sentinelpos + (sig->hasthis ? 1 : 0);
1236 #if defined(__APPLE__)
1237 if (cinfo->need_stack_align) {
1238 MONO_INST_NEW (cfg, arg, OP_SUB_IMM);
1239 arg->dreg = X86_ESP;
1240 arg->sreg1 = X86_ESP;
1241 arg->inst_imm = cinfo->stack_align_amount;
1242 MONO_ADD_INS (cfg->cbb, arg);
1246 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1249 if (cinfo->ret.storage == ArgValuetypeInReg) {
1250 if (cinfo->ret.pair_storage [0] == ArgInIReg && cinfo->ret.pair_storage [1] == ArgNone) {
1252 * Tell the JIT to use a more efficient calling convention: call using
1253 * OP_CALL, compute the result location after the call, and save the
1256 call->vret_in_reg = TRUE;
1259 * The valuetype is in EAX:EDX after the call, needs to be copied to
1260 * the stack. Save the address here, so the call instruction can
1263 MONO_INST_NEW (cfg, vtarg, OP_X86_PUSH);
1264 vtarg->sreg1 = call->vret_var->dreg;
1265 MONO_ADD_INS (cfg->cbb, vtarg);
1270 /* Handle the case where there are no implicit arguments */
1271 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sentinelpos)) {
1272 emit_sig_cookie2 (cfg, call, cinfo);
1275 /* Arguments are pushed in the reverse order */
1276 for (i = n - 1; i >= 0; i --) {
1277 ArgInfo *ainfo = cinfo->args + i;
1280 if (i >= sig->hasthis)
1281 t = sig->params [i - sig->hasthis];
1283 t = &mono_defaults.int_class->byval_arg;
1284 t = mini_type_get_underlying_type (cfg->generic_sharing_context, t);
1286 MONO_INST_NEW (cfg, arg, OP_X86_PUSH);
1288 in = call->args [i];
1289 arg->cil_code = in->cil_code;
1290 arg->sreg1 = in->dreg;
1291 arg->type = in->type;
1293 g_assert (in->dreg != -1);
1295 if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(t))) {
1299 g_assert (in->klass);
1301 if (t->type == MONO_TYPE_TYPEDBYREF) {
1302 size = sizeof (MonoTypedRef);
1303 align = sizeof (gpointer);
1306 size = mini_type_stack_size_full (cfg->generic_sharing_context, &in->klass->byval_arg, &align, sig->pinvoke);
1310 arg->opcode = OP_OUTARG_VT;
1311 arg->sreg1 = in->dreg;
1312 arg->klass = in->klass;
1313 arg->backend.size = size;
1315 MONO_ADD_INS (cfg->cbb, arg);
1319 switch (ainfo->storage) {
1321 arg->opcode = OP_X86_PUSH;
1323 if (t->type == MONO_TYPE_R4) {
1324 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
1325 arg->opcode = OP_STORER4_MEMBASE_REG;
1326 arg->inst_destbasereg = X86_ESP;
1327 arg->inst_offset = 0;
1328 } else if (t->type == MONO_TYPE_R8) {
1329 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
1330 arg->opcode = OP_STORER8_MEMBASE_REG;
1331 arg->inst_destbasereg = X86_ESP;
1332 arg->inst_offset = 0;
1333 } else if (t->type == MONO_TYPE_I8 || t->type == MONO_TYPE_U8) {
1335 MONO_EMIT_NEW_UNALU (cfg, OP_X86_PUSH, -1, in->dreg + 2);
1340 g_assert_not_reached ();
1343 MONO_ADD_INS (cfg->cbb, arg);
1346 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sentinelpos)) {
1347 /* Emit the signature cookie just before the implicit arguments */
1348 emit_sig_cookie2 (cfg, call, cinfo);
1352 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1355 if (cinfo->ret.storage == ArgValuetypeInReg) {
1358 else if (cinfo->ret.storage == ArgInIReg) {
1360 /* The return address is passed in a register */
1361 MONO_INST_NEW (cfg, vtarg, OP_MOVE);
1362 vtarg->sreg1 = call->inst.dreg;
1363 vtarg->dreg = mono_regstate_next_int (cfg->rs);
1364 MONO_ADD_INS (cfg->cbb, vtarg);
1366 mono_call_inst_add_outarg_reg (cfg, call, vtarg->dreg, cinfo->ret.reg, FALSE);
1369 MONO_INST_NEW (cfg, vtarg, OP_X86_PUSH);
1370 vtarg->type = STACK_MP;
1371 vtarg->sreg1 = call->vret_var->dreg;
1372 MONO_ADD_INS (cfg->cbb, vtarg);
1375 /* if the function returns a struct, the called method already does a ret $0x4 */
1376 cinfo->stack_usage -= 4;
1379 call->stack_usage = cinfo->stack_usage;
1383 mono_arch_emit_outarg_vt (MonoCompile *cfg, MonoInst *ins, MonoInst *src)
1386 int size = ins->backend.size;
1389 MONO_INST_NEW (cfg, arg, OP_X86_PUSH_MEMBASE);
1390 arg->sreg1 = src->dreg;
1392 MONO_ADD_INS (cfg->cbb, arg);
1393 } else if (size <= 20) {
1394 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SUB_IMM, X86_ESP, X86_ESP, ALIGN_TO (size, 4));
1395 mini_emit_memcpy2 (cfg, X86_ESP, 0, src->dreg, 0, size, 4);
1397 MONO_INST_NEW (cfg, arg, OP_X86_PUSH_OBJ);
1398 arg->inst_basereg = src->dreg;
1399 arg->inst_offset = 0;
1400 arg->inst_imm = size;
1402 MONO_ADD_INS (cfg->cbb, arg);
1407 mono_arch_emit_setret (MonoCompile *cfg, MonoMethod *method, MonoInst *val)
1409 MonoType *ret = mini_type_get_underlying_type (cfg->generic_sharing_context, mono_method_signature (method)->ret);
1412 if (ret->type == MONO_TYPE_R4) {
1415 } else if (ret->type == MONO_TYPE_R8) {
1418 } else if (ret->type == MONO_TYPE_I8 || ret->type == MONO_TYPE_U8) {
1419 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, X86_EAX, val->dreg + 1);
1420 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, X86_EDX, val->dreg + 2);
1425 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg, val->dreg);
1429 * Allow tracing to work with this interface (with an optional argument)
1432 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
1437 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1440 /* if some args are passed in registers, we need to save them here */
1441 x86_push_reg (code, X86_EBP);
1443 if (cfg->compile_aot) {
1444 x86_push_imm (code, cfg->method);
1445 x86_mov_reg_imm (code, X86_EAX, func);
1446 x86_call_reg (code, X86_EAX);
1448 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, cfg->method);
1449 x86_push_imm (code, cfg->method);
1450 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
1451 x86_call_code (code, 0);
1454 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 16);
1456 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1471 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
1474 int arg_size = 0, save_mode = SAVE_NONE;
1475 MonoMethod *method = cfg->method;
1477 switch (mini_type_get_underlying_type (cfg->generic_sharing_context, mono_method_signature (method)->ret)->type) {
1478 case MONO_TYPE_VOID:
1479 /* special case string .ctor icall */
1480 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
1481 save_mode = SAVE_EAX;
1483 save_mode = SAVE_NONE;
1487 save_mode = SAVE_EAX_EDX;
1491 save_mode = SAVE_FP;
1493 case MONO_TYPE_GENERICINST:
1494 if (!mono_type_generic_inst_is_valuetype (mono_method_signature (method)->ret)) {
1495 save_mode = SAVE_EAX;
1499 case MONO_TYPE_VALUETYPE:
1500 save_mode = SAVE_STRUCT;
1503 save_mode = SAVE_EAX;
1507 switch (save_mode) {
1509 x86_push_reg (code, X86_EDX);
1510 x86_push_reg (code, X86_EAX);
1511 if (enable_arguments) {
1512 x86_push_reg (code, X86_EDX);
1513 x86_push_reg (code, X86_EAX);
1518 x86_push_reg (code, X86_EAX);
1519 if (enable_arguments) {
1520 x86_push_reg (code, X86_EAX);
1525 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1526 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1527 if (enable_arguments) {
1528 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1529 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1534 if (enable_arguments) {
1535 x86_push_membase (code, X86_EBP, 8);
1544 if (cfg->compile_aot) {
1545 x86_push_imm (code, method);
1546 x86_mov_reg_imm (code, X86_EAX, func);
1547 x86_call_reg (code, X86_EAX);
1549 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, method);
1550 x86_push_imm (code, method);
1551 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
1552 x86_call_code (code, 0);
1554 x86_alu_reg_imm (code, X86_ADD, X86_ESP, arg_size + 4);
1556 switch (save_mode) {
1558 x86_pop_reg (code, X86_EAX);
1559 x86_pop_reg (code, X86_EDX);
1562 x86_pop_reg (code, X86_EAX);
1565 x86_fld_membase (code, X86_ESP, 0, TRUE);
1566 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1576 #define EMIT_COND_BRANCH(ins,cond,sign) \
1577 if (ins->flags & MONO_INST_BRLABEL) { \
1578 if (ins->inst_i0->inst_c0) { \
1579 x86_branch (code, cond, cfg->native_code + ins->inst_i0->inst_c0, sign); \
1581 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
1582 if ((cfg->opt & MONO_OPT_BRANCH) && \
1583 x86_is_imm8 (ins->inst_i0->inst_c1 - cpos)) \
1584 x86_branch8 (code, cond, 0, sign); \
1586 x86_branch32 (code, cond, 0, sign); \
1589 if (ins->inst_true_bb->native_offset) { \
1590 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
1592 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1593 if ((cfg->opt & MONO_OPT_BRANCH) && \
1594 x86_is_imm8 (ins->inst_true_bb->max_offset - cpos)) \
1595 x86_branch8 (code, cond, 0, sign); \
1597 x86_branch32 (code, cond, 0, sign); \
1602 * Emit an exception if condition is fail and
1603 * if possible do a directly branch to target
1605 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
1607 MonoInst *tins = mono_branch_optimize_exception_target (cfg, bb, exc_name); \
1608 if (tins == NULL) { \
1609 mono_add_patch_info (cfg, code - cfg->native_code, \
1610 MONO_PATCH_INFO_EXC, exc_name); \
1611 x86_branch32 (code, cond, 0, signed); \
1613 EMIT_COND_BRANCH (tins, cond, signed); \
1617 #define EMIT_FPCOMPARE(code) do { \
1618 x86_fcompp (code); \
1619 x86_fnstsw (code); \
1624 emit_call (MonoCompile *cfg, guint8 *code, guint32 patch_type, gconstpointer data)
1626 mono_add_patch_info (cfg, code - cfg->native_code, patch_type, data);
1627 x86_call_code (code, 0);
1632 #define INST_IGNORES_CFLAGS(opcode) (!(((opcode) == OP_ADC) || ((opcode) == OP_IADC) || ((opcode) == OP_ADC_IMM) || ((opcode) == OP_IADC_IMM) || ((opcode) == OP_SBB) || ((opcode) == OP_ISBB) || ((opcode) == OP_SBB_IMM) || ((opcode) == OP_ISBB_IMM)))
1635 * mono_peephole_pass_1:
1637 * Perform peephole opts which should/can be performed before local regalloc
1640 mono_arch_peephole_pass_1 (MonoCompile *cfg, MonoBasicBlock *bb)
1644 MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
1645 MonoInst *last_ins = ins->prev;
1647 switch (ins->opcode) {
1650 if ((ins->sreg1 < MONO_MAX_IREGS) && (ins->dreg >= MONO_MAX_IREGS)) {
1652 * X86_LEA is like ADD, but doesn't have the
1653 * sreg1==dreg restriction.
1655 ins->opcode = OP_X86_LEA_MEMBASE;
1656 ins->inst_basereg = ins->sreg1;
1657 } else if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1658 ins->opcode = OP_X86_INC_REG;
1662 if ((ins->sreg1 < MONO_MAX_IREGS) && (ins->dreg >= MONO_MAX_IREGS)) {
1663 ins->opcode = OP_X86_LEA_MEMBASE;
1664 ins->inst_basereg = ins->sreg1;
1665 ins->inst_imm = -ins->inst_imm;
1666 } else if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1667 ins->opcode = OP_X86_DEC_REG;
1669 case OP_COMPARE_IMM:
1670 case OP_ICOMPARE_IMM:
1671 /* OP_COMPARE_IMM (reg, 0)
1673 * OP_X86_TEST_NULL (reg)
1676 ins->opcode = OP_X86_TEST_NULL;
1678 case OP_X86_COMPARE_MEMBASE_IMM:
1680 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1681 * OP_X86_COMPARE_MEMBASE_IMM offset(basereg), imm
1683 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1684 * OP_COMPARE_IMM reg, imm
1686 * Note: if imm = 0 then OP_COMPARE_IMM replaced with OP_X86_TEST_NULL
1688 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG) &&
1689 ins->inst_basereg == last_ins->inst_destbasereg &&
1690 ins->inst_offset == last_ins->inst_offset) {
1691 ins->opcode = OP_COMPARE_IMM;
1692 ins->sreg1 = last_ins->sreg1;
1694 /* check if we can remove cmp reg,0 with test null */
1696 ins->opcode = OP_X86_TEST_NULL;
1700 case OP_X86_PUSH_MEMBASE:
1701 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG ||
1702 last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1703 ins->inst_basereg == last_ins->inst_destbasereg &&
1704 ins->inst_offset == last_ins->inst_offset) {
1705 ins->opcode = OP_X86_PUSH;
1706 ins->sreg1 = last_ins->sreg1;
1711 mono_peephole_ins (bb, ins);
1716 mono_arch_peephole_pass_2 (MonoCompile *cfg, MonoBasicBlock *bb)
1720 MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
1721 switch (ins->opcode) {
1723 /* reg = 0 -> XOR (reg, reg) */
1724 /* XOR sets cflags on x86, so we cant do it always */
1725 if (ins->inst_c0 == 0 && (!ins->next || (ins->next && INST_IGNORES_CFLAGS (ins->next->opcode)))) {
1728 ins->opcode = OP_IXOR;
1729 ins->sreg1 = ins->dreg;
1730 ins->sreg2 = ins->dreg;
1733 * Convert succeeding STORE_MEMBASE_IMM 0 ins to STORE_MEMBASE_REG
1734 * since it takes 3 bytes instead of 7.
1736 for (ins2 = ins->next; ins2; ins2 = ins2->next) {
1737 if ((ins2->opcode == OP_STORE_MEMBASE_IMM) && (ins2->inst_imm == 0)) {
1738 ins2->opcode = OP_STORE_MEMBASE_REG;
1739 ins2->sreg1 = ins->dreg;
1741 else if ((ins2->opcode == OP_STOREI4_MEMBASE_IMM) && (ins2->inst_imm == 0)) {
1742 ins2->opcode = OP_STOREI4_MEMBASE_REG;
1743 ins2->sreg1 = ins->dreg;
1745 else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM)) {
1746 /* Continue iteration */
1755 if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1756 ins->opcode = OP_X86_INC_REG;
1760 if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1761 ins->opcode = OP_X86_DEC_REG;
1765 mono_peephole_ins (bb, ins);
1770 * mono_arch_lowering_pass:
1772 * Converts complex opcodes into simpler ones so that each IR instruction
1773 * corresponds to one machine instruction.
1776 mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1778 MonoInst *ins, *next;
1780 if (bb->max_vreg > cfg->rs->next_vreg)
1781 cfg->rs->next_vreg = bb->max_vreg;
1784 * FIXME: Need to add more instructions, but the current machine
1785 * description can't model some parts of the composite instructions like
1788 MONO_BB_FOR_EACH_INS_SAFE (bb, next, ins) {
1789 switch (ins->opcode) {
1792 case OP_IDIV_UN_IMM:
1793 case OP_IREM_UN_IMM:
1795 * Keep the cases where we could generated optimized code, otherwise convert
1796 * to the non-imm variant.
1798 if ((ins->opcode == OP_IREM_IMM) && mono_is_power_of_two (ins->inst_imm) >= 0)
1800 mono_decompose_op_imm (cfg, bb, ins);
1807 bb->max_vreg = cfg->rs->next_vreg;
1811 branch_cc_table [] = {
1812 X86_CC_EQ, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1813 X86_CC_NE, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1814 X86_CC_O, X86_CC_NO, X86_CC_C, X86_CC_NC
1817 /* Maps CMP_... constants to X86_CC_... constants */
1820 X86_CC_EQ, X86_CC_NE, X86_CC_LE, X86_CC_GE, X86_CC_LT, X86_CC_GT,
1821 X86_CC_LE, X86_CC_GE, X86_CC_LT, X86_CC_GT
1825 cc_signed_table [] = {
1826 TRUE, TRUE, TRUE, TRUE, TRUE, TRUE,
1827 FALSE, FALSE, FALSE, FALSE
1830 static unsigned char*
1831 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int size, gboolean is_signed)
1833 #define XMM_TEMP_REG 0
1834 /*This SSE2 optimization must not be done which OPT_SIMD in place as it clobbers xmm0.*/
1835 /*The xmm pass decomposes OP_FCONV_ ops anyway anyway.*/
1836 if (cfg->opt & MONO_OPT_SSE2 && size < 8 && !(cfg->opt & MONO_OPT_SIMD)) {
1837 /* optimize by assigning a local var for this use so we avoid
1838 * the stack manipulations */
1839 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1840 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1841 x86_movsd_reg_membase (code, XMM_TEMP_REG, X86_ESP, 0);
1842 x86_cvttsd2si (code, dreg, XMM_TEMP_REG);
1843 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1845 x86_widen_reg (code, dreg, dreg, is_signed, FALSE);
1847 x86_widen_reg (code, dreg, dreg, is_signed, TRUE);
1850 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
1851 x86_fnstcw_membase(code, X86_ESP, 0);
1852 x86_mov_reg_membase (code, dreg, X86_ESP, 0, 2);
1853 x86_alu_reg_imm (code, X86_OR, dreg, 0xc00);
1854 x86_mov_membase_reg (code, X86_ESP, 2, dreg, 2);
1855 x86_fldcw_membase (code, X86_ESP, 2);
1857 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1858 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
1859 x86_pop_reg (code, dreg);
1860 /* FIXME: need the high register
1861 * x86_pop_reg (code, dreg_high);
1864 x86_push_reg (code, X86_EAX); // SP = SP - 4
1865 x86_fist_pop_membase (code, X86_ESP, 0, FALSE);
1866 x86_pop_reg (code, dreg);
1868 x86_fldcw_membase (code, X86_ESP, 0);
1869 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
1872 x86_widen_reg (code, dreg, dreg, is_signed, FALSE);
1874 x86_widen_reg (code, dreg, dreg, is_signed, TRUE);
1878 static unsigned char*
1879 mono_emit_stack_alloc (guchar *code, MonoInst* tree)
1881 int sreg = tree->sreg1;
1882 int need_touch = FALSE;
1884 #if defined(PLATFORM_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
1893 * If requested stack size is larger than one page,
1894 * perform stack-touch operation
1897 * Generate stack probe code.
1898 * Under Windows, it is necessary to allocate one page at a time,
1899 * "touching" stack after each successful sub-allocation. This is
1900 * because of the way stack growth is implemented - there is a
1901 * guard page before the lowest stack page that is currently commited.
1902 * Stack normally grows sequentially so OS traps access to the
1903 * guard page and commits more pages when needed.
1905 x86_test_reg_imm (code, sreg, ~0xFFF);
1906 br[0] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1908 br[2] = code; /* loop */
1909 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
1910 x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
1913 * By the end of the loop, sreg2 is smaller than 0x1000, so the init routine
1914 * that follows only initializes the last part of the area.
1916 /* Same as the init code below with size==0x1000 */
1917 if (tree->flags & MONO_INST_INIT) {
1918 x86_push_reg (code, X86_EAX);
1919 x86_push_reg (code, X86_ECX);
1920 x86_push_reg (code, X86_EDI);
1921 x86_mov_reg_imm (code, X86_ECX, (0x1000 >> 2));
1922 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
1923 x86_lea_membase (code, X86_EDI, X86_ESP, 12);
1925 x86_prefix (code, X86_REP_PREFIX);
1927 x86_pop_reg (code, X86_EDI);
1928 x86_pop_reg (code, X86_ECX);
1929 x86_pop_reg (code, X86_EAX);
1932 x86_alu_reg_imm (code, X86_SUB, sreg, 0x1000);
1933 x86_alu_reg_imm (code, X86_CMP, sreg, 0x1000);
1934 br[3] = code; x86_branch8 (code, X86_CC_AE, 0, FALSE);
1935 x86_patch (br[3], br[2]);
1936 x86_test_reg_reg (code, sreg, sreg);
1937 br[4] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1938 x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1940 br[1] = code; x86_jump8 (code, 0);
1942 x86_patch (br[0], code);
1943 x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1944 x86_patch (br[1], code);
1945 x86_patch (br[4], code);
1948 x86_alu_reg_reg (code, X86_SUB, X86_ESP, tree->sreg1);
1950 if (tree->flags & MONO_INST_INIT) {
1952 if (tree->dreg != X86_EAX && sreg != X86_EAX) {
1953 x86_push_reg (code, X86_EAX);
1956 if (tree->dreg != X86_ECX && sreg != X86_ECX) {
1957 x86_push_reg (code, X86_ECX);
1960 if (tree->dreg != X86_EDI && sreg != X86_EDI) {
1961 x86_push_reg (code, X86_EDI);
1965 x86_shift_reg_imm (code, X86_SHR, sreg, 2);
1966 if (sreg != X86_ECX)
1967 x86_mov_reg_reg (code, X86_ECX, sreg, 4);
1968 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
1970 x86_lea_membase (code, X86_EDI, X86_ESP, offset);
1972 x86_prefix (code, X86_REP_PREFIX);
1975 if (tree->dreg != X86_EDI && sreg != X86_EDI)
1976 x86_pop_reg (code, X86_EDI);
1977 if (tree->dreg != X86_ECX && sreg != X86_ECX)
1978 x86_pop_reg (code, X86_ECX);
1979 if (tree->dreg != X86_EAX && sreg != X86_EAX)
1980 x86_pop_reg (code, X86_EAX);
1987 emit_move_return_value (MonoCompile *cfg, MonoInst *ins, guint8 *code)
1992 /* Move return value to the target register */
1993 switch (ins->opcode) {
1996 case OP_CALL_MEMBASE:
1997 if (ins->dreg != X86_EAX)
1998 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
2002 case OP_VCALL_MEMBASE:
2005 case OP_VCALL2_MEMBASE:
2006 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, ((MonoCallInst*)ins)->signature, FALSE);
2007 if (cinfo->ret.storage == ArgValuetypeInReg) {
2008 /* Pop the destination address from the stack */
2009 x86_pop_reg (code, X86_ECX);
2011 for (quad = 0; quad < 2; quad ++) {
2012 switch (cinfo->ret.pair_storage [quad]) {
2014 g_assert (cinfo->ret.pair_regs [quad] != X86_ECX);
2015 x86_mov_membase_reg (code, X86_ECX, (quad * sizeof (gpointer)), cinfo->ret.pair_regs [quad], sizeof (gpointer));
2020 g_assert_not_reached ();
2026 MonoCallInst *call = (MonoCallInst*)ins;
2027 if (call->method && !mono_method_signature (call->method)->ret->byref && mono_method_signature (call->method)->ret->type == MONO_TYPE_R4) {
2028 /* Avoid some precision issues by saving/reloading the return value */
2029 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
2030 x86_fst_membase (code, X86_ESP, 0, FALSE, TRUE);
2031 x86_fld_membase (code, X86_ESP, 0, FALSE);
2032 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
2045 * @code: buffer to store code to
2046 * @dreg: hard register where to place the result
2047 * @tls_offset: offset info
2049 * emit_tls_get emits in @code the native code that puts in the dreg register
2050 * the item in the thread local storage identified by tls_offset.
2052 * Returns: a pointer to the end of the stored code
2055 emit_tls_get (guint8* code, int dreg, int tls_offset)
2057 #ifdef PLATFORM_WIN32
2059 * See the Under the Hood article in the May 1996 issue of Microsoft Systems
2060 * Journal and/or a disassembly of the TlsGet () function.
2062 g_assert (tls_offset < 64);
2063 x86_prefix (code, X86_FS_PREFIX);
2064 x86_mov_reg_mem (code, dreg, 0x18, 4);
2065 /* Dunno what this does but TlsGetValue () contains it */
2066 x86_alu_membase_imm (code, X86_AND, dreg, 0x34, 0);
2067 x86_mov_reg_membase (code, dreg, dreg, 3600 + (tls_offset * 4), 4);
2069 if (optimize_for_xen) {
2070 x86_prefix (code, X86_GS_PREFIX);
2071 x86_mov_reg_mem (code, dreg, 0, 4);
2072 x86_mov_reg_membase (code, dreg, dreg, tls_offset, 4);
2074 x86_prefix (code, X86_GS_PREFIX);
2075 x86_mov_reg_mem (code, dreg, tls_offset, 4);
2082 * emit_load_volatile_arguments:
2084 * Load volatile arguments from the stack to the original input registers.
2085 * Required before a tail call.
2088 emit_load_volatile_arguments (MonoCompile *cfg, guint8 *code)
2090 MonoMethod *method = cfg->method;
2091 MonoMethodSignature *sig;
2096 /* FIXME: Generate intermediate code instead */
2098 sig = mono_method_signature (method);
2100 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
2102 /* This is the opposite of the code in emit_prolog */
2104 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
2105 ArgInfo *ainfo = cinfo->args + i;
2107 inst = cfg->args [i];
2109 if (sig->hasthis && (i == 0))
2110 arg_type = &mono_defaults.object_class->byval_arg;
2112 arg_type = sig->params [i - sig->hasthis];
2115 * On x86, the arguments are either in their original stack locations, or in
2118 if (inst->opcode == OP_REGVAR) {
2119 g_assert (ainfo->storage == ArgOnStack);
2121 x86_mov_membase_reg (code, X86_EBP, inst->inst_offset, inst->dreg, 4);
2128 #define REAL_PRINT_REG(text,reg) \
2129 mono_assert (reg >= 0); \
2130 x86_push_reg (code, X86_EAX); \
2131 x86_push_reg (code, X86_EDX); \
2132 x86_push_reg (code, X86_ECX); \
2133 x86_push_reg (code, reg); \
2134 x86_push_imm (code, reg); \
2135 x86_push_imm (code, text " %d %p\n"); \
2136 x86_mov_reg_imm (code, X86_EAX, printf); \
2137 x86_call_reg (code, X86_EAX); \
2138 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 3*4); \
2139 x86_pop_reg (code, X86_ECX); \
2140 x86_pop_reg (code, X86_EDX); \
2141 x86_pop_reg (code, X86_EAX);
2143 /* benchmark and set based on cpu */
2144 #define LOOP_ALIGNMENT 8
2145 #define bb_is_loop_start(bb) ((bb)->loop_body_start && (bb)->nesting)
2148 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2153 guint8 *code = cfg->native_code + cfg->code_len;
2156 if (cfg->opt & MONO_OPT_LOOP) {
2157 int pad, align = LOOP_ALIGNMENT;
2158 /* set alignment depending on cpu */
2159 if (bb_is_loop_start (bb) && (pad = (cfg->code_len & (align - 1)))) {
2161 /*g_print ("adding %d pad at %x to loop in %s\n", pad, cfg->code_len, cfg->method->name);*/
2162 x86_padding (code, pad);
2163 cfg->code_len += pad;
2164 bb->native_offset = cfg->code_len;
2168 if (cfg->verbose_level > 2)
2169 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2171 cpos = bb->max_offset;
2173 if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2174 MonoProfileCoverageInfo *cov = cfg->coverage_info;
2175 g_assert (!cfg->compile_aot);
2178 cov->data [bb->dfn].cil_code = bb->cil_code;
2179 /* this is not thread save, but good enough */
2180 x86_inc_mem (code, &cov->data [bb->dfn].count);
2183 offset = code - cfg->native_code;
2185 mono_debug_open_block (cfg, bb, offset);
2187 MONO_BB_FOR_EACH_INS (bb, ins) {
2188 offset = code - cfg->native_code;
2190 max_len = ((guint8 *)ins_get_spec (ins->opcode))[MONO_INST_LEN];
2192 if (G_UNLIKELY (offset > (cfg->code_size - max_len - 16))) {
2193 cfg->code_size *= 2;
2194 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2195 code = cfg->native_code + offset;
2196 mono_jit_stats.code_reallocs++;
2199 if (cfg->debug_info)
2200 mono_debug_record_line_number (cfg, ins, offset);
2202 switch (ins->opcode) {
2204 x86_mul_reg (code, ins->sreg2, TRUE);
2207 x86_mul_reg (code, ins->sreg2, FALSE);
2209 case OP_X86_SETEQ_MEMBASE:
2210 case OP_X86_SETNE_MEMBASE:
2211 x86_set_membase (code, ins->opcode == OP_X86_SETEQ_MEMBASE ? X86_CC_EQ : X86_CC_NE,
2212 ins->inst_basereg, ins->inst_offset, TRUE);
2214 case OP_STOREI1_MEMBASE_IMM:
2215 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 1);
2217 case OP_STOREI2_MEMBASE_IMM:
2218 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 2);
2220 case OP_STORE_MEMBASE_IMM:
2221 case OP_STOREI4_MEMBASE_IMM:
2222 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 4);
2224 case OP_STOREI1_MEMBASE_REG:
2225 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 1);
2227 case OP_STOREI2_MEMBASE_REG:
2228 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 2);
2230 case OP_STORE_MEMBASE_REG:
2231 case OP_STOREI4_MEMBASE_REG:
2232 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 4);
2234 case OP_STORE_MEM_IMM:
2235 x86_mov_mem_imm (code, ins->inst_p0, ins->inst_c0, 4);
2239 x86_mov_reg_mem (code, ins->dreg, ins->inst_imm, 4);
2241 x86_mov_reg_mem (code, ins->dreg, ins->inst_p0, 4);
2245 /* These are created by the cprop pass so they use inst_imm as the source */
2246 x86_mov_reg_mem (code, ins->dreg, ins->inst_imm, 4);
2249 x86_widen_mem (code, ins->dreg, ins->inst_imm, FALSE, FALSE);
2252 x86_widen_mem (code, ins->dreg, ins->inst_imm, FALSE, TRUE);
2254 case OP_LOAD_MEMBASE:
2255 case OP_LOADI4_MEMBASE:
2256 case OP_LOADU4_MEMBASE:
2257 x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, 4);
2259 case OP_LOADU1_MEMBASE:
2260 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE);
2262 case OP_LOADI1_MEMBASE:
2263 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, FALSE);
2265 case OP_LOADU2_MEMBASE:
2266 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE);
2268 case OP_LOADI2_MEMBASE:
2269 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, TRUE);
2271 case OP_ICONV_TO_I1:
2273 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, FALSE);
2275 case OP_ICONV_TO_I2:
2277 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, TRUE);
2279 case OP_ICONV_TO_U1:
2280 x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, FALSE);
2282 case OP_ICONV_TO_U2:
2283 x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, TRUE);
2287 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
2289 case OP_COMPARE_IMM:
2290 case OP_ICOMPARE_IMM:
2291 x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
2293 case OP_X86_COMPARE_MEMBASE_REG:
2294 x86_alu_membase_reg (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2296 case OP_X86_COMPARE_MEMBASE_IMM:
2297 x86_alu_membase_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2299 case OP_X86_COMPARE_MEMBASE8_IMM:
2300 x86_alu_membase8_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2302 case OP_X86_COMPARE_REG_MEMBASE:
2303 x86_alu_reg_membase (code, X86_CMP, ins->sreg1, ins->sreg2, ins->inst_offset);
2305 case OP_X86_COMPARE_MEM_IMM:
2306 x86_alu_mem_imm (code, X86_CMP, ins->inst_offset, ins->inst_imm);
2308 case OP_X86_TEST_NULL:
2309 x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
2311 case OP_X86_ADD_MEMBASE_IMM:
2312 x86_alu_membase_imm (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2314 case OP_X86_ADD_REG_MEMBASE:
2315 x86_alu_reg_membase (code, X86_ADD, ins->sreg1, ins->sreg2, ins->inst_offset);
2317 case OP_X86_SUB_MEMBASE_IMM:
2318 x86_alu_membase_imm (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2320 case OP_X86_SUB_REG_MEMBASE:
2321 x86_alu_reg_membase (code, X86_SUB, ins->sreg1, ins->sreg2, ins->inst_offset);
2323 case OP_X86_AND_MEMBASE_IMM:
2324 x86_alu_membase_imm (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2326 case OP_X86_OR_MEMBASE_IMM:
2327 x86_alu_membase_imm (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2329 case OP_X86_XOR_MEMBASE_IMM:
2330 x86_alu_membase_imm (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2332 case OP_X86_ADD_MEMBASE_REG:
2333 x86_alu_membase_reg (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2335 case OP_X86_SUB_MEMBASE_REG:
2336 x86_alu_membase_reg (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2338 case OP_X86_AND_MEMBASE_REG:
2339 x86_alu_membase_reg (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2341 case OP_X86_OR_MEMBASE_REG:
2342 x86_alu_membase_reg (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2344 case OP_X86_XOR_MEMBASE_REG:
2345 x86_alu_membase_reg (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2347 case OP_X86_INC_MEMBASE:
2348 x86_inc_membase (code, ins->inst_basereg, ins->inst_offset);
2350 case OP_X86_INC_REG:
2351 x86_inc_reg (code, ins->dreg);
2353 case OP_X86_DEC_MEMBASE:
2354 x86_dec_membase (code, ins->inst_basereg, ins->inst_offset);
2356 case OP_X86_DEC_REG:
2357 x86_dec_reg (code, ins->dreg);
2359 case OP_X86_MUL_REG_MEMBASE:
2360 x86_imul_reg_membase (code, ins->sreg1, ins->sreg2, ins->inst_offset);
2362 case OP_X86_AND_REG_MEMBASE:
2363 x86_alu_reg_membase (code, X86_AND, ins->sreg1, ins->sreg2, ins->inst_offset);
2365 case OP_X86_OR_REG_MEMBASE:
2366 x86_alu_reg_membase (code, X86_OR, ins->sreg1, ins->sreg2, ins->inst_offset);
2368 case OP_X86_XOR_REG_MEMBASE:
2369 x86_alu_reg_membase (code, X86_XOR, ins->sreg1, ins->sreg2, ins->inst_offset);
2372 x86_breakpoint (code);
2374 case OP_RELAXED_NOP:
2375 x86_prefix (code, X86_REP_PREFIX);
2383 case OP_DUMMY_STORE:
2384 case OP_NOT_REACHED:
2390 x86_alu_reg_reg (code, X86_ADD, ins->sreg1, ins->sreg2);
2394 x86_alu_reg_reg (code, X86_ADC, ins->sreg1, ins->sreg2);
2399 x86_alu_reg_imm (code, X86_ADD, ins->dreg, ins->inst_imm);
2403 x86_alu_reg_imm (code, X86_ADC, ins->dreg, ins->inst_imm);
2408 x86_alu_reg_reg (code, X86_SUB, ins->sreg1, ins->sreg2);
2412 x86_alu_reg_reg (code, X86_SBB, ins->sreg1, ins->sreg2);
2417 x86_alu_reg_imm (code, X86_SUB, ins->dreg, ins->inst_imm);
2421 x86_alu_reg_imm (code, X86_SBB, ins->dreg, ins->inst_imm);
2424 x86_alu_reg_reg (code, X86_AND, ins->sreg1, ins->sreg2);
2428 x86_alu_reg_imm (code, X86_AND, ins->sreg1, ins->inst_imm);
2433 * The code is the same for div/rem, the allocator will allocate dreg
2434 * to RAX/RDX as appropriate.
2436 if (ins->sreg2 == X86_EDX) {
2437 /* cdq clobbers this */
2438 x86_push_reg (code, ins->sreg2);
2440 x86_div_membase (code, X86_ESP, 0, TRUE);
2441 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2444 x86_div_reg (code, ins->sreg2, TRUE);
2449 if (ins->sreg2 == X86_EDX) {
2450 x86_push_reg (code, ins->sreg2);
2451 x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2452 x86_div_membase (code, X86_ESP, 0, FALSE);
2453 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2455 x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2456 x86_div_reg (code, ins->sreg2, FALSE);
2460 x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
2462 x86_div_reg (code, ins->sreg2, TRUE);
2465 int power = mono_is_power_of_two (ins->inst_imm);
2467 g_assert (ins->sreg1 == X86_EAX);
2468 g_assert (ins->dreg == X86_EAX);
2469 g_assert (power >= 0);
2472 /* Based on http://compilers.iecc.com/comparch/article/93-04-079 */
2474 x86_alu_reg_imm (code, X86_AND, X86_EAX, 1);
2476 * If the divident is >= 0, this does not nothing. If it is positive, it
2477 * it transforms %eax=0 into %eax=0, and %eax=1 into %eax=-1.
2479 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EDX);
2480 x86_alu_reg_reg (code, X86_SUB, X86_EAX, X86_EDX);
2482 /* Based on gcc code */
2484 /* Add compensation for negative dividents */
2486 x86_shift_reg_imm (code, X86_SHR, X86_EDX, 32 - power);
2487 x86_alu_reg_reg (code, X86_ADD, X86_EAX, X86_EDX);
2488 /* Compute remainder */
2489 x86_alu_reg_imm (code, X86_AND, X86_EAX, (1 << power) - 1);
2490 /* Remove compensation */
2491 x86_alu_reg_reg (code, X86_SUB, X86_EAX, X86_EDX);
2496 x86_alu_reg_reg (code, X86_OR, ins->sreg1, ins->sreg2);
2500 x86_alu_reg_imm (code, X86_OR, ins->sreg1, ins->inst_imm);
2503 x86_alu_reg_reg (code, X86_XOR, ins->sreg1, ins->sreg2);
2507 x86_alu_reg_imm (code, X86_XOR, ins->sreg1, ins->inst_imm);
2510 g_assert (ins->sreg2 == X86_ECX);
2511 x86_shift_reg (code, X86_SHL, ins->dreg);
2514 g_assert (ins->sreg2 == X86_ECX);
2515 x86_shift_reg (code, X86_SAR, ins->dreg);
2519 x86_shift_reg_imm (code, X86_SAR, ins->dreg, ins->inst_imm);
2522 case OP_ISHR_UN_IMM:
2523 x86_shift_reg_imm (code, X86_SHR, ins->dreg, ins->inst_imm);
2526 g_assert (ins->sreg2 == X86_ECX);
2527 x86_shift_reg (code, X86_SHR, ins->dreg);
2531 x86_shift_reg_imm (code, X86_SHL, ins->dreg, ins->inst_imm);
2534 guint8 *jump_to_end;
2536 /* handle shifts below 32 bits */
2537 x86_shld_reg (code, ins->backend.reg3, ins->sreg1);
2538 x86_shift_reg (code, X86_SHL, ins->sreg1);
2540 x86_test_reg_imm (code, X86_ECX, 32);
2541 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
2543 /* handle shift over 32 bit */
2544 x86_mov_reg_reg (code, ins->backend.reg3, ins->sreg1, 4);
2545 x86_clear_reg (code, ins->sreg1);
2547 x86_patch (jump_to_end, code);
2551 guint8 *jump_to_end;
2553 /* handle shifts below 32 bits */
2554 x86_shrd_reg (code, ins->sreg1, ins->backend.reg3);
2555 x86_shift_reg (code, X86_SAR, ins->backend.reg3);
2557 x86_test_reg_imm (code, X86_ECX, 32);
2558 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, FALSE);
2560 /* handle shifts over 31 bits */
2561 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2562 x86_shift_reg_imm (code, X86_SAR, ins->backend.reg3, 31);
2564 x86_patch (jump_to_end, code);
2568 guint8 *jump_to_end;
2570 /* handle shifts below 32 bits */
2571 x86_shrd_reg (code, ins->sreg1, ins->backend.reg3);
2572 x86_shift_reg (code, X86_SHR, ins->backend.reg3);
2574 x86_test_reg_imm (code, X86_ECX, 32);
2575 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, FALSE);
2577 /* handle shifts over 31 bits */
2578 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2579 x86_clear_reg (code, ins->backend.reg3);
2581 x86_patch (jump_to_end, code);
2585 if (ins->inst_imm >= 32) {
2586 x86_mov_reg_reg (code, ins->backend.reg3, ins->sreg1, 4);
2587 x86_clear_reg (code, ins->sreg1);
2588 x86_shift_reg_imm (code, X86_SHL, ins->backend.reg3, ins->inst_imm - 32);
2590 x86_shld_reg_imm (code, ins->backend.reg3, ins->sreg1, ins->inst_imm);
2591 x86_shift_reg_imm (code, X86_SHL, ins->sreg1, ins->inst_imm);
2595 if (ins->inst_imm >= 32) {
2596 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2597 x86_shift_reg_imm (code, X86_SAR, ins->backend.reg3, 0x1f);
2598 x86_shift_reg_imm (code, X86_SAR, ins->sreg1, ins->inst_imm - 32);
2600 x86_shrd_reg_imm (code, ins->sreg1, ins->backend.reg3, ins->inst_imm);
2601 x86_shift_reg_imm (code, X86_SAR, ins->backend.reg3, ins->inst_imm);
2604 case OP_LSHR_UN_IMM:
2605 if (ins->inst_imm >= 32) {
2606 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2607 x86_clear_reg (code, ins->backend.reg3);
2608 x86_shift_reg_imm (code, X86_SHR, ins->sreg1, ins->inst_imm - 32);
2610 x86_shrd_reg_imm (code, ins->sreg1, ins->backend.reg3, ins->inst_imm);
2611 x86_shift_reg_imm (code, X86_SHR, ins->backend.reg3, ins->inst_imm);
2615 x86_not_reg (code, ins->sreg1);
2618 x86_neg_reg (code, ins->sreg1);
2622 x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2626 switch (ins->inst_imm) {
2630 if (ins->dreg != ins->sreg1)
2631 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2632 x86_alu_reg_reg (code, X86_ADD, ins->dreg, ins->dreg);
2635 /* LEA r1, [r2 + r2*2] */
2636 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 1);
2639 /* LEA r1, [r2 + r2*4] */
2640 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2643 /* LEA r1, [r2 + r2*2] */
2645 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 1);
2646 x86_alu_reg_reg (code, X86_ADD, ins->dreg, ins->dreg);
2649 /* LEA r1, [r2 + r2*8] */
2650 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 3);
2653 /* LEA r1, [r2 + r2*4] */
2655 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2656 x86_alu_reg_reg (code, X86_ADD, ins->dreg, ins->dreg);
2659 /* LEA r1, [r2 + r2*2] */
2661 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 1);
2662 x86_shift_reg_imm (code, X86_SHL, ins->dreg, 2);
2665 /* LEA r1, [r2 + r2*4] */
2666 /* LEA r1, [r1 + r1*4] */
2667 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2668 x86_lea_memindex (code, ins->dreg, ins->dreg, 0, ins->dreg, 2);
2671 /* LEA r1, [r2 + r2*4] */
2673 /* LEA r1, [r1 + r1*4] */
2674 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2675 x86_shift_reg_imm (code, X86_SHL, ins->dreg, 2);
2676 x86_lea_memindex (code, ins->dreg, ins->dreg, 0, ins->dreg, 2);
2679 x86_imul_reg_reg_imm (code, ins->dreg, ins->sreg1, ins->inst_imm);
2684 x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2685 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2687 case OP_IMUL_OVF_UN: {
2688 /* the mul operation and the exception check should most likely be split */
2689 int non_eax_reg, saved_eax = FALSE, saved_edx = FALSE;
2690 /*g_assert (ins->sreg2 == X86_EAX);
2691 g_assert (ins->dreg == X86_EAX);*/
2692 if (ins->sreg2 == X86_EAX) {
2693 non_eax_reg = ins->sreg1;
2694 } else if (ins->sreg1 == X86_EAX) {
2695 non_eax_reg = ins->sreg2;
2697 /* no need to save since we're going to store to it anyway */
2698 if (ins->dreg != X86_EAX) {
2700 x86_push_reg (code, X86_EAX);
2702 x86_mov_reg_reg (code, X86_EAX, ins->sreg1, 4);
2703 non_eax_reg = ins->sreg2;
2705 if (ins->dreg == X86_EDX) {
2708 x86_push_reg (code, X86_EAX);
2710 } else if (ins->dreg != X86_EAX) {
2712 x86_push_reg (code, X86_EDX);
2714 x86_mul_reg (code, non_eax_reg, FALSE);
2715 /* save before the check since pop and mov don't change the flags */
2716 if (ins->dreg != X86_EAX)
2717 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
2719 x86_pop_reg (code, X86_EDX);
2721 x86_pop_reg (code, X86_EAX);
2722 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2726 x86_mov_reg_imm (code, ins->dreg, ins->inst_c0);
2729 g_assert_not_reached ();
2730 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2731 x86_mov_reg_imm (code, ins->dreg, 0);
2734 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2735 x86_mov_reg_imm (code, ins->dreg, 0);
2737 case OP_LOAD_GOTADDR:
2738 x86_call_imm (code, 0);
2740 * The patch needs to point to the pop, since the GOT offset needs
2741 * to be added to that address.
2743 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_GOT_OFFSET, NULL);
2744 x86_pop_reg (code, ins->dreg);
2745 x86_alu_reg_imm (code, X86_ADD, ins->dreg, 0xf0f0f0f0);
2748 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_right->inst_i1, ins->inst_right->inst_p0);
2749 x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, 0xf0f0f0f0, 4);
2751 case OP_X86_PUSH_GOT_ENTRY:
2752 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_right->inst_i1, ins->inst_right->inst_p0);
2753 x86_push_membase (code, ins->inst_basereg, 0xf0f0f0f0);
2756 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2760 * Note: this 'frame destruction' logic is useful for tail calls, too.
2761 * Keep in sync with the code in emit_epilog.
2765 /* FIXME: no tracing support... */
2766 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
2767 code = mono_arch_instrument_epilog (cfg, mono_profiler_method_leave, code, FALSE);
2768 /* reset offset to make max_len work */
2769 offset = code - cfg->native_code;
2771 g_assert (!cfg->method->save_lmf);
2773 code = emit_load_volatile_arguments (cfg, code);
2775 if (cfg->used_int_regs & (1 << X86_EBX))
2777 if (cfg->used_int_regs & (1 << X86_EDI))
2779 if (cfg->used_int_regs & (1 << X86_ESI))
2782 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
2784 if (cfg->used_int_regs & (1 << X86_ESI))
2785 x86_pop_reg (code, X86_ESI);
2786 if (cfg->used_int_regs & (1 << X86_EDI))
2787 x86_pop_reg (code, X86_EDI);
2788 if (cfg->used_int_regs & (1 << X86_EBX))
2789 x86_pop_reg (code, X86_EBX);
2791 /* restore ESP/EBP */
2793 offset = code - cfg->native_code;
2794 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2795 x86_jump32 (code, 0);
2797 cfg->disable_aot = TRUE;
2801 /* ensure ins->sreg1 is not NULL
2802 * note that cmp DWORD PTR [eax], eax is one byte shorter than
2803 * cmp DWORD PTR [eax], 0
2805 x86_alu_membase_reg (code, X86_CMP, ins->sreg1, 0, ins->sreg1);
2808 int hreg = ins->sreg1 == X86_EAX? X86_ECX: X86_EAX;
2809 x86_push_reg (code, hreg);
2810 x86_lea_membase (code, hreg, X86_EBP, cfg->sig_cookie);
2811 x86_mov_membase_reg (code, ins->sreg1, 0, hreg, 4);
2812 x86_pop_reg (code, hreg);
2821 call = (MonoCallInst*)ins;
2822 if (ins->flags & MONO_INST_HAS_METHOD)
2823 code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2825 code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2826 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
2827 /* a pop is one byte, while an add reg, imm is 3. So if there are 4 or 8
2828 * bytes to pop, we want to use pops. GCC does this (note it won't happen
2829 * for P4 or i686 because gcc will avoid using pop push at all. But we aren't
2830 * smart enough to do that optimization yet
2832 * It turns out that on my P4, doing two pops for 8 bytes on the stack makes
2833 * mcs botstrap slow down. However, doing 1 pop for 4 bytes creates a small,
2834 * (most likely from locality benefits). People with other processors should
2835 * check on theirs to see what happens.
2837 if (call->stack_usage == 4) {
2838 /* we want to use registers that won't get used soon, so use
2839 * ecx, as eax will get allocated first. edx is used by long calls,
2840 * so we can't use that.
2843 x86_pop_reg (code, X86_ECX);
2845 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2848 code = emit_move_return_value (cfg, ins, code);
2854 case OP_VOIDCALL_REG:
2856 call = (MonoCallInst*)ins;
2857 x86_call_reg (code, ins->sreg1);
2858 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
2859 if (call->stack_usage == 4)
2860 x86_pop_reg (code, X86_ECX);
2862 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2864 code = emit_move_return_value (cfg, ins, code);
2866 case OP_FCALL_MEMBASE:
2867 case OP_LCALL_MEMBASE:
2868 case OP_VCALL_MEMBASE:
2869 case OP_VCALL2_MEMBASE:
2870 case OP_VOIDCALL_MEMBASE:
2871 case OP_CALL_MEMBASE:
2872 call = (MonoCallInst*)ins;
2873 x86_call_membase (code, ins->sreg1, ins->inst_offset);
2874 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
2875 if (call->stack_usage == 4)
2876 x86_pop_reg (code, X86_ECX);
2878 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2880 code = emit_move_return_value (cfg, ins, code);
2884 x86_push_reg (code, ins->sreg1);
2886 case OP_X86_PUSH_IMM:
2887 x86_push_imm (code, ins->inst_imm);
2889 case OP_X86_PUSH_MEMBASE:
2890 x86_push_membase (code, ins->inst_basereg, ins->inst_offset);
2892 case OP_X86_PUSH_OBJ:
2893 x86_alu_reg_imm (code, X86_SUB, X86_ESP, ins->inst_imm);
2894 x86_push_reg (code, X86_EDI);
2895 x86_push_reg (code, X86_ESI);
2896 x86_push_reg (code, X86_ECX);
2897 if (ins->inst_offset)
2898 x86_lea_membase (code, X86_ESI, ins->inst_basereg, ins->inst_offset);
2900 x86_mov_reg_reg (code, X86_ESI, ins->inst_basereg, 4);
2901 x86_lea_membase (code, X86_EDI, X86_ESP, 12);
2902 x86_mov_reg_imm (code, X86_ECX, (ins->inst_imm >> 2));
2904 x86_prefix (code, X86_REP_PREFIX);
2906 x86_pop_reg (code, X86_ECX);
2907 x86_pop_reg (code, X86_ESI);
2908 x86_pop_reg (code, X86_EDI);
2911 x86_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->backend.shift_amount);
2913 case OP_X86_LEA_MEMBASE:
2914 x86_lea_membase (code, ins->dreg, ins->sreg1, ins->inst_imm);
2917 x86_xchg_reg_reg (code, ins->sreg1, ins->sreg2, 4);
2920 /* keep alignment */
2921 x86_alu_reg_imm (code, X86_ADD, ins->sreg1, MONO_ARCH_LOCALLOC_ALIGNMENT - 1);
2922 x86_alu_reg_imm (code, X86_AND, ins->sreg1, ~(MONO_ARCH_LOCALLOC_ALIGNMENT - 1));
2923 code = mono_emit_stack_alloc (code, ins);
2924 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2926 case OP_LOCALLOC_IMM: {
2927 guint32 size = ins->inst_imm;
2928 size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1);
2930 if (ins->flags & MONO_INST_INIT) {
2931 /* FIXME: Optimize this */
2932 x86_mov_reg_imm (code, ins->dreg, size);
2933 ins->sreg1 = ins->dreg;
2935 code = mono_emit_stack_alloc (code, ins);
2936 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2938 x86_alu_reg_imm (code, X86_SUB, X86_ESP, size);
2939 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2944 x86_push_reg (code, ins->sreg1);
2945 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD,
2946 (gpointer)"mono_arch_throw_exception");
2950 x86_push_reg (code, ins->sreg1);
2951 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD,
2952 (gpointer)"mono_arch_rethrow_exception");
2955 case OP_CALL_HANDLER:
2957 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 12);
2959 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2960 x86_call_imm (code, 0);
2962 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
2965 case OP_START_HANDLER: {
2966 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2967 x86_mov_membase_reg (code, spvar->inst_basereg, spvar->inst_offset, X86_ESP, 4);
2970 case OP_ENDFINALLY: {
2971 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2972 x86_mov_reg_membase (code, X86_ESP, spvar->inst_basereg, spvar->inst_offset, 4);
2976 case OP_ENDFILTER: {
2977 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2978 x86_mov_reg_membase (code, X86_ESP, spvar->inst_basereg, spvar->inst_offset, 4);
2979 /* The local allocator will put the result into EAX */
2985 ins->inst_c0 = code - cfg->native_code;
2988 if (ins->flags & MONO_INST_BRLABEL) {
2989 if (ins->inst_i0->inst_c0) {
2990 x86_jump_code (code, cfg->native_code + ins->inst_i0->inst_c0);
2992 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
2993 if ((cfg->opt & MONO_OPT_BRANCH) &&
2994 x86_is_imm8 (ins->inst_i0->inst_c1 - cpos))
2995 x86_jump8 (code, 0);
2997 x86_jump32 (code, 0);
3000 if (ins->inst_target_bb->native_offset) {
3001 x86_jump_code (code, cfg->native_code + ins->inst_target_bb->native_offset);
3003 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3004 if ((cfg->opt & MONO_OPT_BRANCH) &&
3005 x86_is_imm8 (ins->inst_target_bb->max_offset - cpos))
3006 x86_jump8 (code, 0);
3008 x86_jump32 (code, 0);
3013 x86_jump_reg (code, ins->sreg1);
3026 x86_set_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
3027 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3029 case OP_COND_EXC_EQ:
3030 case OP_COND_EXC_NE_UN:
3031 case OP_COND_EXC_LT:
3032 case OP_COND_EXC_LT_UN:
3033 case OP_COND_EXC_GT:
3034 case OP_COND_EXC_GT_UN:
3035 case OP_COND_EXC_GE:
3036 case OP_COND_EXC_GE_UN:
3037 case OP_COND_EXC_LE:
3038 case OP_COND_EXC_LE_UN:
3039 case OP_COND_EXC_IEQ:
3040 case OP_COND_EXC_INE_UN:
3041 case OP_COND_EXC_ILT:
3042 case OP_COND_EXC_ILT_UN:
3043 case OP_COND_EXC_IGT:
3044 case OP_COND_EXC_IGT_UN:
3045 case OP_COND_EXC_IGE:
3046 case OP_COND_EXC_IGE_UN:
3047 case OP_COND_EXC_ILE:
3048 case OP_COND_EXC_ILE_UN:
3049 EMIT_COND_SYSTEM_EXCEPTION (cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], ins->inst_p1);
3051 case OP_COND_EXC_OV:
3052 case OP_COND_EXC_NO:
3054 case OP_COND_EXC_NC:
3055 EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_EQ], (ins->opcode < OP_COND_EXC_NE_UN), ins->inst_p1);
3057 case OP_COND_EXC_IOV:
3058 case OP_COND_EXC_INO:
3059 case OP_COND_EXC_IC:
3060 case OP_COND_EXC_INC:
3061 EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_IEQ], (ins->opcode < OP_COND_EXC_INE_UN), ins->inst_p1);
3073 EMIT_COND_BRANCH (ins, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
3081 case OP_CMOV_INE_UN:
3082 case OP_CMOV_IGE_UN:
3083 case OP_CMOV_IGT_UN:
3084 case OP_CMOV_ILE_UN:
3085 case OP_CMOV_ILT_UN:
3086 g_assert (ins->dreg == ins->sreg1);
3087 x86_cmov_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, ins->sreg2);
3090 /* floating point opcodes */
3092 double d = *(double *)ins->inst_p0;
3094 if ((d == 0.0) && (mono_signbit (d) == 0)) {
3096 } else if (d == 1.0) {
3099 if (cfg->compile_aot) {
3100 guint32 *val = (guint32*)&d;
3101 x86_push_imm (code, val [1]);
3102 x86_push_imm (code, val [0]);
3103 x86_fld_membase (code, X86_ESP, 0, TRUE);
3104 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3107 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_R8, ins->inst_p0);
3108 x86_fld (code, NULL, TRUE);
3114 float f = *(float *)ins->inst_p0;
3116 if ((f == 0.0) && (mono_signbit (f) == 0)) {
3118 } else if (f == 1.0) {
3121 if (cfg->compile_aot) {
3122 guint32 val = *(guint32*)&f;
3123 x86_push_imm (code, val);
3124 x86_fld_membase (code, X86_ESP, 0, FALSE);
3125 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3128 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_R4, ins->inst_p0);
3129 x86_fld (code, NULL, FALSE);
3134 case OP_STORER8_MEMBASE_REG:
3135 x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, TRUE, TRUE);
3137 case OP_LOADR8_SPILL_MEMBASE:
3138 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
3141 case OP_LOADR8_MEMBASE:
3142 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
3144 case OP_STORER4_MEMBASE_REG:
3145 x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, FALSE, TRUE);
3147 case OP_LOADR4_MEMBASE:
3148 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
3150 case OP_ICONV_TO_R4: /* FIXME: change precision */
3151 case OP_ICONV_TO_R8:
3152 x86_push_reg (code, ins->sreg1);
3153 x86_fild_membase (code, X86_ESP, 0, FALSE);
3154 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3156 case OP_ICONV_TO_R_UN:
3157 x86_push_imm (code, 0);
3158 x86_push_reg (code, ins->sreg1);
3159 x86_fild_membase (code, X86_ESP, 0, TRUE);
3160 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3162 case OP_X86_FP_LOAD_I8:
3163 x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
3165 case OP_X86_FP_LOAD_I4:
3166 x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
3168 case OP_FCONV_TO_R4:
3169 /* FIXME: nothing to do ?? */
3171 case OP_FCONV_TO_I1:
3172 code = emit_float_to_int (cfg, code, ins->dreg, 1, TRUE);
3174 case OP_FCONV_TO_U1:
3175 code = emit_float_to_int (cfg, code, ins->dreg, 1, FALSE);
3177 case OP_FCONV_TO_I2:
3178 code = emit_float_to_int (cfg, code, ins->dreg, 2, TRUE);
3180 case OP_FCONV_TO_U2:
3181 code = emit_float_to_int (cfg, code, ins->dreg, 2, FALSE);
3183 case OP_FCONV_TO_I4:
3185 code = emit_float_to_int (cfg, code, ins->dreg, 4, TRUE);
3187 case OP_FCONV_TO_I8:
3188 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
3189 x86_fnstcw_membase(code, X86_ESP, 0);
3190 x86_mov_reg_membase (code, ins->dreg, X86_ESP, 0, 2);
3191 x86_alu_reg_imm (code, X86_OR, ins->dreg, 0xc00);
3192 x86_mov_membase_reg (code, X86_ESP, 2, ins->dreg, 2);
3193 x86_fldcw_membase (code, X86_ESP, 2);
3194 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
3195 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
3196 x86_pop_reg (code, ins->dreg);
3197 x86_pop_reg (code, ins->backend.reg3);
3198 x86_fldcw_membase (code, X86_ESP, 0);
3199 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3201 case OP_LCONV_TO_R8_2:
3202 x86_push_reg (code, ins->sreg2);
3203 x86_push_reg (code, ins->sreg1);
3204 x86_fild_membase (code, X86_ESP, 0, TRUE);
3205 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3207 case OP_LCONV_TO_R4_2:
3208 x86_push_reg (code, ins->sreg2);
3209 x86_push_reg (code, ins->sreg1);
3210 x86_fild_membase (code, X86_ESP, 0, TRUE);
3211 /* Change precision */
3212 x86_fst_membase (code, X86_ESP, 0, FALSE, TRUE);
3213 x86_fld_membase (code, X86_ESP, 0, FALSE);
3214 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3216 case OP_LCONV_TO_R_UN:
3217 case OP_LCONV_TO_R_UN_2: {
3218 static guint8 mn[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x40 };
3221 /* load 64bit integer to FP stack */
3222 x86_push_imm (code, 0);
3223 x86_push_reg (code, ins->sreg2);
3224 x86_push_reg (code, ins->sreg1);
3225 x86_fild_membase (code, X86_ESP, 0, TRUE);
3226 /* store as 80bit FP value */
3227 x86_fst80_membase (code, X86_ESP, 0);
3229 /* test if lreg is negative */
3230 x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
3231 br = code; x86_branch8 (code, X86_CC_GEZ, 0, TRUE);
3233 /* add correction constant mn */
3234 x86_fld80_mem (code, mn);
3235 x86_fld80_membase (code, X86_ESP, 0);
3236 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3237 x86_fst80_membase (code, X86_ESP, 0);
3239 x86_patch (br, code);
3241 x86_fld80_membase (code, X86_ESP, 0);
3242 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
3246 case OP_LCONV_TO_OVF_I:
3247 case OP_LCONV_TO_OVF_I4_2: {
3248 guint8 *br [3], *label [1];
3252 * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3254 x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
3256 /* If the low word top bit is set, see if we are negative */
3257 br [0] = code; x86_branch8 (code, X86_CC_LT, 0, TRUE);
3258 /* We are not negative (no top bit set, check for our top word to be zero */
3259 x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
3260 br [1] = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
3263 /* throw exception */
3264 tins = mono_branch_optimize_exception_target (cfg, bb, "OverflowException");
3266 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, tins->inst_true_bb);
3267 if ((cfg->opt & MONO_OPT_BRANCH) && x86_is_imm8 (tins->inst_true_bb->max_offset - cpos))
3268 x86_jump8 (code, 0);
3270 x86_jump32 (code, 0);
3272 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC, "OverflowException");
3273 x86_jump32 (code, 0);
3277 x86_patch (br [0], code);
3278 /* our top bit is set, check that top word is 0xfffffff */
3279 x86_alu_reg_imm (code, X86_CMP, ins->sreg2, 0xffffffff);
3281 x86_patch (br [1], code);
3282 /* nope, emit exception */
3283 br [2] = code; x86_branch8 (code, X86_CC_NE, 0, TRUE);
3284 x86_patch (br [2], label [0]);
3286 if (ins->dreg != ins->sreg1)
3287 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
3291 /* Not needed on the fp stack */
3294 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3297 x86_fp_op_reg (code, X86_FSUB, 1, TRUE);
3300 x86_fp_op_reg (code, X86_FMUL, 1, TRUE);
3303 x86_fp_op_reg (code, X86_FDIV, 1, TRUE);
3311 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3316 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3323 * it really doesn't make sense to inline all this code,
3324 * it's here just to show that things may not be as simple
3327 guchar *check_pos, *end_tan, *pop_jump;
3328 x86_push_reg (code, X86_EAX);
3331 x86_test_reg_imm (code, X86_EAX, X86_FP_C2);
3333 x86_branch8 (code, X86_CC_NE, 0, FALSE);
3334 x86_fstp (code, 0); /* pop the 1.0 */
3336 x86_jump8 (code, 0);
3338 x86_fp_op (code, X86_FADD, 0);
3342 x86_test_reg_imm (code, X86_EAX, X86_FP_C2);
3344 x86_branch8 (code, X86_CC_NE, 0, FALSE);
3347 x86_patch (pop_jump, code);
3348 x86_fstp (code, 0); /* pop the 1.0 */
3349 x86_patch (check_pos, code);
3350 x86_patch (end_tan, code);
3352 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3353 x86_pop_reg (code, X86_EAX);
3360 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3366 g_assert (cfg->opt & MONO_OPT_CMOV);
3367 g_assert (ins->dreg == ins->sreg1);
3368 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
3369 x86_cmov_reg (code, X86_CC_GT, TRUE, ins->dreg, ins->sreg2);
3372 g_assert (cfg->opt & MONO_OPT_CMOV);
3373 g_assert (ins->dreg == ins->sreg1);
3374 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
3375 x86_cmov_reg (code, X86_CC_GT, FALSE, ins->dreg, ins->sreg2);
3378 g_assert (cfg->opt & MONO_OPT_CMOV);
3379 g_assert (ins->dreg == ins->sreg1);
3380 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
3381 x86_cmov_reg (code, X86_CC_LT, TRUE, ins->dreg, ins->sreg2);
3384 g_assert (cfg->opt & MONO_OPT_CMOV);
3385 g_assert (ins->dreg == ins->sreg1);
3386 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
3387 x86_cmov_reg (code, X86_CC_LT, FALSE, ins->dreg, ins->sreg2);
3393 x86_fxch (code, ins->inst_imm);
3398 x86_push_reg (code, X86_EAX);
3399 /* we need to exchange ST(0) with ST(1) */
3402 /* this requires a loop, because fprem somtimes
3403 * returns a partial remainder */
3405 /* looks like MS is using fprem instead of the IEEE compatible fprem1 */
3406 /* x86_fprem1 (code); */
3409 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_C2);
3411 x86_branch8 (code, X86_CC_NE, l1 - l2, FALSE);
3416 x86_pop_reg (code, X86_EAX);
3420 if (cfg->opt & MONO_OPT_FCMOV) {
3421 x86_fcomip (code, 1);
3425 /* this overwrites EAX */
3426 EMIT_FPCOMPARE(code);
3427 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3430 if (cfg->opt & MONO_OPT_FCMOV) {
3431 /* zeroing the register at the start results in
3432 * shorter and faster code (we can also remove the widening op)
3434 guchar *unordered_check;
3435 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3436 x86_fcomip (code, 1);
3438 unordered_check = code;
3439 x86_branch8 (code, X86_CC_P, 0, FALSE);
3440 x86_set_reg (code, X86_CC_EQ, ins->dreg, FALSE);
3441 x86_patch (unordered_check, code);
3444 if (ins->dreg != X86_EAX)
3445 x86_push_reg (code, X86_EAX);
3447 EMIT_FPCOMPARE(code);
3448 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3449 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
3450 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3451 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3453 if (ins->dreg != X86_EAX)
3454 x86_pop_reg (code, X86_EAX);
3458 if (cfg->opt & MONO_OPT_FCMOV) {
3459 /* zeroing the register at the start results in
3460 * shorter and faster code (we can also remove the widening op)
3462 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3463 x86_fcomip (code, 1);
3465 if (ins->opcode == OP_FCLT_UN) {
3466 guchar *unordered_check = code;
3467 guchar *jump_to_end;
3468 x86_branch8 (code, X86_CC_P, 0, FALSE);
3469 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
3471 x86_jump8 (code, 0);
3472 x86_patch (unordered_check, code);
3473 x86_inc_reg (code, ins->dreg);
3474 x86_patch (jump_to_end, code);
3476 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
3480 if (ins->dreg != X86_EAX)
3481 x86_push_reg (code, X86_EAX);
3483 EMIT_FPCOMPARE(code);
3484 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3485 if (ins->opcode == OP_FCLT_UN) {
3486 guchar *is_not_zero_check, *end_jump;
3487 is_not_zero_check = code;
3488 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3490 x86_jump8 (code, 0);
3491 x86_patch (is_not_zero_check, code);
3492 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3494 x86_patch (end_jump, code);
3496 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3497 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3499 if (ins->dreg != X86_EAX)
3500 x86_pop_reg (code, X86_EAX);
3504 if (cfg->opt & MONO_OPT_FCMOV) {
3505 /* zeroing the register at the start results in
3506 * shorter and faster code (we can also remove the widening op)
3508 guchar *unordered_check;
3509 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3510 x86_fcomip (code, 1);
3512 if (ins->opcode == OP_FCGT) {
3513 unordered_check = code;
3514 x86_branch8 (code, X86_CC_P, 0, FALSE);
3515 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
3516 x86_patch (unordered_check, code);
3518 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
3522 if (ins->dreg != X86_EAX)
3523 x86_push_reg (code, X86_EAX);
3525 EMIT_FPCOMPARE(code);
3526 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3527 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3528 if (ins->opcode == OP_FCGT_UN) {
3529 guchar *is_not_zero_check, *end_jump;
3530 is_not_zero_check = code;
3531 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3533 x86_jump8 (code, 0);
3534 x86_patch (is_not_zero_check, code);
3535 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3537 x86_patch (end_jump, code);
3539 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3540 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3542 if (ins->dreg != X86_EAX)
3543 x86_pop_reg (code, X86_EAX);
3546 if (cfg->opt & MONO_OPT_FCMOV) {
3547 guchar *jump = code;
3548 x86_branch8 (code, X86_CC_P, 0, TRUE);
3549 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3550 x86_patch (jump, code);
3553 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
3554 EMIT_COND_BRANCH (ins, X86_CC_EQ, TRUE);
3557 /* Branch if C013 != 100 */
3558 if (cfg->opt & MONO_OPT_FCMOV) {
3559 /* branch if !ZF or (PF|CF) */
3560 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3561 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3562 EMIT_COND_BRANCH (ins, X86_CC_B, FALSE);
3565 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C3);
3566 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3569 if (cfg->opt & MONO_OPT_FCMOV) {
3570 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
3573 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3576 if (cfg->opt & MONO_OPT_FCMOV) {
3577 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3578 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
3581 if (ins->opcode == OP_FBLT_UN) {
3582 guchar *is_not_zero_check, *end_jump;
3583 is_not_zero_check = code;
3584 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3586 x86_jump8 (code, 0);
3587 x86_patch (is_not_zero_check, code);
3588 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3590 x86_patch (end_jump, code);
3592 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3596 if (cfg->opt & MONO_OPT_FCMOV) {
3597 if (ins->opcode == OP_FBGT) {
3600 /* skip branch if C1=1 */
3602 x86_branch8 (code, X86_CC_P, 0, FALSE);
3603 /* branch if (C0 | C3) = 1 */
3604 EMIT_COND_BRANCH (ins, X86_CC_LT, FALSE);
3605 x86_patch (br1, code);
3607 EMIT_COND_BRANCH (ins, X86_CC_LT, FALSE);
3611 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3612 if (ins->opcode == OP_FBGT_UN) {
3613 guchar *is_not_zero_check, *end_jump;
3614 is_not_zero_check = code;
3615 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3617 x86_jump8 (code, 0);
3618 x86_patch (is_not_zero_check, code);
3619 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3621 x86_patch (end_jump, code);
3623 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3626 /* Branch if C013 == 100 or 001 */
3627 if (cfg->opt & MONO_OPT_FCMOV) {
3630 /* skip branch if C1=1 */
3632 x86_branch8 (code, X86_CC_P, 0, FALSE);
3633 /* branch if (C0 | C3) = 1 */
3634 EMIT_COND_BRANCH (ins, X86_CC_BE, FALSE);
3635 x86_patch (br1, code);
3638 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3639 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3640 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C3);
3641 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3644 /* Branch if C013 == 000 */
3645 if (cfg->opt & MONO_OPT_FCMOV) {
3646 EMIT_COND_BRANCH (ins, X86_CC_LE, FALSE);
3649 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3652 /* Branch if C013=000 or 100 */
3653 if (cfg->opt & MONO_OPT_FCMOV) {
3656 /* skip branch if C1=1 */
3658 x86_branch8 (code, X86_CC_P, 0, FALSE);
3659 /* branch if C0=0 */
3660 EMIT_COND_BRANCH (ins, X86_CC_NB, FALSE);
3661 x86_patch (br1, code);
3664 x86_alu_reg_imm (code, X86_AND, X86_EAX, (X86_FP_C0|X86_FP_C1));
3665 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0);
3666 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3669 /* Branch if C013 != 001 */
3670 if (cfg->opt & MONO_OPT_FCMOV) {
3671 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3672 EMIT_COND_BRANCH (ins, X86_CC_GE, FALSE);
3675 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3676 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3680 x86_push_reg (code, X86_EAX);
3683 x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4100);
3684 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3685 x86_pop_reg (code, X86_EAX);
3687 /* Have to clean up the fp stack before throwing the exception */
3689 x86_branch8 (code, X86_CC_NE, 0, FALSE);
3692 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_EQ, FALSE, "ArithmeticException");
3694 x86_patch (br1, code);
3698 code = emit_tls_get (code, ins->dreg, ins->inst_offset);
3701 case OP_MEMORY_BARRIER: {
3702 /* Not needed on x86 */
3705 case OP_ATOMIC_ADD_I4: {
3706 int dreg = ins->dreg;
3708 if (dreg == ins->inst_basereg) {
3709 x86_push_reg (code, ins->sreg2);
3713 if (dreg != ins->sreg2)
3714 x86_mov_reg_reg (code, ins->dreg, ins->sreg2, 4);
3716 x86_prefix (code, X86_LOCK_PREFIX);
3717 x86_xadd_membase_reg (code, ins->inst_basereg, ins->inst_offset, dreg, 4);
3719 if (dreg != ins->dreg) {
3720 x86_mov_reg_reg (code, ins->dreg, dreg, 4);
3721 x86_pop_reg (code, dreg);
3726 case OP_ATOMIC_ADD_NEW_I4: {
3727 int dreg = ins->dreg;
3729 /* hack: limit in regalloc, dreg != sreg1 && dreg != sreg2 */
3730 if (ins->sreg2 == dreg) {
3731 if (dreg == X86_EBX) {
3733 if (ins->inst_basereg == X86_EDI)
3737 if (ins->inst_basereg == X86_EBX)
3740 } else if (ins->inst_basereg == dreg) {
3741 if (dreg == X86_EBX) {
3743 if (ins->sreg2 == X86_EDI)
3747 if (ins->sreg2 == X86_EBX)
3752 if (dreg != ins->dreg) {
3753 x86_push_reg (code, dreg);
3756 x86_mov_reg_reg (code, dreg, ins->sreg2, 4);
3757 x86_prefix (code, X86_LOCK_PREFIX);
3758 x86_xadd_membase_reg (code, ins->inst_basereg, ins->inst_offset, dreg, 4);
3759 /* dreg contains the old value, add with sreg2 value */
3760 x86_alu_reg_reg (code, X86_ADD, dreg, ins->sreg2);
3762 if (ins->dreg != dreg) {
3763 x86_mov_reg_reg (code, ins->dreg, dreg, 4);
3764 x86_pop_reg (code, dreg);
3769 case OP_ATOMIC_EXCHANGE_I4:
3770 case OP_ATOMIC_CAS_IMM_I4: {
3772 int sreg2 = ins->sreg2;
3773 int breg = ins->inst_basereg;
3775 /* cmpxchg uses eax as comperand, need to make sure we can use it
3776 * hack to overcome limits in x86 reg allocator
3777 * (req: dreg == eax and sreg2 != eax and breg != eax)
3779 g_assert (ins->dreg == X86_EAX);
3781 /* We need the EAX reg for the cmpxchg */
3782 if (ins->sreg2 == X86_EAX) {
3783 x86_push_reg (code, X86_EDX);
3784 x86_mov_reg_reg (code, X86_EDX, X86_EAX, 4);
3788 if (breg == X86_EAX) {
3789 x86_push_reg (code, X86_ESI);
3790 x86_mov_reg_reg (code, X86_ESI, X86_EAX, 4);
3794 if (ins->opcode == OP_ATOMIC_CAS_IMM_I4) {
3795 x86_mov_reg_imm (code, X86_EAX, ins->backend.data);
3797 x86_prefix (code, X86_LOCK_PREFIX);
3798 x86_cmpxchg_membase_reg (code, breg, ins->inst_offset, sreg2);
3800 x86_mov_reg_membase (code, X86_EAX, breg, ins->inst_offset, 4);
3802 br [0] = code; x86_prefix (code, X86_LOCK_PREFIX);
3803 x86_cmpxchg_membase_reg (code, breg, ins->inst_offset, sreg2);
3804 br [1] = code; x86_branch8 (code, X86_CC_NE, -1, FALSE);
3805 x86_patch (br [1], br [0]);
3808 if (breg != ins->inst_basereg)
3809 x86_pop_reg (code, X86_ESI);
3811 if (ins->sreg2 != sreg2)
3812 x86_pop_reg (code, X86_EDX);
3816 #ifdef MONO_ARCH_SIMD_INTRINSICS
3818 x86_sse_alu_ps_reg_reg (code, X86_SSE_ADD, ins->sreg1, ins->sreg2);
3821 x86_sse_alu_ps_reg_reg (code, X86_SSE_DIV, ins->sreg1, ins->sreg2);
3824 x86_sse_alu_ps_reg_reg (code, X86_SSE_MUL, ins->sreg1, ins->sreg2);
3827 x86_sse_alu_ps_reg_reg (code, X86_SSE_SUB, ins->sreg1, ins->sreg2);
3830 x86_sse_alu_ps_reg_reg (code, X86_SSE_MAX, ins->sreg1, ins->sreg2);
3833 x86_sse_alu_ps_reg_reg (code, X86_SSE_MIN, ins->sreg1, ins->sreg2);
3836 g_assert (ins->inst_c0 >= 0 && ins->inst_c0 <= 7);
3837 x86_sse_alu_ps_reg_reg_imm (code, X86_SSE_COMP, ins->sreg1, ins->sreg2, ins->inst_c0);
3840 x86_sse_alu_ps_reg_reg (code, X86_SSE_AND, ins->sreg1, ins->sreg2);
3843 x86_sse_alu_ps_reg_reg (code, X86_SSE_ANDN, ins->sreg1, ins->sreg2);
3846 x86_sse_alu_ps_reg_reg (code, X86_SSE_OR, ins->sreg1, ins->sreg2);
3849 x86_sse_alu_ps_reg_reg (code, X86_SSE_XOR, ins->sreg1, ins->sreg2);
3852 x86_sse_alu_ps_reg_reg (code, X86_SSE_SQRT, ins->dreg, ins->sreg1);
3855 x86_sse_alu_ps_reg_reg (code, X86_SSE_RSQRT, ins->dreg, ins->sreg1);
3858 x86_sse_alu_ps_reg_reg (code, X86_SSE_RCP, ins->dreg, ins->sreg1);
3861 x86_sse_alu_sd_reg_reg (code, X86_SSE_ADDSUB, ins->sreg1, ins->sreg2);
3864 x86_sse_alu_sd_reg_reg (code, X86_SSE_HADD, ins->sreg1, ins->sreg2);
3867 x86_sse_alu_sd_reg_reg (code, X86_SSE_HSUB, ins->sreg1, ins->sreg2);
3870 x86_sse_alu_ss_reg_reg (code, X86_SSE_MOVSHDUP, ins->dreg, ins->sreg1);
3873 x86_sse_alu_ss_reg_reg (code, X86_SSE_MOVSLDUP, ins->dreg, ins->sreg1);
3876 g_assert (ins->inst_c0 >= 0 && ins->inst_c0 <= 0xFF);
3877 x86_pshufd_reg_reg (code, ins->dreg, ins->sreg1, ins->inst_c0);
3880 case OP_PSHUFLEW_HIGH:
3881 g_assert (ins->inst_c0 >= 0 && ins->inst_c0 <= 0xFF);
3882 x86_pshufw_reg_reg (code, ins->dreg, ins->sreg1, ins->inst_c0, 1);
3884 case OP_PSHUFLEW_LOW:
3885 g_assert (ins->inst_c0 >= 0 && ins->inst_c0 <= 0xFF);
3886 x86_pshufw_reg_reg (code, ins->dreg, ins->sreg1, ins->inst_c0, 0);
3889 g_assert (ins->inst_c0 >= 0 && ins->inst_c0 <= 0xFF);
3890 x86_sse_shift_reg_imm (code, X86_SSE_PSHUFD, ins->dreg, ins->sreg1, ins->inst_c0);
3893 case OP_EXTRACT_MASK:
3894 x86_sse_alu_pd_reg_reg (code, X86_SSE_PMOVMSKB, ins->dreg, ins->sreg1);
3898 x86_sse_alu_pd_reg_reg (code, X86_SSE_PAND, ins->sreg1, ins->sreg2);
3901 x86_sse_alu_pd_reg_reg (code, X86_SSE_POR, ins->sreg1, ins->sreg2);
3904 x86_sse_alu_pd_reg_reg (code, X86_SSE_PXOR, ins->sreg1, ins->sreg2);
3908 x86_sse_alu_pd_reg_reg (code, X86_SSE_PADDB, ins->sreg1, ins->sreg2);
3911 x86_sse_alu_pd_reg_reg (code, X86_SSE_PADDW, ins->sreg1, ins->sreg2);
3914 x86_sse_alu_pd_reg_reg (code, X86_SSE_PADDD, ins->sreg1, ins->sreg2);
3918 x86_sse_alu_pd_reg_reg (code, X86_SSE_PSUBB, ins->sreg1, ins->sreg2);
3921 x86_sse_alu_pd_reg_reg (code, X86_SSE_PSUBW, ins->sreg1, ins->sreg2);
3924 x86_sse_alu_pd_reg_reg (code, X86_SSE_PSUBD, ins->sreg1, ins->sreg2);
3928 x86_sse_alu_pd_reg_reg (code, X86_SSE_PMAXUB, ins->sreg1, ins->sreg2);
3931 x86_sse_alu_sse41_reg_reg (code, X86_SSE_PMAXUW, ins->sreg1, ins->sreg2);
3934 x86_sse_alu_sse41_reg_reg (code, X86_SSE_PMAXUD, ins->sreg1, ins->sreg2);
3938 x86_sse_alu_pd_reg_reg (code, X86_SSE_PAVGB, ins->sreg1, ins->sreg2);
3941 x86_sse_alu_pd_reg_reg (code, X86_SSE_PAVGW, ins->sreg1, ins->sreg2);
3945 x86_sse_alu_pd_reg_reg (code, X86_SSE_PMINUB, ins->sreg1, ins->sreg2);
3948 x86_sse_alu_sse41_reg_reg (code, X86_SSE_PMINUW, ins->sreg1, ins->sreg2);
3951 x86_sse_alu_sse41_reg_reg (code, X86_SSE_PMINUD, ins->sreg1, ins->sreg2);
3955 x86_sse_alu_pd_reg_reg (code, X86_SSE_PCMPEQB, ins->sreg1, ins->sreg2);
3958 x86_sse_alu_pd_reg_reg (code, X86_SSE_PCMPEQW, ins->sreg1, ins->sreg2);
3961 x86_sse_alu_pd_reg_reg (code, X86_SSE_PCMPEQD, ins->sreg1, ins->sreg2);
3964 case OP_PSUM_ABS_DIFF:
3965 x86_sse_alu_pd_reg_reg (code, X86_SSE_PSADBW, ins->sreg1, ins->sreg2);
3968 case OP_UNPACK_LOWB:
3969 x86_sse_alu_pd_reg_reg (code, X86_SSE_PUNPCKLBW, ins->sreg1, ins->sreg2);
3971 case OP_UNPACK_LOWW:
3972 x86_sse_alu_pd_reg_reg (code, X86_SSE_PUNPCKLWD, ins->sreg1, ins->sreg2);
3974 case OP_UNPACK_LOWD:
3975 x86_sse_alu_pd_reg_reg (code, X86_SSE_PUNPCKLDQ, ins->sreg1, ins->sreg2);
3977 case OP_UNPACK_LOWPS:
3978 x86_sse_alu_ps_reg_reg (code, X86_SSE_UNPCKL, ins->sreg1, ins->sreg2);
3981 case OP_UNPACK_HIGHB:
3982 x86_sse_alu_pd_reg_reg (code, X86_SSE_PUNPCKHBW, ins->sreg1, ins->sreg2);
3984 case OP_UNPACK_HIGHW:
3985 x86_sse_alu_pd_reg_reg (code, X86_SSE_PUNPCKHWD, ins->sreg1, ins->sreg2);
3987 case OP_UNPACK_HIGHD:
3988 x86_sse_alu_pd_reg_reg (code, X86_SSE_PUNPCKHDQ, ins->sreg1, ins->sreg2);
3990 case OP_UNPACK_HIGHPS:
3991 x86_sse_alu_ps_reg_reg (code, X86_SSE_UNPCKH, ins->sreg1, ins->sreg2);
3995 x86_sse_alu_pd_reg_reg (code, X86_SSE_PACKUSWB, ins->sreg1, ins->sreg2);
3998 x86_sse_alu_sse41_reg_reg (code, X86_SSE_PACKUSDW, ins->sreg1, ins->sreg2);
4001 case OP_PADDB_SAT_UN:
4002 x86_sse_alu_pd_reg_reg (code, X86_SSE_PADDUSB, ins->sreg1, ins->sreg2);
4004 case OP_PSUBB_SAT_UN:
4005 x86_sse_alu_pd_reg_reg (code, X86_SSE_PSUBUSB, ins->sreg1, ins->sreg2);
4007 case OP_PADDW_SAT_UN:
4008 x86_sse_alu_pd_reg_reg (code, X86_SSE_PADDUSW, ins->sreg1, ins->sreg2);
4010 case OP_PSUBW_SAT_UN:
4011 x86_sse_alu_pd_reg_reg (code, X86_SSE_PSUBUSW, ins->sreg1, ins->sreg2);
4015 x86_sse_alu_pd_reg_reg (code, X86_SSE_PMULLW, ins->sreg1, ins->sreg2);
4018 x86_sse_alu_sse41_reg_reg (code, X86_SSE_PMULLD, ins->sreg1, ins->sreg2);
4022 x86_sse_shift_reg_imm (code, X86_SSE_PSHIFTW, X86_SSE_SHR, ins->dreg, ins->inst_imm);
4025 x86_sse_shift_reg_reg (code, X86_SSE_PSRLW_REG, ins->dreg, ins->sreg2);
4029 x86_sse_shift_reg_imm (code, X86_SSE_PSHIFTW, X86_SSE_SAR, ins->dreg, ins->inst_imm);
4032 x86_sse_shift_reg_reg (code, X86_SSE_PSRAW_REG, ins->dreg, ins->sreg2);
4036 x86_sse_shift_reg_imm (code, X86_SSE_PSHIFTW, X86_SSE_SHL, ins->dreg, ins->inst_imm);
4039 x86_sse_shift_reg_reg (code, X86_SSE_PSLLW_REG, ins->dreg, ins->sreg2);
4043 x86_sse_shift_reg_imm (code, X86_SSE_PSHIFTD, X86_SSE_SHR, ins->dreg, ins->inst_imm);
4046 x86_sse_shift_reg_reg (code, X86_SSE_PSRLD_REG, ins->dreg, ins->sreg2);
4050 x86_sse_shift_reg_imm (code, X86_SSE_PSHIFTD, X86_SSE_SAR, ins->dreg, ins->inst_imm);
4053 x86_sse_shift_reg_reg (code, X86_SSE_PSRAD_REG, ins->dreg, ins->sreg2);
4057 x86_sse_shift_reg_imm (code, X86_SSE_PSHIFTD, X86_SSE_SHL, ins->dreg, ins->inst_imm);
4060 x86_sse_shift_reg_reg (code, X86_SSE_PSLLD_REG, ins->dreg, ins->sreg2);
4064 x86_movd_xreg_reg (code, ins->dreg, ins->sreg1);
4067 x86_movd_reg_xreg (code, ins->dreg, ins->sreg1);
4069 case OP_STOREX_MEMBASE_REG:
4070 case OP_STOREX_MEMBASE:
4071 x86_movups_membase_reg (code, ins->dreg, ins->inst_offset, ins->sreg1);
4073 case OP_LOADX_MEMBASE:
4074 x86_movups_reg_membase (code, ins->dreg, ins->sreg1, ins->inst_offset);
4076 case OP_LOADX_ALIGNED_MEMBASE:
4077 x86_movaps_reg_membase (code, ins->dreg, ins->sreg1, ins->inst_offset);
4079 case OP_STOREX_ALIGNED_MEMBASE_REG:
4080 x86_movaps_membase_reg (code, ins->dreg, ins->inst_offset, ins->sreg1);
4083 /*FIXME the peephole pass should have killed this*/
4084 if (ins->dreg != ins->sreg1)
4085 x86_movaps_reg_reg (code, ins->dreg, ins->sreg1);
4088 x86_sse_alu_pd_reg_reg (code, X86_SSE_PXOR, ins->dreg, ins->dreg);
4090 case OP_ICONV_TO_R8_RAW:
4091 x86_mov_membase_reg (code, ins->backend.spill_var->inst_basereg, ins->backend.spill_var->inst_offset, ins->sreg1, 4);
4092 x86_fld_membase (code, ins->backend.spill_var->inst_basereg, ins->backend.spill_var->inst_offset, FALSE);
4095 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
4096 x86_fst_membase (code, X86_ESP, 0, FALSE, TRUE);
4098 case OP_LOADX_STACK:
4099 x86_movups_reg_membase (code, ins->dreg, X86_ESP, 0);
4100 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 16);
4103 case OP_FCONV_TO_R8_X:
4104 x86_fst_membase (code, ins->backend.spill_var->inst_basereg, ins->backend.spill_var->inst_offset, TRUE, TRUE);
4105 x86_movsd_reg_membase (code, ins->dreg, ins->backend.spill_var->inst_basereg, ins->backend.spill_var->inst_offset);
4108 case OP_XCONV_R8_TO_I4:
4109 x86_cvttsd2si (code, ins->dreg, ins->sreg1);
4110 switch (ins->backend.source_opcode) {
4111 case OP_FCONV_TO_I1:
4112 x86_widen_reg (code, ins->dreg, ins->dreg, TRUE, FALSE);
4114 case OP_FCONV_TO_U1:
4115 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
4117 case OP_FCONV_TO_I2:
4118 x86_widen_reg (code, ins->dreg, ins->dreg, TRUE, TRUE);
4120 case OP_FCONV_TO_U2:
4121 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, TRUE);
4127 g_warning ("unknown opcode %s\n", mono_inst_name (ins->opcode));
4128 g_assert_not_reached ();
4131 if (G_UNLIKELY ((code - cfg->native_code - offset) > max_len)) {
4132 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
4133 mono_inst_name (ins->opcode), max_len, code - cfg->native_code - offset);
4134 g_assert_not_reached ();
4140 cfg->code_len = code - cfg->native_code;
4144 mono_arch_register_lowlevel_calls (void)
4149 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
4151 MonoJumpInfo *patch_info;
4152 gboolean compile_aot = !run_cctors;
4154 for (patch_info = ji; patch_info; patch_info = patch_info->next) {
4155 unsigned char *ip = patch_info->ip.i + code;
4156 const unsigned char *target;
4158 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
4161 switch (patch_info->type) {
4162 case MONO_PATCH_INFO_BB:
4163 case MONO_PATCH_INFO_LABEL:
4166 /* No need to patch these */
4171 switch (patch_info->type) {
4172 case MONO_PATCH_INFO_IP:
4173 *((gconstpointer *)(ip)) = target;
4175 case MONO_PATCH_INFO_CLASS_INIT: {
4177 /* Might already been changed to a nop */
4178 x86_call_code (code, 0);
4179 x86_patch (ip, target);
4182 case MONO_PATCH_INFO_ABS:
4183 case MONO_PATCH_INFO_METHOD:
4184 case MONO_PATCH_INFO_METHOD_JUMP:
4185 case MONO_PATCH_INFO_INTERNAL_METHOD:
4186 case MONO_PATCH_INFO_BB:
4187 case MONO_PATCH_INFO_LABEL:
4188 case MONO_PATCH_INFO_RGCTX_FETCH:
4189 case MONO_PATCH_INFO_GENERIC_CLASS_INIT:
4190 x86_patch (ip, target);
4192 case MONO_PATCH_INFO_NONE:
4195 guint32 offset = mono_arch_get_patch_offset (ip);
4196 *((gconstpointer *)(ip + offset)) = target;
4204 mono_arch_emit_prolog (MonoCompile *cfg)
4206 MonoMethod *method = cfg->method;
4208 MonoMethodSignature *sig;
4210 int alloc_size, pos, max_offset, i;
4213 cfg->code_size = MAX (mono_method_get_header (method)->code_size * 4, 10240);
4215 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
4216 cfg->code_size += 512;
4218 code = cfg->native_code = g_malloc (cfg->code_size);
4220 x86_push_reg (code, X86_EBP);
4221 x86_mov_reg_reg (code, X86_EBP, X86_ESP, 4);
4223 alloc_size = cfg->stack_offset;
4226 if (method->wrapper_type == MONO_WRAPPER_NATIVE_TO_MANAGED) {
4227 /* Might need to attach the thread to the JIT or change the domain for the callback */
4228 if (appdomain_tls_offset != -1 && lmf_tls_offset != -1) {
4229 guint8 *buf, *no_domain_branch;
4231 code = emit_tls_get (code, X86_EAX, appdomain_tls_offset);
4232 x86_alu_reg_imm (code, X86_CMP, X86_EAX, GPOINTER_TO_UINT (cfg->domain));
4233 no_domain_branch = code;
4234 x86_branch8 (code, X86_CC_NE, 0, 0);
4235 code = emit_tls_get ( code, X86_EAX, lmf_tls_offset);
4236 x86_test_reg_reg (code, X86_EAX, X86_EAX);
4238 x86_branch8 (code, X86_CC_NE, 0, 0);
4239 x86_patch (no_domain_branch, code);
4240 x86_push_imm (code, cfg->domain);
4241 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_jit_thread_attach");
4242 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
4243 x86_patch (buf, code);
4244 #ifdef PLATFORM_WIN32
4245 /* The TLS key actually contains a pointer to the MonoJitTlsData structure */
4246 /* FIXME: Add a separate key for LMF to avoid this */
4247 x86_alu_reg_imm (code, X86_ADD, X86_EAX, G_STRUCT_OFFSET (MonoJitTlsData, lmf));
4251 g_assert (!cfg->compile_aot);
4252 x86_push_imm (code, cfg->domain);
4253 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_jit_thread_attach");
4254 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
4258 if (method->save_lmf) {
4259 pos += sizeof (MonoLMF);
4261 /* save the current IP */
4262 mono_add_patch_info (cfg, code + 1 - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
4263 x86_push_imm_template (code);
4265 /* save all caller saved regs */
4266 x86_push_reg (code, X86_EBP);
4267 x86_push_reg (code, X86_ESI);
4268 x86_push_reg (code, X86_EDI);
4269 x86_push_reg (code, X86_EBX);
4271 if ((lmf_tls_offset != -1) && !is_win32 && !optimize_for_xen) {
4273 * Optimized version which uses the mono_lmf TLS variable instead of indirection
4274 * through the mono_lmf_addr TLS variable.
4276 /* %eax = previous_lmf */
4277 x86_prefix (code, X86_GS_PREFIX);
4278 x86_mov_reg_mem (code, X86_EAX, lmf_tls_offset, 4);
4279 /* skip esp + method_info + lmf */
4280 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 12);
4281 /* push previous_lmf */
4282 x86_push_reg (code, X86_EAX);
4284 x86_prefix (code, X86_GS_PREFIX);
4285 x86_mov_mem_reg (code, lmf_tls_offset, X86_ESP, 4);
4287 /* get the address of lmf for the current thread */
4289 * This is performance critical so we try to use some tricks to make
4293 if (lmf_addr_tls_offset != -1) {
4294 /* Load lmf quicky using the GS register */
4295 code = emit_tls_get (code, X86_EAX, lmf_addr_tls_offset);
4296 #ifdef PLATFORM_WIN32
4297 /* The TLS key actually contains a pointer to the MonoJitTlsData structure */
4298 /* FIXME: Add a separate key for LMF to avoid this */
4299 x86_alu_reg_imm (code, X86_ADD, X86_EAX, G_STRUCT_OFFSET (MonoJitTlsData, lmf));
4302 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_get_lmf_addr");
4305 /* Skip esp + method info */
4306 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
4309 x86_push_reg (code, X86_EAX);
4310 /* push *lfm (previous_lmf) */
4311 x86_push_membase (code, X86_EAX, 0);
4313 x86_mov_membase_reg (code, X86_EAX, 0, X86_ESP, 4);
4317 if (cfg->used_int_regs & (1 << X86_EBX)) {
4318 x86_push_reg (code, X86_EBX);
4322 if (cfg->used_int_regs & (1 << X86_EDI)) {
4323 x86_push_reg (code, X86_EDI);
4327 if (cfg->used_int_regs & (1 << X86_ESI)) {
4328 x86_push_reg (code, X86_ESI);
4336 /* the original alloc_size is already aligned: there is %ebp and retip pushed, so realign */
4338 int tot = alloc_size + pos + 4 + 4; /* ret ip + ebp */
4350 /* See mono_emit_stack_alloc */
4351 #if defined(PLATFORM_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
4352 guint32 remaining_size = alloc_size;
4353 while (remaining_size >= 0x1000) {
4354 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
4355 x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
4356 remaining_size -= 0x1000;
4359 x86_alu_reg_imm (code, X86_SUB, X86_ESP, remaining_size);
4361 x86_alu_reg_imm (code, X86_SUB, X86_ESP, alloc_size);
4365 #if __APPLE__ && DEBUG_APPLE_ALIGNMENT
4366 /* check the stack is aligned */
4367 x86_mov_reg_reg (code, X86_EDX, X86_ESP, 4);
4368 x86_alu_reg_imm (code, X86_AND, X86_EDX, 15);
4369 x86_alu_reg_imm (code, X86_CMP, X86_EDX, 0);
4370 x86_branch_disp (code, X86_CC_EQ, 3, FALSE);
4371 x86_breakpoint (code);
4374 /* compute max_offset in order to use short forward jumps */
4376 if (cfg->opt & MONO_OPT_BRANCH) {
4377 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
4379 bb->max_offset = max_offset;
4381 if (cfg->prof_options & MONO_PROFILE_COVERAGE)
4383 /* max alignment for loops */
4384 if ((cfg->opt & MONO_OPT_LOOP) && bb_is_loop_start (bb))
4385 max_offset += LOOP_ALIGNMENT;
4387 MONO_BB_FOR_EACH_INS (bb, ins) {
4388 if (ins->opcode == OP_LABEL)
4389 ins->inst_c1 = max_offset;
4391 max_offset += ((guint8 *)ins_get_spec (ins->opcode))[MONO_INST_LEN];
4396 /* store runtime generic context */
4397 if (cfg->rgctx_var) {
4398 g_assert (cfg->rgctx_var->opcode == OP_REGOFFSET && cfg->rgctx_var->inst_basereg == X86_EBP);
4400 x86_mov_membase_reg (code, X86_EBP, cfg->rgctx_var->inst_offset, MONO_ARCH_RGCTX_REG, 4);
4403 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4404 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
4406 /* load arguments allocated to register from the stack */
4407 sig = mono_method_signature (method);
4410 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
4411 inst = cfg->args [pos];
4412 if (inst->opcode == OP_REGVAR) {
4413 x86_mov_reg_membase (code, inst->dreg, X86_EBP, inst->inst_offset, 4);
4414 if (cfg->verbose_level > 2)
4415 g_print ("Argument %d assigned to register %s\n", pos, mono_arch_regname (inst->dreg));
4420 cfg->code_len = code - cfg->native_code;
4422 g_assert (cfg->code_len < cfg->code_size);
4428 mono_arch_emit_epilog (MonoCompile *cfg)
4430 MonoMethod *method = cfg->method;
4431 MonoMethodSignature *sig = mono_method_signature (method);
4433 guint32 stack_to_pop;
4435 int max_epilog_size = 16;
4438 if (cfg->method->save_lmf)
4439 max_epilog_size += 128;
4441 while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
4442 cfg->code_size *= 2;
4443 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4444 mono_jit_stats.code_reallocs++;
4447 code = cfg->native_code + cfg->code_len;
4449 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4450 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
4452 /* the code restoring the registers must be kept in sync with OP_JMP */
4455 if (method->save_lmf) {
4456 gint32 prev_lmf_reg;
4457 gint32 lmf_offset = -sizeof (MonoLMF);
4459 /* check if we need to restore protection of the stack after a stack overflow */
4460 if (mono_get_jit_tls_offset () != -1) {
4462 code = emit_tls_get (code, X86_ECX, mono_get_jit_tls_offset ());
4463 /* we load the value in a separate instruction: this mechanism may be
4464 * used later as a safer way to do thread interruption
4466 x86_mov_reg_membase (code, X86_ECX, X86_ECX, G_STRUCT_OFFSET (MonoJitTlsData, restore_stack_prot), 4);
4467 x86_alu_reg_imm (code, X86_CMP, X86_ECX, 0);
4469 x86_branch8 (code, X86_CC_Z, 0, FALSE);
4470 /* note that the call trampoline will preserve eax/edx */
4471 x86_call_reg (code, X86_ECX);
4472 x86_patch (patch, code);
4474 /* FIXME: maybe save the jit tls in the prolog */
4476 if ((lmf_tls_offset != -1) && !is_win32 && !optimize_for_xen) {
4478 * Optimized version which uses the mono_lmf TLS variable instead of indirection
4479 * through the mono_lmf_addr TLS variable.
4481 /* reg = previous_lmf */
4482 x86_mov_reg_membase (code, X86_ECX, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), 4);
4484 /* lmf = previous_lmf */
4485 x86_prefix (code, X86_GS_PREFIX);
4486 x86_mov_mem_reg (code, lmf_tls_offset, X86_ECX, 4);
4488 /* Find a spare register */
4489 switch (mini_type_get_underlying_type (cfg->generic_sharing_context, sig->ret)->type) {
4492 prev_lmf_reg = X86_EDI;
4493 cfg->used_int_regs |= (1 << X86_EDI);
4496 prev_lmf_reg = X86_EDX;
4500 /* reg = previous_lmf */
4501 x86_mov_reg_membase (code, prev_lmf_reg, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), 4);
4504 x86_mov_reg_membase (code, X86_ECX, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), 4);
4506 /* *(lmf) = previous_lmf */
4507 x86_mov_membase_reg (code, X86_ECX, 0, prev_lmf_reg, 4);
4510 /* restore caller saved regs */
4511 if (cfg->used_int_regs & (1 << X86_EBX)) {
4512 x86_mov_reg_membase (code, X86_EBX, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebx), 4);
4515 if (cfg->used_int_regs & (1 << X86_EDI)) {
4516 x86_mov_reg_membase (code, X86_EDI, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, edi), 4);
4518 if (cfg->used_int_regs & (1 << X86_ESI)) {
4519 x86_mov_reg_membase (code, X86_ESI, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, esi), 4);
4522 /* EBP is restored by LEAVE */
4524 if (cfg->used_int_regs & (1 << X86_EBX)) {
4527 if (cfg->used_int_regs & (1 << X86_EDI)) {
4530 if (cfg->used_int_regs & (1 << X86_ESI)) {
4535 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
4537 if (cfg->used_int_regs & (1 << X86_ESI)) {
4538 x86_pop_reg (code, X86_ESI);
4540 if (cfg->used_int_regs & (1 << X86_EDI)) {
4541 x86_pop_reg (code, X86_EDI);
4543 if (cfg->used_int_regs & (1 << X86_EBX)) {
4544 x86_pop_reg (code, X86_EBX);
4548 /* Load returned vtypes into registers if needed */
4549 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
4550 if (cinfo->ret.storage == ArgValuetypeInReg) {
4551 for (quad = 0; quad < 2; quad ++) {
4552 switch (cinfo->ret.pair_storage [quad]) {
4554 x86_mov_reg_membase (code, cinfo->ret.pair_regs [quad], cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), 4);
4556 case ArgOnFloatFpStack:
4557 x86_fld_membase (code, cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), FALSE);
4559 case ArgOnDoubleFpStack:
4560 x86_fld_membase (code, cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), TRUE);
4565 g_assert_not_reached ();
4572 if (CALLCONV_IS_STDCALL (sig)) {
4573 MonoJitArgumentInfo *arg_info = alloca (sizeof (MonoJitArgumentInfo) * (sig->param_count + 1));
4575 stack_to_pop = mono_arch_get_argument_info (sig, sig->param_count, arg_info);
4576 } else if (MONO_TYPE_ISSTRUCT (mono_method_signature (cfg->method)->ret) && (cinfo->ret.storage == ArgOnStack))
4582 x86_ret_imm (code, stack_to_pop);
4586 cfg->code_len = code - cfg->native_code;
4588 g_assert (cfg->code_len < cfg->code_size);
4592 mono_arch_emit_exceptions (MonoCompile *cfg)
4594 MonoJumpInfo *patch_info;
4597 MonoClass *exc_classes [16];
4598 guint8 *exc_throw_start [16], *exc_throw_end [16];
4602 /* Compute needed space */
4603 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4604 if (patch_info->type == MONO_PATCH_INFO_EXC)
4609 * make sure we have enough space for exceptions
4610 * 16 is the size of two push_imm instructions and a call
4612 if (cfg->compile_aot)
4613 code_size = exc_count * 32;
4615 code_size = exc_count * 16;
4617 while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4618 cfg->code_size *= 2;
4619 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4620 mono_jit_stats.code_reallocs++;
4623 code = cfg->native_code + cfg->code_len;
4626 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4627 switch (patch_info->type) {
4628 case MONO_PATCH_INFO_EXC: {
4629 MonoClass *exc_class;
4633 x86_patch (patch_info->ip.i + cfg->native_code, code);
4635 exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4636 g_assert (exc_class);
4637 throw_ip = patch_info->ip.i;
4639 /* Find a throw sequence for the same exception class */
4640 for (i = 0; i < nthrows; ++i)
4641 if (exc_classes [i] == exc_class)
4644 x86_push_imm (code, (exc_throw_end [i] - cfg->native_code) - throw_ip);
4645 x86_jump_code (code, exc_throw_start [i]);
4646 patch_info->type = MONO_PATCH_INFO_NONE;
4651 /* Compute size of code following the push <OFFSET> */
4654 if ((code - cfg->native_code) - throw_ip < 126 - size) {
4655 /* Use the shorter form */
4657 x86_push_imm (code, 0);
4661 x86_push_imm (code, 0xf0f0f0f0);
4666 exc_classes [nthrows] = exc_class;
4667 exc_throw_start [nthrows] = code;
4670 x86_push_imm (code, exc_class->type_token - MONO_TOKEN_TYPE_DEF);
4671 patch_info->data.name = "mono_arch_throw_corlib_exception";
4672 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4673 patch_info->ip.i = code - cfg->native_code;
4674 x86_call_code (code, 0);
4675 x86_push_imm (buf, (code - cfg->native_code) - throw_ip);
4680 exc_throw_end [nthrows] = code;
4692 cfg->code_len = code - cfg->native_code;
4694 g_assert (cfg->code_len < cfg->code_size);
4698 mono_arch_flush_icache (guint8 *code, gint size)
4704 mono_arch_flush_register_windows (void)
4709 mono_arch_is_inst_imm (gint64 imm)
4715 * Support for fast access to the thread-local lmf structure using the GS
4716 * segment register on NPTL + kernel 2.6.x.
4719 static gboolean tls_offset_inited = FALSE;
4722 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
4724 if (!tls_offset_inited) {
4725 if (!getenv ("MONO_NO_TLS")) {
4726 #ifdef PLATFORM_WIN32
4728 * We need to init this multiple times, since when we are first called, the key might not
4729 * be initialized yet.
4731 appdomain_tls_offset = mono_domain_get_tls_key ();
4732 lmf_tls_offset = mono_get_jit_tls_key ();
4733 thread_tls_offset = mono_thread_get_tls_key ();
4735 /* Only 64 tls entries can be accessed using inline code */
4736 if (appdomain_tls_offset >= 64)
4737 appdomain_tls_offset = -1;
4738 if (lmf_tls_offset >= 64)
4739 lmf_tls_offset = -1;
4740 if (thread_tls_offset >= 64)
4741 thread_tls_offset = -1;
4744 optimize_for_xen = access ("/proc/xen", F_OK) == 0;
4746 tls_offset_inited = TRUE;
4747 appdomain_tls_offset = mono_domain_get_tls_offset ();
4748 lmf_tls_offset = mono_get_lmf_tls_offset ();
4749 lmf_addr_tls_offset = mono_get_lmf_addr_tls_offset ();
4750 thread_tls_offset = mono_thread_get_tls_offset ();
4757 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4762 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, int this_reg, int this_type, int vt_reg)
4764 MonoCallInst *call = (MonoCallInst*)inst;
4765 CallInfo *cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, inst->signature, FALSE);
4767 /* add the this argument */
4768 if (this_reg != -1) {
4769 if (cinfo->args [0].storage == ArgInIReg) {
4771 MONO_INST_NEW (cfg, this, OP_MOVE);
4772 this->type = this_type;
4773 this->sreg1 = this_reg;
4774 this->dreg = mono_regstate_next_int (cfg->rs);
4775 mono_bblock_add_inst (cfg->cbb, this);
4777 mono_call_inst_add_outarg_reg (cfg, call, this->dreg, cinfo->args [0].reg, FALSE);
4781 MONO_INST_NEW (cfg, this, OP_OUTARG);
4782 this->type = this_type;
4783 this->sreg1 = this_reg;
4784 mono_bblock_add_inst (cfg->cbb, this);
4791 if (cinfo->ret.storage == ArgValuetypeInReg) {
4793 * The valuetype is in EAX:EDX after the call, needs to be copied to
4794 * the stack. Save the address here, so the call instruction can
4797 MONO_INST_NEW (cfg, vtarg, OP_STORE_MEMBASE_REG);
4798 vtarg->inst_destbasereg = X86_ESP;
4799 vtarg->inst_offset = inst->stack_usage;
4800 vtarg->sreg1 = vt_reg;
4801 mono_bblock_add_inst (cfg->cbb, vtarg);
4803 else if (cinfo->ret.storage == ArgInIReg) {
4804 /* The return address is passed in a register */
4805 MONO_INST_NEW (cfg, vtarg, OP_MOVE);
4806 vtarg->sreg1 = vt_reg;
4807 vtarg->dreg = mono_regstate_next_int (cfg->rs);
4808 mono_bblock_add_inst (cfg->cbb, vtarg);
4810 mono_call_inst_add_outarg_reg (cfg, call, vtarg->dreg, cinfo->ret.reg, FALSE);
4813 MONO_INST_NEW (cfg, vtarg, OP_OUTARG);
4814 vtarg->type = STACK_MP;
4815 vtarg->sreg1 = vt_reg;
4816 mono_bblock_add_inst (cfg->cbb, vtarg);
4821 #ifdef MONO_ARCH_HAVE_IMT
4823 // Linear handler, the bsearch head compare is shorter
4824 //[2 + 4] x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
4825 //[1 + 1] x86_branch8(inst,cond,imm,is_signed)
4826 // x86_patch(ins,target)
4827 //[1 + 5] x86_jump_mem(inst,mem)
4830 #define BR_SMALL_SIZE 2
4831 #define BR_LARGE_SIZE 5
4832 #define JUMP_IMM_SIZE 6
4833 #define ENABLE_WRONG_METHOD_CHECK 0
4836 imt_branch_distance (MonoIMTCheckItem **imt_entries, int start, int target)
4838 int i, distance = 0;
4839 for (i = start; i < target; ++i)
4840 distance += imt_entries [i]->chunk_size;
4845 * LOCKING: called with the domain lock held
4848 mono_arch_build_imt_thunk (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count,
4849 gpointer fail_tramp)
4853 guint8 *code, *start;
4855 for (i = 0; i < count; ++i) {
4856 MonoIMTCheckItem *item = imt_entries [i];
4857 if (item->is_equals) {
4858 if (item->check_target_idx) {
4859 if (!item->compare_done)
4860 item->chunk_size += CMP_SIZE;
4861 item->chunk_size += BR_SMALL_SIZE + JUMP_IMM_SIZE;
4864 item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + JUMP_IMM_SIZE * 2;
4866 item->chunk_size += JUMP_IMM_SIZE;
4867 #if ENABLE_WRONG_METHOD_CHECK
4868 item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
4873 item->chunk_size += CMP_SIZE + BR_LARGE_SIZE;
4874 imt_entries [item->check_target_idx]->compare_done = TRUE;
4876 size += item->chunk_size;
4879 code = mono_method_alloc_generic_virtual_thunk (domain, size);
4881 code = mono_code_manager_reserve (domain->code_mp, size);
4883 for (i = 0; i < count; ++i) {
4884 MonoIMTCheckItem *item = imt_entries [i];
4885 item->code_target = code;
4886 if (item->is_equals) {
4887 if (item->check_target_idx) {
4888 if (!item->compare_done)
4889 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->key);
4890 item->jmp_code = code;
4891 x86_branch8 (code, X86_CC_NE, 0, FALSE);
4893 x86_jump_code (code, item->value.target_code);
4895 x86_jump_mem (code, & (vtable->vtable [item->value.vtable_slot]));
4898 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->key);
4899 item->jmp_code = code;
4900 x86_branch8 (code, X86_CC_NE, 0, FALSE);
4901 x86_jump_code (code, item->value.target_code);
4902 x86_patch (item->jmp_code, code);
4903 x86_jump_code (code, fail_tramp);
4904 item->jmp_code = NULL;
4906 /* enable the commented code to assert on wrong method */
4907 #if ENABLE_WRONG_METHOD_CHECK
4908 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->key);
4909 item->jmp_code = code;
4910 x86_branch8 (code, X86_CC_NE, 0, FALSE);
4912 x86_jump_mem (code, & (vtable->vtable [item->value.vtable_slot]));
4913 #if ENABLE_WRONG_METHOD_CHECK
4914 x86_patch (item->jmp_code, code);
4915 x86_breakpoint (code);
4916 item->jmp_code = NULL;
4921 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->key);
4922 item->jmp_code = code;
4923 if (x86_is_imm8 (imt_branch_distance (imt_entries, i, item->check_target_idx)))
4924 x86_branch8 (code, X86_CC_GE, 0, FALSE);
4926 x86_branch32 (code, X86_CC_GE, 0, FALSE);
4929 /* patch the branches to get to the target items */
4930 for (i = 0; i < count; ++i) {
4931 MonoIMTCheckItem *item = imt_entries [i];
4932 if (item->jmp_code) {
4933 if (item->check_target_idx) {
4934 x86_patch (item->jmp_code, imt_entries [item->check_target_idx]->code_target);
4940 mono_stats.imt_thunks_size += code - start;
4941 g_assert (code - start <= size);
4946 mono_arch_find_imt_method (gpointer *regs, guint8 *code)
4948 return (MonoMethod*) regs [MONO_ARCH_IMT_REG];
4952 mono_arch_find_this_argument (gpointer *regs, MonoMethod *method, MonoGenericSharingContext *gsctx)
4954 MonoMethodSignature *sig = mono_method_signature (method);
4955 CallInfo *cinfo = get_call_info (gsctx, NULL, sig, FALSE);
4956 int this_argument_offset;
4957 MonoObject *this_argument;
4960 * this is the offset of the this arg from esp as saved at the start of
4961 * mono_arch_create_trampoline_code () in tramp-x86.c.
4963 this_argument_offset = 5;
4964 if (MONO_TYPE_ISSTRUCT (sig->ret) && (cinfo->ret.storage == ArgOnStack))
4965 this_argument_offset++;
4967 this_argument = * (MonoObject**) (((guint8*) regs [X86_ESP]) + this_argument_offset * sizeof (gpointer));
4970 return this_argument;
4975 mono_arch_find_static_call_vtable (gpointer *regs, guint8 *code)
4977 return (MonoVTable*) regs [MONO_ARCH_RGCTX_REG];
4981 mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4983 MonoInst *ins = NULL;
4985 if (cmethod->klass == mono_defaults.math_class) {
4986 if (strcmp (cmethod->name, "Sin") == 0) {
4987 MONO_INST_NEW (cfg, ins, OP_SIN);
4988 ins->inst_i0 = args [0];
4989 } else if (strcmp (cmethod->name, "Cos") == 0) {
4990 MONO_INST_NEW (cfg, ins, OP_COS);
4991 ins->inst_i0 = args [0];
4992 } else if (strcmp (cmethod->name, "Tan") == 0) {
4993 MONO_INST_NEW (cfg, ins, OP_TAN);
4994 ins->inst_i0 = args [0];
4995 } else if (strcmp (cmethod->name, "Atan") == 0) {
4996 MONO_INST_NEW (cfg, ins, OP_ATAN);
4997 ins->inst_i0 = args [0];
4998 } else if (strcmp (cmethod->name, "Sqrt") == 0) {
4999 MONO_INST_NEW (cfg, ins, OP_SQRT);
5000 ins->inst_i0 = args [0];
5001 } else if (strcmp (cmethod->name, "Abs") == 0 && fsig->params [0]->type == MONO_TYPE_R8) {
5002 MONO_INST_NEW (cfg, ins, OP_ABS);
5003 ins->inst_i0 = args [0];
5006 if (cfg->opt & MONO_OPT_CMOV) {
5009 if (strcmp (cmethod->name, "Min") == 0) {
5010 if (fsig->params [0]->type == MONO_TYPE_I4)
5012 else if (fsig->params [0]->type == MONO_TYPE_U4)
5013 opcode = OP_IMIN_UN;
5014 } else if (strcmp (cmethod->name, "Max") == 0) {
5015 if (fsig->params [0]->type == MONO_TYPE_I4)
5017 else if (fsig->params [0]->type == MONO_TYPE_U4)
5018 opcode = OP_IMAX_UN;
5022 MONO_INST_NEW (cfg, ins, opcode);
5023 ins->inst_i0 = args [0];
5024 ins->inst_i1 = args [1];
5029 /* OP_FREM is not IEEE compatible */
5030 else if (strcmp (cmethod->name, "IEEERemainder") == 0) {
5031 MONO_INST_NEW (cfg, ins, OP_FREM);
5032 ins->inst_i0 = args [0];
5033 ins->inst_i1 = args [1];
5042 mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
5044 MonoInst *ins = NULL;
5047 if (cmethod->klass == mono_defaults.math_class) {
5048 if (strcmp (cmethod->name, "Sin") == 0) {
5050 } else if (strcmp (cmethod->name, "Cos") == 0) {
5052 } else if (strcmp (cmethod->name, "Tan") == 0) {
5054 } else if (strcmp (cmethod->name, "Atan") == 0) {
5056 } else if (strcmp (cmethod->name, "Sqrt") == 0) {
5058 } else if (strcmp (cmethod->name, "Abs") == 0 && fsig->params [0]->type == MONO_TYPE_R8) {
5063 MONO_INST_NEW (cfg, ins, opcode);
5064 ins->type = STACK_R8;
5065 ins->dreg = mono_alloc_freg (cfg);
5066 ins->sreg1 = args [0]->dreg;
5067 MONO_ADD_INS (cfg->cbb, ins);
5070 if (cfg->opt & MONO_OPT_CMOV) {
5073 if (strcmp (cmethod->name, "Min") == 0) {
5074 if (fsig->params [0]->type == MONO_TYPE_I4)
5076 } else if (strcmp (cmethod->name, "Max") == 0) {
5077 if (fsig->params [0]->type == MONO_TYPE_I4)
5082 MONO_INST_NEW (cfg, ins, opcode);
5083 ins->type = STACK_I4;
5084 ins->dreg = mono_alloc_ireg (cfg);
5085 ins->sreg1 = args [0]->dreg;
5086 ins->sreg2 = args [1]->dreg;
5087 MONO_ADD_INS (cfg->cbb, ins);
5092 /* OP_FREM is not IEEE compatible */
5093 else if (strcmp (cmethod->name, "IEEERemainder") == 0) {
5094 MONO_INST_NEW (cfg, ins, OP_FREM);
5095 ins->inst_i0 = args [0];
5096 ins->inst_i1 = args [1];
5105 mono_arch_print_tree (MonoInst *tree, int arity)
5110 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
5116 if (appdomain_tls_offset == -1)
5119 MONO_INST_NEW (cfg, ins, OP_TLS_GET);
5120 ins->inst_offset = appdomain_tls_offset;
5124 MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
5128 if (thread_tls_offset == -1)
5131 MONO_INST_NEW (cfg, ins, OP_TLS_GET);
5132 ins->inst_offset = thread_tls_offset;
5137 mono_arch_get_patch_offset (guint8 *code)
5139 if ((code [0] == 0x8b) && (x86_modrm_mod (code [1]) == 0x2))
5141 else if ((code [0] == 0xba))
5143 else if ((code [0] == 0x68))
5146 else if ((code [0] == 0xff) && (x86_modrm_reg (code [1]) == 0x6))
5147 /* push <OFFSET>(<REG>) */
5149 else if ((code [0] == 0xff) && (x86_modrm_reg (code [1]) == 0x2))
5150 /* call *<OFFSET>(<REG>) */
5152 else if ((code [0] == 0xdd) || (code [0] == 0xd9))
5155 else if ((code [0] == 0x58) && (code [1] == 0x05))
5156 /* pop %eax; add <OFFSET>, %eax */
5158 else if ((code [0] >= 0x58) && (code [0] <= 0x58 + X86_NREG) && (code [1] == 0x81))
5159 /* pop <REG>; add <OFFSET>, <REG> */
5161 else if ((code [0] >= 0xb8) && (code [0] < 0xb8 + 8))
5162 /* mov <REG>, imm */
5165 g_assert_not_reached ();
5171 * mono_breakpoint_clean_code:
5173 * Copy @size bytes from @code - @offset to the buffer @buf. If the debugger inserted software
5174 * breakpoints in the original code, they are removed in the copy.
5176 * Returns TRUE if no sw breakpoint was present.
5179 mono_breakpoint_clean_code (guint8 *method_start, guint8 *code, int offset, guint8 *buf, int size)
5182 gboolean can_write = TRUE;
5184 * If method_start is non-NULL we need to perform bound checks, since we access memory
5185 * at code - offset we could go before the start of the method and end up in a different
5186 * page of memory that is not mapped or read incorrect data anyway. We zero-fill the bytes
5189 if (!method_start || code - offset >= method_start) {
5190 memcpy (buf, code - offset, size);
5192 int diff = code - method_start;
5193 memset (buf, 0, size);
5194 memcpy (buf + offset - diff, method_start, diff + size - offset);
5197 for (i = 0; i < MONO_BREAKPOINT_ARRAY_SIZE; ++i) {
5198 int idx = mono_breakpoint_info_index [i];
5202 ptr = mono_breakpoint_info [idx].address;
5203 if (ptr >= code && ptr < code + size) {
5204 guint8 saved_byte = mono_breakpoint_info [idx].saved_byte;
5206 /*g_print ("patching %p with 0x%02x (was: 0x%02x)\n", ptr, saved_byte, buf [ptr - code]);*/
5207 buf [ptr - code] = saved_byte;
5214 mono_arch_get_vcall_slot (guint8 *code, gpointer *regs, int *displacement)
5220 mono_breakpoint_clean_code (NULL, code, 8, buf, sizeof (buf));
5225 /* go to the start of the call instruction
5227 * address_byte = (m << 6) | (o << 3) | reg
5228 * call opcode: 0xff address_byte displacement
5230 * 0xff m=2,o=2 imm32
5235 * A given byte sequence can match more than case here, so we have to be
5236 * really careful about the ordering of the cases. Longer sequences
5239 if ((code [-2] == 0x8b) && (x86_modrm_mod (code [-1]) == 0x2) && (code [4] == 0xff) && (x86_modrm_reg (code [5]) == 0x2) && (x86_modrm_mod (code [5]) == 0x0)) {
5241 * This is an interface call
5242 * 8b 80 0c e8 ff ff mov 0xffffe80c(%eax),%eax
5243 * ff 10 call *(%eax)
5245 reg = x86_modrm_rm (code [5]);
5247 #ifdef MONO_ARCH_HAVE_IMT
5248 } else if ((code [-2] == 0xba) && (code [3] == 0xff) && (x86_modrm_mod (code [4]) == 1) && (x86_modrm_reg (code [4]) == 2) && ((signed char)code [5] < 0)) {
5249 /* IMT-based interface calls: with MONO_ARCH_IMT_REG == edx
5250 * ba 14 f8 28 08 mov $0x828f814,%edx
5251 * ff 50 fc call *0xfffffffc(%eax)
5253 reg = code [4] & 0x07;
5254 disp = (signed char)code [5];
5256 } else if ((code [1] != 0xe8) && (code [3] == 0xff) && ((code [4] & 0x18) == 0x10) && ((code [4] >> 6) == 1)) {
5257 reg = code [4] & 0x07;
5258 disp = (signed char)code [5];
5260 if ((code [0] == 0xff) && ((code [1] & 0x18) == 0x10) && ((code [1] >> 6) == 2)) {
5261 reg = code [1] & 0x07;
5262 disp = *((gint32*)(code + 2));
5263 } else if ((code [1] == 0xe8)) {
5265 } else if ((code [4] == 0xff) && (((code [5] >> 6) & 0x3) == 0) && (((code [5] >> 3) & 0x7) == 2)) {
5267 * This is a interface call
5268 * 8b 40 30 mov 0x30(%eax),%eax
5269 * ff 10 call *(%eax)
5272 reg = code [5] & 0x07;
5278 *displacement = disp;
5283 mono_arch_get_vcall_slot_addr (guint8 *code, gpointer *regs)
5287 vt = mono_arch_get_vcall_slot (code, regs, &displacement);
5290 return (gpointer*)((char*)vt + displacement);
5294 mono_arch_get_this_arg_from_call (MonoGenericSharingContext *gsctx, MonoMethodSignature *sig,
5295 gssize *regs, guint8 *code)
5297 guint32 esp = regs [X86_ESP];
5302 gsctx = mono_get_generic_context_from_code (code);
5303 cinfo = get_call_info (gsctx, NULL, sig, FALSE);
5306 * The stack looks like:
5309 * <possible vtype return address>
5311 * <4 pointers pushed by mono_arch_create_trampoline_code ()>
5313 res = (((MonoObject**)esp) [5 + (cinfo->args [0].offset / 4)]);
5318 #define MAX_ARCH_DELEGATE_PARAMS 10
5321 mono_arch_get_delegate_invoke_impl (MonoMethodSignature *sig, gboolean has_target)
5323 guint8 *code, *start;
5325 if (sig->param_count > MAX_ARCH_DELEGATE_PARAMS)
5328 /* FIXME: Support more cases */
5329 if (MONO_TYPE_ISSTRUCT (sig->ret))
5333 * The stack contains:
5339 static guint8* cached = NULL;
5343 start = code = mono_global_codeman_reserve (64);
5345 /* Replace the this argument with the target */
5346 x86_mov_reg_membase (code, X86_EAX, X86_ESP, 4, 4);
5347 x86_mov_reg_membase (code, X86_ECX, X86_EAX, G_STRUCT_OFFSET (MonoDelegate, target), 4);
5348 x86_mov_membase_reg (code, X86_ESP, 4, X86_ECX, 4);
5349 x86_jump_membase (code, X86_EAX, G_STRUCT_OFFSET (MonoDelegate, method_ptr));
5351 g_assert ((code - start) < 64);
5353 mono_debug_add_delegate_trampoline (start, code - start);
5355 mono_memory_barrier ();
5359 static guint8* cache [MAX_ARCH_DELEGATE_PARAMS + 1] = {NULL};
5361 /* 8 for mov_reg and jump, plus 8 for each parameter */
5362 int code_reserve = 8 + (sig->param_count * 8);
5364 for (i = 0; i < sig->param_count; ++i)
5365 if (!mono_is_regsize_var (sig->params [i]))
5368 code = cache [sig->param_count];
5373 * The stack contains:
5374 * <args in reverse order>
5379 * <args in reverse order>
5382 * without unbalancing the stack.
5383 * So move each arg up a spot in the stack (overwriting un-needed 'this' arg)
5384 * and leaving original spot of first arg as placeholder in stack so
5385 * when callee pops stack everything works.
5388 start = code = mono_global_codeman_reserve (code_reserve);
5390 /* store delegate for access to method_ptr */
5391 x86_mov_reg_membase (code, X86_ECX, X86_ESP, 4, 4);
5394 for (i = 0; i < sig->param_count; ++i) {
5395 x86_mov_reg_membase (code, X86_EAX, X86_ESP, (i+2)*4, 4);
5396 x86_mov_membase_reg (code, X86_ESP, (i+1)*4, X86_EAX, 4);
5399 x86_jump_membase (code, X86_ECX, G_STRUCT_OFFSET (MonoDelegate, method_ptr));
5401 g_assert ((code - start) < code_reserve);
5403 mono_debug_add_delegate_trampoline (start, code - start);
5405 mono_memory_barrier ();
5407 cache [sig->param_count] = start;
5414 mono_arch_context_get_int_reg (MonoContext *ctx, int reg)
5417 case X86_ECX: return (gpointer)ctx->ecx;
5418 case X86_EDX: return (gpointer)ctx->edx;
5419 case X86_EBP: return (gpointer)ctx->ebp;
5420 case X86_ESP: return (gpointer)ctx->esp;
5421 default: return ((gpointer)(&ctx->eax)[reg]);
5425 #ifdef MONO_ARCH_SIMD_INTRINSICS
5428 get_float_to_x_spill_area (MonoCompile *cfg)
5430 if (!cfg->fconv_to_r8_x_var) {
5431 cfg->fconv_to_r8_x_var = mono_compile_create_var (cfg, &mono_defaults.double_class->byval_arg, OP_LOCAL);
5432 cfg->fconv_to_r8_x_var->flags |= MONO_INST_VOLATILE; /*FIXME, use the don't regalloc flag*/
5434 return cfg->fconv_to_r8_x_var;
5438 * Convert all fconv opts that MONO_OPT_SSE2 would get wrong.
5441 mono_arch_decompose_opts (MonoCompile *cfg, MonoInst *ins)
5445 int dreg, src_opcode;
5446 g_assert (cfg->new_ir);
5448 if (!(cfg->opt & MONO_OPT_SSE2) || !(cfg->opt & MONO_OPT_SIMD))
5451 switch (src_opcode = ins->opcode) {
5452 case OP_FCONV_TO_I1:
5453 case OP_FCONV_TO_U1:
5454 case OP_FCONV_TO_I2:
5455 case OP_FCONV_TO_U2:
5456 case OP_FCONV_TO_I4:
5463 /* dreg is the IREG and sreg1 is the FREG */
5464 MONO_INST_NEW (cfg, fconv, OP_FCONV_TO_R8_X);
5465 fconv->klass = NULL; /*FIXME, what can I use here as the Mono.Simd lib might not be loaded yet*/
5466 fconv->sreg1 = ins->sreg1;
5467 fconv->dreg = mono_alloc_ireg (cfg);
5468 fconv->type = STACK_VTYPE;
5469 fconv->backend.spill_var = get_float_to_x_spill_area (cfg);
5471 mono_bblock_insert_before_ins (cfg->cbb, ins, fconv);
5475 ins->opcode = OP_XCONV_R8_TO_I4;
5477 ins->klass = mono_defaults.int32_class;
5478 ins->sreg1 = fconv->dreg;
5480 ins->type = STACK_I4;
5481 ins->backend.source_opcode = src_opcode;