2 * mini-x86.c: x86 backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
9 * (C) 2003 Ximian, Inc.
15 #include <mono/metadata/appdomain.h>
16 #include <mono/metadata/debug-helpers.h>
17 #include <mono/metadata/profiler-private.h>
18 #include <mono/utils/mono-math.h>
23 #include "cpu-pentium.h"
25 static gint lmf_tls_offset = -1;
28 /* Under windows, the default pinvoke calling convention is stdcall */
29 #define CALLCONV_IS_STDCALL(call_conv) (((call_conv) == MONO_CALL_STDCALL) || ((call_conv) == MONO_CALL_DEFAULT))
31 #define CALLCONV_IS_STDCALL(call_conv) ((call_conv) == MONO_CALL_STDCALL)
34 #define SIGNAL_STACK_SIZE (64 * 1024)
36 static gpointer mono_arch_get_lmf_addr (void);
39 mono_arch_regname (int reg) {
41 case X86_EAX: return "%eax";
42 case X86_EBX: return "%ebx";
43 case X86_ECX: return "%ecx";
44 case X86_EDX: return "%edx";
45 case X86_ESP: return "%esp"; case X86_EBP: return "%ebp";
46 case X86_EDI: return "%edi";
47 case X86_ESI: return "%esi";
53 * mono_arch_get_argument_info:
54 * @csig: a method signature
55 * @param_count: the number of parameters to consider
56 * @arg_info: an array to store the result infos
58 * Gathers information on parameters such as size, alignment and
59 * padding. arg_info should be large enought to hold param_count + 1 entries.
61 * Returns the size of the activation frame.
64 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
66 int k, frame_size = 0;
70 if (MONO_TYPE_ISSTRUCT (csig->ret)) {
71 frame_size += sizeof (gpointer);
75 arg_info [0].offset = offset;
78 frame_size += sizeof (gpointer);
82 arg_info [0].size = frame_size;
84 for (k = 0; k < param_count; k++) {
87 size = mono_type_native_stack_size (csig->params [k], &align);
89 size = mono_type_stack_size (csig->params [k], &align);
91 /* ignore alignment for now */
94 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
95 arg_info [k].pad = pad;
97 arg_info [k + 1].pad = 0;
98 arg_info [k + 1].size = size;
100 arg_info [k + 1].offset = offset;
104 align = MONO_ARCH_FRAME_ALIGNMENT;
105 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
106 arg_info [k].pad = pad;
111 static const guchar cpuid_impl [] = {
112 0x55, /* push %ebp */
113 0x89, 0xe5, /* mov %esp,%ebp */
114 0x53, /* push %ebx */
115 0x8b, 0x45, 0x08, /* mov 0x8(%ebp),%eax */
116 0x0f, 0xa2, /* cpuid */
117 0x50, /* push %eax */
118 0x8b, 0x45, 0x10, /* mov 0x10(%ebp),%eax */
119 0x89, 0x18, /* mov %ebx,(%eax) */
120 0x8b, 0x45, 0x14, /* mov 0x14(%ebp),%eax */
121 0x89, 0x08, /* mov %ecx,(%eax) */
122 0x8b, 0x45, 0x18, /* mov 0x18(%ebp),%eax */
123 0x89, 0x10, /* mov %edx,(%eax) */
125 0x8b, 0x55, 0x0c, /* mov 0xc(%ebp),%edx */
126 0x89, 0x02, /* mov %eax,(%edx) */
132 typedef void (*CpuidFunc) (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx);
135 cpuid (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx)
138 __asm__ __volatile__ (
141 "movl %%eax, %%edx\n"
142 "xorl $0x200000, %%eax\n"
147 "xorl %%edx, %%eax\n"
148 "andl $0x200000, %%eax\n"
156 CpuidFunc func = (CpuidFunc)cpuid_impl;
157 func (id, p_eax, p_ebx, p_ecx, p_edx);
159 * We use this approach because of issues with gcc and pic code, see:
160 * http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=7329
161 __asm__ __volatile__ ("cpuid"
162 : "=a" (*p_eax), "=b" (*p_ebx), "=c" (*p_ecx), "=d" (*p_edx)
171 * Initialize the cpu to execute managed code.
174 mono_arch_cpu_init (void)
178 /* spec compliance requires running with double precision */
179 __asm__ __volatile__ ("fnstcw %0\n": "=m" (fpcw));
180 fpcw &= ~X86_FPCW_PRECC_MASK;
181 fpcw |= X86_FPCW_PREC_DOUBLE;
182 __asm__ __volatile__ ("fldcw %0\n": : "m" (fpcw));
183 __asm__ __volatile__ ("fnstcw %0\n": "=m" (fpcw));
188 * This function returns the optimizations supported on this cpu.
191 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
193 int eax, ebx, ecx, edx;
197 /* Feature Flags function, flags returned in EDX. */
198 if (cpuid (1, &eax, &ebx, &ecx, &edx)) {
199 if (edx & (1 << 15)) {
200 opts |= MONO_OPT_CMOV;
202 opts |= MONO_OPT_FCMOV;
204 *exclude_mask |= MONO_OPT_FCMOV;
206 *exclude_mask |= MONO_OPT_CMOV;
212 is_regsize_var (MonoType *t) {
221 case MONO_TYPE_OBJECT:
222 case MONO_TYPE_STRING:
223 case MONO_TYPE_CLASS:
224 case MONO_TYPE_SZARRAY:
225 case MONO_TYPE_ARRAY:
227 case MONO_TYPE_VALUETYPE:
228 if (t->data.klass->enumtype)
229 return is_regsize_var (t->data.klass->enum_basetype);
236 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
241 for (i = 0; i < cfg->num_varinfo; i++) {
242 MonoInst *ins = cfg->varinfo [i];
243 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
246 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
249 if ((ins->flags & (MONO_INST_IS_DEAD|MONO_INST_VOLATILE|MONO_INST_INDIRECT)) ||
250 (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
253 /* we dont allocate I1 to registers because there is no simply way to sign extend
254 * 8bit quantities in caller saved registers on x86 */
255 if (is_regsize_var (ins->inst_vtype) || (ins->inst_vtype->type == MONO_TYPE_BOOLEAN) ||
256 (ins->inst_vtype->type == MONO_TYPE_U1) || (ins->inst_vtype->type == MONO_TYPE_U2)||
257 (ins->inst_vtype->type == MONO_TYPE_I2) || (ins->inst_vtype->type == MONO_TYPE_CHAR)) {
258 g_assert (MONO_VARINFO (cfg, i)->reg == -1);
259 g_assert (i == vmv->idx);
260 vars = g_list_prepend (vars, vmv);
264 vars = mono_varlist_sort (cfg, vars, 0);
270 mono_arch_get_global_int_regs (MonoCompile *cfg)
274 /* we can use 3 registers for global allocation */
275 regs = g_list_prepend (regs, (gpointer)X86_EBX);
276 regs = g_list_prepend (regs, (gpointer)X86_ESI);
277 regs = g_list_prepend (regs, (gpointer)X86_EDI);
283 * mono_arch_regalloc_cost:
285 * Return the cost, in number of memory references, of the action of
286 * allocating the variable VMV into a register during global register
290 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
292 MonoInst *ins = cfg->varinfo [vmv->idx];
294 if (cfg->method->save_lmf)
295 /* The register is already saved */
296 return (ins->opcode == OP_ARG) ? 1 : 0;
298 /* push+pop+possible load if it is an argument */
299 return (ins->opcode == OP_ARG) ? 3 : 2;
303 * Set var information according to the calling convention. X86 version.
304 * The locals var stuff should most likely be split in another method.
307 mono_arch_allocate_vars (MonoCompile *m)
309 MonoMethodSignature *sig;
310 MonoMethodHeader *header;
312 int i, offset, size, align, curinst;
314 header = ((MonoMethodNormal *)m->method)->header;
316 sig = m->method->signature;
320 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
321 m->ret->opcode = OP_REGOFFSET;
322 m->ret->inst_basereg = X86_EBP;
323 m->ret->inst_offset = offset;
324 offset += sizeof (gpointer);
326 /* FIXME: handle long and FP values */
327 switch (sig->ret->type) {
331 m->ret->opcode = OP_REGVAR;
332 m->ret->inst_c0 = X86_EAX;
337 inst = m->varinfo [curinst];
338 if (inst->opcode != OP_REGVAR) {
339 inst->opcode = OP_REGOFFSET;
340 inst->inst_basereg = X86_EBP;
342 inst->inst_offset = offset;
343 offset += sizeof (gpointer);
347 if (sig->call_convention == MONO_CALL_VARARG) {
348 m->sig_cookie = offset;
349 offset += sizeof (gpointer);
352 for (i = 0; i < sig->param_count; ++i) {
353 inst = m->varinfo [curinst];
354 if (inst->opcode != OP_REGVAR) {
355 inst->opcode = OP_REGOFFSET;
356 inst->inst_basereg = X86_EBP;
358 inst->inst_offset = offset;
359 size = mono_type_size (sig->params [i], &align);
368 /* reserve space to save LMF and caller saved registers */
370 if (m->method->save_lmf) {
371 offset += sizeof (MonoLMF);
373 if (m->used_int_regs & (1 << X86_EBX)) {
377 if (m->used_int_regs & (1 << X86_EDI)) {
381 if (m->used_int_regs & (1 << X86_ESI)) {
386 for (i = curinst; i < m->num_varinfo; ++i) {
387 inst = m->varinfo [i];
389 if ((inst->flags & MONO_INST_IS_DEAD) || inst->opcode == OP_REGVAR)
392 /* inst->unused indicates native sized value types, this is used by the
393 * pinvoke wrappers when they call functions returning structure */
394 if (inst->unused && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
395 size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
397 size = mono_type_size (inst->inst_vtype, &align);
401 offset &= ~(align - 1);
402 inst->opcode = OP_REGOFFSET;
403 inst->inst_basereg = X86_EBP;
404 inst->inst_offset = -offset;
405 //g_print ("allocating local %d to %d\n", i, -offset);
407 offset += (MONO_ARCH_FRAME_ALIGNMENT - 1);
408 offset &= ~(MONO_ARCH_FRAME_ALIGNMENT - 1);
411 m->stack_offset = -offset;
414 /* Fixme: we need an alignment solution for enter_method and mono_arch_call_opcode,
415 * currently alignment in mono_arch_call_opcode is computed without arch_get_argument_info
419 * take the arguments and generate the arch-specific
420 * instructions to properly call the function in call.
421 * This includes pushing, moving arguments to the right register
423 * Issue: who does the spilling if needed, and when?
426 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
428 MonoMethodSignature *sig;
429 int i, n, stack_size, type;
433 /* add the vararg cookie before the non-implicit args */
434 if (call->signature->call_convention == MONO_CALL_VARARG) {
436 /* FIXME: Add support for signature tokens to AOT */
437 cfg->disable_aot = TRUE;
438 MONO_INST_NEW (cfg, arg, OP_OUTARG);
439 MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
440 sig_arg->inst_p0 = call->signature;
441 arg->inst_left = sig_arg;
442 arg->type = STACK_PTR;
443 /* prepend, so they get reversed */
444 arg->next = call->out_args;
445 call->out_args = arg;
446 stack_size += sizeof (gpointer);
448 sig = call->signature;
449 n = sig->param_count + sig->hasthis;
451 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret))
452 stack_size += sizeof (gpointer);
453 for (i = 0; i < n; ++i) {
454 if (is_virtual && i == 0) {
455 /* the argument will be attached to the call instrucion */
459 MONO_INST_NEW (cfg, arg, OP_OUTARG);
461 arg->cil_code = in->cil_code;
463 arg->type = in->type;
464 /* prepend, so they get reversed */
465 arg->next = call->out_args;
466 call->out_args = arg;
467 if (i >= sig->hasthis) {
468 ptype = sig->params [i - sig->hasthis];
474 /* FIXME: validate arguments... */
478 case MONO_TYPE_BOOLEAN:
486 case MONO_TYPE_STRING:
487 case MONO_TYPE_CLASS:
488 case MONO_TYPE_OBJECT:
490 case MONO_TYPE_FNPTR:
491 case MONO_TYPE_ARRAY:
492 case MONO_TYPE_SZARRAY:
501 arg->opcode = OP_OUTARG_R4;
505 arg->opcode = OP_OUTARG_R8;
507 case MONO_TYPE_VALUETYPE:
508 if (MONO_TYPE_ISSTRUCT (ptype)) {
511 size = mono_type_native_stack_size (&in->klass->byval_arg, NULL);
513 size = mono_type_stack_size (&in->klass->byval_arg, NULL);
516 arg->opcode = OP_OUTARG_VT;
517 arg->klass = in->klass;
518 arg->unused = sig->pinvoke;
519 arg->inst_imm = size;
521 type = ptype->data.klass->enum_basetype->type;
525 case MONO_TYPE_TYPEDBYREF:
526 stack_size += sizeof (MonoTypedRef);
527 arg->opcode = OP_OUTARG_VT;
528 arg->klass = in->klass;
529 arg->unused = sig->pinvoke;
530 arg->inst_imm = sizeof (MonoTypedRef);
532 case MONO_TYPE_GENERICINST:
533 type = ptype->data.generic_inst->generic_type->type;
537 g_error ("unknown type 0x%02x in mono_arch_call_opcode\n", type);
540 /* the this argument */
545 /* if the function returns a struct, the called method already does a ret $0x4 */
546 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret))
548 call->stack_usage = stack_size;
550 * should set more info in call, such as the stack space
551 * used by the args that needs to be added back to esp
558 * Allow tracing to work with this interface (with an optional argument)
562 * This may be needed on some archs or for debugging support.
565 mono_arch_instrument_mem_needs (MonoMethod *method, int *stack, int *code)
567 /* no stack room needed now (may be needed for FASTCALL-trace support) */
569 /* split prolog-epilog requirements? */
570 *code = 50; /* max bytes needed: check this number */
574 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
578 /* if some args are passed in registers, we need to save them here */
579 x86_push_reg (code, X86_EBP);
580 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, cfg->method);
581 x86_push_imm (code, cfg->method);
582 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
583 x86_call_code (code, 0);
584 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
598 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
601 int arg_size = 0, save_mode = SAVE_NONE;
602 MonoMethod *method = cfg->method;
603 int rtype = method->signature->ret->type;
608 /* special case string .ctor icall */
609 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
610 save_mode = SAVE_EAX;
612 save_mode = SAVE_NONE;
616 save_mode = SAVE_EAX_EDX;
622 case MONO_TYPE_VALUETYPE:
623 if (method->signature->ret->data.klass->enumtype) {
624 rtype = method->signature->ret->data.klass->enum_basetype->type;
627 save_mode = SAVE_STRUCT;
630 save_mode = SAVE_EAX;
636 x86_push_reg (code, X86_EDX);
637 x86_push_reg (code, X86_EAX);
638 if (enable_arguments) {
639 x86_push_reg (code, X86_EDX);
640 x86_push_reg (code, X86_EAX);
645 x86_push_reg (code, X86_EAX);
646 if (enable_arguments) {
647 x86_push_reg (code, X86_EAX);
652 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
653 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
654 if (enable_arguments) {
655 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
656 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
661 if (enable_arguments) {
662 x86_push_membase (code, X86_EBP, 8);
672 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, method);
673 x86_push_imm (code, method);
674 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
675 x86_call_code (code, 0);
676 x86_alu_reg_imm (code, X86_ADD, X86_ESP, arg_size + 4);
680 x86_pop_reg (code, X86_EAX);
681 x86_pop_reg (code, X86_EDX);
684 x86_pop_reg (code, X86_EAX);
687 x86_fld_membase (code, X86_ESP, 0, TRUE);
688 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
698 #define EMIT_COND_BRANCH(ins,cond,sign) \
699 if (ins->flags & MONO_INST_BRLABEL) { \
700 if (ins->inst_i0->inst_c0) { \
701 x86_branch (code, cond, cfg->native_code + ins->inst_i0->inst_c0, sign); \
703 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
704 x86_branch32 (code, cond, 0, sign); \
707 if (ins->inst_true_bb->native_offset) { \
708 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
710 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
711 if ((cfg->opt & MONO_OPT_BRANCH) && \
712 x86_is_imm8 (ins->inst_true_bb->max_offset - cpos)) \
713 x86_branch8 (code, cond, 0, sign); \
715 x86_branch32 (code, cond, 0, sign); \
719 /* emit an exception if condition is fail */
720 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
722 mono_add_patch_info (cfg, code - cfg->native_code, \
723 MONO_PATCH_INFO_EXC, exc_name); \
724 x86_branch32 (code, cond, 0, signed); \
727 #define EMIT_FPCOMPARE(code) do { \
732 /* FIXME: Add more instructions */
733 #define INST_IGNORES_CFLAGS(ins) (((ins)->opcode == CEE_BR) || ((ins)->opcode == OP_STORE_MEMBASE_IMM))
736 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
738 MonoInst *ins, *last_ins = NULL;
743 switch (ins->opcode) {
745 /* reg = 0 -> XOR (reg, reg) */
746 /* XOR sets cflags on x86, so we cant do it always */
747 if (ins->inst_c0 == 0 && ins->next && INST_IGNORES_CFLAGS (ins->next)) {
748 ins->opcode = CEE_XOR;
749 ins->sreg1 = ins->dreg;
750 ins->sreg2 = ins->dreg;
754 /* remove unnecessary multiplication with 1 */
755 if (ins->inst_imm == 1) {
756 if (ins->dreg != ins->sreg1) {
757 ins->opcode = OP_MOVE;
759 last_ins->next = ins->next;
766 /* OP_COMPARE_IMM (reg, 0) --> OP_X86_TEST_NULL (reg) */
767 if (ins->inst_imm == 0 && ins->next &&
768 (ins->next->opcode == CEE_BEQ || ins->next->opcode == CEE_BNE_UN ||
769 ins->next->opcode == OP_CEQ)) {
770 ins->opcode = OP_X86_TEST_NULL;
773 case OP_LOAD_MEMBASE:
774 case OP_LOADI4_MEMBASE:
776 * OP_STORE_MEMBASE_REG reg, offset(basereg)
777 * OP_LOAD_MEMBASE offset(basereg), reg
779 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
780 || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
781 ins->inst_basereg == last_ins->inst_destbasereg &&
782 ins->inst_offset == last_ins->inst_offset) {
783 if (ins->dreg == last_ins->sreg1) {
784 last_ins->next = ins->next;
788 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
789 ins->opcode = OP_MOVE;
790 ins->sreg1 = last_ins->sreg1;
794 * Note: reg1 must be different from the basereg in the second load
795 * OP_LOAD_MEMBASE offset(basereg), reg1
796 * OP_LOAD_MEMBASE offset(basereg), reg2
798 * OP_LOAD_MEMBASE offset(basereg), reg1
801 } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
802 || last_ins->opcode == OP_LOAD_MEMBASE) &&
803 ins->inst_basereg != last_ins->dreg &&
804 ins->inst_basereg == last_ins->inst_basereg &&
805 ins->inst_offset == last_ins->inst_offset) {
807 if (ins->dreg == last_ins->dreg) {
808 last_ins->next = ins->next;
812 ins->opcode = OP_MOVE;
813 ins->sreg1 = last_ins->dreg;
816 //g_assert_not_reached ();
820 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
821 * OP_LOAD_MEMBASE offset(basereg), reg
823 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
826 } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
827 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
828 ins->inst_basereg == last_ins->inst_destbasereg &&
829 ins->inst_offset == last_ins->inst_offset) {
830 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
831 ins->opcode = OP_ICONST;
832 ins->inst_c0 = last_ins->inst_imm;
833 g_assert_not_reached (); // check this rule
837 case OP_LOADU1_MEMBASE:
838 case OP_LOADI1_MEMBASE:
840 * FIXME: Missing explanation
842 if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
843 ins->inst_basereg == last_ins->inst_destbasereg &&
844 ins->inst_offset == last_ins->inst_offset) {
845 if (ins->dreg == last_ins->sreg1) {
846 last_ins->next = ins->next;
850 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
851 ins->opcode = OP_MOVE;
852 ins->sreg1 = last_ins->sreg1;
856 case OP_LOADU2_MEMBASE:
857 case OP_LOADI2_MEMBASE:
859 * FIXME: Missing explanation
861 if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
862 ins->inst_basereg == last_ins->inst_destbasereg &&
863 ins->inst_offset == last_ins->inst_offset) {
864 if (ins->dreg == last_ins->sreg1) {
865 last_ins->next = ins->next;
869 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
870 ins->opcode = OP_MOVE;
871 ins->sreg1 = last_ins->sreg1;
881 if (ins->dreg == ins->sreg1) {
883 last_ins->next = ins->next;
891 if (last_ins && last_ins->opcode == OP_MOVE &&
892 ins->sreg1 == last_ins->dreg &&
893 ins->dreg == last_ins->sreg1) {
894 last_ins->next = ins->next;
903 bb->last_ins = last_ins;
907 branch_cc_table [] = {
908 X86_CC_EQ, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
909 X86_CC_NE, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
910 X86_CC_O, X86_CC_NO, X86_CC_C, X86_CC_NC
913 #define DEBUG(a) if (cfg->verbose_level > 1) a
917 * returns the offset used by spillvar. It allocates a new
918 * spill variable if necessary.
921 mono_spillvar_offset (MonoCompile *cfg, int spillvar)
923 MonoSpillInfo **si, *info;
926 si = &cfg->spill_info;
928 while (i <= spillvar) {
931 *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
933 cfg->stack_offset -= sizeof (gpointer);
934 info->offset = cfg->stack_offset;
938 return (*si)->offset;
944 g_assert_not_reached ();
949 * returns the offset used by spillvar. It allocates a new
950 * spill float variable if necessary.
951 * (same as mono_spillvar_offset but for float)
954 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
956 MonoSpillInfo **si, *info;
959 si = &cfg->spill_info_float;
961 while (i <= spillvar) {
964 *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
966 cfg->stack_offset -= sizeof (double);
967 info->offset = cfg->stack_offset;
971 return (*si)->offset;
977 g_assert_not_reached ();
982 * Creates a store for spilled floating point items
985 create_spilled_store_float (MonoCompile *cfg, int spill, int reg, MonoInst *ins)
988 MONO_INST_NEW (cfg, store, OP_STORER8_MEMBASE_REG);
990 store->inst_destbasereg = X86_EBP;
991 store->inst_offset = mono_spillvar_offset_float (cfg, spill);
993 DEBUG (g_print ("SPILLED FLOAT STORE (%d at 0x%08x(%%sp)) (from %d)\n", spill, store->inst_offset, reg));
998 * Creates a load for spilled floating point items
1001 create_spilled_load_float (MonoCompile *cfg, int spill, int reg, MonoInst *ins)
1004 MONO_INST_NEW (cfg, load, OP_LOADR8_SPILL_MEMBASE);
1006 load->inst_basereg = X86_EBP;
1007 load->inst_offset = mono_spillvar_offset_float (cfg, spill);
1009 DEBUG (g_print ("SPILLED FLOAT LOAD (%d at 0x%08x(%%sp)) (from %d)\n", spill, load->inst_offset, reg));
1013 #define reg_is_freeable(r) ((r) >= 0 && (r) <= 7 && X86_IS_CALLEE ((r)))
1020 int flags; /* used to track fp spill/load */
1023 static const char*const * ins_spec = pentium_desc;
1026 print_ins (int i, MonoInst *ins)
1028 const char *spec = ins_spec [ins->opcode];
1029 g_print ("\t%-2d %s", i, mono_inst_name (ins->opcode));
1030 if (spec [MONO_INST_DEST]) {
1031 if (ins->dreg >= MONO_MAX_IREGS)
1032 g_print (" R%d <-", ins->dreg);
1034 g_print (" %s <-", mono_arch_regname (ins->dreg));
1036 if (spec [MONO_INST_SRC1]) {
1037 if (ins->sreg1 >= MONO_MAX_IREGS)
1038 g_print (" R%d", ins->sreg1);
1040 g_print (" %s", mono_arch_regname (ins->sreg1));
1042 if (spec [MONO_INST_SRC2]) {
1043 if (ins->sreg2 >= MONO_MAX_IREGS)
1044 g_print (" R%d", ins->sreg2);
1046 g_print (" %s", mono_arch_regname (ins->sreg2));
1048 if (spec [MONO_INST_CLOB])
1049 g_print (" clobbers: %c", spec [MONO_INST_CLOB]);
1054 print_regtrack (RegTrack *t, int num)
1060 for (i = 0; i < num; ++i) {
1063 if (i >= MONO_MAX_IREGS) {
1064 g_snprintf (buf, sizeof(buf), "R%d", i);
1067 r = mono_arch_regname (i);
1068 g_print ("liveness: %s [%d - %d]\n", r, t [i].born_in, t[i].last_use);
1072 typedef struct InstList InstList;
1080 static inline InstList*
1081 inst_list_prepend (MonoMemPool *pool, InstList *list, MonoInst *data)
1083 InstList *item = mono_mempool_alloc (pool, sizeof (InstList));
1093 * Force the spilling of the variable in the symbolic register 'reg'.
1096 get_register_force_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, int reg)
1101 sel = cfg->rs->iassign [reg];
1102 /*i = cfg->rs->isymbolic [sel];
1103 g_assert (i == reg);*/
1105 spill = ++cfg->spill_count;
1106 cfg->rs->iassign [i] = -spill - 1;
1107 mono_regstate_free_int (cfg->rs, sel);
1108 /* we need to create a spill var and insert a load to sel after the current instruction */
1109 MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1111 load->inst_basereg = X86_EBP;
1112 load->inst_offset = mono_spillvar_offset (cfg, spill);
1114 while (ins->next != item->prev->data)
1117 load->next = ins->next;
1119 DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%ebp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1120 i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1121 g_assert (i == sel);
1127 get_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, guint32 regmask, int reg)
1132 DEBUG (g_print ("start regmask to assign R%d: 0x%08x (R%d <- R%d R%d)\n", reg, regmask, ins->dreg, ins->sreg1, ins->sreg2));
1133 /* exclude the registers in the current instruction */
1134 if (reg != ins->sreg1 && (reg_is_freeable (ins->sreg1) || (ins->sreg1 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg1] >= 0))) {
1135 if (ins->sreg1 >= MONO_MAX_IREGS)
1136 regmask &= ~ (1 << cfg->rs->iassign [ins->sreg1]);
1138 regmask &= ~ (1 << ins->sreg1);
1139 DEBUG (g_print ("excluding sreg1 %s\n", mono_arch_regname (ins->sreg1)));
1141 if (reg != ins->sreg2 && (reg_is_freeable (ins->sreg2) || (ins->sreg2 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg2] >= 0))) {
1142 if (ins->sreg2 >= MONO_MAX_IREGS)
1143 regmask &= ~ (1 << cfg->rs->iassign [ins->sreg2]);
1145 regmask &= ~ (1 << ins->sreg2);
1146 DEBUG (g_print ("excluding sreg2 %s %d\n", mono_arch_regname (ins->sreg2), ins->sreg2));
1148 if (reg != ins->dreg && reg_is_freeable (ins->dreg)) {
1149 regmask &= ~ (1 << ins->dreg);
1150 DEBUG (g_print ("excluding dreg %s\n", mono_arch_regname (ins->dreg)));
1153 DEBUG (g_print ("available regmask: 0x%08x\n", regmask));
1154 g_assert (regmask); /* need at least a register we can free */
1156 /* we should track prev_use and spill the register that's farther */
1157 for (i = 0; i < MONO_MAX_IREGS; ++i) {
1158 if (regmask & (1 << i)) {
1160 DEBUG (g_print ("selected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->iassign [sel]));
1164 i = cfg->rs->isymbolic [sel];
1165 spill = ++cfg->spill_count;
1166 cfg->rs->iassign [i] = -spill - 1;
1167 mono_regstate_free_int (cfg->rs, sel);
1168 /* we need to create a spill var and insert a load to sel after the current instruction */
1169 MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1171 load->inst_basereg = X86_EBP;
1172 load->inst_offset = mono_spillvar_offset (cfg, spill);
1174 while (ins->next != item->prev->data)
1177 load->next = ins->next;
1179 DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%ebp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1180 i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1181 g_assert (i == sel);
1187 create_copy_ins (MonoCompile *cfg, int dest, int src, MonoInst *ins)
1190 MONO_INST_NEW (cfg, copy, OP_MOVE);
1194 copy->next = ins->next;
1197 DEBUG (g_print ("\tforced copy from %s to %s\n", mono_arch_regname (src), mono_arch_regname (dest)));
1202 create_spilled_store (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins)
1205 MONO_INST_NEW (cfg, store, OP_STORE_MEMBASE_REG);
1207 store->inst_destbasereg = X86_EBP;
1208 store->inst_offset = mono_spillvar_offset (cfg, spill);
1210 store->next = ins->next;
1213 DEBUG (g_print ("SPILLED STORE (%d at 0x%08x(%%ebp)) R%d (from %s)\n", spill, store->inst_offset, prev_reg, mono_arch_regname (reg)));
1218 insert_before_ins (MonoInst *ins, InstList *item, MonoInst* to_insert)
1222 prev = item->next->data;
1224 while (prev->next != ins)
1226 to_insert->next = ins;
1227 prev->next = to_insert;
1229 to_insert->next = ins;
1232 * needed otherwise in the next instruction we can add an ins to the
1233 * end and that would get past this instruction.
1235 item->data = to_insert;
1241 alloc_int_reg (MonoCompile *cfg, InstList *curinst, MonoInst *ins, int sym_reg, guint32 allow_mask)
1243 int val = cfg->rs->iassign [sym_reg];
1247 /* the register gets spilled after this inst */
1250 val = mono_regstate_alloc_int (cfg->rs, allow_mask);
1252 val = get_register_spilling (cfg, curinst, ins, allow_mask, sym_reg);
1253 cfg->rs->iassign [sym_reg] = val;
1254 /* add option to store before the instruction for src registers */
1256 create_spilled_store (cfg, spill, val, sym_reg, ins);
1258 cfg->rs->isymbolic [val] = sym_reg;
1263 /* flags used in reginfo->flags */
1264 #define MONO_X86_FP_NEEDS_LOAD_SPILL 1
1265 #define MONO_X86_FP_NEEDS_SPILL 2
1266 #define MONO_X86_FP_NEEDS_LOAD 4
1268 /*#include "cprop.c"*/
1271 * Local register allocation.
1272 * We first scan the list of instructions and we save the liveness info of
1273 * each register (when the register is first used, when it's value is set etc.).
1274 * We also reverse the list of instructions (in the InstList list) because assigning
1275 * registers backwards allows for more tricks to be used.
1278 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1281 MonoRegState *rs = cfg->rs;
1282 int i, val, fpcount;
1283 RegTrack *reginfo, *reginfof;
1284 RegTrack *reginfo1, *reginfo2, *reginfod;
1285 InstList *tmp, *reversed = NULL;
1287 guint32 src1_mask, src2_mask, dest_mask;
1288 GList *fspill_list = NULL;
1293 rs->next_vireg = bb->max_ireg;
1294 rs->next_vfreg = bb->max_freg;
1295 mono_regstate_assign (rs);
1296 reginfo = g_malloc0 (sizeof (RegTrack) * rs->next_vireg);
1297 reginfof = g_malloc0 (sizeof (RegTrack) * rs->next_vfreg);
1298 rs->ifree_mask = X86_CALLEE_REGS;
1302 /*if (cfg->opt & MONO_OPT_COPYPROP)
1303 local_copy_prop (cfg, ins);*/
1307 DEBUG (g_print ("LOCAL regalloc: basic block: %d\n", bb->block_num));
1308 /* forward pass on the instructions to collect register liveness info */
1310 spec = ins_spec [ins->opcode];
1312 DEBUG (print_ins (i, ins));
1314 if (spec [MONO_INST_SRC1]) {
1315 if (spec [MONO_INST_SRC1] == 'f') {
1317 reginfo1 = reginfof;
1319 spill = g_list_first (fspill_list);
1320 if (spill && fpcount < MONO_MAX_FREGS) {
1321 reginfo1 [ins->sreg1].flags |= MONO_X86_FP_NEEDS_LOAD;
1322 fspill_list = g_list_remove (fspill_list, spill->data);
1328 reginfo1 [ins->sreg1].prev_use = reginfo1 [ins->sreg1].last_use;
1329 reginfo1 [ins->sreg1].last_use = i;
1333 if (spec [MONO_INST_SRC2]) {
1334 if (spec [MONO_INST_SRC2] == 'f') {
1336 reginfo2 = reginfof;
1337 spill = g_list_first (fspill_list);
1339 reginfo2 [ins->sreg2].flags |= MONO_X86_FP_NEEDS_LOAD;
1340 fspill_list = g_list_remove (fspill_list, spill->data);
1341 if (fpcount >= MONO_MAX_FREGS) {
1343 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
1344 reginfo2 [ins->sreg2].flags |= MONO_X86_FP_NEEDS_LOAD_SPILL;
1351 reginfo2 [ins->sreg2].prev_use = reginfo2 [ins->sreg2].last_use;
1352 reginfo2 [ins->sreg2].last_use = i;
1356 if (spec [MONO_INST_DEST]) {
1357 if (spec [MONO_INST_DEST] == 'f') {
1358 reginfod = reginfof;
1359 if (fpcount >= MONO_MAX_FREGS) {
1360 reginfod [ins->dreg].flags |= MONO_X86_FP_NEEDS_SPILL;
1362 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
1369 if (spec [MONO_INST_DEST] != 'b') /* it's not just a base register */
1370 reginfod [ins->dreg].killed_in = i;
1371 reginfod [ins->dreg].prev_use = reginfod [ins->dreg].last_use;
1372 reginfod [ins->dreg].last_use = i;
1373 if (reginfod [ins->dreg].born_in == 0 || reginfod [ins->dreg].born_in > i)
1374 reginfod [ins->dreg].born_in = i;
1375 if (spec [MONO_INST_DEST] == 'l') {
1376 /* result in eax:edx, the virtual register is allocated sequentially */
1377 reginfod [ins->dreg + 1].prev_use = reginfod [ins->dreg + 1].last_use;
1378 reginfod [ins->dreg + 1].last_use = i;
1379 if (reginfod [ins->dreg + 1].born_in == 0 || reginfod [ins->dreg + 1].born_in > i)
1380 reginfod [ins->dreg + 1].born_in = i;
1385 reversed = inst_list_prepend (cfg->mempool, reversed, ins);
1390 // todo: check if we have anything left on fp stack, in verify mode?
1393 DEBUG (print_regtrack (reginfo, rs->next_vireg));
1394 DEBUG (print_regtrack (reginfof, rs->next_vfreg));
1397 int prev_dreg, prev_sreg1, prev_sreg2;
1398 dest_mask = src1_mask = src2_mask = X86_CALLEE_REGS;
1401 spec = ins_spec [ins->opcode];
1403 DEBUG (g_print ("processing:"));
1404 DEBUG (print_ins (i, ins));
1405 if (spec [MONO_INST_CLOB] == 's') {
1406 if (rs->ifree_mask & (1 << X86_ECX)) {
1407 DEBUG (g_print ("\tshortcut assignment of R%d to ECX\n", ins->sreg2));
1408 rs->iassign [ins->sreg2] = X86_ECX;
1409 rs->isymbolic [X86_ECX] = ins->sreg2;
1410 ins->sreg2 = X86_ECX;
1411 rs->ifree_mask &= ~ (1 << X86_ECX);
1413 int need_ecx_spill = TRUE;
1415 * we first check if src1/dreg is already assigned a register
1416 * and then we force a spill of the var assigned to ECX.
1418 /* the destination register can't be ECX */
1419 dest_mask &= ~ (1 << X86_ECX);
1420 src1_mask &= ~ (1 << X86_ECX);
1421 val = rs->iassign [ins->dreg];
1423 * the destination register is already assigned to ECX:
1424 * we need to allocate another register for it and then
1425 * copy from this to ECX.
1427 if (val == X86_ECX && ins->dreg != ins->sreg2) {
1428 int new_dest = mono_regstate_alloc_int (rs, dest_mask);
1430 new_dest = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1431 g_assert (new_dest >= 0);
1432 ins->dreg = new_dest;
1433 create_copy_ins (cfg, X86_ECX, new_dest, ins);
1434 need_ecx_spill = FALSE;
1435 /*DEBUG (g_print ("\tforced spill of R%d\n", ins->dreg));
1436 val = get_register_force_spilling (cfg, tmp, ins, ins->dreg);
1437 rs->iassign [ins->dreg] = val;
1438 rs->isymbolic [val] = prev_dreg;
1441 val = rs->iassign [ins->sreg1];
1442 if (val == X86_ECX) {
1443 g_assert_not_reached ();
1444 } else if (val >= 0) {
1446 * the first src reg was already assigned to a register,
1447 * we need to copy it to the dest register because the
1448 * shift instruction clobbers the first operand.
1450 MonoInst *copy = create_copy_ins (cfg, ins->dreg, val, NULL);
1451 insert_before_ins (ins, tmp, copy);
1453 val = rs->iassign [ins->sreg2];
1454 if (val >= 0 && val != X86_ECX) {
1455 MonoInst *move = create_copy_ins (cfg, X86_ECX, val, NULL);
1456 DEBUG (g_print ("\tmoved arg from R%d (%d) to ECX\n", val, ins->sreg2));
1458 g_assert_not_reached ();
1459 /* FIXME: where is move connected to the instruction list? */
1460 //tmp->prev->data->next = move;
1462 if (need_ecx_spill && !(rs->ifree_mask & (1 << X86_ECX))) {
1463 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_ECX]));
1464 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_ECX]);
1465 mono_regstate_free_int (rs, X86_ECX);
1467 /* force-set sreg2 */
1468 rs->iassign [ins->sreg2] = X86_ECX;
1469 rs->isymbolic [X86_ECX] = ins->sreg2;
1470 ins->sreg2 = X86_ECX;
1471 rs->ifree_mask &= ~ (1 << X86_ECX);
1473 } else if (spec [MONO_INST_CLOB] == 'd') { /* division */
1474 int dest_reg = X86_EAX;
1475 int clob_reg = X86_EDX;
1476 if (spec [MONO_INST_DEST] == 'd') {
1477 dest_reg = X86_EDX; /* reminder */
1480 val = rs->iassign [ins->dreg];
1481 if (0 && val >= 0 && val != dest_reg && !(rs->ifree_mask & (1 << dest_reg))) {
1482 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [dest_reg]));
1483 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [dest_reg]);
1484 mono_regstate_free_int (rs, dest_reg);
1488 /* the register gets spilled after this inst */
1489 int spill = -val -1;
1490 dest_mask = 1 << clob_reg;
1491 prev_dreg = ins->dreg;
1492 val = mono_regstate_alloc_int (rs, dest_mask);
1494 val = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1495 rs->iassign [ins->dreg] = val;
1497 create_spilled_store (cfg, spill, val, prev_dreg, ins);
1498 DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
1499 rs->isymbolic [val] = prev_dreg;
1501 if (val != dest_reg) { /* force a copy */
1502 create_copy_ins (cfg, val, dest_reg, ins);
1505 DEBUG (g_print ("\tshortcut assignment of R%d to %s\n", ins->dreg, mono_arch_regname (dest_reg)));
1506 prev_dreg = ins->dreg;
1507 rs->iassign [ins->dreg] = dest_reg;
1508 rs->isymbolic [dest_reg] = ins->dreg;
1509 ins->dreg = dest_reg;
1510 rs->ifree_mask &= ~ (1 << dest_reg);
1513 //DEBUG (g_print ("dest reg in div assigned: %s\n", mono_arch_regname (val)));
1514 if (val != dest_reg) { /* force a copy */
1515 create_copy_ins (cfg, val, dest_reg, ins);
1516 if (!(rs->ifree_mask & (1 << dest_reg)) && rs->isymbolic [dest_reg] >= MONO_MAX_IREGS) {
1517 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [dest_reg]));
1518 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [dest_reg]);
1519 mono_regstate_free_int (rs, dest_reg);
1523 if (!(rs->ifree_mask & (1 << clob_reg)) && (clob_reg != val) && (rs->isymbolic [clob_reg] >= 8)) {
1524 DEBUG (g_print ("\tforced spill of clobbered reg R%d\n", rs->isymbolic [clob_reg]));
1525 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [clob_reg]);
1526 mono_regstate_free_int (rs, clob_reg);
1528 src1_mask = 1 << X86_EAX;
1529 src2_mask = 1 << X86_ECX;
1531 if (spec [MONO_INST_DEST] == 'l') {
1532 if (!(rs->ifree_mask & (1 << X86_EAX))) {
1533 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_EAX]));
1534 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_EAX]);
1535 mono_regstate_free_int (rs, X86_EAX);
1537 if (!(rs->ifree_mask & (1 << X86_EDX))) {
1538 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_EDX]));
1539 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_EDX]);
1540 mono_regstate_free_int (rs, X86_EDX);
1545 if (spec [MONO_INST_DEST] == 'f') {
1546 if (reginfof [ins->dreg].flags & MONO_X86_FP_NEEDS_SPILL) {
1549 spill_node = g_list_first (fspill_list);
1550 g_assert (spill_node);
1552 store = create_spilled_store_float (cfg, GPOINTER_TO_INT (spill_node->data), ins->dreg, ins);
1553 insert_before_ins (ins, tmp, store);
1554 fspill_list = g_list_remove (fspill_list, spill_node->data);
1558 else if (ins->dreg >= MONO_MAX_IREGS) {
1559 val = rs->iassign [ins->dreg];
1560 prev_dreg = ins->dreg;
1564 /* the register gets spilled after this inst */
1567 val = mono_regstate_alloc_int (rs, dest_mask);
1569 val = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1570 rs->iassign [ins->dreg] = val;
1572 create_spilled_store (cfg, spill, val, prev_dreg, ins);
1574 DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
1575 rs->isymbolic [val] = prev_dreg;
1577 if (spec [MONO_INST_DEST] == 'l') {
1578 int hreg = prev_dreg + 1;
1579 val = rs->iassign [hreg];
1583 /* the register gets spilled after this inst */
1586 val = mono_regstate_alloc_int (rs, dest_mask);
1588 val = get_register_spilling (cfg, tmp, ins, dest_mask, hreg);
1589 rs->iassign [hreg] = val;
1591 create_spilled_store (cfg, spill, val, hreg, ins);
1593 DEBUG (g_print ("\tassigned hreg %s to dest R%d\n", mono_arch_regname (val), hreg));
1594 rs->isymbolic [val] = hreg;
1595 /* FIXME:? ins->dreg = val; */
1596 if (ins->dreg == X86_EAX) {
1598 create_copy_ins (cfg, val, X86_EDX, ins);
1599 } else if (ins->dreg == X86_EDX) {
1600 if (val == X86_EAX) {
1602 g_assert_not_reached ();
1604 /* two forced copies */
1605 create_copy_ins (cfg, val, X86_EDX, ins);
1606 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
1609 if (val == X86_EDX) {
1610 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
1612 /* two forced copies */
1613 create_copy_ins (cfg, val, X86_EDX, ins);
1614 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
1617 if (reg_is_freeable (val) && hreg >= 0 && reginfo [hreg].born_in >= i) {
1618 DEBUG (g_print ("\tfreeable %s (R%d)\n", mono_arch_regname (val), hreg));
1619 mono_regstate_free_int (rs, val);
1621 } else if (spec [MONO_INST_DEST] == 'a' && ins->dreg != X86_EAX && spec [MONO_INST_CLOB] != 'd') {
1622 /* this instruction only outputs to EAX, need to copy */
1623 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
1624 } else if (spec [MONO_INST_DEST] == 'd' && ins->dreg != X86_EDX && spec [MONO_INST_CLOB] != 'd') {
1625 create_copy_ins (cfg, ins->dreg, X86_EDX, ins);
1628 if (spec [MONO_INST_DEST] != 'f' && reg_is_freeable (ins->dreg) && prev_dreg >= 0 && reginfo [prev_dreg].born_in >= i) {
1629 DEBUG (g_print ("\tfreeable %s (R%d) (born in %d)\n", mono_arch_regname (ins->dreg), prev_dreg, reginfo [prev_dreg].born_in));
1630 mono_regstate_free_int (rs, ins->dreg);
1632 /* put src1 in EAX if it needs to be */
1633 if (spec [MONO_INST_SRC1] == 'a') {
1634 if (!(rs->ifree_mask & (1 << X86_EAX))) {
1635 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_EAX]));
1636 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_EAX]);
1637 mono_regstate_free_int (rs, X86_EAX);
1639 /* force-set sreg1 */
1640 rs->iassign [ins->sreg1] = X86_EAX;
1641 rs->isymbolic [X86_EAX] = ins->sreg1;
1642 ins->sreg1 = X86_EAX;
1643 rs->ifree_mask &= ~ (1 << X86_EAX);
1647 if (spec [MONO_INST_SRC1] == 'f') {
1648 if (reginfof [ins->sreg1].flags & MONO_X86_FP_NEEDS_LOAD) {
1650 MonoInst *store = NULL;
1652 if (reginfof [ins->sreg1].flags & MONO_X86_FP_NEEDS_LOAD_SPILL) {
1654 spill_node = g_list_first (fspill_list);
1655 g_assert (spill_node);
1657 store = create_spilled_store_float (cfg, GPOINTER_TO_INT (spill_node->data), ins->sreg1, ins);
1658 fspill_list = g_list_remove (fspill_list, spill_node->data);
1662 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
1663 load = create_spilled_load_float (cfg, fspill, ins->sreg1, ins);
1664 insert_before_ins (ins, tmp, load);
1666 insert_before_ins (load, tmp, store);
1669 else if (ins->sreg1 >= MONO_MAX_IREGS) {
1670 val = rs->iassign [ins->sreg1];
1671 prev_sreg1 = ins->sreg1;
1675 /* the register gets spilled after this inst */
1678 if (0 && ins->opcode == OP_MOVE) {
1680 * small optimization: the dest register is already allocated
1681 * but the src one is not: we can simply assign the same register
1682 * here and peephole will get rid of the instruction later.
1683 * This optimization may interfere with the clobbering handling:
1684 * it removes a mov operation that will be added again to handle clobbering.
1685 * There are also some other issues that should with make testjit.
1687 mono_regstate_alloc_int (rs, 1 << ins->dreg);
1688 val = rs->iassign [ins->sreg1] = ins->dreg;
1689 //g_assert (val >= 0);
1690 DEBUG (g_print ("\tfast assigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1692 //g_assert (val == -1); /* source cannot be spilled */
1693 val = mono_regstate_alloc_int (rs, src1_mask);
1695 val = get_register_spilling (cfg, tmp, ins, src1_mask, ins->sreg1);
1696 rs->iassign [ins->sreg1] = val;
1697 DEBUG (g_print ("\tassigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1700 MonoInst *store = create_spilled_store (cfg, spill, val, prev_sreg1, NULL);
1701 insert_before_ins (ins, tmp, store);
1704 rs->isymbolic [val] = prev_sreg1;
1709 /* handle clobbering of sreg1 */
1710 if ((spec [MONO_INST_CLOB] == '1' || spec [MONO_INST_CLOB] == 's') && ins->dreg != ins->sreg1) {
1711 MonoInst *copy = create_copy_ins (cfg, ins->dreg, ins->sreg1, NULL);
1712 DEBUG (g_print ("\tneed to copy sreg1 %s to dreg %s\n", mono_arch_regname (ins->sreg1), mono_arch_regname (ins->dreg)));
1713 if (ins->sreg2 == -1 || spec [MONO_INST_CLOB] == 's') {
1714 /* note: the copy is inserted before the current instruction! */
1715 insert_before_ins (ins, tmp, copy);
1716 /* we set sreg1 to dest as well */
1717 prev_sreg1 = ins->sreg1 = ins->dreg;
1719 /* inserted after the operation */
1720 copy->next = ins->next;
1725 if (spec [MONO_INST_SRC2] == 'f') {
1726 if (reginfof [ins->sreg2].flags & MONO_X86_FP_NEEDS_LOAD) {
1728 MonoInst *store = NULL;
1730 if (reginfof [ins->sreg2].flags & MONO_X86_FP_NEEDS_LOAD_SPILL) {
1733 spill_node = g_list_first (fspill_list);
1734 g_assert (spill_node);
1735 if (spec [MONO_INST_SRC1] == 'f' && (reginfof [ins->sreg1].flags & MONO_X86_FP_NEEDS_LOAD_SPILL))
1736 spill_node = g_list_next (spill_node);
1738 store = create_spilled_store_float (cfg, GPOINTER_TO_INT (spill_node->data), ins->sreg2, ins);
1739 fspill_list = g_list_remove (fspill_list, spill_node->data);
1743 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
1744 load = create_spilled_load_float (cfg, fspill, ins->sreg2, ins);
1745 insert_before_ins (ins, tmp, load);
1747 insert_before_ins (load, tmp, store);
1750 else if (ins->sreg2 >= MONO_MAX_IREGS) {
1751 val = rs->iassign [ins->sreg2];
1752 prev_sreg2 = ins->sreg2;
1756 /* the register gets spilled after this inst */
1759 val = mono_regstate_alloc_int (rs, src2_mask);
1761 val = get_register_spilling (cfg, tmp, ins, src2_mask, ins->sreg2);
1762 rs->iassign [ins->sreg2] = val;
1763 DEBUG (g_print ("\tassigned sreg2 %s to R%d\n", mono_arch_regname (val), ins->sreg2));
1765 create_spilled_store (cfg, spill, val, prev_sreg2, ins);
1767 rs->isymbolic [val] = prev_sreg2;
1769 if (spec [MONO_INST_CLOB] == 's' && ins->sreg2 != X86_ECX) {
1770 DEBUG (g_print ("\tassigned sreg2 %s to R%d, but ECX is needed (R%d)\n", mono_arch_regname (val), ins->sreg2, rs->iassign [X86_ECX]));
1776 if (spec [MONO_INST_CLOB] == 'c') {
1778 guint32 clob_mask = X86_CALLEE_REGS;
1779 for (j = 0; j < MONO_MAX_IREGS; ++j) {
1781 if ((clob_mask & s) && !(rs->ifree_mask & s) && j != ins->sreg1) {
1782 //g_warning ("register %s busy at call site\n", mono_arch_regname (j));
1786 /*if (reg_is_freeable (ins->sreg1) && prev_sreg1 >= 0 && reginfo [prev_sreg1].born_in >= i) {
1787 DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg1)));
1788 mono_regstate_free_int (rs, ins->sreg1);
1790 if (reg_is_freeable (ins->sreg2) && prev_sreg2 >= 0 && reginfo [prev_sreg2].born_in >= i) {
1791 DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg2)));
1792 mono_regstate_free_int (rs, ins->sreg2);
1795 //DEBUG (print_ins (i, ins));
1796 /* this may result from a insert_before call */
1798 bb->code = tmp->data;
1804 g_list_free (fspill_list);
1807 static unsigned char*
1808 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int size, gboolean is_signed)
1810 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
1811 x86_fnstcw_membase(code, X86_ESP, 0);
1812 x86_mov_reg_membase (code, dreg, X86_ESP, 0, 2);
1813 x86_alu_reg_imm (code, X86_OR, dreg, 0xc00);
1814 x86_mov_membase_reg (code, X86_ESP, 2, dreg, 2);
1815 x86_fldcw_membase (code, X86_ESP, 2);
1817 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1818 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
1819 x86_pop_reg (code, dreg);
1820 /* FIXME: need the high register
1821 * x86_pop_reg (code, dreg_high);
1824 x86_push_reg (code, X86_EAX); // SP = SP - 4
1825 x86_fist_pop_membase (code, X86_ESP, 0, FALSE);
1826 x86_pop_reg (code, dreg);
1828 x86_fldcw_membase (code, X86_ESP, 0);
1829 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
1832 x86_widen_reg (code, dreg, dreg, is_signed, FALSE);
1834 x86_widen_reg (code, dreg, dreg, is_signed, TRUE);
1838 static unsigned char*
1839 mono_emit_stack_alloc (guchar *code, MonoInst* tree)
1841 int sreg = tree->sreg1;
1842 #ifdef PLATFORM_WIN32
1847 * If requested stack size is larger than one page,
1848 * perform stack-touch operation
1851 * Generate stack probe code.
1852 * Under Windows, it is necessary to allocate one page at a time,
1853 * "touching" stack after each successful sub-allocation. This is
1854 * because of the way stack growth is implemented - there is a
1855 * guard page before the lowest stack page that is currently commited.
1856 * Stack normally grows sequentially so OS traps access to the
1857 * guard page and commits more pages when needed.
1859 x86_test_reg_imm (code, sreg, ~0xFFF);
1860 br[0] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1862 br[2] = code; /* loop */
1863 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
1864 x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
1865 x86_alu_reg_imm (code, X86_SUB, sreg, 0x1000);
1866 x86_alu_reg_imm (code, X86_CMP, sreg, 0x1000);
1867 br[3] = code; x86_branch8 (code, X86_CC_AE, 0, FALSE);
1868 x86_patch (br[3], br[2]);
1869 x86_test_reg_reg (code, sreg, sreg);
1870 br[4] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1871 x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1873 br[1] = code; x86_jump8 (code, 0);
1875 x86_patch (br[0], code);
1876 x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1877 x86_patch (br[1], code);
1878 x86_patch (br[4], code);
1879 #else /* PLATFORM_WIN32 */
1880 x86_alu_reg_reg (code, X86_SUB, X86_ESP, tree->sreg1);
1882 if (tree->flags & MONO_INST_INIT) {
1884 if (tree->dreg != X86_EAX && sreg != X86_EAX) {
1885 x86_push_reg (code, X86_EAX);
1888 if (tree->dreg != X86_ECX && sreg != X86_ECX) {
1889 x86_push_reg (code, X86_ECX);
1892 if (tree->dreg != X86_EDI && sreg != X86_EDI) {
1893 x86_push_reg (code, X86_EDI);
1897 x86_shift_reg_imm (code, X86_SHR, sreg, 2);
1898 if (sreg != X86_ECX)
1899 x86_mov_reg_reg (code, X86_ECX, sreg, 4);
1900 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
1902 x86_lea_membase (code, X86_EDI, X86_ESP, offset);
1904 x86_prefix (code, X86_REP_PREFIX);
1907 if (tree->dreg != X86_EDI && sreg != X86_EDI)
1908 x86_pop_reg (code, X86_EDI);
1909 if (tree->dreg != X86_ECX && sreg != X86_ECX)
1910 x86_pop_reg (code, X86_ECX);
1911 if (tree->dreg != X86_EAX && sreg != X86_EAX)
1912 x86_pop_reg (code, X86_EAX);
1917 #define REAL_PRINT_REG(text,reg) \
1918 mono_assert (reg >= 0); \
1919 x86_push_reg (code, X86_EAX); \
1920 x86_push_reg (code, X86_EDX); \
1921 x86_push_reg (code, X86_ECX); \
1922 x86_push_reg (code, reg); \
1923 x86_push_imm (code, reg); \
1924 x86_push_imm (code, text " %d %p\n"); \
1925 x86_mov_reg_imm (code, X86_EAX, printf); \
1926 x86_call_reg (code, X86_EAX); \
1927 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 3*4); \
1928 x86_pop_reg (code, X86_ECX); \
1929 x86_pop_reg (code, X86_EDX); \
1930 x86_pop_reg (code, X86_EAX);
1933 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
1938 guint8 *code = cfg->native_code + cfg->code_len;
1939 MonoInst *last_ins = NULL;
1940 guint last_offset = 0;
1943 if (cfg->opt & MONO_OPT_PEEPHOLE)
1944 peephole_pass (cfg, bb);
1948 * various stratgies to align BBs. Using real loop detection or simply
1949 * aligning every block leads to more consistent benchmark results,
1950 * but usually slows down the code
1951 * we should do the alignment outside this function or we should adjust
1952 * bb->native offset as well or the code is effectively slowed down!
1954 /* align all blocks */
1955 // if ((pad = (cfg->code_len & (align - 1)))) {
1956 /* poor man loop start detection */
1957 // if (bb->code && bb->in_count && bb->in_bb [0]->cil_code > bb->cil_code && (pad = (cfg->code_len & (align - 1)))) {
1958 /* consider real loop detection and nesting level */
1959 // if (bb->loop_blocks && bb->nesting < 3 && (pad = (cfg->code_len & (align - 1)))) {
1960 /* consider real loop detection */
1961 if (bb->loop_blocks && (pad = (cfg->code_len & (align - 1)))) {
1963 x86_padding (code, pad);
1964 cfg->code_len += pad;
1965 bb->native_offset = cfg->code_len;
1969 if (cfg->verbose_level > 2)
1970 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
1972 cpos = bb->max_offset;
1974 if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
1975 MonoProfileCoverageInfo *cov = cfg->coverage_info;
1976 g_assert (!mono_compile_aot);
1979 cov->data [bb->dfn].cil_code = bb->cil_code;
1980 /* this is not thread save, but good enough */
1981 x86_inc_mem (code, &cov->data [bb->dfn].count);
1984 offset = code - cfg->native_code;
1988 offset = code - cfg->native_code;
1990 max_len = ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
1992 if (offset > (cfg->code_size - max_len - 16)) {
1993 cfg->code_size *= 2;
1994 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
1995 code = cfg->native_code + offset;
1996 mono_jit_stats.code_reallocs++;
1999 mono_debug_record_line_number (cfg, ins, offset);
2001 switch (ins->opcode) {
2003 x86_mul_reg (code, ins->sreg2, TRUE);
2006 x86_mul_reg (code, ins->sreg2, FALSE);
2008 case OP_X86_SETEQ_MEMBASE:
2009 x86_set_membase (code, X86_CC_EQ, ins->inst_basereg, ins->inst_offset, TRUE);
2011 case OP_STOREI1_MEMBASE_IMM:
2012 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 1);
2014 case OP_STOREI2_MEMBASE_IMM:
2015 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 2);
2017 case OP_STORE_MEMBASE_IMM:
2018 case OP_STOREI4_MEMBASE_IMM:
2019 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 4);
2021 case OP_STOREI1_MEMBASE_REG:
2022 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 1);
2024 case OP_STOREI2_MEMBASE_REG:
2025 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 2);
2027 case OP_STORE_MEMBASE_REG:
2028 case OP_STOREI4_MEMBASE_REG:
2029 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 4);
2034 x86_mov_reg_mem (code, ins->dreg, ins->inst_p0, 4);
2037 x86_mov_reg_imm (code, ins->dreg, ins->inst_p0);
2038 x86_mov_reg_membase (code, ins->dreg, ins->dreg, 0, 4);
2040 case OP_LOAD_MEMBASE:
2041 case OP_LOADI4_MEMBASE:
2042 case OP_LOADU4_MEMBASE:
2043 x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, 4);
2045 case OP_LOADU1_MEMBASE:
2046 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE);
2048 case OP_LOADI1_MEMBASE:
2049 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, FALSE);
2051 case OP_LOADU2_MEMBASE:
2052 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE);
2054 case OP_LOADI2_MEMBASE:
2055 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, TRUE);
2058 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, FALSE);
2061 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, TRUE);
2064 x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, FALSE);
2067 x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, TRUE);
2070 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
2072 case OP_COMPARE_IMM:
2073 x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
2075 case OP_X86_COMPARE_MEMBASE_REG:
2076 x86_alu_membase_reg (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2078 case OP_X86_COMPARE_MEMBASE_IMM:
2079 x86_alu_membase_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2081 case OP_X86_COMPARE_REG_MEMBASE:
2082 x86_alu_reg_membase (code, X86_CMP, ins->sreg1, ins->sreg2, ins->inst_offset);
2084 case OP_X86_TEST_NULL:
2085 x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
2087 case OP_X86_ADD_MEMBASE_IMM:
2088 x86_alu_membase_imm (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2090 case OP_X86_ADD_MEMBASE:
2091 x86_alu_reg_membase (code, X86_ADD, ins->sreg1, ins->sreg2, ins->inst_offset);
2093 case OP_X86_SUB_MEMBASE_IMM:
2094 x86_alu_membase_imm (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2096 case OP_X86_SUB_MEMBASE:
2097 x86_alu_reg_membase (code, X86_SUB, ins->sreg1, ins->sreg2, ins->inst_offset);
2099 case OP_X86_INC_MEMBASE:
2100 x86_inc_membase (code, ins->inst_basereg, ins->inst_offset);
2102 case OP_X86_INC_REG:
2103 x86_inc_reg (code, ins->dreg);
2105 case OP_X86_DEC_MEMBASE:
2106 x86_dec_membase (code, ins->inst_basereg, ins->inst_offset);
2108 case OP_X86_DEC_REG:
2109 x86_dec_reg (code, ins->dreg);
2111 case OP_X86_MUL_MEMBASE:
2112 x86_imul_reg_membase (code, ins->sreg1, ins->sreg2, ins->inst_offset);
2115 x86_breakpoint (code);
2119 x86_alu_reg_reg (code, X86_ADD, ins->sreg1, ins->sreg2);
2122 x86_alu_reg_reg (code, X86_ADC, ins->sreg1, ins->sreg2);
2125 x86_alu_reg_imm (code, X86_ADD, ins->dreg, ins->inst_imm);
2128 x86_alu_reg_imm (code, X86_ADC, ins->dreg, ins->inst_imm);
2132 x86_alu_reg_reg (code, X86_SUB, ins->sreg1, ins->sreg2);
2135 x86_alu_reg_reg (code, X86_SBB, ins->sreg1, ins->sreg2);
2138 x86_alu_reg_imm (code, X86_SUB, ins->dreg, ins->inst_imm);
2141 x86_alu_reg_imm (code, X86_SBB, ins->dreg, ins->inst_imm);
2144 x86_alu_reg_reg (code, X86_AND, ins->sreg1, ins->sreg2);
2147 x86_alu_reg_imm (code, X86_AND, ins->sreg1, ins->inst_imm);
2151 x86_div_reg (code, ins->sreg2, TRUE);
2154 x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2155 x86_div_reg (code, ins->sreg2, FALSE);
2158 x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
2160 x86_div_reg (code, ins->sreg2, TRUE);
2164 x86_div_reg (code, ins->sreg2, TRUE);
2167 x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2168 x86_div_reg (code, ins->sreg2, FALSE);
2171 x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
2173 x86_div_reg (code, ins->sreg2, TRUE);
2176 x86_alu_reg_reg (code, X86_OR, ins->sreg1, ins->sreg2);
2179 x86_alu_reg_imm (code, X86_OR, ins->sreg1, ins->inst_imm);
2182 x86_alu_reg_reg (code, X86_XOR, ins->sreg1, ins->sreg2);
2185 x86_alu_reg_imm (code, X86_XOR, ins->sreg1, ins->inst_imm);
2188 g_assert (ins->sreg2 == X86_ECX);
2189 x86_shift_reg (code, X86_SHL, ins->dreg);
2192 g_assert (ins->sreg2 == X86_ECX);
2193 x86_shift_reg (code, X86_SAR, ins->dreg);
2196 x86_shift_reg_imm (code, X86_SAR, ins->dreg, ins->inst_imm);
2199 x86_shift_reg_imm (code, X86_SHR, ins->dreg, ins->inst_imm);
2202 g_assert (ins->sreg2 == X86_ECX);
2203 x86_shift_reg (code, X86_SHR, ins->dreg);
2206 x86_shift_reg_imm (code, X86_SHL, ins->dreg, ins->inst_imm);
2209 x86_not_reg (code, ins->sreg1);
2212 x86_neg_reg (code, ins->sreg1);
2215 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, FALSE);
2218 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, TRUE);
2221 x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2224 x86_imul_reg_reg_imm (code, ins->dreg, ins->sreg1, ins->inst_imm);
2227 x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2228 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2230 case CEE_MUL_OVF_UN: {
2231 /* the mul operation and the exception check should most likely be split */
2232 int non_eax_reg, saved_eax = FALSE, saved_edx = FALSE;
2233 /*g_assert (ins->sreg2 == X86_EAX);
2234 g_assert (ins->dreg == X86_EAX);*/
2235 if (ins->sreg2 == X86_EAX) {
2236 non_eax_reg = ins->sreg1;
2237 } else if (ins->sreg1 == X86_EAX) {
2238 non_eax_reg = ins->sreg2;
2240 /* no need to save since we're going to store to it anyway */
2241 if (ins->dreg != X86_EAX) {
2243 x86_push_reg (code, X86_EAX);
2245 x86_mov_reg_reg (code, X86_EAX, ins->sreg1, 4);
2246 non_eax_reg = ins->sreg2;
2248 if (ins->dreg == X86_EDX) {
2251 x86_push_reg (code, X86_EAX);
2253 } else if (ins->dreg != X86_EAX) {
2255 x86_push_reg (code, X86_EDX);
2257 x86_mul_reg (code, non_eax_reg, FALSE);
2258 /* save before the check since pop and mov don't change the flags */
2259 if (ins->dreg != X86_EAX)
2260 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
2262 x86_pop_reg (code, X86_EDX);
2264 x86_pop_reg (code, X86_EAX);
2265 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2269 x86_mov_reg_imm (code, ins->dreg, ins->inst_c0);
2272 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2273 x86_mov_reg_imm (code, ins->dreg, 0);
2277 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2280 g_assert_not_reached ();
2283 * Note: this 'frame destruction' logic is useful for tail calls, too.
2284 * Keep in sync with the code in emit_epilog.
2288 /* FIXME: no tracing support... */
2289 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
2290 code = mono_arch_instrument_epilog (cfg, mono_profiler_method_leave, code, FALSE);
2291 /* reset offset to make max_len work */
2292 offset = code - cfg->native_code;
2294 g_assert (!cfg->method->save_lmf);
2296 if (cfg->used_int_regs & (1 << X86_EBX))
2298 if (cfg->used_int_regs & (1 << X86_EDI))
2300 if (cfg->used_int_regs & (1 << X86_ESI))
2303 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
2305 if (cfg->used_int_regs & (1 << X86_ESI))
2306 x86_pop_reg (code, X86_ESI);
2307 if (cfg->used_int_regs & (1 << X86_EDI))
2308 x86_pop_reg (code, X86_EDI);
2309 if (cfg->used_int_regs & (1 << X86_EBX))
2310 x86_pop_reg (code, X86_EBX);
2312 /* restore ESP/EBP */
2314 offset = code - cfg->native_code;
2315 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2316 x86_jump32 (code, 0);
2320 /* ensure ins->sreg1 is not NULL */
2321 x86_alu_membase_imm (code, X86_CMP, ins->sreg1, 0, 0);
2324 int hreg = ins->sreg1 == X86_EAX? X86_ECX: X86_EAX;
2325 x86_push_reg (code, hreg);
2326 x86_lea_membase (code, hreg, X86_EBP, cfg->sig_cookie);
2327 x86_mov_membase_reg (code, ins->sreg1, 0, hreg, 4);
2328 x86_pop_reg (code, hreg);
2336 call = (MonoCallInst*)ins;
2337 if (ins->flags & MONO_INST_HAS_METHOD)
2338 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD, call->method);
2340 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, call->fptr);
2342 x86_call_code (code, 0);
2343 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature->call_convention))
2344 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2349 case OP_VOIDCALL_REG:
2351 call = (MonoCallInst*)ins;
2352 x86_call_reg (code, ins->sreg1);
2353 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature->call_convention))
2354 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2356 case OP_FCALL_MEMBASE:
2357 case OP_LCALL_MEMBASE:
2358 case OP_VCALL_MEMBASE:
2359 case OP_VOIDCALL_MEMBASE:
2360 case OP_CALL_MEMBASE:
2361 call = (MonoCallInst*)ins;
2362 x86_call_membase (code, ins->sreg1, ins->inst_offset);
2363 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature->call_convention))
2364 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2368 x86_push_reg (code, ins->sreg1);
2370 case OP_X86_PUSH_IMM:
2371 x86_push_imm (code, ins->inst_imm);
2373 case OP_X86_PUSH_MEMBASE:
2374 x86_push_membase (code, ins->inst_basereg, ins->inst_offset);
2376 case OP_X86_PUSH_OBJ:
2377 x86_alu_reg_imm (code, X86_SUB, X86_ESP, ins->inst_imm);
2378 x86_push_reg (code, X86_EDI);
2379 x86_push_reg (code, X86_ESI);
2380 x86_push_reg (code, X86_ECX);
2381 if (ins->inst_offset)
2382 x86_lea_membase (code, X86_ESI, ins->inst_basereg, ins->inst_offset);
2384 x86_mov_reg_reg (code, X86_ESI, ins->inst_basereg, 4);
2385 x86_lea_membase (code, X86_EDI, X86_ESP, 12);
2386 x86_mov_reg_imm (code, X86_ECX, (ins->inst_imm >> 2));
2388 x86_prefix (code, X86_REP_PREFIX);
2390 x86_pop_reg (code, X86_ECX);
2391 x86_pop_reg (code, X86_ESI);
2392 x86_pop_reg (code, X86_EDI);
2395 x86_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->unused);
2397 case OP_X86_LEA_MEMBASE:
2398 x86_lea_membase (code, ins->dreg, ins->sreg1, ins->inst_imm);
2401 x86_xchg_reg_reg (code, ins->sreg1, ins->sreg2, 4);
2404 /* keep alignment */
2405 x86_alu_reg_imm (code, X86_ADD, ins->sreg1, MONO_ARCH_FRAME_ALIGNMENT - 1);
2406 x86_alu_reg_imm (code, X86_AND, ins->sreg1, ~(MONO_ARCH_FRAME_ALIGNMENT - 1));
2407 code = mono_emit_stack_alloc (code, ins);
2408 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2414 x86_push_reg (code, ins->sreg1);
2415 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2416 (gpointer)"mono_arch_throw_exception");
2417 x86_call_code (code, 0);
2420 case OP_CALL_HANDLER:
2421 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2422 x86_call_imm (code, 0);
2425 ins->inst_c0 = code - cfg->native_code;
2428 //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
2429 //if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
2431 if (ins->flags & MONO_INST_BRLABEL) {
2432 if (ins->inst_i0->inst_c0) {
2433 x86_jump_code (code, cfg->native_code + ins->inst_i0->inst_c0);
2435 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
2436 x86_jump32 (code, 0);
2439 if (ins->inst_target_bb->native_offset) {
2440 x86_jump_code (code, cfg->native_code + ins->inst_target_bb->native_offset);
2442 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2443 if ((cfg->opt & MONO_OPT_BRANCH) &&
2444 x86_is_imm8 (ins->inst_target_bb->max_offset - cpos))
2445 x86_jump8 (code, 0);
2447 x86_jump32 (code, 0);
2452 x86_jump_reg (code, ins->sreg1);
2455 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
2456 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2459 x86_set_reg (code, X86_CC_LT, ins->dreg, TRUE);
2460 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2463 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
2464 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2467 x86_set_reg (code, X86_CC_GT, ins->dreg, TRUE);
2468 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2471 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
2472 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2474 case OP_COND_EXC_EQ:
2475 case OP_COND_EXC_NE_UN:
2476 case OP_COND_EXC_LT:
2477 case OP_COND_EXC_LT_UN:
2478 case OP_COND_EXC_GT:
2479 case OP_COND_EXC_GT_UN:
2480 case OP_COND_EXC_GE:
2481 case OP_COND_EXC_GE_UN:
2482 case OP_COND_EXC_LE:
2483 case OP_COND_EXC_LE_UN:
2484 case OP_COND_EXC_OV:
2485 case OP_COND_EXC_NO:
2487 case OP_COND_EXC_NC:
2488 EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_EQ],
2489 (ins->opcode < OP_COND_EXC_NE_UN), ins->inst_p1);
2501 EMIT_COND_BRANCH (ins, branch_cc_table [ins->opcode - CEE_BEQ], (ins->opcode < CEE_BNE_UN));
2504 /* floating point opcodes */
2506 double d = *(double *)ins->inst_p0;
2508 if ((d == 0.0) && (mono_signbit (d) == 0)) {
2510 } else if (d == 1.0) {
2513 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
2514 x86_fld (code, NULL, TRUE);
2519 float f = *(float *)ins->inst_p0;
2521 if ((f == 0.0) && (mono_signbit (f) == 0)) {
2523 } else if (f == 1.0) {
2526 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
2527 x86_fld (code, NULL, FALSE);
2531 case OP_STORER8_MEMBASE_REG:
2532 x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, TRUE, TRUE);
2534 case OP_LOADR8_SPILL_MEMBASE:
2535 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
2538 case OP_LOADR8_MEMBASE:
2539 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
2541 case OP_STORER4_MEMBASE_REG:
2542 x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, FALSE, TRUE);
2544 case OP_LOADR4_MEMBASE:
2545 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
2547 case CEE_CONV_R4: /* FIXME: change precision */
2549 x86_push_reg (code, ins->sreg1);
2550 x86_fild_membase (code, X86_ESP, 0, FALSE);
2551 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2553 case OP_X86_FP_LOAD_I8:
2554 x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
2556 case OP_X86_FP_LOAD_I4:
2557 x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
2559 case OP_FCONV_TO_I1:
2560 code = emit_float_to_int (cfg, code, ins->dreg, 1, TRUE);
2562 case OP_FCONV_TO_U1:
2563 code = emit_float_to_int (cfg, code, ins->dreg, 1, FALSE);
2565 case OP_FCONV_TO_I2:
2566 code = emit_float_to_int (cfg, code, ins->dreg, 2, TRUE);
2568 case OP_FCONV_TO_U2:
2569 code = emit_float_to_int (cfg, code, ins->dreg, 2, FALSE);
2571 case OP_FCONV_TO_I4:
2573 code = emit_float_to_int (cfg, code, ins->dreg, 4, TRUE);
2575 case OP_FCONV_TO_I8:
2576 /* we defined this instruction to output only to eax:edx */
2577 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
2578 x86_fnstcw_membase(code, X86_ESP, 0);
2579 x86_mov_reg_membase (code, X86_EAX, X86_ESP, 0, 2);
2580 x86_alu_reg_imm (code, X86_OR, X86_EAX, 0xc00);
2581 x86_mov_membase_reg (code, X86_ESP, 2, X86_EAX, 2);
2582 x86_fldcw_membase (code, X86_ESP, 2);
2583 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
2584 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
2585 x86_pop_reg (code, X86_EAX);
2586 x86_pop_reg (code, X86_EDX);
2587 x86_fldcw_membase (code, X86_ESP, 0);
2588 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2590 case OP_LCONV_TO_R_UN: {
2591 static guint8 mn[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x40 };
2594 /* load 64bit integer to FP stack */
2595 x86_push_imm (code, 0);
2596 x86_push_reg (code, ins->sreg2);
2597 x86_push_reg (code, ins->sreg1);
2598 x86_fild_membase (code, X86_ESP, 0, TRUE);
2599 /* store as 80bit FP value */
2600 x86_fst80_membase (code, X86_ESP, 0);
2602 /* test if lreg is negative */
2603 x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
2604 br = code; x86_branch8 (code, X86_CC_GEZ, 0, TRUE);
2606 /* add correction constant mn */
2607 x86_fld80_mem (code, mn);
2608 x86_fld80_membase (code, X86_ESP, 0);
2609 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
2610 x86_fst80_membase (code, X86_ESP, 0);
2612 x86_patch (br, code);
2614 x86_fld80_membase (code, X86_ESP, 0);
2615 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
2619 case OP_LCONV_TO_OVF_I: {
2620 guint8 *br [3], *label [1];
2623 * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
2625 x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
2627 /* If the low word top bit is set, see if we are negative */
2628 br [0] = code; x86_branch8 (code, X86_CC_LT, 0, TRUE);
2629 /* We are not negative (no top bit set, check for our top word to be zero */
2630 x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
2631 br [1] = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
2634 /* throw exception */
2635 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC, "OverflowException");
2636 x86_jump32 (code, 0);
2638 x86_patch (br [0], code);
2639 /* our top bit is set, check that top word is 0xfffffff */
2640 x86_alu_reg_imm (code, X86_CMP, ins->sreg2, 0xffffffff);
2642 x86_patch (br [1], code);
2643 /* nope, emit exception */
2644 br [2] = code; x86_branch8 (code, X86_CC_NE, 0, TRUE);
2645 x86_patch (br [2], label [0]);
2647 if (ins->dreg != ins->sreg1)
2648 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2652 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
2655 x86_fp_op_reg (code, X86_FSUB, 1, TRUE);
2658 x86_fp_op_reg (code, X86_FMUL, 1, TRUE);
2661 x86_fp_op_reg (code, X86_FDIV, 1, TRUE);
2677 * it really doesn't make sense to inline all this code,
2678 * it's here just to show that things may not be as simple
2681 guchar *check_pos, *end_tan, *pop_jump;
2682 x86_push_reg (code, X86_EAX);
2685 x86_test_reg_imm (code, X86_EAX, X86_FP_C2);
2687 x86_branch8 (code, X86_CC_NE, 0, FALSE);
2688 x86_fstp (code, 0); /* pop the 1.0 */
2690 x86_jump8 (code, 0);
2692 x86_fp_op (code, X86_FADD, 0);
2696 x86_test_reg_imm (code, X86_EAX, X86_FP_C2);
2698 x86_branch8 (code, X86_CC_NE, 0, FALSE);
2701 x86_patch (pop_jump, code);
2702 x86_fstp (code, 0); /* pop the 1.0 */
2703 x86_patch (check_pos, code);
2704 x86_patch (end_tan, code);
2705 x86_pop_reg (code, X86_EAX);
2721 x86_push_reg (code, X86_EAX);
2722 /* we need to exchange ST(0) with ST(1) */
2725 /* this requires a loop, because fprem somtimes
2726 * returns a partial remainder */
2728 /* looks like MS is using fprem instead of the IEEE compatible fprem1 */
2729 /* x86_fprem1 (code); */
2732 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_C2);
2734 x86_branch8 (code, X86_CC_NE, l1 - l2, FALSE);
2739 x86_pop_reg (code, X86_EAX);
2743 if (cfg->opt & MONO_OPT_FCMOV) {
2744 x86_fcomip (code, 1);
2748 /* this overwrites EAX */
2749 EMIT_FPCOMPARE(code);
2750 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
2753 if (cfg->opt & MONO_OPT_FCMOV) {
2754 /* zeroing the register at the start results in
2755 * shorter and faster code (we can also remove the widening op)
2757 guchar *unordered_check;
2758 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
2759 x86_fcomip (code, 1);
2761 unordered_check = code;
2762 x86_branch8 (code, X86_CC_P, 0, FALSE);
2763 x86_set_reg (code, X86_CC_EQ, ins->dreg, FALSE);
2764 x86_patch (unordered_check, code);
2767 if (ins->dreg != X86_EAX)
2768 x86_push_reg (code, X86_EAX);
2770 EMIT_FPCOMPARE(code);
2771 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
2772 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
2773 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
2774 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2776 if (ins->dreg != X86_EAX)
2777 x86_pop_reg (code, X86_EAX);
2781 if (cfg->opt & MONO_OPT_FCMOV) {
2782 /* zeroing the register at the start results in
2783 * shorter and faster code (we can also remove the widening op)
2785 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
2786 x86_fcomip (code, 1);
2788 if (ins->opcode == OP_FCLT_UN) {
2789 guchar *unordered_check = code;
2790 guchar *jump_to_end;
2791 x86_branch8 (code, X86_CC_P, 0, FALSE);
2792 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
2794 x86_jump8 (code, 0);
2795 x86_patch (unordered_check, code);
2796 x86_inc_reg (code, ins->dreg);
2797 x86_patch (jump_to_end, code);
2799 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
2803 if (ins->dreg != X86_EAX)
2804 x86_push_reg (code, X86_EAX);
2806 EMIT_FPCOMPARE(code);
2807 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
2808 if (ins->opcode == OP_FCLT_UN) {
2809 guchar *is_not_zero_check, *end_jump;
2810 is_not_zero_check = code;
2811 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
2813 x86_jump8 (code, 0);
2814 x86_patch (is_not_zero_check, code);
2815 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
2817 x86_patch (end_jump, code);
2819 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
2820 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2822 if (ins->dreg != X86_EAX)
2823 x86_pop_reg (code, X86_EAX);
2827 if (cfg->opt & MONO_OPT_FCMOV) {
2828 /* zeroing the register at the start results in
2829 * shorter and faster code (we can also remove the widening op)
2831 guchar *unordered_check;
2832 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
2833 x86_fcomip (code, 1);
2835 if (ins->opcode == OP_FCGT) {
2836 unordered_check = code;
2837 x86_branch8 (code, X86_CC_P, 0, FALSE);
2838 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
2839 x86_patch (unordered_check, code);
2841 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
2845 if (ins->dreg != X86_EAX)
2846 x86_push_reg (code, X86_EAX);
2848 EMIT_FPCOMPARE(code);
2849 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
2850 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
2851 if (ins->opcode == OP_FCGT_UN) {
2852 guchar *is_not_zero_check, *end_jump;
2853 is_not_zero_check = code;
2854 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
2856 x86_jump8 (code, 0);
2857 x86_patch (is_not_zero_check, code);
2858 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
2860 x86_patch (end_jump, code);
2862 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
2863 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2865 if (ins->dreg != X86_EAX)
2866 x86_pop_reg (code, X86_EAX);
2869 if (cfg->opt & MONO_OPT_FCMOV) {
2870 guchar *jump = code;
2871 x86_branch8 (code, X86_CC_P, 0, TRUE);
2872 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2873 x86_patch (jump, code);
2876 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
2877 EMIT_COND_BRANCH (ins, X86_CC_EQ, TRUE);
2880 /* Branch if C013 != 100 */
2881 if (cfg->opt & MONO_OPT_FCMOV) {
2882 /* branch if !ZF or (PF|CF) */
2883 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
2884 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
2885 EMIT_COND_BRANCH (ins, X86_CC_B, FALSE);
2888 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C3);
2889 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
2892 if (cfg->opt & MONO_OPT_FCMOV) {
2893 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
2896 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2899 if (cfg->opt & MONO_OPT_FCMOV) {
2900 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
2901 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
2904 if (ins->opcode == OP_FBLT_UN) {
2905 guchar *is_not_zero_check, *end_jump;
2906 is_not_zero_check = code;
2907 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
2909 x86_jump8 (code, 0);
2910 x86_patch (is_not_zero_check, code);
2911 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
2913 x86_patch (end_jump, code);
2915 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2919 if (cfg->opt & MONO_OPT_FCMOV) {
2920 EMIT_COND_BRANCH (ins, X86_CC_LT, FALSE);
2923 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
2924 if (ins->opcode == OP_FBGT_UN) {
2925 guchar *is_not_zero_check, *end_jump;
2926 is_not_zero_check = code;
2927 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
2929 x86_jump8 (code, 0);
2930 x86_patch (is_not_zero_check, code);
2931 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
2933 x86_patch (end_jump, code);
2935 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2938 /* Branch if C013 == 100 or 001 */
2939 if (cfg->opt & MONO_OPT_FCMOV) {
2942 /* skip branch if C1=1 */
2944 x86_branch8 (code, X86_CC_P, 0, FALSE);
2945 /* branch if (C0 | C3) = 1 */
2946 EMIT_COND_BRANCH (ins, X86_CC_BE, FALSE);
2947 x86_patch (br1, code);
2950 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
2951 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2952 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C3);
2953 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2956 /* Branch if C013 == 000 */
2957 if (cfg->opt & MONO_OPT_FCMOV) {
2958 EMIT_COND_BRANCH (ins, X86_CC_LE, FALSE);
2961 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
2964 /* Branch if C013=000 or 100 */
2965 if (cfg->opt & MONO_OPT_FCMOV) {
2968 /* skip branch if C1=1 */
2970 x86_branch8 (code, X86_CC_P, 0, FALSE);
2971 /* branch if C0=0 */
2972 EMIT_COND_BRANCH (ins, X86_CC_NB, FALSE);
2973 x86_patch (br1, code);
2976 x86_alu_reg_imm (code, X86_AND, X86_EAX, (X86_FP_C0|X86_FP_C1));
2977 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0);
2978 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2981 /* Branch if C013 != 001 */
2982 if (cfg->opt & MONO_OPT_FCMOV) {
2983 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
2984 EMIT_COND_BRANCH (ins, X86_CC_GE, FALSE);
2987 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
2988 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
2990 case CEE_CKFINITE: {
2991 x86_push_reg (code, X86_EAX);
2994 x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4100);
2995 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
2996 x86_pop_reg (code, X86_EAX);
2997 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_EQ, FALSE, "ArithmeticException");
3001 g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
3002 g_assert_not_reached ();
3005 if ((code - cfg->native_code - offset) > max_len) {
3006 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3007 mono_inst_name (ins->opcode), max_len, code - cfg->native_code - offset);
3008 g_assert_not_reached ();
3014 last_offset = offset;
3019 cfg->code_len = code - cfg->native_code;
3023 mono_arch_register_lowlevel_calls (void)
3025 mono_register_jit_icall (mono_arch_get_lmf_addr, "mono_arch_get_lmf_addr", NULL, TRUE);
3029 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3031 MonoJumpInfo *patch_info;
3033 for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3034 unsigned char *ip = patch_info->ip.i + code;
3035 const unsigned char *target;
3037 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3039 switch (patch_info->type) {
3040 case MONO_PATCH_INFO_IP:
3041 *((gconstpointer *)(ip)) = target;
3043 case MONO_PATCH_INFO_METHOD_REL:
3044 *((gconstpointer *)(ip)) = target;
3046 case MONO_PATCH_INFO_SWITCH: {
3047 *((gconstpointer *)(ip + 2)) = target;
3048 /* we put into the table the absolute address, no need for x86_patch in this case */
3051 case MONO_PATCH_INFO_IID:
3052 *((guint32 *)(ip + 1)) = (guint32)target;
3054 case MONO_PATCH_INFO_CLASS_INIT: {
3056 /* Might already been changed to a nop */
3057 x86_call_imm (code, 0);
3060 case MONO_PATCH_INFO_R4:
3061 case MONO_PATCH_INFO_R8:
3062 *((gconstpointer *)(ip + 2)) = target;
3064 case MONO_PATCH_INFO_METHODCONST:
3065 case MONO_PATCH_INFO_CLASS:
3066 case MONO_PATCH_INFO_IMAGE:
3067 case MONO_PATCH_INFO_FIELD:
3068 case MONO_PATCH_INFO_VTABLE:
3069 case MONO_PATCH_INFO_SFLDA:
3070 case MONO_PATCH_INFO_EXC_NAME:
3071 case MONO_PATCH_INFO_LDSTR:
3072 case MONO_PATCH_INFO_TYPE_FROM_HANDLE:
3073 case MONO_PATCH_INFO_LDTOKEN:
3074 *((gconstpointer *)(ip + 1)) = target;
3079 x86_patch (ip, target);
3084 mono_arch_max_epilog_size (MonoCompile *cfg)
3086 int exc_count = 0, max_epilog_size = 16;
3087 MonoJumpInfo *patch_info;
3089 if (cfg->method->save_lmf)
3090 max_epilog_size += 128;
3092 if (mono_jit_trace_calls != NULL)
3093 max_epilog_size += 50;
3095 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
3096 max_epilog_size += 50;
3098 /* count the number of exception infos */
3100 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3101 if (patch_info->type == MONO_PATCH_INFO_EXC)
3106 * make sure we have enough space for exceptions
3107 * 16 is the size of two push_imm instructions and a call
3109 max_epilog_size += exc_count*16;
3111 return max_epilog_size;
3115 mono_arch_emit_prolog (MonoCompile *cfg)
3117 MonoMethod *method = cfg->method;
3119 MonoMethodSignature *sig;
3121 int alloc_size, pos, max_offset, i;
3124 cfg->code_size = MAX (((MonoMethodNormal *)method)->header->code_size * 4, 256);
3125 code = cfg->native_code = g_malloc (cfg->code_size);
3127 x86_push_reg (code, X86_EBP);
3128 x86_mov_reg_reg (code, X86_EBP, X86_ESP, 4);
3130 alloc_size = - cfg->stack_offset;
3133 if (method->save_lmf) {
3134 pos += sizeof (MonoLMF);
3136 /* save the current IP */
3137 mono_add_patch_info (cfg, code + 1 - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3138 x86_push_imm (code, 0);
3140 /* save all caller saved regs */
3141 x86_push_reg (code, X86_EBX);
3142 x86_push_reg (code, X86_EDI);
3143 x86_push_reg (code, X86_ESI);
3144 x86_push_reg (code, X86_EBP);
3146 /* save method info */
3147 x86_push_imm (code, method);
3149 /* get the address of lmf for the current thread */
3151 * This is performance critical so we try to use some tricks to make
3154 if (lmf_tls_offset != -1) {
3155 /* Load lmf quicky using the GS register */
3156 x86_prefix (code, X86_GS_PREFIX);
3157 x86_mov_reg_mem (code, X86_EAX, 0, 4);
3158 x86_mov_reg_membase (code, X86_EAX, X86_EAX, lmf_tls_offset, 4);
3161 #ifdef HAVE_KW_THREAD
3162 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3163 (gpointer)"mono_arch_get_lmf_addr");
3165 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3166 (gpointer)"mono_get_lmf_addr");
3168 x86_call_code (code, 0);
3172 x86_push_reg (code, X86_EAX);
3173 /* push *lfm (previous_lmf) */
3174 x86_push_membase (code, X86_EAX, 0);
3176 x86_mov_membase_reg (code, X86_EAX, 0, X86_ESP, 4);
3179 if (cfg->used_int_regs & (1 << X86_EBX)) {
3180 x86_push_reg (code, X86_EBX);
3184 if (cfg->used_int_regs & (1 << X86_EDI)) {
3185 x86_push_reg (code, X86_EDI);
3189 if (cfg->used_int_regs & (1 << X86_ESI)) {
3190 x86_push_reg (code, X86_ESI);
3198 /* See mono_emit_stack_alloc */
3199 #ifdef PLATFORM_WIN32
3200 guint32 remaining_size = alloc_size;
3201 while (remaining_size >= 0x1000) {
3202 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
3203 x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
3204 remaining_size -= 0x1000;
3207 x86_alu_reg_imm (code, X86_SUB, X86_ESP, remaining_size);
3209 x86_alu_reg_imm (code, X86_SUB, X86_ESP, alloc_size);
3213 /* compute max_offset in order to use short forward jumps */
3215 if (cfg->opt & MONO_OPT_BRANCH) {
3216 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
3217 MonoInst *ins = bb->code;
3218 bb->max_offset = max_offset;
3220 if (cfg->prof_options & MONO_PROFILE_COVERAGE)
3224 max_offset += ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
3230 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3231 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
3233 /* load arguments allocated to register from the stack */
3234 sig = method->signature;
3237 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3238 inst = cfg->varinfo [pos];
3239 if (inst->opcode == OP_REGVAR) {
3240 x86_mov_reg_membase (code, inst->dreg, X86_EBP, inst->inst_offset, 4);
3241 if (cfg->verbose_level > 2)
3242 g_print ("Argument %d assigned to register %s\n", pos, mono_arch_regname (inst->dreg));
3247 cfg->code_len = code - cfg->native_code;
3253 mono_arch_emit_epilog (MonoCompile *cfg)
3255 MonoJumpInfo *patch_info;
3256 MonoMethod *method = cfg->method;
3257 MonoMethodSignature *sig = method->signature;
3259 guint32 stack_to_pop;
3262 code = cfg->native_code + cfg->code_len;
3264 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3265 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
3267 /* the code restoring the registers must be kept in sync with CEE_JMP */
3270 if (method->save_lmf) {
3271 pos = -sizeof (MonoLMF);
3273 if (cfg->used_int_regs & (1 << X86_EBX)) {
3276 if (cfg->used_int_regs & (1 << X86_EDI)) {
3279 if (cfg->used_int_regs & (1 << X86_ESI)) {
3285 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
3287 if (method->save_lmf) {
3288 /* ebx = previous_lmf */
3289 x86_pop_reg (code, X86_EBX);
3291 x86_pop_reg (code, X86_EDI);
3292 /* *(lmf) = previous_lmf */
3293 x86_mov_membase_reg (code, X86_EDI, 0, X86_EBX, 4);
3295 /* discard method info */
3296 x86_pop_reg (code, X86_ESI);
3298 /* restore caller saved regs */
3299 x86_pop_reg (code, X86_EBP);
3300 x86_pop_reg (code, X86_ESI);
3301 x86_pop_reg (code, X86_EDI);
3302 x86_pop_reg (code, X86_EBX);
3306 if (cfg->used_int_regs & (1 << X86_ESI)) {
3307 x86_pop_reg (code, X86_ESI);
3309 if (cfg->used_int_regs & (1 << X86_EDI)) {
3310 x86_pop_reg (code, X86_EDI);
3312 if (cfg->used_int_regs & (1 << X86_EBX)) {
3313 x86_pop_reg (code, X86_EBX);
3319 if (CALLCONV_IS_STDCALL (sig->call_convention)) {
3320 MonoJitArgumentInfo *arg_info = alloca (sizeof (MonoJitArgumentInfo) * (sig->param_count + 1));
3322 stack_to_pop = mono_arch_get_argument_info (sig, sig->param_count, arg_info);
3323 } else if (MONO_TYPE_ISSTRUCT (cfg->method->signature->ret))
3329 x86_ret_imm (code, stack_to_pop);
3333 /* add code to raise exceptions */
3334 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3335 switch (patch_info->type) {
3336 case MONO_PATCH_INFO_EXC:
3337 x86_patch (patch_info->ip.i + cfg->native_code, code);
3338 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC_NAME, patch_info->data.target);
3339 x86_push_imm (code, patch_info->data.target);
3340 mono_add_patch_info (cfg, code + 1 - cfg->native_code, MONO_PATCH_INFO_METHOD_REL, (gpointer)patch_info->ip.i);
3341 x86_push_imm (code, patch_info->ip.i + cfg->native_code);
3342 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
3343 patch_info->data.name = "mono_arch_throw_exception_by_name";
3344 patch_info->ip.i = code - cfg->native_code;
3345 x86_jump_code (code, 0);
3353 cfg->code_len = code - cfg->native_code;
3355 g_assert (cfg->code_len < cfg->code_size);
3360 mono_arch_flush_icache (guint8 *code, gint size)
3366 * Support for fast access to the thread-local lmf structure using the GS
3367 * segment register on NPTL + kernel 2.6.x.
3370 static gboolean tls_offset_inited = FALSE;
3372 #ifdef HAVE_KW_THREAD
3373 static __thread gpointer mono_lmf_addr;
3377 mono_arch_get_lmf_addr (void)
3379 #ifdef HAVE_KW_THREAD
3380 return mono_lmf_addr;
3382 g_assert_not_reached ();
3388 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
3390 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3391 pthread_t self = pthread_self();
3392 pthread_attr_t attr;
3393 void *staddr = NULL;
3395 struct sigaltstack sa;
3398 if (!tls_offset_inited) {
3401 tls_offset_inited = TRUE;
3403 if (getenv ("MONO_NPTL")) {
3405 * Determine the offset of mono_lfm_addr inside the TLS structures
3406 * by disassembling the function above.
3408 code = (guint8*)&mono_arch_get_lmf_addr;
3410 /* This is generated by gcc 3.3.2 */
3411 if ((code [0] == 0x55) && (code [1] == 0x89) && (code [2] == 0xe5) &&
3412 (code [3] == 0x65) && (code [4] == 0xa1) && (code [5] == 0x00) &&
3413 (code [6] == 0x00) && (code [7] == 0x00) && (code [8] == 0x00) &&
3414 (code [9] == 0x8b) && (code [10] == 0x80)) {
3415 lmf_tls_offset = *(int*)&(code [11]);
3420 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3422 /* Determine stack boundaries */
3423 if (!mono_running_on_valgrind ()) {
3424 #ifdef HAVE_PTHREAD_GETATTR_NP
3425 pthread_getattr_np( self, &attr );
3427 #ifdef HAVE_PTHREAD_ATTR_GET_NP
3428 pthread_attr_get_np( self, &attr );
3430 #error "Not implemented"
3433 pthread_attr_getstack( &attr, &staddr, &stsize );
3437 * staddr seems to be wrong for the main thread, so we keep the value in
3440 tls->stack_size = stsize;
3442 /* Setup an alternate signal stack */
3443 tls->signal_stack = g_malloc (SIGNAL_STACK_SIZE);
3444 tls->signal_stack_size = SIGNAL_STACK_SIZE;
3446 sa.ss_sp = tls->signal_stack;
3447 sa.ss_size = SIGNAL_STACK_SIZE;
3448 sa.ss_flags = SS_ONSTACK;
3449 sigaltstack (&sa, NULL);
3452 #ifdef HAVE_KW_THREAD
3453 mono_lmf_addr = &tls->lmf;
3458 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
3460 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3461 struct sigaltstack sa;
3463 sa.ss_sp = tls->signal_stack;
3464 sa.ss_size = SIGNAL_STACK_SIZE;
3465 sa.ss_flags = SS_DISABLE;
3466 sigaltstack (&sa, NULL);
3468 if (tls->signal_stack)
3469 g_free (tls->signal_stack);
3474 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, int this_reg, int this_type, int vt_reg)
3477 /* add the this argument */
3478 if (this_reg != -1) {
3480 MONO_INST_NEW (cfg, this, OP_OUTARG);
3481 this->type = this_type;
3482 this->sreg1 = this_reg;
3483 mono_bblock_add_inst (cfg->cbb, this);
3488 MONO_INST_NEW (cfg, vtarg, OP_OUTARG);
3489 vtarg->type = STACK_MP;
3490 vtarg->sreg1 = vt_reg;
3491 mono_bblock_add_inst (cfg->cbb, vtarg);
3497 mono_arch_get_opcode_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
3499 if (cmethod->klass == mono_defaults.math_class) {
3500 if (strcmp (cmethod->name, "Sin") == 0)
3502 else if (strcmp (cmethod->name, "Cos") == 0)
3504 else if (strcmp (cmethod->name, "Tan") == 0)
3506 else if (strcmp (cmethod->name, "Atan") == 0)
3508 else if (strcmp (cmethod->name, "Sqrt") == 0)
3510 else if (strcmp (cmethod->name, "Abs") == 0 && fsig->params [0]->type == MONO_TYPE_R8)
3513 /* OP_FREM is not IEEE compatible */
3514 else if (strcmp (cmethod->name, "IEEERemainder") == 0)
3527 mono_arch_print_tree (MonoInst *tree, int arity)