2 * mini-x86.c: x86 backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
9 * (C) 2003 Ximian, Inc.
18 #include <mono/metadata/appdomain.h>
19 #include <mono/metadata/debug-helpers.h>
20 #include <mono/metadata/threads.h>
21 #include <mono/metadata/profiler-private.h>
22 #include <mono/metadata/mono-debug.h>
23 #include <mono/utils/mono-math.h>
30 /* On windows, these hold the key returned by TlsAlloc () */
31 static gint lmf_tls_offset = -1;
32 static gint lmf_addr_tls_offset = -1;
33 static gint appdomain_tls_offset = -1;
34 static gint thread_tls_offset = -1;
37 static gboolean optimize_for_xen = TRUE;
39 #define optimize_for_xen 0
43 static gboolean is_win32 = TRUE;
45 static gboolean is_win32 = FALSE;
48 /* This mutex protects architecture specific caches */
49 #define mono_mini_arch_lock() EnterCriticalSection (&mini_arch_mutex)
50 #define mono_mini_arch_unlock() LeaveCriticalSection (&mini_arch_mutex)
51 static CRITICAL_SECTION mini_arch_mutex;
53 #define ALIGN_TO(val,align) ((((guint64)val) + ((align) - 1)) & ~((align) - 1))
58 /* Under windows, the default pinvoke calling convention is stdcall */
59 #define CALLCONV_IS_STDCALL(sig) ((((sig)->call_convention) == MONO_CALL_STDCALL) || ((sig)->pinvoke && ((sig)->call_convention) == MONO_CALL_DEFAULT))
61 #define CALLCONV_IS_STDCALL(sig) (((sig)->call_convention) == MONO_CALL_STDCALL)
65 mono_breakpoint_info [MONO_BREAKPOINT_ARRAY_SIZE];
68 mono_arch_regname (int reg)
71 case X86_EAX: return "%eax";
72 case X86_EBX: return "%ebx";
73 case X86_ECX: return "%ecx";
74 case X86_EDX: return "%edx";
75 case X86_ESP: return "%esp";
76 case X86_EBP: return "%ebp";
77 case X86_EDI: return "%edi";
78 case X86_ESI: return "%esi";
84 mono_arch_fregname (int reg)
124 /* Only if storage == ArgValuetypeInReg */
125 ArgStorage pair_storage [2];
134 gboolean need_stack_align;
135 guint32 stack_align_amount;
143 #define FLOAT_PARAM_REGS 0
145 static X86_Reg_No param_regs [] = { 0 };
147 #if defined(PLATFORM_WIN32) || defined(__APPLE__) || defined(__FreeBSD__)
148 #define SMALL_STRUCTS_IN_REGS
149 static X86_Reg_No return_regs [] = { X86_EAX, X86_EDX };
153 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo)
155 ainfo->offset = *stack_size;
157 if (*gr >= PARAM_REGS) {
158 ainfo->storage = ArgOnStack;
159 (*stack_size) += sizeof (gpointer);
162 ainfo->storage = ArgInIReg;
163 ainfo->reg = param_regs [*gr];
169 add_general_pair (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo)
171 ainfo->offset = *stack_size;
173 g_assert (PARAM_REGS == 0);
175 ainfo->storage = ArgOnStack;
176 (*stack_size) += sizeof (gpointer) * 2;
180 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean is_double)
182 ainfo->offset = *stack_size;
184 if (*gr >= FLOAT_PARAM_REGS) {
185 ainfo->storage = ArgOnStack;
186 (*stack_size) += is_double ? 8 : 4;
189 /* A double register */
191 ainfo->storage = ArgInDoubleSSEReg;
193 ainfo->storage = ArgInFloatSSEReg;
201 add_valuetype (MonoGenericSharingContext *gsctx, MonoMethodSignature *sig, ArgInfo *ainfo, MonoType *type,
203 guint32 *gr, guint32 *fr, guint32 *stack_size)
208 klass = mono_class_from_mono_type (type);
210 size = mono_type_native_stack_size (&klass->byval_arg, NULL);
212 size = mini_type_stack_size (gsctx, &klass->byval_arg, NULL);
214 #ifdef SMALL_STRUCTS_IN_REGS
215 if (sig->pinvoke && is_return) {
216 MonoMarshalType *info;
219 * the exact rules are not very well documented, the code below seems to work with the
220 * code generated by gcc 3.3.3 -mno-cygwin.
222 info = mono_marshal_load_type_info (klass);
225 ainfo->pair_storage [0] = ainfo->pair_storage [1] = ArgNone;
227 /* Special case structs with only a float member */
228 if ((info->native_size == 8) && (info->num_fields == 1) && (info->fields [0].field->type->type == MONO_TYPE_R8)) {
229 ainfo->storage = ArgValuetypeInReg;
230 ainfo->pair_storage [0] = ArgOnDoubleFpStack;
233 if ((info->native_size == 4) && (info->num_fields == 1) && (info->fields [0].field->type->type == MONO_TYPE_R4)) {
234 ainfo->storage = ArgValuetypeInReg;
235 ainfo->pair_storage [0] = ArgOnFloatFpStack;
238 if ((info->native_size == 1) || (info->native_size == 2) || (info->native_size == 4) || (info->native_size == 8)) {
239 ainfo->storage = ArgValuetypeInReg;
240 ainfo->pair_storage [0] = ArgInIReg;
241 ainfo->pair_regs [0] = return_regs [0];
242 if (info->native_size > 4) {
243 ainfo->pair_storage [1] = ArgInIReg;
244 ainfo->pair_regs [1] = return_regs [1];
251 ainfo->offset = *stack_size;
252 ainfo->storage = ArgOnStack;
253 *stack_size += ALIGN_TO (size, sizeof (gpointer));
259 * Obtain information about a call according to the calling convention.
260 * For x86 ELF, see the "System V Application Binary Interface Intel386
261 * Architecture Processor Supplment, Fourth Edition" document for more
263 * For x86 win32, see ???.
266 get_call_info (MonoGenericSharingContext *gsctx, MonoMemPool *mp, MonoMethodSignature *sig, gboolean is_pinvoke)
270 int n = sig->hasthis + sig->param_count;
271 guint32 stack_size = 0;
275 cinfo = mono_mempool_alloc0 (mp, sizeof (CallInfo) + (sizeof (ArgInfo) * n));
277 cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
284 ret_type = mono_type_get_underlying_type (sig->ret);
285 ret_type = mini_get_basic_type_from_generic (gsctx, ret_type);
286 switch (ret_type->type) {
287 case MONO_TYPE_BOOLEAN:
298 case MONO_TYPE_FNPTR:
299 case MONO_TYPE_CLASS:
300 case MONO_TYPE_OBJECT:
301 case MONO_TYPE_SZARRAY:
302 case MONO_TYPE_ARRAY:
303 case MONO_TYPE_STRING:
304 cinfo->ret.storage = ArgInIReg;
305 cinfo->ret.reg = X86_EAX;
309 cinfo->ret.storage = ArgInIReg;
310 cinfo->ret.reg = X86_EAX;
313 cinfo->ret.storage = ArgOnFloatFpStack;
316 cinfo->ret.storage = ArgOnDoubleFpStack;
318 case MONO_TYPE_GENERICINST:
319 if (!mono_type_generic_inst_is_valuetype (sig->ret)) {
320 cinfo->ret.storage = ArgInIReg;
321 cinfo->ret.reg = X86_EAX;
325 case MONO_TYPE_VALUETYPE: {
326 guint32 tmp_gr = 0, tmp_fr = 0, tmp_stacksize = 0;
328 add_valuetype (gsctx, sig, &cinfo->ret, sig->ret, TRUE, &tmp_gr, &tmp_fr, &tmp_stacksize);
329 if (cinfo->ret.storage == ArgOnStack)
330 /* The caller passes the address where the value is stored */
331 add_general (&gr, &stack_size, &cinfo->ret);
334 case MONO_TYPE_TYPEDBYREF:
335 /* Same as a valuetype with size 24 */
336 add_general (&gr, &stack_size, &cinfo->ret);
340 cinfo->ret.storage = ArgNone;
343 g_error ("Can't handle as return value 0x%x", sig->ret->type);
349 add_general (&gr, &stack_size, cinfo->args + 0);
351 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
353 fr = FLOAT_PARAM_REGS;
355 /* Emit the signature cookie just before the implicit arguments */
356 add_general (&gr, &stack_size, &cinfo->sig_cookie);
359 for (i = 0; i < sig->param_count; ++i) {
360 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
363 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
364 /* We allways pass the sig cookie on the stack for simplicity */
366 * Prevent implicit arguments + the sig cookie from being passed
370 fr = FLOAT_PARAM_REGS;
372 /* Emit the signature cookie just before the implicit arguments */
373 add_general (&gr, &stack_size, &cinfo->sig_cookie);
376 if (sig->params [i]->byref) {
377 add_general (&gr, &stack_size, ainfo);
380 ptype = mono_type_get_underlying_type (sig->params [i]);
381 ptype = mini_get_basic_type_from_generic (gsctx, ptype);
382 switch (ptype->type) {
383 case MONO_TYPE_BOOLEAN:
386 add_general (&gr, &stack_size, ainfo);
391 add_general (&gr, &stack_size, ainfo);
395 add_general (&gr, &stack_size, ainfo);
400 case MONO_TYPE_FNPTR:
401 case MONO_TYPE_CLASS:
402 case MONO_TYPE_OBJECT:
403 case MONO_TYPE_STRING:
404 case MONO_TYPE_SZARRAY:
405 case MONO_TYPE_ARRAY:
406 add_general (&gr, &stack_size, ainfo);
408 case MONO_TYPE_GENERICINST:
409 if (!mono_type_generic_inst_is_valuetype (sig->params [i])) {
410 add_general (&gr, &stack_size, ainfo);
414 case MONO_TYPE_VALUETYPE:
415 add_valuetype (gsctx, sig, ainfo, sig->params [i], FALSE, &gr, &fr, &stack_size);
417 case MONO_TYPE_TYPEDBYREF:
418 stack_size += sizeof (MonoTypedRef);
419 ainfo->storage = ArgOnStack;
423 add_general_pair (&gr, &stack_size, ainfo);
426 add_float (&fr, &stack_size, ainfo, FALSE);
429 add_float (&fr, &stack_size, ainfo, TRUE);
432 g_error ("unexpected type 0x%x", ptype->type);
433 g_assert_not_reached ();
437 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
439 fr = FLOAT_PARAM_REGS;
441 /* Emit the signature cookie just before the implicit arguments */
442 add_general (&gr, &stack_size, &cinfo->sig_cookie);
445 #if defined(__APPLE__)
446 if ((stack_size % 16) != 0) {
447 cinfo->need_stack_align = TRUE;
448 stack_size += cinfo->stack_align_amount = 16-(stack_size % 16);
452 cinfo->stack_usage = stack_size;
453 cinfo->reg_usage = gr;
454 cinfo->freg_usage = fr;
459 * mono_arch_get_argument_info:
460 * @csig: a method signature
461 * @param_count: the number of parameters to consider
462 * @arg_info: an array to store the result infos
464 * Gathers information on parameters such as size, alignment and
465 * padding. arg_info should be large enought to hold param_count + 1 entries.
467 * Returns the size of the argument area on the stack.
470 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
472 int k, args_size = 0;
478 cinfo = get_call_info (NULL, NULL, csig, FALSE);
480 if (MONO_TYPE_ISSTRUCT (csig->ret) && (cinfo->ret.storage == ArgOnStack)) {
481 args_size += sizeof (gpointer);
485 arg_info [0].offset = offset;
488 args_size += sizeof (gpointer);
492 arg_info [0].size = args_size;
494 for (k = 0; k < param_count; k++) {
497 size = mono_type_native_stack_size (csig->params [k], &align);
500 size = mini_type_stack_size (NULL, csig->params [k], &ialign);
504 /* ignore alignment for now */
507 args_size += pad = (align - (args_size & (align - 1))) & (align - 1);
508 arg_info [k].pad = pad;
510 arg_info [k + 1].pad = 0;
511 arg_info [k + 1].size = size;
513 arg_info [k + 1].offset = offset;
518 args_size += pad = (align - (args_size & (align - 1))) & (align - 1);
519 arg_info [k].pad = pad;
526 static const guchar cpuid_impl [] = {
527 0x55, /* push %ebp */
528 0x89, 0xe5, /* mov %esp,%ebp */
529 0x53, /* push %ebx */
530 0x8b, 0x45, 0x08, /* mov 0x8(%ebp),%eax */
531 0x0f, 0xa2, /* cpuid */
532 0x50, /* push %eax */
533 0x8b, 0x45, 0x10, /* mov 0x10(%ebp),%eax */
534 0x89, 0x18, /* mov %ebx,(%eax) */
535 0x8b, 0x45, 0x14, /* mov 0x14(%ebp),%eax */
536 0x89, 0x08, /* mov %ecx,(%eax) */
537 0x8b, 0x45, 0x18, /* mov 0x18(%ebp),%eax */
538 0x89, 0x10, /* mov %edx,(%eax) */
540 0x8b, 0x55, 0x0c, /* mov 0xc(%ebp),%edx */
541 0x89, 0x02, /* mov %eax,(%edx) */
547 typedef void (*CpuidFunc) (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx);
550 cpuid (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx)
554 __asm__ __volatile__ (
557 "movl %%eax, %%edx\n"
558 "xorl $0x200000, %%eax\n"
563 "xorl %%edx, %%eax\n"
564 "andl $0x200000, %%eax\n"
586 /* Have to use the code manager to get around WinXP DEP */
587 static CpuidFunc func = NULL;
590 ptr = mono_global_codeman_reserve (sizeof (cpuid_impl));
591 memcpy (ptr, cpuid_impl, sizeof (cpuid_impl));
592 func = (CpuidFunc)ptr;
594 func (id, p_eax, p_ebx, p_ecx, p_edx);
597 * We use this approach because of issues with gcc and pic code, see:
598 * http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=7329
599 __asm__ __volatile__ ("cpuid"
600 : "=a" (*p_eax), "=b" (*p_ebx), "=c" (*p_ecx), "=d" (*p_edx)
609 * Initialize the cpu to execute managed code.
612 mono_arch_cpu_init (void)
614 /* spec compliance requires running with double precision */
618 __asm__ __volatile__ ("fnstcw %0\n": "=m" (fpcw));
619 fpcw &= ~X86_FPCW_PRECC_MASK;
620 fpcw |= X86_FPCW_PREC_DOUBLE;
621 __asm__ __volatile__ ("fldcw %0\n": : "m" (fpcw));
622 __asm__ __volatile__ ("fnstcw %0\n": "=m" (fpcw));
624 _control87 (_PC_53, MCW_PC);
629 * Initialize architecture specific code.
632 mono_arch_init (void)
634 InitializeCriticalSection (&mini_arch_mutex);
638 * Cleanup architecture specific code.
641 mono_arch_cleanup (void)
643 DeleteCriticalSection (&mini_arch_mutex);
647 * This function returns the optimizations supported on this cpu.
650 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
652 int eax, ebx, ecx, edx;
656 /* Feature Flags function, flags returned in EDX. */
657 if (cpuid (1, &eax, &ebx, &ecx, &edx)) {
658 if (edx & (1 << 15)) {
659 opts |= MONO_OPT_CMOV;
661 opts |= MONO_OPT_FCMOV;
663 *exclude_mask |= MONO_OPT_FCMOV;
665 *exclude_mask |= MONO_OPT_CMOV;
667 opts |= MONO_OPT_SSE2;
669 *exclude_mask |= MONO_OPT_SSE2;
675 * Determine whenever the trap whose info is in SIGINFO is caused by
679 mono_arch_is_int_overflow (void *sigctx, void *info)
684 mono_arch_sigctx_to_monoctx (sigctx, &ctx);
686 ip = (guint8*)ctx.eip;
688 if ((ip [0] == 0xf7) && (x86_modrm_mod (ip [1]) == 0x3) && (x86_modrm_reg (ip [1]) == 0x7)) {
692 switch (x86_modrm_rm (ip [1])) {
712 g_assert_not_reached ();
724 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
729 for (i = 0; i < cfg->num_varinfo; i++) {
730 MonoInst *ins = cfg->varinfo [i];
731 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
734 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
737 if ((ins->flags & (MONO_INST_IS_DEAD|MONO_INST_VOLATILE|MONO_INST_INDIRECT)) ||
738 (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
741 /* we dont allocate I1 to registers because there is no simply way to sign extend
742 * 8bit quantities in caller saved registers on x86 */
743 if (mono_is_regsize_var (ins->inst_vtype) && (ins->inst_vtype->type != MONO_TYPE_I1)) {
744 g_assert (MONO_VARINFO (cfg, i)->reg == -1);
745 g_assert (i == vmv->idx);
746 vars = g_list_prepend (vars, vmv);
750 vars = mono_varlist_sort (cfg, vars, 0);
756 mono_arch_get_global_int_regs (MonoCompile *cfg)
760 /* we can use 3 registers for global allocation */
761 regs = g_list_prepend (regs, (gpointer)X86_EBX);
762 regs = g_list_prepend (regs, (gpointer)X86_ESI);
763 regs = g_list_prepend (regs, (gpointer)X86_EDI);
769 * mono_arch_regalloc_cost:
771 * Return the cost, in number of memory references, of the action of
772 * allocating the variable VMV into a register during global register
776 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
778 MonoInst *ins = cfg->varinfo [vmv->idx];
780 if (cfg->method->save_lmf)
781 /* The register is already saved */
782 return (ins->opcode == OP_ARG) ? 1 : 0;
784 /* push+pop+possible load if it is an argument */
785 return (ins->opcode == OP_ARG) ? 3 : 2;
789 * Set var information according to the calling convention. X86 version.
790 * The locals var stuff should most likely be split in another method.
793 mono_arch_allocate_vars (MonoCompile *cfg)
795 MonoMethodSignature *sig;
796 MonoMethodHeader *header;
798 guint32 locals_stack_size, locals_stack_align;
803 header = mono_method_get_header (cfg->method);
804 sig = mono_method_signature (cfg->method);
806 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
808 cfg->frame_reg = MONO_ARCH_BASEREG;
811 /* Reserve space to save LMF and caller saved registers */
813 if (cfg->method->save_lmf) {
814 offset += sizeof (MonoLMF);
816 if (cfg->used_int_regs & (1 << X86_EBX)) {
820 if (cfg->used_int_regs & (1 << X86_EDI)) {
824 if (cfg->used_int_regs & (1 << X86_ESI)) {
829 switch (cinfo->ret.storage) {
830 case ArgValuetypeInReg:
831 /* Allocate a local to hold the result, the epilog will copy it to the correct place */
833 cfg->ret->opcode = OP_REGOFFSET;
834 cfg->ret->inst_basereg = X86_EBP;
835 cfg->ret->inst_offset = - offset;
841 /* Allocate locals */
842 offsets = mono_allocate_stack_slots (cfg, &locals_stack_size, &locals_stack_align);
843 if (locals_stack_align) {
844 offset += (locals_stack_align - 1);
845 offset &= ~(locals_stack_align - 1);
847 for (i = cfg->locals_start; i < cfg->num_varinfo; i++) {
848 if (offsets [i] != -1) {
849 MonoInst *inst = cfg->varinfo [i];
850 inst->opcode = OP_REGOFFSET;
851 inst->inst_basereg = X86_EBP;
852 inst->inst_offset = - (offset + offsets [i]);
853 //printf ("allocated local %d to ", i); mono_print_tree_nl (inst);
856 offset += locals_stack_size;
860 * Allocate arguments+return value
863 switch (cinfo->ret.storage) {
865 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
867 * In the new IR, the cfg->vret_addr variable represents the
868 * vtype return value.
870 cfg->vret_addr->opcode = OP_REGOFFSET;
871 cfg->vret_addr->inst_basereg = cfg->frame_reg;
872 cfg->vret_addr->inst_offset = cinfo->ret.offset + ARGS_OFFSET;
873 if (G_UNLIKELY (cfg->verbose_level > 1)) {
874 printf ("vret_addr =");
875 mono_print_ins (cfg->vret_addr);
878 cfg->ret->opcode = OP_REGOFFSET;
879 cfg->ret->inst_basereg = X86_EBP;
880 cfg->ret->inst_offset = cinfo->ret.offset + ARGS_OFFSET;
883 case ArgValuetypeInReg:
886 cfg->ret->opcode = OP_REGVAR;
887 cfg->ret->inst_c0 = cinfo->ret.reg;
888 cfg->ret->dreg = cinfo->ret.reg;
891 case ArgOnFloatFpStack:
892 case ArgOnDoubleFpStack:
895 g_assert_not_reached ();
898 if (sig->call_convention == MONO_CALL_VARARG) {
899 g_assert (cinfo->sig_cookie.storage == ArgOnStack);
900 cfg->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
903 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
904 ArgInfo *ainfo = &cinfo->args [i];
905 inst = cfg->args [i];
906 if (inst->opcode != OP_REGVAR) {
907 inst->opcode = OP_REGOFFSET;
908 inst->inst_basereg = X86_EBP;
910 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
913 offset += (MONO_ARCH_FRAME_ALIGNMENT - 1);
914 offset &= ~(MONO_ARCH_FRAME_ALIGNMENT - 1);
916 cfg->stack_offset = offset;
920 mono_arch_create_vars (MonoCompile *cfg)
922 MonoMethodSignature *sig;
925 sig = mono_method_signature (cfg->method);
927 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
929 if (cinfo->ret.storage == ArgValuetypeInReg)
930 cfg->ret_var_is_local = TRUE;
931 if ((cinfo->ret.storage != ArgValuetypeInReg) && MONO_TYPE_ISSTRUCT (sig->ret)) {
932 cfg->vret_addr = mono_compile_create_var (cfg, &mono_defaults.int_class->byval_arg, OP_ARG);
937 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call)
940 MonoMethodSignature *tmp_sig;
943 /* FIXME: Add support for signature tokens to AOT */
944 cfg->disable_aot = TRUE;
945 MONO_INST_NEW (cfg, arg, OP_OUTARG);
948 * mono_ArgIterator_Setup assumes the signature cookie is
949 * passed first and all the arguments which were before it are
950 * passed on the stack after the signature. So compensate by
951 * passing a different signature.
953 tmp_sig = mono_metadata_signature_dup (call->signature);
954 tmp_sig->param_count -= call->signature->sentinelpos;
955 tmp_sig->sentinelpos = 0;
956 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
958 MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
959 sig_arg->inst_p0 = tmp_sig;
961 arg->inst_left = sig_arg;
962 arg->type = STACK_PTR;
963 /* prepend, so they get reversed */
964 arg->next = call->out_args;
965 call->out_args = arg;
969 * It is expensive to adjust esp for each individual fp argument pushed on the stack
970 * so we try to do it just once when we have multiple fp arguments in a row.
971 * We don't use this mechanism generally because for int arguments the generated code
972 * is slightly bigger and new generation cpus optimize away the dependency chains
973 * created by push instructions on the esp value.
974 * fp_arg_setup is the first argument in the execution sequence where the esp register
978 collect_fp_stack_space (MonoMethodSignature *sig, int start_arg, int *fp_arg_setup)
983 for (; start_arg < sig->param_count; ++start_arg) {
984 t = mono_type_get_underlying_type (sig->params [start_arg]);
985 if (!t->byref && t->type == MONO_TYPE_R8) {
986 fp_space += sizeof (double);
987 *fp_arg_setup = start_arg;
996 * take the arguments and generate the arch-specific
997 * instructions to properly call the function in call.
998 * This includes pushing, moving arguments to the right register
1002 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
1004 MonoMethodSignature *sig;
1007 int sentinelpos = 0;
1008 int fp_args_space = 0, fp_args_offset = 0, fp_arg_setup = -1;
1010 sig = call->signature;
1011 n = sig->param_count + sig->hasthis;
1013 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
1015 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG))
1016 sentinelpos = sig->sentinelpos + (is_virtual ? 1 : 0);
1018 for (i = 0; i < n; ++i) {
1019 ArgInfo *ainfo = cinfo->args + i;
1021 /* Emit the signature cookie just before the implicit arguments */
1022 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sentinelpos)) {
1023 emit_sig_cookie (cfg, call);
1026 if (is_virtual && i == 0) {
1027 /* the argument will be attached to the call instrucion */
1028 in = call->args [i];
1032 if (i >= sig->hasthis)
1033 t = sig->params [i - sig->hasthis];
1035 t = &mono_defaults.int_class->byval_arg;
1036 t = mono_type_get_underlying_type (t);
1038 MONO_INST_NEW (cfg, arg, OP_OUTARG);
1039 in = call->args [i];
1040 arg->cil_code = in->cil_code;
1041 arg->inst_left = in;
1042 arg->type = in->type;
1043 /* prepend, so they get reversed */
1044 arg->next = call->out_args;
1045 call->out_args = arg;
1047 if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(t))) {
1052 if (t->type == MONO_TYPE_TYPEDBYREF) {
1053 size = sizeof (MonoTypedRef);
1054 align = sizeof (gpointer);
1058 size = mono_type_native_stack_size (&in->klass->byval_arg, &ialign);
1061 size = mini_type_stack_size (cfg->generic_sharing_context, &in->klass->byval_arg, &ialign);
1064 arg->opcode = OP_OUTARG_VT;
1065 arg->klass = in->klass;
1066 arg->backend.is_pinvoke = sig->pinvoke;
1067 arg->inst_imm = size;
1070 switch (ainfo->storage) {
1072 arg->opcode = OP_OUTARG;
1074 if (t->type == MONO_TYPE_R4) {
1075 arg->opcode = OP_OUTARG_R4;
1076 } else if (t->type == MONO_TYPE_R8) {
1077 arg->opcode = OP_OUTARG_R8;
1078 /* we store in the upper bits of backen.arg_info the needed
1079 * esp adjustment and in the lower bits the offset from esp
1080 * where the arg needs to be stored
1082 if (!fp_args_space) {
1083 fp_args_space = collect_fp_stack_space (sig, i - sig->hasthis, &fp_arg_setup);
1084 fp_args_offset = fp_args_space;
1086 arg->backend.arg_info = fp_args_space - fp_args_offset;
1087 fp_args_offset -= sizeof (double);
1088 if (i - sig->hasthis == fp_arg_setup) {
1089 arg->backend.arg_info |= fp_args_space << 16;
1091 if (fp_args_offset == 0) {
1092 /* the allocated esp stack is finished:
1093 * prepare for an eventual second run of fp args
1101 g_assert_not_reached ();
1107 /* Handle the case where there are no implicit arguments */
1108 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sentinelpos)) {
1109 emit_sig_cookie (cfg, call);
1112 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1113 if (cinfo->ret.storage == ArgValuetypeInReg) {
1114 MonoInst *zero_inst;
1116 * After the call, the struct is in registers, but needs to be saved to the memory pointed
1117 * to by vt_arg in this_vret_args. This means that vt_arg needs to be saved somewhere
1118 * before calling the function. So we add a dummy instruction to represent pushing the
1119 * struct return address to the stack. The return address will be saved to this stack slot
1120 * by the code emitted in this_vret_args.
1122 MONO_INST_NEW (cfg, arg, OP_OUTARG);
1123 MONO_INST_NEW (cfg, zero_inst, OP_ICONST);
1124 zero_inst->inst_p0 = 0;
1125 arg->inst_left = zero_inst;
1126 arg->type = STACK_PTR;
1127 /* prepend, so they get reversed */
1128 arg->next = call->out_args;
1129 call->out_args = arg;
1132 /* if the function returns a struct, the called method already does a ret $0x4 */
1133 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret))
1134 cinfo->stack_usage -= 4;
1137 call->stack_usage = cinfo->stack_usage;
1139 #if defined(__APPLE__)
1140 if (cinfo->need_stack_align) {
1141 MONO_INST_NEW (cfg, arg, OP_X86_OUTARG_ALIGN_STACK);
1142 arg->inst_c0 = cinfo->stack_align_amount;
1143 arg->next = call->out_args;
1144 call->out_args = arg;
1152 emit_sig_cookie2 (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo)
1154 MonoMethodSignature *tmp_sig;
1156 /* FIXME: Add support for signature tokens to AOT */
1157 cfg->disable_aot = TRUE;
1160 * mono_ArgIterator_Setup assumes the signature cookie is
1161 * passed first and all the arguments which were before it are
1162 * passed on the stack after the signature. So compensate by
1163 * passing a different signature.
1165 tmp_sig = mono_metadata_signature_dup (call->signature);
1166 tmp_sig->param_count -= call->signature->sentinelpos;
1167 tmp_sig->sentinelpos = 0;
1168 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1170 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_X86_PUSH_IMM, -1, -1, tmp_sig);
1174 mono_arch_emit_call (MonoCompile *cfg, MonoCallInst *call)
1177 MonoMethodSignature *sig;
1180 int sentinelpos = 0;
1182 sig = call->signature;
1183 n = sig->param_count + sig->hasthis;
1185 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
1187 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG))
1188 sentinelpos = sig->sentinelpos + (sig->hasthis ? 1 : 0);
1190 #if defined(__APPLE__)
1191 if (cinfo->need_stack_align) {
1192 MONO_INST_NEW (cfg, arg, OP_SUB_IMM);
1193 arg->dreg = X86_ESP;
1194 arg->sreg1 = X86_ESP;
1195 arg->inst_imm = cinfo->stack_align_amount;
1196 MONO_ADD_INS (cfg->cbb, arg);
1200 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1203 if (cinfo->ret.storage == ArgValuetypeInReg) {
1204 if (cinfo->ret.pair_storage [0] == ArgInIReg && cinfo->ret.pair_storage [1] == ArgNone) {
1206 * Tell the JIT to use a more efficient calling convention: call using
1207 * OP_CALL, compute the result location after the call, and save the
1210 call->vret_in_reg = TRUE;
1213 * The valuetype is in EAX:EDX after the call, needs to be copied to
1214 * the stack. Save the address here, so the call instruction can
1217 MONO_INST_NEW (cfg, vtarg, OP_X86_PUSH);
1218 vtarg->sreg1 = call->vret_var->dreg;
1219 MONO_ADD_INS (cfg->cbb, vtarg);
1224 /* Handle the case where there are no implicit arguments */
1225 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sentinelpos)) {
1226 emit_sig_cookie2 (cfg, call, cinfo);
1229 /* Arguments are pushed in the reverse order */
1230 for (i = n - 1; i >= 0; i --) {
1231 ArgInfo *ainfo = cinfo->args + i;
1234 if (i >= sig->hasthis)
1235 t = sig->params [i - sig->hasthis];
1237 t = &mono_defaults.int_class->byval_arg;
1238 t = mono_type_get_underlying_type (t);
1240 MONO_INST_NEW (cfg, arg, OP_X86_PUSH);
1242 in = call->args [i];
1243 arg->cil_code = in->cil_code;
1244 arg->sreg1 = in->dreg;
1245 arg->type = in->type;
1247 g_assert (in->dreg != -1);
1249 if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(t))) {
1254 g_assert (in->klass);
1256 if (t->type == MONO_TYPE_TYPEDBYREF) {
1257 size = sizeof (MonoTypedRef);
1258 align = sizeof (gpointer);
1262 size = mono_type_native_stack_size (&in->klass->byval_arg, &ialign);
1265 size = mini_type_stack_size (cfg->generic_sharing_context, &in->klass->byval_arg, &align);
1269 arg->opcode = OP_OUTARG_VT;
1270 arg->sreg1 = in->dreg;
1271 arg->klass = in->klass;
1272 arg->backend.size = size;
1274 MONO_ADD_INS (cfg->cbb, arg);
1278 switch (ainfo->storage) {
1280 arg->opcode = OP_X86_PUSH;
1282 if (t->type == MONO_TYPE_R4) {
1283 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
1284 arg->opcode = OP_STORER4_MEMBASE_REG;
1285 arg->inst_destbasereg = X86_ESP;
1286 arg->inst_offset = 0;
1287 } else if (t->type == MONO_TYPE_R8) {
1288 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
1289 arg->opcode = OP_STORER8_MEMBASE_REG;
1290 arg->inst_destbasereg = X86_ESP;
1291 arg->inst_offset = 0;
1292 } else if (t->type == MONO_TYPE_I8 || t->type == MONO_TYPE_U8) {
1294 MONO_EMIT_NEW_UNALU (cfg, OP_X86_PUSH, -1, in->dreg + 2);
1299 g_assert_not_reached ();
1302 MONO_ADD_INS (cfg->cbb, arg);
1305 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sentinelpos)) {
1306 /* Emit the signature cookie just before the implicit arguments */
1307 emit_sig_cookie2 (cfg, call, cinfo);
1311 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1314 if (cinfo->ret.storage == ArgValuetypeInReg) {
1317 else if (cinfo->ret.storage == ArgInIReg) {
1319 /* The return address is passed in a register */
1320 MONO_INST_NEW (cfg, vtarg, OP_MOVE);
1321 vtarg->sreg1 = call->inst.dreg;
1322 vtarg->dreg = mono_regstate_next_int (cfg->rs);
1323 MONO_ADD_INS (cfg->cbb, vtarg);
1325 mono_call_inst_add_outarg_reg (cfg, call, vtarg->dreg, cinfo->ret.reg, FALSE);
1328 MONO_INST_NEW (cfg, vtarg, OP_X86_PUSH);
1329 vtarg->type = STACK_MP;
1330 vtarg->sreg1 = call->vret_var->dreg;
1331 MONO_ADD_INS (cfg->cbb, vtarg);
1334 /* if the function returns a struct, the called method already does a ret $0x4 */
1335 cinfo->stack_usage -= 4;
1338 call->stack_usage = cinfo->stack_usage;
1342 mono_arch_emit_outarg_vt (MonoCompile *cfg, MonoInst *ins, MonoInst *src)
1345 int size = ins->backend.size;
1348 MONO_INST_NEW (cfg, arg, OP_X86_PUSH_MEMBASE);
1349 arg->sreg1 = src->dreg;
1351 MONO_ADD_INS (cfg->cbb, arg);
1352 } else if (size <= 20) {
1353 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SUB_IMM, X86_ESP, X86_ESP, ALIGN_TO (size, 4));
1354 mini_emit_memcpy2 (cfg, X86_ESP, 0, src->dreg, 0, size, 4);
1356 MONO_INST_NEW (cfg, arg, OP_X86_PUSH_OBJ);
1357 arg->inst_basereg = src->dreg;
1358 arg->inst_offset = 0;
1359 arg->inst_imm = size;
1361 MONO_ADD_INS (cfg->cbb, arg);
1366 mono_arch_emit_setret (MonoCompile *cfg, MonoMethod *method, MonoInst *val)
1368 MonoType *ret = mono_type_get_underlying_type (mono_method_signature (method)->ret);
1371 if (ret->type == MONO_TYPE_R4) {
1374 } else if (ret->type == MONO_TYPE_R8) {
1377 } else if (ret->type == MONO_TYPE_I8 || ret->type == MONO_TYPE_U8) {
1378 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, X86_EAX, val->dreg + 1);
1379 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, X86_EDX, val->dreg + 2);
1384 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg, val->dreg);
1388 * Allow tracing to work with this interface (with an optional argument)
1391 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
1396 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1399 /* if some args are passed in registers, we need to save them here */
1400 x86_push_reg (code, X86_EBP);
1402 if (cfg->compile_aot) {
1403 x86_push_imm (code, cfg->method);
1404 x86_mov_reg_imm (code, X86_EAX, func);
1405 x86_call_reg (code, X86_EAX);
1407 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, cfg->method);
1408 x86_push_imm (code, cfg->method);
1409 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
1410 x86_call_code (code, 0);
1413 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 16);
1415 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1430 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
1433 int arg_size = 0, save_mode = SAVE_NONE;
1434 MonoMethod *method = cfg->method;
1436 switch (mono_type_get_underlying_type (mono_method_signature (method)->ret)->type) {
1437 case MONO_TYPE_VOID:
1438 /* special case string .ctor icall */
1439 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
1440 save_mode = SAVE_EAX;
1442 save_mode = SAVE_NONE;
1446 save_mode = SAVE_EAX_EDX;
1450 save_mode = SAVE_FP;
1452 case MONO_TYPE_GENERICINST:
1453 if (!mono_type_generic_inst_is_valuetype (mono_method_signature (method)->ret)) {
1454 save_mode = SAVE_EAX;
1458 case MONO_TYPE_VALUETYPE:
1459 save_mode = SAVE_STRUCT;
1462 save_mode = SAVE_EAX;
1466 switch (save_mode) {
1468 x86_push_reg (code, X86_EDX);
1469 x86_push_reg (code, X86_EAX);
1470 if (enable_arguments) {
1471 x86_push_reg (code, X86_EDX);
1472 x86_push_reg (code, X86_EAX);
1477 x86_push_reg (code, X86_EAX);
1478 if (enable_arguments) {
1479 x86_push_reg (code, X86_EAX);
1484 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1485 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1486 if (enable_arguments) {
1487 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1488 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1493 if (enable_arguments) {
1494 x86_push_membase (code, X86_EBP, 8);
1503 if (cfg->compile_aot) {
1504 x86_push_imm (code, method);
1505 x86_mov_reg_imm (code, X86_EAX, func);
1506 x86_call_reg (code, X86_EAX);
1508 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, method);
1509 x86_push_imm (code, method);
1510 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
1511 x86_call_code (code, 0);
1513 x86_alu_reg_imm (code, X86_ADD, X86_ESP, arg_size + 4);
1515 switch (save_mode) {
1517 x86_pop_reg (code, X86_EAX);
1518 x86_pop_reg (code, X86_EDX);
1521 x86_pop_reg (code, X86_EAX);
1524 x86_fld_membase (code, X86_ESP, 0, TRUE);
1525 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1535 #define EMIT_COND_BRANCH(ins,cond,sign) \
1536 if (ins->flags & MONO_INST_BRLABEL) { \
1537 if (ins->inst_i0->inst_c0) { \
1538 x86_branch (code, cond, cfg->native_code + ins->inst_i0->inst_c0, sign); \
1540 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
1541 if ((cfg->opt & MONO_OPT_BRANCH) && \
1542 x86_is_imm8 (ins->inst_i0->inst_c1 - cpos)) \
1543 x86_branch8 (code, cond, 0, sign); \
1545 x86_branch32 (code, cond, 0, sign); \
1548 if (ins->inst_true_bb->native_offset) { \
1549 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
1551 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1552 if ((cfg->opt & MONO_OPT_BRANCH) && \
1553 x86_is_imm8 (ins->inst_true_bb->max_offset - cpos)) \
1554 x86_branch8 (code, cond, 0, sign); \
1556 x86_branch32 (code, cond, 0, sign); \
1561 * Emit an exception if condition is fail and
1562 * if possible do a directly branch to target
1564 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
1566 MonoInst *tins = mono_branch_optimize_exception_target (cfg, bb, exc_name); \
1567 if (tins == NULL) { \
1568 mono_add_patch_info (cfg, code - cfg->native_code, \
1569 MONO_PATCH_INFO_EXC, exc_name); \
1570 x86_branch32 (code, cond, 0, signed); \
1572 EMIT_COND_BRANCH (tins, cond, signed); \
1576 #define EMIT_FPCOMPARE(code) do { \
1577 x86_fcompp (code); \
1578 x86_fnstsw (code); \
1583 emit_call (MonoCompile *cfg, guint8 *code, guint32 patch_type, gconstpointer data)
1585 mono_add_patch_info (cfg, code - cfg->native_code, patch_type, data);
1586 x86_call_code (code, 0);
1591 #define INST_IGNORES_CFLAGS(opcode) (!(((opcode) == OP_ADC) || ((opcode) == OP_IADC) || ((opcode) == OP_ADC_IMM) || ((opcode) == OP_IADC_IMM) || ((opcode) == OP_SBB) || ((opcode) == OP_ISBB) || ((opcode) == OP_SBB_IMM) || ((opcode) == OP_ISBB_IMM)))
1594 * mono_peephole_pass_1:
1596 * Perform peephole opts which should/can be performed before local regalloc
1599 mono_arch_peephole_pass_1 (MonoCompile *cfg, MonoBasicBlock *bb)
1603 MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
1604 MonoInst *last_ins = ins->prev;
1606 switch (ins->opcode) {
1609 if ((ins->sreg1 < MONO_MAX_IREGS) && (ins->dreg >= MONO_MAX_IREGS)) {
1611 * X86_LEA is like ADD, but doesn't have the
1612 * sreg1==dreg restriction.
1614 ins->opcode = OP_X86_LEA_MEMBASE;
1615 ins->inst_basereg = ins->sreg1;
1616 } else if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1617 ins->opcode = OP_X86_INC_REG;
1621 if ((ins->sreg1 < MONO_MAX_IREGS) && (ins->dreg >= MONO_MAX_IREGS)) {
1622 ins->opcode = OP_X86_LEA_MEMBASE;
1623 ins->inst_basereg = ins->sreg1;
1624 ins->inst_imm = -ins->inst_imm;
1625 } else if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1626 ins->opcode = OP_X86_DEC_REG;
1628 case OP_COMPARE_IMM:
1629 case OP_ICOMPARE_IMM:
1630 /* OP_COMPARE_IMM (reg, 0)
1632 * OP_X86_TEST_NULL (reg)
1635 ins->opcode = OP_X86_TEST_NULL;
1637 case OP_X86_COMPARE_MEMBASE_IMM:
1639 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1640 * OP_X86_COMPARE_MEMBASE_IMM offset(basereg), imm
1642 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1643 * OP_COMPARE_IMM reg, imm
1645 * Note: if imm = 0 then OP_COMPARE_IMM replaced with OP_X86_TEST_NULL
1647 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG) &&
1648 ins->inst_basereg == last_ins->inst_destbasereg &&
1649 ins->inst_offset == last_ins->inst_offset) {
1650 ins->opcode = OP_COMPARE_IMM;
1651 ins->sreg1 = last_ins->sreg1;
1653 /* check if we can remove cmp reg,0 with test null */
1655 ins->opcode = OP_X86_TEST_NULL;
1659 case OP_X86_PUSH_MEMBASE:
1660 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG ||
1661 last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1662 ins->inst_basereg == last_ins->inst_destbasereg &&
1663 ins->inst_offset == last_ins->inst_offset) {
1664 ins->opcode = OP_X86_PUSH;
1665 ins->sreg1 = last_ins->sreg1;
1670 mono_peephole_ins (bb, ins);
1675 mono_arch_peephole_pass_2 (MonoCompile *cfg, MonoBasicBlock *bb)
1679 MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
1680 switch (ins->opcode) {
1682 /* reg = 0 -> XOR (reg, reg) */
1683 /* XOR sets cflags on x86, so we cant do it always */
1684 if (ins->inst_c0 == 0 && (!ins->next || (ins->next && INST_IGNORES_CFLAGS (ins->next->opcode)))) {
1687 ins->opcode = OP_IXOR;
1688 ins->sreg1 = ins->dreg;
1689 ins->sreg2 = ins->dreg;
1692 * Convert succeeding STORE_MEMBASE_IMM 0 ins to STORE_MEMBASE_REG
1693 * since it takes 3 bytes instead of 7.
1695 for (ins2 = ins->next; ins2; ins2 = ins2->next) {
1696 if ((ins2->opcode == OP_STORE_MEMBASE_IMM) && (ins2->inst_imm == 0)) {
1697 ins2->opcode = OP_STORE_MEMBASE_REG;
1698 ins2->sreg1 = ins->dreg;
1700 else if ((ins2->opcode == OP_STOREI4_MEMBASE_IMM) && (ins2->inst_imm == 0)) {
1701 ins2->opcode = OP_STOREI4_MEMBASE_REG;
1702 ins2->sreg1 = ins->dreg;
1704 else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM)) {
1705 /* Continue iteration */
1714 if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1715 ins->opcode = OP_X86_INC_REG;
1719 if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1720 ins->opcode = OP_X86_DEC_REG;
1724 mono_peephole_ins (bb, ins);
1729 * mono_arch_lowering_pass:
1731 * Converts complex opcodes into simpler ones so that each IR instruction
1732 * corresponds to one machine instruction.
1735 mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1737 MonoInst *ins, *next;
1739 if (bb->max_vreg > cfg->rs->next_vreg)
1740 cfg->rs->next_vreg = bb->max_vreg;
1743 * FIXME: Need to add more instructions, but the current machine
1744 * description can't model some parts of the composite instructions like
1747 MONO_BB_FOR_EACH_INS_SAFE (bb, next, ins) {
1748 switch (ins->opcode) {
1751 case OP_IDIV_UN_IMM:
1752 case OP_IREM_UN_IMM:
1754 * Keep the cases where we could generated optimized code, otherwise convert
1755 * to the non-imm variant.
1757 if ((ins->opcode == OP_IREM_IMM) && mono_is_power_of_two (ins->inst_imm) >= 0)
1759 mono_decompose_op_imm (cfg, bb, ins);
1766 bb->max_vreg = cfg->rs->next_vreg;
1770 branch_cc_table [] = {
1771 X86_CC_EQ, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1772 X86_CC_NE, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1773 X86_CC_O, X86_CC_NO, X86_CC_C, X86_CC_NC
1776 /* Maps CMP_... constants to X86_CC_... constants */
1779 X86_CC_EQ, X86_CC_NE, X86_CC_LE, X86_CC_GE, X86_CC_LT, X86_CC_GT,
1780 X86_CC_LE, X86_CC_GE, X86_CC_LT, X86_CC_GT
1784 cc_signed_table [] = {
1785 TRUE, TRUE, TRUE, TRUE, TRUE, TRUE,
1786 FALSE, FALSE, FALSE, FALSE
1789 static unsigned char*
1790 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int size, gboolean is_signed)
1792 #define XMM_TEMP_REG 0
1793 if (cfg->opt & MONO_OPT_SSE2 && size < 8) {
1794 /* optimize by assigning a local var for this use so we avoid
1795 * the stack manipulations */
1796 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1797 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1798 x86_movsd_reg_membase (code, XMM_TEMP_REG, X86_ESP, 0);
1799 x86_cvttsd2si (code, dreg, XMM_TEMP_REG);
1800 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1802 x86_widen_reg (code, dreg, dreg, is_signed, FALSE);
1804 x86_widen_reg (code, dreg, dreg, is_signed, TRUE);
1807 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
1808 x86_fnstcw_membase(code, X86_ESP, 0);
1809 x86_mov_reg_membase (code, dreg, X86_ESP, 0, 2);
1810 x86_alu_reg_imm (code, X86_OR, dreg, 0xc00);
1811 x86_mov_membase_reg (code, X86_ESP, 2, dreg, 2);
1812 x86_fldcw_membase (code, X86_ESP, 2);
1814 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1815 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
1816 x86_pop_reg (code, dreg);
1817 /* FIXME: need the high register
1818 * x86_pop_reg (code, dreg_high);
1821 x86_push_reg (code, X86_EAX); // SP = SP - 4
1822 x86_fist_pop_membase (code, X86_ESP, 0, FALSE);
1823 x86_pop_reg (code, dreg);
1825 x86_fldcw_membase (code, X86_ESP, 0);
1826 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
1829 x86_widen_reg (code, dreg, dreg, is_signed, FALSE);
1831 x86_widen_reg (code, dreg, dreg, is_signed, TRUE);
1835 static unsigned char*
1836 mono_emit_stack_alloc (guchar *code, MonoInst* tree)
1838 int sreg = tree->sreg1;
1839 int need_touch = FALSE;
1841 #if defined(PLATFORM_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
1850 * If requested stack size is larger than one page,
1851 * perform stack-touch operation
1854 * Generate stack probe code.
1855 * Under Windows, it is necessary to allocate one page at a time,
1856 * "touching" stack after each successful sub-allocation. This is
1857 * because of the way stack growth is implemented - there is a
1858 * guard page before the lowest stack page that is currently commited.
1859 * Stack normally grows sequentially so OS traps access to the
1860 * guard page and commits more pages when needed.
1862 x86_test_reg_imm (code, sreg, ~0xFFF);
1863 br[0] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1865 br[2] = code; /* loop */
1866 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
1867 x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
1870 * By the end of the loop, sreg2 is smaller than 0x1000, so the init routine
1871 * that follows only initializes the last part of the area.
1873 /* Same as the init code below with size==0x1000 */
1874 if (tree->flags & MONO_INST_INIT) {
1875 x86_push_reg (code, X86_EAX);
1876 x86_push_reg (code, X86_ECX);
1877 x86_push_reg (code, X86_EDI);
1878 x86_mov_reg_imm (code, X86_ECX, (0x1000 >> 2));
1879 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
1880 x86_lea_membase (code, X86_EDI, X86_ESP, 12);
1882 x86_prefix (code, X86_REP_PREFIX);
1884 x86_pop_reg (code, X86_EDI);
1885 x86_pop_reg (code, X86_ECX);
1886 x86_pop_reg (code, X86_EAX);
1889 x86_alu_reg_imm (code, X86_SUB, sreg, 0x1000);
1890 x86_alu_reg_imm (code, X86_CMP, sreg, 0x1000);
1891 br[3] = code; x86_branch8 (code, X86_CC_AE, 0, FALSE);
1892 x86_patch (br[3], br[2]);
1893 x86_test_reg_reg (code, sreg, sreg);
1894 br[4] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1895 x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1897 br[1] = code; x86_jump8 (code, 0);
1899 x86_patch (br[0], code);
1900 x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1901 x86_patch (br[1], code);
1902 x86_patch (br[4], code);
1905 x86_alu_reg_reg (code, X86_SUB, X86_ESP, tree->sreg1);
1907 if (tree->flags & MONO_INST_INIT) {
1909 if (tree->dreg != X86_EAX && sreg != X86_EAX) {
1910 x86_push_reg (code, X86_EAX);
1913 if (tree->dreg != X86_ECX && sreg != X86_ECX) {
1914 x86_push_reg (code, X86_ECX);
1917 if (tree->dreg != X86_EDI && sreg != X86_EDI) {
1918 x86_push_reg (code, X86_EDI);
1922 x86_shift_reg_imm (code, X86_SHR, sreg, 2);
1923 if (sreg != X86_ECX)
1924 x86_mov_reg_reg (code, X86_ECX, sreg, 4);
1925 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
1927 x86_lea_membase (code, X86_EDI, X86_ESP, offset);
1929 x86_prefix (code, X86_REP_PREFIX);
1932 if (tree->dreg != X86_EDI && sreg != X86_EDI)
1933 x86_pop_reg (code, X86_EDI);
1934 if (tree->dreg != X86_ECX && sreg != X86_ECX)
1935 x86_pop_reg (code, X86_ECX);
1936 if (tree->dreg != X86_EAX && sreg != X86_EAX)
1937 x86_pop_reg (code, X86_EAX);
1944 emit_move_return_value (MonoCompile *cfg, MonoInst *ins, guint8 *code)
1949 /* Move return value to the target register */
1950 switch (ins->opcode) {
1953 case OP_CALL_MEMBASE:
1954 if (ins->dreg != X86_EAX)
1955 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
1959 case OP_VCALL_MEMBASE:
1962 case OP_VCALL2_MEMBASE:
1963 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, ((MonoCallInst*)ins)->signature, FALSE);
1964 if (cinfo->ret.storage == ArgValuetypeInReg) {
1965 /* Pop the destination address from the stack */
1966 x86_pop_reg (code, X86_ECX);
1968 for (quad = 0; quad < 2; quad ++) {
1969 switch (cinfo->ret.pair_storage [quad]) {
1971 g_assert (cinfo->ret.pair_regs [quad] != X86_ECX);
1972 x86_mov_membase_reg (code, X86_ECX, (quad * sizeof (gpointer)), cinfo->ret.pair_regs [quad], sizeof (gpointer));
1977 g_assert_not_reached ();
1983 MonoCallInst *call = (MonoCallInst*)ins;
1984 if (call->method && !mono_method_signature (call->method)->ret->byref && mono_method_signature (call->method)->ret->type == MONO_TYPE_R4) {
1985 /* Avoid some precision issues by saving/reloading the return value */
1986 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1987 x86_fst_membase (code, X86_ESP, 0, FALSE, TRUE);
1988 x86_fld_membase (code, X86_ESP, 0, FALSE);
1989 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
2002 * @code: buffer to store code to
2003 * @dreg: hard register where to place the result
2004 * @tls_offset: offset info
2006 * emit_tls_get emits in @code the native code that puts in the dreg register
2007 * the item in the thread local storage identified by tls_offset.
2009 * Returns: a pointer to the end of the stored code
2012 emit_tls_get (guint8* code, int dreg, int tls_offset)
2014 #ifdef PLATFORM_WIN32
2016 * See the Under the Hood article in the May 1996 issue of Microsoft Systems
2017 * Journal and/or a disassembly of the TlsGet () function.
2019 g_assert (tls_offset < 64);
2020 x86_prefix (code, X86_FS_PREFIX);
2021 x86_mov_reg_mem (code, dreg, 0x18, 4);
2022 /* Dunno what this does but TlsGetValue () contains it */
2023 x86_alu_membase_imm (code, X86_AND, dreg, 0x34, 0);
2024 x86_mov_reg_membase (code, dreg, dreg, 3600 + (tls_offset * 4), 4);
2026 if (optimize_for_xen) {
2027 x86_prefix (code, X86_GS_PREFIX);
2028 x86_mov_reg_mem (code, dreg, 0, 4);
2029 x86_mov_reg_membase (code, dreg, dreg, tls_offset, 4);
2031 x86_prefix (code, X86_GS_PREFIX);
2032 x86_mov_reg_mem (code, dreg, tls_offset, 4);
2039 * emit_load_volatile_arguments:
2041 * Load volatile arguments from the stack to the original input registers.
2042 * Required before a tail call.
2045 emit_load_volatile_arguments (MonoCompile *cfg, guint8 *code)
2047 MonoMethod *method = cfg->method;
2048 MonoMethodSignature *sig;
2053 /* FIXME: Generate intermediate code instead */
2055 sig = mono_method_signature (method);
2057 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
2059 /* This is the opposite of the code in emit_prolog */
2061 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
2062 ArgInfo *ainfo = cinfo->args + i;
2064 inst = cfg->args [i];
2066 if (sig->hasthis && (i == 0))
2067 arg_type = &mono_defaults.object_class->byval_arg;
2069 arg_type = sig->params [i - sig->hasthis];
2072 * On x86, the arguments are either in their original stack locations, or in
2075 if (inst->opcode == OP_REGVAR) {
2076 g_assert (ainfo->storage == ArgOnStack);
2078 x86_mov_membase_reg (code, X86_EBP, inst->inst_offset, inst->dreg, 4);
2085 #define REAL_PRINT_REG(text,reg) \
2086 mono_assert (reg >= 0); \
2087 x86_push_reg (code, X86_EAX); \
2088 x86_push_reg (code, X86_EDX); \
2089 x86_push_reg (code, X86_ECX); \
2090 x86_push_reg (code, reg); \
2091 x86_push_imm (code, reg); \
2092 x86_push_imm (code, text " %d %p\n"); \
2093 x86_mov_reg_imm (code, X86_EAX, printf); \
2094 x86_call_reg (code, X86_EAX); \
2095 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 3*4); \
2096 x86_pop_reg (code, X86_ECX); \
2097 x86_pop_reg (code, X86_EDX); \
2098 x86_pop_reg (code, X86_EAX);
2100 /* benchmark and set based on cpu */
2101 #define LOOP_ALIGNMENT 8
2102 #define bb_is_loop_start(bb) ((bb)->loop_body_start && (bb)->nesting)
2105 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2110 guint8 *code = cfg->native_code + cfg->code_len;
2113 if (cfg->opt & MONO_OPT_LOOP) {
2114 int pad, align = LOOP_ALIGNMENT;
2115 /* set alignment depending on cpu */
2116 if (bb_is_loop_start (bb) && (pad = (cfg->code_len & (align - 1)))) {
2118 /*g_print ("adding %d pad at %x to loop in %s\n", pad, cfg->code_len, cfg->method->name);*/
2119 x86_padding (code, pad);
2120 cfg->code_len += pad;
2121 bb->native_offset = cfg->code_len;
2125 if (cfg->verbose_level > 2)
2126 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2128 cpos = bb->max_offset;
2130 if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2131 MonoProfileCoverageInfo *cov = cfg->coverage_info;
2132 g_assert (!cfg->compile_aot);
2135 cov->data [bb->dfn].cil_code = bb->cil_code;
2136 /* this is not thread save, but good enough */
2137 x86_inc_mem (code, &cov->data [bb->dfn].count);
2140 offset = code - cfg->native_code;
2142 mono_debug_open_block (cfg, bb, offset);
2144 MONO_BB_FOR_EACH_INS (bb, ins) {
2145 offset = code - cfg->native_code;
2147 max_len = ((guint8 *)ins_get_spec (ins->opcode))[MONO_INST_LEN];
2149 if (G_UNLIKELY (offset > (cfg->code_size - max_len - 16))) {
2150 cfg->code_size *= 2;
2151 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2152 code = cfg->native_code + offset;
2153 mono_jit_stats.code_reallocs++;
2156 if (cfg->debug_info)
2157 mono_debug_record_line_number (cfg, ins, offset);
2159 switch (ins->opcode) {
2161 x86_mul_reg (code, ins->sreg2, TRUE);
2164 x86_mul_reg (code, ins->sreg2, FALSE);
2166 case OP_X86_SETEQ_MEMBASE:
2167 case OP_X86_SETNE_MEMBASE:
2168 x86_set_membase (code, ins->opcode == OP_X86_SETEQ_MEMBASE ? X86_CC_EQ : X86_CC_NE,
2169 ins->inst_basereg, ins->inst_offset, TRUE);
2171 case OP_STOREI1_MEMBASE_IMM:
2172 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 1);
2174 case OP_STOREI2_MEMBASE_IMM:
2175 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 2);
2177 case OP_STORE_MEMBASE_IMM:
2178 case OP_STOREI4_MEMBASE_IMM:
2179 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 4);
2181 case OP_STOREI1_MEMBASE_REG:
2182 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 1);
2184 case OP_STOREI2_MEMBASE_REG:
2185 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 2);
2187 case OP_STORE_MEMBASE_REG:
2188 case OP_STOREI4_MEMBASE_REG:
2189 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 4);
2191 case OP_STORE_MEM_IMM:
2192 x86_mov_mem_imm (code, ins->inst_p0, ins->inst_c0, 4);
2196 x86_mov_reg_mem (code, ins->dreg, ins->inst_imm, 4);
2198 x86_mov_reg_mem (code, ins->dreg, ins->inst_p0, 4);
2202 /* These are created by the cprop pass so they use inst_imm as the source */
2203 x86_mov_reg_mem (code, ins->dreg, ins->inst_imm, 4);
2206 x86_widen_mem (code, ins->dreg, ins->inst_imm, FALSE, FALSE);
2209 x86_widen_mem (code, ins->dreg, ins->inst_imm, FALSE, TRUE);
2211 case OP_LOAD_MEMBASE:
2212 case OP_LOADI4_MEMBASE:
2213 case OP_LOADU4_MEMBASE:
2214 x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, 4);
2216 case OP_LOADU1_MEMBASE:
2217 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE);
2219 case OP_LOADI1_MEMBASE:
2220 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, FALSE);
2222 case OP_LOADU2_MEMBASE:
2223 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE);
2225 case OP_LOADI2_MEMBASE:
2226 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, TRUE);
2228 case OP_ICONV_TO_I1:
2230 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, FALSE);
2232 case OP_ICONV_TO_I2:
2234 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, TRUE);
2236 case OP_ICONV_TO_U1:
2237 x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, FALSE);
2239 case OP_ICONV_TO_U2:
2240 x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, TRUE);
2244 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
2246 case OP_COMPARE_IMM:
2247 case OP_ICOMPARE_IMM:
2248 x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
2250 case OP_X86_COMPARE_MEMBASE_REG:
2251 x86_alu_membase_reg (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2253 case OP_X86_COMPARE_MEMBASE_IMM:
2254 x86_alu_membase_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2256 case OP_X86_COMPARE_MEMBASE8_IMM:
2257 x86_alu_membase8_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2259 case OP_X86_COMPARE_REG_MEMBASE:
2260 x86_alu_reg_membase (code, X86_CMP, ins->sreg1, ins->sreg2, ins->inst_offset);
2262 case OP_X86_COMPARE_MEM_IMM:
2263 x86_alu_mem_imm (code, X86_CMP, ins->inst_offset, ins->inst_imm);
2265 case OP_X86_TEST_NULL:
2266 x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
2268 case OP_X86_ADD_MEMBASE_IMM:
2269 x86_alu_membase_imm (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2271 case OP_X86_ADD_REG_MEMBASE:
2272 x86_alu_reg_membase (code, X86_ADD, ins->sreg1, ins->sreg2, ins->inst_offset);
2274 case OP_X86_SUB_MEMBASE_IMM:
2275 x86_alu_membase_imm (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2277 case OP_X86_SUB_REG_MEMBASE:
2278 x86_alu_reg_membase (code, X86_SUB, ins->sreg1, ins->sreg2, ins->inst_offset);
2280 case OP_X86_AND_MEMBASE_IMM:
2281 x86_alu_membase_imm (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2283 case OP_X86_OR_MEMBASE_IMM:
2284 x86_alu_membase_imm (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2286 case OP_X86_XOR_MEMBASE_IMM:
2287 x86_alu_membase_imm (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2289 case OP_X86_ADD_MEMBASE_REG:
2290 x86_alu_membase_reg (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2292 case OP_X86_SUB_MEMBASE_REG:
2293 x86_alu_membase_reg (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2295 case OP_X86_AND_MEMBASE_REG:
2296 x86_alu_membase_reg (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2298 case OP_X86_OR_MEMBASE_REG:
2299 x86_alu_membase_reg (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2301 case OP_X86_XOR_MEMBASE_REG:
2302 x86_alu_membase_reg (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2304 case OP_X86_INC_MEMBASE:
2305 x86_inc_membase (code, ins->inst_basereg, ins->inst_offset);
2307 case OP_X86_INC_REG:
2308 x86_inc_reg (code, ins->dreg);
2310 case OP_X86_DEC_MEMBASE:
2311 x86_dec_membase (code, ins->inst_basereg, ins->inst_offset);
2313 case OP_X86_DEC_REG:
2314 x86_dec_reg (code, ins->dreg);
2316 case OP_X86_MUL_REG_MEMBASE:
2317 x86_imul_reg_membase (code, ins->sreg1, ins->sreg2, ins->inst_offset);
2319 case OP_X86_AND_REG_MEMBASE:
2320 x86_alu_reg_membase (code, X86_AND, ins->sreg1, ins->sreg2, ins->inst_offset);
2322 case OP_X86_OR_REG_MEMBASE:
2323 x86_alu_reg_membase (code, X86_OR, ins->sreg1, ins->sreg2, ins->inst_offset);
2325 case OP_X86_XOR_REG_MEMBASE:
2326 x86_alu_reg_membase (code, X86_XOR, ins->sreg1, ins->sreg2, ins->inst_offset);
2329 x86_breakpoint (code);
2333 case OP_DUMMY_STORE:
2334 case OP_NOT_REACHED:
2340 x86_alu_reg_reg (code, X86_ADD, ins->sreg1, ins->sreg2);
2344 x86_alu_reg_reg (code, X86_ADC, ins->sreg1, ins->sreg2);
2349 x86_alu_reg_imm (code, X86_ADD, ins->dreg, ins->inst_imm);
2353 x86_alu_reg_imm (code, X86_ADC, ins->dreg, ins->inst_imm);
2358 x86_alu_reg_reg (code, X86_SUB, ins->sreg1, ins->sreg2);
2362 x86_alu_reg_reg (code, X86_SBB, ins->sreg1, ins->sreg2);
2367 x86_alu_reg_imm (code, X86_SUB, ins->dreg, ins->inst_imm);
2371 x86_alu_reg_imm (code, X86_SBB, ins->dreg, ins->inst_imm);
2374 x86_alu_reg_reg (code, X86_AND, ins->sreg1, ins->sreg2);
2378 x86_alu_reg_imm (code, X86_AND, ins->sreg1, ins->inst_imm);
2383 * The code is the same for div/rem, the allocator will allocate dreg
2384 * to RAX/RDX as appropriate.
2386 if (ins->sreg2 == X86_EDX) {
2387 /* cdq clobbers this */
2388 x86_push_reg (code, ins->sreg2);
2390 x86_div_membase (code, X86_ESP, 0, TRUE);
2391 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2394 x86_div_reg (code, ins->sreg2, TRUE);
2399 if (ins->sreg2 == X86_EDX) {
2400 x86_push_reg (code, ins->sreg2);
2401 x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2402 x86_div_membase (code, X86_ESP, 0, FALSE);
2403 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2405 x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2406 x86_div_reg (code, ins->sreg2, FALSE);
2410 x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
2412 x86_div_reg (code, ins->sreg2, TRUE);
2415 int power = mono_is_power_of_two (ins->inst_imm);
2417 g_assert (ins->sreg1 == X86_EAX);
2418 g_assert (ins->dreg == X86_EAX);
2419 g_assert (power >= 0);
2422 /* Based on http://compilers.iecc.com/comparch/article/93-04-079 */
2424 x86_alu_reg_imm (code, X86_AND, X86_EAX, 1);
2426 * If the divident is >= 0, this does not nothing. If it is positive, it
2427 * it transforms %eax=0 into %eax=0, and %eax=1 into %eax=-1.
2429 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EDX);
2430 x86_alu_reg_reg (code, X86_SUB, X86_EAX, X86_EDX);
2432 /* Based on gcc code */
2434 /* Add compensation for negative dividents */
2436 x86_shift_reg_imm (code, X86_SHR, X86_EDX, 32 - power);
2437 x86_alu_reg_reg (code, X86_ADD, X86_EAX, X86_EDX);
2438 /* Compute remainder */
2439 x86_alu_reg_imm (code, X86_AND, X86_EAX, (1 << power) - 1);
2440 /* Remove compensation */
2441 x86_alu_reg_reg (code, X86_SUB, X86_EAX, X86_EDX);
2446 x86_alu_reg_reg (code, X86_OR, ins->sreg1, ins->sreg2);
2450 x86_alu_reg_imm (code, X86_OR, ins->sreg1, ins->inst_imm);
2453 x86_alu_reg_reg (code, X86_XOR, ins->sreg1, ins->sreg2);
2457 x86_alu_reg_imm (code, X86_XOR, ins->sreg1, ins->inst_imm);
2460 g_assert (ins->sreg2 == X86_ECX);
2461 x86_shift_reg (code, X86_SHL, ins->dreg);
2464 g_assert (ins->sreg2 == X86_ECX);
2465 x86_shift_reg (code, X86_SAR, ins->dreg);
2469 x86_shift_reg_imm (code, X86_SAR, ins->dreg, ins->inst_imm);
2472 case OP_ISHR_UN_IMM:
2473 x86_shift_reg_imm (code, X86_SHR, ins->dreg, ins->inst_imm);
2476 g_assert (ins->sreg2 == X86_ECX);
2477 x86_shift_reg (code, X86_SHR, ins->dreg);
2481 x86_shift_reg_imm (code, X86_SHL, ins->dreg, ins->inst_imm);
2484 guint8 *jump_to_end;
2486 /* handle shifts below 32 bits */
2487 x86_shld_reg (code, ins->backend.reg3, ins->sreg1);
2488 x86_shift_reg (code, X86_SHL, ins->sreg1);
2490 x86_test_reg_imm (code, X86_ECX, 32);
2491 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
2493 /* handle shift over 32 bit */
2494 x86_mov_reg_reg (code, ins->backend.reg3, ins->sreg1, 4);
2495 x86_clear_reg (code, ins->sreg1);
2497 x86_patch (jump_to_end, code);
2501 guint8 *jump_to_end;
2503 /* handle shifts below 32 bits */
2504 x86_shrd_reg (code, ins->sreg1, ins->backend.reg3);
2505 x86_shift_reg (code, X86_SAR, ins->backend.reg3);
2507 x86_test_reg_imm (code, X86_ECX, 32);
2508 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, FALSE);
2510 /* handle shifts over 31 bits */
2511 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2512 x86_shift_reg_imm (code, X86_SAR, ins->backend.reg3, 31);
2514 x86_patch (jump_to_end, code);
2518 guint8 *jump_to_end;
2520 /* handle shifts below 32 bits */
2521 x86_shrd_reg (code, ins->sreg1, ins->backend.reg3);
2522 x86_shift_reg (code, X86_SHR, ins->backend.reg3);
2524 x86_test_reg_imm (code, X86_ECX, 32);
2525 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, FALSE);
2527 /* handle shifts over 31 bits */
2528 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2529 x86_clear_reg (code, ins->backend.reg3);
2531 x86_patch (jump_to_end, code);
2535 if (ins->inst_imm >= 32) {
2536 x86_mov_reg_reg (code, ins->backend.reg3, ins->sreg1, 4);
2537 x86_clear_reg (code, ins->sreg1);
2538 x86_shift_reg_imm (code, X86_SHL, ins->backend.reg3, ins->inst_imm - 32);
2540 x86_shld_reg_imm (code, ins->backend.reg3, ins->sreg1, ins->inst_imm);
2541 x86_shift_reg_imm (code, X86_SHL, ins->sreg1, ins->inst_imm);
2545 if (ins->inst_imm >= 32) {
2546 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2547 x86_shift_reg_imm (code, X86_SAR, ins->backend.reg3, 0x1f);
2548 x86_shift_reg_imm (code, X86_SAR, ins->sreg1, ins->inst_imm - 32);
2550 x86_shrd_reg_imm (code, ins->sreg1, ins->backend.reg3, ins->inst_imm);
2551 x86_shift_reg_imm (code, X86_SAR, ins->backend.reg3, ins->inst_imm);
2554 case OP_LSHR_UN_IMM:
2555 if (ins->inst_imm >= 32) {
2556 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2557 x86_clear_reg (code, ins->backend.reg3);
2558 x86_shift_reg_imm (code, X86_SHR, ins->sreg1, ins->inst_imm - 32);
2560 x86_shrd_reg_imm (code, ins->sreg1, ins->backend.reg3, ins->inst_imm);
2561 x86_shift_reg_imm (code, X86_SHR, ins->backend.reg3, ins->inst_imm);
2565 x86_not_reg (code, ins->sreg1);
2568 x86_neg_reg (code, ins->sreg1);
2572 x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2576 switch (ins->inst_imm) {
2580 if (ins->dreg != ins->sreg1)
2581 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2582 x86_alu_reg_reg (code, X86_ADD, ins->dreg, ins->dreg);
2585 /* LEA r1, [r2 + r2*2] */
2586 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 1);
2589 /* LEA r1, [r2 + r2*4] */
2590 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2593 /* LEA r1, [r2 + r2*2] */
2595 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 1);
2596 x86_alu_reg_reg (code, X86_ADD, ins->dreg, ins->dreg);
2599 /* LEA r1, [r2 + r2*8] */
2600 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 3);
2603 /* LEA r1, [r2 + r2*4] */
2605 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2606 x86_alu_reg_reg (code, X86_ADD, ins->dreg, ins->dreg);
2609 /* LEA r1, [r2 + r2*2] */
2611 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 1);
2612 x86_shift_reg_imm (code, X86_SHL, ins->dreg, 2);
2615 /* LEA r1, [r2 + r2*4] */
2616 /* LEA r1, [r1 + r1*4] */
2617 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2618 x86_lea_memindex (code, ins->dreg, ins->dreg, 0, ins->dreg, 2);
2621 /* LEA r1, [r2 + r2*4] */
2623 /* LEA r1, [r1 + r1*4] */
2624 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2625 x86_shift_reg_imm (code, X86_SHL, ins->dreg, 2);
2626 x86_lea_memindex (code, ins->dreg, ins->dreg, 0, ins->dreg, 2);
2629 x86_imul_reg_reg_imm (code, ins->dreg, ins->sreg1, ins->inst_imm);
2634 x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2635 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2637 case OP_IMUL_OVF_UN: {
2638 /* the mul operation and the exception check should most likely be split */
2639 int non_eax_reg, saved_eax = FALSE, saved_edx = FALSE;
2640 /*g_assert (ins->sreg2 == X86_EAX);
2641 g_assert (ins->dreg == X86_EAX);*/
2642 if (ins->sreg2 == X86_EAX) {
2643 non_eax_reg = ins->sreg1;
2644 } else if (ins->sreg1 == X86_EAX) {
2645 non_eax_reg = ins->sreg2;
2647 /* no need to save since we're going to store to it anyway */
2648 if (ins->dreg != X86_EAX) {
2650 x86_push_reg (code, X86_EAX);
2652 x86_mov_reg_reg (code, X86_EAX, ins->sreg1, 4);
2653 non_eax_reg = ins->sreg2;
2655 if (ins->dreg == X86_EDX) {
2658 x86_push_reg (code, X86_EAX);
2660 } else if (ins->dreg != X86_EAX) {
2662 x86_push_reg (code, X86_EDX);
2664 x86_mul_reg (code, non_eax_reg, FALSE);
2665 /* save before the check since pop and mov don't change the flags */
2666 if (ins->dreg != X86_EAX)
2667 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
2669 x86_pop_reg (code, X86_EDX);
2671 x86_pop_reg (code, X86_EAX);
2672 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2676 x86_mov_reg_imm (code, ins->dreg, ins->inst_c0);
2679 g_assert_not_reached ();
2680 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2681 x86_mov_reg_imm (code, ins->dreg, 0);
2684 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2685 x86_mov_reg_imm (code, ins->dreg, 0);
2687 case OP_LOAD_GOTADDR:
2688 x86_call_imm (code, 0);
2690 * The patch needs to point to the pop, since the GOT offset needs
2691 * to be added to that address.
2693 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_GOT_OFFSET, NULL);
2694 x86_pop_reg (code, ins->dreg);
2695 x86_alu_reg_imm (code, X86_ADD, ins->dreg, 0xf0f0f0f0);
2698 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_right->inst_i1, ins->inst_right->inst_p0);
2699 x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, 0xf0f0f0f0, 4);
2701 case OP_X86_PUSH_GOT_ENTRY:
2702 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_right->inst_i1, ins->inst_right->inst_p0);
2703 x86_push_membase (code, ins->inst_basereg, 0xf0f0f0f0);
2706 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2710 * Note: this 'frame destruction' logic is useful for tail calls, too.
2711 * Keep in sync with the code in emit_epilog.
2715 /* FIXME: no tracing support... */
2716 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
2717 code = mono_arch_instrument_epilog (cfg, mono_profiler_method_leave, code, FALSE);
2718 /* reset offset to make max_len work */
2719 offset = code - cfg->native_code;
2721 g_assert (!cfg->method->save_lmf);
2723 code = emit_load_volatile_arguments (cfg, code);
2725 if (cfg->used_int_regs & (1 << X86_EBX))
2727 if (cfg->used_int_regs & (1 << X86_EDI))
2729 if (cfg->used_int_regs & (1 << X86_ESI))
2732 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
2734 if (cfg->used_int_regs & (1 << X86_ESI))
2735 x86_pop_reg (code, X86_ESI);
2736 if (cfg->used_int_regs & (1 << X86_EDI))
2737 x86_pop_reg (code, X86_EDI);
2738 if (cfg->used_int_regs & (1 << X86_EBX))
2739 x86_pop_reg (code, X86_EBX);
2741 /* restore ESP/EBP */
2743 offset = code - cfg->native_code;
2744 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2745 x86_jump32 (code, 0);
2749 /* ensure ins->sreg1 is not NULL
2750 * note that cmp DWORD PTR [eax], eax is one byte shorter than
2751 * cmp DWORD PTR [eax], 0
2753 x86_alu_membase_reg (code, X86_CMP, ins->sreg1, 0, ins->sreg1);
2756 int hreg = ins->sreg1 == X86_EAX? X86_ECX: X86_EAX;
2757 x86_push_reg (code, hreg);
2758 x86_lea_membase (code, hreg, X86_EBP, cfg->sig_cookie);
2759 x86_mov_membase_reg (code, ins->sreg1, 0, hreg, 4);
2760 x86_pop_reg (code, hreg);
2769 call = (MonoCallInst*)ins;
2770 if (ins->flags & MONO_INST_HAS_METHOD)
2771 code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2773 code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2774 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
2775 /* a pop is one byte, while an add reg, imm is 3. So if there are 4 or 8
2776 * bytes to pop, we want to use pops. GCC does this (note it won't happen
2777 * for P4 or i686 because gcc will avoid using pop push at all. But we aren't
2778 * smart enough to do that optimization yet
2780 * It turns out that on my P4, doing two pops for 8 bytes on the stack makes
2781 * mcs botstrap slow down. However, doing 1 pop for 4 bytes creates a small,
2782 * (most likely from locality benefits). People with other processors should
2783 * check on theirs to see what happens.
2785 if (call->stack_usage == 4) {
2786 /* we want to use registers that won't get used soon, so use
2787 * ecx, as eax will get allocated first. edx is used by long calls,
2788 * so we can't use that.
2791 x86_pop_reg (code, X86_ECX);
2793 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2796 code = emit_move_return_value (cfg, ins, code);
2802 case OP_VOIDCALL_REG:
2804 call = (MonoCallInst*)ins;
2805 x86_call_reg (code, ins->sreg1);
2806 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
2807 if (call->stack_usage == 4)
2808 x86_pop_reg (code, X86_ECX);
2810 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2812 code = emit_move_return_value (cfg, ins, code);
2814 case OP_FCALL_MEMBASE:
2815 case OP_LCALL_MEMBASE:
2816 case OP_VCALL_MEMBASE:
2817 case OP_VCALL2_MEMBASE:
2818 case OP_VOIDCALL_MEMBASE:
2819 case OP_CALL_MEMBASE:
2820 call = (MonoCallInst*)ins;
2821 x86_call_membase (code, ins->sreg1, ins->inst_offset);
2822 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
2823 if (call->stack_usage == 4)
2824 x86_pop_reg (code, X86_ECX);
2826 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2828 code = emit_move_return_value (cfg, ins, code);
2832 x86_push_reg (code, ins->sreg1);
2834 case OP_X86_PUSH_IMM:
2835 x86_push_imm (code, ins->inst_imm);
2837 case OP_X86_PUSH_MEMBASE:
2838 x86_push_membase (code, ins->inst_basereg, ins->inst_offset);
2840 case OP_X86_PUSH_OBJ:
2841 x86_alu_reg_imm (code, X86_SUB, X86_ESP, ins->inst_imm);
2842 x86_push_reg (code, X86_EDI);
2843 x86_push_reg (code, X86_ESI);
2844 x86_push_reg (code, X86_ECX);
2845 if (ins->inst_offset)
2846 x86_lea_membase (code, X86_ESI, ins->inst_basereg, ins->inst_offset);
2848 x86_mov_reg_reg (code, X86_ESI, ins->inst_basereg, 4);
2849 x86_lea_membase (code, X86_EDI, X86_ESP, 12);
2850 x86_mov_reg_imm (code, X86_ECX, (ins->inst_imm >> 2));
2852 x86_prefix (code, X86_REP_PREFIX);
2854 x86_pop_reg (code, X86_ECX);
2855 x86_pop_reg (code, X86_ESI);
2856 x86_pop_reg (code, X86_EDI);
2859 x86_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->backend.shift_amount);
2861 case OP_X86_LEA_MEMBASE:
2862 x86_lea_membase (code, ins->dreg, ins->sreg1, ins->inst_imm);
2865 x86_xchg_reg_reg (code, ins->sreg1, ins->sreg2, 4);
2868 /* keep alignment */
2869 x86_alu_reg_imm (code, X86_ADD, ins->sreg1, MONO_ARCH_LOCALLOC_ALIGNMENT - 1);
2870 x86_alu_reg_imm (code, X86_AND, ins->sreg1, ~(MONO_ARCH_LOCALLOC_ALIGNMENT - 1));
2871 code = mono_emit_stack_alloc (code, ins);
2872 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2874 case OP_LOCALLOC_IMM: {
2875 guint32 size = ins->inst_imm;
2876 size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1);
2878 if (ins->flags & MONO_INST_INIT) {
2879 /* FIXME: Optimize this */
2880 x86_mov_reg_imm (code, ins->dreg, size);
2881 ins->sreg1 = ins->dreg;
2883 code = mono_emit_stack_alloc (code, ins);
2884 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2886 x86_alu_reg_imm (code, X86_SUB, X86_ESP, size);
2887 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2892 x86_push_reg (code, ins->sreg1);
2893 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD,
2894 (gpointer)"mono_arch_throw_exception");
2898 x86_push_reg (code, ins->sreg1);
2899 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD,
2900 (gpointer)"mono_arch_rethrow_exception");
2903 case OP_CALL_HANDLER:
2905 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 12);
2907 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2908 x86_call_imm (code, 0);
2910 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
2913 case OP_START_HANDLER: {
2914 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2915 x86_mov_membase_reg (code, spvar->inst_basereg, spvar->inst_offset, X86_ESP, 4);
2918 case OP_ENDFINALLY: {
2919 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2920 x86_mov_reg_membase (code, X86_ESP, spvar->inst_basereg, spvar->inst_offset, 4);
2924 case OP_ENDFILTER: {
2925 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2926 x86_mov_reg_membase (code, X86_ESP, spvar->inst_basereg, spvar->inst_offset, 4);
2927 /* The local allocator will put the result into EAX */
2933 ins->inst_c0 = code - cfg->native_code;
2936 if (ins->flags & MONO_INST_BRLABEL) {
2937 if (ins->inst_i0->inst_c0) {
2938 x86_jump_code (code, cfg->native_code + ins->inst_i0->inst_c0);
2940 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
2941 if ((cfg->opt & MONO_OPT_BRANCH) &&
2942 x86_is_imm8 (ins->inst_i0->inst_c1 - cpos))
2943 x86_jump8 (code, 0);
2945 x86_jump32 (code, 0);
2948 if (ins->inst_target_bb->native_offset) {
2949 x86_jump_code (code, cfg->native_code + ins->inst_target_bb->native_offset);
2951 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2952 if ((cfg->opt & MONO_OPT_BRANCH) &&
2953 x86_is_imm8 (ins->inst_target_bb->max_offset - cpos))
2954 x86_jump8 (code, 0);
2956 x86_jump32 (code, 0);
2961 x86_jump_reg (code, ins->sreg1);
2974 x86_set_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
2975 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2977 case OP_COND_EXC_EQ:
2978 case OP_COND_EXC_NE_UN:
2979 case OP_COND_EXC_LT:
2980 case OP_COND_EXC_LT_UN:
2981 case OP_COND_EXC_GT:
2982 case OP_COND_EXC_GT_UN:
2983 case OP_COND_EXC_GE:
2984 case OP_COND_EXC_GE_UN:
2985 case OP_COND_EXC_LE:
2986 case OP_COND_EXC_LE_UN:
2987 case OP_COND_EXC_IEQ:
2988 case OP_COND_EXC_INE_UN:
2989 case OP_COND_EXC_ILT:
2990 case OP_COND_EXC_ILT_UN:
2991 case OP_COND_EXC_IGT:
2992 case OP_COND_EXC_IGT_UN:
2993 case OP_COND_EXC_IGE:
2994 case OP_COND_EXC_IGE_UN:
2995 case OP_COND_EXC_ILE:
2996 case OP_COND_EXC_ILE_UN:
2997 EMIT_COND_SYSTEM_EXCEPTION (cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], ins->inst_p1);
2999 case OP_COND_EXC_OV:
3000 case OP_COND_EXC_NO:
3002 case OP_COND_EXC_NC:
3003 EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_EQ], (ins->opcode < OP_COND_EXC_NE_UN), ins->inst_p1);
3005 case OP_COND_EXC_IOV:
3006 case OP_COND_EXC_INO:
3007 case OP_COND_EXC_IC:
3008 case OP_COND_EXC_INC:
3009 EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_IEQ], (ins->opcode < OP_COND_EXC_INE_UN), ins->inst_p1);
3021 EMIT_COND_BRANCH (ins, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
3029 case OP_CMOV_INE_UN:
3030 case OP_CMOV_IGE_UN:
3031 case OP_CMOV_IGT_UN:
3032 case OP_CMOV_ILE_UN:
3033 case OP_CMOV_ILT_UN:
3034 g_assert (ins->dreg == ins->sreg1);
3035 x86_cmov_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, ins->sreg2);
3038 /* floating point opcodes */
3040 double d = *(double *)ins->inst_p0;
3042 if ((d == 0.0) && (mono_signbit (d) == 0)) {
3044 } else if (d == 1.0) {
3047 if (cfg->compile_aot) {
3048 guint32 *val = (guint32*)&d;
3049 x86_push_imm (code, val [1]);
3050 x86_push_imm (code, val [0]);
3051 x86_fld_membase (code, X86_ESP, 0, TRUE);
3052 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3055 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_R8, ins->inst_p0);
3056 x86_fld (code, NULL, TRUE);
3062 float f = *(float *)ins->inst_p0;
3064 if ((f == 0.0) && (mono_signbit (f) == 0)) {
3066 } else if (f == 1.0) {
3069 if (cfg->compile_aot) {
3070 guint32 val = *(guint32*)&f;
3071 x86_push_imm (code, val);
3072 x86_fld_membase (code, X86_ESP, 0, FALSE);
3073 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3076 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_R4, ins->inst_p0);
3077 x86_fld (code, NULL, FALSE);
3082 case OP_STORER8_MEMBASE_REG:
3083 x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, TRUE, TRUE);
3085 case OP_LOADR8_SPILL_MEMBASE:
3086 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
3089 case OP_LOADR8_MEMBASE:
3090 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
3092 case OP_STORER4_MEMBASE_REG:
3093 x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, FALSE, TRUE);
3095 case OP_LOADR4_MEMBASE:
3096 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
3098 case OP_ICONV_TO_R4: /* FIXME: change precision */
3099 case OP_ICONV_TO_R8:
3100 x86_push_reg (code, ins->sreg1);
3101 x86_fild_membase (code, X86_ESP, 0, FALSE);
3102 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3104 case OP_ICONV_TO_R_UN:
3105 x86_push_imm (code, 0);
3106 x86_push_reg (code, ins->sreg1);
3107 x86_fild_membase (code, X86_ESP, 0, TRUE);
3108 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3110 case OP_X86_FP_LOAD_I8:
3111 x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
3113 case OP_X86_FP_LOAD_I4:
3114 x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
3116 case OP_FCONV_TO_R4:
3117 /* FIXME: nothing to do ?? */
3119 case OP_FCONV_TO_I1:
3120 code = emit_float_to_int (cfg, code, ins->dreg, 1, TRUE);
3122 case OP_FCONV_TO_U1:
3123 code = emit_float_to_int (cfg, code, ins->dreg, 1, FALSE);
3125 case OP_FCONV_TO_I2:
3126 code = emit_float_to_int (cfg, code, ins->dreg, 2, TRUE);
3128 case OP_FCONV_TO_U2:
3129 code = emit_float_to_int (cfg, code, ins->dreg, 2, FALSE);
3131 case OP_FCONV_TO_I4:
3133 code = emit_float_to_int (cfg, code, ins->dreg, 4, TRUE);
3135 case OP_FCONV_TO_I8:
3136 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
3137 x86_fnstcw_membase(code, X86_ESP, 0);
3138 x86_mov_reg_membase (code, ins->dreg, X86_ESP, 0, 2);
3139 x86_alu_reg_imm (code, X86_OR, ins->dreg, 0xc00);
3140 x86_mov_membase_reg (code, X86_ESP, 2, ins->dreg, 2);
3141 x86_fldcw_membase (code, X86_ESP, 2);
3142 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
3143 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
3144 x86_pop_reg (code, ins->dreg);
3145 x86_pop_reg (code, ins->backend.reg3);
3146 x86_fldcw_membase (code, X86_ESP, 0);
3147 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3149 case OP_LCONV_TO_R8_2:
3150 x86_push_reg (code, ins->sreg2);
3151 x86_push_reg (code, ins->sreg1);
3152 x86_fild_membase (code, X86_ESP, 0, TRUE);
3153 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3155 case OP_LCONV_TO_R4_2:
3156 x86_push_reg (code, ins->sreg2);
3157 x86_push_reg (code, ins->sreg1);
3158 x86_fild_membase (code, X86_ESP, 0, TRUE);
3159 /* Change precision */
3160 x86_fst_membase (code, X86_ESP, 0, FALSE, TRUE);
3161 x86_fld_membase (code, X86_ESP, 0, FALSE);
3162 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3164 case OP_LCONV_TO_R_UN:
3165 case OP_LCONV_TO_R_UN_2: {
3166 static guint8 mn[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x40 };
3169 /* load 64bit integer to FP stack */
3170 x86_push_imm (code, 0);
3171 x86_push_reg (code, ins->sreg2);
3172 x86_push_reg (code, ins->sreg1);
3173 x86_fild_membase (code, X86_ESP, 0, TRUE);
3174 /* store as 80bit FP value */
3175 x86_fst80_membase (code, X86_ESP, 0);
3177 /* test if lreg is negative */
3178 x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
3179 br = code; x86_branch8 (code, X86_CC_GEZ, 0, TRUE);
3181 /* add correction constant mn */
3182 x86_fld80_mem (code, mn);
3183 x86_fld80_membase (code, X86_ESP, 0);
3184 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3185 x86_fst80_membase (code, X86_ESP, 0);
3187 x86_patch (br, code);
3189 x86_fld80_membase (code, X86_ESP, 0);
3190 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
3194 case OP_LCONV_TO_OVF_I:
3195 case OP_LCONV_TO_OVF_I4_2: {
3196 guint8 *br [3], *label [1];
3200 * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3202 x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
3204 /* If the low word top bit is set, see if we are negative */
3205 br [0] = code; x86_branch8 (code, X86_CC_LT, 0, TRUE);
3206 /* We are not negative (no top bit set, check for our top word to be zero */
3207 x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
3208 br [1] = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
3211 /* throw exception */
3212 tins = mono_branch_optimize_exception_target (cfg, bb, "OverflowException");
3214 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, tins->inst_true_bb);
3215 if ((cfg->opt & MONO_OPT_BRANCH) && x86_is_imm8 (tins->inst_true_bb->max_offset - cpos))
3216 x86_jump8 (code, 0);
3218 x86_jump32 (code, 0);
3220 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC, "OverflowException");
3221 x86_jump32 (code, 0);
3225 x86_patch (br [0], code);
3226 /* our top bit is set, check that top word is 0xfffffff */
3227 x86_alu_reg_imm (code, X86_CMP, ins->sreg2, 0xffffffff);
3229 x86_patch (br [1], code);
3230 /* nope, emit exception */
3231 br [2] = code; x86_branch8 (code, X86_CC_NE, 0, TRUE);
3232 x86_patch (br [2], label [0]);
3234 if (ins->dreg != ins->sreg1)
3235 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
3239 /* Not needed on the fp stack */
3242 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3245 x86_fp_op_reg (code, X86_FSUB, 1, TRUE);
3248 x86_fp_op_reg (code, X86_FMUL, 1, TRUE);
3251 x86_fp_op_reg (code, X86_FDIV, 1, TRUE);
3259 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3264 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3271 * it really doesn't make sense to inline all this code,
3272 * it's here just to show that things may not be as simple
3275 guchar *check_pos, *end_tan, *pop_jump;
3276 x86_push_reg (code, X86_EAX);
3279 x86_test_reg_imm (code, X86_EAX, X86_FP_C2);
3281 x86_branch8 (code, X86_CC_NE, 0, FALSE);
3282 x86_fstp (code, 0); /* pop the 1.0 */
3284 x86_jump8 (code, 0);
3286 x86_fp_op (code, X86_FADD, 0);
3290 x86_test_reg_imm (code, X86_EAX, X86_FP_C2);
3292 x86_branch8 (code, X86_CC_NE, 0, FALSE);
3295 x86_patch (pop_jump, code);
3296 x86_fstp (code, 0); /* pop the 1.0 */
3297 x86_patch (check_pos, code);
3298 x86_patch (end_tan, code);
3300 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3301 x86_pop_reg (code, X86_EAX);
3308 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3314 g_assert (cfg->opt & MONO_OPT_CMOV);
3315 g_assert (ins->dreg == ins->sreg1);
3316 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
3317 x86_cmov_reg (code, X86_CC_GT, TRUE, ins->dreg, ins->sreg2);
3320 g_assert (cfg->opt & MONO_OPT_CMOV);
3321 g_assert (ins->dreg == ins->sreg1);
3322 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
3323 x86_cmov_reg (code, X86_CC_GT, FALSE, ins->dreg, ins->sreg2);
3326 g_assert (cfg->opt & MONO_OPT_CMOV);
3327 g_assert (ins->dreg == ins->sreg1);
3328 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
3329 x86_cmov_reg (code, X86_CC_LT, TRUE, ins->dreg, ins->sreg2);
3332 g_assert (cfg->opt & MONO_OPT_CMOV);
3333 g_assert (ins->dreg == ins->sreg1);
3334 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
3335 x86_cmov_reg (code, X86_CC_LT, FALSE, ins->dreg, ins->sreg2);
3341 x86_fxch (code, ins->inst_imm);
3346 x86_push_reg (code, X86_EAX);
3347 /* we need to exchange ST(0) with ST(1) */
3350 /* this requires a loop, because fprem somtimes
3351 * returns a partial remainder */
3353 /* looks like MS is using fprem instead of the IEEE compatible fprem1 */
3354 /* x86_fprem1 (code); */
3357 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_C2);
3359 x86_branch8 (code, X86_CC_NE, l1 - l2, FALSE);
3364 x86_pop_reg (code, X86_EAX);
3368 if (cfg->opt & MONO_OPT_FCMOV) {
3369 x86_fcomip (code, 1);
3373 /* this overwrites EAX */
3374 EMIT_FPCOMPARE(code);
3375 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3378 if (cfg->opt & MONO_OPT_FCMOV) {
3379 /* zeroing the register at the start results in
3380 * shorter and faster code (we can also remove the widening op)
3382 guchar *unordered_check;
3383 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3384 x86_fcomip (code, 1);
3386 unordered_check = code;
3387 x86_branch8 (code, X86_CC_P, 0, FALSE);
3388 x86_set_reg (code, X86_CC_EQ, ins->dreg, FALSE);
3389 x86_patch (unordered_check, code);
3392 if (ins->dreg != X86_EAX)
3393 x86_push_reg (code, X86_EAX);
3395 EMIT_FPCOMPARE(code);
3396 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3397 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
3398 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3399 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3401 if (ins->dreg != X86_EAX)
3402 x86_pop_reg (code, X86_EAX);
3406 if (cfg->opt & MONO_OPT_FCMOV) {
3407 /* zeroing the register at the start results in
3408 * shorter and faster code (we can also remove the widening op)
3410 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3411 x86_fcomip (code, 1);
3413 if (ins->opcode == OP_FCLT_UN) {
3414 guchar *unordered_check = code;
3415 guchar *jump_to_end;
3416 x86_branch8 (code, X86_CC_P, 0, FALSE);
3417 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
3419 x86_jump8 (code, 0);
3420 x86_patch (unordered_check, code);
3421 x86_inc_reg (code, ins->dreg);
3422 x86_patch (jump_to_end, code);
3424 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
3428 if (ins->dreg != X86_EAX)
3429 x86_push_reg (code, X86_EAX);
3431 EMIT_FPCOMPARE(code);
3432 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3433 if (ins->opcode == OP_FCLT_UN) {
3434 guchar *is_not_zero_check, *end_jump;
3435 is_not_zero_check = code;
3436 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3438 x86_jump8 (code, 0);
3439 x86_patch (is_not_zero_check, code);
3440 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3442 x86_patch (end_jump, code);
3444 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3445 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3447 if (ins->dreg != X86_EAX)
3448 x86_pop_reg (code, X86_EAX);
3452 if (cfg->opt & MONO_OPT_FCMOV) {
3453 /* zeroing the register at the start results in
3454 * shorter and faster code (we can also remove the widening op)
3456 guchar *unordered_check;
3457 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3458 x86_fcomip (code, 1);
3460 if (ins->opcode == OP_FCGT) {
3461 unordered_check = code;
3462 x86_branch8 (code, X86_CC_P, 0, FALSE);
3463 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
3464 x86_patch (unordered_check, code);
3466 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
3470 if (ins->dreg != X86_EAX)
3471 x86_push_reg (code, X86_EAX);
3473 EMIT_FPCOMPARE(code);
3474 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3475 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3476 if (ins->opcode == OP_FCGT_UN) {
3477 guchar *is_not_zero_check, *end_jump;
3478 is_not_zero_check = code;
3479 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3481 x86_jump8 (code, 0);
3482 x86_patch (is_not_zero_check, code);
3483 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3485 x86_patch (end_jump, code);
3487 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3488 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3490 if (ins->dreg != X86_EAX)
3491 x86_pop_reg (code, X86_EAX);
3494 if (cfg->opt & MONO_OPT_FCMOV) {
3495 guchar *jump = code;
3496 x86_branch8 (code, X86_CC_P, 0, TRUE);
3497 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3498 x86_patch (jump, code);
3501 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
3502 EMIT_COND_BRANCH (ins, X86_CC_EQ, TRUE);
3505 /* Branch if C013 != 100 */
3506 if (cfg->opt & MONO_OPT_FCMOV) {
3507 /* branch if !ZF or (PF|CF) */
3508 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3509 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3510 EMIT_COND_BRANCH (ins, X86_CC_B, FALSE);
3513 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C3);
3514 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3517 if (cfg->opt & MONO_OPT_FCMOV) {
3518 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
3521 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3524 if (cfg->opt & MONO_OPT_FCMOV) {
3525 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3526 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
3529 if (ins->opcode == OP_FBLT_UN) {
3530 guchar *is_not_zero_check, *end_jump;
3531 is_not_zero_check = code;
3532 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3534 x86_jump8 (code, 0);
3535 x86_patch (is_not_zero_check, code);
3536 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3538 x86_patch (end_jump, code);
3540 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3544 if (cfg->opt & MONO_OPT_FCMOV) {
3545 if (ins->opcode == OP_FBGT) {
3548 /* skip branch if C1=1 */
3550 x86_branch8 (code, X86_CC_P, 0, FALSE);
3551 /* branch if (C0 | C3) = 1 */
3552 EMIT_COND_BRANCH (ins, X86_CC_LT, FALSE);
3553 x86_patch (br1, code);
3555 EMIT_COND_BRANCH (ins, X86_CC_LT, FALSE);
3559 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3560 if (ins->opcode == OP_FBGT_UN) {
3561 guchar *is_not_zero_check, *end_jump;
3562 is_not_zero_check = code;
3563 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3565 x86_jump8 (code, 0);
3566 x86_patch (is_not_zero_check, code);
3567 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3569 x86_patch (end_jump, code);
3571 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3574 /* Branch if C013 == 100 or 001 */
3575 if (cfg->opt & MONO_OPT_FCMOV) {
3578 /* skip branch if C1=1 */
3580 x86_branch8 (code, X86_CC_P, 0, FALSE);
3581 /* branch if (C0 | C3) = 1 */
3582 EMIT_COND_BRANCH (ins, X86_CC_BE, FALSE);
3583 x86_patch (br1, code);
3586 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3587 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3588 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C3);
3589 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3592 /* Branch if C013 == 000 */
3593 if (cfg->opt & MONO_OPT_FCMOV) {
3594 EMIT_COND_BRANCH (ins, X86_CC_LE, FALSE);
3597 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3600 /* Branch if C013=000 or 100 */
3601 if (cfg->opt & MONO_OPT_FCMOV) {
3604 /* skip branch if C1=1 */
3606 x86_branch8 (code, X86_CC_P, 0, FALSE);
3607 /* branch if C0=0 */
3608 EMIT_COND_BRANCH (ins, X86_CC_NB, FALSE);
3609 x86_patch (br1, code);
3612 x86_alu_reg_imm (code, X86_AND, X86_EAX, (X86_FP_C0|X86_FP_C1));
3613 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0);
3614 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3617 /* Branch if C013 != 001 */
3618 if (cfg->opt & MONO_OPT_FCMOV) {
3619 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3620 EMIT_COND_BRANCH (ins, X86_CC_GE, FALSE);
3623 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3624 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3628 x86_push_reg (code, X86_EAX);
3631 x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4100);
3632 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3633 x86_pop_reg (code, X86_EAX);
3635 /* Have to clean up the fp stack before throwing the exception */
3637 x86_branch8 (code, X86_CC_NE, 0, FALSE);
3640 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_EQ, FALSE, "ArithmeticException");
3642 x86_patch (br1, code);
3646 code = emit_tls_get (code, ins->dreg, ins->inst_offset);
3649 case OP_MEMORY_BARRIER: {
3650 /* Not needed on x86 */
3653 case OP_ATOMIC_ADD_I4: {
3654 int dreg = ins->dreg;
3656 if (dreg == ins->inst_basereg) {
3657 x86_push_reg (code, ins->sreg2);
3661 if (dreg != ins->sreg2)
3662 x86_mov_reg_reg (code, ins->dreg, ins->sreg2, 4);
3664 x86_prefix (code, X86_LOCK_PREFIX);
3665 x86_xadd_membase_reg (code, ins->inst_basereg, ins->inst_offset, dreg, 4);
3667 if (dreg != ins->dreg) {
3668 x86_mov_reg_reg (code, ins->dreg, dreg, 4);
3669 x86_pop_reg (code, dreg);
3674 case OP_ATOMIC_ADD_NEW_I4: {
3675 int dreg = ins->dreg;
3677 /* hack: limit in regalloc, dreg != sreg1 && dreg != sreg2 */
3678 if (ins->sreg2 == dreg) {
3679 if (dreg == X86_EBX) {
3681 if (ins->inst_basereg == X86_EDI)
3685 if (ins->inst_basereg == X86_EBX)
3688 } else if (ins->inst_basereg == dreg) {
3689 if (dreg == X86_EBX) {
3691 if (ins->sreg2 == X86_EDI)
3695 if (ins->sreg2 == X86_EBX)
3700 if (dreg != ins->dreg) {
3701 x86_push_reg (code, dreg);
3704 x86_mov_reg_reg (code, dreg, ins->sreg2, 4);
3705 x86_prefix (code, X86_LOCK_PREFIX);
3706 x86_xadd_membase_reg (code, ins->inst_basereg, ins->inst_offset, dreg, 4);
3707 /* dreg contains the old value, add with sreg2 value */
3708 x86_alu_reg_reg (code, X86_ADD, dreg, ins->sreg2);
3710 if (ins->dreg != dreg) {
3711 x86_mov_reg_reg (code, ins->dreg, dreg, 4);
3712 x86_pop_reg (code, dreg);
3717 case OP_ATOMIC_EXCHANGE_I4:
3718 case OP_ATOMIC_CAS_IMM_I4: {
3720 int sreg2 = ins->sreg2;
3721 int breg = ins->inst_basereg;
3723 /* cmpxchg uses eax as comperand, need to make sure we can use it
3724 * hack to overcome limits in x86 reg allocator
3725 * (req: dreg == eax and sreg2 != eax and breg != eax)
3727 g_assert (ins->dreg == X86_EAX);
3729 /* We need the EAX reg for the cmpxchg */
3730 if (ins->sreg2 == X86_EAX) {
3731 x86_push_reg (code, X86_EDX);
3732 x86_mov_reg_reg (code, X86_EDX, X86_EAX, 4);
3736 if (breg == X86_EAX) {
3737 x86_push_reg (code, X86_ESI);
3738 x86_mov_reg_reg (code, X86_ESI, X86_EAX, 4);
3742 if (ins->opcode == OP_ATOMIC_CAS_IMM_I4) {
3743 x86_mov_reg_imm (code, X86_EAX, ins->backend.data);
3745 x86_prefix (code, X86_LOCK_PREFIX);
3746 x86_cmpxchg_membase_reg (code, breg, ins->inst_offset, sreg2);
3748 x86_mov_reg_membase (code, X86_EAX, breg, ins->inst_offset, 4);
3750 br [0] = code; x86_prefix (code, X86_LOCK_PREFIX);
3751 x86_cmpxchg_membase_reg (code, breg, ins->inst_offset, sreg2);
3752 br [1] = code; x86_branch8 (code, X86_CC_NE, -1, FALSE);
3753 x86_patch (br [1], br [0]);
3756 if (breg != ins->inst_basereg)
3757 x86_pop_reg (code, X86_ESI);
3759 if (ins->sreg2 != sreg2)
3760 x86_pop_reg (code, X86_EDX);
3765 g_warning ("unknown opcode %s\n", mono_inst_name (ins->opcode));
3766 g_assert_not_reached ();
3769 if (G_UNLIKELY ((code - cfg->native_code - offset) > max_len)) {
3770 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3771 mono_inst_name (ins->opcode), max_len, code - cfg->native_code - offset);
3772 g_assert_not_reached ();
3778 cfg->code_len = code - cfg->native_code;
3782 mono_arch_register_lowlevel_calls (void)
3787 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3789 MonoJumpInfo *patch_info;
3790 gboolean compile_aot = !run_cctors;
3792 for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3793 unsigned char *ip = patch_info->ip.i + code;
3794 const unsigned char *target;
3796 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3799 switch (patch_info->type) {
3800 case MONO_PATCH_INFO_BB:
3801 case MONO_PATCH_INFO_LABEL:
3804 /* No need to patch these */
3809 switch (patch_info->type) {
3810 case MONO_PATCH_INFO_IP:
3811 *((gconstpointer *)(ip)) = target;
3813 case MONO_PATCH_INFO_CLASS_INIT: {
3815 /* Might already been changed to a nop */
3816 x86_call_code (code, 0);
3817 x86_patch (ip, target);
3820 case MONO_PATCH_INFO_ABS:
3821 case MONO_PATCH_INFO_METHOD:
3822 case MONO_PATCH_INFO_METHOD_JUMP:
3823 case MONO_PATCH_INFO_INTERNAL_METHOD:
3824 case MONO_PATCH_INFO_BB:
3825 case MONO_PATCH_INFO_LABEL:
3826 case MONO_PATCH_INFO_RGCTX_FETCH:
3827 case MONO_PATCH_INFO_GENERIC_CLASS_INIT:
3828 x86_patch (ip, target);
3830 case MONO_PATCH_INFO_NONE:
3833 guint32 offset = mono_arch_get_patch_offset (ip);
3834 *((gconstpointer *)(ip + offset)) = target;
3842 mono_arch_emit_prolog (MonoCompile *cfg)
3844 MonoMethod *method = cfg->method;
3846 MonoMethodSignature *sig;
3848 int alloc_size, pos, max_offset, i;
3851 cfg->code_size = MAX (mono_method_get_header (method)->code_size * 4, 10240);
3853 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
3854 cfg->code_size += 512;
3856 code = cfg->native_code = g_malloc (cfg->code_size);
3858 x86_push_reg (code, X86_EBP);
3859 x86_mov_reg_reg (code, X86_EBP, X86_ESP, 4);
3861 alloc_size = cfg->stack_offset;
3864 if (method->wrapper_type == MONO_WRAPPER_NATIVE_TO_MANAGED) {
3865 /* Might need to attach the thread to the JIT or change the domain for the callback */
3866 if (appdomain_tls_offset != -1 && lmf_tls_offset != -1) {
3867 guint8 *buf, *no_domain_branch;
3869 code = emit_tls_get (code, X86_EAX, appdomain_tls_offset);
3870 x86_alu_reg_imm (code, X86_CMP, X86_EAX, GPOINTER_TO_UINT (cfg->domain));
3871 no_domain_branch = code;
3872 x86_branch8 (code, X86_CC_NE, 0, 0);
3873 code = emit_tls_get ( code, X86_EAX, lmf_tls_offset);
3874 x86_test_reg_reg (code, X86_EAX, X86_EAX);
3876 x86_branch8 (code, X86_CC_NE, 0, 0);
3877 x86_patch (no_domain_branch, code);
3878 x86_push_imm (code, cfg->domain);
3879 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_jit_thread_attach");
3880 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3881 x86_patch (buf, code);
3882 #ifdef PLATFORM_WIN32
3883 /* The TLS key actually contains a pointer to the MonoJitTlsData structure */
3884 /* FIXME: Add a separate key for LMF to avoid this */
3885 x86_alu_reg_imm (code, X86_ADD, X86_EAX, G_STRUCT_OFFSET (MonoJitTlsData, lmf));
3889 g_assert (!cfg->compile_aot);
3890 x86_push_imm (code, cfg->domain);
3891 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_jit_thread_attach");
3892 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3896 if (method->save_lmf) {
3897 pos += sizeof (MonoLMF);
3899 /* save the current IP */
3900 mono_add_patch_info (cfg, code + 1 - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3901 x86_push_imm_template (code);
3903 /* save all caller saved regs */
3904 x86_push_reg (code, X86_EBP);
3905 x86_push_reg (code, X86_ESI);
3906 x86_push_reg (code, X86_EDI);
3907 x86_push_reg (code, X86_EBX);
3909 if ((lmf_tls_offset != -1) && !is_win32 && !optimize_for_xen) {
3911 * Optimized version which uses the mono_lmf TLS variable instead of indirection
3912 * through the mono_lmf_addr TLS variable.
3914 /* %eax = previous_lmf */
3915 x86_prefix (code, X86_GS_PREFIX);
3916 x86_mov_reg_mem (code, X86_EAX, lmf_tls_offset, 4);
3917 /* skip esp + method_info + lmf */
3918 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 12);
3919 /* push previous_lmf */
3920 x86_push_reg (code, X86_EAX);
3922 x86_prefix (code, X86_GS_PREFIX);
3923 x86_mov_mem_reg (code, lmf_tls_offset, X86_ESP, 4);
3925 /* get the address of lmf for the current thread */
3927 * This is performance critical so we try to use some tricks to make
3931 if (lmf_addr_tls_offset != -1) {
3932 /* Load lmf quicky using the GS register */
3933 code = emit_tls_get (code, X86_EAX, lmf_addr_tls_offset);
3934 #ifdef PLATFORM_WIN32
3935 /* The TLS key actually contains a pointer to the MonoJitTlsData structure */
3936 /* FIXME: Add a separate key for LMF to avoid this */
3937 x86_alu_reg_imm (code, X86_ADD, X86_EAX, G_STRUCT_OFFSET (MonoJitTlsData, lmf));
3940 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_get_lmf_addr");
3943 /* Skip esp + method info */
3944 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
3947 x86_push_reg (code, X86_EAX);
3948 /* push *lfm (previous_lmf) */
3949 x86_push_membase (code, X86_EAX, 0);
3951 x86_mov_membase_reg (code, X86_EAX, 0, X86_ESP, 4);
3955 if (cfg->used_int_regs & (1 << X86_EBX)) {
3956 x86_push_reg (code, X86_EBX);
3960 if (cfg->used_int_regs & (1 << X86_EDI)) {
3961 x86_push_reg (code, X86_EDI);
3965 if (cfg->used_int_regs & (1 << X86_ESI)) {
3966 x86_push_reg (code, X86_ESI);
3974 /* the original alloc_size is already aligned: there is %ebp and retip pushed, so realign */
3976 int tot = alloc_size + pos + 4 + 4; /* ret ip + ebp */
3988 /* See mono_emit_stack_alloc */
3989 #if defined(PLATFORM_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
3990 guint32 remaining_size = alloc_size;
3991 while (remaining_size >= 0x1000) {
3992 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
3993 x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
3994 remaining_size -= 0x1000;
3997 x86_alu_reg_imm (code, X86_SUB, X86_ESP, remaining_size);
3999 x86_alu_reg_imm (code, X86_SUB, X86_ESP, alloc_size);
4003 #if __APPLE__ && DEBUG_APPLE_ALIGNMENT
4004 /* check the stack is aligned */
4005 x86_mov_reg_reg (code, X86_EDX, X86_ESP, 4);
4006 x86_alu_reg_imm (code, X86_AND, X86_EDX, 15);
4007 x86_alu_reg_imm (code, X86_CMP, X86_EDX, 0);
4008 x86_branch_disp (code, X86_CC_EQ, 3, FALSE);
4009 x86_breakpoint (code);
4012 /* compute max_offset in order to use short forward jumps */
4014 if (cfg->opt & MONO_OPT_BRANCH) {
4015 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
4017 bb->max_offset = max_offset;
4019 if (cfg->prof_options & MONO_PROFILE_COVERAGE)
4021 /* max alignment for loops */
4022 if ((cfg->opt & MONO_OPT_LOOP) && bb_is_loop_start (bb))
4023 max_offset += LOOP_ALIGNMENT;
4025 MONO_BB_FOR_EACH_INS (bb, ins) {
4026 if (ins->opcode == OP_LABEL)
4027 ins->inst_c1 = max_offset;
4029 max_offset += ((guint8 *)ins_get_spec (ins->opcode))[MONO_INST_LEN];
4034 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4035 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
4037 /* store runtime generic context */
4038 if (cfg->rgctx_var) {
4039 g_assert (cfg->rgctx_var->opcode == OP_REGOFFSET && cfg->rgctx_var->inst_basereg == X86_EBP);
4041 x86_mov_membase_reg (code, X86_EBP, cfg->rgctx_var->inst_offset, MONO_ARCH_RGCTX_REG, 4);
4044 /* load arguments allocated to register from the stack */
4045 sig = mono_method_signature (method);
4048 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
4049 inst = cfg->args [pos];
4050 if (inst->opcode == OP_REGVAR) {
4051 x86_mov_reg_membase (code, inst->dreg, X86_EBP, inst->inst_offset, 4);
4052 if (cfg->verbose_level > 2)
4053 g_print ("Argument %d assigned to register %s\n", pos, mono_arch_regname (inst->dreg));
4058 cfg->code_len = code - cfg->native_code;
4060 g_assert (cfg->code_len < cfg->code_size);
4066 mono_arch_emit_epilog (MonoCompile *cfg)
4068 MonoMethod *method = cfg->method;
4069 MonoMethodSignature *sig = mono_method_signature (method);
4071 guint32 stack_to_pop;
4073 int max_epilog_size = 16;
4076 if (cfg->method->save_lmf)
4077 max_epilog_size += 128;
4079 while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
4080 cfg->code_size *= 2;
4081 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4082 mono_jit_stats.code_reallocs++;
4085 code = cfg->native_code + cfg->code_len;
4087 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4088 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
4090 /* the code restoring the registers must be kept in sync with OP_JMP */
4093 if (method->save_lmf) {
4094 gint32 prev_lmf_reg;
4095 gint32 lmf_offset = -sizeof (MonoLMF);
4097 if ((lmf_tls_offset != -1) && !is_win32 && !optimize_for_xen) {
4099 * Optimized version which uses the mono_lmf TLS variable instead of indirection
4100 * through the mono_lmf_addr TLS variable.
4102 /* reg = previous_lmf */
4103 x86_mov_reg_membase (code, X86_ECX, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), 4);
4105 /* lmf = previous_lmf */
4106 x86_prefix (code, X86_GS_PREFIX);
4107 x86_mov_mem_reg (code, lmf_tls_offset, X86_ECX, 4);
4109 /* Find a spare register */
4110 switch (mono_type_get_underlying_type (sig->ret)->type) {
4113 prev_lmf_reg = X86_EDI;
4114 cfg->used_int_regs |= (1 << X86_EDI);
4117 prev_lmf_reg = X86_EDX;
4121 /* reg = previous_lmf */
4122 x86_mov_reg_membase (code, prev_lmf_reg, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), 4);
4125 x86_mov_reg_membase (code, X86_ECX, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), 4);
4127 /* *(lmf) = previous_lmf */
4128 x86_mov_membase_reg (code, X86_ECX, 0, prev_lmf_reg, 4);
4131 /* restore caller saved regs */
4132 if (cfg->used_int_regs & (1 << X86_EBX)) {
4133 x86_mov_reg_membase (code, X86_EBX, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebx), 4);
4136 if (cfg->used_int_regs & (1 << X86_EDI)) {
4137 x86_mov_reg_membase (code, X86_EDI, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, edi), 4);
4139 if (cfg->used_int_regs & (1 << X86_ESI)) {
4140 x86_mov_reg_membase (code, X86_ESI, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, esi), 4);
4143 /* EBP is restored by LEAVE */
4145 if (cfg->used_int_regs & (1 << X86_EBX)) {
4148 if (cfg->used_int_regs & (1 << X86_EDI)) {
4151 if (cfg->used_int_regs & (1 << X86_ESI)) {
4156 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
4158 if (cfg->used_int_regs & (1 << X86_ESI)) {
4159 x86_pop_reg (code, X86_ESI);
4161 if (cfg->used_int_regs & (1 << X86_EDI)) {
4162 x86_pop_reg (code, X86_EDI);
4164 if (cfg->used_int_regs & (1 << X86_EBX)) {
4165 x86_pop_reg (code, X86_EBX);
4169 /* Load returned vtypes into registers if needed */
4170 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
4171 if (cinfo->ret.storage == ArgValuetypeInReg) {
4172 for (quad = 0; quad < 2; quad ++) {
4173 switch (cinfo->ret.pair_storage [quad]) {
4175 x86_mov_reg_membase (code, cinfo->ret.pair_regs [quad], cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), 4);
4177 case ArgOnFloatFpStack:
4178 x86_fld_membase (code, cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), FALSE);
4180 case ArgOnDoubleFpStack:
4181 x86_fld_membase (code, cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), TRUE);
4186 g_assert_not_reached ();
4193 if (CALLCONV_IS_STDCALL (sig)) {
4194 MonoJitArgumentInfo *arg_info = alloca (sizeof (MonoJitArgumentInfo) * (sig->param_count + 1));
4196 stack_to_pop = mono_arch_get_argument_info (sig, sig->param_count, arg_info);
4197 } else if (MONO_TYPE_ISSTRUCT (mono_method_signature (cfg->method)->ret) && (cinfo->ret.storage == ArgOnStack))
4203 x86_ret_imm (code, stack_to_pop);
4207 cfg->code_len = code - cfg->native_code;
4209 g_assert (cfg->code_len < cfg->code_size);
4213 mono_arch_emit_exceptions (MonoCompile *cfg)
4215 MonoJumpInfo *patch_info;
4218 MonoClass *exc_classes [16];
4219 guint8 *exc_throw_start [16], *exc_throw_end [16];
4223 /* Compute needed space */
4224 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4225 if (patch_info->type == MONO_PATCH_INFO_EXC)
4230 * make sure we have enough space for exceptions
4231 * 16 is the size of two push_imm instructions and a call
4233 if (cfg->compile_aot)
4234 code_size = exc_count * 32;
4236 code_size = exc_count * 16;
4238 while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4239 cfg->code_size *= 2;
4240 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4241 mono_jit_stats.code_reallocs++;
4244 code = cfg->native_code + cfg->code_len;
4247 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4248 switch (patch_info->type) {
4249 case MONO_PATCH_INFO_EXC: {
4250 MonoClass *exc_class;
4254 x86_patch (patch_info->ip.i + cfg->native_code, code);
4256 exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4257 g_assert (exc_class);
4258 throw_ip = patch_info->ip.i;
4260 /* Find a throw sequence for the same exception class */
4261 for (i = 0; i < nthrows; ++i)
4262 if (exc_classes [i] == exc_class)
4265 x86_push_imm (code, (exc_throw_end [i] - cfg->native_code) - throw_ip);
4266 x86_jump_code (code, exc_throw_start [i]);
4267 patch_info->type = MONO_PATCH_INFO_NONE;
4272 /* Compute size of code following the push <OFFSET> */
4275 if ((code - cfg->native_code) - throw_ip < 126 - size) {
4276 /* Use the shorter form */
4278 x86_push_imm (code, 0);
4282 x86_push_imm (code, 0xf0f0f0f0);
4287 exc_classes [nthrows] = exc_class;
4288 exc_throw_start [nthrows] = code;
4291 x86_push_imm (code, exc_class->type_token - MONO_TOKEN_TYPE_DEF);
4292 patch_info->data.name = "mono_arch_throw_corlib_exception";
4293 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4294 patch_info->ip.i = code - cfg->native_code;
4295 x86_call_code (code, 0);
4296 x86_push_imm (buf, (code - cfg->native_code) - throw_ip);
4301 exc_throw_end [nthrows] = code;
4313 cfg->code_len = code - cfg->native_code;
4315 g_assert (cfg->code_len < cfg->code_size);
4319 mono_arch_flush_icache (guint8 *code, gint size)
4325 mono_arch_flush_register_windows (void)
4330 mono_arch_is_inst_imm (gint64 imm)
4336 * Support for fast access to the thread-local lmf structure using the GS
4337 * segment register on NPTL + kernel 2.6.x.
4340 static gboolean tls_offset_inited = FALSE;
4343 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
4345 if (!tls_offset_inited) {
4346 if (!getenv ("MONO_NO_TLS")) {
4347 #ifdef PLATFORM_WIN32
4349 * We need to init this multiple times, since when we are first called, the key might not
4350 * be initialized yet.
4352 appdomain_tls_offset = mono_domain_get_tls_key ();
4353 lmf_tls_offset = mono_get_jit_tls_key ();
4354 thread_tls_offset = mono_thread_get_tls_key ();
4356 /* Only 64 tls entries can be accessed using inline code */
4357 if (appdomain_tls_offset >= 64)
4358 appdomain_tls_offset = -1;
4359 if (lmf_tls_offset >= 64)
4360 lmf_tls_offset = -1;
4361 if (thread_tls_offset >= 64)
4362 thread_tls_offset = -1;
4365 optimize_for_xen = access ("/proc/xen", F_OK) == 0;
4367 tls_offset_inited = TRUE;
4368 appdomain_tls_offset = mono_domain_get_tls_offset ();
4369 lmf_tls_offset = mono_get_lmf_tls_offset ();
4370 lmf_addr_tls_offset = mono_get_lmf_addr_tls_offset ();
4371 thread_tls_offset = mono_thread_get_tls_offset ();
4378 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4383 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, int this_reg, int this_type, int vt_reg)
4385 MonoCallInst *call = (MonoCallInst*)inst;
4386 CallInfo *cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, inst->signature, FALSE);
4388 /* add the this argument */
4389 if (this_reg != -1) {
4390 if (cinfo->args [0].storage == ArgInIReg) {
4392 MONO_INST_NEW (cfg, this, OP_MOVE);
4393 this->type = this_type;
4394 this->sreg1 = this_reg;
4395 this->dreg = mono_regstate_next_int (cfg->rs);
4396 mono_bblock_add_inst (cfg->cbb, this);
4398 mono_call_inst_add_outarg_reg (cfg, call, this->dreg, cinfo->args [0].reg, FALSE);
4402 MONO_INST_NEW (cfg, this, OP_OUTARG);
4403 this->type = this_type;
4404 this->sreg1 = this_reg;
4405 mono_bblock_add_inst (cfg->cbb, this);
4412 if (cinfo->ret.storage == ArgValuetypeInReg) {
4414 * The valuetype is in EAX:EDX after the call, needs to be copied to
4415 * the stack. Save the address here, so the call instruction can
4418 MONO_INST_NEW (cfg, vtarg, OP_STORE_MEMBASE_REG);
4419 vtarg->inst_destbasereg = X86_ESP;
4420 vtarg->inst_offset = inst->stack_usage;
4421 vtarg->sreg1 = vt_reg;
4422 mono_bblock_add_inst (cfg->cbb, vtarg);
4424 else if (cinfo->ret.storage == ArgInIReg) {
4425 /* The return address is passed in a register */
4426 MONO_INST_NEW (cfg, vtarg, OP_MOVE);
4427 vtarg->sreg1 = vt_reg;
4428 vtarg->dreg = mono_regstate_next_int (cfg->rs);
4429 mono_bblock_add_inst (cfg->cbb, vtarg);
4431 mono_call_inst_add_outarg_reg (cfg, call, vtarg->dreg, cinfo->ret.reg, FALSE);
4434 MONO_INST_NEW (cfg, vtarg, OP_OUTARG);
4435 vtarg->type = STACK_MP;
4436 vtarg->sreg1 = vt_reg;
4437 mono_bblock_add_inst (cfg->cbb, vtarg);
4442 #ifdef MONO_ARCH_HAVE_IMT
4444 // Linear handler, the bsearch head compare is shorter
4445 //[2 + 4] x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
4446 //[1 + 1] x86_branch8(inst,cond,imm,is_signed)
4447 // x86_patch(ins,target)
4448 //[1 + 5] x86_jump_mem(inst,mem)
4451 #define BR_SMALL_SIZE 2
4452 #define BR_LARGE_SIZE 5
4453 #define JUMP_IMM_SIZE 6
4454 #define ENABLE_WRONG_METHOD_CHECK 0
4457 imt_branch_distance (MonoIMTCheckItem **imt_entries, int start, int target)
4459 int i, distance = 0;
4460 for (i = start; i < target; ++i)
4461 distance += imt_entries [i]->chunk_size;
4466 * LOCKING: called with the domain lock held
4469 mono_arch_build_imt_thunk (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count)
4473 guint8 *code, *start;
4475 for (i = 0; i < count; ++i) {
4476 MonoIMTCheckItem *item = imt_entries [i];
4477 if (item->is_equals) {
4478 if (item->check_target_idx) {
4479 if (!item->compare_done)
4480 item->chunk_size += CMP_SIZE;
4481 item->chunk_size += BR_SMALL_SIZE + JUMP_IMM_SIZE;
4483 item->chunk_size += JUMP_IMM_SIZE;
4484 #if ENABLE_WRONG_METHOD_CHECK
4485 item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
4489 item->chunk_size += CMP_SIZE + BR_LARGE_SIZE;
4490 imt_entries [item->check_target_idx]->compare_done = TRUE;
4492 size += item->chunk_size;
4494 code = mono_code_manager_reserve (domain->code_mp, size);
4496 for (i = 0; i < count; ++i) {
4497 MonoIMTCheckItem *item = imt_entries [i];
4498 item->code_target = code;
4499 if (item->is_equals) {
4500 if (item->check_target_idx) {
4501 if (!item->compare_done)
4502 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->method);
4503 item->jmp_code = code;
4504 x86_branch8 (code, X86_CC_NE, 0, FALSE);
4505 x86_jump_mem (code, & (vtable->vtable [item->vtable_slot]));
4507 /* enable the commented code to assert on wrong method */
4508 #if ENABLE_WRONG_METHOD_CHECK
4509 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->method);
4510 item->jmp_code = code;
4511 x86_branch8 (code, X86_CC_NE, 0, FALSE);
4513 x86_jump_mem (code, & (vtable->vtable [item->vtable_slot]));
4514 #if ENABLE_WRONG_METHOD_CHECK
4515 x86_patch (item->jmp_code, code);
4516 x86_breakpoint (code);
4517 item->jmp_code = NULL;
4521 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->method);
4522 item->jmp_code = code;
4523 if (x86_is_imm8 (imt_branch_distance (imt_entries, i, item->check_target_idx)))
4524 x86_branch8 (code, X86_CC_GE, 0, FALSE);
4526 x86_branch32 (code, X86_CC_GE, 0, FALSE);
4529 /* patch the branches to get to the target items */
4530 for (i = 0; i < count; ++i) {
4531 MonoIMTCheckItem *item = imt_entries [i];
4532 if (item->jmp_code) {
4533 if (item->check_target_idx) {
4534 x86_patch (item->jmp_code, imt_entries [item->check_target_idx]->code_target);
4539 mono_stats.imt_thunks_size += code - start;
4540 g_assert (code - start <= size);
4545 mono_arch_find_imt_method (gpointer *regs, guint8 *code)
4547 return (MonoMethod*) regs [MONO_ARCH_IMT_REG];
4551 mono_arch_find_this_argument (gpointer *regs, MonoMethod *method, MonoGenericSharingContext *gsctx)
4553 MonoMethodSignature *sig = mono_method_signature (method);
4554 CallInfo *cinfo = get_call_info (gsctx, NULL, sig, FALSE);
4555 int this_argument_offset;
4556 MonoObject *this_argument;
4559 * this is the offset of the this arg from esp as saved at the start of
4560 * mono_arch_create_trampoline_code () in tramp-x86.c.
4562 this_argument_offset = 5;
4563 if (MONO_TYPE_ISSTRUCT (sig->ret) && (cinfo->ret.storage == ArgOnStack))
4564 this_argument_offset++;
4566 this_argument = * (MonoObject**) (((guint8*) regs [X86_ESP]) + this_argument_offset * sizeof (gpointer));
4569 return this_argument;
4574 mono_arch_find_static_call_vtable (gpointer *regs, guint8 *code)
4576 return (MonoVTable*) regs [MONO_ARCH_RGCTX_REG];
4580 mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4582 MonoInst *ins = NULL;
4584 if (cmethod->klass == mono_defaults.math_class) {
4585 if (strcmp (cmethod->name, "Sin") == 0) {
4586 MONO_INST_NEW (cfg, ins, OP_SIN);
4587 ins->inst_i0 = args [0];
4588 } else if (strcmp (cmethod->name, "Cos") == 0) {
4589 MONO_INST_NEW (cfg, ins, OP_COS);
4590 ins->inst_i0 = args [0];
4591 } else if (strcmp (cmethod->name, "Tan") == 0) {
4592 MONO_INST_NEW (cfg, ins, OP_TAN);
4593 ins->inst_i0 = args [0];
4594 } else if (strcmp (cmethod->name, "Atan") == 0) {
4595 MONO_INST_NEW (cfg, ins, OP_ATAN);
4596 ins->inst_i0 = args [0];
4597 } else if (strcmp (cmethod->name, "Sqrt") == 0) {
4598 MONO_INST_NEW (cfg, ins, OP_SQRT);
4599 ins->inst_i0 = args [0];
4600 } else if (strcmp (cmethod->name, "Abs") == 0 && fsig->params [0]->type == MONO_TYPE_R8) {
4601 MONO_INST_NEW (cfg, ins, OP_ABS);
4602 ins->inst_i0 = args [0];
4605 if (cfg->opt & MONO_OPT_CMOV) {
4608 if (strcmp (cmethod->name, "Min") == 0) {
4609 if (fsig->params [0]->type == MONO_TYPE_I4)
4611 else if (fsig->params [0]->type == MONO_TYPE_U4)
4612 opcode = OP_IMIN_UN;
4613 } else if (strcmp (cmethod->name, "Max") == 0) {
4614 if (fsig->params [0]->type == MONO_TYPE_I4)
4616 else if (fsig->params [0]->type == MONO_TYPE_U4)
4617 opcode = OP_IMAX_UN;
4621 MONO_INST_NEW (cfg, ins, opcode);
4622 ins->inst_i0 = args [0];
4623 ins->inst_i1 = args [1];
4628 /* OP_FREM is not IEEE compatible */
4629 else if (strcmp (cmethod->name, "IEEERemainder") == 0) {
4630 MONO_INST_NEW (cfg, ins, OP_FREM);
4631 ins->inst_i0 = args [0];
4632 ins->inst_i1 = args [1];
4641 mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4643 MonoInst *ins = NULL;
4646 if (cmethod->klass == mono_defaults.math_class) {
4647 if (strcmp (cmethod->name, "Sin") == 0) {
4649 } else if (strcmp (cmethod->name, "Cos") == 0) {
4651 } else if (strcmp (cmethod->name, "Tan") == 0) {
4653 } else if (strcmp (cmethod->name, "Atan") == 0) {
4655 } else if (strcmp (cmethod->name, "Sqrt") == 0) {
4657 } else if (strcmp (cmethod->name, "Abs") == 0 && fsig->params [0]->type == MONO_TYPE_R8) {
4662 MONO_INST_NEW (cfg, ins, opcode);
4663 ins->type = STACK_R8;
4664 ins->dreg = mono_alloc_freg (cfg);
4665 ins->sreg1 = args [0]->dreg;
4666 MONO_ADD_INS (cfg->cbb, ins);
4669 if (cfg->opt & MONO_OPT_CMOV) {
4672 if (strcmp (cmethod->name, "Min") == 0) {
4673 if (fsig->params [0]->type == MONO_TYPE_I4)
4675 } else if (strcmp (cmethod->name, "Max") == 0) {
4676 if (fsig->params [0]->type == MONO_TYPE_I4)
4681 MONO_INST_NEW (cfg, ins, opcode);
4682 ins->type = STACK_I4;
4683 ins->dreg = mono_alloc_ireg (cfg);
4684 ins->sreg1 = args [0]->dreg;
4685 ins->sreg2 = args [1]->dreg;
4686 MONO_ADD_INS (cfg->cbb, ins);
4691 /* OP_FREM is not IEEE compatible */
4692 else if (strcmp (cmethod->name, "IEEERemainder") == 0) {
4693 MONO_INST_NEW (cfg, ins, OP_FREM);
4694 ins->inst_i0 = args [0];
4695 ins->inst_i1 = args [1];
4704 mono_arch_print_tree (MonoInst *tree, int arity)
4709 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
4715 if (appdomain_tls_offset == -1)
4718 MONO_INST_NEW (cfg, ins, OP_TLS_GET);
4719 ins->inst_offset = appdomain_tls_offset;
4723 MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
4727 if (thread_tls_offset == -1)
4730 MONO_INST_NEW (cfg, ins, OP_TLS_GET);
4731 ins->inst_offset = thread_tls_offset;
4736 mono_arch_get_patch_offset (guint8 *code)
4738 if ((code [0] == 0x8b) && (x86_modrm_mod (code [1]) == 0x2))
4740 else if ((code [0] == 0xba))
4742 else if ((code [0] == 0x68))
4745 else if ((code [0] == 0xff) && (x86_modrm_reg (code [1]) == 0x6))
4746 /* push <OFFSET>(<REG>) */
4748 else if ((code [0] == 0xff) && (x86_modrm_reg (code [1]) == 0x2))
4749 /* call *<OFFSET>(<REG>) */
4751 else if ((code [0] == 0xdd) || (code [0] == 0xd9))
4754 else if ((code [0] == 0x58) && (code [1] == 0x05))
4755 /* pop %eax; add <OFFSET>, %eax */
4757 else if ((code [0] >= 0x58) && (code [0] <= 0x58 + X86_NREG) && (code [1] == 0x81))
4758 /* pop <REG>; add <OFFSET>, <REG> */
4760 else if ((code [0] >= 0xb8) && (code [0] < 0xb8 + 8))
4761 /* mov <REG>, imm */
4764 g_assert_not_reached ();
4770 * mono_breakpoint_clean_code:
4772 * Copy @size bytes from @code - @offset to the buffer @buf. If the debugger inserted software
4773 * breakpoints in the original code, they are removed in the copy.
4775 * Returns TRUE if no sw breakpoint was present.
4778 mono_breakpoint_clean_code (guint8 *method_start, guint8 *code, int offset, guint8 *buf, int size)
4781 gboolean can_write = TRUE;
4783 * If method_start is non-NULL we need to perform bound checks, since we access memory
4784 * at code - offset we could go before the start of the method and end up in a different
4785 * page of memory that is not mapped or read incorrect data anyway. We zero-fill the bytes
4788 if (!method_start || code - offset >= method_start) {
4789 memcpy (buf, code - offset, size);
4791 int diff = code - method_start;
4792 memset (buf, 0, size);
4793 memcpy (buf + offset - diff, method_start, diff + size - offset);
4796 for (i = 0; i < MONO_BREAKPOINT_ARRAY_SIZE; ++i) {
4797 int idx = mono_breakpoint_info_index [i];
4801 ptr = mono_breakpoint_info [idx].address;
4802 if (ptr >= code && ptr < code + size) {
4803 guint8 saved_byte = mono_breakpoint_info [idx].saved_byte;
4805 /*g_print ("patching %p with 0x%02x (was: 0x%02x)\n", ptr, saved_byte, buf [ptr - code]);*/
4806 buf [ptr - code] = saved_byte;
4813 mono_arch_get_vcall_slot (guint8 *code, gpointer *regs, int *displacement)
4819 mono_breakpoint_clean_code (NULL, code, 8, buf, sizeof (buf));
4824 /* go to the start of the call instruction
4826 * address_byte = (m << 6) | (o << 3) | reg
4827 * call opcode: 0xff address_byte displacement
4829 * 0xff m=2,o=2 imm32
4834 * A given byte sequence can match more than case here, so we have to be
4835 * really careful about the ordering of the cases. Longer sequences
4838 if ((code [-2] == 0x8b) && (x86_modrm_mod (code [-1]) == 0x2) && (code [4] == 0xff) && (x86_modrm_reg (code [5]) == 0x2) && (x86_modrm_mod (code [5]) == 0x0)) {
4840 * This is an interface call
4841 * 8b 80 0c e8 ff ff mov 0xffffe80c(%eax),%eax
4842 * ff 10 call *(%eax)
4844 reg = x86_modrm_rm (code [5]);
4846 #ifdef MONO_ARCH_HAVE_IMT
4847 } else if ((code [-2] == 0xba) && (code [3] == 0xff) && (x86_modrm_mod (code [4]) == 1) && (x86_modrm_reg (code [4]) == 2) && ((signed char)code [5] < 0)) {
4848 /* IMT-based interface calls: with MONO_ARCH_IMT_REG == edx
4849 * ba 14 f8 28 08 mov $0x828f814,%edx
4850 * ff 50 fc call *0xfffffffc(%eax)
4852 reg = code [4] & 0x07;
4853 disp = (signed char)code [5];
4855 } else if ((code [1] != 0xe8) && (code [3] == 0xff) && ((code [4] & 0x18) == 0x10) && ((code [4] >> 6) == 1)) {
4856 reg = code [4] & 0x07;
4857 disp = (signed char)code [5];
4859 if ((code [0] == 0xff) && ((code [1] & 0x18) == 0x10) && ((code [1] >> 6) == 2)) {
4860 reg = code [1] & 0x07;
4861 disp = *((gint32*)(code + 2));
4862 } else if ((code [1] == 0xe8)) {
4864 } else if ((code [4] == 0xff) && (((code [5] >> 6) & 0x3) == 0) && (((code [5] >> 3) & 0x7) == 2)) {
4866 * This is a interface call
4867 * 8b 40 30 mov 0x30(%eax),%eax
4868 * ff 10 call *(%eax)
4871 reg = code [5] & 0x07;
4877 *displacement = disp;
4882 mono_arch_get_vcall_slot_addr (guint8 *code, gpointer *regs)
4886 vt = mono_arch_get_vcall_slot (code, regs, &displacement);
4889 return (gpointer*)((char*)vt + displacement);
4893 mono_arch_get_this_arg_from_call (MonoGenericSharingContext *gsctx, MonoMethodSignature *sig,
4894 gssize *regs, guint8 *code)
4896 guint32 esp = regs [X86_ESP];
4901 gsctx = mono_get_generic_context_from_code (code);
4902 cinfo = get_call_info (gsctx, NULL, sig, FALSE);
4905 * The stack looks like:
4908 * <possible vtype return address>
4910 * <4 pointers pushed by mono_arch_create_trampoline_code ()>
4912 res = (((MonoObject**)esp) [5 + (cinfo->args [0].offset / 4)]);
4917 #define MAX_ARCH_DELEGATE_PARAMS 10
4920 mono_arch_get_delegate_invoke_impl (MonoMethodSignature *sig, gboolean has_target)
4922 guint8 *code, *start;
4924 if (sig->param_count > MAX_ARCH_DELEGATE_PARAMS)
4927 /* FIXME: Support more cases */
4928 if (MONO_TYPE_ISSTRUCT (sig->ret))
4932 * The stack contains:
4938 static guint8* cached = NULL;
4942 start = code = mono_global_codeman_reserve (64);
4944 /* Replace the this argument with the target */
4945 x86_mov_reg_membase (code, X86_EAX, X86_ESP, 4, 4);
4946 x86_mov_reg_membase (code, X86_ECX, X86_EAX, G_STRUCT_OFFSET (MonoDelegate, target), 4);
4947 x86_mov_membase_reg (code, X86_ESP, 4, X86_ECX, 4);
4948 x86_jump_membase (code, X86_EAX, G_STRUCT_OFFSET (MonoDelegate, method_ptr));
4950 g_assert ((code - start) < 64);
4952 mono_debug_add_delegate_trampoline (start, code - start);
4954 mono_memory_barrier ();
4958 static guint8* cache [MAX_ARCH_DELEGATE_PARAMS + 1] = {NULL};
4960 /* 8 for mov_reg and jump, plus 8 for each parameter */
4961 int code_reserve = 8 + (sig->param_count * 8);
4963 for (i = 0; i < sig->param_count; ++i)
4964 if (!mono_is_regsize_var (sig->params [i]))
4967 code = cache [sig->param_count];
4972 * The stack contains:
4973 * <args in reverse order>
4978 * <args in reverse order>
4981 * without unbalancing the stack.
4982 * So move each arg up a spot in the stack (overwriting un-needed 'this' arg)
4983 * and leaving original spot of first arg as placeholder in stack so
4984 * when callee pops stack everything works.
4987 start = code = mono_global_codeman_reserve (code_reserve);
4989 /* store delegate for access to method_ptr */
4990 x86_mov_reg_membase (code, X86_ECX, X86_ESP, 4, 4);
4993 for (i = 0; i < sig->param_count; ++i) {
4994 x86_mov_reg_membase (code, X86_EAX, X86_ESP, (i+2)*4, 4);
4995 x86_mov_membase_reg (code, X86_ESP, (i+1)*4, X86_EAX, 4);
4998 x86_jump_membase (code, X86_ECX, G_STRUCT_OFFSET (MonoDelegate, method_ptr));
5000 g_assert ((code - start) < code_reserve);
5002 mono_debug_add_delegate_trampoline (start, code - start);
5004 mono_memory_barrier ();
5006 cache [sig->param_count] = start;
5013 mono_arch_context_get_int_reg (MonoContext *ctx, int reg)
5016 case X86_ECX: return (gpointer)ctx->ecx;
5017 case X86_EDX: return (gpointer)ctx->edx;
5018 case X86_EBP: return (gpointer)ctx->ebp;
5019 case X86_ESP: return (gpointer)ctx->esp;
5020 default: return ((gpointer)(&ctx->eax)[reg]);