mono/mini/mini-x86.c

   1 /*
   2  * mini-x86.c: x86 backend for the Mono code generator
   3  *
   4  * Authors:
   5  *   Paolo Molaro (lupus@ximian.com)
   6  *   Dietmar Maurer (dietmar@ximian.com)
   7  *
   8  * (C) 2003 Ximian, Inc.
   9  */
  10 #include "mini.h"
  11 #include <string.h>
  12 #include <math.h>
  13
  14 #include <mono/metadata/appdomain.h>
  15 #include <mono/metadata/debug-helpers.h>
  16 #include <mono/metadata/profiler-private.h>
  17
  18 #include "mini-x86.h"
  19 #include "inssel.h"
  20 #include "cpu-pentium.h"
  21
  22 const char*
  23 mono_arch_regname (int reg) {
  24         switch (reg) {
  25         case X86_EAX: return "%eax";
  26         case X86_EBX: return "%ebx";
  27         case X86_ECX: return "%ecx";
  28         case X86_EDX: return "%edx";
  29         case X86_ESP: return "%esp";
  30         case X86_EBP: return "%ebp";
  31         case X86_EDI: return "%edi";
  32         case X86_ESI: return "%esi";
  33         }
  34         return "unknown";
  35 }
  36
  37 typedef struct {
  38         guint16 size;
  39         guint16 offset;
  40         guint8  pad;
  41 } MonoJitArgumentInfo;
  42
  43 /*
  44  * arch_get_argument_info:
  45  * @csig:  a method signature
  46  * @param_count: the number of parameters to consider
  47  * @arg_info: an array to store the result infos
  48  *
  49  * Gathers information on parameters such as size, alignment and
  50  * padding. arg_info should be large enought to hold param_count + 1 entries.
  51  *
  52  * Returns the size of the activation frame.
  53  */
  54 static int
  55 arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
  56 {
  57         int k, frame_size = 0;
  58         int size, align, pad;
  59         int offset = 8;
  60
  61         if (MONO_TYPE_ISSTRUCT (csig->ret)) {
  62                 frame_size += sizeof (gpointer);
  63                 offset += 4;
  64         }
  65
  66         arg_info [0].offset = offset;
  67
  68         if (csig->hasthis) {
  69                 frame_size += sizeof (gpointer);
  70                 offset += 4;
  71         }
  72
  73         arg_info [0].size = frame_size;
  74
  75         for (k = 0; k < param_count; k++) {
  76
  77                 if (csig->pinvoke)
  78                         size = mono_type_native_stack_size (csig->params [k], &align);
  79                 else
  80                         size = mono_type_stack_size (csig->params [k], &align);
  81
  82                 /* ignore alignment for now */
  83                 align = 1;
  84
  85                 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
  86                 arg_info [k].pad = pad;
  87                 frame_size += size;
  88                 arg_info [k + 1].pad = 0;
  89                 arg_info [k + 1].size = size;
  90                 offset += pad;
  91                 arg_info [k + 1].offset = offset;
  92                 offset += size;
  93         }
  94
  95         align = MONO_ARCH_FRAME_ALIGNMENT;
  96         frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
  97         arg_info [k].pad = pad;
  98
  99         return frame_size;
 100 }
 101
 102 static int indent_level = 0;
 103
 104 static void indent (int diff) {
 105         int v = indent_level;
 106         while (v-- > 0) {
 107                 printf (". ");
 108         }
 109         indent_level += diff;
 110 }
 111
 112 static void
 113 enter_method (MonoMethod *method, char *ebp)
 114 {
 115         int i, j;
 116         MonoClass *class;
 117         MonoObject *o;
 118         MonoJitArgumentInfo *arg_info;
 119         MonoMethodSignature *sig;
 120         char *fname;
 121
 122         fname = mono_method_full_name (method, TRUE);
 123         indent (1);
 124         printf ("ENTER: %s(", fname);
 125         g_free (fname);
 126
 127         if (((int)ebp & (MONO_ARCH_FRAME_ALIGNMENT - 1)) != 0) {
 128                 g_error ("unaligned stack detected (%p)", ebp);
 129         }
 130
 131         sig = method->signature;
 132
 133         arg_info = alloca (sizeof (MonoJitArgumentInfo) * (sig->param_count + 1));
 134
 135         arch_get_argument_info (sig, sig->param_count, arg_info);
 136
 137         if (MONO_TYPE_ISSTRUCT (method->signature->ret)) {
 138                 g_assert (!method->signature->ret->byref);
 139
 140                 printf ("VALUERET:%p, ", *((gpointer *)(ebp + 8)));
 141         }
 142
 143         if (method->signature->hasthis) {
 144                 gpointer *this = (gpointer *)(ebp + arg_info [0].offset);
 145                 if (method->klass->valuetype) {
 146                         printf ("value:%p, ", *this);
 147                 } else {
 148                         o = *((MonoObject **)this);
 149
 150                         if (o) {
 151                                 class = o->vtable->klass;
 152
 153                                 if (class == mono_defaults.string_class) {
 154                                         printf ("this:[STRING:%p:%s], ", o, mono_string_to_utf8 ((MonoString *)o));
 155                                 } else {
 156                                         printf ("this:%p[%s.%s], ", o, class->name_space, class->name);
 157                                 }
 158                         } else
 159                                 printf ("this:NULL, ");
 160                 }
 161         }
 162
 163         for (i = 0; i < method->signature->param_count; ++i) {
 164                 gpointer *cpos = (gpointer *)(ebp + arg_info [i + 1].offset);
 165                 int size = arg_info [i + 1].size;
 166
 167                 MonoType *type = method->signature->params [i];
 168
 169                 if (type->byref) {
 170                         printf ("[BYREF:%p], ", *cpos);
 171                 } else switch (type->type) {
 172
 173                 case MONO_TYPE_I:
 174                 case MONO_TYPE_U:
 175                         printf ("%p, ", (gpointer)*((int *)(cpos)));
 176                         break;
 177                 case MONO_TYPE_BOOLEAN:
 178                 case MONO_TYPE_CHAR:
 179                 case MONO_TYPE_I1:
 180                 case MONO_TYPE_U1:
 181                 case MONO_TYPE_I2:
 182                 case MONO_TYPE_U2:
 183                 case MONO_TYPE_I4:
 184                 case MONO_TYPE_U4:
 185                         printf ("%d, ", *((int *)(cpos)));
 186                         break;
 187                 case MONO_TYPE_STRING: {
 188                         MonoString *s = *((MonoString **)cpos);
 189                         if (s) {
 190                                 g_assert (((MonoObject *)s)->vtable->klass == mono_defaults.string_class);
 191                                 printf ("[STRING:%p:%s], ", s, mono_string_to_utf8 (s));
 192                         } else
 193                                 printf ("[STRING:null], ");
 194                         break;
 195                 }
 196                 case MONO_TYPE_CLASS:
 197                 case MONO_TYPE_OBJECT: {
 198                         o = *((MonoObject **)cpos);
 199                         if (o) {
 200                                 class = o->vtable->klass;
 201
 202                                 if (class == mono_defaults.string_class) {
 203                                         printf ("[STRING:%p:%s], ", o, mono_string_to_utf8 ((MonoString *)o));
 204                                 } else if (class == mono_defaults.int32_class) {
 205                                         printf ("[INT32:%p:%d], ", o, *(gint32 *)((char *)o + sizeof (MonoObject)));
 206                                 } else
 207                                         printf ("[%s.%s:%p], ", class->name_space, class->name, o);
 208                         } else {
 209                                 printf ("%p, ", *((gpointer *)(cpos)));
 210                         }
 211                         break;
 212                 }
 213                 case MONO_TYPE_PTR:
 214                 case MONO_TYPE_FNPTR:
 215                 case MONO_TYPE_ARRAY:
 216                 case MONO_TYPE_SZARRAY:
 217                         printf ("%p, ", *((gpointer *)(cpos)));
 218                         break;
 219                 case MONO_TYPE_I8:
 220                 case MONO_TYPE_U8:
 221                         printf ("0x%016llx, ", *((gint64 *)(cpos)));
 222                         break;
 223                 case MONO_TYPE_R4:
 224                         printf ("%f, ", *((float *)(cpos)));
 225                         break;
 226                 case MONO_TYPE_R8:
 227                         printf ("%f, ", *((double *)(cpos)));
 228                         break;
 229                 case MONO_TYPE_VALUETYPE:
 230                         printf ("[");
 231                         for (j = 0; j < size; j++)
 232                                 printf ("%02x,", *((guint8*)cpos +j));
 233                         printf ("], ");
 234                         break;
 235                 default:
 236                         printf ("XX, ");
 237                 }
 238         }
 239
 240         printf (")\n");
 241 }
 242
 243 static void
 244 leave_method (MonoMethod *method, ...)
 245 {
 246         MonoType *type;
 247         char *fname;
 248         va_list ap;
 249
 250         va_start(ap, method);
 251
 252         fname = mono_method_full_name (method, TRUE);
 253         indent (-1);
 254         printf ("LEAVE: %s", fname);
 255         g_free (fname);
 256
 257         type = method->signature->ret;
 258
 259 handle_enum:
 260         switch (type->type) {
 261         case MONO_TYPE_VOID:
 262                 break;
 263         case MONO_TYPE_BOOLEAN: {
 264                 int eax = va_arg (ap, int);
 265                 if (eax)
 266                         printf ("TRUE:%d", eax);
 267                 else
 268                         printf ("FALSE");
 269
 270                 break;
 271         }
 272         case MONO_TYPE_CHAR:
 273         case MONO_TYPE_I1:
 274         case MONO_TYPE_U1:
 275         case MONO_TYPE_I2:
 276         case MONO_TYPE_U2:
 277         case MONO_TYPE_I4:
 278         case MONO_TYPE_U4:
 279         case MONO_TYPE_I:
 280         case MONO_TYPE_U: {
 281                 int eax = va_arg (ap, int);
 282                 printf ("EAX=%d", eax);
 283                 break;
 284         }
 285         case MONO_TYPE_STRING: {
 286                 MonoString *s = va_arg (ap, MonoString *);
 287 ;
 288                 if (s) {
 289                         g_assert (((MonoObject *)s)->vtable->klass == mono_defaults.string_class);
 290                         printf ("[STRING:%p:%s]", s, mono_string_to_utf8 (s));
 291                 } else
 292                         printf ("[STRING:null], ");
 293                 break;
 294         }
 295         case MONO_TYPE_CLASS:
 296         case MONO_TYPE_OBJECT: {
 297                 MonoObject *o = va_arg (ap, MonoObject *);
 298
 299                 if (o) {
 300                         if (o->vtable->klass == mono_defaults.boolean_class) {
 301                                 printf ("[BOOLEAN:%p:%d]", o, *((guint8 *)o + sizeof (MonoObject)));
 302                         } else if  (o->vtable->klass == mono_defaults.int32_class) {
 303                                 printf ("[INT32:%p:%d]", o, *((gint32 *)((char *)o + sizeof (MonoObject))));
 304                         } else if  (o->vtable->klass == mono_defaults.int64_class) {
 305                                 printf ("[INT64:%p:%lld]", o, *((gint64 *)((char *)o + sizeof (MonoObject))));
 306                         } else
 307                                 printf ("[%s.%s:%p]", o->vtable->klass->name_space, o->vtable->klass->name, o);
 308                 } else
 309                         printf ("[OBJECT:%p]", o);
 310
 311                 break;
 312         }
 313         case MONO_TYPE_PTR:
 314         case MONO_TYPE_FNPTR:
 315         case MONO_TYPE_ARRAY:
 316         case MONO_TYPE_SZARRAY: {
 317                 gpointer p = va_arg (ap, gpointer);
 318                 printf ("EAX=%p", p);
 319                 break;
 320         }
 321         case MONO_TYPE_I8: {
 322                 gint64 l =  va_arg (ap, gint64);
 323                 printf ("EAX/EDX=0x%16llx", l);
 324                 break;
 325         }
 326         case MONO_TYPE_U8: {
 327                 gint64 l =  va_arg (ap, gint64);
 328                 printf ("EAX/EDX=0x%16llx", l);
 329                 break;
 330         }
 331         case MONO_TYPE_R8: {
 332                 double f = va_arg (ap, double);
 333                 printf ("FP=%f\n", f);
 334                 break;
 335         }
 336         case MONO_TYPE_VALUETYPE:
 337                 if (type->data.klass->enumtype) {
 338                         type = type->data.klass->enum_basetype;
 339                         goto handle_enum;
 340                 } else {
 341                         guint8 *p = va_arg (ap, gpointer);
 342                         int j, size, align;
 343                         size = mono_type_size (type, &align);
 344                         printf ("[");
 345                         for (j = 0; p && j < size; j++)
 346                                 printf ("%02x,", p [j]);
 347                         printf ("]");
 348                 }
 349                 break;
 350         default:
 351                 printf ("(unknown return type %x)", method->signature->ret->type);
 352         }
 353
 354         printf ("\n");
 355 }
 356
 357 static const guchar cpuid_impl [] = {
 358         0x55,                           /* push   %ebp */
 359         0x89, 0xe5,                     /* mov    %esp,%ebp */
 360         0x53,                           /* push   %ebx */
 361         0x8b, 0x45, 0x08,               /* mov    0x8(%ebp),%eax */
 362         0x0f, 0xa2,                     /* cpuid   */
 363         0x50,                           /* push   %eax */
 364         0x8b, 0x45, 0x10,               /* mov    0x10(%ebp),%eax */
 365         0x89, 0x18,                     /* mov    %ebx,(%eax) */
 366         0x8b, 0x45, 0x14,               /* mov    0x14(%ebp),%eax */
 367         0x89, 0x08,                     /* mov    %ecx,(%eax) */
 368         0x8b, 0x45, 0x18,               /* mov    0x18(%ebp),%eax */
 369         0x89, 0x10,                     /* mov    %edx,(%eax) */
 370         0x58,                           /* pop    %eax */
 371         0x8b, 0x55, 0x0c,               /* mov    0xc(%ebp),%edx */
 372         0x89, 0x02,                     /* mov    %eax,(%edx) */
 373         0x5b,                           /* pop    %ebx */
 374         0xc9,                           /* leave   */
 375         0xc3,                           /* ret     */
 376 };
 377
 378 typedef void (*CpuidFunc) (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx);
 379
 380 static int
 381 cpuid (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx)
 382 {
 383         int have_cpuid = 0;
 384         __asm__  __volatile__ (
 385                 "pushfl\n"
 386                 "popl %%eax\n"
 387                 "movl %%eax, %%edx\n"
 388                 "xorl $0x200000, %%eax\n"
 389                 "pushl %%eax\n"
 390                 "popfl\n"
 391                 "pushfl\n"
 392                 "popl %%eax\n"
 393                 "xorl %%edx, %%eax\n"
 394                 "andl $0x200000, %%eax\n"
 395                 "movl %%eax, %0"
 396                 : "=r" (have_cpuid)
 397                 :
 398                 : "%eax", "%edx"
 399         );
 400
 401         if (have_cpuid) {
 402                 CpuidFunc func = (CpuidFunc)cpuid_impl;
 403                 func (id, p_eax, p_ebx, p_ecx, p_edx);
 404                 /*
 405                  * We use this approach because of issues with gcc and pic code, see:
 406                  * http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=7329
 407                 __asm__ __volatile__ ("cpuid"
 408                         : "=a" (*p_eax), "=b" (*p_ebx), "=c" (*p_ecx), "=d" (*p_edx)
 409                         : "a" (id));
 410                 */
 411                 return 1;
 412         }
 413         return 0;
 414 }
 415
 416 /*
 417  * Initialize the cpu to execute managed code.
 418  */
 419 void
 420 mono_arch_cpu_init (void)
 421 {
 422         guint16 fpcw;
 423
 424         /* spec compliance requires running with double precision */
 425         __asm__  __volatile__ ("fnstcw %0\n": "=m" (fpcw));
 426         fpcw &= ~X86_FPCW_PRECC_MASK;
 427         fpcw |= X86_FPCW_PREC_DOUBLE;
 428         __asm__  __volatile__ ("fldcw %0\n": : "m" (fpcw));
 429         __asm__  __volatile__ ("fnstcw %0\n": "=m" (fpcw));
 430
 431 }
 432
 433 /*
 434  * This function returns the optimizations supported on this cpu.
 435  */
 436 guint32
 437 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
 438 {
 439         int eax, ebx, ecx, edx;
 440         guint32 opts = 0;
 441
 442         *exclude_mask = 0;
 443         /* Feature Flags function, flags returned in EDX. */
 444         if (cpuid (1, &eax, &ebx, &ecx, &edx)) {
 445                 if (edx & (1 << 15)) {
 446                         opts |= MONO_OPT_CMOV;
 447                         if (edx & 1)
 448                                 opts |= MONO_OPT_FCMOV;
 449                         else
 450                                 *exclude_mask |= MONO_OPT_FCMOV;
 451                 } else
 452                         *exclude_mask |= MONO_OPT_CMOV;
 453         }
 454         return opts;
 455 }
 456
 457 static gboolean
 458 is_regsize_var (MonoType *t) {
 459         if (t->byref)
 460                 return TRUE;
 461         switch (t->type) {
 462         case MONO_TYPE_I4:
 463         case MONO_TYPE_U4:
 464         case MONO_TYPE_I:
 465         case MONO_TYPE_U:
 466                 return TRUE;
 467         case MONO_TYPE_OBJECT:
 468         case MONO_TYPE_STRING:
 469         case MONO_TYPE_CLASS:
 470         case MONO_TYPE_SZARRAY:
 471         case MONO_TYPE_ARRAY:
 472                 return TRUE;
 473         case MONO_TYPE_VALUETYPE:
 474                 if (t->data.klass->enumtype)
 475                         return is_regsize_var (t->data.klass->enum_basetype);
 476                 return FALSE;
 477         }
 478         return FALSE;
 479 }
 480
 481 GList *
 482 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
 483 {
 484         GList *vars = NULL;
 485         int i;
 486
 487         for (i = 0; i < cfg->num_varinfo; i++) {
 488                 MonoInst *ins = cfg->varinfo [i];
 489                 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
 490
 491                 /* unused vars */
 492                 if (vmv->range.first_use.abs_pos > vmv->range.last_use.abs_pos)
 493                         continue;
 494
 495                 if ((ins->flags & (MONO_INST_IS_DEAD|MONO_INST_VOLATILE|MONO_INST_INDIRECT)) ||
 496                     (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
 497                         continue;
 498
 499                 /* we dont allocate I1 to registers because there is no simply way to sign extend
 500                  * 8bit quantities in caller saved registers on x86 */
 501                 if (is_regsize_var (ins->inst_vtype) || (ins->inst_vtype->type == MONO_TYPE_BOOLEAN) ||
 502                     (ins->inst_vtype->type == MONO_TYPE_U1) || (ins->inst_vtype->type == MONO_TYPE_U2)||
 503                     (ins->inst_vtype->type == MONO_TYPE_I2) || (ins->inst_vtype->type == MONO_TYPE_CHAR)) {
 504                         g_assert (MONO_VARINFO (cfg, i)->reg == -1);
 505                         g_assert (i == vmv->idx);
 506                         vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
 507                 }
 508         }
 509
 510         return vars;
 511 }
 512
 513 GList *
 514 mono_arch_get_global_int_regs (MonoCompile *cfg)
 515 {
 516         GList *regs = NULL;
 517
 518         /* we can use 3 registers for global allocation */
 519         regs = g_list_prepend (regs, (gpointer)X86_EBX);
 520         regs = g_list_prepend (regs, (gpointer)X86_ESI);
 521         regs = g_list_prepend (regs, (gpointer)X86_EDI);
 522
 523         return regs;
 524 }
 525
 526 /*
 527  * Set var information according to the calling convention. X86 version.
 528  * The locals var stuff should most likely be split in another method.
 529  */
 530 void
 531 mono_arch_allocate_vars (MonoCompile *m)
 532 {
 533         MonoMethodSignature *sig;
 534         MonoMethodHeader *header;
 535         MonoInst *inst;
 536         int i, offset, size, align, curinst;
 537
 538         header = ((MonoMethodNormal *)m->method)->header;
 539
 540         sig = m->method->signature;
 541
 542         offset = 8;
 543         curinst = 0;
 544         if (MONO_TYPE_ISSTRUCT (sig->ret)) {
 545                 m->ret->opcode = OP_REGOFFSET;
 546                 m->ret->inst_basereg = X86_EBP;
 547                 m->ret->inst_offset = offset;
 548                 offset += sizeof (gpointer);
 549         } else {
 550                 /* FIXME: handle long and FP values */
 551                 switch (sig->ret->type) {
 552                 case MONO_TYPE_VOID:
 553                         break;
 554                 default:
 555                         m->ret->opcode = OP_REGVAR;
 556                         m->ret->inst_c0 = X86_EAX;
 557                         break;
 558                 }
 559         }
 560         if (sig->hasthis) {
 561                 inst = m->varinfo [curinst];
 562                 if (inst->opcode != OP_REGVAR) {
 563                         inst->opcode = OP_REGOFFSET;
 564                         inst->inst_basereg = X86_EBP;
 565                 }
 566                 inst->inst_offset = offset;
 567                 offset += sizeof (gpointer);
 568                 curinst++;
 569         }
 570
 571         if (sig->call_convention == MONO_CALL_VARARG) {
 572                 m->sig_cookie = offset;
 573                 offset += sizeof (gpointer);
 574         }
 575
 576         for (i = 0; i < sig->param_count; ++i) {
 577                 inst = m->varinfo [curinst];
 578                 if (inst->opcode != OP_REGVAR) {
 579                         inst->opcode = OP_REGOFFSET;
 580                         inst->inst_basereg = X86_EBP;
 581                 }
 582                 inst->inst_offset = offset;
 583                 size = mono_type_size (sig->params [i], &align);
 584                 size += 4 - 1;
 585                 size &= ~(4 - 1);
 586                 offset += size;
 587                 curinst++;
 588         }
 589
 590         offset = 0;
 591
 592         /* reserve space to save LMF and caller saved registers */
 593
 594         if (m->method->save_lmf) {
 595                 offset += sizeof (MonoLMF);
 596         } else {
 597                 if (m->used_int_regs & (1 << X86_EBX)) {
 598                         offset += 4;
 599                 }
 600
 601                 if (m->used_int_regs & (1 << X86_EDI)) {
 602                         offset += 4;
 603                 }
 604
 605                 if (m->used_int_regs & (1 << X86_ESI)) {
 606                         offset += 4;
 607                 }
 608         }
 609
 610         for (i = curinst; i < m->num_varinfo; ++i) {
 611                 inst = m->varinfo [i];
 612
 613                 if ((inst->flags & MONO_INST_IS_DEAD) || inst->opcode == OP_REGVAR)
 614                         continue;
 615
 616                 /* inst->unused indicates native sized value types, this is used by the
 617                 * pinvoke wrappers when they call functions returning structure */
 618                 if (inst->unused && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
 619                         size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
 620                 else
 621                         size = mono_type_size (inst->inst_vtype, &align);
 622
 623                 offset += size;
 624                 offset += align - 1;
 625                 offset &= ~(align - 1);
 626                 inst->opcode = OP_REGOFFSET;
 627                 inst->inst_basereg = X86_EBP;
 628                 inst->inst_offset = -offset;
 629                 //g_print ("allocating local %d to %d\n", i, -offset);
 630         }
 631         offset += (MONO_ARCH_FRAME_ALIGNMENT - 1);
 632         offset &= ~(MONO_ARCH_FRAME_ALIGNMENT - 1);
 633
 634         /* change sign? */
 635         m->stack_offset = -offset;
 636 }
 637
 638 /* Fixme: we need an alignment solution for enter_method and mono_arch_call_opcode,
 639  * currently alignment in mono_arch_call_opcode is computed without arch_get_argument_info
 640  */
 641
 642 /*
 643  * take the arguments and generate the arch-specific
 644  * instructions to properly call the function in call.
 645  * This includes pushing, moving arguments to the right register
 646  * etc.
 647  * Issue: who does the spilling if needed, and when?
 648  */
 649 MonoCallInst*
 650 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
 651         MonoInst *arg, *in;
 652         MonoMethodSignature *sig;
 653         int i, n, stack_size, type;
 654         MonoType *ptype;
 655
 656         stack_size = 0;
 657         /* add the vararg cookie before the non-implicit args */
 658         if (call->signature->call_convention == MONO_CALL_VARARG) {
 659                 MonoInst *sig_arg;
 660                 MONO_INST_NEW (cfg, arg, OP_OUTARG);
 661                 MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
 662                 sig_arg->inst_p0 = call->signature;
 663                 arg->inst_left = sig_arg;
 664                 arg->type = STACK_PTR;
 665                 /* prepend, so they get reversed */
 666                 arg->next = call->out_args;
 667                 call->out_args = arg;
 668                 stack_size += sizeof (gpointer);
 669         }
 670         sig = call->signature;
 671         n = sig->param_count + sig->hasthis;
 672
 673         if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret))
 674                 stack_size += sizeof (gpointer);
 675         for (i = 0; i < n; ++i) {
 676                 if (is_virtual && i == 0) {
 677                         /* the argument will be attached to the call instrucion */
 678                         in = call->args [i];
 679                         stack_size += 4;
 680                 } else {
 681                         MONO_INST_NEW (cfg, arg, OP_OUTARG);
 682                         in = call->args [i];
 683                         arg->cil_code = in->cil_code;
 684                         arg->inst_left = in;
 685                         arg->type = in->type;
 686                         /* prepend, so they get reversed */
 687                         arg->next = call->out_args;
 688                         call->out_args = arg;
 689                         if (i >= sig->hasthis) {
 690                                 ptype = sig->params [i - sig->hasthis];
 691                                 if (ptype->byref)
 692                                         type = MONO_TYPE_U;
 693                                 else
 694                                         type = ptype->type;
 695 handle_enum:
 696                                 /* FIXME: validate arguments... */
 697                                 switch (type) {
 698                                 case MONO_TYPE_I:
 699                                 case MONO_TYPE_U:
 700                                 case MONO_TYPE_BOOLEAN:
 701                                 case MONO_TYPE_CHAR:
 702                                 case MONO_TYPE_I1:
 703                                 case MONO_TYPE_U1:
 704                                 case MONO_TYPE_I2:
 705                                 case MONO_TYPE_U2:
 706                                 case MONO_TYPE_I4:
 707                                 case MONO_TYPE_U4:
 708                                 case MONO_TYPE_STRING:
 709                                 case MONO_TYPE_CLASS:
 710                                 case MONO_TYPE_OBJECT:
 711                                 case MONO_TYPE_PTR:
 712                                 case MONO_TYPE_FNPTR:
 713                                 case MONO_TYPE_ARRAY:
 714                                 case MONO_TYPE_SZARRAY:
 715                                         stack_size += 4;
 716                                         break;
 717                                 case MONO_TYPE_I8:
 718                                 case MONO_TYPE_U8:
 719                                         stack_size += 8;
 720                                         break;
 721                                 case MONO_TYPE_R4:
 722                                         stack_size += 4;
 723                                         arg->opcode = OP_OUTARG_R4;
 724                                         break;
 725                                 case MONO_TYPE_R8:
 726                                         stack_size += 8;
 727                                         arg->opcode = OP_OUTARG_R8;
 728                                         break;
 729                                 case MONO_TYPE_VALUETYPE:
 730                                         if (MONO_TYPE_ISSTRUCT (ptype)) {
 731                                                 int size;
 732                                                 if (sig->pinvoke)
 733                                                         size = mono_type_native_stack_size (&in->klass->byval_arg, NULL);
 734                                                 else
 735                                                         size = mono_type_stack_size (&in->klass->byval_arg, NULL);
 736
 737                                                 stack_size += size;
 738                                                 arg->opcode = OP_OUTARG_VT;
 739                                                 arg->klass = in->klass;
 740                                                 arg->unused = sig->pinvoke;
 741                                                 arg->inst_imm = size;
 742                                         } else {
 743                                                 type = ptype->data.klass->enum_basetype->type;
 744                                                 goto handle_enum;
 745                                         }
 746                                         break;
 747                                 case MONO_TYPE_TYPEDBYREF:
 748                                         stack_size += sizeof (MonoTypedRef);
 749                                         arg->opcode = OP_OUTARG_VT;
 750                                         arg->klass = in->klass;
 751                                         arg->unused = sig->pinvoke;
 752                                         arg->inst_imm = sizeof (MonoTypedRef);
 753                                         break;
 754                                 default:
 755                                         g_error ("unknown type 0x%02x in mono_arch_call_opcode\n", type);
 756                                 }
 757                         } else {
 758                                 /* the this argument */
 759                                 stack_size += 4;
 760                         }
 761                 }
 762         }
 763         /* if the function returns a struct, the called method already does a ret $0x4 */
 764         if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret))
 765                 stack_size -= 4;
 766         call->stack_usage = stack_size;
 767         /*
 768          * should set more info in call, such as the stack space
 769          * used by the args that needs to be added back to esp
 770          */
 771
 772         return call;
 773 }
 774
 775 /*
 776  * Allow tracing to work with this interface (with an optional argument)
 777  */
 778
 779 /*
 780  * This may be needed on some archs or for debugging support.
 781  */
 782 void
 783 mono_arch_instrument_mem_needs (MonoMethod *method, int *stack, int *code)
 784 {
 785         /* no stack room needed now (may be needed for FASTCALL-trace support) */
 786         *stack = 0;
 787         /* split prolog-epilog requirements? */
 788         *code = 50; /* max bytes needed: check this number */
 789 }
 790
 791 void*
 792 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
 793 {
 794         guchar *code = p;
 795
 796         /* if some args are passed in registers, we need to save them here */
 797         x86_push_reg (code, X86_EBP);
 798         mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, cfg->method);
 799         x86_push_imm (code, cfg->method);
 800         mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
 801         x86_call_code (code, 0);
 802         x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
 803
 804         return code;
 805 }
 806
 807 enum {
 808         SAVE_NONE,
 809         SAVE_STRUCT,
 810         SAVE_EAX,
 811         SAVE_EAX_EDX,
 812         SAVE_FP
 813 };
 814
 815 void*
 816 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
 817 {
 818         guchar *code = p;
 819         int arg_size = 0, save_mode = SAVE_NONE;
 820         MonoMethod *method = cfg->method;
 821         int rtype = method->signature->ret->type;
 822
 823 handle_enum:
 824         switch (rtype) {
 825         case MONO_TYPE_VOID:
 826                 /* special case string .ctor icall */
 827                 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
 828                         save_mode = SAVE_EAX;
 829                 else
 830                         save_mode = SAVE_NONE;
 831                 break;
 832         case MONO_TYPE_I8:
 833         case MONO_TYPE_U8:
 834                 save_mode = SAVE_EAX_EDX;
 835                 break;
 836         case MONO_TYPE_R4:
 837         case MONO_TYPE_R8:
 838                 save_mode = SAVE_FP;
 839                 break;
 840         case MONO_TYPE_VALUETYPE:
 841                 if (method->signature->ret->data.klass->enumtype) {
 842                         rtype = method->signature->ret->data.klass->enum_basetype->type;
 843                         goto handle_enum;
 844                 }
 845                 save_mode = SAVE_STRUCT;
 846                 break;
 847         default:
 848                 save_mode = SAVE_EAX;
 849                 break;
 850         }
 851
 852         switch (save_mode) {
 853         case SAVE_EAX_EDX:
 854                 x86_push_reg (code, X86_EDX);
 855                 x86_push_reg (code, X86_EAX);
 856                 if (enable_arguments) {
 857                         x86_push_reg (code, X86_EDX);
 858                         x86_push_reg (code, X86_EAX);
 859                         arg_size = 8;
 860                 }
 861                 break;
 862         case SAVE_EAX:
 863                 x86_push_reg (code, X86_EAX);
 864                 if (enable_arguments) {
 865                         x86_push_reg (code, X86_EAX);
 866                         arg_size = 4;
 867                 }
 868                 break;
 869         case SAVE_FP:
 870                 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
 871                 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
 872                 if (enable_arguments) {
 873                         x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
 874                         x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
 875                         arg_size = 8;
 876                 }
 877                 break;
 878         case SAVE_STRUCT:
 879                 if (enable_arguments) {
 880                         x86_push_membase (code, X86_EBP, 8);
 881                         arg_size = 4;
 882                 }
 883                 break;
 884         case SAVE_NONE:
 885         default:
 886                 break;
 887         }
 888
 889
 890         mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, method);
 891         x86_push_imm (code, method);
 892         mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
 893         x86_call_code (code, 0);
 894         x86_alu_reg_imm (code, X86_ADD, X86_ESP, arg_size + 4);
 895
 896         switch (save_mode) {
 897         case SAVE_EAX_EDX:
 898                 x86_pop_reg (code, X86_EAX);
 899                 x86_pop_reg (code, X86_EDX);
 900                 break;
 901         case SAVE_EAX:
 902                 x86_pop_reg (code, X86_EAX);
 903                 break;
 904         case SAVE_FP:
 905                 x86_fld_membase (code, X86_ESP, 0, TRUE);
 906                 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
 907                 break;
 908         case SAVE_NONE:
 909         default:
 910                 break;
 911         }
 912
 913         return code;
 914 }
 915
 916 #define EMIT_COND_BRANCH(ins,cond,sign) \
 917 if (ins->flags & MONO_INST_BRLABEL) { \
 918         if (ins->inst_i0->inst_c0) { \
 919                 x86_branch (code, cond, cfg->native_code + ins->inst_i0->inst_c0, sign); \
 920         } else { \
 921                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
 922                 x86_branch32 (code, cond, 0, sign); \
 923         } \
 924 } else { \
 925         if (ins->inst_true_bb->native_offset) { \
 926                 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
 927         } else { \
 928                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
 929                 if ((cfg->opt & MONO_OPT_BRANCH) && \
 930                     x86_is_imm8 (ins->inst_true_bb->max_offset - cpos)) \
 931                         x86_branch8 (code, cond, 0, sign); \
 932                 else \
 933                         x86_branch32 (code, cond, 0, sign); \
 934         } \
 935 }
 936
 937 /* emit an exception if condition is fail */
 938 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name)            \
 939         do {                                                        \
 940                 mono_add_patch_info (cfg, code - cfg->native_code,   \
 941                                     MONO_PATCH_INFO_EXC, exc_name);  \
 942                 x86_branch32 (code, cond, 0, signed);               \
 943         } while (0);
 944
 945 #define EMIT_FPCOMPARE(code) do { \
 946         x86_fcompp (code); \
 947         x86_fnstsw (code); \
 948 } while (0);
 949
 950 static void
 951 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
 952 {
 953         MonoInst *ins, *last_ins = NULL;
 954         ins = bb->code;
 955
 956         while (ins) {
 957
 958                 switch (ins->opcode) {
 959                 case OP_ICONST:
 960                         /* reg = 0 -> XOR (reg, reg) */
 961                         /* XOR sets cflags on x86, so we cant do it always */
 962                         if (ins->inst_c0 == 0 && ins->next &&
 963                             (ins->next->opcode == CEE_BR)) {
 964                                 ins->opcode = CEE_XOR;
 965                                 ins->sreg1 = ins->dreg;
 966                                 ins->sreg2 = ins->dreg;
 967                         }
 968                         break;
 969                 case OP_MUL_IMM:
 970                         /* remove unnecessary multiplication with 1 */
 971                         if (ins->inst_imm == 1) {
 972                                 if (ins->dreg != ins->sreg1) {
 973                                         ins->opcode = OP_MOVE;
 974                                 } else {
 975                                         last_ins->next = ins->next;
 976                                         ins = ins->next;
 977                                         continue;
 978                                 }
 979                         }
 980                         break;
 981                 case OP_COMPARE_IMM:
 982                         /* OP_COMPARE_IMM (reg, 0) --> OP_X86_TEST_NULL (reg) */
 983                         if (ins->inst_imm == 0 && ins->next &&
 984                             (ins->next->opcode == CEE_BEQ || ins->next->opcode == CEE_BNE_UN ||
 985                              ins->next->opcode == OP_CEQ)) {
 986                                 ins->opcode = OP_X86_TEST_NULL;
 987                         }
 988                         break;
 989                 case OP_LOAD_MEMBASE:
 990                 case OP_LOADI4_MEMBASE:
 991                         /*
 992                          * OP_STORE_MEMBASE_REG reg, offset(basereg)
 993                          * OP_LOAD_MEMBASE offset(basereg), reg
 994                          */
 995                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
 996                                          || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
 997                             ins->inst_basereg == last_ins->inst_destbasereg &&
 998                             ins->inst_offset == last_ins->inst_offset) {
 999                                 if (ins->dreg == last_ins->sreg1) {
1000                                         last_ins->next = ins->next;
1001                                         ins = ins->next;
1002                                         continue;
1003                                 } else {
1004                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1005                                         ins->opcode = OP_MOVE;
1006                                         ins->sreg1 = last_ins->sreg1;
1007                                 }
1008
1009                         /*
1010                          * Note: reg1 must be different from the basereg in the second load
1011                          * OP_LOAD_MEMBASE offset(basereg), reg1
1012                          * OP_LOAD_MEMBASE offset(basereg), reg2
1013                          * -->
1014                          * OP_LOAD_MEMBASE offset(basereg), reg1
1015                          * OP_MOVE reg1, reg2
1016                          */
1017                         } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1018                                            || last_ins->opcode == OP_LOAD_MEMBASE) &&
1019                               ins->inst_basereg != last_ins->dreg &&
1020                               ins->inst_basereg == last_ins->inst_basereg &&
1021                               ins->inst_offset == last_ins->inst_offset) {
1022
1023                                 if (ins->dreg == last_ins->dreg) {
1024                                         last_ins->next = ins->next;
1025                                         ins = ins->next;
1026                                         continue;
1027                                 } else {
1028                                         ins->opcode = OP_MOVE;
1029                                         ins->sreg1 = last_ins->dreg;
1030                                 }
1031
1032                                 //g_assert_not_reached ();
1033
1034 #if 0
1035                         /*
1036                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1037                          * OP_LOAD_MEMBASE offset(basereg), reg
1038                          * -->
1039                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1040                          * OP_ICONST reg, imm
1041                          */
1042                         } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1043                                                 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1044                                    ins->inst_basereg == last_ins->inst_destbasereg &&
1045                                    ins->inst_offset == last_ins->inst_offset) {
1046                                 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1047                                 ins->opcode = OP_ICONST;
1048                                 ins->inst_c0 = last_ins->inst_imm;
1049                                 g_assert_not_reached (); // check this rule
1050 #endif
1051                         }
1052                         break;
1053                 case OP_LOADU1_MEMBASE:
1054                 case OP_LOADI1_MEMBASE:
1055                   /*
1056                    * FIXME: Missing explanation
1057                    */
1058                         if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1059                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1060                                         ins->inst_offset == last_ins->inst_offset) {
1061                                 if (ins->dreg == last_ins->sreg1) {
1062                                         last_ins->next = ins->next;
1063                                         ins = ins->next;
1064                                         continue;
1065                                 } else {
1066                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1067                                         ins->opcode = OP_MOVE;
1068                                         ins->sreg1 = last_ins->sreg1;
1069                                 }
1070                         }
1071                         break;
1072                 case OP_LOADU2_MEMBASE:
1073                 case OP_LOADI2_MEMBASE:
1074                   /*
1075                    * FIXME: Missing explanation
1076                    */
1077                         if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1078                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1079                                         ins->inst_offset == last_ins->inst_offset) {
1080                                 if (ins->dreg == last_ins->sreg1) {
1081                                         last_ins->next = ins->next;
1082                                         ins = ins->next;
1083                                         continue;
1084                                 } else {
1085                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1086                                         ins->opcode = OP_MOVE;
1087                                         ins->sreg1 = last_ins->sreg1;
1088                                 }
1089                         }
1090                         break;
1091                 case CEE_CONV_I4:
1092                 case CEE_CONV_U4:
1093                 case OP_MOVE:
1094                         /*
1095                          * OP_MOVE reg, reg
1096                          */
1097                         if (ins->dreg == ins->sreg1) {
1098                                 if (last_ins)
1099                                         last_ins->next = ins->next;
1100                                 ins = ins->next;
1101                                 continue;
1102                         }
1103                         /*
1104                          * OP_MOVE sreg, dreg
1105                          * OP_MOVE dreg, sreg
1106                          */
1107                         if (last_ins && last_ins->opcode == OP_MOVE &&
1108                             ins->sreg1 == last_ins->dreg &&
1109                             ins->dreg == last_ins->sreg1) {
1110                                 last_ins->next = ins->next;
1111                                 ins = ins->next;
1112                                 continue;
1113                         }
1114                         break;
1115                 }
1116                 last_ins = ins;
1117                 ins = ins->next;
1118         }
1119         bb->last_ins = last_ins;
1120 }
1121
1122 static const int
1123 branch_cc_table [] = {
1124         X86_CC_EQ, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1125         X86_CC_NE, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1126         X86_CC_O, X86_CC_NO, X86_CC_C, X86_CC_NC
1127 };
1128
1129 #define DEBUG(a) if (cfg->verbose_level > 1) a
1130 //#define DEBUG(a)
1131 #define reg_is_freeable(r) ((r) >= 0 && (r) <= 7 && X86_IS_CALLEE ((r)))
1132
1133 typedef struct {
1134         int born_in;
1135         int killed_in;
1136         int last_use;
1137         int prev_use;
1138 } RegTrack;
1139
1140 static const char*const * ins_spec = pentium_desc;
1141
1142 static void
1143 print_ins (int i, MonoInst *ins)
1144 {
1145         const char *spec = ins_spec [ins->opcode];
1146         g_print ("\t%-2d %s", i, mono_inst_name (ins->opcode));
1147         if (spec [MONO_INST_DEST]) {
1148                 if (ins->dreg >= MONO_MAX_IREGS)
1149                         g_print (" R%d <-", ins->dreg);
1150                 else
1151                         g_print (" %s <-", mono_arch_regname (ins->dreg));
1152         }
1153         if (spec [MONO_INST_SRC1]) {
1154                 if (ins->sreg1 >= MONO_MAX_IREGS)
1155                         g_print (" R%d", ins->sreg1);
1156                 else
1157                         g_print (" %s", mono_arch_regname (ins->sreg1));
1158         }
1159         if (spec [MONO_INST_SRC2]) {
1160                 if (ins->sreg2 >= MONO_MAX_IREGS)
1161                         g_print (" R%d", ins->sreg2);
1162                 else
1163                         g_print (" %s", mono_arch_regname (ins->sreg2));
1164         }
1165         if (spec [MONO_INST_CLOB])
1166                 g_print (" clobbers: %c", spec [MONO_INST_CLOB]);
1167         g_print ("\n");
1168 }
1169
1170 static void
1171 print_regtrack (RegTrack *t, int num)
1172 {
1173         int i;
1174         char buf [32];
1175         const char *r;
1176
1177         for (i = 0; i < num; ++i) {
1178                 if (!t [i].born_in)
1179                         continue;
1180                 if (i >= MONO_MAX_IREGS) {
1181                         g_snprintf (buf, sizeof(buf), "R%d", i);
1182                         r = buf;
1183                 } else
1184                         r = mono_arch_regname (i);
1185                 g_print ("liveness: %s [%d - %d]\n", r, t [i].born_in, t[i].last_use);
1186         }
1187 }
1188
1189 typedef struct InstList InstList;
1190
1191 struct InstList {
1192         InstList *prev;
1193         InstList *next;
1194         MonoInst *data;
1195 };
1196
1197 static inline InstList*
1198 inst_list_prepend (MonoMemPool *pool, InstList *list, MonoInst *data)
1199 {
1200         InstList *item = mono_mempool_alloc (pool, sizeof (InstList));
1201         item->data = data;
1202         item->prev = NULL;
1203         item->next = list;
1204         if (list)
1205                 list->prev = item;
1206         return item;
1207 }
1208
1209 /*
1210  * Force the spilling of the variable in the symbolic register 'reg'.
1211  */
1212 static int
1213 get_register_force_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, int reg)
1214 {
1215         MonoInst *load;
1216         int i, sel, spill;
1217
1218         sel = cfg->rs->iassign [reg];
1219         /*i = cfg->rs->isymbolic [sel];
1220         g_assert (i == reg);*/
1221         i = reg;
1222         spill = ++cfg->spill_count;
1223         cfg->rs->iassign [i] = -spill - 1;
1224         mono_regstate_free_int (cfg->rs, sel);
1225         /* we need to create a spill var and insert a load to sel after the current instruction */
1226         MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1227         load->dreg = sel;
1228         load->inst_basereg = X86_EBP;
1229         load->inst_offset = mono_spillvar_offset (cfg, spill);
1230         if (item->prev) {
1231                 while (ins->next != item->prev->data)
1232                         ins = ins->next;
1233         }
1234         load->next = ins->next;
1235         ins->next = load;
1236         DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%ebp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1237         i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1238         g_assert (i == sel);
1239
1240         return sel;
1241 }
1242
1243 static int
1244 get_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, guint32 regmask, int reg)
1245 {
1246         MonoInst *load;
1247         int i, sel, spill;
1248
1249         DEBUG (g_print ("start regmask to assign R%d: 0x%08x (R%d <- R%d R%d)\n", reg, regmask, ins->dreg, ins->sreg1, ins->sreg2));
1250         /* exclude the registers in the current instruction */
1251         if (reg != ins->sreg1 && (reg_is_freeable (ins->sreg1) || (ins->sreg1 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg1] >= 0))) {
1252                 if (ins->sreg1 >= MONO_MAX_IREGS)
1253                         regmask &= ~ (1 << cfg->rs->iassign [ins->sreg1]);
1254                 else
1255                         regmask &= ~ (1 << ins->sreg1);
1256                 DEBUG (g_print ("excluding sreg1 %s\n", mono_arch_regname (ins->sreg1)));
1257         }
1258         if (reg != ins->sreg2 && (reg_is_freeable (ins->sreg2) || (ins->sreg2 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg2] >= 0))) {
1259                 if (ins->sreg2 >= MONO_MAX_IREGS)
1260                         regmask &= ~ (1 << cfg->rs->iassign [ins->sreg2]);
1261                 else
1262                         regmask &= ~ (1 << ins->sreg2);
1263                 DEBUG (g_print ("excluding sreg2 %s %d\n", mono_arch_regname (ins->sreg2), ins->sreg2));
1264         }
1265         if (reg != ins->dreg && reg_is_freeable (ins->dreg)) {
1266                 regmask &= ~ (1 << ins->dreg);
1267                 DEBUG (g_print ("excluding dreg %s\n", mono_arch_regname (ins->dreg)));
1268         }
1269
1270         DEBUG (g_print ("available regmask: 0x%08x\n", regmask));
1271         g_assert (regmask); /* need at least a register we can free */
1272         sel = -1;
1273         /* we should track prev_use and spill the register that's farther */
1274         for (i = 0; i < MONO_MAX_IREGS; ++i) {
1275                 if (regmask & (1 << i)) {
1276                         sel = i;
1277                         DEBUG (g_print ("selected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->iassign [sel]));
1278                         break;
1279                 }
1280         }
1281         i = cfg->rs->isymbolic [sel];
1282         spill = ++cfg->spill_count;
1283         cfg->rs->iassign [i] = -spill - 1;
1284         mono_regstate_free_int (cfg->rs, sel);
1285         /* we need to create a spill var and insert a load to sel after the current instruction */
1286         MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1287         load->dreg = sel;
1288         load->inst_basereg = X86_EBP;
1289         load->inst_offset = mono_spillvar_offset (cfg, spill);
1290         if (item->prev) {
1291                 while (ins->next != item->prev->data)
1292                         ins = ins->next;
1293         }
1294         load->next = ins->next;
1295         ins->next = load;
1296         DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%ebp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1297         i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1298         g_assert (i == sel);
1299
1300         return sel;
1301 }
1302
1303 static MonoInst*
1304 create_copy_ins (MonoCompile *cfg, int dest, int src, MonoInst *ins)
1305 {
1306         MonoInst *copy;
1307         MONO_INST_NEW (cfg, copy, OP_MOVE);
1308         copy->dreg = dest;
1309         copy->sreg1 = src;
1310         if (ins) {
1311                 copy->next = ins->next;
1312                 ins->next = copy;
1313         }
1314         DEBUG (g_print ("\tforced copy from %s to %s\n", mono_arch_regname (src), mono_arch_regname (dest)));
1315         return copy;
1316 }
1317
1318 static MonoInst*
1319 create_spilled_store (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins)
1320 {
1321         MonoInst *store;
1322         MONO_INST_NEW (cfg, store, OP_STORE_MEMBASE_REG);
1323         store->sreg1 = reg;
1324         store->inst_destbasereg = X86_EBP;
1325         store->inst_offset = mono_spillvar_offset (cfg, spill);
1326         if (ins) {
1327                 store->next = ins->next;
1328                 ins->next = store;
1329         }
1330         DEBUG (g_print ("SPILLED STORE (%d at 0x%08x(%%ebp)) R%d (from %s)\n", spill, store->inst_offset, prev_reg, mono_arch_regname (reg)));
1331         return store;
1332 }
1333
1334 static void
1335 insert_before_ins (MonoInst *ins, InstList *item, MonoInst* to_insert)
1336 {
1337         MonoInst *prev;
1338         if (item->next) {
1339                 prev = item->next->data;
1340
1341                 while (prev->next != ins)
1342                         prev = prev->next;
1343                 to_insert->next = ins;
1344                 prev->next = to_insert;
1345         } else {
1346                 to_insert->next = ins;
1347         }
1348         /*
1349          * needed otherwise in the next instruction we can add an ins to the
1350          * end and that would get past this instruction.
1351          */
1352         item->data = to_insert;
1353 }
1354
1355 #if  0
1356 static int
1357 alloc_int_reg (MonoCompile *cfg, InstList *curinst, MonoInst *ins, int sym_reg, guint32 allow_mask)
1358 {
1359         int val = cfg->rs->iassign [sym_reg];
1360         if (val < 0) {
1361                 int spill = 0;
1362                 if (val < -1) {
1363                         /* the register gets spilled after this inst */
1364                         spill = -val -1;
1365                 }
1366                 val = mono_regstate_alloc_int (cfg->rs, allow_mask);
1367                 if (val < 0)
1368                         val = get_register_spilling (cfg, curinst, ins, allow_mask, sym_reg);
1369                 cfg->rs->iassign [sym_reg] = val;
1370                 /* add option to store before the instruction for src registers */
1371                 if (spill)
1372                         create_spilled_store (cfg, spill, val, sym_reg, ins);
1373         }
1374         cfg->rs->isymbolic [val] = sym_reg;
1375         return val;
1376 }
1377 #endif
1378
1379 /*#include "cprop.c"*/
1380
1381 /*
1382  * Local register allocation.
1383  * We first scan the list of instructions and we save the liveness info of
1384  * each register (when the register is first used, when it's value is set etc.).
1385  * We also reverse the list of instructions (in the InstList list) because assigning
1386  * registers backwards allows for more tricks to be used.
1387  */
1388 void
1389 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1390 {
1391         MonoInst *ins;
1392         MonoRegState *rs = cfg->rs;
1393         int i, val, fpcount;
1394         RegTrack *reginfo, *reginfof;
1395         RegTrack *reginfo1, *reginfo2, *reginfod;
1396         InstList *tmp, *reversed = NULL;
1397         const char *spec;
1398         guint32 src1_mask, src2_mask, dest_mask;
1399
1400         if (!bb->code)
1401                 return;
1402         rs->next_vireg = bb->max_ireg;
1403         rs->next_vfreg = bb->max_freg;
1404         mono_regstate_assign (rs);
1405         reginfo = mono_mempool_alloc0 (cfg->mempool, sizeof (RegTrack) * rs->next_vireg);
1406         reginfof = mono_mempool_alloc0 (cfg->mempool, sizeof (RegTrack) * rs->next_vfreg);
1407         rs->ifree_mask = X86_CALLEE_REGS;
1408
1409         ins = bb->code;
1410
1411         /*if (cfg->opt & MONO_OPT_COPYPROP)
1412                 local_copy_prop (cfg, ins);*/
1413
1414         i = 1;
1415         fpcount = 0; /* FIXME: track fp stack utilization */
1416         DEBUG (g_print ("LOCAL regalloc: basic block: %d\n", bb->block_num));
1417         /* forward pass on the instructions to collect register liveness info */
1418         while (ins) {
1419                 spec = ins_spec [ins->opcode];
1420                 DEBUG (print_ins (i, ins));
1421                 if (spec [MONO_INST_SRC1]) {
1422                         if (spec [MONO_INST_SRC1] == 'f')
1423                                 reginfo1 = reginfof;
1424                         else
1425                                 reginfo1 = reginfo;
1426                         reginfo1 [ins->sreg1].prev_use = reginfo1 [ins->sreg1].last_use;
1427                         reginfo1 [ins->sreg1].last_use = i;
1428                 } else {
1429                         ins->sreg1 = -1;
1430                 }
1431                 if (spec [MONO_INST_SRC2]) {
1432                         if (spec [MONO_INST_SRC2] == 'f')
1433                                 reginfo2 = reginfof;
1434                         else
1435                                 reginfo2 = reginfo;
1436                         reginfo2 [ins->sreg2].prev_use = reginfo2 [ins->sreg2].last_use;
1437                         reginfo2 [ins->sreg2].last_use = i;
1438                 } else {
1439                         ins->sreg2 = -1;
1440                 }
1441                 if (spec [MONO_INST_DEST]) {
1442                         if (spec [MONO_INST_DEST] == 'f')
1443                                 reginfod = reginfof;
1444                         else
1445                                 reginfod = reginfo;
1446                         if (spec [MONO_INST_DEST] != 'b') /* it's not just a base register */
1447                                 reginfod [ins->dreg].killed_in = i;
1448                         reginfod [ins->dreg].prev_use = reginfod [ins->dreg].last_use;
1449                         reginfod [ins->dreg].last_use = i;
1450                         if (reginfod [ins->dreg].born_in == 0 || reginfod [ins->dreg].born_in > i)
1451                                 reginfod [ins->dreg].born_in = i;
1452                         if (spec [MONO_INST_DEST] == 'l') {
1453                                 /* result in eax:edx, the virtual register is allocated sequentially */
1454                                 reginfod [ins->dreg + 1].prev_use = reginfod [ins->dreg + 1].last_use;
1455                                 reginfod [ins->dreg + 1].last_use = i;
1456                                 if (reginfod [ins->dreg + 1].born_in == 0 || reginfod [ins->dreg + 1].born_in > i)
1457                                         reginfod [ins->dreg + 1].born_in = i;
1458                         }
1459                 } else {
1460                         ins->dreg = -1;
1461                 }
1462                 reversed = inst_list_prepend (cfg->mempool, reversed, ins);
1463                 ++i;
1464                 ins = ins->next;
1465         }
1466
1467         DEBUG (print_regtrack (reginfo, rs->next_vireg));
1468         DEBUG (print_regtrack (reginfof, rs->next_vfreg));
1469         tmp = reversed;
1470         while (tmp) {
1471                 int prev_dreg, prev_sreg1, prev_sreg2;
1472                 dest_mask = src1_mask = src2_mask = X86_CALLEE_REGS;
1473                 --i;
1474                 ins = tmp->data;
1475                 spec = ins_spec [ins->opcode];
1476                 DEBUG (g_print ("processing:"));
1477                 DEBUG (print_ins (i, ins));
1478                 if (spec [MONO_INST_CLOB] == 's') {
1479                         if (rs->ifree_mask & (1 << X86_ECX)) {
1480                                 DEBUG (g_print ("\tshortcut assignment of R%d to ECX\n", ins->sreg2));
1481                                 rs->iassign [ins->sreg2] = X86_ECX;
1482                                 rs->isymbolic [X86_ECX] = ins->sreg2;
1483                                 ins->sreg2 = X86_ECX;
1484                                 rs->ifree_mask &= ~ (1 << X86_ECX);
1485                         } else {
1486                                 int need_ecx_spill = TRUE;
1487                                 /*
1488                                  * we first check if src1/dreg is already assigned a register
1489                                  * and then we force a spill of the var assigned to ECX.
1490                                  */
1491                                 /* the destination register can't be ECX */
1492                                 dest_mask &= ~ (1 << X86_ECX);
1493                                 src1_mask &= ~ (1 << X86_ECX);
1494                                 val = rs->iassign [ins->dreg];
1495                                 /*
1496                                  * the destination register is already assigned to ECX:
1497                                  * we need to allocate another register for it and then
1498                                  * copy from this to ECX.
1499                                  */
1500                                 if (val == X86_ECX && ins->dreg != ins->sreg2) {
1501                                         int new_dest = mono_regstate_alloc_int (rs, dest_mask);
1502                                         if (new_dest < 0)
1503                                                 new_dest = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1504                                         g_assert (new_dest >= 0);
1505                                         ins->dreg = new_dest;
1506                                         create_copy_ins (cfg, X86_ECX, new_dest, ins);
1507                                         need_ecx_spill = FALSE;
1508                                         /*DEBUG (g_print ("\tforced spill of R%d\n", ins->dreg));
1509                                         val = get_register_force_spilling (cfg, tmp, ins, ins->dreg);
1510                                         rs->iassign [ins->dreg] = val;
1511                                         rs->isymbolic [val] = prev_dreg;
1512                                         ins->dreg = val;*/
1513                                 }
1514                                 val = rs->iassign [ins->sreg1];
1515                                 if (val == X86_ECX) {
1516                                         g_assert_not_reached ();
1517                                 } else if (val >= 0) {
1518                                         /*
1519                                          * the first src reg was already assigned to a register,
1520                                          * we need to copy it to the dest register because the
1521                                          * shift instruction clobbers the first operand.
1522                                          */
1523                                         MonoInst *copy = create_copy_ins (cfg, ins->dreg, val, NULL);
1524                                         insert_before_ins (ins, tmp, copy);
1525                                 }
1526                                 val = rs->iassign [ins->sreg2];
1527                                 if (val >= 0 && val != X86_ECX) {
1528                                         MonoInst *move = create_copy_ins (cfg, X86_ECX, val, NULL);
1529                                         DEBUG (g_print ("\tmoved arg from R%d (%d) to ECX\n", val, ins->sreg2));
1530                                         move->next = ins;
1531                                         g_assert_not_reached ();
1532                                         /* FIXME: where is move connected to the instruction list? */
1533                                         //tmp->prev->data->next = move;
1534                                 }
1535                                 if (need_ecx_spill && !(rs->ifree_mask & (1 << X86_ECX))) {
1536                                         DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_ECX]));
1537                                         get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_ECX]);
1538                                         mono_regstate_free_int (rs, X86_ECX);
1539                                 }
1540                                 /* force-set sreg2 */
1541                                 rs->iassign [ins->sreg2] = X86_ECX;
1542                                 rs->isymbolic [X86_ECX] = ins->sreg2;
1543                                 ins->sreg2 = X86_ECX;
1544                                 rs->ifree_mask &= ~ (1 << X86_ECX);
1545                         }
1546                 } else if (spec [MONO_INST_CLOB] == 'd') { /* division */
1547                         int dest_reg = X86_EAX;
1548                         int clob_reg = X86_EDX;
1549                         if (spec [MONO_INST_DEST] == 'd') {
1550                                 dest_reg = X86_EDX; /* reminder */
1551                                 clob_reg = X86_EAX;
1552                         }
1553                         val = rs->iassign [ins->dreg];
1554                         if (0 && val >= 0 && val != dest_reg && !(rs->ifree_mask & (1 << dest_reg))) {
1555                                 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [dest_reg]));
1556                                 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [dest_reg]);
1557                                 mono_regstate_free_int (rs, dest_reg);
1558                         }
1559                         if (val < 0) {
1560                                 if (val < -1) {
1561                                         /* the register gets spilled after this inst */
1562                                         int spill = -val -1;
1563                                         dest_mask = 1 << clob_reg;
1564                                         prev_dreg = ins->dreg;
1565                                         val = mono_regstate_alloc_int (rs, dest_mask);
1566                                         if (val < 0)
1567                                                 val = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1568                                         rs->iassign [ins->dreg] = val;
1569                                         if (spill)
1570                                                 create_spilled_store (cfg, spill, val, prev_dreg, ins);
1571                                         DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
1572                                         rs->isymbolic [val] = prev_dreg;
1573                                         ins->dreg = val;
1574                                         if (val != dest_reg) { /* force a copy */
1575                                                 create_copy_ins (cfg, val, dest_reg, ins);
1576                                         }
1577                                 } else {
1578                                         DEBUG (g_print ("\tshortcut assignment of R%d to %s\n", ins->dreg, mono_arch_regname (dest_reg)));
1579                                         rs->iassign [ins->dreg] = dest_reg;
1580                                         rs->isymbolic [dest_reg] = ins->dreg;
1581                                         ins->dreg = dest_reg;
1582                                         rs->ifree_mask &= ~ (1 << dest_reg);
1583                                 }
1584                         } else {
1585                                 //DEBUG (g_print ("dest reg in div assigned: %s\n", mono_arch_regname (val)));
1586                                 if (val != dest_reg) { /* force a copy */
1587                                         create_copy_ins (cfg, val, dest_reg, ins);
1588                                         if (!(rs->ifree_mask & (1 << dest_reg)) && rs->isymbolic [dest_reg] >= MONO_MAX_IREGS) {
1589                                                 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [dest_reg]));
1590                                                 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [dest_reg]);
1591                                                 mono_regstate_free_int (rs, dest_reg);
1592                                         }
1593                                 }
1594                         }
1595                         src1_mask = 1 << X86_EAX;
1596                         src2_mask = 1 << X86_ECX;
1597                 }
1598                 if (spec [MONO_INST_DEST] == 'l') {
1599                         if (!(rs->ifree_mask & (1 << X86_EAX))) {
1600                                 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_EAX]));
1601                                 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_EAX]);
1602                                 mono_regstate_free_int (rs, X86_EAX);
1603                         }
1604                         if (!(rs->ifree_mask & (1 << X86_EDX))) {
1605                                 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_EDX]));
1606                                 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_EDX]);
1607                                 mono_regstate_free_int (rs, X86_EDX);
1608                         }
1609                 }
1610                 /* update for use with FP regs... */
1611                 if (spec [MONO_INST_DEST] != 'f' && ins->dreg >= MONO_MAX_IREGS) {
1612                         val = rs->iassign [ins->dreg];
1613                         prev_dreg = ins->dreg;
1614                         if (val < 0) {
1615                                 int spill = 0;
1616                                 if (val < -1) {
1617                                         /* the register gets spilled after this inst */
1618                                         spill = -val -1;
1619                                 }
1620                                 val = mono_regstate_alloc_int (rs, dest_mask);
1621                                 if (val < 0)
1622                                         val = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1623                                 rs->iassign [ins->dreg] = val;
1624                                 if (spill)
1625                                         create_spilled_store (cfg, spill, val, prev_dreg, ins);
1626                         }
1627                         DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
1628                         rs->isymbolic [val] = prev_dreg;
1629                         ins->dreg = val;
1630                         if (spec [MONO_INST_DEST] == 'l') {
1631                                 int hreg = prev_dreg + 1;
1632                                 val = rs->iassign [hreg];
1633                                 if (val < 0) {
1634                                         int spill = 0;
1635                                         if (val < -1) {
1636                                                 /* the register gets spilled after this inst */
1637                                                 spill = -val -1;
1638                                         }
1639                                         val = mono_regstate_alloc_int (rs, dest_mask);
1640                                         if (val < 0)
1641                                                 val = get_register_spilling (cfg, tmp, ins, dest_mask, hreg);
1642                                         rs->iassign [hreg] = val;
1643                                         if (spill)
1644                                                 create_spilled_store (cfg, spill, val, hreg, ins);
1645                                 }
1646                                 DEBUG (g_print ("\tassigned hreg %s to dest R%d\n", mono_arch_regname (val), hreg));
1647                                 rs->isymbolic [val] = hreg;
1648                                 /* FIXME:? ins->dreg = val; */
1649                                 if (ins->dreg == X86_EAX) {
1650                                         if (val != X86_EDX)
1651                                                 create_copy_ins (cfg, val, X86_EDX, ins);
1652                                 } else if (ins->dreg == X86_EDX) {
1653                                         if (val == X86_EAX) {
1654                                                 /* swap */
1655                                                 g_assert_not_reached ();
1656                                         } else {
1657                                                 /* two forced copies */
1658                                                 create_copy_ins (cfg, val, X86_EDX, ins);
1659                                                 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
1660                                         }
1661                                 } else {
1662                                         if (val == X86_EDX) {
1663                                                 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
1664                                         } else {
1665                                                 /* two forced copies */
1666                                                 create_copy_ins (cfg, val, X86_EDX, ins);
1667                                                 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
1668                                         }
1669                                 }
1670                                 if (reg_is_freeable (val) && hreg >= 0 && reginfo [hreg].born_in >= i) {
1671                                         DEBUG (g_print ("\tfreeable %s (R%d)\n", mono_arch_regname (val), hreg));
1672                                         mono_regstate_free_int (rs, val);
1673                                 }
1674                         } else if (spec [MONO_INST_DEST] == 'a' && ins->dreg != X86_EAX && spec [MONO_INST_CLOB] != 'd') {
1675                                 /* this instruction only outputs to EAX, need to copy */
1676                                 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
1677                         } else if (spec [MONO_INST_DEST] == 'd' && ins->dreg != X86_EDX && spec [MONO_INST_CLOB] != 'd') {
1678                                 create_copy_ins (cfg, ins->dreg, X86_EDX, ins);
1679                         }
1680                 } else {
1681                         prev_dreg = -1;
1682                 }
1683                 if (spec [MONO_INST_DEST] != 'f' && reg_is_freeable (ins->dreg) && prev_dreg >= 0 && reginfo [prev_dreg].born_in >= i) {
1684                         DEBUG (g_print ("\tfreeable %s (R%d) (born in %d)\n", mono_arch_regname (ins->dreg), prev_dreg, reginfo [prev_dreg].born_in));
1685                         mono_regstate_free_int (rs, ins->dreg);
1686                 }
1687                 /* put src1 in EAX if it needs to be */
1688                 if (spec [MONO_INST_SRC1] == 'a') {
1689                         if (!(rs->ifree_mask & (1 << X86_EAX))) {
1690                                 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_EAX]));
1691                                 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_EAX]);
1692                                 mono_regstate_free_int (rs, X86_EAX);
1693                         }
1694                         /* force-set sreg1 */
1695                         rs->iassign [ins->sreg1] = X86_EAX;
1696                         rs->isymbolic [X86_EAX] = ins->sreg1;
1697                         ins->sreg1 = X86_EAX;
1698                         rs->ifree_mask &= ~ (1 << X86_EAX);
1699                 }
1700                 if (spec [MONO_INST_SRC1] != 'f' && ins->sreg1 >= MONO_MAX_IREGS) {
1701                         val = rs->iassign [ins->sreg1];
1702                         prev_sreg1 = ins->sreg1;
1703                         if (val < 0) {
1704                                 int spill = 0;
1705                                 if (val < -1) {
1706                                         /* the register gets spilled after this inst */
1707                                         spill = -val -1;
1708                                 }
1709                                 if (0 && ins->opcode == OP_MOVE) {
1710                                         /*
1711                                          * small optimization: the dest register is already allocated
1712                                          * but the src one is not: we can simply assign the same register
1713                                          * here and peephole will get rid of the instruction later.
1714                                          * This optimization may interfere with the clobbering handling:
1715                                          * it removes a mov operation that will be added again to handle clobbering.
1716                                          * There are also some other issues that should with make testjit.
1717                                          */
1718                                         mono_regstate_alloc_int (rs, 1 << ins->dreg);
1719                                         val = rs->iassign [ins->sreg1] = ins->dreg;
1720                                         //g_assert (val >= 0);
1721                                         DEBUG (g_print ("\tfast assigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1722                                 } else {
1723                                         //g_assert (val == -1); /* source cannot be spilled */
1724                                         val = mono_regstate_alloc_int (rs, src1_mask);
1725                                         if (val < 0)
1726                                                 val = get_register_spilling (cfg, tmp, ins, src1_mask, ins->sreg1);
1727                                         rs->iassign [ins->sreg1] = val;
1728                                         DEBUG (g_print ("\tassigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1729                                 }
1730                                 if (spill) {
1731                                         MonoInst *store = create_spilled_store (cfg, spill, val, prev_sreg1, NULL);
1732                                         insert_before_ins (ins, tmp, store);
1733                                 }
1734                         }
1735                         rs->isymbolic [val] = prev_sreg1;
1736                         ins->sreg1 = val;
1737                 } else {
1738                         prev_sreg1 = -1;
1739                 }
1740                 /* handle clobbering of sreg1 */
1741                 if ((spec [MONO_INST_CLOB] == '1' || spec [MONO_INST_CLOB] == 's') && ins->dreg != ins->sreg1) {
1742                         MonoInst *copy = create_copy_ins (cfg, ins->dreg, ins->sreg1, NULL);
1743                         DEBUG (g_print ("\tneed to copy sreg1 %s to dreg %s\n", mono_arch_regname (ins->sreg1), mono_arch_regname (ins->dreg)));
1744                         if (ins->sreg2 == -1 || spec [MONO_INST_CLOB] == 's') {
1745                                 /* note: the copy is inserted before the current instruction! */
1746                                 insert_before_ins (ins, tmp, copy);
1747                                 /* we set sreg1 to dest as well */
1748                                 prev_sreg1 = ins->sreg1 = ins->dreg;
1749                         } else {
1750                                 /* inserted after the operation */
1751                                 copy->next = ins->next;
1752                                 ins->next = copy;
1753                         }
1754                 }
1755                 if (spec [MONO_INST_SRC2] != 'f' && ins->sreg2 >= MONO_MAX_IREGS) {
1756                         val = rs->iassign [ins->sreg2];
1757                         prev_sreg2 = ins->sreg2;
1758                         if (val < 0) {
1759                                 int spill = 0;
1760                                 if (val < -1) {
1761                                         /* the register gets spilled after this inst */
1762                                         spill = -val -1;
1763                                 }
1764                                 val = mono_regstate_alloc_int (rs, src2_mask);
1765                                 if (val < 0)
1766                                         val = get_register_spilling (cfg, tmp, ins, src2_mask, ins->sreg2);
1767                                 rs->iassign [ins->sreg2] = val;
1768                                 DEBUG (g_print ("\tassigned sreg2 %s to R%d\n", mono_arch_regname (val), ins->sreg2));
1769                                 if (spill)
1770                                         create_spilled_store (cfg, spill, val, prev_sreg2, ins);
1771                         }
1772                         rs->isymbolic [val] = prev_sreg2;
1773                         ins->sreg2 = val;
1774                         if (spec [MONO_INST_CLOB] == 's' && ins->sreg2 != X86_ECX) {
1775                                 DEBUG (g_print ("\tassigned sreg2 %s to R%d, but ECX is needed (R%d)\n", mono_arch_regname (val), ins->sreg2, rs->iassign [X86_ECX]));
1776                         }
1777                 } else {
1778                         prev_sreg2 = -1;
1779                 }
1780
1781                 if (spec [MONO_INST_CLOB] == 'c') {
1782                         int j, s;
1783                         guint32 clob_mask = X86_CALLEE_REGS;
1784                         for (j = 0; j < MONO_MAX_IREGS; ++j) {
1785                                 s = 1 << j;
1786                                 if ((clob_mask & s) && !(rs->ifree_mask & s) && j != ins->sreg1) {
1787                                         //g_warning ("register %s busy at call site\n", mono_arch_regname (j));
1788                                 }
1789                         }
1790                 }
1791                 /*if (reg_is_freeable (ins->sreg1) && prev_sreg1 >= 0 && reginfo [prev_sreg1].born_in >= i) {
1792                         DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg1)));
1793                         mono_regstate_free_int (rs, ins->sreg1);
1794                 }
1795                 if (reg_is_freeable (ins->sreg2) && prev_sreg2 >= 0 && reginfo [prev_sreg2].born_in >= i) {
1796                         DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg2)));
1797                         mono_regstate_free_int (rs, ins->sreg2);
1798                 }*/
1799
1800                 //DEBUG (print_ins (i, ins));
1801                 /* this may result from a insert_before call */
1802                 if (!tmp->next)
1803                         bb->code = tmp->data;
1804                 tmp = tmp->next;
1805         }
1806 }
1807
1808 static unsigned char*
1809 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int size, gboolean is_signed)
1810 {
1811         x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
1812         x86_fnstcw_membase(code, X86_ESP, 0);
1813         x86_mov_reg_membase (code, dreg, X86_ESP, 0, 2);
1814         x86_alu_reg_imm (code, X86_OR, dreg, 0xc00);
1815         x86_mov_membase_reg (code, X86_ESP, 2, dreg, 2);
1816         x86_fldcw_membase (code, X86_ESP, 2);
1817         if (size == 8) {
1818                 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1819                 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
1820                 x86_pop_reg (code, dreg);
1821                 /* FIXME: need the high register
1822                  * x86_pop_reg (code, dreg_high);
1823                  */
1824         } else {
1825                 x86_push_reg (code, X86_EAX); // SP = SP - 4
1826                 x86_fist_pop_membase (code, X86_ESP, 0, FALSE);
1827                 x86_pop_reg (code, dreg);
1828         }
1829         x86_fldcw_membase (code, X86_ESP, 0);
1830         x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
1831
1832         if (size == 1)
1833                 x86_widen_reg (code, dreg, dreg, is_signed, FALSE);
1834         else if (size == 2)
1835                 x86_widen_reg (code, dreg, dreg, is_signed, TRUE);
1836         return code;
1837 }
1838
1839 static unsigned char*
1840 mono_emit_stack_alloc (guchar *code, MonoInst* tree)
1841 {
1842         int sreg = tree->sreg1;
1843 #ifdef PLATFORM_WIN32
1844         guint8* br[5];
1845
1846         /*
1847          * Under Windows:
1848          * If requested stack size is larger than one page,
1849          * perform stack-touch operation
1850          */
1851         /*
1852          * Generate stack probe code.
1853          * Under Windows, it is necessary to allocate one page at a time,
1854          * "touching" stack after each successful sub-allocation. This is
1855          * because of the way stack growth is implemented - there is a
1856          * guard page before the lowest stack page that is currently commited.
1857          * Stack normally grows sequentially so OS traps access to the
1858          * guard page and commits more pages when needed.
1859          */
1860         x86_test_reg_imm (code, sreg, ~0xFFF);
1861         br[0] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1862
1863         br[2] = code; /* loop */
1864         x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
1865         x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
1866         x86_alu_reg_imm (code, X86_SUB, sreg, 0x1000);
1867         x86_alu_reg_imm (code, X86_CMP, sreg, 0x1000);
1868         br[3] = code; x86_branch8 (code, X86_CC_AE, 0, FALSE);
1869         x86_patch (br[3], br[2]);
1870         x86_test_reg_reg (code, sreg, sreg);
1871         br[4] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1872         x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1873
1874         br[1] = code; x86_jump8 (code, 0);
1875
1876         x86_patch (br[0], code);
1877         x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1878         x86_patch (br[1], code);
1879         x86_patch (br[4], code);
1880 #else /* PLATFORM_WIN32 */
1881         x86_alu_reg_reg (code, X86_SUB, X86_ESP, tree->sreg1);
1882 #endif
1883         if (tree->flags & MONO_INST_INIT) {
1884                 int offset = 0;
1885                 if (tree->dreg != X86_EAX && sreg != X86_EAX) {
1886                         x86_push_reg (code, X86_EAX);
1887                         offset += 4;
1888                 }
1889                 if (tree->dreg != X86_ECX && sreg != X86_ECX) {
1890                         x86_push_reg (code, X86_ECX);
1891                         offset += 4;
1892                 }
1893                 if (tree->dreg != X86_EDI && sreg != X86_EDI) {
1894                         x86_push_reg (code, X86_EDI);
1895                         offset += 4;
1896                 }
1897
1898                 x86_shift_reg_imm (code, X86_SHR, sreg, 2);
1899                 if (sreg != X86_ECX)
1900                         x86_mov_reg_reg (code, X86_ECX, sreg, 4);
1901                 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
1902
1903                 x86_lea_membase (code, X86_EDI, X86_ESP, offset);
1904                 x86_cld (code);
1905                 x86_prefix (code, X86_REP_PREFIX);
1906                 x86_stosl (code);
1907
1908                 if (tree->dreg != X86_EDI && sreg != X86_EDI)
1909                         x86_pop_reg (code, X86_EDI);
1910                 if (tree->dreg != X86_ECX && sreg != X86_ECX)
1911                         x86_pop_reg (code, X86_ECX);
1912                 if (tree->dreg != X86_EAX && sreg != X86_EAX)
1913                         x86_pop_reg (code, X86_EAX);
1914         }
1915         return code;
1916 }
1917
1918 #define REAL_PRINT_REG(text,reg) \
1919 mono_assert (reg >= 0); \
1920 x86_push_reg (code, X86_EAX); \
1921 x86_push_reg (code, X86_EDX); \
1922 x86_push_reg (code, X86_ECX); \
1923 x86_push_reg (code, reg); \
1924 x86_push_imm (code, reg); \
1925 x86_push_imm (code, text " %d %p\n"); \
1926 x86_mov_reg_imm (code, X86_EAX, printf); \
1927 x86_call_reg (code, X86_EAX); \
1928 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 3*4); \
1929 x86_pop_reg (code, X86_ECX); \
1930 x86_pop_reg (code, X86_EDX); \
1931 x86_pop_reg (code, X86_EAX);
1932
1933 void
1934 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
1935 {
1936         MonoInst *ins;
1937         MonoCallInst *call;
1938         guint offset;
1939         guint8 *code = cfg->native_code + cfg->code_len;
1940         MonoInst *last_ins = NULL;
1941         guint last_offset = 0;
1942         int max_len, cpos;
1943
1944         if (cfg->opt & MONO_OPT_PEEPHOLE)
1945                 peephole_pass (cfg, bb);
1946
1947 #if 0
1948         /*
1949          * various stratgies to align BBs. Using real loop detection or simply
1950          * aligning every block leads to more consistent benchmark results,
1951          * but usually slows down the code
1952          * we should do the alignment outside this function or we should adjust
1953          * bb->native offset as well or the code is effectively slowed down!
1954          */
1955         /* align all blocks */
1956 //      if ((pad = (cfg->code_len & (align - 1)))) {
1957         /* poor man loop start detection */
1958 //      if (bb->code && bb->in_count && bb->in_bb [0]->cil_code > bb->cil_code && (pad = (cfg->code_len & (align - 1)))) {
1959         /* consider real loop detection and nesting level */
1960 //      if (bb->loop_blocks && bb->nesting < 3 && (pad = (cfg->code_len & (align - 1)))) {
1961         /* consider real loop detection */
1962         if (bb->loop_blocks && (pad = (cfg->code_len & (align - 1)))) {
1963                 pad = align - pad;
1964                 x86_padding (code, pad);
1965                 cfg->code_len += pad;
1966                 bb->native_offset = cfg->code_len;
1967         }
1968 #endif
1969
1970         if (cfg->verbose_level > 2)
1971                 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
1972
1973         cpos = bb->max_offset;
1974
1975         if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
1976                 MonoProfileCoverageInfo *cov = cfg->coverage_info;
1977                 g_assert (!mono_compile_aot);
1978                 cpos += 6;
1979
1980                 cov->data [bb->dfn].cil_code = bb->cil_code;
1981                 /* this is not thread save, but good enough */
1982                 x86_inc_mem (code, &cov->data [bb->dfn].count);
1983         }
1984
1985         offset = code - cfg->native_code;
1986
1987         ins = bb->code;
1988         while (ins) {
1989                 offset = code - cfg->native_code;
1990
1991                 max_len = ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
1992
1993                 if (offset > (cfg->code_size - max_len - 16)) {
1994                         cfg->code_size *= 2;
1995                         cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
1996                         code = cfg->native_code + offset;
1997                         mono_jit_stats.code_reallocs++;
1998                 }
1999
2000                 mono_debug_record_line_number (cfg, ins, offset);
2001
2002                 switch (ins->opcode) {
2003                 case OP_BIGMUL:
2004                         x86_mul_reg (code, ins->sreg2, TRUE);
2005                         break;
2006                 case OP_BIGMUL_UN:
2007                         x86_mul_reg (code, ins->sreg2, FALSE);
2008                         break;
2009                 case OP_X86_SETEQ_MEMBASE:
2010                         x86_set_membase (code, X86_CC_EQ, ins->inst_basereg, ins->inst_offset, TRUE);
2011                         break;
2012                 case OP_STOREI1_MEMBASE_IMM:
2013                         x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 1);
2014                         break;
2015                 case OP_STOREI2_MEMBASE_IMM:
2016                         x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 2);
2017                         break;
2018                 case OP_STORE_MEMBASE_IMM:
2019                 case OP_STOREI4_MEMBASE_IMM:
2020                         x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 4);
2021                         break;
2022                 case OP_STOREI1_MEMBASE_REG:
2023                         x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 1);
2024                         break;
2025                 case OP_STOREI2_MEMBASE_REG:
2026                         x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 2);
2027                         break;
2028                 case OP_STORE_MEMBASE_REG:
2029                 case OP_STOREI4_MEMBASE_REG:
2030                         x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 4);
2031                         break;
2032                 case CEE_LDIND_I:
2033                 case CEE_LDIND_I4:
2034                 case CEE_LDIND_U4:
2035                         x86_mov_reg_mem (code, ins->dreg, ins->inst_p0, 4);
2036                         break;
2037                 case OP_LOADU4_MEM:
2038                         x86_mov_reg_imm (code, ins->dreg, ins->inst_p0);
2039                         x86_mov_reg_membase (code, ins->dreg, ins->dreg, 0, 4);
2040                         break;
2041                 case OP_LOAD_MEMBASE:
2042                 case OP_LOADI4_MEMBASE:
2043                 case OP_LOADU4_MEMBASE:
2044                         x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, 4);
2045                         break;
2046                 case OP_LOADU1_MEMBASE:
2047                         x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE);
2048                         break;
2049                 case OP_LOADI1_MEMBASE:
2050                         x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, FALSE);
2051                         break;
2052                 case OP_LOADU2_MEMBASE:
2053                         x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE);
2054                         break;
2055                 case OP_LOADI2_MEMBASE:
2056                         x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, TRUE);
2057                         break;
2058                 case CEE_CONV_I1:
2059                         x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, FALSE);
2060                         break;
2061                 case CEE_CONV_I2:
2062                         x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, TRUE);
2063                         break;
2064                 case CEE_CONV_U1:
2065                         x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, FALSE);
2066                         break;
2067                 case CEE_CONV_U2:
2068                         x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, TRUE);
2069                         break;
2070                 case OP_COMPARE:
2071                         x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
2072                         break;
2073                 case OP_COMPARE_IMM:
2074                         x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
2075                         break;
2076                 case OP_X86_COMPARE_MEMBASE_REG:
2077                         x86_alu_membase_reg (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2078                         break;
2079                 case OP_X86_COMPARE_MEMBASE_IMM:
2080                         x86_alu_membase_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2081                         break;
2082                 case OP_X86_COMPARE_REG_MEMBASE:
2083                         x86_alu_reg_membase (code, X86_CMP, ins->sreg1, ins->sreg2, ins->inst_offset);
2084                         break;
2085                 case OP_X86_TEST_NULL:
2086                         x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
2087                         break;
2088                 case OP_X86_ADD_MEMBASE_IMM:
2089                         x86_alu_membase_imm (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2090                         break;
2091                 case OP_X86_SUB_MEMBASE_IMM:
2092                         x86_alu_membase_imm (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2093                         break;
2094                 case OP_X86_INC_MEMBASE:
2095                         x86_inc_membase (code, ins->inst_basereg, ins->inst_offset);
2096                         break;
2097                 case OP_X86_INC_REG:
2098                         x86_inc_reg (code, ins->dreg);
2099                         break;
2100                 case OP_X86_DEC_MEMBASE:
2101                         x86_dec_membase (code, ins->inst_basereg, ins->inst_offset);
2102                         break;
2103                 case OP_X86_DEC_REG:
2104                         x86_dec_reg (code, ins->dreg);
2105                         break;
2106                 case CEE_BREAK:
2107                         x86_breakpoint (code);
2108                         break;
2109                 case OP_ADDCC:
2110                 case CEE_ADD:
2111                         x86_alu_reg_reg (code, X86_ADD, ins->sreg1, ins->sreg2);
2112                         break;
2113                 case OP_ADC:
2114                         x86_alu_reg_reg (code, X86_ADC, ins->sreg1, ins->sreg2);
2115                         break;
2116                 case OP_ADD_IMM:
2117                         x86_alu_reg_imm (code, X86_ADD, ins->dreg, ins->inst_imm);
2118                         break;
2119                 case OP_ADC_IMM:
2120                         x86_alu_reg_imm (code, X86_ADC, ins->dreg, ins->inst_imm);
2121                         break;
2122                 case OP_SUBCC:
2123                 case CEE_SUB:
2124                         x86_alu_reg_reg (code, X86_SUB, ins->sreg1, ins->sreg2);
2125                         break;
2126                 case OP_SBB:
2127                         x86_alu_reg_reg (code, X86_SBB, ins->sreg1, ins->sreg2);
2128                         break;
2129                 case OP_SUB_IMM:
2130                         x86_alu_reg_imm (code, X86_SUB, ins->dreg, ins->inst_imm);
2131                         break;
2132                 case OP_SBB_IMM:
2133                         x86_alu_reg_imm (code, X86_SBB, ins->dreg, ins->inst_imm);
2134                         break;
2135                 case CEE_AND:
2136                         x86_alu_reg_reg (code, X86_AND, ins->sreg1, ins->sreg2);
2137                         break;
2138                 case OP_AND_IMM:
2139                         x86_alu_reg_imm (code, X86_AND, ins->sreg1, ins->inst_imm);
2140                         break;
2141                 case CEE_DIV:
2142                         x86_cdq (code);
2143                         x86_div_reg (code, ins->sreg2, TRUE);
2144                         break;
2145                 case CEE_DIV_UN:
2146                         x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2147                         x86_div_reg (code, ins->sreg2, FALSE);
2148                         break;
2149                 case OP_DIV_IMM:
2150                         x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
2151                         x86_cdq (code);
2152                         x86_div_reg (code, ins->sreg2, TRUE);
2153                         break;
2154                 case CEE_REM:
2155                         x86_cdq (code);
2156                         x86_div_reg (code, ins->sreg2, TRUE);
2157                         break;
2158                 case CEE_REM_UN:
2159                         x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2160                         x86_div_reg (code, ins->sreg2, FALSE);
2161                         break;
2162                 case OP_REM_IMM:
2163                         x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
2164                         x86_cdq (code);
2165                         x86_div_reg (code, ins->sreg2, TRUE);
2166                         break;
2167                 case CEE_OR:
2168                         x86_alu_reg_reg (code, X86_OR, ins->sreg1, ins->sreg2);
2169                         break;
2170                 case OP_OR_IMM:
2171                         x86_alu_reg_imm (code, X86_OR, ins->sreg1, ins->inst_imm);
2172                         break;
2173                 case CEE_XOR:
2174                         x86_alu_reg_reg (code, X86_XOR, ins->sreg1, ins->sreg2);
2175                         break;
2176                 case OP_XOR_IMM:
2177                         x86_alu_reg_imm (code, X86_XOR, ins->sreg1, ins->inst_imm);
2178                         break;
2179                 case CEE_SHL:
2180                         g_assert (ins->sreg2 == X86_ECX);
2181                         x86_shift_reg (code, X86_SHL, ins->dreg);
2182                         break;
2183                 case CEE_SHR:
2184                         g_assert (ins->sreg2 == X86_ECX);
2185                         x86_shift_reg (code, X86_SAR, ins->dreg);
2186                         break;
2187                 case OP_SHR_IMM:
2188                         x86_shift_reg_imm (code, X86_SAR, ins->dreg, ins->inst_imm);
2189                         break;
2190                 case OP_SHR_UN_IMM:
2191                         x86_shift_reg_imm (code, X86_SHR, ins->dreg, ins->inst_imm);
2192                         break;
2193                 case CEE_SHR_UN:
2194                         g_assert (ins->sreg2 == X86_ECX);
2195                         x86_shift_reg (code, X86_SHR, ins->dreg);
2196                         break;
2197                 case OP_SHL_IMM:
2198                         x86_shift_reg_imm (code, X86_SHL, ins->dreg, ins->inst_imm);
2199                         break;
2200                 case CEE_NOT:
2201                         x86_not_reg (code, ins->sreg1);
2202                         break;
2203                 case CEE_NEG:
2204                         x86_neg_reg (code, ins->sreg1);
2205                         break;
2206                 case OP_SEXT_I1:
2207                         x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, FALSE);
2208                         break;
2209                 case OP_SEXT_I2:
2210                         x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, TRUE);
2211                         break;
2212                 case CEE_MUL:
2213                         x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2214                         break;
2215                 case OP_MUL_IMM:
2216                         x86_imul_reg_reg_imm (code, ins->dreg, ins->sreg1, ins->inst_imm);
2217                         break;
2218                 case CEE_MUL_OVF:
2219                         x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2220                         EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2221                         break;
2222                 case CEE_MUL_OVF_UN: {
2223                         /* the mul operation and the exception check should most likely be split */
2224                         int non_eax_reg, saved_eax = FALSE, saved_edx = FALSE;
2225                         /*g_assert (ins->sreg2 == X86_EAX);
2226                         g_assert (ins->dreg == X86_EAX);*/
2227                         if (ins->sreg2 == X86_EAX) {
2228                                 non_eax_reg = ins->sreg1;
2229                         } else if (ins->sreg1 == X86_EAX) {
2230                                 non_eax_reg = ins->sreg2;
2231                         } else {
2232                                 /* no need to save since we're going to store to it anyway */
2233                                 if (ins->dreg != X86_EAX) {
2234                                         saved_eax = TRUE;
2235                                         x86_push_reg (code, X86_EAX);
2236                                 }
2237                                 x86_mov_reg_reg (code, X86_EAX, ins->sreg1, 4);
2238                                 non_eax_reg = ins->sreg2;
2239                         }
2240                         if (ins->dreg == X86_EDX) {
2241                                 if (!saved_eax) {
2242                                         saved_eax = TRUE;
2243                                         x86_push_reg (code, X86_EAX);
2244                                 }
2245                         } else if (ins->dreg != X86_EAX) {
2246                                 saved_edx = TRUE;
2247                                 x86_push_reg (code, X86_EDX);
2248                         }
2249                         x86_mul_reg (code, non_eax_reg, FALSE);
2250                         /* save before the check since pop and mov don't change the flags */
2251                         if (saved_edx)
2252                                 x86_pop_reg (code, X86_EDX);
2253                         if (saved_eax)
2254                                 x86_pop_reg (code, X86_EAX);
2255                         if (ins->dreg != X86_EAX)
2256                                 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
2257                         EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2258                         break;
2259                 }
2260                 case OP_ICONST:
2261                         x86_mov_reg_imm (code, ins->dreg, ins->inst_c0);
2262                         break;
2263                 case OP_AOTCONST:
2264                         mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2265                         x86_mov_reg_imm (code, ins->dreg, 0);
2266                         break;
2267                 case CEE_CONV_I4:
2268                 case CEE_CONV_U4:
2269                 case OP_MOVE:
2270                         x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2271                         break;
2272                 case CEE_JMP: {
2273                         /*
2274                          * Note: this 'frame destruction' logic is useful for tail calls, too.
2275                          * Keep in sync with the code in emit_epilog.
2276                          */
2277                         int pos = 0;
2278
2279                         /* FIXME: no tracing support... */
2280                         if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
2281                                 code = mono_arch_instrument_epilog (cfg, mono_profiler_method_leave, code, FALSE);
2282                         /* reset offset to make max_len work */
2283                         offset = code - cfg->native_code;
2284
2285                         g_assert (!cfg->method->save_lmf);
2286
2287                         if (cfg->used_int_regs & (1 << X86_EBX))
2288                                 pos -= 4;
2289                         if (cfg->used_int_regs & (1 << X86_EDI))
2290                                 pos -= 4;
2291                         if (cfg->used_int_regs & (1 << X86_ESI))
2292                                 pos -= 4;
2293                         if (pos)
2294                                 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
2295
2296                         if (cfg->used_int_regs & (1 << X86_ESI))
2297                                 x86_pop_reg (code, X86_ESI);
2298                         if (cfg->used_int_regs & (1 << X86_EDI))
2299                                 x86_pop_reg (code, X86_EDI);
2300                         if (cfg->used_int_regs & (1 << X86_EBX))
2301                                 x86_pop_reg (code, X86_EBX);
2302
2303                         /* restore ESP/EBP */
2304                         x86_leave (code);
2305                         offset = code - cfg->native_code;
2306                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2307                         x86_jump32 (code, 0);
2308                         break;
2309                 }
2310                 case OP_CHECK_THIS:
2311                         /* ensure ins->sreg1 is not NULL */
2312                         x86_alu_membase_imm (code, X86_CMP, ins->sreg1, 0, 0);
2313                         break;
2314                 case OP_ARGLIST: {
2315                         int hreg = ins->sreg1 == X86_EAX? X86_ECX: X86_EAX;
2316                         x86_push_reg (code, hreg);
2317                         x86_lea_membase (code, hreg, X86_EBP, cfg->sig_cookie);
2318                         x86_mov_membase_reg (code, ins->sreg1, 0, hreg, 4);
2319                         x86_pop_reg (code, hreg);
2320                         break;
2321                 }
2322                 case OP_FCALL:
2323                 case OP_LCALL:
2324                 case OP_VCALL:
2325                 case OP_VOIDCALL:
2326                 case CEE_CALL:
2327                         call = (MonoCallInst*)ins;
2328                         if (ins->flags & MONO_INST_HAS_METHOD)
2329                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD, call->method);
2330                         else {
2331                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, call->fptr);
2332                         }
2333                         x86_call_code (code, 0);
2334                         if (call->stack_usage && (call->signature->call_convention != MONO_CALL_STDCALL))
2335                                 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2336                         break;
2337                 case OP_FCALL_REG:
2338                 case OP_LCALL_REG:
2339                 case OP_VCALL_REG:
2340                 case OP_VOIDCALL_REG:
2341                 case OP_CALL_REG:
2342                         call = (MonoCallInst*)ins;
2343                         x86_call_reg (code, ins->sreg1);
2344                         if (call->stack_usage && (call->signature->call_convention != MONO_CALL_STDCALL))
2345                                 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2346                         break;
2347                 case OP_FCALL_MEMBASE:
2348                 case OP_LCALL_MEMBASE:
2349                 case OP_VCALL_MEMBASE:
2350                 case OP_VOIDCALL_MEMBASE:
2351                 case OP_CALL_MEMBASE:
2352                         call = (MonoCallInst*)ins;
2353                         x86_call_membase (code, ins->sreg1, ins->inst_offset);
2354                         if (call->stack_usage && (call->signature->call_convention != MONO_CALL_STDCALL))
2355                                 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2356                         break;
2357                 case OP_OUTARG:
2358                 case OP_X86_PUSH:
2359                         x86_push_reg (code, ins->sreg1);
2360                         break;
2361                 case OP_X86_PUSH_IMM:
2362                         x86_push_imm (code, ins->inst_imm);
2363                         break;
2364                 case OP_X86_PUSH_MEMBASE:
2365                         x86_push_membase (code, ins->inst_basereg, ins->inst_offset);
2366                         break;
2367                 case OP_X86_PUSH_OBJ:
2368                         x86_alu_reg_imm (code, X86_SUB, X86_ESP, ins->inst_imm);
2369                         x86_push_reg (code, X86_EDI);
2370                         x86_push_reg (code, X86_ESI);
2371                         x86_push_reg (code, X86_ECX);
2372                         if (ins->inst_offset)
2373                                 x86_lea_membase (code, X86_ESI, ins->inst_basereg, ins->inst_offset);
2374                         else
2375                                 x86_mov_reg_reg (code, X86_ESI, ins->inst_basereg, 4);
2376                         x86_lea_membase (code, X86_EDI, X86_ESP, 12);
2377                         x86_mov_reg_imm (code, X86_ECX, (ins->inst_imm >> 2));
2378                         x86_cld (code);
2379                         x86_prefix (code, X86_REP_PREFIX);
2380                         x86_movsd (code);
2381                         x86_pop_reg (code, X86_ECX);
2382                         x86_pop_reg (code, X86_ESI);
2383                         x86_pop_reg (code, X86_EDI);
2384                         break;
2385                 case OP_X86_LEA:
2386                         x86_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->unused);
2387                         break;
2388                 case OP_X86_LEA_MEMBASE:
2389                         x86_lea_membase (code, ins->dreg, ins->sreg1, ins->inst_imm);
2390                         break;
2391                 case OP_X86_XCHG:
2392                         x86_xchg_reg_reg (code, ins->sreg1, ins->sreg2, 4);
2393                         break;
2394                 case OP_LOCALLOC:
2395                         /* keep alignment */
2396                         x86_alu_reg_imm (code, X86_ADD, ins->sreg1, MONO_ARCH_FRAME_ALIGNMENT - 1);
2397                         x86_alu_reg_imm (code, X86_AND, ins->sreg1, ~(MONO_ARCH_FRAME_ALIGNMENT - 1));
2398                         code = mono_emit_stack_alloc (code, ins);
2399                         x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2400                         break;
2401                 case CEE_RET:
2402                         x86_ret (code);
2403                         break;
2404                 case CEE_THROW: {
2405                         x86_push_reg (code, ins->sreg1);
2406                         mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2407                                              (gpointer)"mono_arch_throw_exception");
2408                         x86_call_code (code, 0);
2409                         break;
2410                 }
2411                 case OP_CALL_HANDLER:
2412                         mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2413                         x86_call_imm (code, 0);
2414                         break;
2415                 case OP_LABEL:
2416                         ins->inst_c0 = code - cfg->native_code;
2417                         break;
2418                 case CEE_BR:
2419                         //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
2420                         //if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
2421                         //break;
2422                         if (ins->flags & MONO_INST_BRLABEL) {
2423                                 if (ins->inst_i0->inst_c0) {
2424                                         x86_jump_code (code, cfg->native_code + ins->inst_i0->inst_c0);
2425                                 } else {
2426                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
2427                                         x86_jump32 (code, 0);
2428                                 }
2429                         } else {
2430                                 if (ins->inst_target_bb->native_offset) {
2431                                         x86_jump_code (code, cfg->native_code + ins->inst_target_bb->native_offset);
2432                                 } else {
2433                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2434                                         if ((cfg->opt & MONO_OPT_BRANCH) &&
2435                                             x86_is_imm8 (ins->inst_target_bb->max_offset - cpos))
2436                                                 x86_jump8 (code, 0);
2437                                         else
2438                                                 x86_jump32 (code, 0);
2439                                 }
2440                         }
2441                         break;
2442                 case OP_BR_REG:
2443                         x86_jump_reg (code, ins->sreg1);
2444                         break;
2445                 case OP_CEQ:
2446                         x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
2447                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2448                         break;
2449                 case OP_CLT:
2450                         x86_set_reg (code, X86_CC_LT, ins->dreg, TRUE);
2451                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2452                         break;
2453                 case OP_CLT_UN:
2454                         x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
2455                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2456                         break;
2457                 case OP_CGT:
2458                         x86_set_reg (code, X86_CC_GT, ins->dreg, TRUE);
2459                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2460                         break;
2461                 case OP_CGT_UN:
2462                         x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
2463                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2464                         break;
2465                 case OP_COND_EXC_EQ:
2466                 case OP_COND_EXC_NE_UN:
2467                 case OP_COND_EXC_LT:
2468                 case OP_COND_EXC_LT_UN:
2469                 case OP_COND_EXC_GT:
2470                 case OP_COND_EXC_GT_UN:
2471                 case OP_COND_EXC_GE:
2472                 case OP_COND_EXC_GE_UN:
2473                 case OP_COND_EXC_LE:
2474                 case OP_COND_EXC_LE_UN:
2475                 case OP_COND_EXC_OV:
2476                 case OP_COND_EXC_NO:
2477                 case OP_COND_EXC_C:
2478                 case OP_COND_EXC_NC:
2479                         EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_EQ],
2480                                                     (ins->opcode < OP_COND_EXC_NE_UN), ins->inst_p1);
2481                         break;
2482                 case CEE_BEQ:
2483                 case CEE_BNE_UN:
2484                 case CEE_BLT:
2485                 case CEE_BLT_UN:
2486                 case CEE_BGT:
2487                 case CEE_BGT_UN:
2488                 case CEE_BGE:
2489                 case CEE_BGE_UN:
2490                 case CEE_BLE:
2491                 case CEE_BLE_UN:
2492                         EMIT_COND_BRANCH (ins, branch_cc_table [ins->opcode - CEE_BEQ], (ins->opcode < CEE_BNE_UN));
2493                         break;
2494
2495                 /* floating point opcodes */
2496                 case OP_R8CONST: {
2497                         double d = *(double *)ins->inst_p0;
2498
2499                         if ((d == 0.0) && (signbit (d) == 0)) {
2500                                 x86_fldz (code);
2501                         } else if (d == 1.0) {
2502                                 x86_fld1 (code);
2503                         } else {
2504                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
2505                                 x86_fld (code, NULL, TRUE);
2506                         }
2507                         break;
2508                 }
2509                 case OP_R4CONST: {
2510                         float f = *(float *)ins->inst_p0;
2511
2512                         if ((f == 0.0) && (signbit (f) == 0)) {
2513                                 x86_fldz (code);
2514                         } else if (f == 1.0) {
2515                                 x86_fld1 (code);
2516                         } else {
2517                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
2518                                 x86_fld (code, NULL, FALSE);
2519                         }
2520                         break;
2521                 }
2522                 case OP_STORER8_MEMBASE_REG:
2523                         x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, TRUE, TRUE);
2524                         break;
2525                 case OP_LOADR8_MEMBASE:
2526                         x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
2527                         break;
2528                 case OP_STORER4_MEMBASE_REG:
2529                         x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, FALSE, TRUE);
2530                         break;
2531                 case OP_LOADR4_MEMBASE:
2532                         x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
2533                         break;
2534                 case CEE_CONV_R4: /* FIXME: change precision */
2535                 case CEE_CONV_R8:
2536                         x86_push_reg (code, ins->sreg1);
2537                         x86_fild_membase (code, X86_ESP, 0, FALSE);
2538                         x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2539                         break;
2540                 case OP_X86_FP_LOAD_I8:
2541                         x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
2542                         break;
2543                 case OP_X86_FP_LOAD_I4:
2544                         x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
2545                         break;
2546                 case OP_FCONV_TO_I1:
2547                         code = emit_float_to_int (cfg, code, ins->dreg, 1, TRUE);
2548                         break;
2549                 case OP_FCONV_TO_U1:
2550                         code = emit_float_to_int (cfg, code, ins->dreg, 1, FALSE);
2551                         break;
2552                 case OP_FCONV_TO_I2:
2553                         code = emit_float_to_int (cfg, code, ins->dreg, 2, TRUE);
2554                         break;
2555                 case OP_FCONV_TO_U2:
2556                         code = emit_float_to_int (cfg, code, ins->dreg, 2, FALSE);
2557                         break;
2558                 case OP_FCONV_TO_I4:
2559                 case OP_FCONV_TO_I:
2560                         code = emit_float_to_int (cfg, code, ins->dreg, 4, TRUE);
2561                         break;
2562                 case OP_FCONV_TO_I8:
2563                         /* we defined this instruction to output only to eax:edx */
2564                         x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
2565                         x86_fnstcw_membase(code, X86_ESP, 0);
2566                         x86_mov_reg_membase (code, X86_EAX, X86_ESP, 0, 2);
2567                         x86_alu_reg_imm (code, X86_OR, X86_EAX, 0xc00);
2568                         x86_mov_membase_reg (code, X86_ESP, 2, X86_EAX, 2);
2569                         x86_fldcw_membase (code, X86_ESP, 2);
2570                         x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
2571                         x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
2572                         x86_pop_reg (code, X86_EAX);
2573                         x86_pop_reg (code, X86_EDX);
2574                         x86_fldcw_membase (code, X86_ESP, 0);
2575                         x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2576                         break;
2577                 case OP_LCONV_TO_R_UN: {
2578                         static guint8 mn[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x40 };
2579                         guint8 *br;
2580
2581                         /* load 64bit integer to FP stack */
2582                         x86_push_imm (code, 0);
2583                         x86_push_reg (code, ins->sreg2);
2584                         x86_push_reg (code, ins->sreg1);
2585                         x86_fild_membase (code, X86_ESP, 0, TRUE);
2586                         /* store as 80bit FP value */
2587                         x86_fst80_membase (code, X86_ESP, 0);
2588
2589                         /* test if lreg is negative */
2590                         x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
2591                         br = code; x86_branch8 (code, X86_CC_GEZ, 0, TRUE);
2592
2593                         /* add correction constant mn */
2594                         x86_fld80_mem (code, mn);
2595                         x86_fld80_membase (code, X86_ESP, 0);
2596                         x86_fp_op_reg (code, X86_FADD, 1, TRUE);
2597                         x86_fst80_membase (code, X86_ESP, 0);
2598
2599                         x86_patch (br, code);
2600
2601                         x86_fld80_membase (code, X86_ESP, 0);
2602                         x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
2603
2604                         break;
2605                 }
2606                 case OP_LCONV_TO_OVF_I: {
2607                         guint8 *br [3], *label [1];
2608
2609                         /*
2610                          * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
2611                          */
2612                         x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
2613
2614                         /* If the low word top bit is set, see if we are negative */
2615                         br [0] = code; x86_branch8 (code, X86_CC_LT, 0, TRUE);
2616                         /* We are not negative (no top bit set, check for our top word to be zero */
2617                         x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
2618                         br [1] = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
2619                         label [0] = code;
2620
2621                         /* throw exception */
2622                         mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC, "OverflowException");
2623                         x86_jump32 (code, 0);
2624
2625                         x86_patch (br [0], code);
2626                         /* our top bit is set, check that top word is 0xfffffff */
2627                         x86_alu_reg_imm (code, X86_CMP, ins->sreg2, 0xffffffff);
2628
2629                         x86_patch (br [1], code);
2630                         /* nope, emit exception */
2631                         br [2] = code; x86_branch8 (code, X86_CC_NE, 0, TRUE);
2632                         x86_patch (br [2], label [0]);
2633
2634                         if (ins->dreg != ins->sreg1)
2635                                 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2636                         break;
2637                 }
2638                 case OP_FADD:
2639                         x86_fp_op_reg (code, X86_FADD, 1, TRUE);
2640                         break;
2641                 case OP_FSUB:
2642                         x86_fp_op_reg (code, X86_FSUB, 1, TRUE);
2643                         break;
2644                 case OP_FMUL:
2645                         x86_fp_op_reg (code, X86_FMUL, 1, TRUE);
2646                         break;
2647                 case OP_FDIV:
2648                         x86_fp_op_reg (code, X86_FDIV, 1, TRUE);
2649                         break;
2650                 case OP_FNEG:
2651                         x86_fchs (code);
2652                         break;
2653                 case OP_SIN:
2654                         x86_fsin (code);
2655                         break;
2656                 case OP_COS:
2657                         x86_fcos (code);
2658                         break;
2659                 case OP_ABS:
2660                         x86_fabs (code);
2661                         break;
2662                 case OP_TAN: {
2663                         /*
2664                          * it really doesn't make sense to inline all this code,
2665                          * it's here just to show that things may not be as simple
2666                          * as they appear.
2667                          */
2668                         guchar *check_pos, *end_tan, *pop_jump;
2669                         x86_push_reg (code, X86_EAX);
2670                         x86_fptan (code);
2671                         x86_fnstsw (code);
2672                         x86_test_reg_imm (code, X86_EAX, 0x400);
2673                         check_pos = code;
2674                         x86_branch8 (code, X86_CC_NE, 0, FALSE);
2675                         x86_fstp (code, 0); /* pop the 1.0 */
2676                         end_tan = code;
2677                         x86_jump8 (code, 0);
2678                         x86_fldpi (code);
2679                         x86_fp_op (code, X86_FADD, 0);
2680                         x86_fxch (code, 1);
2681                         x86_fprem1 (code);
2682                         x86_fstsw (code);
2683                         x86_test_reg_imm (code, X86_EAX, 0x400);
2684                         pop_jump = code;
2685                         x86_branch8 (code, X86_CC_NE, 0, FALSE);
2686                         x86_fstp (code, 1);
2687                         x86_fptan (code);
2688                         x86_patch (pop_jump, code);
2689                         x86_fstp (code, 0); /* pop the 1.0 */
2690                         x86_patch (check_pos, code);
2691                         x86_patch (end_tan, code);
2692                         x86_pop_reg (code, X86_EAX);
2693                         break;
2694                 }
2695                 case OP_ATAN:
2696                         x86_fld1 (code);
2697                         x86_fpatan (code);
2698                         break;
2699                 case OP_SQRT:
2700                         x86_fsqrt (code);
2701                         break;
2702                 case OP_X86_FPOP:
2703                         x86_fstp (code, 0);
2704                         break;
2705                 case OP_FREM: {
2706                         guint8 *l1, *l2;
2707
2708                         x86_push_reg (code, X86_EAX);
2709                         /* we need to exchange ST(0) with ST(1) */
2710                         x86_fxch (code, 1);
2711
2712                         /* this requires a loop, because fprem somtimes
2713                          * returns a partial remainder */
2714                         l1 = code;
2715                         /* looks like MS is using fprem instead of the IEEE compatible fprem1 */
2716                         /* x86_fprem1 (code); */
2717                         x86_fprem (code);
2718                         x86_fnstsw (code);
2719                         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x0400);
2720                         l2 = code + 2;
2721                         x86_branch8 (code, X86_CC_NE, l1 - l2, FALSE);
2722
2723                         /* pop result */
2724                         x86_fstp (code, 1);
2725
2726                         x86_pop_reg (code, X86_EAX);
2727                         break;
2728                 }
2729                 case OP_FCOMPARE:
2730                         if (cfg->opt & MONO_OPT_FCMOV) {
2731                                 x86_fcomip (code, 1);
2732                                 x86_fstp (code, 0);
2733                                 break;
2734                         }
2735                         /* this overwrites EAX */
2736                         EMIT_FPCOMPARE(code);
2737                         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4500);
2738                         break;
2739                 case OP_FCEQ:
2740                         if (cfg->opt & MONO_OPT_FCMOV) {
2741                                 /* zeroing the register at the start results in
2742                                  * shorter and faster code (we can also remove the widening op)
2743                                  */
2744                                 guchar *unordered_check;
2745                                 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
2746                                 x86_fcomip (code, 1);
2747                                 x86_fstp (code, 0);
2748                                 unordered_check = code;
2749                                 x86_branch8 (code, X86_CC_P, 0, FALSE);
2750                                 x86_set_reg (code, X86_CC_EQ, ins->dreg, FALSE);
2751                                 x86_patch (unordered_check, code);
2752                                 break;
2753                         }
2754                         if (ins->dreg != X86_EAX)
2755                                 x86_push_reg (code, X86_EAX);
2756
2757                         EMIT_FPCOMPARE(code);
2758                         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4500);
2759                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
2760                         x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
2761                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2762
2763                         if (ins->dreg != X86_EAX)
2764                                 x86_pop_reg (code, X86_EAX);
2765                         break;
2766                 case OP_FCLT:
2767                 case OP_FCLT_UN:
2768                         if (cfg->opt & MONO_OPT_FCMOV) {
2769                                 /* zeroing the register at the start results in
2770                                  * shorter and faster code (we can also remove the widening op)
2771                                  */
2772                                 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
2773                                 x86_fcomip (code, 1);
2774                                 x86_fstp (code, 0);
2775                                 if (ins->opcode == OP_FCLT_UN) {
2776                                         guchar *unordered_check = code;
2777                                         guchar *jump_to_end;
2778                                         x86_branch8 (code, X86_CC_P, 0, FALSE);
2779                                         x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
2780                                         jump_to_end = code;
2781                                         x86_jump8 (code, 0);
2782                                         x86_patch (unordered_check, code);
2783                                         x86_inc_reg (code, ins->dreg);
2784                                         x86_patch (jump_to_end, code);
2785                                 } else {
2786                                         x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
2787                                 }
2788                                 break;
2789                         }
2790                         if (ins->dreg != X86_EAX)
2791                                 x86_push_reg (code, X86_EAX);
2792
2793                         EMIT_FPCOMPARE(code);
2794                         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4500);
2795                         if (ins->opcode == OP_FCLT_UN) {
2796                                 guchar *is_not_zero_check, *end_jump;
2797                                 is_not_zero_check = code;
2798                                 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
2799                                 end_jump = code;
2800                                 x86_jump8 (code, 0);
2801                                 x86_patch (is_not_zero_check, code);
2802                                 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4500);
2803
2804                                 x86_patch (end_jump, code);
2805                         }
2806                         x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
2807                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2808
2809                         if (ins->dreg != X86_EAX)
2810                                 x86_pop_reg (code, X86_EAX);
2811                         break;
2812                 case OP_FCGT:
2813                 case OP_FCGT_UN:
2814                         if (cfg->opt & MONO_OPT_FCMOV) {
2815                                 /* zeroing the register at the start results in
2816                                  * shorter and faster code (we can also remove the widening op)
2817                                  */
2818                                 guchar *unordered_check;
2819                                 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
2820                                 x86_fcomip (code, 1);
2821                                 x86_fstp (code, 0);
2822                                 if (ins->opcode == OP_FCGT) {
2823                                         unordered_check = code;
2824                                         x86_branch8 (code, X86_CC_P, 0, FALSE);
2825                                         x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
2826                                         x86_patch (unordered_check, code);
2827                                 } else {
2828                                         x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
2829                                 }
2830                                 break;
2831                         }
2832                         if (ins->dreg != X86_EAX)
2833                                 x86_push_reg (code, X86_EAX);
2834
2835                         EMIT_FPCOMPARE(code);
2836                         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4500);
2837                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x0100);
2838                         if (ins->opcode == OP_FCGT_UN) {
2839                                 guchar *is_not_zero_check, *end_jump;
2840                                 is_not_zero_check = code;
2841                                 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
2842                                 end_jump = code;
2843                                 x86_jump8 (code, 0);
2844                                 x86_patch (is_not_zero_check, code);
2845                                 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4500);
2846
2847                                 x86_patch (end_jump, code);
2848                         }
2849                         x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
2850                         x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2851
2852                         if (ins->dreg != X86_EAX)
2853                                 x86_pop_reg (code, X86_EAX);
2854                         break;
2855                 case OP_FBEQ:
2856                         if (cfg->opt & MONO_OPT_FCMOV) {
2857                                 guchar *jump = code;
2858                                 x86_branch8 (code, X86_CC_P, 0, TRUE);
2859                                 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2860                                 x86_patch (jump, code);
2861                                 break;
2862                         }
2863                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
2864                         EMIT_COND_BRANCH (ins, X86_CC_EQ, TRUE);
2865                         break;
2866                 case OP_FBNE_UN:
2867                         if (cfg->opt & MONO_OPT_FCMOV) {
2868                                 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
2869                                 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
2870                                 break;
2871                         }
2872                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
2873                         EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
2874                         break;
2875                 case OP_FBLT:
2876                         if (cfg->opt & MONO_OPT_FCMOV) {
2877                                 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
2878                                 break;
2879                         }
2880                         EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2881                         break;
2882                 case OP_FBLT_UN:
2883                         if (cfg->opt & MONO_OPT_FCMOV) {
2884                                 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
2885                                 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
2886                                 break;
2887                         }
2888                         if (ins->opcode == OP_FBLT_UN) {
2889                                 guchar *is_not_zero_check, *end_jump;
2890                                 is_not_zero_check = code;
2891                                 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
2892                                 end_jump = code;
2893                                 x86_jump8 (code, 0);
2894                                 x86_patch (is_not_zero_check, code);
2895                                 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4500);
2896
2897                                 x86_patch (end_jump, code);
2898                         }
2899                         EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2900                         break;
2901                 case OP_FBGT:
2902                 case OP_FBGT_UN:
2903                         if (cfg->opt & MONO_OPT_FCMOV) {
2904                                 EMIT_COND_BRANCH (ins, X86_CC_LT, FALSE);
2905                                 break;
2906                         }
2907                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x0100);
2908                         if (ins->opcode == OP_FBGT_UN) {
2909                                 guchar *is_not_zero_check, *end_jump;
2910                                 is_not_zero_check = code;
2911                                 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
2912                                 end_jump = code;
2913                                 x86_jump8 (code, 0);
2914                                 x86_patch (is_not_zero_check, code);
2915                                 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4500);
2916
2917                                 x86_patch (end_jump, code);
2918                         }
2919                         EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
2920                         break;
2921                 case OP_FBGE:
2922                 case OP_FBGE_UN:
2923                         if (cfg->opt & MONO_OPT_FCMOV) {
2924                                 EMIT_COND_BRANCH (ins, X86_CC_LE, FALSE);
2925                                 break;
2926                         }
2927                         EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
2928                         break;
2929                 case OP_FBLE:
2930                 case OP_FBLE_UN:
2931                         if (cfg->opt & MONO_OPT_FCMOV) {
2932                                 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
2933                                 EMIT_COND_BRANCH (ins, X86_CC_GE, FALSE);
2934                                 break;
2935                         }
2936                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x0100);
2937                         EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
2938                         break;
2939                 case CEE_CKFINITE: {
2940                         x86_push_reg (code, X86_EAX);
2941                         x86_fxam (code);
2942                         x86_fnstsw (code);
2943                         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4100);
2944                         x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x0100);
2945                         x86_pop_reg (code, X86_EAX);
2946                         EMIT_COND_SYSTEM_EXCEPTION (X86_CC_EQ, FALSE, "ArithmeticException");
2947                         break;
2948                 }
2949                 default:
2950                         g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
2951                         g_assert_not_reached ();
2952                 }
2953
2954                 if ((code - cfg->native_code - offset) > max_len) {
2955                         g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
2956                                    mono_inst_name (ins->opcode), max_len, code - cfg->native_code - offset);
2957                         g_assert_not_reached ();
2958                 }
2959
2960                 cpos += max_len;
2961
2962                 last_ins = ins;
2963                 last_offset = offset;
2964
2965                 ins = ins->next;
2966         }
2967
2968         cfg->code_len = code - cfg->native_code;
2969 }
2970
2971 void
2972 mono_arch_register_lowlevel_calls (void)
2973 {
2974         mono_register_jit_icall (enter_method, "mono_enter_method", NULL, TRUE);
2975         mono_register_jit_icall (leave_method, "mono_leave_method", NULL, TRUE);
2976 }
2977
2978 void
2979 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji)
2980 {
2981         MonoJumpInfo *patch_info;
2982
2983         for (patch_info = ji; patch_info; patch_info = patch_info->next) {
2984                 unsigned char *ip = patch_info->ip.i + code;
2985                 const unsigned char *target = NULL;
2986
2987                 switch (patch_info->type) {
2988                 case MONO_PATCH_INFO_BB:
2989                         target = patch_info->data.bb->native_offset + code;
2990                         break;
2991                 case MONO_PATCH_INFO_ABS:
2992                         target = patch_info->data.target;
2993                         break;
2994                 case MONO_PATCH_INFO_LABEL:
2995                         target = patch_info->data.inst->inst_c0 + code;
2996                         break;
2997                 case MONO_PATCH_INFO_IP:
2998                         *((gpointer *)(ip)) = ip;
2999                         continue;
3000                 case MONO_PATCH_INFO_INTERNAL_METHOD: {
3001                         MonoJitICallInfo *mi = mono_find_jit_icall_by_name (patch_info->data.name);
3002                         if (!mi) {
3003                                 g_warning ("unknown MONO_PATCH_INFO_INTERNAL_METHOD %s", patch_info->data.name);
3004                                 g_assert_not_reached ();
3005                         }
3006                         target = mono_icall_get_wrapper (mi);
3007                         break;
3008                 }
3009                 case MONO_PATCH_INFO_METHOD_JUMP:
3010                         /* get the trampoline to the method from the domain */
3011                         if (!(target = g_hash_table_lookup (domain->jit_code_hash, patch_info->data.method))) {
3012                                 GSList *list;
3013                                 target = mono_arch_create_jump_trampoline (patch_info->data.method);
3014                                 if (!domain->jump_target_hash)
3015                                         domain->jump_target_hash = g_hash_table_new (NULL, NULL);
3016                                 list = g_hash_table_lookup (domain->jump_target_hash, patch_info->data.method);
3017                                 list = g_slist_prepend (list, ip);
3018                                 g_hash_table_insert (domain->jump_target_hash, patch_info->data.method, list);
3019                         }
3020                         break;
3021                 case MONO_PATCH_INFO_METHOD:
3022                         if (patch_info->data.method == method) {
3023                                 target = code;
3024                         } else {
3025                                 /* get the trampoline to the method from the domain */
3026                                 if (!(target = g_hash_table_lookup (domain->jit_code_hash, patch_info->data.method)))
3027                                         target = mono_arch_create_jit_trampoline (patch_info->data.method);
3028                         }
3029                         break;
3030                 case MONO_PATCH_INFO_SWITCH: {
3031                         gpointer *table = (gpointer *)patch_info->data.target;
3032                         int i;
3033
3034                         *((gconstpointer *)(ip + 2)) = patch_info->data.target;
3035
3036                         for (i = 0; i < patch_info->table_size; i++) {
3037                                 table [i] = (int)patch_info->data.table [i] + code;
3038                         }
3039                         /* we put into the table the absolute address, no need fo x86_patch in this case */
3040                         continue;
3041                 }
3042                 case MONO_PATCH_INFO_METHODCONST:
3043                 case MONO_PATCH_INFO_CLASS:
3044                 case MONO_PATCH_INFO_IMAGE:
3045                 case MONO_PATCH_INFO_FIELD:
3046                         *((gconstpointer *)(ip + 1)) = patch_info->data.target;
3047                         continue;
3048                 case MONO_PATCH_INFO_R4:
3049                 case MONO_PATCH_INFO_R8:
3050                         *((gconstpointer *)(ip + 2)) = patch_info->data.target;
3051                         continue;
3052                 default:
3053                         g_assert_not_reached ();
3054                 }
3055                 x86_patch (ip, target);
3056         }
3057 }
3058
3059 int
3060 mono_arch_max_epilog_size (MonoCompile *cfg)
3061 {
3062         int exc_count = 0, max_epilog_size = 16;
3063         MonoJumpInfo *patch_info;
3064
3065         if (cfg->method->save_lmf)
3066                 max_epilog_size += 128;
3067
3068         if (mono_jit_trace_calls)
3069                 max_epilog_size += 50;
3070
3071         if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
3072                 max_epilog_size += 50;
3073
3074         /* count the number of exception infos */
3075
3076         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3077                 if (patch_info->type == MONO_PATCH_INFO_EXC)
3078                         exc_count++;
3079         }
3080
3081         /*
3082          * make sure we have enough space for exceptions
3083          * 16 is the size of two push_imm instructions and a call
3084          */
3085         max_epilog_size += exc_count*16;
3086
3087         return max_epilog_size;
3088 }
3089
3090 guint8 *
3091 mono_arch_emit_prolog (MonoCompile *cfg)
3092 {
3093         MonoMethod *method = cfg->method;
3094         MonoBasicBlock *bb;
3095         MonoMethodSignature *sig;
3096         MonoInst *inst;
3097         int alloc_size, pos, max_offset, i;
3098         guint8 *code;
3099
3100         cfg->code_size =  MAX (((MonoMethodNormal *)method)->header->code_size * 4, 256);
3101         code = cfg->native_code = g_malloc (cfg->code_size);
3102
3103         x86_push_reg (code, X86_EBP);
3104         x86_mov_reg_reg (code, X86_EBP, X86_ESP, 4);
3105
3106         alloc_size = - cfg->stack_offset;
3107         pos = 0;
3108
3109         if (method->save_lmf) {
3110                 pos += sizeof (MonoLMF);
3111
3112                 /* save the current IP */
3113                 mono_add_patch_info (cfg, code + 1 - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3114                 x86_push_imm (code, 0);
3115
3116                 /* save all caller saved regs */
3117                 x86_push_reg (code, X86_EBX);
3118                 x86_push_reg (code, X86_EDI);
3119                 x86_push_reg (code, X86_ESI);
3120                 x86_push_reg (code, X86_EBP);
3121
3122                 /* save method info */
3123                 x86_push_imm (code, method);
3124
3125                 /* get the address of lmf for the current thread */
3126                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3127                                      (gpointer)"mono_get_lmf_addr");
3128                 x86_call_code (code, 0);
3129
3130                 /* push lmf */
3131                 x86_push_reg (code, X86_EAX);
3132                 /* push *lfm (previous_lmf) */
3133                 x86_push_membase (code, X86_EAX, 0);
3134                 /* *(lmf) = ESP */
3135                 x86_mov_membase_reg (code, X86_EAX, 0, X86_ESP, 4);
3136         } else {
3137
3138                 if (cfg->used_int_regs & (1 << X86_EBX)) {
3139                         x86_push_reg (code, X86_EBX);
3140                         pos += 4;
3141                 }
3142
3143                 if (cfg->used_int_regs & (1 << X86_EDI)) {
3144                         x86_push_reg (code, X86_EDI);
3145                         pos += 4;
3146                 }
3147
3148                 if (cfg->used_int_regs & (1 << X86_ESI)) {
3149                         x86_push_reg (code, X86_ESI);
3150                         pos += 4;
3151                 }
3152         }
3153
3154         alloc_size -= pos;
3155
3156         if (alloc_size)
3157                 x86_alu_reg_imm (code, X86_SUB, X86_ESP, alloc_size);
3158
3159         /* compute max_offset in order to use short forward jumps */
3160         max_offset = 0;
3161         if (cfg->opt & MONO_OPT_BRANCH) {
3162                 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
3163                         MonoInst *ins = bb->code;
3164                         bb->max_offset = max_offset;
3165
3166                         if (cfg->prof_options & MONO_PROFILE_COVERAGE)
3167                                 max_offset += 6;
3168
3169                         while (ins) {
3170                                 max_offset += ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
3171                                 ins = ins->next;
3172                         }
3173                 }
3174         }
3175
3176         if (mono_jit_trace_calls)
3177                 code = mono_arch_instrument_prolog (cfg, enter_method, code, TRUE);
3178
3179         /* load arguments allocated to register from the stack */
3180         sig = method->signature;
3181         pos = 0;
3182
3183         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3184                 inst = cfg->varinfo [pos];
3185                 if (inst->opcode == OP_REGVAR) {
3186                         x86_mov_reg_membase (code, inst->dreg, X86_EBP, inst->inst_offset, 4);
3187                         if (cfg->verbose_level > 2)
3188                                 g_print ("Argument %d assigned to register %s\n", pos, mono_arch_regname (inst->dreg));
3189                 }
3190                 pos++;
3191         }
3192
3193         cfg->code_len = code - cfg->native_code;
3194
3195         return code;
3196 }
3197
3198 void
3199 mono_arch_emit_epilog (MonoCompile *cfg)
3200 {
3201         MonoJumpInfo *patch_info;
3202         MonoMethod *method = cfg->method;
3203         int pos;
3204         guint8 *code;
3205
3206         code = cfg->native_code + cfg->code_len;
3207
3208         if (mono_jit_trace_calls)
3209                 code = mono_arch_instrument_epilog (cfg, leave_method, code, TRUE);
3210
3211         /* the code restoring the registers must be kept in sync with CEE_JMP */
3212         pos = 0;
3213
3214         if (method->save_lmf) {
3215                 pos = -sizeof (MonoLMF);
3216         } else {
3217                 if (cfg->used_int_regs & (1 << X86_EBX)) {
3218                         pos -= 4;
3219                 }
3220                 if (cfg->used_int_regs & (1 << X86_EDI)) {
3221                         pos -= 4;
3222                 }
3223                 if (cfg->used_int_regs & (1 << X86_ESI)) {
3224                         pos -= 4;
3225                 }
3226         }
3227
3228         if (pos)
3229                 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
3230
3231         if (method->save_lmf) {
3232                 /* ebx = previous_lmf */
3233                 x86_pop_reg (code, X86_EBX);
3234                 /* edi = lmf */
3235                 x86_pop_reg (code, X86_EDI);
3236                 /* *(lmf) = previous_lmf */
3237                 x86_mov_membase_reg (code, X86_EDI, 0, X86_EBX, 4);
3238
3239                 /* discard method info */
3240                 x86_pop_reg (code, X86_ESI);
3241
3242                 /* restore caller saved regs */
3243                 x86_pop_reg (code, X86_EBP);
3244                 x86_pop_reg (code, X86_ESI);
3245                 x86_pop_reg (code, X86_EDI);
3246                 x86_pop_reg (code, X86_EBX);
3247
3248         } else {
3249
3250                 if (cfg->used_int_regs & (1 << X86_ESI)) {
3251                         x86_pop_reg (code, X86_ESI);
3252                 }
3253                 if (cfg->used_int_regs & (1 << X86_EDI)) {
3254                         x86_pop_reg (code, X86_EDI);
3255                 }
3256                 if (cfg->used_int_regs & (1 << X86_EBX)) {
3257                         x86_pop_reg (code, X86_EBX);
3258                 }
3259         }
3260
3261         x86_leave (code);
3262         /* FIXME: add another check to support stdcall convention here */
3263         if (MONO_TYPE_ISSTRUCT (cfg->method->signature->ret))
3264                 x86_ret_imm (code, 4);
3265         else
3266                 x86_ret (code);
3267
3268         /* add code to raise exceptions */
3269         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3270                 switch (patch_info->type) {
3271                 case MONO_PATCH_INFO_EXC:
3272                         x86_patch (patch_info->ip.i + cfg->native_code, code);
3273                         x86_push_imm (code, patch_info->data.target);
3274                         x86_push_imm (code, patch_info->ip.i + cfg->native_code);
3275                         patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
3276                         patch_info->data.name = "mono_arch_throw_exception_by_name";
3277                         patch_info->ip.i = code - cfg->native_code;
3278                         x86_jump_code (code, 0);
3279                         break;
3280                 default:
3281                         /* do nothing */
3282                         break;
3283                 }
3284         }
3285
3286         cfg->code_len = code - cfg->native_code;
3287
3288         g_assert (cfg->code_len < cfg->code_size);
3289
3290 }
3291
3292 void
3293 mono_arch_flush_icache (guint8 *code, gint size)
3294 {
3295         /* not needed */
3296 }
3297