2 * mini-x86.c: x86 backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
9 * (C) 2003 Ximian, Inc.
18 #include <mono/metadata/appdomain.h>
19 #include <mono/metadata/debug-helpers.h>
20 #include <mono/metadata/threads.h>
21 #include <mono/metadata/profiler-private.h>
22 #include <mono/metadata/mono-debug.h>
23 #include <mono/utils/mono-math.h>
30 /* On windows, these hold the key returned by TlsAlloc () */
31 static gint lmf_tls_offset = -1;
32 static gint lmf_addr_tls_offset = -1;
33 static gint appdomain_tls_offset = -1;
34 static gint thread_tls_offset = -1;
37 static gboolean optimize_for_xen = TRUE;
39 #define optimize_for_xen 0
43 static gboolean is_win32 = TRUE;
45 static gboolean is_win32 = FALSE;
48 /* This mutex protects architecture specific caches */
49 #define mono_mini_arch_lock() EnterCriticalSection (&mini_arch_mutex)
50 #define mono_mini_arch_unlock() LeaveCriticalSection (&mini_arch_mutex)
51 static CRITICAL_SECTION mini_arch_mutex;
53 #define ALIGN_TO(val,align) ((((guint64)val) + ((align) - 1)) & ~((align) - 1))
58 /* Under windows, the default pinvoke calling convention is stdcall */
59 #define CALLCONV_IS_STDCALL(sig) ((((sig)->call_convention) == MONO_CALL_STDCALL) || ((sig)->pinvoke && ((sig)->call_convention) == MONO_CALL_DEFAULT))
61 #define CALLCONV_IS_STDCALL(sig) (((sig)->call_convention) == MONO_CALL_STDCALL)
65 mono_breakpoint_info [MONO_BREAKPOINT_ARRAY_SIZE];
68 mono_arch_regname (int reg)
71 case X86_EAX: return "%eax";
72 case X86_EBX: return "%ebx";
73 case X86_ECX: return "%ecx";
74 case X86_EDX: return "%edx";
75 case X86_ESP: return "%esp";
76 case X86_EBP: return "%ebp";
77 case X86_EDI: return "%edi";
78 case X86_ESI: return "%esi";
84 mono_arch_fregname (int reg)
124 /* Only if storage == ArgValuetypeInReg */
125 ArgStorage pair_storage [2];
134 gboolean need_stack_align;
135 guint32 stack_align_amount;
143 #define FLOAT_PARAM_REGS 0
145 static X86_Reg_No param_regs [] = { 0 };
147 #if defined(PLATFORM_WIN32) || defined(__APPLE__) || defined(__FreeBSD__)
148 #define SMALL_STRUCTS_IN_REGS
149 static X86_Reg_No return_regs [] = { X86_EAX, X86_EDX };
153 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo)
155 ainfo->offset = *stack_size;
157 if (*gr >= PARAM_REGS) {
158 ainfo->storage = ArgOnStack;
159 (*stack_size) += sizeof (gpointer);
162 ainfo->storage = ArgInIReg;
163 ainfo->reg = param_regs [*gr];
169 add_general_pair (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo)
171 ainfo->offset = *stack_size;
173 g_assert (PARAM_REGS == 0);
175 ainfo->storage = ArgOnStack;
176 (*stack_size) += sizeof (gpointer) * 2;
180 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean is_double)
182 ainfo->offset = *stack_size;
184 if (*gr >= FLOAT_PARAM_REGS) {
185 ainfo->storage = ArgOnStack;
186 (*stack_size) += is_double ? 8 : 4;
189 /* A double register */
191 ainfo->storage = ArgInDoubleSSEReg;
193 ainfo->storage = ArgInFloatSSEReg;
201 add_valuetype (MonoGenericSharingContext *gsctx, MonoMethodSignature *sig, ArgInfo *ainfo, MonoType *type,
203 guint32 *gr, guint32 *fr, guint32 *stack_size)
208 klass = mono_class_from_mono_type (type);
209 size = mini_type_stack_size_full (gsctx, &klass->byval_arg, NULL, sig->pinvoke);
211 #ifdef SMALL_STRUCTS_IN_REGS
212 if (sig->pinvoke && is_return) {
213 MonoMarshalType *info;
216 * the exact rules are not very well documented, the code below seems to work with the
217 * code generated by gcc 3.3.3 -mno-cygwin.
219 info = mono_marshal_load_type_info (klass);
222 ainfo->pair_storage [0] = ainfo->pair_storage [1] = ArgNone;
224 /* Special case structs with only a float member */
225 if ((info->native_size == 8) && (info->num_fields == 1) && (info->fields [0].field->type->type == MONO_TYPE_R8)) {
226 ainfo->storage = ArgValuetypeInReg;
227 ainfo->pair_storage [0] = ArgOnDoubleFpStack;
230 if ((info->native_size == 4) && (info->num_fields == 1) && (info->fields [0].field->type->type == MONO_TYPE_R4)) {
231 ainfo->storage = ArgValuetypeInReg;
232 ainfo->pair_storage [0] = ArgOnFloatFpStack;
235 if ((info->native_size == 1) || (info->native_size == 2) || (info->native_size == 4) || (info->native_size == 8)) {
236 ainfo->storage = ArgValuetypeInReg;
237 ainfo->pair_storage [0] = ArgInIReg;
238 ainfo->pair_regs [0] = return_regs [0];
239 if (info->native_size > 4) {
240 ainfo->pair_storage [1] = ArgInIReg;
241 ainfo->pair_regs [1] = return_regs [1];
248 ainfo->offset = *stack_size;
249 ainfo->storage = ArgOnStack;
250 *stack_size += ALIGN_TO (size, sizeof (gpointer));
256 * Obtain information about a call according to the calling convention.
257 * For x86 ELF, see the "System V Application Binary Interface Intel386
258 * Architecture Processor Supplment, Fourth Edition" document for more
260 * For x86 win32, see ???.
263 get_call_info (MonoGenericSharingContext *gsctx, MonoMemPool *mp, MonoMethodSignature *sig, gboolean is_pinvoke)
267 int n = sig->hasthis + sig->param_count;
268 guint32 stack_size = 0;
272 cinfo = mono_mempool_alloc0 (mp, sizeof (CallInfo) + (sizeof (ArgInfo) * n));
274 cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
281 ret_type = mini_type_get_underlying_type (gsctx, sig->ret);
282 switch (ret_type->type) {
283 case MONO_TYPE_BOOLEAN:
294 case MONO_TYPE_FNPTR:
295 case MONO_TYPE_CLASS:
296 case MONO_TYPE_OBJECT:
297 case MONO_TYPE_SZARRAY:
298 case MONO_TYPE_ARRAY:
299 case MONO_TYPE_STRING:
300 cinfo->ret.storage = ArgInIReg;
301 cinfo->ret.reg = X86_EAX;
305 cinfo->ret.storage = ArgInIReg;
306 cinfo->ret.reg = X86_EAX;
309 cinfo->ret.storage = ArgOnFloatFpStack;
312 cinfo->ret.storage = ArgOnDoubleFpStack;
314 case MONO_TYPE_GENERICINST:
315 if (!mono_type_generic_inst_is_valuetype (sig->ret)) {
316 cinfo->ret.storage = ArgInIReg;
317 cinfo->ret.reg = X86_EAX;
321 case MONO_TYPE_VALUETYPE: {
322 guint32 tmp_gr = 0, tmp_fr = 0, tmp_stacksize = 0;
324 add_valuetype (gsctx, sig, &cinfo->ret, sig->ret, TRUE, &tmp_gr, &tmp_fr, &tmp_stacksize);
325 if (cinfo->ret.storage == ArgOnStack)
326 /* The caller passes the address where the value is stored */
327 add_general (&gr, &stack_size, &cinfo->ret);
330 case MONO_TYPE_TYPEDBYREF:
331 /* Same as a valuetype with size 24 */
332 add_general (&gr, &stack_size, &cinfo->ret);
336 cinfo->ret.storage = ArgNone;
339 g_error ("Can't handle as return value 0x%x", sig->ret->type);
345 add_general (&gr, &stack_size, cinfo->args + 0);
347 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
349 fr = FLOAT_PARAM_REGS;
351 /* Emit the signature cookie just before the implicit arguments */
352 add_general (&gr, &stack_size, &cinfo->sig_cookie);
355 for (i = 0; i < sig->param_count; ++i) {
356 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
359 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
360 /* We allways pass the sig cookie on the stack for simplicity */
362 * Prevent implicit arguments + the sig cookie from being passed
366 fr = FLOAT_PARAM_REGS;
368 /* Emit the signature cookie just before the implicit arguments */
369 add_general (&gr, &stack_size, &cinfo->sig_cookie);
372 if (sig->params [i]->byref) {
373 add_general (&gr, &stack_size, ainfo);
376 ptype = mini_type_get_underlying_type (gsctx, sig->params [i]);
377 switch (ptype->type) {
378 case MONO_TYPE_BOOLEAN:
381 add_general (&gr, &stack_size, ainfo);
386 add_general (&gr, &stack_size, ainfo);
390 add_general (&gr, &stack_size, ainfo);
395 case MONO_TYPE_FNPTR:
396 case MONO_TYPE_CLASS:
397 case MONO_TYPE_OBJECT:
398 case MONO_TYPE_STRING:
399 case MONO_TYPE_SZARRAY:
400 case MONO_TYPE_ARRAY:
401 add_general (&gr, &stack_size, ainfo);
403 case MONO_TYPE_GENERICINST:
404 if (!mono_type_generic_inst_is_valuetype (sig->params [i])) {
405 add_general (&gr, &stack_size, ainfo);
409 case MONO_TYPE_VALUETYPE:
410 add_valuetype (gsctx, sig, ainfo, sig->params [i], FALSE, &gr, &fr, &stack_size);
412 case MONO_TYPE_TYPEDBYREF:
413 stack_size += sizeof (MonoTypedRef);
414 ainfo->storage = ArgOnStack;
418 add_general_pair (&gr, &stack_size, ainfo);
421 add_float (&fr, &stack_size, ainfo, FALSE);
424 add_float (&fr, &stack_size, ainfo, TRUE);
427 g_error ("unexpected type 0x%x", ptype->type);
428 g_assert_not_reached ();
432 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
434 fr = FLOAT_PARAM_REGS;
436 /* Emit the signature cookie just before the implicit arguments */
437 add_general (&gr, &stack_size, &cinfo->sig_cookie);
440 #if defined(__APPLE__)
441 if ((stack_size % 16) != 0) {
442 cinfo->need_stack_align = TRUE;
443 stack_size += cinfo->stack_align_amount = 16-(stack_size % 16);
447 cinfo->stack_usage = stack_size;
448 cinfo->reg_usage = gr;
449 cinfo->freg_usage = fr;
454 * mono_arch_get_argument_info:
455 * @csig: a method signature
456 * @param_count: the number of parameters to consider
457 * @arg_info: an array to store the result infos
459 * Gathers information on parameters such as size, alignment and
460 * padding. arg_info should be large enought to hold param_count + 1 entries.
462 * Returns the size of the argument area on the stack.
465 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
467 int k, args_size = 0;
473 cinfo = get_call_info (NULL, NULL, csig, FALSE);
475 if (MONO_TYPE_ISSTRUCT (csig->ret) && (cinfo->ret.storage == ArgOnStack)) {
476 args_size += sizeof (gpointer);
480 arg_info [0].offset = offset;
483 args_size += sizeof (gpointer);
487 arg_info [0].size = args_size;
489 for (k = 0; k < param_count; k++) {
490 size = mini_type_stack_size_full (NULL, csig->params [k], &align, csig->pinvoke);
492 /* ignore alignment for now */
495 args_size += pad = (align - (args_size & (align - 1))) & (align - 1);
496 arg_info [k].pad = pad;
498 arg_info [k + 1].pad = 0;
499 arg_info [k + 1].size = size;
501 arg_info [k + 1].offset = offset;
506 args_size += pad = (align - (args_size & (align - 1))) & (align - 1);
507 arg_info [k].pad = pad;
514 static const guchar cpuid_impl [] = {
515 0x55, /* push %ebp */
516 0x89, 0xe5, /* mov %esp,%ebp */
517 0x53, /* push %ebx */
518 0x8b, 0x45, 0x08, /* mov 0x8(%ebp),%eax */
519 0x0f, 0xa2, /* cpuid */
520 0x50, /* push %eax */
521 0x8b, 0x45, 0x10, /* mov 0x10(%ebp),%eax */
522 0x89, 0x18, /* mov %ebx,(%eax) */
523 0x8b, 0x45, 0x14, /* mov 0x14(%ebp),%eax */
524 0x89, 0x08, /* mov %ecx,(%eax) */
525 0x8b, 0x45, 0x18, /* mov 0x18(%ebp),%eax */
526 0x89, 0x10, /* mov %edx,(%eax) */
528 0x8b, 0x55, 0x0c, /* mov 0xc(%ebp),%edx */
529 0x89, 0x02, /* mov %eax,(%edx) */
535 typedef void (*CpuidFunc) (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx);
538 cpuid (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx)
542 __asm__ __volatile__ (
545 "movl %%eax, %%edx\n"
546 "xorl $0x200000, %%eax\n"
551 "xorl %%edx, %%eax\n"
552 "andl $0x200000, %%eax\n"
574 /* Have to use the code manager to get around WinXP DEP */
575 static CpuidFunc func = NULL;
578 ptr = mono_global_codeman_reserve (sizeof (cpuid_impl));
579 memcpy (ptr, cpuid_impl, sizeof (cpuid_impl));
580 func = (CpuidFunc)ptr;
582 func (id, p_eax, p_ebx, p_ecx, p_edx);
585 * We use this approach because of issues with gcc and pic code, see:
586 * http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=7329
587 __asm__ __volatile__ ("cpuid"
588 : "=a" (*p_eax), "=b" (*p_ebx), "=c" (*p_ecx), "=d" (*p_edx)
597 * Initialize the cpu to execute managed code.
600 mono_arch_cpu_init (void)
602 /* spec compliance requires running with double precision */
606 __asm__ __volatile__ ("fnstcw %0\n": "=m" (fpcw));
607 fpcw &= ~X86_FPCW_PRECC_MASK;
608 fpcw |= X86_FPCW_PREC_DOUBLE;
609 __asm__ __volatile__ ("fldcw %0\n": : "m" (fpcw));
610 __asm__ __volatile__ ("fnstcw %0\n": "=m" (fpcw));
612 _control87 (_PC_53, MCW_PC);
617 * Initialize architecture specific code.
620 mono_arch_init (void)
622 InitializeCriticalSection (&mini_arch_mutex);
626 * Cleanup architecture specific code.
629 mono_arch_cleanup (void)
631 DeleteCriticalSection (&mini_arch_mutex);
635 * This function returns the optimizations supported on this cpu.
638 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
640 int eax, ebx, ecx, edx;
644 /* Feature Flags function, flags returned in EDX. */
645 if (cpuid (1, &eax, &ebx, &ecx, &edx)) {
646 if (edx & (1 << 15)) {
647 opts |= MONO_OPT_CMOV;
649 opts |= MONO_OPT_FCMOV;
651 *exclude_mask |= MONO_OPT_FCMOV;
653 *exclude_mask |= MONO_OPT_CMOV;
655 opts |= MONO_OPT_SSE2;
657 *exclude_mask |= MONO_OPT_SSE2;
663 * Determine whenever the trap whose info is in SIGINFO is caused by
667 mono_arch_is_int_overflow (void *sigctx, void *info)
672 mono_arch_sigctx_to_monoctx (sigctx, &ctx);
674 ip = (guint8*)ctx.eip;
676 if ((ip [0] == 0xf7) && (x86_modrm_mod (ip [1]) == 0x3) && (x86_modrm_reg (ip [1]) == 0x7)) {
680 switch (x86_modrm_rm (ip [1])) {
700 g_assert_not_reached ();
712 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
717 for (i = 0; i < cfg->num_varinfo; i++) {
718 MonoInst *ins = cfg->varinfo [i];
719 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
722 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
725 if ((ins->flags & (MONO_INST_IS_DEAD|MONO_INST_VOLATILE|MONO_INST_INDIRECT)) ||
726 (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
729 /* we dont allocate I1 to registers because there is no simply way to sign extend
730 * 8bit quantities in caller saved registers on x86 */
731 if (mono_is_regsize_var (ins->inst_vtype) && (ins->inst_vtype->type != MONO_TYPE_I1)) {
732 g_assert (MONO_VARINFO (cfg, i)->reg == -1);
733 g_assert (i == vmv->idx);
734 vars = g_list_prepend (vars, vmv);
738 vars = mono_varlist_sort (cfg, vars, 0);
744 mono_arch_get_global_int_regs (MonoCompile *cfg)
748 /* we can use 3 registers for global allocation */
749 regs = g_list_prepend (regs, (gpointer)X86_EBX);
750 regs = g_list_prepend (regs, (gpointer)X86_ESI);
751 regs = g_list_prepend (regs, (gpointer)X86_EDI);
757 * mono_arch_regalloc_cost:
759 * Return the cost, in number of memory references, of the action of
760 * allocating the variable VMV into a register during global register
764 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
766 MonoInst *ins = cfg->varinfo [vmv->idx];
768 if (cfg->method->save_lmf)
769 /* The register is already saved */
770 return (ins->opcode == OP_ARG) ? 1 : 0;
772 /* push+pop+possible load if it is an argument */
773 return (ins->opcode == OP_ARG) ? 3 : 2;
777 * Set var information according to the calling convention. X86 version.
778 * The locals var stuff should most likely be split in another method.
781 mono_arch_allocate_vars (MonoCompile *cfg)
783 MonoMethodSignature *sig;
784 MonoMethodHeader *header;
786 guint32 locals_stack_size, locals_stack_align;
791 header = mono_method_get_header (cfg->method);
792 sig = mono_method_signature (cfg->method);
794 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
796 cfg->frame_reg = MONO_ARCH_BASEREG;
799 /* Reserve space to save LMF and caller saved registers */
801 if (cfg->method->save_lmf) {
802 offset += sizeof (MonoLMF);
804 if (cfg->used_int_regs & (1 << X86_EBX)) {
808 if (cfg->used_int_regs & (1 << X86_EDI)) {
812 if (cfg->used_int_regs & (1 << X86_ESI)) {
817 switch (cinfo->ret.storage) {
818 case ArgValuetypeInReg:
819 /* Allocate a local to hold the result, the epilog will copy it to the correct place */
821 cfg->ret->opcode = OP_REGOFFSET;
822 cfg->ret->inst_basereg = X86_EBP;
823 cfg->ret->inst_offset = - offset;
829 /* Allocate locals */
830 offsets = mono_allocate_stack_slots (cfg, &locals_stack_size, &locals_stack_align);
831 if (locals_stack_align) {
832 offset += (locals_stack_align - 1);
833 offset &= ~(locals_stack_align - 1);
835 for (i = cfg->locals_start; i < cfg->num_varinfo; i++) {
836 if (offsets [i] != -1) {
837 MonoInst *inst = cfg->varinfo [i];
838 inst->opcode = OP_REGOFFSET;
839 inst->inst_basereg = X86_EBP;
840 inst->inst_offset = - (offset + offsets [i]);
841 //printf ("allocated local %d to ", i); mono_print_tree_nl (inst);
844 offset += locals_stack_size;
848 * Allocate arguments+return value
851 switch (cinfo->ret.storage) {
853 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
855 * In the new IR, the cfg->vret_addr variable represents the
856 * vtype return value.
858 cfg->vret_addr->opcode = OP_REGOFFSET;
859 cfg->vret_addr->inst_basereg = cfg->frame_reg;
860 cfg->vret_addr->inst_offset = cinfo->ret.offset + ARGS_OFFSET;
861 if (G_UNLIKELY (cfg->verbose_level > 1)) {
862 printf ("vret_addr =");
863 mono_print_ins (cfg->vret_addr);
866 cfg->ret->opcode = OP_REGOFFSET;
867 cfg->ret->inst_basereg = X86_EBP;
868 cfg->ret->inst_offset = cinfo->ret.offset + ARGS_OFFSET;
871 case ArgValuetypeInReg:
874 cfg->ret->opcode = OP_REGVAR;
875 cfg->ret->inst_c0 = cinfo->ret.reg;
876 cfg->ret->dreg = cinfo->ret.reg;
879 case ArgOnFloatFpStack:
880 case ArgOnDoubleFpStack:
883 g_assert_not_reached ();
886 if (sig->call_convention == MONO_CALL_VARARG) {
887 g_assert (cinfo->sig_cookie.storage == ArgOnStack);
888 cfg->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
891 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
892 ArgInfo *ainfo = &cinfo->args [i];
893 inst = cfg->args [i];
894 if (inst->opcode != OP_REGVAR) {
895 inst->opcode = OP_REGOFFSET;
896 inst->inst_basereg = X86_EBP;
898 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
901 offset += (MONO_ARCH_FRAME_ALIGNMENT - 1);
902 offset &= ~(MONO_ARCH_FRAME_ALIGNMENT - 1);
904 cfg->stack_offset = offset;
908 mono_arch_create_vars (MonoCompile *cfg)
910 MonoMethodSignature *sig;
913 sig = mono_method_signature (cfg->method);
915 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
917 if (cinfo->ret.storage == ArgValuetypeInReg)
918 cfg->ret_var_is_local = TRUE;
919 if ((cinfo->ret.storage != ArgValuetypeInReg) && MONO_TYPE_ISSTRUCT (sig->ret)) {
920 cfg->vret_addr = mono_compile_create_var (cfg, &mono_defaults.int_class->byval_arg, OP_ARG);
925 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call)
928 MonoMethodSignature *tmp_sig;
931 /* FIXME: Add support for signature tokens to AOT */
932 cfg->disable_aot = TRUE;
933 MONO_INST_NEW (cfg, arg, OP_OUTARG);
936 * mono_ArgIterator_Setup assumes the signature cookie is
937 * passed first and all the arguments which were before it are
938 * passed on the stack after the signature. So compensate by
939 * passing a different signature.
941 tmp_sig = mono_metadata_signature_dup (call->signature);
942 tmp_sig->param_count -= call->signature->sentinelpos;
943 tmp_sig->sentinelpos = 0;
944 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
946 MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
947 sig_arg->inst_p0 = tmp_sig;
949 arg->inst_left = sig_arg;
950 arg->type = STACK_PTR;
951 /* prepend, so they get reversed */
952 arg->next = call->out_args;
953 call->out_args = arg;
957 * It is expensive to adjust esp for each individual fp argument pushed on the stack
958 * so we try to do it just once when we have multiple fp arguments in a row.
959 * We don't use this mechanism generally because for int arguments the generated code
960 * is slightly bigger and new generation cpus optimize away the dependency chains
961 * created by push instructions on the esp value.
962 * fp_arg_setup is the first argument in the execution sequence where the esp register
966 collect_fp_stack_space (MonoMethodSignature *sig, int start_arg, int *fp_arg_setup)
971 for (; start_arg < sig->param_count; ++start_arg) {
972 t = mini_type_get_underlying_type (NULL, sig->params [start_arg]);
973 if (!t->byref && t->type == MONO_TYPE_R8) {
974 fp_space += sizeof (double);
975 *fp_arg_setup = start_arg;
984 * take the arguments and generate the arch-specific
985 * instructions to properly call the function in call.
986 * This includes pushing, moving arguments to the right register
990 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
992 MonoMethodSignature *sig;
996 int fp_args_space = 0, fp_args_offset = 0, fp_arg_setup = -1;
998 sig = call->signature;
999 n = sig->param_count + sig->hasthis;
1001 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
1003 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG))
1004 sentinelpos = sig->sentinelpos + (is_virtual ? 1 : 0);
1006 for (i = 0; i < n; ++i) {
1007 ArgInfo *ainfo = cinfo->args + i;
1009 /* Emit the signature cookie just before the implicit arguments */
1010 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sentinelpos)) {
1011 emit_sig_cookie (cfg, call);
1014 if (is_virtual && i == 0) {
1015 /* the argument will be attached to the call instrucion */
1016 in = call->args [i];
1020 if (i >= sig->hasthis)
1021 t = sig->params [i - sig->hasthis];
1023 t = &mono_defaults.int_class->byval_arg;
1024 t = mini_type_get_underlying_type (cfg->generic_sharing_context, t);
1026 MONO_INST_NEW (cfg, arg, OP_OUTARG);
1027 in = call->args [i];
1028 arg->cil_code = in->cil_code;
1029 arg->inst_left = in;
1030 arg->type = in->type;
1031 /* prepend, so they get reversed */
1032 arg->next = call->out_args;
1033 call->out_args = arg;
1035 if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(t))) {
1040 if (t->type == MONO_TYPE_TYPEDBYREF) {
1041 size = sizeof (MonoTypedRef);
1042 align = sizeof (gpointer);
1045 size = mini_type_stack_size_full (cfg->generic_sharing_context, &in->klass->byval_arg, &ialign, sig->pinvoke);
1047 arg->opcode = OP_OUTARG_VT;
1048 arg->klass = in->klass;
1049 arg->backend.is_pinvoke = sig->pinvoke;
1050 arg->inst_imm = size;
1053 switch (ainfo->storage) {
1055 arg->opcode = OP_OUTARG;
1057 if (t->type == MONO_TYPE_R4) {
1058 arg->opcode = OP_OUTARG_R4;
1059 } else if (t->type == MONO_TYPE_R8) {
1060 arg->opcode = OP_OUTARG_R8;
1061 /* we store in the upper bits of backen.arg_info the needed
1062 * esp adjustment and in the lower bits the offset from esp
1063 * where the arg needs to be stored
1065 if (!fp_args_space) {
1066 fp_args_space = collect_fp_stack_space (sig, i - sig->hasthis, &fp_arg_setup);
1067 fp_args_offset = fp_args_space;
1069 arg->backend.arg_info = fp_args_space - fp_args_offset;
1070 fp_args_offset -= sizeof (double);
1071 if (i - sig->hasthis == fp_arg_setup) {
1072 arg->backend.arg_info |= fp_args_space << 16;
1074 if (fp_args_offset == 0) {
1075 /* the allocated esp stack is finished:
1076 * prepare for an eventual second run of fp args
1084 g_assert_not_reached ();
1090 /* Handle the case where there are no implicit arguments */
1091 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sentinelpos)) {
1092 emit_sig_cookie (cfg, call);
1095 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1096 if (cinfo->ret.storage == ArgValuetypeInReg) {
1097 MonoInst *zero_inst;
1099 * After the call, the struct is in registers, but needs to be saved to the memory pointed
1100 * to by vt_arg in this_vret_args. This means that vt_arg needs to be saved somewhere
1101 * before calling the function. So we add a dummy instruction to represent pushing the
1102 * struct return address to the stack. The return address will be saved to this stack slot
1103 * by the code emitted in this_vret_args.
1105 MONO_INST_NEW (cfg, arg, OP_OUTARG);
1106 MONO_INST_NEW (cfg, zero_inst, OP_ICONST);
1107 zero_inst->inst_p0 = 0;
1108 arg->inst_left = zero_inst;
1109 arg->type = STACK_PTR;
1110 /* prepend, so they get reversed */
1111 arg->next = call->out_args;
1112 call->out_args = arg;
1115 /* if the function returns a struct, the called method already does a ret $0x4 */
1116 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret))
1117 cinfo->stack_usage -= 4;
1120 call->stack_usage = cinfo->stack_usage;
1122 #if defined(__APPLE__)
1123 if (cinfo->need_stack_align) {
1124 MONO_INST_NEW (cfg, arg, OP_X86_OUTARG_ALIGN_STACK);
1125 arg->inst_c0 = cinfo->stack_align_amount;
1126 arg->next = call->out_args;
1127 call->out_args = arg;
1135 emit_sig_cookie2 (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo)
1137 MonoMethodSignature *tmp_sig;
1139 /* FIXME: Add support for signature tokens to AOT */
1140 cfg->disable_aot = TRUE;
1143 * mono_ArgIterator_Setup assumes the signature cookie is
1144 * passed first and all the arguments which were before it are
1145 * passed on the stack after the signature. So compensate by
1146 * passing a different signature.
1148 tmp_sig = mono_metadata_signature_dup (call->signature);
1149 tmp_sig->param_count -= call->signature->sentinelpos;
1150 tmp_sig->sentinelpos = 0;
1151 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1153 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_X86_PUSH_IMM, -1, -1, tmp_sig);
1157 mono_arch_emit_call (MonoCompile *cfg, MonoCallInst *call)
1160 MonoMethodSignature *sig;
1163 int sentinelpos = 0;
1165 sig = call->signature;
1166 n = sig->param_count + sig->hasthis;
1168 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
1170 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG))
1171 sentinelpos = sig->sentinelpos + (sig->hasthis ? 1 : 0);
1173 #if defined(__APPLE__)
1174 if (cinfo->need_stack_align) {
1175 MONO_INST_NEW (cfg, arg, OP_SUB_IMM);
1176 arg->dreg = X86_ESP;
1177 arg->sreg1 = X86_ESP;
1178 arg->inst_imm = cinfo->stack_align_amount;
1179 MONO_ADD_INS (cfg->cbb, arg);
1183 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1186 if (cinfo->ret.storage == ArgValuetypeInReg) {
1187 if (cinfo->ret.pair_storage [0] == ArgInIReg && cinfo->ret.pair_storage [1] == ArgNone) {
1189 * Tell the JIT to use a more efficient calling convention: call using
1190 * OP_CALL, compute the result location after the call, and save the
1193 call->vret_in_reg = TRUE;
1196 * The valuetype is in EAX:EDX after the call, needs to be copied to
1197 * the stack. Save the address here, so the call instruction can
1200 MONO_INST_NEW (cfg, vtarg, OP_X86_PUSH);
1201 vtarg->sreg1 = call->vret_var->dreg;
1202 MONO_ADD_INS (cfg->cbb, vtarg);
1207 /* Handle the case where there are no implicit arguments */
1208 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sentinelpos)) {
1209 emit_sig_cookie2 (cfg, call, cinfo);
1212 /* Arguments are pushed in the reverse order */
1213 for (i = n - 1; i >= 0; i --) {
1214 ArgInfo *ainfo = cinfo->args + i;
1217 if (i >= sig->hasthis)
1218 t = sig->params [i - sig->hasthis];
1220 t = &mono_defaults.int_class->byval_arg;
1221 t = mini_type_get_underlying_type (cfg->generic_sharing_context, t);
1223 MONO_INST_NEW (cfg, arg, OP_X86_PUSH);
1225 in = call->args [i];
1226 arg->cil_code = in->cil_code;
1227 arg->sreg1 = in->dreg;
1228 arg->type = in->type;
1230 g_assert (in->dreg != -1);
1232 if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(t))) {
1236 g_assert (in->klass);
1238 if (t->type == MONO_TYPE_TYPEDBYREF) {
1239 size = sizeof (MonoTypedRef);
1240 align = sizeof (gpointer);
1243 size = mini_type_stack_size_full (cfg->generic_sharing_context, &in->klass->byval_arg, &align, sig->pinvoke);
1247 arg->opcode = OP_OUTARG_VT;
1248 arg->sreg1 = in->dreg;
1249 arg->klass = in->klass;
1250 arg->backend.size = size;
1252 MONO_ADD_INS (cfg->cbb, arg);
1256 switch (ainfo->storage) {
1258 arg->opcode = OP_X86_PUSH;
1260 if (t->type == MONO_TYPE_R4) {
1261 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
1262 arg->opcode = OP_STORER4_MEMBASE_REG;
1263 arg->inst_destbasereg = X86_ESP;
1264 arg->inst_offset = 0;
1265 } else if (t->type == MONO_TYPE_R8) {
1266 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
1267 arg->opcode = OP_STORER8_MEMBASE_REG;
1268 arg->inst_destbasereg = X86_ESP;
1269 arg->inst_offset = 0;
1270 } else if (t->type == MONO_TYPE_I8 || t->type == MONO_TYPE_U8) {
1272 MONO_EMIT_NEW_UNALU (cfg, OP_X86_PUSH, -1, in->dreg + 2);
1277 g_assert_not_reached ();
1280 MONO_ADD_INS (cfg->cbb, arg);
1283 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sentinelpos)) {
1284 /* Emit the signature cookie just before the implicit arguments */
1285 emit_sig_cookie2 (cfg, call, cinfo);
1289 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1292 if (cinfo->ret.storage == ArgValuetypeInReg) {
1295 else if (cinfo->ret.storage == ArgInIReg) {
1297 /* The return address is passed in a register */
1298 MONO_INST_NEW (cfg, vtarg, OP_MOVE);
1299 vtarg->sreg1 = call->inst.dreg;
1300 vtarg->dreg = mono_regstate_next_int (cfg->rs);
1301 MONO_ADD_INS (cfg->cbb, vtarg);
1303 mono_call_inst_add_outarg_reg (cfg, call, vtarg->dreg, cinfo->ret.reg, FALSE);
1306 MONO_INST_NEW (cfg, vtarg, OP_X86_PUSH);
1307 vtarg->type = STACK_MP;
1308 vtarg->sreg1 = call->vret_var->dreg;
1309 MONO_ADD_INS (cfg->cbb, vtarg);
1312 /* if the function returns a struct, the called method already does a ret $0x4 */
1313 cinfo->stack_usage -= 4;
1316 call->stack_usage = cinfo->stack_usage;
1320 mono_arch_emit_outarg_vt (MonoCompile *cfg, MonoInst *ins, MonoInst *src)
1323 int size = ins->backend.size;
1326 MONO_INST_NEW (cfg, arg, OP_X86_PUSH_MEMBASE);
1327 arg->sreg1 = src->dreg;
1329 MONO_ADD_INS (cfg->cbb, arg);
1330 } else if (size <= 20) {
1331 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SUB_IMM, X86_ESP, X86_ESP, ALIGN_TO (size, 4));
1332 mini_emit_memcpy2 (cfg, X86_ESP, 0, src->dreg, 0, size, 4);
1334 MONO_INST_NEW (cfg, arg, OP_X86_PUSH_OBJ);
1335 arg->inst_basereg = src->dreg;
1336 arg->inst_offset = 0;
1337 arg->inst_imm = size;
1339 MONO_ADD_INS (cfg->cbb, arg);
1344 mono_arch_emit_setret (MonoCompile *cfg, MonoMethod *method, MonoInst *val)
1346 MonoType *ret = mini_type_get_underlying_type (cfg->generic_sharing_context, mono_method_signature (method)->ret);
1349 if (ret->type == MONO_TYPE_R4) {
1352 } else if (ret->type == MONO_TYPE_R8) {
1355 } else if (ret->type == MONO_TYPE_I8 || ret->type == MONO_TYPE_U8) {
1356 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, X86_EAX, val->dreg + 1);
1357 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, X86_EDX, val->dreg + 2);
1362 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg, val->dreg);
1366 * Allow tracing to work with this interface (with an optional argument)
1369 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
1374 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1377 /* if some args are passed in registers, we need to save them here */
1378 x86_push_reg (code, X86_EBP);
1380 if (cfg->compile_aot) {
1381 x86_push_imm (code, cfg->method);
1382 x86_mov_reg_imm (code, X86_EAX, func);
1383 x86_call_reg (code, X86_EAX);
1385 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, cfg->method);
1386 x86_push_imm (code, cfg->method);
1387 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
1388 x86_call_code (code, 0);
1391 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 16);
1393 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1408 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
1411 int arg_size = 0, save_mode = SAVE_NONE;
1412 MonoMethod *method = cfg->method;
1414 switch (mini_type_get_underlying_type (cfg->generic_sharing_context, mono_method_signature (method)->ret)->type) {
1415 case MONO_TYPE_VOID:
1416 /* special case string .ctor icall */
1417 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
1418 save_mode = SAVE_EAX;
1420 save_mode = SAVE_NONE;
1424 save_mode = SAVE_EAX_EDX;
1428 save_mode = SAVE_FP;
1430 case MONO_TYPE_GENERICINST:
1431 if (!mono_type_generic_inst_is_valuetype (mono_method_signature (method)->ret)) {
1432 save_mode = SAVE_EAX;
1436 case MONO_TYPE_VALUETYPE:
1437 save_mode = SAVE_STRUCT;
1440 save_mode = SAVE_EAX;
1444 switch (save_mode) {
1446 x86_push_reg (code, X86_EDX);
1447 x86_push_reg (code, X86_EAX);
1448 if (enable_arguments) {
1449 x86_push_reg (code, X86_EDX);
1450 x86_push_reg (code, X86_EAX);
1455 x86_push_reg (code, X86_EAX);
1456 if (enable_arguments) {
1457 x86_push_reg (code, X86_EAX);
1462 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1463 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1464 if (enable_arguments) {
1465 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1466 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1471 if (enable_arguments) {
1472 x86_push_membase (code, X86_EBP, 8);
1481 if (cfg->compile_aot) {
1482 x86_push_imm (code, method);
1483 x86_mov_reg_imm (code, X86_EAX, func);
1484 x86_call_reg (code, X86_EAX);
1486 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, method);
1487 x86_push_imm (code, method);
1488 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
1489 x86_call_code (code, 0);
1491 x86_alu_reg_imm (code, X86_ADD, X86_ESP, arg_size + 4);
1493 switch (save_mode) {
1495 x86_pop_reg (code, X86_EAX);
1496 x86_pop_reg (code, X86_EDX);
1499 x86_pop_reg (code, X86_EAX);
1502 x86_fld_membase (code, X86_ESP, 0, TRUE);
1503 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1513 #define EMIT_COND_BRANCH(ins,cond,sign) \
1514 if (ins->flags & MONO_INST_BRLABEL) { \
1515 if (ins->inst_i0->inst_c0) { \
1516 x86_branch (code, cond, cfg->native_code + ins->inst_i0->inst_c0, sign); \
1518 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
1519 if ((cfg->opt & MONO_OPT_BRANCH) && \
1520 x86_is_imm8 (ins->inst_i0->inst_c1 - cpos)) \
1521 x86_branch8 (code, cond, 0, sign); \
1523 x86_branch32 (code, cond, 0, sign); \
1526 if (ins->inst_true_bb->native_offset) { \
1527 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
1529 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1530 if ((cfg->opt & MONO_OPT_BRANCH) && \
1531 x86_is_imm8 (ins->inst_true_bb->max_offset - cpos)) \
1532 x86_branch8 (code, cond, 0, sign); \
1534 x86_branch32 (code, cond, 0, sign); \
1539 * Emit an exception if condition is fail and
1540 * if possible do a directly branch to target
1542 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
1544 MonoInst *tins = mono_branch_optimize_exception_target (cfg, bb, exc_name); \
1545 if (tins == NULL) { \
1546 mono_add_patch_info (cfg, code - cfg->native_code, \
1547 MONO_PATCH_INFO_EXC, exc_name); \
1548 x86_branch32 (code, cond, 0, signed); \
1550 EMIT_COND_BRANCH (tins, cond, signed); \
1554 #define EMIT_FPCOMPARE(code) do { \
1555 x86_fcompp (code); \
1556 x86_fnstsw (code); \
1561 emit_call (MonoCompile *cfg, guint8 *code, guint32 patch_type, gconstpointer data)
1563 mono_add_patch_info (cfg, code - cfg->native_code, patch_type, data);
1564 x86_call_code (code, 0);
1569 #define INST_IGNORES_CFLAGS(opcode) (!(((opcode) == OP_ADC) || ((opcode) == OP_IADC) || ((opcode) == OP_ADC_IMM) || ((opcode) == OP_IADC_IMM) || ((opcode) == OP_SBB) || ((opcode) == OP_ISBB) || ((opcode) == OP_SBB_IMM) || ((opcode) == OP_ISBB_IMM)))
1572 * mono_peephole_pass_1:
1574 * Perform peephole opts which should/can be performed before local regalloc
1577 mono_arch_peephole_pass_1 (MonoCompile *cfg, MonoBasicBlock *bb)
1581 MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
1582 MonoInst *last_ins = ins->prev;
1584 switch (ins->opcode) {
1587 if ((ins->sreg1 < MONO_MAX_IREGS) && (ins->dreg >= MONO_MAX_IREGS)) {
1589 * X86_LEA is like ADD, but doesn't have the
1590 * sreg1==dreg restriction.
1592 ins->opcode = OP_X86_LEA_MEMBASE;
1593 ins->inst_basereg = ins->sreg1;
1594 } else if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1595 ins->opcode = OP_X86_INC_REG;
1599 if ((ins->sreg1 < MONO_MAX_IREGS) && (ins->dreg >= MONO_MAX_IREGS)) {
1600 ins->opcode = OP_X86_LEA_MEMBASE;
1601 ins->inst_basereg = ins->sreg1;
1602 ins->inst_imm = -ins->inst_imm;
1603 } else if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1604 ins->opcode = OP_X86_DEC_REG;
1606 case OP_COMPARE_IMM:
1607 case OP_ICOMPARE_IMM:
1608 /* OP_COMPARE_IMM (reg, 0)
1610 * OP_X86_TEST_NULL (reg)
1613 ins->opcode = OP_X86_TEST_NULL;
1615 case OP_X86_COMPARE_MEMBASE_IMM:
1617 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1618 * OP_X86_COMPARE_MEMBASE_IMM offset(basereg), imm
1620 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1621 * OP_COMPARE_IMM reg, imm
1623 * Note: if imm = 0 then OP_COMPARE_IMM replaced with OP_X86_TEST_NULL
1625 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG) &&
1626 ins->inst_basereg == last_ins->inst_destbasereg &&
1627 ins->inst_offset == last_ins->inst_offset) {
1628 ins->opcode = OP_COMPARE_IMM;
1629 ins->sreg1 = last_ins->sreg1;
1631 /* check if we can remove cmp reg,0 with test null */
1633 ins->opcode = OP_X86_TEST_NULL;
1637 case OP_X86_PUSH_MEMBASE:
1638 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG ||
1639 last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1640 ins->inst_basereg == last_ins->inst_destbasereg &&
1641 ins->inst_offset == last_ins->inst_offset) {
1642 ins->opcode = OP_X86_PUSH;
1643 ins->sreg1 = last_ins->sreg1;
1648 mono_peephole_ins (bb, ins);
1653 mono_arch_peephole_pass_2 (MonoCompile *cfg, MonoBasicBlock *bb)
1657 MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
1658 switch (ins->opcode) {
1660 /* reg = 0 -> XOR (reg, reg) */
1661 /* XOR sets cflags on x86, so we cant do it always */
1662 if (ins->inst_c0 == 0 && (!ins->next || (ins->next && INST_IGNORES_CFLAGS (ins->next->opcode)))) {
1665 ins->opcode = OP_IXOR;
1666 ins->sreg1 = ins->dreg;
1667 ins->sreg2 = ins->dreg;
1670 * Convert succeeding STORE_MEMBASE_IMM 0 ins to STORE_MEMBASE_REG
1671 * since it takes 3 bytes instead of 7.
1673 for (ins2 = ins->next; ins2; ins2 = ins2->next) {
1674 if ((ins2->opcode == OP_STORE_MEMBASE_IMM) && (ins2->inst_imm == 0)) {
1675 ins2->opcode = OP_STORE_MEMBASE_REG;
1676 ins2->sreg1 = ins->dreg;
1678 else if ((ins2->opcode == OP_STOREI4_MEMBASE_IMM) && (ins2->inst_imm == 0)) {
1679 ins2->opcode = OP_STOREI4_MEMBASE_REG;
1680 ins2->sreg1 = ins->dreg;
1682 else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM)) {
1683 /* Continue iteration */
1692 if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1693 ins->opcode = OP_X86_INC_REG;
1697 if ((ins->inst_imm == 1) && (ins->dreg == ins->sreg1))
1698 ins->opcode = OP_X86_DEC_REG;
1702 mono_peephole_ins (bb, ins);
1707 * mono_arch_lowering_pass:
1709 * Converts complex opcodes into simpler ones so that each IR instruction
1710 * corresponds to one machine instruction.
1713 mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1715 MonoInst *ins, *next;
1717 if (bb->max_vreg > cfg->rs->next_vreg)
1718 cfg->rs->next_vreg = bb->max_vreg;
1721 * FIXME: Need to add more instructions, but the current machine
1722 * description can't model some parts of the composite instructions like
1725 MONO_BB_FOR_EACH_INS_SAFE (bb, next, ins) {
1726 switch (ins->opcode) {
1729 case OP_IDIV_UN_IMM:
1730 case OP_IREM_UN_IMM:
1732 * Keep the cases where we could generated optimized code, otherwise convert
1733 * to the non-imm variant.
1735 if ((ins->opcode == OP_IREM_IMM) && mono_is_power_of_two (ins->inst_imm) >= 0)
1737 mono_decompose_op_imm (cfg, bb, ins);
1744 bb->max_vreg = cfg->rs->next_vreg;
1748 branch_cc_table [] = {
1749 X86_CC_EQ, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1750 X86_CC_NE, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1751 X86_CC_O, X86_CC_NO, X86_CC_C, X86_CC_NC
1754 /* Maps CMP_... constants to X86_CC_... constants */
1757 X86_CC_EQ, X86_CC_NE, X86_CC_LE, X86_CC_GE, X86_CC_LT, X86_CC_GT,
1758 X86_CC_LE, X86_CC_GE, X86_CC_LT, X86_CC_GT
1762 cc_signed_table [] = {
1763 TRUE, TRUE, TRUE, TRUE, TRUE, TRUE,
1764 FALSE, FALSE, FALSE, FALSE
1767 static unsigned char*
1768 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int size, gboolean is_signed)
1770 #define XMM_TEMP_REG 0
1771 if (cfg->opt & MONO_OPT_SSE2 && size < 8) {
1772 /* optimize by assigning a local var for this use so we avoid
1773 * the stack manipulations */
1774 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1775 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1776 x86_movsd_reg_membase (code, XMM_TEMP_REG, X86_ESP, 0);
1777 x86_cvttsd2si (code, dreg, XMM_TEMP_REG);
1778 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1780 x86_widen_reg (code, dreg, dreg, is_signed, FALSE);
1782 x86_widen_reg (code, dreg, dreg, is_signed, TRUE);
1785 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
1786 x86_fnstcw_membase(code, X86_ESP, 0);
1787 x86_mov_reg_membase (code, dreg, X86_ESP, 0, 2);
1788 x86_alu_reg_imm (code, X86_OR, dreg, 0xc00);
1789 x86_mov_membase_reg (code, X86_ESP, 2, dreg, 2);
1790 x86_fldcw_membase (code, X86_ESP, 2);
1792 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1793 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
1794 x86_pop_reg (code, dreg);
1795 /* FIXME: need the high register
1796 * x86_pop_reg (code, dreg_high);
1799 x86_push_reg (code, X86_EAX); // SP = SP - 4
1800 x86_fist_pop_membase (code, X86_ESP, 0, FALSE);
1801 x86_pop_reg (code, dreg);
1803 x86_fldcw_membase (code, X86_ESP, 0);
1804 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
1807 x86_widen_reg (code, dreg, dreg, is_signed, FALSE);
1809 x86_widen_reg (code, dreg, dreg, is_signed, TRUE);
1813 static unsigned char*
1814 mono_emit_stack_alloc (guchar *code, MonoInst* tree)
1816 int sreg = tree->sreg1;
1817 int need_touch = FALSE;
1819 #if defined(PLATFORM_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
1828 * If requested stack size is larger than one page,
1829 * perform stack-touch operation
1832 * Generate stack probe code.
1833 * Under Windows, it is necessary to allocate one page at a time,
1834 * "touching" stack after each successful sub-allocation. This is
1835 * because of the way stack growth is implemented - there is a
1836 * guard page before the lowest stack page that is currently commited.
1837 * Stack normally grows sequentially so OS traps access to the
1838 * guard page and commits more pages when needed.
1840 x86_test_reg_imm (code, sreg, ~0xFFF);
1841 br[0] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1843 br[2] = code; /* loop */
1844 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
1845 x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
1848 * By the end of the loop, sreg2 is smaller than 0x1000, so the init routine
1849 * that follows only initializes the last part of the area.
1851 /* Same as the init code below with size==0x1000 */
1852 if (tree->flags & MONO_INST_INIT) {
1853 x86_push_reg (code, X86_EAX);
1854 x86_push_reg (code, X86_ECX);
1855 x86_push_reg (code, X86_EDI);
1856 x86_mov_reg_imm (code, X86_ECX, (0x1000 >> 2));
1857 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
1858 x86_lea_membase (code, X86_EDI, X86_ESP, 12);
1860 x86_prefix (code, X86_REP_PREFIX);
1862 x86_pop_reg (code, X86_EDI);
1863 x86_pop_reg (code, X86_ECX);
1864 x86_pop_reg (code, X86_EAX);
1867 x86_alu_reg_imm (code, X86_SUB, sreg, 0x1000);
1868 x86_alu_reg_imm (code, X86_CMP, sreg, 0x1000);
1869 br[3] = code; x86_branch8 (code, X86_CC_AE, 0, FALSE);
1870 x86_patch (br[3], br[2]);
1871 x86_test_reg_reg (code, sreg, sreg);
1872 br[4] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
1873 x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1875 br[1] = code; x86_jump8 (code, 0);
1877 x86_patch (br[0], code);
1878 x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
1879 x86_patch (br[1], code);
1880 x86_patch (br[4], code);
1883 x86_alu_reg_reg (code, X86_SUB, X86_ESP, tree->sreg1);
1885 if (tree->flags & MONO_INST_INIT) {
1887 if (tree->dreg != X86_EAX && sreg != X86_EAX) {
1888 x86_push_reg (code, X86_EAX);
1891 if (tree->dreg != X86_ECX && sreg != X86_ECX) {
1892 x86_push_reg (code, X86_ECX);
1895 if (tree->dreg != X86_EDI && sreg != X86_EDI) {
1896 x86_push_reg (code, X86_EDI);
1900 x86_shift_reg_imm (code, X86_SHR, sreg, 2);
1901 if (sreg != X86_ECX)
1902 x86_mov_reg_reg (code, X86_ECX, sreg, 4);
1903 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
1905 x86_lea_membase (code, X86_EDI, X86_ESP, offset);
1907 x86_prefix (code, X86_REP_PREFIX);
1910 if (tree->dreg != X86_EDI && sreg != X86_EDI)
1911 x86_pop_reg (code, X86_EDI);
1912 if (tree->dreg != X86_ECX && sreg != X86_ECX)
1913 x86_pop_reg (code, X86_ECX);
1914 if (tree->dreg != X86_EAX && sreg != X86_EAX)
1915 x86_pop_reg (code, X86_EAX);
1922 emit_move_return_value (MonoCompile *cfg, MonoInst *ins, guint8 *code)
1927 /* Move return value to the target register */
1928 switch (ins->opcode) {
1931 case OP_CALL_MEMBASE:
1932 if (ins->dreg != X86_EAX)
1933 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
1937 case OP_VCALL_MEMBASE:
1940 case OP_VCALL2_MEMBASE:
1941 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, ((MonoCallInst*)ins)->signature, FALSE);
1942 if (cinfo->ret.storage == ArgValuetypeInReg) {
1943 /* Pop the destination address from the stack */
1944 x86_pop_reg (code, X86_ECX);
1946 for (quad = 0; quad < 2; quad ++) {
1947 switch (cinfo->ret.pair_storage [quad]) {
1949 g_assert (cinfo->ret.pair_regs [quad] != X86_ECX);
1950 x86_mov_membase_reg (code, X86_ECX, (quad * sizeof (gpointer)), cinfo->ret.pair_regs [quad], sizeof (gpointer));
1955 g_assert_not_reached ();
1961 MonoCallInst *call = (MonoCallInst*)ins;
1962 if (call->method && !mono_method_signature (call->method)->ret->byref && mono_method_signature (call->method)->ret->type == MONO_TYPE_R4) {
1963 /* Avoid some precision issues by saving/reloading the return value */
1964 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1965 x86_fst_membase (code, X86_ESP, 0, FALSE, TRUE);
1966 x86_fld_membase (code, X86_ESP, 0, FALSE);
1967 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1980 * @code: buffer to store code to
1981 * @dreg: hard register where to place the result
1982 * @tls_offset: offset info
1984 * emit_tls_get emits in @code the native code that puts in the dreg register
1985 * the item in the thread local storage identified by tls_offset.
1987 * Returns: a pointer to the end of the stored code
1990 emit_tls_get (guint8* code, int dreg, int tls_offset)
1992 #ifdef PLATFORM_WIN32
1994 * See the Under the Hood article in the May 1996 issue of Microsoft Systems
1995 * Journal and/or a disassembly of the TlsGet () function.
1997 g_assert (tls_offset < 64);
1998 x86_prefix (code, X86_FS_PREFIX);
1999 x86_mov_reg_mem (code, dreg, 0x18, 4);
2000 /* Dunno what this does but TlsGetValue () contains it */
2001 x86_alu_membase_imm (code, X86_AND, dreg, 0x34, 0);
2002 x86_mov_reg_membase (code, dreg, dreg, 3600 + (tls_offset * 4), 4);
2004 if (optimize_for_xen) {
2005 x86_prefix (code, X86_GS_PREFIX);
2006 x86_mov_reg_mem (code, dreg, 0, 4);
2007 x86_mov_reg_membase (code, dreg, dreg, tls_offset, 4);
2009 x86_prefix (code, X86_GS_PREFIX);
2010 x86_mov_reg_mem (code, dreg, tls_offset, 4);
2017 * emit_load_volatile_arguments:
2019 * Load volatile arguments from the stack to the original input registers.
2020 * Required before a tail call.
2023 emit_load_volatile_arguments (MonoCompile *cfg, guint8 *code)
2025 MonoMethod *method = cfg->method;
2026 MonoMethodSignature *sig;
2031 /* FIXME: Generate intermediate code instead */
2033 sig = mono_method_signature (method);
2035 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
2037 /* This is the opposite of the code in emit_prolog */
2039 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
2040 ArgInfo *ainfo = cinfo->args + i;
2042 inst = cfg->args [i];
2044 if (sig->hasthis && (i == 0))
2045 arg_type = &mono_defaults.object_class->byval_arg;
2047 arg_type = sig->params [i - sig->hasthis];
2050 * On x86, the arguments are either in their original stack locations, or in
2053 if (inst->opcode == OP_REGVAR) {
2054 g_assert (ainfo->storage == ArgOnStack);
2056 x86_mov_membase_reg (code, X86_EBP, inst->inst_offset, inst->dreg, 4);
2063 #define REAL_PRINT_REG(text,reg) \
2064 mono_assert (reg >= 0); \
2065 x86_push_reg (code, X86_EAX); \
2066 x86_push_reg (code, X86_EDX); \
2067 x86_push_reg (code, X86_ECX); \
2068 x86_push_reg (code, reg); \
2069 x86_push_imm (code, reg); \
2070 x86_push_imm (code, text " %d %p\n"); \
2071 x86_mov_reg_imm (code, X86_EAX, printf); \
2072 x86_call_reg (code, X86_EAX); \
2073 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 3*4); \
2074 x86_pop_reg (code, X86_ECX); \
2075 x86_pop_reg (code, X86_EDX); \
2076 x86_pop_reg (code, X86_EAX);
2078 /* benchmark and set based on cpu */
2079 #define LOOP_ALIGNMENT 8
2080 #define bb_is_loop_start(bb) ((bb)->loop_body_start && (bb)->nesting)
2083 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2088 guint8 *code = cfg->native_code + cfg->code_len;
2091 if (cfg->opt & MONO_OPT_LOOP) {
2092 int pad, align = LOOP_ALIGNMENT;
2093 /* set alignment depending on cpu */
2094 if (bb_is_loop_start (bb) && (pad = (cfg->code_len & (align - 1)))) {
2096 /*g_print ("adding %d pad at %x to loop in %s\n", pad, cfg->code_len, cfg->method->name);*/
2097 x86_padding (code, pad);
2098 cfg->code_len += pad;
2099 bb->native_offset = cfg->code_len;
2103 if (cfg->verbose_level > 2)
2104 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2106 cpos = bb->max_offset;
2108 if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2109 MonoProfileCoverageInfo *cov = cfg->coverage_info;
2110 g_assert (!cfg->compile_aot);
2113 cov->data [bb->dfn].cil_code = bb->cil_code;
2114 /* this is not thread save, but good enough */
2115 x86_inc_mem (code, &cov->data [bb->dfn].count);
2118 offset = code - cfg->native_code;
2120 mono_debug_open_block (cfg, bb, offset);
2122 MONO_BB_FOR_EACH_INS (bb, ins) {
2123 offset = code - cfg->native_code;
2125 max_len = ((guint8 *)ins_get_spec (ins->opcode))[MONO_INST_LEN];
2127 if (G_UNLIKELY (offset > (cfg->code_size - max_len - 16))) {
2128 cfg->code_size *= 2;
2129 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2130 code = cfg->native_code + offset;
2131 mono_jit_stats.code_reallocs++;
2134 if (cfg->debug_info)
2135 mono_debug_record_line_number (cfg, ins, offset);
2137 switch (ins->opcode) {
2139 x86_mul_reg (code, ins->sreg2, TRUE);
2142 x86_mul_reg (code, ins->sreg2, FALSE);
2144 case OP_X86_SETEQ_MEMBASE:
2145 case OP_X86_SETNE_MEMBASE:
2146 x86_set_membase (code, ins->opcode == OP_X86_SETEQ_MEMBASE ? X86_CC_EQ : X86_CC_NE,
2147 ins->inst_basereg, ins->inst_offset, TRUE);
2149 case OP_STOREI1_MEMBASE_IMM:
2150 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 1);
2152 case OP_STOREI2_MEMBASE_IMM:
2153 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 2);
2155 case OP_STORE_MEMBASE_IMM:
2156 case OP_STOREI4_MEMBASE_IMM:
2157 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 4);
2159 case OP_STOREI1_MEMBASE_REG:
2160 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 1);
2162 case OP_STOREI2_MEMBASE_REG:
2163 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 2);
2165 case OP_STORE_MEMBASE_REG:
2166 case OP_STOREI4_MEMBASE_REG:
2167 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 4);
2169 case OP_STORE_MEM_IMM:
2170 x86_mov_mem_imm (code, ins->inst_p0, ins->inst_c0, 4);
2174 x86_mov_reg_mem (code, ins->dreg, ins->inst_imm, 4);
2176 x86_mov_reg_mem (code, ins->dreg, ins->inst_p0, 4);
2180 /* These are created by the cprop pass so they use inst_imm as the source */
2181 x86_mov_reg_mem (code, ins->dreg, ins->inst_imm, 4);
2184 x86_widen_mem (code, ins->dreg, ins->inst_imm, FALSE, FALSE);
2187 x86_widen_mem (code, ins->dreg, ins->inst_imm, FALSE, TRUE);
2189 case OP_LOAD_MEMBASE:
2190 case OP_LOADI4_MEMBASE:
2191 case OP_LOADU4_MEMBASE:
2192 x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, 4);
2194 case OP_LOADU1_MEMBASE:
2195 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE);
2197 case OP_LOADI1_MEMBASE:
2198 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, FALSE);
2200 case OP_LOADU2_MEMBASE:
2201 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE);
2203 case OP_LOADI2_MEMBASE:
2204 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, TRUE);
2206 case OP_ICONV_TO_I1:
2208 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, FALSE);
2210 case OP_ICONV_TO_I2:
2212 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, TRUE);
2214 case OP_ICONV_TO_U1:
2215 x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, FALSE);
2217 case OP_ICONV_TO_U2:
2218 x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, TRUE);
2222 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
2224 case OP_COMPARE_IMM:
2225 case OP_ICOMPARE_IMM:
2226 x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
2228 case OP_X86_COMPARE_MEMBASE_REG:
2229 x86_alu_membase_reg (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2231 case OP_X86_COMPARE_MEMBASE_IMM:
2232 x86_alu_membase_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2234 case OP_X86_COMPARE_MEMBASE8_IMM:
2235 x86_alu_membase8_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2237 case OP_X86_COMPARE_REG_MEMBASE:
2238 x86_alu_reg_membase (code, X86_CMP, ins->sreg1, ins->sreg2, ins->inst_offset);
2240 case OP_X86_COMPARE_MEM_IMM:
2241 x86_alu_mem_imm (code, X86_CMP, ins->inst_offset, ins->inst_imm);
2243 case OP_X86_TEST_NULL:
2244 x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
2246 case OP_X86_ADD_MEMBASE_IMM:
2247 x86_alu_membase_imm (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2249 case OP_X86_ADD_REG_MEMBASE:
2250 x86_alu_reg_membase (code, X86_ADD, ins->sreg1, ins->sreg2, ins->inst_offset);
2252 case OP_X86_SUB_MEMBASE_IMM:
2253 x86_alu_membase_imm (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2255 case OP_X86_SUB_REG_MEMBASE:
2256 x86_alu_reg_membase (code, X86_SUB, ins->sreg1, ins->sreg2, ins->inst_offset);
2258 case OP_X86_AND_MEMBASE_IMM:
2259 x86_alu_membase_imm (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2261 case OP_X86_OR_MEMBASE_IMM:
2262 x86_alu_membase_imm (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2264 case OP_X86_XOR_MEMBASE_IMM:
2265 x86_alu_membase_imm (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2267 case OP_X86_ADD_MEMBASE_REG:
2268 x86_alu_membase_reg (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2270 case OP_X86_SUB_MEMBASE_REG:
2271 x86_alu_membase_reg (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2273 case OP_X86_AND_MEMBASE_REG:
2274 x86_alu_membase_reg (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2276 case OP_X86_OR_MEMBASE_REG:
2277 x86_alu_membase_reg (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2279 case OP_X86_XOR_MEMBASE_REG:
2280 x86_alu_membase_reg (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2282 case OP_X86_INC_MEMBASE:
2283 x86_inc_membase (code, ins->inst_basereg, ins->inst_offset);
2285 case OP_X86_INC_REG:
2286 x86_inc_reg (code, ins->dreg);
2288 case OP_X86_DEC_MEMBASE:
2289 x86_dec_membase (code, ins->inst_basereg, ins->inst_offset);
2291 case OP_X86_DEC_REG:
2292 x86_dec_reg (code, ins->dreg);
2294 case OP_X86_MUL_REG_MEMBASE:
2295 x86_imul_reg_membase (code, ins->sreg1, ins->sreg2, ins->inst_offset);
2297 case OP_X86_AND_REG_MEMBASE:
2298 x86_alu_reg_membase (code, X86_AND, ins->sreg1, ins->sreg2, ins->inst_offset);
2300 case OP_X86_OR_REG_MEMBASE:
2301 x86_alu_reg_membase (code, X86_OR, ins->sreg1, ins->sreg2, ins->inst_offset);
2303 case OP_X86_XOR_REG_MEMBASE:
2304 x86_alu_reg_membase (code, X86_XOR, ins->sreg1, ins->sreg2, ins->inst_offset);
2307 x86_breakpoint (code);
2311 case OP_DUMMY_STORE:
2312 case OP_NOT_REACHED:
2318 x86_alu_reg_reg (code, X86_ADD, ins->sreg1, ins->sreg2);
2322 x86_alu_reg_reg (code, X86_ADC, ins->sreg1, ins->sreg2);
2327 x86_alu_reg_imm (code, X86_ADD, ins->dreg, ins->inst_imm);
2331 x86_alu_reg_imm (code, X86_ADC, ins->dreg, ins->inst_imm);
2336 x86_alu_reg_reg (code, X86_SUB, ins->sreg1, ins->sreg2);
2340 x86_alu_reg_reg (code, X86_SBB, ins->sreg1, ins->sreg2);
2345 x86_alu_reg_imm (code, X86_SUB, ins->dreg, ins->inst_imm);
2349 x86_alu_reg_imm (code, X86_SBB, ins->dreg, ins->inst_imm);
2352 x86_alu_reg_reg (code, X86_AND, ins->sreg1, ins->sreg2);
2356 x86_alu_reg_imm (code, X86_AND, ins->sreg1, ins->inst_imm);
2361 * The code is the same for div/rem, the allocator will allocate dreg
2362 * to RAX/RDX as appropriate.
2364 if (ins->sreg2 == X86_EDX) {
2365 /* cdq clobbers this */
2366 x86_push_reg (code, ins->sreg2);
2368 x86_div_membase (code, X86_ESP, 0, TRUE);
2369 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2372 x86_div_reg (code, ins->sreg2, TRUE);
2377 if (ins->sreg2 == X86_EDX) {
2378 x86_push_reg (code, ins->sreg2);
2379 x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2380 x86_div_membase (code, X86_ESP, 0, FALSE);
2381 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2383 x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
2384 x86_div_reg (code, ins->sreg2, FALSE);
2388 x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
2390 x86_div_reg (code, ins->sreg2, TRUE);
2393 int power = mono_is_power_of_two (ins->inst_imm);
2395 g_assert (ins->sreg1 == X86_EAX);
2396 g_assert (ins->dreg == X86_EAX);
2397 g_assert (power >= 0);
2400 /* Based on http://compilers.iecc.com/comparch/article/93-04-079 */
2402 x86_alu_reg_imm (code, X86_AND, X86_EAX, 1);
2404 * If the divident is >= 0, this does not nothing. If it is positive, it
2405 * it transforms %eax=0 into %eax=0, and %eax=1 into %eax=-1.
2407 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EDX);
2408 x86_alu_reg_reg (code, X86_SUB, X86_EAX, X86_EDX);
2410 /* Based on gcc code */
2412 /* Add compensation for negative dividents */
2414 x86_shift_reg_imm (code, X86_SHR, X86_EDX, 32 - power);
2415 x86_alu_reg_reg (code, X86_ADD, X86_EAX, X86_EDX);
2416 /* Compute remainder */
2417 x86_alu_reg_imm (code, X86_AND, X86_EAX, (1 << power) - 1);
2418 /* Remove compensation */
2419 x86_alu_reg_reg (code, X86_SUB, X86_EAX, X86_EDX);
2424 x86_alu_reg_reg (code, X86_OR, ins->sreg1, ins->sreg2);
2428 x86_alu_reg_imm (code, X86_OR, ins->sreg1, ins->inst_imm);
2431 x86_alu_reg_reg (code, X86_XOR, ins->sreg1, ins->sreg2);
2435 x86_alu_reg_imm (code, X86_XOR, ins->sreg1, ins->inst_imm);
2438 g_assert (ins->sreg2 == X86_ECX);
2439 x86_shift_reg (code, X86_SHL, ins->dreg);
2442 g_assert (ins->sreg2 == X86_ECX);
2443 x86_shift_reg (code, X86_SAR, ins->dreg);
2447 x86_shift_reg_imm (code, X86_SAR, ins->dreg, ins->inst_imm);
2450 case OP_ISHR_UN_IMM:
2451 x86_shift_reg_imm (code, X86_SHR, ins->dreg, ins->inst_imm);
2454 g_assert (ins->sreg2 == X86_ECX);
2455 x86_shift_reg (code, X86_SHR, ins->dreg);
2459 x86_shift_reg_imm (code, X86_SHL, ins->dreg, ins->inst_imm);
2462 guint8 *jump_to_end;
2464 /* handle shifts below 32 bits */
2465 x86_shld_reg (code, ins->backend.reg3, ins->sreg1);
2466 x86_shift_reg (code, X86_SHL, ins->sreg1);
2468 x86_test_reg_imm (code, X86_ECX, 32);
2469 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
2471 /* handle shift over 32 bit */
2472 x86_mov_reg_reg (code, ins->backend.reg3, ins->sreg1, 4);
2473 x86_clear_reg (code, ins->sreg1);
2475 x86_patch (jump_to_end, code);
2479 guint8 *jump_to_end;
2481 /* handle shifts below 32 bits */
2482 x86_shrd_reg (code, ins->sreg1, ins->backend.reg3);
2483 x86_shift_reg (code, X86_SAR, ins->backend.reg3);
2485 x86_test_reg_imm (code, X86_ECX, 32);
2486 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, FALSE);
2488 /* handle shifts over 31 bits */
2489 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2490 x86_shift_reg_imm (code, X86_SAR, ins->backend.reg3, 31);
2492 x86_patch (jump_to_end, code);
2496 guint8 *jump_to_end;
2498 /* handle shifts below 32 bits */
2499 x86_shrd_reg (code, ins->sreg1, ins->backend.reg3);
2500 x86_shift_reg (code, X86_SHR, ins->backend.reg3);
2502 x86_test_reg_imm (code, X86_ECX, 32);
2503 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, FALSE);
2505 /* handle shifts over 31 bits */
2506 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2507 x86_clear_reg (code, ins->backend.reg3);
2509 x86_patch (jump_to_end, code);
2513 if (ins->inst_imm >= 32) {
2514 x86_mov_reg_reg (code, ins->backend.reg3, ins->sreg1, 4);
2515 x86_clear_reg (code, ins->sreg1);
2516 x86_shift_reg_imm (code, X86_SHL, ins->backend.reg3, ins->inst_imm - 32);
2518 x86_shld_reg_imm (code, ins->backend.reg3, ins->sreg1, ins->inst_imm);
2519 x86_shift_reg_imm (code, X86_SHL, ins->sreg1, ins->inst_imm);
2523 if (ins->inst_imm >= 32) {
2524 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2525 x86_shift_reg_imm (code, X86_SAR, ins->backend.reg3, 0x1f);
2526 x86_shift_reg_imm (code, X86_SAR, ins->sreg1, ins->inst_imm - 32);
2528 x86_shrd_reg_imm (code, ins->sreg1, ins->backend.reg3, ins->inst_imm);
2529 x86_shift_reg_imm (code, X86_SAR, ins->backend.reg3, ins->inst_imm);
2532 case OP_LSHR_UN_IMM:
2533 if (ins->inst_imm >= 32) {
2534 x86_mov_reg_reg (code, ins->sreg1, ins->backend.reg3, 4);
2535 x86_clear_reg (code, ins->backend.reg3);
2536 x86_shift_reg_imm (code, X86_SHR, ins->sreg1, ins->inst_imm - 32);
2538 x86_shrd_reg_imm (code, ins->sreg1, ins->backend.reg3, ins->inst_imm);
2539 x86_shift_reg_imm (code, X86_SHR, ins->backend.reg3, ins->inst_imm);
2543 x86_not_reg (code, ins->sreg1);
2546 x86_neg_reg (code, ins->sreg1);
2550 x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2554 switch (ins->inst_imm) {
2558 if (ins->dreg != ins->sreg1)
2559 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2560 x86_alu_reg_reg (code, X86_ADD, ins->dreg, ins->dreg);
2563 /* LEA r1, [r2 + r2*2] */
2564 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 1);
2567 /* LEA r1, [r2 + r2*4] */
2568 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2571 /* LEA r1, [r2 + r2*2] */
2573 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 1);
2574 x86_alu_reg_reg (code, X86_ADD, ins->dreg, ins->dreg);
2577 /* LEA r1, [r2 + r2*8] */
2578 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 3);
2581 /* LEA r1, [r2 + r2*4] */
2583 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2584 x86_alu_reg_reg (code, X86_ADD, ins->dreg, ins->dreg);
2587 /* LEA r1, [r2 + r2*2] */
2589 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 1);
2590 x86_shift_reg_imm (code, X86_SHL, ins->dreg, 2);
2593 /* LEA r1, [r2 + r2*4] */
2594 /* LEA r1, [r1 + r1*4] */
2595 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2596 x86_lea_memindex (code, ins->dreg, ins->dreg, 0, ins->dreg, 2);
2599 /* LEA r1, [r2 + r2*4] */
2601 /* LEA r1, [r1 + r1*4] */
2602 x86_lea_memindex (code, ins->dreg, ins->sreg1, 0, ins->sreg1, 2);
2603 x86_shift_reg_imm (code, X86_SHL, ins->dreg, 2);
2604 x86_lea_memindex (code, ins->dreg, ins->dreg, 0, ins->dreg, 2);
2607 x86_imul_reg_reg_imm (code, ins->dreg, ins->sreg1, ins->inst_imm);
2612 x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
2613 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2615 case OP_IMUL_OVF_UN: {
2616 /* the mul operation and the exception check should most likely be split */
2617 int non_eax_reg, saved_eax = FALSE, saved_edx = FALSE;
2618 /*g_assert (ins->sreg2 == X86_EAX);
2619 g_assert (ins->dreg == X86_EAX);*/
2620 if (ins->sreg2 == X86_EAX) {
2621 non_eax_reg = ins->sreg1;
2622 } else if (ins->sreg1 == X86_EAX) {
2623 non_eax_reg = ins->sreg2;
2625 /* no need to save since we're going to store to it anyway */
2626 if (ins->dreg != X86_EAX) {
2628 x86_push_reg (code, X86_EAX);
2630 x86_mov_reg_reg (code, X86_EAX, ins->sreg1, 4);
2631 non_eax_reg = ins->sreg2;
2633 if (ins->dreg == X86_EDX) {
2636 x86_push_reg (code, X86_EAX);
2638 } else if (ins->dreg != X86_EAX) {
2640 x86_push_reg (code, X86_EDX);
2642 x86_mul_reg (code, non_eax_reg, FALSE);
2643 /* save before the check since pop and mov don't change the flags */
2644 if (ins->dreg != X86_EAX)
2645 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
2647 x86_pop_reg (code, X86_EDX);
2649 x86_pop_reg (code, X86_EAX);
2650 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
2654 x86_mov_reg_imm (code, ins->dreg, ins->inst_c0);
2657 g_assert_not_reached ();
2658 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2659 x86_mov_reg_imm (code, ins->dreg, 0);
2662 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2663 x86_mov_reg_imm (code, ins->dreg, 0);
2665 case OP_LOAD_GOTADDR:
2666 x86_call_imm (code, 0);
2668 * The patch needs to point to the pop, since the GOT offset needs
2669 * to be added to that address.
2671 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_GOT_OFFSET, NULL);
2672 x86_pop_reg (code, ins->dreg);
2673 x86_alu_reg_imm (code, X86_ADD, ins->dreg, 0xf0f0f0f0);
2676 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_right->inst_i1, ins->inst_right->inst_p0);
2677 x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, 0xf0f0f0f0, 4);
2679 case OP_X86_PUSH_GOT_ENTRY:
2680 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_right->inst_i1, ins->inst_right->inst_p0);
2681 x86_push_membase (code, ins->inst_basereg, 0xf0f0f0f0);
2684 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
2688 * Note: this 'frame destruction' logic is useful for tail calls, too.
2689 * Keep in sync with the code in emit_epilog.
2693 /* FIXME: no tracing support... */
2694 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
2695 code = mono_arch_instrument_epilog (cfg, mono_profiler_method_leave, code, FALSE);
2696 /* reset offset to make max_len work */
2697 offset = code - cfg->native_code;
2699 g_assert (!cfg->method->save_lmf);
2701 code = emit_load_volatile_arguments (cfg, code);
2703 if (cfg->used_int_regs & (1 << X86_EBX))
2705 if (cfg->used_int_regs & (1 << X86_EDI))
2707 if (cfg->used_int_regs & (1 << X86_ESI))
2710 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
2712 if (cfg->used_int_regs & (1 << X86_ESI))
2713 x86_pop_reg (code, X86_ESI);
2714 if (cfg->used_int_regs & (1 << X86_EDI))
2715 x86_pop_reg (code, X86_EDI);
2716 if (cfg->used_int_regs & (1 << X86_EBX))
2717 x86_pop_reg (code, X86_EBX);
2719 /* restore ESP/EBP */
2721 offset = code - cfg->native_code;
2722 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2723 x86_jump32 (code, 0);
2725 cfg->disable_aot = TRUE;
2729 /* ensure ins->sreg1 is not NULL
2730 * note that cmp DWORD PTR [eax], eax is one byte shorter than
2731 * cmp DWORD PTR [eax], 0
2733 x86_alu_membase_reg (code, X86_CMP, ins->sreg1, 0, ins->sreg1);
2736 int hreg = ins->sreg1 == X86_EAX? X86_ECX: X86_EAX;
2737 x86_push_reg (code, hreg);
2738 x86_lea_membase (code, hreg, X86_EBP, cfg->sig_cookie);
2739 x86_mov_membase_reg (code, ins->sreg1, 0, hreg, 4);
2740 x86_pop_reg (code, hreg);
2749 call = (MonoCallInst*)ins;
2750 if (ins->flags & MONO_INST_HAS_METHOD)
2751 code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2753 code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2754 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
2755 /* a pop is one byte, while an add reg, imm is 3. So if there are 4 or 8
2756 * bytes to pop, we want to use pops. GCC does this (note it won't happen
2757 * for P4 or i686 because gcc will avoid using pop push at all. But we aren't
2758 * smart enough to do that optimization yet
2760 * It turns out that on my P4, doing two pops for 8 bytes on the stack makes
2761 * mcs botstrap slow down. However, doing 1 pop for 4 bytes creates a small,
2762 * (most likely from locality benefits). People with other processors should
2763 * check on theirs to see what happens.
2765 if (call->stack_usage == 4) {
2766 /* we want to use registers that won't get used soon, so use
2767 * ecx, as eax will get allocated first. edx is used by long calls,
2768 * so we can't use that.
2771 x86_pop_reg (code, X86_ECX);
2773 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2776 code = emit_move_return_value (cfg, ins, code);
2782 case OP_VOIDCALL_REG:
2784 call = (MonoCallInst*)ins;
2785 x86_call_reg (code, ins->sreg1);
2786 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
2787 if (call->stack_usage == 4)
2788 x86_pop_reg (code, X86_ECX);
2790 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2792 code = emit_move_return_value (cfg, ins, code);
2794 case OP_FCALL_MEMBASE:
2795 case OP_LCALL_MEMBASE:
2796 case OP_VCALL_MEMBASE:
2797 case OP_VCALL2_MEMBASE:
2798 case OP_VOIDCALL_MEMBASE:
2799 case OP_CALL_MEMBASE:
2800 call = (MonoCallInst*)ins;
2801 x86_call_membase (code, ins->sreg1, ins->inst_offset);
2802 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
2803 if (call->stack_usage == 4)
2804 x86_pop_reg (code, X86_ECX);
2806 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
2808 code = emit_move_return_value (cfg, ins, code);
2812 x86_push_reg (code, ins->sreg1);
2814 case OP_X86_PUSH_IMM:
2815 x86_push_imm (code, ins->inst_imm);
2817 case OP_X86_PUSH_MEMBASE:
2818 x86_push_membase (code, ins->inst_basereg, ins->inst_offset);
2820 case OP_X86_PUSH_OBJ:
2821 x86_alu_reg_imm (code, X86_SUB, X86_ESP, ins->inst_imm);
2822 x86_push_reg (code, X86_EDI);
2823 x86_push_reg (code, X86_ESI);
2824 x86_push_reg (code, X86_ECX);
2825 if (ins->inst_offset)
2826 x86_lea_membase (code, X86_ESI, ins->inst_basereg, ins->inst_offset);
2828 x86_mov_reg_reg (code, X86_ESI, ins->inst_basereg, 4);
2829 x86_lea_membase (code, X86_EDI, X86_ESP, 12);
2830 x86_mov_reg_imm (code, X86_ECX, (ins->inst_imm >> 2));
2832 x86_prefix (code, X86_REP_PREFIX);
2834 x86_pop_reg (code, X86_ECX);
2835 x86_pop_reg (code, X86_ESI);
2836 x86_pop_reg (code, X86_EDI);
2839 x86_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->backend.shift_amount);
2841 case OP_X86_LEA_MEMBASE:
2842 x86_lea_membase (code, ins->dreg, ins->sreg1, ins->inst_imm);
2845 x86_xchg_reg_reg (code, ins->sreg1, ins->sreg2, 4);
2848 /* keep alignment */
2849 x86_alu_reg_imm (code, X86_ADD, ins->sreg1, MONO_ARCH_LOCALLOC_ALIGNMENT - 1);
2850 x86_alu_reg_imm (code, X86_AND, ins->sreg1, ~(MONO_ARCH_LOCALLOC_ALIGNMENT - 1));
2851 code = mono_emit_stack_alloc (code, ins);
2852 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2854 case OP_LOCALLOC_IMM: {
2855 guint32 size = ins->inst_imm;
2856 size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1);
2858 if (ins->flags & MONO_INST_INIT) {
2859 /* FIXME: Optimize this */
2860 x86_mov_reg_imm (code, ins->dreg, size);
2861 ins->sreg1 = ins->dreg;
2863 code = mono_emit_stack_alloc (code, ins);
2864 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2866 x86_alu_reg_imm (code, X86_SUB, X86_ESP, size);
2867 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
2872 x86_push_reg (code, ins->sreg1);
2873 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD,
2874 (gpointer)"mono_arch_throw_exception");
2878 x86_push_reg (code, ins->sreg1);
2879 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD,
2880 (gpointer)"mono_arch_rethrow_exception");
2883 case OP_CALL_HANDLER:
2885 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 12);
2887 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2888 x86_call_imm (code, 0);
2890 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
2893 case OP_START_HANDLER: {
2894 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2895 x86_mov_membase_reg (code, spvar->inst_basereg, spvar->inst_offset, X86_ESP, 4);
2898 case OP_ENDFINALLY: {
2899 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2900 x86_mov_reg_membase (code, X86_ESP, spvar->inst_basereg, spvar->inst_offset, 4);
2904 case OP_ENDFILTER: {
2905 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2906 x86_mov_reg_membase (code, X86_ESP, spvar->inst_basereg, spvar->inst_offset, 4);
2907 /* The local allocator will put the result into EAX */
2913 ins->inst_c0 = code - cfg->native_code;
2916 if (ins->flags & MONO_INST_BRLABEL) {
2917 if (ins->inst_i0->inst_c0) {
2918 x86_jump_code (code, cfg->native_code + ins->inst_i0->inst_c0);
2920 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
2921 if ((cfg->opt & MONO_OPT_BRANCH) &&
2922 x86_is_imm8 (ins->inst_i0->inst_c1 - cpos))
2923 x86_jump8 (code, 0);
2925 x86_jump32 (code, 0);
2928 if (ins->inst_target_bb->native_offset) {
2929 x86_jump_code (code, cfg->native_code + ins->inst_target_bb->native_offset);
2931 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2932 if ((cfg->opt & MONO_OPT_BRANCH) &&
2933 x86_is_imm8 (ins->inst_target_bb->max_offset - cpos))
2934 x86_jump8 (code, 0);
2936 x86_jump32 (code, 0);
2941 x86_jump_reg (code, ins->sreg1);
2954 x86_set_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
2955 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
2957 case OP_COND_EXC_EQ:
2958 case OP_COND_EXC_NE_UN:
2959 case OP_COND_EXC_LT:
2960 case OP_COND_EXC_LT_UN:
2961 case OP_COND_EXC_GT:
2962 case OP_COND_EXC_GT_UN:
2963 case OP_COND_EXC_GE:
2964 case OP_COND_EXC_GE_UN:
2965 case OP_COND_EXC_LE:
2966 case OP_COND_EXC_LE_UN:
2967 case OP_COND_EXC_IEQ:
2968 case OP_COND_EXC_INE_UN:
2969 case OP_COND_EXC_ILT:
2970 case OP_COND_EXC_ILT_UN:
2971 case OP_COND_EXC_IGT:
2972 case OP_COND_EXC_IGT_UN:
2973 case OP_COND_EXC_IGE:
2974 case OP_COND_EXC_IGE_UN:
2975 case OP_COND_EXC_ILE:
2976 case OP_COND_EXC_ILE_UN:
2977 EMIT_COND_SYSTEM_EXCEPTION (cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], ins->inst_p1);
2979 case OP_COND_EXC_OV:
2980 case OP_COND_EXC_NO:
2982 case OP_COND_EXC_NC:
2983 EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_EQ], (ins->opcode < OP_COND_EXC_NE_UN), ins->inst_p1);
2985 case OP_COND_EXC_IOV:
2986 case OP_COND_EXC_INO:
2987 case OP_COND_EXC_IC:
2988 case OP_COND_EXC_INC:
2989 EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_IEQ], (ins->opcode < OP_COND_EXC_INE_UN), ins->inst_p1);
3001 EMIT_COND_BRANCH (ins, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
3009 case OP_CMOV_INE_UN:
3010 case OP_CMOV_IGE_UN:
3011 case OP_CMOV_IGT_UN:
3012 case OP_CMOV_ILE_UN:
3013 case OP_CMOV_ILT_UN:
3014 g_assert (ins->dreg == ins->sreg1);
3015 x86_cmov_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, ins->sreg2);
3018 /* floating point opcodes */
3020 double d = *(double *)ins->inst_p0;
3022 if ((d == 0.0) && (mono_signbit (d) == 0)) {
3024 } else if (d == 1.0) {
3027 if (cfg->compile_aot) {
3028 guint32 *val = (guint32*)&d;
3029 x86_push_imm (code, val [1]);
3030 x86_push_imm (code, val [0]);
3031 x86_fld_membase (code, X86_ESP, 0, TRUE);
3032 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3035 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_R8, ins->inst_p0);
3036 x86_fld (code, NULL, TRUE);
3042 float f = *(float *)ins->inst_p0;
3044 if ((f == 0.0) && (mono_signbit (f) == 0)) {
3046 } else if (f == 1.0) {
3049 if (cfg->compile_aot) {
3050 guint32 val = *(guint32*)&f;
3051 x86_push_imm (code, val);
3052 x86_fld_membase (code, X86_ESP, 0, FALSE);
3053 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3056 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_R4, ins->inst_p0);
3057 x86_fld (code, NULL, FALSE);
3062 case OP_STORER8_MEMBASE_REG:
3063 x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, TRUE, TRUE);
3065 case OP_LOADR8_SPILL_MEMBASE:
3066 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
3069 case OP_LOADR8_MEMBASE:
3070 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
3072 case OP_STORER4_MEMBASE_REG:
3073 x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, FALSE, TRUE);
3075 case OP_LOADR4_MEMBASE:
3076 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
3078 case OP_ICONV_TO_R4: /* FIXME: change precision */
3079 case OP_ICONV_TO_R8:
3080 x86_push_reg (code, ins->sreg1);
3081 x86_fild_membase (code, X86_ESP, 0, FALSE);
3082 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3084 case OP_ICONV_TO_R_UN:
3085 x86_push_imm (code, 0);
3086 x86_push_reg (code, ins->sreg1);
3087 x86_fild_membase (code, X86_ESP, 0, TRUE);
3088 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3090 case OP_X86_FP_LOAD_I8:
3091 x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
3093 case OP_X86_FP_LOAD_I4:
3094 x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
3096 case OP_FCONV_TO_R4:
3097 /* FIXME: nothing to do ?? */
3099 case OP_FCONV_TO_I1:
3100 code = emit_float_to_int (cfg, code, ins->dreg, 1, TRUE);
3102 case OP_FCONV_TO_U1:
3103 code = emit_float_to_int (cfg, code, ins->dreg, 1, FALSE);
3105 case OP_FCONV_TO_I2:
3106 code = emit_float_to_int (cfg, code, ins->dreg, 2, TRUE);
3108 case OP_FCONV_TO_U2:
3109 code = emit_float_to_int (cfg, code, ins->dreg, 2, FALSE);
3111 case OP_FCONV_TO_I4:
3113 code = emit_float_to_int (cfg, code, ins->dreg, 4, TRUE);
3115 case OP_FCONV_TO_I8:
3116 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
3117 x86_fnstcw_membase(code, X86_ESP, 0);
3118 x86_mov_reg_membase (code, ins->dreg, X86_ESP, 0, 2);
3119 x86_alu_reg_imm (code, X86_OR, ins->dreg, 0xc00);
3120 x86_mov_membase_reg (code, X86_ESP, 2, ins->dreg, 2);
3121 x86_fldcw_membase (code, X86_ESP, 2);
3122 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
3123 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
3124 x86_pop_reg (code, ins->dreg);
3125 x86_pop_reg (code, ins->backend.reg3);
3126 x86_fldcw_membase (code, X86_ESP, 0);
3127 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3129 case OP_LCONV_TO_R8_2:
3130 x86_push_reg (code, ins->sreg2);
3131 x86_push_reg (code, ins->sreg1);
3132 x86_fild_membase (code, X86_ESP, 0, TRUE);
3133 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3135 case OP_LCONV_TO_R4_2:
3136 x86_push_reg (code, ins->sreg2);
3137 x86_push_reg (code, ins->sreg1);
3138 x86_fild_membase (code, X86_ESP, 0, TRUE);
3139 /* Change precision */
3140 x86_fst_membase (code, X86_ESP, 0, FALSE, TRUE);
3141 x86_fld_membase (code, X86_ESP, 0, FALSE);
3142 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3144 case OP_LCONV_TO_R_UN:
3145 case OP_LCONV_TO_R_UN_2: {
3146 static guint8 mn[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x40 };
3149 /* load 64bit integer to FP stack */
3150 x86_push_imm (code, 0);
3151 x86_push_reg (code, ins->sreg2);
3152 x86_push_reg (code, ins->sreg1);
3153 x86_fild_membase (code, X86_ESP, 0, TRUE);
3154 /* store as 80bit FP value */
3155 x86_fst80_membase (code, X86_ESP, 0);
3157 /* test if lreg is negative */
3158 x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
3159 br = code; x86_branch8 (code, X86_CC_GEZ, 0, TRUE);
3161 /* add correction constant mn */
3162 x86_fld80_mem (code, mn);
3163 x86_fld80_membase (code, X86_ESP, 0);
3164 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3165 x86_fst80_membase (code, X86_ESP, 0);
3167 x86_patch (br, code);
3169 x86_fld80_membase (code, X86_ESP, 0);
3170 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
3174 case OP_LCONV_TO_OVF_I:
3175 case OP_LCONV_TO_OVF_I4_2: {
3176 guint8 *br [3], *label [1];
3180 * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3182 x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
3184 /* If the low word top bit is set, see if we are negative */
3185 br [0] = code; x86_branch8 (code, X86_CC_LT, 0, TRUE);
3186 /* We are not negative (no top bit set, check for our top word to be zero */
3187 x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
3188 br [1] = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
3191 /* throw exception */
3192 tins = mono_branch_optimize_exception_target (cfg, bb, "OverflowException");
3194 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, tins->inst_true_bb);
3195 if ((cfg->opt & MONO_OPT_BRANCH) && x86_is_imm8 (tins->inst_true_bb->max_offset - cpos))
3196 x86_jump8 (code, 0);
3198 x86_jump32 (code, 0);
3200 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC, "OverflowException");
3201 x86_jump32 (code, 0);
3205 x86_patch (br [0], code);
3206 /* our top bit is set, check that top word is 0xfffffff */
3207 x86_alu_reg_imm (code, X86_CMP, ins->sreg2, 0xffffffff);
3209 x86_patch (br [1], code);
3210 /* nope, emit exception */
3211 br [2] = code; x86_branch8 (code, X86_CC_NE, 0, TRUE);
3212 x86_patch (br [2], label [0]);
3214 if (ins->dreg != ins->sreg1)
3215 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
3219 /* Not needed on the fp stack */
3222 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3225 x86_fp_op_reg (code, X86_FSUB, 1, TRUE);
3228 x86_fp_op_reg (code, X86_FMUL, 1, TRUE);
3231 x86_fp_op_reg (code, X86_FDIV, 1, TRUE);
3239 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3244 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3251 * it really doesn't make sense to inline all this code,
3252 * it's here just to show that things may not be as simple
3255 guchar *check_pos, *end_tan, *pop_jump;
3256 x86_push_reg (code, X86_EAX);
3259 x86_test_reg_imm (code, X86_EAX, X86_FP_C2);
3261 x86_branch8 (code, X86_CC_NE, 0, FALSE);
3262 x86_fstp (code, 0); /* pop the 1.0 */
3264 x86_jump8 (code, 0);
3266 x86_fp_op (code, X86_FADD, 0);
3270 x86_test_reg_imm (code, X86_EAX, X86_FP_C2);
3272 x86_branch8 (code, X86_CC_NE, 0, FALSE);
3275 x86_patch (pop_jump, code);
3276 x86_fstp (code, 0); /* pop the 1.0 */
3277 x86_patch (check_pos, code);
3278 x86_patch (end_tan, code);
3280 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3281 x86_pop_reg (code, X86_EAX);
3288 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3294 g_assert (cfg->opt & MONO_OPT_CMOV);
3295 g_assert (ins->dreg == ins->sreg1);
3296 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
3297 x86_cmov_reg (code, X86_CC_GT, TRUE, ins->dreg, ins->sreg2);
3300 g_assert (cfg->opt & MONO_OPT_CMOV);
3301 g_assert (ins->dreg == ins->sreg1);
3302 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
3303 x86_cmov_reg (code, X86_CC_GT, FALSE, ins->dreg, ins->sreg2);
3306 g_assert (cfg->opt & MONO_OPT_CMOV);
3307 g_assert (ins->dreg == ins->sreg1);
3308 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
3309 x86_cmov_reg (code, X86_CC_LT, TRUE, ins->dreg, ins->sreg2);
3312 g_assert (cfg->opt & MONO_OPT_CMOV);
3313 g_assert (ins->dreg == ins->sreg1);
3314 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
3315 x86_cmov_reg (code, X86_CC_LT, FALSE, ins->dreg, ins->sreg2);
3321 x86_fxch (code, ins->inst_imm);
3326 x86_push_reg (code, X86_EAX);
3327 /* we need to exchange ST(0) with ST(1) */
3330 /* this requires a loop, because fprem somtimes
3331 * returns a partial remainder */
3333 /* looks like MS is using fprem instead of the IEEE compatible fprem1 */
3334 /* x86_fprem1 (code); */
3337 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_C2);
3339 x86_branch8 (code, X86_CC_NE, l1 - l2, FALSE);
3344 x86_pop_reg (code, X86_EAX);
3348 if (cfg->opt & MONO_OPT_FCMOV) {
3349 x86_fcomip (code, 1);
3353 /* this overwrites EAX */
3354 EMIT_FPCOMPARE(code);
3355 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3358 if (cfg->opt & MONO_OPT_FCMOV) {
3359 /* zeroing the register at the start results in
3360 * shorter and faster code (we can also remove the widening op)
3362 guchar *unordered_check;
3363 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3364 x86_fcomip (code, 1);
3366 unordered_check = code;
3367 x86_branch8 (code, X86_CC_P, 0, FALSE);
3368 x86_set_reg (code, X86_CC_EQ, ins->dreg, FALSE);
3369 x86_patch (unordered_check, code);
3372 if (ins->dreg != X86_EAX)
3373 x86_push_reg (code, X86_EAX);
3375 EMIT_FPCOMPARE(code);
3376 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3377 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
3378 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3379 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3381 if (ins->dreg != X86_EAX)
3382 x86_pop_reg (code, X86_EAX);
3386 if (cfg->opt & MONO_OPT_FCMOV) {
3387 /* zeroing the register at the start results in
3388 * shorter and faster code (we can also remove the widening op)
3390 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3391 x86_fcomip (code, 1);
3393 if (ins->opcode == OP_FCLT_UN) {
3394 guchar *unordered_check = code;
3395 guchar *jump_to_end;
3396 x86_branch8 (code, X86_CC_P, 0, FALSE);
3397 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
3399 x86_jump8 (code, 0);
3400 x86_patch (unordered_check, code);
3401 x86_inc_reg (code, ins->dreg);
3402 x86_patch (jump_to_end, code);
3404 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
3408 if (ins->dreg != X86_EAX)
3409 x86_push_reg (code, X86_EAX);
3411 EMIT_FPCOMPARE(code);
3412 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3413 if (ins->opcode == OP_FCLT_UN) {
3414 guchar *is_not_zero_check, *end_jump;
3415 is_not_zero_check = code;
3416 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3418 x86_jump8 (code, 0);
3419 x86_patch (is_not_zero_check, code);
3420 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3422 x86_patch (end_jump, code);
3424 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3425 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3427 if (ins->dreg != X86_EAX)
3428 x86_pop_reg (code, X86_EAX);
3432 if (cfg->opt & MONO_OPT_FCMOV) {
3433 /* zeroing the register at the start results in
3434 * shorter and faster code (we can also remove the widening op)
3436 guchar *unordered_check;
3437 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3438 x86_fcomip (code, 1);
3440 if (ins->opcode == OP_FCGT) {
3441 unordered_check = code;
3442 x86_branch8 (code, X86_CC_P, 0, FALSE);
3443 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
3444 x86_patch (unordered_check, code);
3446 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
3450 if (ins->dreg != X86_EAX)
3451 x86_push_reg (code, X86_EAX);
3453 EMIT_FPCOMPARE(code);
3454 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3455 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3456 if (ins->opcode == OP_FCGT_UN) {
3457 guchar *is_not_zero_check, *end_jump;
3458 is_not_zero_check = code;
3459 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3461 x86_jump8 (code, 0);
3462 x86_patch (is_not_zero_check, code);
3463 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3465 x86_patch (end_jump, code);
3467 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3468 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3470 if (ins->dreg != X86_EAX)
3471 x86_pop_reg (code, X86_EAX);
3474 if (cfg->opt & MONO_OPT_FCMOV) {
3475 guchar *jump = code;
3476 x86_branch8 (code, X86_CC_P, 0, TRUE);
3477 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3478 x86_patch (jump, code);
3481 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
3482 EMIT_COND_BRANCH (ins, X86_CC_EQ, TRUE);
3485 /* Branch if C013 != 100 */
3486 if (cfg->opt & MONO_OPT_FCMOV) {
3487 /* branch if !ZF or (PF|CF) */
3488 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3489 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3490 EMIT_COND_BRANCH (ins, X86_CC_B, FALSE);
3493 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C3);
3494 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3497 if (cfg->opt & MONO_OPT_FCMOV) {
3498 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
3501 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3504 if (cfg->opt & MONO_OPT_FCMOV) {
3505 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3506 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
3509 if (ins->opcode == OP_FBLT_UN) {
3510 guchar *is_not_zero_check, *end_jump;
3511 is_not_zero_check = code;
3512 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3514 x86_jump8 (code, 0);
3515 x86_patch (is_not_zero_check, code);
3516 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3518 x86_patch (end_jump, code);
3520 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3524 if (cfg->opt & MONO_OPT_FCMOV) {
3525 if (ins->opcode == OP_FBGT) {
3528 /* skip branch if C1=1 */
3530 x86_branch8 (code, X86_CC_P, 0, FALSE);
3531 /* branch if (C0 | C3) = 1 */
3532 EMIT_COND_BRANCH (ins, X86_CC_LT, FALSE);
3533 x86_patch (br1, code);
3535 EMIT_COND_BRANCH (ins, X86_CC_LT, FALSE);
3539 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3540 if (ins->opcode == OP_FBGT_UN) {
3541 guchar *is_not_zero_check, *end_jump;
3542 is_not_zero_check = code;
3543 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3545 x86_jump8 (code, 0);
3546 x86_patch (is_not_zero_check, code);
3547 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3549 x86_patch (end_jump, code);
3551 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3554 /* Branch if C013 == 100 or 001 */
3555 if (cfg->opt & MONO_OPT_FCMOV) {
3558 /* skip branch if C1=1 */
3560 x86_branch8 (code, X86_CC_P, 0, FALSE);
3561 /* branch if (C0 | C3) = 1 */
3562 EMIT_COND_BRANCH (ins, X86_CC_BE, FALSE);
3563 x86_patch (br1, code);
3566 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3567 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3568 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C3);
3569 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3572 /* Branch if C013 == 000 */
3573 if (cfg->opt & MONO_OPT_FCMOV) {
3574 EMIT_COND_BRANCH (ins, X86_CC_LE, FALSE);
3577 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3580 /* Branch if C013=000 or 100 */
3581 if (cfg->opt & MONO_OPT_FCMOV) {
3584 /* skip branch if C1=1 */
3586 x86_branch8 (code, X86_CC_P, 0, FALSE);
3587 /* branch if C0=0 */
3588 EMIT_COND_BRANCH (ins, X86_CC_NB, FALSE);
3589 x86_patch (br1, code);
3592 x86_alu_reg_imm (code, X86_AND, X86_EAX, (X86_FP_C0|X86_FP_C1));
3593 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0);
3594 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3597 /* Branch if C013 != 001 */
3598 if (cfg->opt & MONO_OPT_FCMOV) {
3599 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3600 EMIT_COND_BRANCH (ins, X86_CC_GE, FALSE);
3603 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3604 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3608 x86_push_reg (code, X86_EAX);
3611 x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4100);
3612 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3613 x86_pop_reg (code, X86_EAX);
3615 /* Have to clean up the fp stack before throwing the exception */
3617 x86_branch8 (code, X86_CC_NE, 0, FALSE);
3620 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_EQ, FALSE, "ArithmeticException");
3622 x86_patch (br1, code);
3626 code = emit_tls_get (code, ins->dreg, ins->inst_offset);
3629 case OP_MEMORY_BARRIER: {
3630 /* Not needed on x86 */
3633 case OP_ATOMIC_ADD_I4: {
3634 int dreg = ins->dreg;
3636 if (dreg == ins->inst_basereg) {
3637 x86_push_reg (code, ins->sreg2);
3641 if (dreg != ins->sreg2)
3642 x86_mov_reg_reg (code, ins->dreg, ins->sreg2, 4);
3644 x86_prefix (code, X86_LOCK_PREFIX);
3645 x86_xadd_membase_reg (code, ins->inst_basereg, ins->inst_offset, dreg, 4);
3647 if (dreg != ins->dreg) {
3648 x86_mov_reg_reg (code, ins->dreg, dreg, 4);
3649 x86_pop_reg (code, dreg);
3654 case OP_ATOMIC_ADD_NEW_I4: {
3655 int dreg = ins->dreg;
3657 /* hack: limit in regalloc, dreg != sreg1 && dreg != sreg2 */
3658 if (ins->sreg2 == dreg) {
3659 if (dreg == X86_EBX) {
3661 if (ins->inst_basereg == X86_EDI)
3665 if (ins->inst_basereg == X86_EBX)
3668 } else if (ins->inst_basereg == dreg) {
3669 if (dreg == X86_EBX) {
3671 if (ins->sreg2 == X86_EDI)
3675 if (ins->sreg2 == X86_EBX)
3680 if (dreg != ins->dreg) {
3681 x86_push_reg (code, dreg);
3684 x86_mov_reg_reg (code, dreg, ins->sreg2, 4);
3685 x86_prefix (code, X86_LOCK_PREFIX);
3686 x86_xadd_membase_reg (code, ins->inst_basereg, ins->inst_offset, dreg, 4);
3687 /* dreg contains the old value, add with sreg2 value */
3688 x86_alu_reg_reg (code, X86_ADD, dreg, ins->sreg2);
3690 if (ins->dreg != dreg) {
3691 x86_mov_reg_reg (code, ins->dreg, dreg, 4);
3692 x86_pop_reg (code, dreg);
3697 case OP_ATOMIC_EXCHANGE_I4:
3698 case OP_ATOMIC_CAS_IMM_I4: {
3700 int sreg2 = ins->sreg2;
3701 int breg = ins->inst_basereg;
3703 /* cmpxchg uses eax as comperand, need to make sure we can use it
3704 * hack to overcome limits in x86 reg allocator
3705 * (req: dreg == eax and sreg2 != eax and breg != eax)
3707 g_assert (ins->dreg == X86_EAX);
3709 /* We need the EAX reg for the cmpxchg */
3710 if (ins->sreg2 == X86_EAX) {
3711 x86_push_reg (code, X86_EDX);
3712 x86_mov_reg_reg (code, X86_EDX, X86_EAX, 4);
3716 if (breg == X86_EAX) {
3717 x86_push_reg (code, X86_ESI);
3718 x86_mov_reg_reg (code, X86_ESI, X86_EAX, 4);
3722 if (ins->opcode == OP_ATOMIC_CAS_IMM_I4) {
3723 x86_mov_reg_imm (code, X86_EAX, ins->backend.data);
3725 x86_prefix (code, X86_LOCK_PREFIX);
3726 x86_cmpxchg_membase_reg (code, breg, ins->inst_offset, sreg2);
3728 x86_mov_reg_membase (code, X86_EAX, breg, ins->inst_offset, 4);
3730 br [0] = code; x86_prefix (code, X86_LOCK_PREFIX);
3731 x86_cmpxchg_membase_reg (code, breg, ins->inst_offset, sreg2);
3732 br [1] = code; x86_branch8 (code, X86_CC_NE, -1, FALSE);
3733 x86_patch (br [1], br [0]);
3736 if (breg != ins->inst_basereg)
3737 x86_pop_reg (code, X86_ESI);
3739 if (ins->sreg2 != sreg2)
3740 x86_pop_reg (code, X86_EDX);
3745 g_warning ("unknown opcode %s\n", mono_inst_name (ins->opcode));
3746 g_assert_not_reached ();
3749 if (G_UNLIKELY ((code - cfg->native_code - offset) > max_len)) {
3750 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3751 mono_inst_name (ins->opcode), max_len, code - cfg->native_code - offset);
3752 g_assert_not_reached ();
3758 cfg->code_len = code - cfg->native_code;
3762 mono_arch_register_lowlevel_calls (void)
3767 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3769 MonoJumpInfo *patch_info;
3770 gboolean compile_aot = !run_cctors;
3772 for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3773 unsigned char *ip = patch_info->ip.i + code;
3774 const unsigned char *target;
3776 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3779 switch (patch_info->type) {
3780 case MONO_PATCH_INFO_BB:
3781 case MONO_PATCH_INFO_LABEL:
3784 /* No need to patch these */
3789 switch (patch_info->type) {
3790 case MONO_PATCH_INFO_IP:
3791 *((gconstpointer *)(ip)) = target;
3793 case MONO_PATCH_INFO_CLASS_INIT: {
3795 /* Might already been changed to a nop */
3796 x86_call_code (code, 0);
3797 x86_patch (ip, target);
3800 case MONO_PATCH_INFO_ABS:
3801 case MONO_PATCH_INFO_METHOD:
3802 case MONO_PATCH_INFO_METHOD_JUMP:
3803 case MONO_PATCH_INFO_INTERNAL_METHOD:
3804 case MONO_PATCH_INFO_BB:
3805 case MONO_PATCH_INFO_LABEL:
3806 case MONO_PATCH_INFO_RGCTX_FETCH:
3807 case MONO_PATCH_INFO_GENERIC_CLASS_INIT:
3808 x86_patch (ip, target);
3810 case MONO_PATCH_INFO_NONE:
3813 guint32 offset = mono_arch_get_patch_offset (ip);
3814 *((gconstpointer *)(ip + offset)) = target;
3822 mono_arch_emit_prolog (MonoCompile *cfg)
3824 MonoMethod *method = cfg->method;
3826 MonoMethodSignature *sig;
3828 int alloc_size, pos, max_offset, i;
3831 cfg->code_size = MAX (mono_method_get_header (method)->code_size * 4, 10240);
3833 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
3834 cfg->code_size += 512;
3836 code = cfg->native_code = g_malloc (cfg->code_size);
3838 x86_push_reg (code, X86_EBP);
3839 x86_mov_reg_reg (code, X86_EBP, X86_ESP, 4);
3841 alloc_size = cfg->stack_offset;
3844 if (method->wrapper_type == MONO_WRAPPER_NATIVE_TO_MANAGED) {
3845 /* Might need to attach the thread to the JIT or change the domain for the callback */
3846 if (appdomain_tls_offset != -1 && lmf_tls_offset != -1) {
3847 guint8 *buf, *no_domain_branch;
3849 code = emit_tls_get (code, X86_EAX, appdomain_tls_offset);
3850 x86_alu_reg_imm (code, X86_CMP, X86_EAX, GPOINTER_TO_UINT (cfg->domain));
3851 no_domain_branch = code;
3852 x86_branch8 (code, X86_CC_NE, 0, 0);
3853 code = emit_tls_get ( code, X86_EAX, lmf_tls_offset);
3854 x86_test_reg_reg (code, X86_EAX, X86_EAX);
3856 x86_branch8 (code, X86_CC_NE, 0, 0);
3857 x86_patch (no_domain_branch, code);
3858 x86_push_imm (code, cfg->domain);
3859 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_jit_thread_attach");
3860 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3861 x86_patch (buf, code);
3862 #ifdef PLATFORM_WIN32
3863 /* The TLS key actually contains a pointer to the MonoJitTlsData structure */
3864 /* FIXME: Add a separate key for LMF to avoid this */
3865 x86_alu_reg_imm (code, X86_ADD, X86_EAX, G_STRUCT_OFFSET (MonoJitTlsData, lmf));
3869 g_assert (!cfg->compile_aot);
3870 x86_push_imm (code, cfg->domain);
3871 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_jit_thread_attach");
3872 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3876 if (method->save_lmf) {
3877 pos += sizeof (MonoLMF);
3879 /* save the current IP */
3880 mono_add_patch_info (cfg, code + 1 - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3881 x86_push_imm_template (code);
3883 /* save all caller saved regs */
3884 x86_push_reg (code, X86_EBP);
3885 x86_push_reg (code, X86_ESI);
3886 x86_push_reg (code, X86_EDI);
3887 x86_push_reg (code, X86_EBX);
3889 if ((lmf_tls_offset != -1) && !is_win32 && !optimize_for_xen) {
3891 * Optimized version which uses the mono_lmf TLS variable instead of indirection
3892 * through the mono_lmf_addr TLS variable.
3894 /* %eax = previous_lmf */
3895 x86_prefix (code, X86_GS_PREFIX);
3896 x86_mov_reg_mem (code, X86_EAX, lmf_tls_offset, 4);
3897 /* skip esp + method_info + lmf */
3898 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 12);
3899 /* push previous_lmf */
3900 x86_push_reg (code, X86_EAX);
3902 x86_prefix (code, X86_GS_PREFIX);
3903 x86_mov_mem_reg (code, lmf_tls_offset, X86_ESP, 4);
3905 /* get the address of lmf for the current thread */
3907 * This is performance critical so we try to use some tricks to make
3911 if (lmf_addr_tls_offset != -1) {
3912 /* Load lmf quicky using the GS register */
3913 code = emit_tls_get (code, X86_EAX, lmf_addr_tls_offset);
3914 #ifdef PLATFORM_WIN32
3915 /* The TLS key actually contains a pointer to the MonoJitTlsData structure */
3916 /* FIXME: Add a separate key for LMF to avoid this */
3917 x86_alu_reg_imm (code, X86_ADD, X86_EAX, G_STRUCT_OFFSET (MonoJitTlsData, lmf));
3920 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_get_lmf_addr");
3923 /* Skip esp + method info */
3924 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
3927 x86_push_reg (code, X86_EAX);
3928 /* push *lfm (previous_lmf) */
3929 x86_push_membase (code, X86_EAX, 0);
3931 x86_mov_membase_reg (code, X86_EAX, 0, X86_ESP, 4);
3935 if (cfg->used_int_regs & (1 << X86_EBX)) {
3936 x86_push_reg (code, X86_EBX);
3940 if (cfg->used_int_regs & (1 << X86_EDI)) {
3941 x86_push_reg (code, X86_EDI);
3945 if (cfg->used_int_regs & (1 << X86_ESI)) {
3946 x86_push_reg (code, X86_ESI);
3954 /* the original alloc_size is already aligned: there is %ebp and retip pushed, so realign */
3956 int tot = alloc_size + pos + 4 + 4; /* ret ip + ebp */
3968 /* See mono_emit_stack_alloc */
3969 #if defined(PLATFORM_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
3970 guint32 remaining_size = alloc_size;
3971 while (remaining_size >= 0x1000) {
3972 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
3973 x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
3974 remaining_size -= 0x1000;
3977 x86_alu_reg_imm (code, X86_SUB, X86_ESP, remaining_size);
3979 x86_alu_reg_imm (code, X86_SUB, X86_ESP, alloc_size);
3983 #if __APPLE__ && DEBUG_APPLE_ALIGNMENT
3984 /* check the stack is aligned */
3985 x86_mov_reg_reg (code, X86_EDX, X86_ESP, 4);
3986 x86_alu_reg_imm (code, X86_AND, X86_EDX, 15);
3987 x86_alu_reg_imm (code, X86_CMP, X86_EDX, 0);
3988 x86_branch_disp (code, X86_CC_EQ, 3, FALSE);
3989 x86_breakpoint (code);
3992 /* compute max_offset in order to use short forward jumps */
3994 if (cfg->opt & MONO_OPT_BRANCH) {
3995 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
3997 bb->max_offset = max_offset;
3999 if (cfg->prof_options & MONO_PROFILE_COVERAGE)
4001 /* max alignment for loops */
4002 if ((cfg->opt & MONO_OPT_LOOP) && bb_is_loop_start (bb))
4003 max_offset += LOOP_ALIGNMENT;
4005 MONO_BB_FOR_EACH_INS (bb, ins) {
4006 if (ins->opcode == OP_LABEL)
4007 ins->inst_c1 = max_offset;
4009 max_offset += ((guint8 *)ins_get_spec (ins->opcode))[MONO_INST_LEN];
4014 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4015 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
4017 /* store runtime generic context */
4018 if (cfg->rgctx_var) {
4019 g_assert (cfg->rgctx_var->opcode == OP_REGOFFSET && cfg->rgctx_var->inst_basereg == X86_EBP);
4021 x86_mov_membase_reg (code, X86_EBP, cfg->rgctx_var->inst_offset, MONO_ARCH_RGCTX_REG, 4);
4024 /* load arguments allocated to register from the stack */
4025 sig = mono_method_signature (method);
4028 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
4029 inst = cfg->args [pos];
4030 if (inst->opcode == OP_REGVAR) {
4031 x86_mov_reg_membase (code, inst->dreg, X86_EBP, inst->inst_offset, 4);
4032 if (cfg->verbose_level > 2)
4033 g_print ("Argument %d assigned to register %s\n", pos, mono_arch_regname (inst->dreg));
4038 cfg->code_len = code - cfg->native_code;
4040 g_assert (cfg->code_len < cfg->code_size);
4046 mono_arch_emit_epilog (MonoCompile *cfg)
4048 MonoMethod *method = cfg->method;
4049 MonoMethodSignature *sig = mono_method_signature (method);
4051 guint32 stack_to_pop;
4053 int max_epilog_size = 16;
4056 if (cfg->method->save_lmf)
4057 max_epilog_size += 128;
4059 while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
4060 cfg->code_size *= 2;
4061 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4062 mono_jit_stats.code_reallocs++;
4065 code = cfg->native_code + cfg->code_len;
4067 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4068 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
4070 /* the code restoring the registers must be kept in sync with OP_JMP */
4073 if (method->save_lmf) {
4074 gint32 prev_lmf_reg;
4075 gint32 lmf_offset = -sizeof (MonoLMF);
4077 if ((lmf_tls_offset != -1) && !is_win32 && !optimize_for_xen) {
4079 * Optimized version which uses the mono_lmf TLS variable instead of indirection
4080 * through the mono_lmf_addr TLS variable.
4082 /* reg = previous_lmf */
4083 x86_mov_reg_membase (code, X86_ECX, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), 4);
4085 /* lmf = previous_lmf */
4086 x86_prefix (code, X86_GS_PREFIX);
4087 x86_mov_mem_reg (code, lmf_tls_offset, X86_ECX, 4);
4089 /* Find a spare register */
4090 switch (mini_type_get_underlying_type (cfg->generic_sharing_context, sig->ret)->type) {
4093 prev_lmf_reg = X86_EDI;
4094 cfg->used_int_regs |= (1 << X86_EDI);
4097 prev_lmf_reg = X86_EDX;
4101 /* reg = previous_lmf */
4102 x86_mov_reg_membase (code, prev_lmf_reg, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), 4);
4105 x86_mov_reg_membase (code, X86_ECX, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), 4);
4107 /* *(lmf) = previous_lmf */
4108 x86_mov_membase_reg (code, X86_ECX, 0, prev_lmf_reg, 4);
4111 /* restore caller saved regs */
4112 if (cfg->used_int_regs & (1 << X86_EBX)) {
4113 x86_mov_reg_membase (code, X86_EBX, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebx), 4);
4116 if (cfg->used_int_regs & (1 << X86_EDI)) {
4117 x86_mov_reg_membase (code, X86_EDI, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, edi), 4);
4119 if (cfg->used_int_regs & (1 << X86_ESI)) {
4120 x86_mov_reg_membase (code, X86_ESI, X86_EBP, lmf_offset + G_STRUCT_OFFSET (MonoLMF, esi), 4);
4123 /* EBP is restored by LEAVE */
4125 if (cfg->used_int_regs & (1 << X86_EBX)) {
4128 if (cfg->used_int_regs & (1 << X86_EDI)) {
4131 if (cfg->used_int_regs & (1 << X86_ESI)) {
4136 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
4138 if (cfg->used_int_regs & (1 << X86_ESI)) {
4139 x86_pop_reg (code, X86_ESI);
4141 if (cfg->used_int_regs & (1 << X86_EDI)) {
4142 x86_pop_reg (code, X86_EDI);
4144 if (cfg->used_int_regs & (1 << X86_EBX)) {
4145 x86_pop_reg (code, X86_EBX);
4149 /* Load returned vtypes into registers if needed */
4150 cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, sig, FALSE);
4151 if (cinfo->ret.storage == ArgValuetypeInReg) {
4152 for (quad = 0; quad < 2; quad ++) {
4153 switch (cinfo->ret.pair_storage [quad]) {
4155 x86_mov_reg_membase (code, cinfo->ret.pair_regs [quad], cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), 4);
4157 case ArgOnFloatFpStack:
4158 x86_fld_membase (code, cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), FALSE);
4160 case ArgOnDoubleFpStack:
4161 x86_fld_membase (code, cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), TRUE);
4166 g_assert_not_reached ();
4173 if (CALLCONV_IS_STDCALL (sig)) {
4174 MonoJitArgumentInfo *arg_info = alloca (sizeof (MonoJitArgumentInfo) * (sig->param_count + 1));
4176 stack_to_pop = mono_arch_get_argument_info (sig, sig->param_count, arg_info);
4177 } else if (MONO_TYPE_ISSTRUCT (mono_method_signature (cfg->method)->ret) && (cinfo->ret.storage == ArgOnStack))
4183 x86_ret_imm (code, stack_to_pop);
4187 cfg->code_len = code - cfg->native_code;
4189 g_assert (cfg->code_len < cfg->code_size);
4193 mono_arch_emit_exceptions (MonoCompile *cfg)
4195 MonoJumpInfo *patch_info;
4198 MonoClass *exc_classes [16];
4199 guint8 *exc_throw_start [16], *exc_throw_end [16];
4203 /* Compute needed space */
4204 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4205 if (patch_info->type == MONO_PATCH_INFO_EXC)
4210 * make sure we have enough space for exceptions
4211 * 16 is the size of two push_imm instructions and a call
4213 if (cfg->compile_aot)
4214 code_size = exc_count * 32;
4216 code_size = exc_count * 16;
4218 while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4219 cfg->code_size *= 2;
4220 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4221 mono_jit_stats.code_reallocs++;
4224 code = cfg->native_code + cfg->code_len;
4227 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4228 switch (patch_info->type) {
4229 case MONO_PATCH_INFO_EXC: {
4230 MonoClass *exc_class;
4234 x86_patch (patch_info->ip.i + cfg->native_code, code);
4236 exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4237 g_assert (exc_class);
4238 throw_ip = patch_info->ip.i;
4240 /* Find a throw sequence for the same exception class */
4241 for (i = 0; i < nthrows; ++i)
4242 if (exc_classes [i] == exc_class)
4245 x86_push_imm (code, (exc_throw_end [i] - cfg->native_code) - throw_ip);
4246 x86_jump_code (code, exc_throw_start [i]);
4247 patch_info->type = MONO_PATCH_INFO_NONE;
4252 /* Compute size of code following the push <OFFSET> */
4255 if ((code - cfg->native_code) - throw_ip < 126 - size) {
4256 /* Use the shorter form */
4258 x86_push_imm (code, 0);
4262 x86_push_imm (code, 0xf0f0f0f0);
4267 exc_classes [nthrows] = exc_class;
4268 exc_throw_start [nthrows] = code;
4271 x86_push_imm (code, exc_class->type_token - MONO_TOKEN_TYPE_DEF);
4272 patch_info->data.name = "mono_arch_throw_corlib_exception";
4273 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4274 patch_info->ip.i = code - cfg->native_code;
4275 x86_call_code (code, 0);
4276 x86_push_imm (buf, (code - cfg->native_code) - throw_ip);
4281 exc_throw_end [nthrows] = code;
4293 cfg->code_len = code - cfg->native_code;
4295 g_assert (cfg->code_len < cfg->code_size);
4299 mono_arch_flush_icache (guint8 *code, gint size)
4305 mono_arch_flush_register_windows (void)
4310 mono_arch_is_inst_imm (gint64 imm)
4316 * Support for fast access to the thread-local lmf structure using the GS
4317 * segment register on NPTL + kernel 2.6.x.
4320 static gboolean tls_offset_inited = FALSE;
4323 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
4325 if (!tls_offset_inited) {
4326 if (!getenv ("MONO_NO_TLS")) {
4327 #ifdef PLATFORM_WIN32
4329 * We need to init this multiple times, since when we are first called, the key might not
4330 * be initialized yet.
4332 appdomain_tls_offset = mono_domain_get_tls_key ();
4333 lmf_tls_offset = mono_get_jit_tls_key ();
4334 thread_tls_offset = mono_thread_get_tls_key ();
4336 /* Only 64 tls entries can be accessed using inline code */
4337 if (appdomain_tls_offset >= 64)
4338 appdomain_tls_offset = -1;
4339 if (lmf_tls_offset >= 64)
4340 lmf_tls_offset = -1;
4341 if (thread_tls_offset >= 64)
4342 thread_tls_offset = -1;
4345 optimize_for_xen = access ("/proc/xen", F_OK) == 0;
4347 tls_offset_inited = TRUE;
4348 appdomain_tls_offset = mono_domain_get_tls_offset ();
4349 lmf_tls_offset = mono_get_lmf_tls_offset ();
4350 lmf_addr_tls_offset = mono_get_lmf_addr_tls_offset ();
4351 thread_tls_offset = mono_thread_get_tls_offset ();
4358 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4363 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, int this_reg, int this_type, int vt_reg)
4365 MonoCallInst *call = (MonoCallInst*)inst;
4366 CallInfo *cinfo = get_call_info (cfg->generic_sharing_context, cfg->mempool, inst->signature, FALSE);
4368 /* add the this argument */
4369 if (this_reg != -1) {
4370 if (cinfo->args [0].storage == ArgInIReg) {
4372 MONO_INST_NEW (cfg, this, OP_MOVE);
4373 this->type = this_type;
4374 this->sreg1 = this_reg;
4375 this->dreg = mono_regstate_next_int (cfg->rs);
4376 mono_bblock_add_inst (cfg->cbb, this);
4378 mono_call_inst_add_outarg_reg (cfg, call, this->dreg, cinfo->args [0].reg, FALSE);
4382 MONO_INST_NEW (cfg, this, OP_OUTARG);
4383 this->type = this_type;
4384 this->sreg1 = this_reg;
4385 mono_bblock_add_inst (cfg->cbb, this);
4392 if (cinfo->ret.storage == ArgValuetypeInReg) {
4394 * The valuetype is in EAX:EDX after the call, needs to be copied to
4395 * the stack. Save the address here, so the call instruction can
4398 MONO_INST_NEW (cfg, vtarg, OP_STORE_MEMBASE_REG);
4399 vtarg->inst_destbasereg = X86_ESP;
4400 vtarg->inst_offset = inst->stack_usage;
4401 vtarg->sreg1 = vt_reg;
4402 mono_bblock_add_inst (cfg->cbb, vtarg);
4404 else if (cinfo->ret.storage == ArgInIReg) {
4405 /* The return address is passed in a register */
4406 MONO_INST_NEW (cfg, vtarg, OP_MOVE);
4407 vtarg->sreg1 = vt_reg;
4408 vtarg->dreg = mono_regstate_next_int (cfg->rs);
4409 mono_bblock_add_inst (cfg->cbb, vtarg);
4411 mono_call_inst_add_outarg_reg (cfg, call, vtarg->dreg, cinfo->ret.reg, FALSE);
4414 MONO_INST_NEW (cfg, vtarg, OP_OUTARG);
4415 vtarg->type = STACK_MP;
4416 vtarg->sreg1 = vt_reg;
4417 mono_bblock_add_inst (cfg->cbb, vtarg);
4422 #ifdef MONO_ARCH_HAVE_IMT
4424 // Linear handler, the bsearch head compare is shorter
4425 //[2 + 4] x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
4426 //[1 + 1] x86_branch8(inst,cond,imm,is_signed)
4427 // x86_patch(ins,target)
4428 //[1 + 5] x86_jump_mem(inst,mem)
4431 #define BR_SMALL_SIZE 2
4432 #define BR_LARGE_SIZE 5
4433 #define JUMP_IMM_SIZE 6
4434 #define ENABLE_WRONG_METHOD_CHECK 0
4437 imt_branch_distance (MonoIMTCheckItem **imt_entries, int start, int target)
4439 int i, distance = 0;
4440 for (i = start; i < target; ++i)
4441 distance += imt_entries [i]->chunk_size;
4446 * LOCKING: called with the domain lock held
4449 mono_arch_build_imt_thunk (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count)
4453 guint8 *code, *start;
4455 for (i = 0; i < count; ++i) {
4456 MonoIMTCheckItem *item = imt_entries [i];
4457 if (item->is_equals) {
4458 if (item->check_target_idx) {
4459 if (!item->compare_done)
4460 item->chunk_size += CMP_SIZE;
4461 item->chunk_size += BR_SMALL_SIZE + JUMP_IMM_SIZE;
4463 item->chunk_size += JUMP_IMM_SIZE;
4464 #if ENABLE_WRONG_METHOD_CHECK
4465 item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
4469 item->chunk_size += CMP_SIZE + BR_LARGE_SIZE;
4470 imt_entries [item->check_target_idx]->compare_done = TRUE;
4472 size += item->chunk_size;
4474 code = mono_code_manager_reserve (domain->code_mp, size);
4476 for (i = 0; i < count; ++i) {
4477 MonoIMTCheckItem *item = imt_entries [i];
4478 item->code_target = code;
4479 if (item->is_equals) {
4480 if (item->check_target_idx) {
4481 if (!item->compare_done)
4482 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->method);
4483 item->jmp_code = code;
4484 x86_branch8 (code, X86_CC_NE, 0, FALSE);
4485 x86_jump_mem (code, & (vtable->vtable [item->vtable_slot]));
4487 /* enable the commented code to assert on wrong method */
4488 #if ENABLE_WRONG_METHOD_CHECK
4489 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->method);
4490 item->jmp_code = code;
4491 x86_branch8 (code, X86_CC_NE, 0, FALSE);
4493 x86_jump_mem (code, & (vtable->vtable [item->vtable_slot]));
4494 #if ENABLE_WRONG_METHOD_CHECK
4495 x86_patch (item->jmp_code, code);
4496 x86_breakpoint (code);
4497 item->jmp_code = NULL;
4501 x86_alu_reg_imm (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)item->method);
4502 item->jmp_code = code;
4503 if (x86_is_imm8 (imt_branch_distance (imt_entries, i, item->check_target_idx)))
4504 x86_branch8 (code, X86_CC_GE, 0, FALSE);
4506 x86_branch32 (code, X86_CC_GE, 0, FALSE);
4509 /* patch the branches to get to the target items */
4510 for (i = 0; i < count; ++i) {
4511 MonoIMTCheckItem *item = imt_entries [i];
4512 if (item->jmp_code) {
4513 if (item->check_target_idx) {
4514 x86_patch (item->jmp_code, imt_entries [item->check_target_idx]->code_target);
4519 mono_stats.imt_thunks_size += code - start;
4520 g_assert (code - start <= size);
4525 mono_arch_find_imt_method (gpointer *regs, guint8 *code)
4527 return (MonoMethod*) regs [MONO_ARCH_IMT_REG];
4531 mono_arch_find_this_argument (gpointer *regs, MonoMethod *method, MonoGenericSharingContext *gsctx)
4533 MonoMethodSignature *sig = mono_method_signature (method);
4534 CallInfo *cinfo = get_call_info (gsctx, NULL, sig, FALSE);
4535 int this_argument_offset;
4536 MonoObject *this_argument;
4539 * this is the offset of the this arg from esp as saved at the start of
4540 * mono_arch_create_trampoline_code () in tramp-x86.c.
4542 this_argument_offset = 5;
4543 if (MONO_TYPE_ISSTRUCT (sig->ret) && (cinfo->ret.storage == ArgOnStack))
4544 this_argument_offset++;
4546 this_argument = * (MonoObject**) (((guint8*) regs [X86_ESP]) + this_argument_offset * sizeof (gpointer));
4549 return this_argument;
4554 mono_arch_find_static_call_vtable (gpointer *regs, guint8 *code)
4556 return (MonoVTable*) regs [MONO_ARCH_RGCTX_REG];
4560 mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4562 MonoInst *ins = NULL;
4564 if (cmethod->klass == mono_defaults.math_class) {
4565 if (strcmp (cmethod->name, "Sin") == 0) {
4566 MONO_INST_NEW (cfg, ins, OP_SIN);
4567 ins->inst_i0 = args [0];
4568 } else if (strcmp (cmethod->name, "Cos") == 0) {
4569 MONO_INST_NEW (cfg, ins, OP_COS);
4570 ins->inst_i0 = args [0];
4571 } else if (strcmp (cmethod->name, "Tan") == 0) {
4572 MONO_INST_NEW (cfg, ins, OP_TAN);
4573 ins->inst_i0 = args [0];
4574 } else if (strcmp (cmethod->name, "Atan") == 0) {
4575 MONO_INST_NEW (cfg, ins, OP_ATAN);
4576 ins->inst_i0 = args [0];
4577 } else if (strcmp (cmethod->name, "Sqrt") == 0) {
4578 MONO_INST_NEW (cfg, ins, OP_SQRT);
4579 ins->inst_i0 = args [0];
4580 } else if (strcmp (cmethod->name, "Abs") == 0 && fsig->params [0]->type == MONO_TYPE_R8) {
4581 MONO_INST_NEW (cfg, ins, OP_ABS);
4582 ins->inst_i0 = args [0];
4585 if (cfg->opt & MONO_OPT_CMOV) {
4588 if (strcmp (cmethod->name, "Min") == 0) {
4589 if (fsig->params [0]->type == MONO_TYPE_I4)
4591 else if (fsig->params [0]->type == MONO_TYPE_U4)
4592 opcode = OP_IMIN_UN;
4593 } else if (strcmp (cmethod->name, "Max") == 0) {
4594 if (fsig->params [0]->type == MONO_TYPE_I4)
4596 else if (fsig->params [0]->type == MONO_TYPE_U4)
4597 opcode = OP_IMAX_UN;
4601 MONO_INST_NEW (cfg, ins, opcode);
4602 ins->inst_i0 = args [0];
4603 ins->inst_i1 = args [1];
4608 /* OP_FREM is not IEEE compatible */
4609 else if (strcmp (cmethod->name, "IEEERemainder") == 0) {
4610 MONO_INST_NEW (cfg, ins, OP_FREM);
4611 ins->inst_i0 = args [0];
4612 ins->inst_i1 = args [1];
4621 mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4623 MonoInst *ins = NULL;
4626 if (cmethod->klass == mono_defaults.math_class) {
4627 if (strcmp (cmethod->name, "Sin") == 0) {
4629 } else if (strcmp (cmethod->name, "Cos") == 0) {
4631 } else if (strcmp (cmethod->name, "Tan") == 0) {
4633 } else if (strcmp (cmethod->name, "Atan") == 0) {
4635 } else if (strcmp (cmethod->name, "Sqrt") == 0) {
4637 } else if (strcmp (cmethod->name, "Abs") == 0 && fsig->params [0]->type == MONO_TYPE_R8) {
4642 MONO_INST_NEW (cfg, ins, opcode);
4643 ins->type = STACK_R8;
4644 ins->dreg = mono_alloc_freg (cfg);
4645 ins->sreg1 = args [0]->dreg;
4646 MONO_ADD_INS (cfg->cbb, ins);
4649 if (cfg->opt & MONO_OPT_CMOV) {
4652 if (strcmp (cmethod->name, "Min") == 0) {
4653 if (fsig->params [0]->type == MONO_TYPE_I4)
4655 } else if (strcmp (cmethod->name, "Max") == 0) {
4656 if (fsig->params [0]->type == MONO_TYPE_I4)
4661 MONO_INST_NEW (cfg, ins, opcode);
4662 ins->type = STACK_I4;
4663 ins->dreg = mono_alloc_ireg (cfg);
4664 ins->sreg1 = args [0]->dreg;
4665 ins->sreg2 = args [1]->dreg;
4666 MONO_ADD_INS (cfg->cbb, ins);
4671 /* OP_FREM is not IEEE compatible */
4672 else if (strcmp (cmethod->name, "IEEERemainder") == 0) {
4673 MONO_INST_NEW (cfg, ins, OP_FREM);
4674 ins->inst_i0 = args [0];
4675 ins->inst_i1 = args [1];
4684 mono_arch_print_tree (MonoInst *tree, int arity)
4689 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
4695 if (appdomain_tls_offset == -1)
4698 MONO_INST_NEW (cfg, ins, OP_TLS_GET);
4699 ins->inst_offset = appdomain_tls_offset;
4703 MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
4707 if (thread_tls_offset == -1)
4710 MONO_INST_NEW (cfg, ins, OP_TLS_GET);
4711 ins->inst_offset = thread_tls_offset;
4716 mono_arch_get_patch_offset (guint8 *code)
4718 if ((code [0] == 0x8b) && (x86_modrm_mod (code [1]) == 0x2))
4720 else if ((code [0] == 0xba))
4722 else if ((code [0] == 0x68))
4725 else if ((code [0] == 0xff) && (x86_modrm_reg (code [1]) == 0x6))
4726 /* push <OFFSET>(<REG>) */
4728 else if ((code [0] == 0xff) && (x86_modrm_reg (code [1]) == 0x2))
4729 /* call *<OFFSET>(<REG>) */
4731 else if ((code [0] == 0xdd) || (code [0] == 0xd9))
4734 else if ((code [0] == 0x58) && (code [1] == 0x05))
4735 /* pop %eax; add <OFFSET>, %eax */
4737 else if ((code [0] >= 0x58) && (code [0] <= 0x58 + X86_NREG) && (code [1] == 0x81))
4738 /* pop <REG>; add <OFFSET>, <REG> */
4740 else if ((code [0] >= 0xb8) && (code [0] < 0xb8 + 8))
4741 /* mov <REG>, imm */
4744 g_assert_not_reached ();
4750 * mono_breakpoint_clean_code:
4752 * Copy @size bytes from @code - @offset to the buffer @buf. If the debugger inserted software
4753 * breakpoints in the original code, they are removed in the copy.
4755 * Returns TRUE if no sw breakpoint was present.
4758 mono_breakpoint_clean_code (guint8 *method_start, guint8 *code, int offset, guint8 *buf, int size)
4761 gboolean can_write = TRUE;
4763 * If method_start is non-NULL we need to perform bound checks, since we access memory
4764 * at code - offset we could go before the start of the method and end up in a different
4765 * page of memory that is not mapped or read incorrect data anyway. We zero-fill the bytes
4768 if (!method_start || code - offset >= method_start) {
4769 memcpy (buf, code - offset, size);
4771 int diff = code - method_start;
4772 memset (buf, 0, size);
4773 memcpy (buf + offset - diff, method_start, diff + size - offset);
4776 for (i = 0; i < MONO_BREAKPOINT_ARRAY_SIZE; ++i) {
4777 int idx = mono_breakpoint_info_index [i];
4781 ptr = mono_breakpoint_info [idx].address;
4782 if (ptr >= code && ptr < code + size) {
4783 guint8 saved_byte = mono_breakpoint_info [idx].saved_byte;
4785 /*g_print ("patching %p with 0x%02x (was: 0x%02x)\n", ptr, saved_byte, buf [ptr - code]);*/
4786 buf [ptr - code] = saved_byte;
4793 mono_arch_get_vcall_slot (guint8 *code, gpointer *regs, int *displacement)
4799 mono_breakpoint_clean_code (NULL, code, 8, buf, sizeof (buf));
4804 /* go to the start of the call instruction
4806 * address_byte = (m << 6) | (o << 3) | reg
4807 * call opcode: 0xff address_byte displacement
4809 * 0xff m=2,o=2 imm32
4814 * A given byte sequence can match more than case here, so we have to be
4815 * really careful about the ordering of the cases. Longer sequences
4818 if ((code [-2] == 0x8b) && (x86_modrm_mod (code [-1]) == 0x2) && (code [4] == 0xff) && (x86_modrm_reg (code [5]) == 0x2) && (x86_modrm_mod (code [5]) == 0x0)) {
4820 * This is an interface call
4821 * 8b 80 0c e8 ff ff mov 0xffffe80c(%eax),%eax
4822 * ff 10 call *(%eax)
4824 reg = x86_modrm_rm (code [5]);
4826 #ifdef MONO_ARCH_HAVE_IMT
4827 } else if ((code [-2] == 0xba) && (code [3] == 0xff) && (x86_modrm_mod (code [4]) == 1) && (x86_modrm_reg (code [4]) == 2) && ((signed char)code [5] < 0)) {
4828 /* IMT-based interface calls: with MONO_ARCH_IMT_REG == edx
4829 * ba 14 f8 28 08 mov $0x828f814,%edx
4830 * ff 50 fc call *0xfffffffc(%eax)
4832 reg = code [4] & 0x07;
4833 disp = (signed char)code [5];
4835 } else if ((code [1] != 0xe8) && (code [3] == 0xff) && ((code [4] & 0x18) == 0x10) && ((code [4] >> 6) == 1)) {
4836 reg = code [4] & 0x07;
4837 disp = (signed char)code [5];
4839 if ((code [0] == 0xff) && ((code [1] & 0x18) == 0x10) && ((code [1] >> 6) == 2)) {
4840 reg = code [1] & 0x07;
4841 disp = *((gint32*)(code + 2));
4842 } else if ((code [1] == 0xe8)) {
4844 } else if ((code [4] == 0xff) && (((code [5] >> 6) & 0x3) == 0) && (((code [5] >> 3) & 0x7) == 2)) {
4846 * This is a interface call
4847 * 8b 40 30 mov 0x30(%eax),%eax
4848 * ff 10 call *(%eax)
4851 reg = code [5] & 0x07;
4857 *displacement = disp;
4862 mono_arch_get_vcall_slot_addr (guint8 *code, gpointer *regs)
4866 vt = mono_arch_get_vcall_slot (code, regs, &displacement);
4869 return (gpointer*)((char*)vt + displacement);
4873 mono_arch_get_this_arg_from_call (MonoGenericSharingContext *gsctx, MonoMethodSignature *sig,
4874 gssize *regs, guint8 *code)
4876 guint32 esp = regs [X86_ESP];
4881 gsctx = mono_get_generic_context_from_code (code);
4882 cinfo = get_call_info (gsctx, NULL, sig, FALSE);
4885 * The stack looks like:
4888 * <possible vtype return address>
4890 * <4 pointers pushed by mono_arch_create_trampoline_code ()>
4892 res = (((MonoObject**)esp) [5 + (cinfo->args [0].offset / 4)]);
4897 #define MAX_ARCH_DELEGATE_PARAMS 10
4900 mono_arch_get_delegate_invoke_impl (MonoMethodSignature *sig, gboolean has_target)
4902 guint8 *code, *start;
4904 if (sig->param_count > MAX_ARCH_DELEGATE_PARAMS)
4907 /* FIXME: Support more cases */
4908 if (MONO_TYPE_ISSTRUCT (sig->ret))
4912 * The stack contains:
4918 static guint8* cached = NULL;
4922 start = code = mono_global_codeman_reserve (64);
4924 /* Replace the this argument with the target */
4925 x86_mov_reg_membase (code, X86_EAX, X86_ESP, 4, 4);
4926 x86_mov_reg_membase (code, X86_ECX, X86_EAX, G_STRUCT_OFFSET (MonoDelegate, target), 4);
4927 x86_mov_membase_reg (code, X86_ESP, 4, X86_ECX, 4);
4928 x86_jump_membase (code, X86_EAX, G_STRUCT_OFFSET (MonoDelegate, method_ptr));
4930 g_assert ((code - start) < 64);
4932 mono_debug_add_delegate_trampoline (start, code - start);
4934 mono_memory_barrier ();
4938 static guint8* cache [MAX_ARCH_DELEGATE_PARAMS + 1] = {NULL};
4940 /* 8 for mov_reg and jump, plus 8 for each parameter */
4941 int code_reserve = 8 + (sig->param_count * 8);
4943 for (i = 0; i < sig->param_count; ++i)
4944 if (!mono_is_regsize_var (sig->params [i]))
4947 code = cache [sig->param_count];
4952 * The stack contains:
4953 * <args in reverse order>
4958 * <args in reverse order>
4961 * without unbalancing the stack.
4962 * So move each arg up a spot in the stack (overwriting un-needed 'this' arg)
4963 * and leaving original spot of first arg as placeholder in stack so
4964 * when callee pops stack everything works.
4967 start = code = mono_global_codeman_reserve (code_reserve);
4969 /* store delegate for access to method_ptr */
4970 x86_mov_reg_membase (code, X86_ECX, X86_ESP, 4, 4);
4973 for (i = 0; i < sig->param_count; ++i) {
4974 x86_mov_reg_membase (code, X86_EAX, X86_ESP, (i+2)*4, 4);
4975 x86_mov_membase_reg (code, X86_ESP, (i+1)*4, X86_EAX, 4);
4978 x86_jump_membase (code, X86_ECX, G_STRUCT_OFFSET (MonoDelegate, method_ptr));
4980 g_assert ((code - start) < code_reserve);
4982 mono_debug_add_delegate_trampoline (start, code - start);
4984 mono_memory_barrier ();
4986 cache [sig->param_count] = start;
4993 mono_arch_context_get_int_reg (MonoContext *ctx, int reg)
4996 case X86_ECX: return (gpointer)ctx->ecx;
4997 case X86_EDX: return (gpointer)ctx->edx;
4998 case X86_EBP: return (gpointer)ctx->ebp;
4999 case X86_ESP: return (gpointer)ctx->esp;
5000 default: return ((gpointer)(&ctx->eax)[reg]);