2 * mini-x86.c: x86 backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
9 * (C) 2003 Ximian, Inc.
15 #ifndef PLATFORM_WIN32
20 #include <mono/metadata/appdomain.h>
21 #include <mono/metadata/debug-helpers.h>
22 #include <mono/metadata/threads.h>
23 #include <mono/metadata/profiler-private.h>
24 #include <mono/utils/mono-math.h>
29 #include "cpu-pentium.h"
31 /* On windows, these hold the key returned by TlsAlloc () */
32 static gint lmf_tls_offset = -1;
33 static gint appdomain_tls_offset = -1;
34 static gint thread_tls_offset = -1;
36 #define ALIGN_TO(val,align) ((((guint64)val) + ((align) - 1)) & ~((align) - 1))
39 /* Under windows, the default pinvoke calling convention is stdcall */
40 #define CALLCONV_IS_STDCALL(sig) ((((sig)->call_convention) == MONO_CALL_STDCALL) || ((sig)->pinvoke && ((sig)->call_convention) == MONO_CALL_DEFAULT))
42 #define CALLCONV_IS_STDCALL(sig) (((sig)->call_convention) == MONO_CALL_STDCALL)
45 #define SIGNAL_STACK_SIZE (64 * 1024)
47 #define NOT_IMPLEMENTED g_assert_not_reached ()
50 mono_arch_regname (int reg) {
52 case X86_EAX: return "%eax";
53 case X86_EBX: return "%ebx";
54 case X86_ECX: return "%ecx";
55 case X86_EDX: return "%edx";
56 case X86_ESP: return "%esp"; case X86_EBP: return "%ebp";
57 case X86_EDI: return "%edi";
58 case X86_ESI: return "%esi";
79 /* Only if storage == ArgValuetypeInReg */
80 ArgStorage pair_storage [2];
89 gboolean need_stack_align;
97 #define FLOAT_PARAM_REGS 0
99 static X86_Reg_No param_regs [] = { 0 };
101 #ifdef PLATFORM_WIN32
102 static X86_Reg_No return_regs [] = { X86_EAX, X86_EDX };
106 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo)
108 ainfo->offset = *stack_size;
110 if (*gr >= PARAM_REGS) {
111 ainfo->storage = ArgOnStack;
112 (*stack_size) += sizeof (gpointer);
115 ainfo->storage = ArgInIReg;
116 ainfo->reg = param_regs [*gr];
122 add_general_pair (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo)
124 ainfo->offset = *stack_size;
126 g_assert (PARAM_REGS == 0);
128 ainfo->storage = ArgOnStack;
129 (*stack_size) += sizeof (gpointer) * 2;
133 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean is_double)
135 ainfo->offset = *stack_size;
137 if (*gr >= FLOAT_PARAM_REGS) {
138 ainfo->storage = ArgOnStack;
139 (*stack_size) += sizeof (gpointer);
142 /* A double register */
144 ainfo->storage = ArgInDoubleSSEReg;
146 ainfo->storage = ArgInFloatSSEReg;
154 add_valuetype (MonoMethodSignature *sig, ArgInfo *ainfo, MonoType *type,
156 guint32 *gr, guint32 *fr, guint32 *stack_size)
161 klass = mono_class_from_mono_type (type);
163 size = mono_type_native_stack_size (&klass->byval_arg, NULL);
165 size = mono_type_stack_size (&klass->byval_arg, NULL);
167 #ifdef PLATFORM_WIN32
168 if (sig->pinvoke && is_return) {
169 MonoMarshalType *info;
172 * the exact rules are not very well documented, the code below seems to work with the
173 * code generated by gcc 3.3.3 -mno-cygwin.
175 info = mono_marshal_load_type_info (klass);
178 ainfo->pair_storage [0] = ainfo->pair_storage [1] = ArgNone;
180 /* Special case structs with only a float member */
181 if ((info->native_size == 8) && (info->num_fields == 1) && (info->fields [0].field->type->type == MONO_TYPE_R8)) {
182 ainfo->storage = ArgValuetypeInReg;
183 ainfo->pair_storage [0] = ArgOnDoubleFpStack;
186 if ((info->native_size == 4) && (info->num_fields == 1) && (info->fields [0].field->type->type == MONO_TYPE_R4)) {
187 ainfo->storage = ArgValuetypeInReg;
188 ainfo->pair_storage [0] = ArgOnFloatFpStack;
191 if ((info->native_size == 1) || (info->native_size == 2) || (info->native_size == 4) || (info->native_size == 8)) {
192 ainfo->storage = ArgValuetypeInReg;
193 ainfo->pair_storage [0] = ArgInIReg;
194 ainfo->pair_regs [0] = return_regs [0];
195 if (info->native_size > 4) {
196 ainfo->pair_storage [1] = ArgInIReg;
197 ainfo->pair_regs [1] = return_regs [1];
204 ainfo->offset = *stack_size;
205 ainfo->storage = ArgOnStack;
206 *stack_size += ALIGN_TO (size, sizeof (gpointer));
212 * Obtain information about a call according to the calling convention.
213 * For x86 ELF, see the "System V Application Binary Interface Intel386
214 * Architecture Processor Supplment, Fourth Edition" document for more
216 * For x86 win32, see ???.
219 get_call_info (MonoMethodSignature *sig, gboolean is_pinvoke)
223 int n = sig->hasthis + sig->param_count;
224 guint32 stack_size = 0;
227 cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
234 ret_type = mono_type_get_underlying_type (sig->ret);
235 switch (ret_type->type) {
236 case MONO_TYPE_BOOLEAN:
247 case MONO_TYPE_FNPTR:
248 case MONO_TYPE_CLASS:
249 case MONO_TYPE_OBJECT:
250 case MONO_TYPE_SZARRAY:
251 case MONO_TYPE_ARRAY:
252 case MONO_TYPE_STRING:
253 cinfo->ret.storage = ArgInIReg;
254 cinfo->ret.reg = X86_EAX;
258 cinfo->ret.storage = ArgInIReg;
259 cinfo->ret.reg = X86_EAX;
262 cinfo->ret.storage = ArgOnFloatFpStack;
265 cinfo->ret.storage = ArgOnDoubleFpStack;
267 case MONO_TYPE_VALUETYPE: {
268 guint32 tmp_gr = 0, tmp_fr = 0, tmp_stacksize = 0;
270 add_valuetype (sig, &cinfo->ret, sig->ret, TRUE, &tmp_gr, &tmp_fr, &tmp_stacksize);
271 if (cinfo->ret.storage == ArgOnStack)
272 /* The caller passes the address where the value is stored */
273 add_general (&gr, &stack_size, &cinfo->ret);
276 case MONO_TYPE_TYPEDBYREF:
277 /* Same as a valuetype with size 24 */
278 add_general (&gr, &stack_size, &cinfo->ret);
282 cinfo->ret.storage = ArgNone;
285 g_error ("Can't handle as return value 0x%x", sig->ret->type);
291 add_general (&gr, &stack_size, cinfo->args + 0);
293 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
295 fr = FLOAT_PARAM_REGS;
297 /* Emit the signature cookie just before the implicit arguments */
298 add_general (&gr, &stack_size, &cinfo->sig_cookie);
301 for (i = 0; i < sig->param_count; ++i) {
302 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
305 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
306 /* We allways pass the sig cookie on the stack for simplicity */
308 * Prevent implicit arguments + the sig cookie from being passed
312 fr = FLOAT_PARAM_REGS;
314 /* Emit the signature cookie just before the implicit arguments */
315 add_general (&gr, &stack_size, &cinfo->sig_cookie);
318 if (sig->params [i]->byref) {
319 add_general (&gr, &stack_size, ainfo);
322 ptype = mono_type_get_underlying_type (sig->params [i]);
323 switch (ptype->type) {
324 case MONO_TYPE_BOOLEAN:
327 add_general (&gr, &stack_size, ainfo);
332 add_general (&gr, &stack_size, ainfo);
336 add_general (&gr, &stack_size, ainfo);
341 case MONO_TYPE_FNPTR:
342 case MONO_TYPE_CLASS:
343 case MONO_TYPE_OBJECT:
344 case MONO_TYPE_STRING:
345 case MONO_TYPE_SZARRAY:
346 case MONO_TYPE_ARRAY:
347 add_general (&gr, &stack_size, ainfo);
349 case MONO_TYPE_VALUETYPE:
350 add_valuetype (sig, ainfo, sig->params [i], FALSE, &gr, &fr, &stack_size);
352 case MONO_TYPE_TYPEDBYREF:
353 stack_size += sizeof (MonoTypedRef);
354 ainfo->storage = ArgOnStack;
358 add_general_pair (&gr, &stack_size, ainfo);
361 add_float (&fr, &stack_size, ainfo, FALSE);
364 add_float (&fr, &stack_size, ainfo, TRUE);
367 g_error ("unexpected type 0x%x", ptype->type);
368 g_assert_not_reached ();
372 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
374 fr = FLOAT_PARAM_REGS;
376 /* Emit the signature cookie just before the implicit arguments */
377 add_general (&gr, &stack_size, &cinfo->sig_cookie);
380 cinfo->stack_usage = stack_size;
381 cinfo->reg_usage = gr;
382 cinfo->freg_usage = fr;
387 * mono_arch_get_argument_info:
388 * @csig: a method signature
389 * @param_count: the number of parameters to consider
390 * @arg_info: an array to store the result infos
392 * Gathers information on parameters such as size, alignment and
393 * padding. arg_info should be large enought to hold param_count + 1 entries.
395 * Returns the size of the activation frame.
398 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
400 int k, frame_size = 0;
401 int size, align, pad;
405 cinfo = get_call_info (csig, FALSE);
407 if (MONO_TYPE_ISSTRUCT (csig->ret) && (cinfo->ret.storage == ArgOnStack)) {
408 frame_size += sizeof (gpointer);
412 arg_info [0].offset = offset;
415 frame_size += sizeof (gpointer);
419 arg_info [0].size = frame_size;
421 for (k = 0; k < param_count; k++) {
424 size = mono_type_native_stack_size (csig->params [k], &align);
426 size = mono_type_stack_size (csig->params [k], &align);
428 /* ignore alignment for now */
431 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
432 arg_info [k].pad = pad;
434 arg_info [k + 1].pad = 0;
435 arg_info [k + 1].size = size;
437 arg_info [k + 1].offset = offset;
441 align = MONO_ARCH_FRAME_ALIGNMENT;
442 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
443 arg_info [k].pad = pad;
450 static const guchar cpuid_impl [] = {
451 0x55, /* push %ebp */
452 0x89, 0xe5, /* mov %esp,%ebp */
453 0x53, /* push %ebx */
454 0x8b, 0x45, 0x08, /* mov 0x8(%ebp),%eax */
455 0x0f, 0xa2, /* cpuid */
456 0x50, /* push %eax */
457 0x8b, 0x45, 0x10, /* mov 0x10(%ebp),%eax */
458 0x89, 0x18, /* mov %ebx,(%eax) */
459 0x8b, 0x45, 0x14, /* mov 0x14(%ebp),%eax */
460 0x89, 0x08, /* mov %ecx,(%eax) */
461 0x8b, 0x45, 0x18, /* mov 0x18(%ebp),%eax */
462 0x89, 0x10, /* mov %edx,(%eax) */
464 0x8b, 0x55, 0x0c, /* mov 0xc(%ebp),%edx */
465 0x89, 0x02, /* mov %eax,(%edx) */
471 typedef void (*CpuidFunc) (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx);
474 cpuid (int id, int* p_eax, int* p_ebx, int* p_ecx, int* p_edx)
478 __asm__ __volatile__ (
481 "movl %%eax, %%edx\n"
482 "xorl $0x200000, %%eax\n"
487 "xorl %%edx, %%eax\n"
488 "andl $0x200000, %%eax\n"
510 /* Have to use the code manager to get around WinXP DEP */
511 MonoCodeManager *codeman = mono_code_manager_new_dynamic ();
513 void *ptr = mono_code_manager_reserve (codeman, sizeof (cpuid_impl));
514 memcpy (ptr, cpuid_impl, sizeof (cpuid_impl));
516 func = (CpuidFunc)ptr;
517 func (id, p_eax, p_ebx, p_ecx, p_edx);
519 mono_code_manager_destroy (codeman);
522 * We use this approach because of issues with gcc and pic code, see:
523 * http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=7329
524 __asm__ __volatile__ ("cpuid"
525 : "=a" (*p_eax), "=b" (*p_ebx), "=c" (*p_ecx), "=d" (*p_edx)
534 * Initialize the cpu to execute managed code.
537 mono_arch_cpu_init (void)
539 /* spec compliance requires running with double precision */
543 __asm__ __volatile__ ("fnstcw %0\n": "=m" (fpcw));
544 fpcw &= ~X86_FPCW_PRECC_MASK;
545 fpcw |= X86_FPCW_PREC_DOUBLE;
546 __asm__ __volatile__ ("fldcw %0\n": : "m" (fpcw));
547 __asm__ __volatile__ ("fnstcw %0\n": "=m" (fpcw));
549 _control87 (_PC_64, MCW_PC);
554 * This function returns the optimizations supported on this cpu.
557 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
559 int eax, ebx, ecx, edx;
563 /* Feature Flags function, flags returned in EDX. */
564 if (cpuid (1, &eax, &ebx, &ecx, &edx)) {
565 if (edx & (1 << 15)) {
566 opts |= MONO_OPT_CMOV;
568 opts |= MONO_OPT_FCMOV;
570 *exclude_mask |= MONO_OPT_FCMOV;
572 *exclude_mask |= MONO_OPT_CMOV;
578 * Determine whenever the trap whose info is in SIGINFO is caused by
582 mono_arch_is_int_overflow (void *sigctx, void *info)
587 mono_arch_sigctx_to_monoctx (sigctx, &ctx);
589 ip = (guint8*)ctx.eip;
591 if ((ip [0] == 0xf7) && (x86_modrm_mod (ip [1]) == 0x3) && (x86_modrm_reg (ip [1]) == 0x7)) {
595 switch (x86_modrm_rm (ip [1])) {
603 g_assert_not_reached ();
615 is_regsize_var (MonoType *t) {
618 switch (mono_type_get_underlying_type (t)->type) {
624 case MONO_TYPE_FNPTR:
626 case MONO_TYPE_OBJECT:
627 case MONO_TYPE_STRING:
628 case MONO_TYPE_CLASS:
629 case MONO_TYPE_SZARRAY:
630 case MONO_TYPE_ARRAY:
632 case MONO_TYPE_VALUETYPE:
639 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
644 for (i = 0; i < cfg->num_varinfo; i++) {
645 MonoInst *ins = cfg->varinfo [i];
646 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
649 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
652 if ((ins->flags & (MONO_INST_IS_DEAD|MONO_INST_VOLATILE|MONO_INST_INDIRECT)) ||
653 (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
656 /* we dont allocate I1 to registers because there is no simply way to sign extend
657 * 8bit quantities in caller saved registers on x86 */
658 if (is_regsize_var (ins->inst_vtype) || (ins->inst_vtype->type == MONO_TYPE_BOOLEAN) ||
659 (ins->inst_vtype->type == MONO_TYPE_U1) || (ins->inst_vtype->type == MONO_TYPE_U2)||
660 (ins->inst_vtype->type == MONO_TYPE_I2) || (ins->inst_vtype->type == MONO_TYPE_CHAR)) {
661 g_assert (MONO_VARINFO (cfg, i)->reg == -1);
662 g_assert (i == vmv->idx);
663 vars = g_list_prepend (vars, vmv);
667 vars = mono_varlist_sort (cfg, vars, 0);
673 mono_arch_get_global_int_regs (MonoCompile *cfg)
677 /* we can use 3 registers for global allocation */
678 regs = g_list_prepend (regs, (gpointer)X86_EBX);
679 regs = g_list_prepend (regs, (gpointer)X86_ESI);
680 regs = g_list_prepend (regs, (gpointer)X86_EDI);
686 * mono_arch_regalloc_cost:
688 * Return the cost, in number of memory references, of the action of
689 * allocating the variable VMV into a register during global register
693 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
695 MonoInst *ins = cfg->varinfo [vmv->idx];
697 if (cfg->method->save_lmf)
698 /* The register is already saved */
699 return (ins->opcode == OP_ARG) ? 1 : 0;
701 /* push+pop+possible load if it is an argument */
702 return (ins->opcode == OP_ARG) ? 3 : 2;
706 * Set var information according to the calling convention. X86 version.
707 * The locals var stuff should most likely be split in another method.
710 mono_arch_allocate_vars (MonoCompile *m)
712 MonoMethodSignature *sig;
713 MonoMethodHeader *header;
715 guint32 locals_stack_size, locals_stack_align;
716 int i, offset, curinst, size, align;
720 header = mono_method_get_header (m->method);
721 sig = mono_method_signature (m->method);
726 cinfo = get_call_info (sig, FALSE);
728 switch (cinfo->ret.storage) {
730 m->ret->opcode = OP_REGOFFSET;
731 m->ret->inst_basereg = X86_EBP;
732 m->ret->inst_offset = offset;
733 offset += sizeof (gpointer);
735 case ArgValuetypeInReg:
738 m->ret->opcode = OP_REGVAR;
739 m->ret->inst_c0 = cinfo->ret.reg;
742 case ArgOnFloatFpStack:
743 case ArgOnDoubleFpStack:
746 g_assert_not_reached ();
750 inst = m->varinfo [curinst];
751 if (inst->opcode != OP_REGVAR) {
752 inst->opcode = OP_REGOFFSET;
753 inst->inst_basereg = X86_EBP;
755 inst->inst_offset = offset;
756 offset += sizeof (gpointer);
760 if (sig->call_convention == MONO_CALL_VARARG) {
761 m->sig_cookie = offset;
762 offset += sizeof (gpointer);
765 for (i = 0; i < sig->param_count; ++i) {
766 inst = m->varinfo [curinst];
767 if (inst->opcode != OP_REGVAR) {
768 inst->opcode = OP_REGOFFSET;
769 inst->inst_basereg = X86_EBP;
771 inst->inst_offset = offset;
772 size = mono_type_size (sig->params [i], &align);
781 /* reserve space to save LMF and caller saved registers */
783 if (m->method->save_lmf) {
784 offset += sizeof (MonoLMF);
786 if (m->used_int_regs & (1 << X86_EBX)) {
790 if (m->used_int_regs & (1 << X86_EDI)) {
794 if (m->used_int_regs & (1 << X86_ESI)) {
799 switch (cinfo->ret.storage) {
800 case ArgValuetypeInReg:
801 /* Allocate a local to hold the result, the epilog will copy it to the correct place */
803 m->ret->opcode = OP_REGOFFSET;
804 m->ret->inst_basereg = X86_EBP;
805 m->ret->inst_offset = - offset;
811 /* Allocate locals */
812 offsets = mono_allocate_stack_slots (m, &locals_stack_size, &locals_stack_align);
813 if (locals_stack_align) {
814 offset += (locals_stack_align - 1);
815 offset &= ~(locals_stack_align - 1);
817 for (i = m->locals_start; i < m->num_varinfo; i++) {
818 if (offsets [i] != -1) {
819 MonoInst *inst = m->varinfo [i];
820 inst->opcode = OP_REGOFFSET;
821 inst->inst_basereg = X86_EBP;
822 inst->inst_offset = - (offset + offsets [i]);
823 //printf ("allocated local %d to ", i); mono_print_tree_nl (inst);
827 offset += locals_stack_size;
829 offset += (MONO_ARCH_FRAME_ALIGNMENT - 1);
830 offset &= ~(MONO_ARCH_FRAME_ALIGNMENT - 1);
835 m->stack_offset = -offset;
839 mono_arch_create_vars (MonoCompile *cfg)
841 MonoMethodSignature *sig;
844 sig = mono_method_signature (cfg->method);
846 cinfo = get_call_info (sig, FALSE);
848 if (cinfo->ret.storage == ArgValuetypeInReg)
849 cfg->ret_var_is_local = TRUE;
854 /* Fixme: we need an alignment solution for enter_method and mono_arch_call_opcode,
855 * currently alignment in mono_arch_call_opcode is computed without arch_get_argument_info
859 * take the arguments and generate the arch-specific
860 * instructions to properly call the function in call.
861 * This includes pushing, moving arguments to the right register
863 * Issue: who does the spilling if needed, and when?
866 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
868 MonoMethodSignature *sig;
869 int i, n, stack_size, type;
874 /* add the vararg cookie before the non-implicit args */
875 if (call->signature->call_convention == MONO_CALL_VARARG) {
877 /* FIXME: Add support for signature tokens to AOT */
878 cfg->disable_aot = TRUE;
879 MONO_INST_NEW (cfg, arg, OP_OUTARG);
880 MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
881 sig_arg->inst_p0 = call->signature;
882 arg->inst_left = sig_arg;
883 arg->type = STACK_PTR;
884 /* prepend, so they get reversed */
885 arg->next = call->out_args;
886 call->out_args = arg;
887 stack_size += sizeof (gpointer);
889 sig = call->signature;
890 n = sig->param_count + sig->hasthis;
892 cinfo = get_call_info (sig, FALSE);
894 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
895 if (cinfo->ret.storage == ArgOnStack)
896 stack_size += sizeof (gpointer);
899 for (i = 0; i < n; ++i) {
900 if (is_virtual && i == 0) {
901 /* the argument will be attached to the call instrucion */
905 MONO_INST_NEW (cfg, arg, OP_OUTARG);
907 arg->cil_code = in->cil_code;
909 arg->type = in->type;
910 /* prepend, so they get reversed */
911 arg->next = call->out_args;
912 call->out_args = arg;
913 if (i >= sig->hasthis) {
914 MonoType *t = sig->params [i - sig->hasthis];
915 ptype = mono_type_get_underlying_type (t);
920 /* FIXME: validate arguments... */
924 case MONO_TYPE_BOOLEAN:
932 case MONO_TYPE_STRING:
933 case MONO_TYPE_CLASS:
934 case MONO_TYPE_OBJECT:
936 case MONO_TYPE_FNPTR:
937 case MONO_TYPE_ARRAY:
938 case MONO_TYPE_SZARRAY:
947 arg->opcode = OP_OUTARG_R4;
951 arg->opcode = OP_OUTARG_R8;
953 case MONO_TYPE_VALUETYPE: {
956 size = mono_type_native_stack_size (&in->klass->byval_arg, NULL);
958 size = mono_type_stack_size (&in->klass->byval_arg, NULL);
961 arg->opcode = OP_OUTARG_VT;
962 arg->klass = in->klass;
963 arg->unused = sig->pinvoke;
964 arg->inst_imm = size;
967 case MONO_TYPE_TYPEDBYREF:
968 stack_size += sizeof (MonoTypedRef);
969 arg->opcode = OP_OUTARG_VT;
970 arg->klass = in->klass;
971 arg->unused = sig->pinvoke;
972 arg->inst_imm = sizeof (MonoTypedRef);
975 g_error ("unknown type 0x%02x in mono_arch_call_opcode\n", type);
978 /* the this argument */
984 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
985 if (cinfo->ret.storage == ArgValuetypeInReg) {
988 * After the call, the struct is in registers, but needs to be saved to the memory pointed
989 * to by vt_arg in this_vret_args. This means that vt_arg needs to be saved somewhere
990 * before calling the function. So we add a dummy instruction to represent pushing the
991 * struct return address to the stack. The return address will be saved to this stack slot
992 * by the code emitted in this_vret_args.
994 MONO_INST_NEW (cfg, arg, OP_OUTARG);
995 MONO_INST_NEW (cfg, zero_inst, OP_ICONST);
996 zero_inst->inst_p0 = 0;
997 arg->inst_left = zero_inst;
998 arg->type = STACK_PTR;
999 /* prepend, so they get reversed */
1000 arg->next = call->out_args;
1001 call->out_args = arg;
1004 /* if the function returns a struct, the called method already does a ret $0x4 */
1005 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret))
1009 call->stack_usage = stack_size;
1013 * should set more info in call, such as the stack space
1014 * used by the args that needs to be added back to esp
1021 * Allow tracing to work with this interface (with an optional argument)
1024 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
1028 /* if some args are passed in registers, we need to save them here */
1029 x86_push_reg (code, X86_EBP);
1031 if (cfg->compile_aot) {
1032 x86_push_imm (code, cfg->method);
1033 x86_mov_reg_imm (code, X86_EAX, func);
1034 x86_call_reg (code, X86_EAX);
1036 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, cfg->method);
1037 x86_push_imm (code, cfg->method);
1038 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
1039 x86_call_code (code, 0);
1041 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1055 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
1058 int arg_size = 0, save_mode = SAVE_NONE;
1059 MonoMethod *method = cfg->method;
1061 switch (mono_type_get_underlying_type (mono_method_signature (method)->ret)->type) {
1062 case MONO_TYPE_VOID:
1063 /* special case string .ctor icall */
1064 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
1065 save_mode = SAVE_EAX;
1067 save_mode = SAVE_NONE;
1071 save_mode = SAVE_EAX_EDX;
1075 save_mode = SAVE_FP;
1077 case MONO_TYPE_VALUETYPE:
1078 save_mode = SAVE_STRUCT;
1081 save_mode = SAVE_EAX;
1085 switch (save_mode) {
1087 x86_push_reg (code, X86_EDX);
1088 x86_push_reg (code, X86_EAX);
1089 if (enable_arguments) {
1090 x86_push_reg (code, X86_EDX);
1091 x86_push_reg (code, X86_EAX);
1096 x86_push_reg (code, X86_EAX);
1097 if (enable_arguments) {
1098 x86_push_reg (code, X86_EAX);
1103 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1104 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1105 if (enable_arguments) {
1106 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
1107 x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
1112 if (enable_arguments) {
1113 x86_push_membase (code, X86_EBP, 8);
1122 if (cfg->compile_aot) {
1123 x86_push_imm (code, method);
1124 x86_mov_reg_imm (code, X86_EAX, func);
1125 x86_call_reg (code, X86_EAX);
1127 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_METHODCONST, method);
1128 x86_push_imm (code, method);
1129 mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
1130 x86_call_code (code, 0);
1132 x86_alu_reg_imm (code, X86_ADD, X86_ESP, arg_size + 4);
1134 switch (save_mode) {
1136 x86_pop_reg (code, X86_EAX);
1137 x86_pop_reg (code, X86_EDX);
1140 x86_pop_reg (code, X86_EAX);
1143 x86_fld_membase (code, X86_ESP, 0, TRUE);
1144 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
1154 #define EMIT_COND_BRANCH(ins,cond,sign) \
1155 if (ins->flags & MONO_INST_BRLABEL) { \
1156 if (ins->inst_i0->inst_c0) { \
1157 x86_branch (code, cond, cfg->native_code + ins->inst_i0->inst_c0, sign); \
1159 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
1160 if ((cfg->opt & MONO_OPT_BRANCH) && \
1161 x86_is_imm8 (ins->inst_i0->inst_c1 - cpos)) \
1162 x86_branch8 (code, cond, 0, sign); \
1164 x86_branch32 (code, cond, 0, sign); \
1167 if (ins->inst_true_bb->native_offset) { \
1168 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
1170 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1171 if ((cfg->opt & MONO_OPT_BRANCH) && \
1172 x86_is_imm8 (ins->inst_true_bb->max_offset - cpos)) \
1173 x86_branch8 (code, cond, 0, sign); \
1175 x86_branch32 (code, cond, 0, sign); \
1179 /* emit an exception if condition is fail */
1180 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
1182 mono_add_patch_info (cfg, code - cfg->native_code, \
1183 MONO_PATCH_INFO_EXC, exc_name); \
1184 x86_branch32 (code, cond, 0, signed); \
1187 #define EMIT_FPCOMPARE(code) do { \
1188 x86_fcompp (code); \
1189 x86_fnstsw (code); \
1194 emit_call (MonoCompile *cfg, guint8 *code, guint32 patch_type, gconstpointer data)
1196 if (cfg->compile_aot) {
1197 guint32 got_reg = X86_EAX;
1199 if (cfg->compile_aot) {
1201 * Since the patches are generated by the back end, there is
1202 * no way to generate a got_var at this point.
1204 g_assert (cfg->got_var);
1206 if (cfg->got_var->opcode == OP_REGOFFSET)
1207 x86_mov_reg_membase (code, X86_EAX, cfg->got_var->inst_basereg, cfg->got_var->inst_offset, 4);
1209 got_reg = cfg->got_var->dreg;
1212 mono_add_patch_info (cfg, code - cfg->native_code, patch_type, data);
1213 x86_call_membase (code, got_reg, 0xf0f0f0f0);
1216 mono_add_patch_info (cfg, code - cfg->native_code, patch_type, data);
1217 x86_call_code (code, 0);
1223 /* FIXME: Add more instructions */
1224 #define INST_IGNORES_CFLAGS(ins) (((ins)->opcode == CEE_BR) || ((ins)->opcode == OP_STORE_MEMBASE_IMM) || ((ins)->opcode == OP_STOREI4_MEMBASE_REG))
1227 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1229 MonoInst *ins, *last_ins = NULL;
1234 switch (ins->opcode) {
1236 /* reg = 0 -> XOR (reg, reg) */
1237 /* XOR sets cflags on x86, so we cant do it always */
1238 if (ins->inst_c0 == 0 && ins->next && INST_IGNORES_CFLAGS (ins->next)) {
1239 ins->opcode = CEE_XOR;
1240 ins->sreg1 = ins->dreg;
1241 ins->sreg2 = ins->dreg;
1245 /* remove unnecessary multiplication with 1 */
1246 if (ins->inst_imm == 1) {
1247 if (ins->dreg != ins->sreg1) {
1248 ins->opcode = OP_MOVE;
1250 last_ins->next = ins->next;
1256 case OP_COMPARE_IMM:
1257 /* OP_COMPARE_IMM (reg, 0)
1259 * OP_X86_TEST_NULL (reg)
1262 ins->opcode = OP_X86_TEST_NULL;
1264 case OP_X86_COMPARE_MEMBASE_IMM:
1266 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1267 * OP_X86_COMPARE_MEMBASE_IMM offset(basereg), imm
1269 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1270 * OP_COMPARE_IMM reg, imm
1272 * Note: if imm = 0 then OP_COMPARE_IMM replaced with OP_X86_TEST_NULL
1274 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG) &&
1275 ins->inst_basereg == last_ins->inst_destbasereg &&
1276 ins->inst_offset == last_ins->inst_offset) {
1277 ins->opcode = OP_COMPARE_IMM;
1278 ins->sreg1 = last_ins->sreg1;
1280 /* check if we can remove cmp reg,0 with test null */
1282 ins->opcode = OP_X86_TEST_NULL;
1286 case OP_LOAD_MEMBASE:
1287 case OP_LOADI4_MEMBASE:
1289 * Note: if reg1 = reg2 the load op is removed
1291 * OP_STORE_MEMBASE_REG reg1, offset(basereg)
1292 * OP_LOAD_MEMBASE offset(basereg), reg2
1294 * OP_STORE_MEMBASE_REG reg1, offset(basereg)
1295 * OP_MOVE reg1, reg2
1297 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
1298 || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1299 ins->inst_basereg == last_ins->inst_destbasereg &&
1300 ins->inst_offset == last_ins->inst_offset) {
1301 if (ins->dreg == last_ins->sreg1) {
1302 last_ins->next = ins->next;
1306 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1307 ins->opcode = OP_MOVE;
1308 ins->sreg1 = last_ins->sreg1;
1312 * Note: reg1 must be different from the basereg in the second load
1313 * Note: if reg1 = reg2 is equal then second load is removed
1315 * OP_LOAD_MEMBASE offset(basereg), reg1
1316 * OP_LOAD_MEMBASE offset(basereg), reg2
1318 * OP_LOAD_MEMBASE offset(basereg), reg1
1319 * OP_MOVE reg1, reg2
1321 } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1322 || last_ins->opcode == OP_LOAD_MEMBASE) &&
1323 ins->inst_basereg != last_ins->dreg &&
1324 ins->inst_basereg == last_ins->inst_basereg &&
1325 ins->inst_offset == last_ins->inst_offset) {
1327 if (ins->dreg == last_ins->dreg) {
1328 last_ins->next = ins->next;
1332 ins->opcode = OP_MOVE;
1333 ins->sreg1 = last_ins->dreg;
1336 //g_assert_not_reached ();
1340 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1341 * OP_LOAD_MEMBASE offset(basereg), reg
1343 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1344 * OP_ICONST reg, imm
1346 } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1347 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1348 ins->inst_basereg == last_ins->inst_destbasereg &&
1349 ins->inst_offset == last_ins->inst_offset) {
1350 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1351 ins->opcode = OP_ICONST;
1352 ins->inst_c0 = last_ins->inst_imm;
1353 g_assert_not_reached (); // check this rule
1357 case OP_LOADU1_MEMBASE:
1358 case OP_LOADI1_MEMBASE:
1360 * Note: if reg1 = reg2 the load op is removed
1362 * OP_STORE_MEMBASE_REG reg1, offset(basereg)
1363 * OP_LOAD_MEMBASE offset(basereg), reg2
1365 * OP_STORE_MEMBASE_REG reg1, offset(basereg)
1366 * OP_MOVE reg1, reg2
1368 if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1369 ins->inst_basereg == last_ins->inst_destbasereg &&
1370 ins->inst_offset == last_ins->inst_offset) {
1371 if (ins->dreg == last_ins->sreg1) {
1372 last_ins->next = ins->next;
1376 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1377 ins->opcode = OP_MOVE;
1378 ins->sreg1 = last_ins->sreg1;
1382 case OP_LOADU2_MEMBASE:
1383 case OP_LOADI2_MEMBASE:
1385 * Note: if reg1 = reg2 the load op is removed
1387 * OP_STORE_MEMBASE_REG reg1, offset(basereg)
1388 * OP_LOAD_MEMBASE offset(basereg), reg2
1390 * OP_STORE_MEMBASE_REG reg1, offset(basereg)
1391 * OP_MOVE reg1, reg2
1393 if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1394 ins->inst_basereg == last_ins->inst_destbasereg &&
1395 ins->inst_offset == last_ins->inst_offset) {
1396 if (ins->dreg == last_ins->sreg1) {
1397 last_ins->next = ins->next;
1401 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1402 ins->opcode = OP_MOVE;
1403 ins->sreg1 = last_ins->sreg1;
1415 if (ins->dreg == ins->sreg1) {
1417 last_ins->next = ins->next;
1424 * OP_MOVE sreg, dreg
1425 * OP_MOVE dreg, sreg
1427 if (last_ins && last_ins->opcode == OP_MOVE &&
1428 ins->sreg1 == last_ins->dreg &&
1429 ins->dreg == last_ins->sreg1) {
1430 last_ins->next = ins->next;
1436 case OP_X86_PUSH_MEMBASE:
1437 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG ||
1438 last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1439 ins->inst_basereg == last_ins->inst_destbasereg &&
1440 ins->inst_offset == last_ins->inst_offset) {
1441 ins->opcode = OP_X86_PUSH;
1442 ins->sreg1 = last_ins->sreg1;
1449 bb->last_ins = last_ins;
1453 branch_cc_table [] = {
1454 X86_CC_EQ, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1455 X86_CC_NE, X86_CC_GE, X86_CC_GT, X86_CC_LE, X86_CC_LT,
1456 X86_CC_O, X86_CC_NO, X86_CC_C, X86_CC_NC
1459 #define DEBUG(a) if (cfg->verbose_level > 1) a
1463 * returns the offset used by spillvar. It allocates a new
1464 * spill variable if necessary.
1467 mono_spillvar_offset (MonoCompile *cfg, int spillvar)
1469 MonoSpillInfo **si, *info;
1472 si = &cfg->spill_info;
1474 while (i <= spillvar) {
1477 *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1479 cfg->stack_offset -= sizeof (gpointer);
1480 info->offset = cfg->stack_offset;
1484 return (*si)->offset;
1490 g_assert_not_reached ();
1495 * returns the offset used by spillvar. It allocates a new
1496 * spill float variable if necessary.
1497 * (same as mono_spillvar_offset but for float)
1500 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
1502 MonoSpillInfo **si, *info;
1505 si = &cfg->spill_info_float;
1507 while (i <= spillvar) {
1510 *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1512 cfg->stack_offset -= sizeof (double);
1513 info->offset = cfg->stack_offset;
1517 return (*si)->offset;
1523 g_assert_not_reached ();
1528 * Creates a store for spilled floating point items
1531 create_spilled_store_float (MonoCompile *cfg, int spill, int reg, MonoInst *ins)
1534 MONO_INST_NEW (cfg, store, OP_STORER8_MEMBASE_REG);
1536 store->inst_destbasereg = X86_EBP;
1537 store->inst_offset = mono_spillvar_offset_float (cfg, spill);
1539 DEBUG (g_print ("SPILLED FLOAT STORE (%d at 0x%08x(%%sp)) (from %d)\n", spill, store->inst_offset, reg));
1544 * Creates a load for spilled floating point items
1547 create_spilled_load_float (MonoCompile *cfg, int spill, int reg, MonoInst *ins)
1550 MONO_INST_NEW (cfg, load, OP_LOADR8_SPILL_MEMBASE);
1552 load->inst_basereg = X86_EBP;
1553 load->inst_offset = mono_spillvar_offset_float (cfg, spill);
1555 DEBUG (g_print ("SPILLED FLOAT LOAD (%d at 0x%08x(%%sp)) (from %d)\n", spill, load->inst_offset, reg));
1559 #define is_global_ireg(r) ((r) >= 0 && (r) < MONO_MAX_IREGS && !X86_IS_CALLEE ((r)))
1560 #define reg_is_freeable(r) ((r) >= 0 && (r) < MONO_MAX_IREGS && X86_IS_CALLEE ((r)))
1567 int flags; /* used to track fp spill/load */
1570 static const char*const * ins_spec = pentium_desc;
1573 print_ins (int i, MonoInst *ins)
1575 const char *spec = ins_spec [ins->opcode];
1576 g_print ("\t%-2d %s", i, mono_inst_name (ins->opcode));
1577 if (spec [MONO_INST_DEST]) {
1578 if (ins->dreg >= MONO_MAX_IREGS)
1579 g_print (" R%d <-", ins->dreg);
1581 g_print (" %s <-", mono_arch_regname (ins->dreg));
1583 if (spec [MONO_INST_SRC1]) {
1584 if (ins->sreg1 >= MONO_MAX_IREGS)
1585 g_print (" R%d", ins->sreg1);
1587 g_print (" %s", mono_arch_regname (ins->sreg1));
1589 if (spec [MONO_INST_SRC2]) {
1590 if (ins->sreg2 >= MONO_MAX_IREGS)
1591 g_print (" R%d", ins->sreg2);
1593 g_print (" %s", mono_arch_regname (ins->sreg2));
1595 if (spec [MONO_INST_CLOB])
1596 g_print (" clobbers: %c", spec [MONO_INST_CLOB]);
1601 print_regtrack (RegTrack *t, int num)
1607 for (i = 0; i < num; ++i) {
1610 if (i >= MONO_MAX_IREGS) {
1611 g_snprintf (buf, sizeof(buf), "R%d", i);
1614 r = mono_arch_regname (i);
1615 g_print ("liveness: %s [%d - %d]\n", r, t [i].born_in, t[i].last_use);
1619 typedef struct InstList InstList;
1627 static inline InstList*
1628 inst_list_prepend (MonoMemPool *pool, InstList *list, MonoInst *data)
1630 InstList *item = mono_mempool_alloc (pool, sizeof (InstList));
1640 * Force the spilling of the variable in the symbolic register 'reg'.
1643 get_register_force_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, int reg)
1648 sel = cfg->rs->iassign [reg];
1649 /*i = cfg->rs->isymbolic [sel];
1650 g_assert (i == reg);*/
1652 spill = ++cfg->spill_count;
1653 cfg->rs->iassign [i] = -spill - 1;
1654 mono_regstate_free_int (cfg->rs, sel);
1655 /* we need to create a spill var and insert a load to sel after the current instruction */
1656 MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1658 load->inst_basereg = X86_EBP;
1659 load->inst_offset = mono_spillvar_offset (cfg, spill);
1661 while (ins->next != item->prev->data)
1664 load->next = ins->next;
1666 DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%ebp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1667 i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1668 g_assert (i == sel);
1674 get_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, guint32 regmask, int reg)
1679 DEBUG (g_print ("\tstart regmask to assign R%d: 0x%08x (R%d <- R%d R%d)\n", reg, regmask, ins->dreg, ins->sreg1, ins->sreg2));
1680 /* exclude the registers in the current instruction */
1681 if (reg != ins->sreg1 && (reg_is_freeable (ins->sreg1) || (ins->sreg1 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg1] >= 0))) {
1682 if (ins->sreg1 >= MONO_MAX_IREGS)
1683 regmask &= ~ (1 << cfg->rs->iassign [ins->sreg1]);
1685 regmask &= ~ (1 << ins->sreg1);
1686 DEBUG (g_print ("\t\texcluding sreg1 %s\n", mono_arch_regname (ins->sreg1)));
1688 if (reg != ins->sreg2 && (reg_is_freeable (ins->sreg2) || (ins->sreg2 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg2] >= 0))) {
1689 if (ins->sreg2 >= MONO_MAX_IREGS)
1690 regmask &= ~ (1 << cfg->rs->iassign [ins->sreg2]);
1692 regmask &= ~ (1 << ins->sreg2);
1693 DEBUG (g_print ("\t\texcluding sreg2 %s %d\n", mono_arch_regname (ins->sreg2), ins->sreg2));
1695 if (reg != ins->dreg && reg_is_freeable (ins->dreg)) {
1696 regmask &= ~ (1 << ins->dreg);
1697 DEBUG (g_print ("\t\texcluding dreg %s\n", mono_arch_regname (ins->dreg)));
1700 DEBUG (g_print ("\t\tavailable regmask: 0x%08x\n", regmask));
1701 g_assert (regmask); /* need at least a register we can free */
1703 /* we should track prev_use and spill the register that's farther */
1704 for (i = 0; i < MONO_MAX_IREGS; ++i) {
1705 if (regmask & (1 << i)) {
1707 DEBUG (g_print ("\t\tselected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->iassign [sel]));
1711 i = cfg->rs->isymbolic [sel];
1712 spill = ++cfg->spill_count;
1713 cfg->rs->iassign [i] = -spill - 1;
1714 mono_regstate_free_int (cfg->rs, sel);
1715 /* we need to create a spill var and insert a load to sel after the current instruction */
1716 MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1718 load->inst_basereg = X86_EBP;
1719 load->inst_offset = mono_spillvar_offset (cfg, spill);
1721 while (ins->next != item->prev->data)
1724 load->next = ins->next;
1726 DEBUG (g_print ("\tSPILLED LOAD (%d at 0x%08x(%%ebp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1727 i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1728 g_assert (i == sel);
1734 create_copy_ins (MonoCompile *cfg, int dest, int src, MonoInst *ins)
1737 MONO_INST_NEW (cfg, copy, OP_MOVE);
1741 copy->next = ins->next;
1744 DEBUG (g_print ("\tforced copy from %s to %s\n", mono_arch_regname (src), mono_arch_regname (dest)));
1749 create_spilled_store (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins)
1752 MONO_INST_NEW (cfg, store, OP_STORE_MEMBASE_REG);
1754 store->inst_destbasereg = X86_EBP;
1755 store->inst_offset = mono_spillvar_offset (cfg, spill);
1757 store->next = ins->next;
1760 DEBUG (g_print ("\tSPILLED STORE (%d at 0x%08x(%%ebp)) R%d (from %s)\n", spill, store->inst_offset, prev_reg, mono_arch_regname (reg)));
1765 insert_before_ins (MonoInst *ins, InstList *item, MonoInst* to_insert)
1769 prev = item->next->data;
1771 while (prev->next != ins)
1773 to_insert->next = ins;
1774 prev->next = to_insert;
1776 to_insert->next = ins;
1779 * needed otherwise in the next instruction we can add an ins to the
1780 * end and that would get past this instruction.
1782 item->data = to_insert;
1788 alloc_int_reg (MonoCompile *cfg, InstList *curinst, MonoInst *ins, int sym_reg, guint32 allow_mask)
1790 int val = cfg->rs->iassign [sym_reg];
1794 /* the register gets spilled after this inst */
1797 val = mono_regstate_alloc_int (cfg->rs, allow_mask);
1799 val = get_register_spilling (cfg, curinst, ins, allow_mask, sym_reg);
1800 cfg->rs->iassign [sym_reg] = val;
1801 /* add option to store before the instruction for src registers */
1803 create_spilled_store (cfg, spill, val, sym_reg, ins);
1805 cfg->rs->isymbolic [val] = sym_reg;
1810 /* flags used in reginfo->flags */
1812 MONO_X86_FP_NEEDS_LOAD_SPILL = 1 << 0,
1813 MONO_X86_FP_NEEDS_SPILL = 1 << 1,
1814 MONO_X86_FP_NEEDS_LOAD = 1 << 2,
1815 MONO_X86_REG_NOT_ECX = 1 << 3,
1816 MONO_X86_REG_EAX = 1 << 4,
1817 MONO_X86_REG_EDX = 1 << 5,
1818 MONO_X86_REG_ECX = 1 << 6
1822 mono_x86_alloc_int_reg (MonoCompile *cfg, InstList *tmp, MonoInst *ins, guint32 dest_mask, int sym_reg, int flags)
1825 int test_mask = dest_mask;
1827 if (flags & MONO_X86_REG_EAX)
1828 test_mask &= (1 << X86_EAX);
1829 else if (flags & MONO_X86_REG_EDX)
1830 test_mask &= (1 << X86_EDX);
1831 else if (flags & MONO_X86_REG_ECX)
1832 test_mask &= (1 << X86_ECX);
1833 else if (flags & MONO_X86_REG_NOT_ECX)
1834 test_mask &= ~ (1 << X86_ECX);
1836 val = mono_regstate_alloc_int (cfg->rs, test_mask);
1837 if (val >= 0 && test_mask != dest_mask)
1838 DEBUG(g_print ("\tUsed flag to allocate reg %s for R%u\n", mono_arch_regname (val), sym_reg));
1840 if (val < 0 && (flags & MONO_X86_REG_NOT_ECX)) {
1841 DEBUG(g_print ("\tFailed to allocate flag suggested mask (%u) but exluding ECX\n", test_mask));
1842 val = mono_regstate_alloc_int (cfg->rs, (dest_mask & (~1 << X86_ECX)));
1846 val = mono_regstate_alloc_int (cfg->rs, dest_mask);
1848 val = get_register_spilling (cfg, tmp, ins, dest_mask, sym_reg);
1855 assign_ireg (MonoRegState *rs, int reg, int hreg)
1857 g_assert (reg >= MONO_MAX_IREGS);
1858 g_assert (hreg < MONO_MAX_IREGS);
1859 g_assert (! is_global_ireg (hreg));
1861 rs->iassign [reg] = hreg;
1862 rs->isymbolic [hreg] = reg;
1863 rs->ifree_mask &= ~ (1 << hreg);
1866 /*#include "cprop.c"*/
1869 * Local register allocation.
1870 * We first scan the list of instructions and we save the liveness info of
1871 * each register (when the register is first used, when it's value is set etc.).
1872 * We also reverse the list of instructions (in the InstList list) because assigning
1873 * registers backwards allows for more tricks to be used.
1876 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1879 MonoRegState *rs = cfg->rs;
1880 int i, val, fpcount;
1881 RegTrack *reginfo, *reginfof;
1882 RegTrack *reginfo1, *reginfo2, *reginfod;
1883 InstList *tmp, *reversed = NULL;
1885 guint32 src1_mask, src2_mask, dest_mask;
1886 GList *fspill_list = NULL;
1891 rs->next_vireg = bb->max_ireg;
1892 rs->next_vfreg = bb->max_freg;
1893 mono_regstate_assign (rs);
1894 reginfo = g_malloc0 (sizeof (RegTrack) * rs->next_vireg);
1895 reginfof = g_malloc0 (sizeof (RegTrack) * rs->next_vfreg);
1896 rs->ifree_mask = X86_CALLEE_REGS;
1900 /*if (cfg->opt & MONO_OPT_COPYPROP)
1901 local_copy_prop (cfg, ins);*/
1905 DEBUG (g_print ("LOCAL regalloc: basic block: %d\n", bb->block_num));
1906 /* forward pass on the instructions to collect register liveness info */
1908 spec = ins_spec [ins->opcode];
1910 DEBUG (print_ins (i, ins));
1912 if (spec [MONO_INST_SRC1]) {
1913 if (spec [MONO_INST_SRC1] == 'f') {
1915 reginfo1 = reginfof;
1917 spill = g_list_first (fspill_list);
1918 if (spill && fpcount < MONO_MAX_FREGS) {
1919 reginfo1 [ins->sreg1].flags |= MONO_X86_FP_NEEDS_LOAD;
1920 fspill_list = g_list_remove (fspill_list, spill->data);
1926 reginfo1 [ins->sreg1].prev_use = reginfo1 [ins->sreg1].last_use;
1927 reginfo1 [ins->sreg1].last_use = i;
1928 if (spec [MONO_INST_SRC1] == 'L') {
1929 /* The virtual register is allocated sequentially */
1930 reginfo1 [ins->sreg1 + 1].prev_use = reginfo1 [ins->sreg1 + 1].last_use;
1931 reginfo1 [ins->sreg1 + 1].last_use = i;
1932 if (reginfo1 [ins->sreg1 + 1].born_in == 0 || reginfo1 [ins->sreg1 + 1].born_in > i)
1933 reginfo1 [ins->sreg1 + 1].born_in = i;
1935 reginfo1 [ins->sreg1].flags |= MONO_X86_REG_EAX;
1936 reginfo1 [ins->sreg1 + 1].flags |= MONO_X86_REG_EDX;
1941 if (spec [MONO_INST_SRC2]) {
1942 if (spec [MONO_INST_SRC2] == 'f') {
1944 reginfo2 = reginfof;
1945 spill = g_list_first (fspill_list);
1947 reginfo2 [ins->sreg2].flags |= MONO_X86_FP_NEEDS_LOAD;
1948 fspill_list = g_list_remove (fspill_list, spill->data);
1949 if (fpcount >= MONO_MAX_FREGS) {
1951 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
1952 reginfo2 [ins->sreg2].flags |= MONO_X86_FP_NEEDS_LOAD_SPILL;
1959 reginfo2 [ins->sreg2].prev_use = reginfo2 [ins->sreg2].last_use;
1960 reginfo2 [ins->sreg2].last_use = i;
1961 if (spec [MONO_INST_SRC2] == 'L') {
1962 /* The virtual register is allocated sequentially */
1963 reginfo2 [ins->sreg2 + 1].prev_use = reginfo2 [ins->sreg2 + 1].last_use;
1964 reginfo2 [ins->sreg2 + 1].last_use = i;
1965 if (reginfo2 [ins->sreg2 + 1].born_in == 0 || reginfo2 [ins->sreg2 + 1].born_in > i)
1966 reginfo2 [ins->sreg2 + 1].born_in = i;
1968 if (spec [MONO_INST_CLOB] == 's') {
1969 reginfo2 [ins->sreg1].flags |= MONO_X86_REG_NOT_ECX;
1970 reginfo2 [ins->sreg2].flags |= MONO_X86_REG_ECX;
1975 if (spec [MONO_INST_DEST]) {
1976 if (spec [MONO_INST_DEST] == 'f') {
1977 reginfod = reginfof;
1978 if (fpcount >= MONO_MAX_FREGS) {
1979 reginfod [ins->dreg].flags |= MONO_X86_FP_NEEDS_SPILL;
1981 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
1988 if (spec [MONO_INST_DEST] != 'b') /* it's not just a base register */
1989 reginfod [ins->dreg].killed_in = i;
1990 reginfod [ins->dreg].prev_use = reginfod [ins->dreg].last_use;
1991 reginfod [ins->dreg].last_use = i;
1992 if (reginfod [ins->dreg].born_in == 0 || reginfod [ins->dreg].born_in > i)
1993 reginfod [ins->dreg].born_in = i;
1994 if (spec [MONO_INST_DEST] == 'l' || spec [MONO_INST_DEST] == 'L') {
1995 /* The virtual register is allocated sequentially */
1996 reginfod [ins->dreg + 1].prev_use = reginfod [ins->dreg + 1].last_use;
1997 reginfod [ins->dreg + 1].last_use = i;
1998 if (reginfod [ins->dreg + 1].born_in == 0 || reginfod [ins->dreg + 1].born_in > i)
1999 reginfod [ins->dreg + 1].born_in = i;
2001 reginfod [ins->dreg].flags |= MONO_X86_REG_EAX;
2002 reginfod [ins->dreg + 1].flags |= MONO_X86_REG_EDX;
2008 reversed = inst_list_prepend (cfg->mempool, reversed, ins);
2013 // todo: check if we have anything left on fp stack, in verify mode?
2016 DEBUG (print_regtrack (reginfo, rs->next_vireg));
2017 DEBUG (print_regtrack (reginfof, rs->next_vfreg));
2020 int prev_dreg, prev_sreg1, prev_sreg2, clob_dreg;
2021 dest_mask = src1_mask = src2_mask = X86_CALLEE_REGS;
2024 spec = ins_spec [ins->opcode];
2027 DEBUG (g_print ("processing:"));
2028 DEBUG (print_ins (i, ins));
2029 if (spec [MONO_INST_CLOB] == 's') {
2031 * Shift opcodes, SREG2 must be RCX
2033 if (rs->ifree_mask & (1 << X86_ECX)) {
2034 if (ins->sreg2 < MONO_MAX_IREGS) {
2035 /* Argument already in hard reg, need to copy */
2036 MonoInst *copy = create_copy_ins (cfg, X86_ECX, ins->sreg2, NULL);
2037 insert_before_ins (ins, tmp, copy);
2040 DEBUG (g_print ("\tshortcut assignment of R%d to ECX\n", ins->sreg2));
2041 assign_ireg (rs, ins->sreg2, X86_ECX);
2044 int need_ecx_spill = TRUE;
2046 * we first check if src1/dreg is already assigned a register
2047 * and then we force a spill of the var assigned to ECX.
2049 /* the destination register can't be ECX */
2050 dest_mask &= ~ (1 << X86_ECX);
2051 src1_mask &= ~ (1 << X86_ECX);
2052 val = rs->iassign [ins->dreg];
2054 * the destination register is already assigned to ECX:
2055 * we need to allocate another register for it and then
2056 * copy from this to ECX.
2058 if (val == X86_ECX && ins->dreg != ins->sreg2) {
2060 new_dest = mono_x86_alloc_int_reg (cfg, tmp, ins, dest_mask, ins->dreg, reginfo [ins->dreg].flags);
2061 g_assert (new_dest >= 0);
2062 DEBUG (g_print ("\tclob:s changing dreg R%d to %s from ECX\n", ins->dreg, mono_arch_regname (new_dest)));
2064 rs->isymbolic [new_dest] = ins->dreg;
2065 rs->iassign [ins->dreg] = new_dest;
2066 clob_dreg = ins->dreg;
2067 ins->dreg = new_dest;
2068 create_copy_ins (cfg, X86_ECX, new_dest, ins);
2069 need_ecx_spill = FALSE;
2070 /*DEBUG (g_print ("\tforced spill of R%d\n", ins->dreg));
2071 val = get_register_force_spilling (cfg, tmp, ins, ins->dreg);
2072 rs->iassign [ins->dreg] = val;
2073 rs->isymbolic [val] = prev_dreg;
2076 if (is_global_ireg (ins->sreg2)) {
2077 MonoInst *copy = create_copy_ins (cfg, X86_ECX, ins->sreg2, NULL);
2078 insert_before_ins (ins, tmp, copy);
2081 val = rs->iassign [ins->sreg2];
2082 if (val >= 0 && val != X86_ECX) {
2083 MonoInst *move = create_copy_ins (cfg, X86_ECX, val, NULL);
2084 DEBUG (g_print ("\tmoved arg from R%d (%d) to ECX\n", val, ins->sreg2));
2086 g_assert_not_reached ();
2087 /* FIXME: where is move connected to the instruction list? */
2088 //tmp->prev->data->next = move;
2092 need_ecx_spill = FALSE;
2095 if (need_ecx_spill && !(rs->ifree_mask & (1 << X86_ECX))) {
2096 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_ECX]));
2097 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_ECX]);
2098 mono_regstate_free_int (rs, X86_ECX);
2100 if (!is_global_ireg (ins->sreg2))
2101 /* force-set sreg2 */
2102 assign_ireg (rs, ins->sreg2, X86_ECX);
2104 ins->sreg2 = X86_ECX;
2105 } else if (spec [MONO_INST_CLOB] == 'd') {
2109 int dest_reg = X86_EAX;
2110 int clob_reg = X86_EDX;
2111 if (spec [MONO_INST_DEST] == 'd') {
2112 dest_reg = X86_EDX; /* reminder */
2115 if (is_global_ireg (ins->dreg))
2118 val = rs->iassign [ins->dreg];
2119 if (0 && val >= 0 && val != dest_reg && !(rs->ifree_mask & (1 << dest_reg))) {
2120 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [dest_reg]));
2121 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [dest_reg]);
2122 mono_regstate_free_int (rs, dest_reg);
2126 /* the register gets spilled after this inst */
2127 int spill = -val -1;
2128 dest_mask = 1 << dest_reg;
2129 prev_dreg = ins->dreg;
2130 val = mono_regstate_alloc_int (rs, dest_mask);
2132 val = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
2133 rs->iassign [ins->dreg] = val;
2135 create_spilled_store (cfg, spill, val, prev_dreg, ins);
2136 DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
2137 rs->isymbolic [val] = prev_dreg;
2140 DEBUG (g_print ("\tshortcut assignment of R%d to %s\n", ins->dreg, mono_arch_regname (dest_reg)));
2141 prev_dreg = ins->dreg;
2142 assign_ireg (rs, ins->dreg, dest_reg);
2143 ins->dreg = dest_reg;
2148 //DEBUG (g_print ("dest reg in div assigned: %s\n", mono_arch_regname (val)));
2149 if (val != dest_reg) { /* force a copy */
2150 create_copy_ins (cfg, val, dest_reg, ins);
2151 if (!(rs->ifree_mask & (1 << dest_reg)) && rs->isymbolic [dest_reg] >= MONO_MAX_IREGS) {
2152 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [dest_reg]));
2153 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [dest_reg]);
2154 mono_regstate_free_int (rs, dest_reg);
2157 if (!(rs->ifree_mask & (1 << clob_reg)) && (clob_reg != val) && (rs->isymbolic [clob_reg] >= 8)) {
2158 DEBUG (g_print ("\tforced spill of clobbered reg R%d\n", rs->isymbolic [clob_reg]));
2159 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [clob_reg]);
2160 mono_regstate_free_int (rs, clob_reg);
2162 src1_mask = 1 << X86_EAX;
2163 src2_mask = 1 << X86_ECX;
2164 } else if (spec [MONO_INST_DEST] == 'l') {
2166 val = rs->iassign [ins->dreg];
2167 /* check special case when dreg have been moved from ecx (clob shift) */
2168 if (spec [MONO_INST_CLOB] == 's' && clob_dreg != -1)
2169 hreg = clob_dreg + 1;
2171 hreg = ins->dreg + 1;
2173 /* base prev_dreg on fixed hreg, handle clob case */
2176 if (val != rs->isymbolic [X86_EAX] && !(rs->ifree_mask & (1 << X86_EAX))) {
2177 DEBUG (g_print ("\t(long-low) forced spill of R%d\n", rs->isymbolic [X86_EAX]));
2178 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_EAX]);
2179 mono_regstate_free_int (rs, X86_EAX);
2181 if (hreg != rs->isymbolic [X86_EDX] && !(rs->ifree_mask & (1 << X86_EDX))) {
2182 DEBUG (g_print ("\t(long-high) forced spill of R%d\n", rs->isymbolic [X86_EDX]));
2183 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_EDX]);
2184 mono_regstate_free_int (rs, X86_EDX);
2186 } else if (spec [MONO_INST_CLOB] == 'b') {
2188 * x86_set_reg instructions, dreg needs to be EAX..EDX
2190 dest_mask = (1 << X86_EAX) | (1 << X86_EBX) | (1 << X86_ECX) | (1 << X86_EDX);
2191 if ((ins->dreg < MONO_MAX_IREGS) && (! (dest_mask & (1 << ins->dreg)))) {
2193 * ins->dreg is already a hard reg, need to allocate another
2194 * suitable hard reg and make a copy.
2196 int new_dest = mono_x86_alloc_int_reg (cfg, tmp, ins, dest_mask, ins->dreg, reginfo [ins->dreg].flags);
2197 g_assert (new_dest >= 0);
2199 create_copy_ins (cfg, ins->dreg, new_dest, ins);
2200 DEBUG (g_print ("\tclob:b changing dreg R%d to %s\n", ins->dreg, mono_arch_regname (new_dest)));
2201 ins->dreg = new_dest;
2203 /* The hard reg is no longer needed */
2204 mono_regstate_free_int (rs, new_dest);
2211 if (spec [MONO_INST_DEST] == 'f') {
2212 if (reginfof [ins->dreg].flags & MONO_X86_FP_NEEDS_SPILL) {
2215 spill_node = g_list_first (fspill_list);
2216 g_assert (spill_node);
2218 store = create_spilled_store_float (cfg, GPOINTER_TO_INT (spill_node->data), ins->dreg, ins);
2219 insert_before_ins (ins, tmp, store);
2220 fspill_list = g_list_remove (fspill_list, spill_node->data);
2223 } else if (spec [MONO_INST_DEST] == 'L') {
2225 val = rs->iassign [ins->dreg];
2226 /* check special case when dreg have been moved from ecx (clob shift) */
2227 if (spec [MONO_INST_CLOB] == 's' && clob_dreg != -1)
2228 hreg = clob_dreg + 1;
2230 hreg = ins->dreg + 1;
2232 /* base prev_dreg on fixed hreg, handle clob case */
2233 prev_dreg = hreg - 1;
2238 /* the register gets spilled after this inst */
2241 val = mono_x86_alloc_int_reg (cfg, tmp, ins, dest_mask, ins->dreg, reginfo [ins->dreg].flags);
2242 rs->iassign [ins->dreg] = val;
2244 create_spilled_store (cfg, spill, val, prev_dreg, ins);
2247 DEBUG (g_print ("\tassigned dreg (long) %s to dest R%d\n", mono_arch_regname (val), hreg - 1));
2249 rs->isymbolic [val] = hreg - 1;
2252 val = rs->iassign [hreg];
2256 /* the register gets spilled after this inst */
2259 val = mono_x86_alloc_int_reg (cfg, tmp, ins, dest_mask, hreg, reginfo [hreg].flags);
2260 rs->iassign [hreg] = val;
2262 create_spilled_store (cfg, spill, val, hreg, ins);
2265 DEBUG (g_print ("\tassigned hreg (long-high) %s to dest R%d\n", mono_arch_regname (val), hreg));
2266 rs->isymbolic [val] = hreg;
2267 /* save reg allocating into unused */
2270 /* check if we can free our long reg */
2271 if (reg_is_freeable (val) && hreg >= 0 && reginfo [hreg].born_in >= i) {
2272 DEBUG (g_print ("\tfreeable %s (R%d) (born in %d)\n", mono_arch_regname (val), hreg, reginfo [hreg].born_in));
2273 mono_regstate_free_int (rs, val);
2276 else if (ins->dreg >= MONO_MAX_IREGS) {
2278 val = rs->iassign [ins->dreg];
2279 if (spec [MONO_INST_DEST] == 'l') {
2280 /* check special case when dreg have been moved from ecx (clob shift) */
2281 if (spec [MONO_INST_CLOB] == 's' && clob_dreg != -1)
2282 hreg = clob_dreg + 1;
2284 hreg = ins->dreg + 1;
2286 /* base prev_dreg on fixed hreg, handle clob case */
2287 prev_dreg = hreg - 1;
2289 prev_dreg = ins->dreg;
2294 /* the register gets spilled after this inst */
2297 val = mono_x86_alloc_int_reg (cfg, tmp, ins, dest_mask, ins->dreg, reginfo [ins->dreg].flags);
2298 rs->iassign [ins->dreg] = val;
2300 create_spilled_store (cfg, spill, val, prev_dreg, ins);
2302 DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
2303 rs->isymbolic [val] = prev_dreg;
2305 /* handle cases where lreg needs to be eax:edx */
2306 if (spec [MONO_INST_DEST] == 'l') {
2307 /* check special case when dreg have been moved from ecx (clob shift) */
2308 int hreg = prev_dreg + 1;
2309 val = rs->iassign [hreg];
2313 /* the register gets spilled after this inst */
2316 val = mono_x86_alloc_int_reg (cfg, tmp, ins, dest_mask, hreg, reginfo [hreg].flags);
2317 rs->iassign [hreg] = val;
2319 create_spilled_store (cfg, spill, val, hreg, ins);
2321 DEBUG (g_print ("\tassigned hreg %s to dest R%d\n", mono_arch_regname (val), hreg));
2322 rs->isymbolic [val] = hreg;
2323 if (ins->dreg == X86_EAX) {
2325 create_copy_ins (cfg, val, X86_EDX, ins);
2326 } else if (ins->dreg == X86_EDX) {
2327 if (val == X86_EAX) {
2329 g_assert_not_reached ();
2331 /* two forced copies */
2332 create_copy_ins (cfg, val, X86_EDX, ins);
2333 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
2336 if (val == X86_EDX) {
2337 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
2339 /* two forced copies */
2340 create_copy_ins (cfg, val, X86_EDX, ins);
2341 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
2344 if (reg_is_freeable (val) && hreg >= 0 && reginfo [hreg].born_in >= i) {
2345 DEBUG (g_print ("\tfreeable %s (R%d)\n", mono_arch_regname (val), hreg));
2346 mono_regstate_free_int (rs, val);
2348 } else if (spec [MONO_INST_DEST] == 'a' && ins->dreg != X86_EAX && spec [MONO_INST_CLOB] != 'd') {
2349 /* this instruction only outputs to EAX, need to copy */
2350 create_copy_ins (cfg, ins->dreg, X86_EAX, ins);
2351 } else if (spec [MONO_INST_DEST] == 'd' && ins->dreg != X86_EDX && spec [MONO_INST_CLOB] != 'd') {
2352 create_copy_ins (cfg, ins->dreg, X86_EDX, ins);
2355 if (spec [MONO_INST_DEST] != 'f' && reg_is_freeable (ins->dreg) && prev_dreg >= 0 && reginfo [prev_dreg].born_in >= i) {
2356 DEBUG (g_print ("\tfreeable %s (R%d) (born in %d)\n", mono_arch_regname (ins->dreg), prev_dreg, reginfo [prev_dreg].born_in));
2357 mono_regstate_free_int (rs, ins->dreg);
2359 /* put src1 in EAX if it needs to be */
2360 if (spec [MONO_INST_SRC1] == 'a') {
2361 if (!(rs->ifree_mask & (1 << X86_EAX))) {
2362 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [X86_EAX]));
2363 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [X86_EAX]);
2364 mono_regstate_free_int (rs, X86_EAX);
2366 if (ins->sreg1 < MONO_MAX_IREGS) {
2367 /* The argument is already in a hard reg, need to copy */
2368 MonoInst *copy = create_copy_ins (cfg, X86_EAX, ins->sreg1, NULL);
2369 insert_before_ins (ins, tmp, copy);
2372 /* force-set sreg1 */
2373 assign_ireg (rs, ins->sreg1, X86_EAX);
2374 ins->sreg1 = X86_EAX;
2380 if (spec [MONO_INST_SRC1] == 'f') {
2381 if (reginfof [ins->sreg1].flags & MONO_X86_FP_NEEDS_LOAD) {
2383 MonoInst *store = NULL;
2385 if (reginfof [ins->sreg1].flags & MONO_X86_FP_NEEDS_LOAD_SPILL) {
2387 spill_node = g_list_first (fspill_list);
2388 g_assert (spill_node);
2390 store = create_spilled_store_float (cfg, GPOINTER_TO_INT (spill_node->data), ins->sreg1, ins);
2391 fspill_list = g_list_remove (fspill_list, spill_node->data);
2395 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
2396 load = create_spilled_load_float (cfg, fspill, ins->sreg1, ins);
2397 insert_before_ins (ins, tmp, load);
2399 insert_before_ins (load, tmp, store);
2401 } else if ((spec [MONO_INST_DEST] == 'L') && (spec [MONO_INST_SRC1] == 'L')) {
2402 /* force source to be same as dest */
2403 assign_ireg (rs, ins->sreg1, ins->dreg);
2404 assign_ireg (rs, ins->sreg1 + 1, ins->unused);
2406 DEBUG (g_print ("\tassigned sreg1 (long) %s to sreg1 R%d\n", mono_arch_regname (ins->dreg), ins->sreg1));
2407 DEBUG (g_print ("\tassigned sreg1 (long-high) %s to sreg1 R%d\n", mono_arch_regname (ins->unused), ins->sreg1 + 1));
2409 ins->sreg1 = ins->dreg;
2411 * No need for saving the reg, we know that src1=dest in this cases
2412 * ins->inst_c0 = ins->unused;
2415 else if (ins->sreg1 >= MONO_MAX_IREGS) {
2416 val = rs->iassign [ins->sreg1];
2417 prev_sreg1 = ins->sreg1;
2421 /* the register gets spilled after this inst */
2424 if (0 && ins->opcode == OP_MOVE) {
2426 * small optimization: the dest register is already allocated
2427 * but the src one is not: we can simply assign the same register
2428 * here and peephole will get rid of the instruction later.
2429 * This optimization may interfere with the clobbering handling:
2430 * it removes a mov operation that will be added again to handle clobbering.
2431 * There are also some other issues that should with make testjit.
2433 mono_regstate_alloc_int (rs, 1 << ins->dreg);
2434 val = rs->iassign [ins->sreg1] = ins->dreg;
2435 //g_assert (val >= 0);
2436 DEBUG (g_print ("\tfast assigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
2438 //g_assert (val == -1); /* source cannot be spilled */
2439 val = mono_x86_alloc_int_reg (cfg, tmp, ins, src1_mask, ins->sreg1, reginfo [ins->sreg1].flags);
2440 rs->iassign [ins->sreg1] = val;
2441 DEBUG (g_print ("\tassigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
2444 MonoInst *store = create_spilled_store (cfg, spill, val, prev_sreg1, NULL);
2445 insert_before_ins (ins, tmp, store);
2448 rs->isymbolic [val] = prev_sreg1;
2453 /* handle clobbering of sreg1 */
2454 if ((spec [MONO_INST_CLOB] == '1' || spec [MONO_INST_CLOB] == 's') && ins->dreg != ins->sreg1) {
2455 MonoInst *sreg2_copy = NULL;
2456 MonoInst *copy = NULL;
2458 if (ins->dreg == ins->sreg2) {
2460 * copying sreg1 to dreg could clobber sreg2, so allocate a new
2465 reg2 = mono_x86_alloc_int_reg (cfg, tmp, ins, dest_mask, ins->sreg2, 0);
2467 DEBUG (g_print ("\tneed to copy sreg2 %s to reg %s\n", mono_arch_regname (ins->sreg2), mono_arch_regname (reg2)));
2468 sreg2_copy = create_copy_ins (cfg, reg2, ins->sreg2, NULL);
2469 prev_sreg2 = ins->sreg2 = reg2;
2471 mono_regstate_free_int (rs, reg2);
2474 copy = create_copy_ins (cfg, ins->dreg, ins->sreg1, NULL);
2475 DEBUG (g_print ("\tneed to copy sreg1 %s to dreg %s\n", mono_arch_regname (ins->sreg1), mono_arch_regname (ins->dreg)));
2476 insert_before_ins (ins, tmp, copy);
2479 insert_before_ins (copy, tmp, sreg2_copy);
2482 * Need to prevent sreg2 to be allocated to sreg1, since that
2483 * would screw up the previous copy.
2485 src2_mask &= ~ (1 << ins->sreg1);
2486 /* we set sreg1 to dest as well */
2487 prev_sreg1 = ins->sreg1 = ins->dreg;
2488 src2_mask &= ~ (1 << ins->dreg);
2494 if (spec [MONO_INST_SRC2] == 'f') {
2495 if (reginfof [ins->sreg2].flags & MONO_X86_FP_NEEDS_LOAD) {
2497 MonoInst *store = NULL;
2499 if (reginfof [ins->sreg2].flags & MONO_X86_FP_NEEDS_LOAD_SPILL) {
2502 spill_node = g_list_first (fspill_list);
2503 g_assert (spill_node);
2504 if (spec [MONO_INST_SRC1] == 'f' && (reginfof [ins->sreg1].flags & MONO_X86_FP_NEEDS_LOAD_SPILL))
2505 spill_node = g_list_next (spill_node);
2507 store = create_spilled_store_float (cfg, GPOINTER_TO_INT (spill_node->data), ins->sreg2, ins);
2508 fspill_list = g_list_remove (fspill_list, spill_node->data);
2512 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
2513 load = create_spilled_load_float (cfg, fspill, ins->sreg2, ins);
2514 insert_before_ins (ins, tmp, load);
2516 insert_before_ins (load, tmp, store);
2519 else if (ins->sreg2 >= MONO_MAX_IREGS) {
2520 val = rs->iassign [ins->sreg2];
2521 prev_sreg2 = ins->sreg2;
2525 /* the register gets spilled after this inst */
2528 val = mono_x86_alloc_int_reg (cfg, tmp, ins, src2_mask, ins->sreg2, reginfo [ins->sreg2].flags);
2529 rs->iassign [ins->sreg2] = val;
2530 DEBUG (g_print ("\tassigned sreg2 %s to R%d\n", mono_arch_regname (val), ins->sreg2));
2532 create_spilled_store (cfg, spill, val, prev_sreg2, ins);
2534 rs->isymbolic [val] = prev_sreg2;
2536 if (spec [MONO_INST_CLOB] == 's' && ins->sreg2 != X86_ECX) {
2537 DEBUG (g_print ("\tassigned sreg2 %s to R%d, but ECX is needed (R%d)\n", mono_arch_regname (val), ins->sreg2, rs->iassign [X86_ECX]));
2543 if (spec [MONO_INST_CLOB] == 'c') {
2545 guint32 clob_mask = X86_CALLEE_REGS;
2546 for (j = 0; j < MONO_MAX_IREGS; ++j) {
2548 if ((clob_mask & s) && !(rs->ifree_mask & s) && j != ins->sreg1) {
2549 //g_warning ("register %s busy at call site\n", mono_arch_regname (j));
2553 if (spec [MONO_INST_CLOB] == 'a') {
2554 guint32 clob_reg = X86_EAX;
2555 if (!(rs->ifree_mask & (1 << clob_reg)) && (rs->isymbolic [clob_reg] >= 8)) {
2556 DEBUG (g_print ("\tforced spill of clobbered reg R%d\n", rs->isymbolic [clob_reg]));
2557 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [clob_reg]);
2558 mono_regstate_free_int (rs, clob_reg);
2561 /*if (reg_is_freeable (ins->sreg1) && prev_sreg1 >= 0 && reginfo [prev_sreg1].born_in >= i) {
2562 DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg1)));
2563 mono_regstate_free_int (rs, ins->sreg1);
2565 if (reg_is_freeable (ins->sreg2) && prev_sreg2 >= 0 && reginfo [prev_sreg2].born_in >= i) {
2566 DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg2)));
2567 mono_regstate_free_int (rs, ins->sreg2);
2570 //DEBUG (print_ins (i, ins));
2571 /* this may result from a insert_before call */
2573 bb->code = tmp->data;
2579 g_list_free (fspill_list);
2582 static unsigned char*
2583 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int size, gboolean is_signed)
2585 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
2586 x86_fnstcw_membase(code, X86_ESP, 0);
2587 x86_mov_reg_membase (code, dreg, X86_ESP, 0, 2);
2588 x86_alu_reg_imm (code, X86_OR, dreg, 0xc00);
2589 x86_mov_membase_reg (code, X86_ESP, 2, dreg, 2);
2590 x86_fldcw_membase (code, X86_ESP, 2);
2592 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
2593 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
2594 x86_pop_reg (code, dreg);
2595 /* FIXME: need the high register
2596 * x86_pop_reg (code, dreg_high);
2599 x86_push_reg (code, X86_EAX); // SP = SP - 4
2600 x86_fist_pop_membase (code, X86_ESP, 0, FALSE);
2601 x86_pop_reg (code, dreg);
2603 x86_fldcw_membase (code, X86_ESP, 0);
2604 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
2607 x86_widen_reg (code, dreg, dreg, is_signed, FALSE);
2609 x86_widen_reg (code, dreg, dreg, is_signed, TRUE);
2613 static unsigned char*
2614 mono_emit_stack_alloc (guchar *code, MonoInst* tree)
2616 int sreg = tree->sreg1;
2617 int need_touch = FALSE;
2619 #if defined(PLATFORM_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
2628 * If requested stack size is larger than one page,
2629 * perform stack-touch operation
2632 * Generate stack probe code.
2633 * Under Windows, it is necessary to allocate one page at a time,
2634 * "touching" stack after each successful sub-allocation. This is
2635 * because of the way stack growth is implemented - there is a
2636 * guard page before the lowest stack page that is currently commited.
2637 * Stack normally grows sequentially so OS traps access to the
2638 * guard page and commits more pages when needed.
2640 x86_test_reg_imm (code, sreg, ~0xFFF);
2641 br[0] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
2643 br[2] = code; /* loop */
2644 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
2645 x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
2648 * By the end of the loop, sreg2 is smaller than 0x1000, so the init routine
2649 * that follows only initializes the last part of the area.
2651 /* Same as the init code below with size==0x1000 */
2652 if (tree->flags & MONO_INST_INIT) {
2653 x86_push_reg (code, X86_EAX);
2654 x86_push_reg (code, X86_ECX);
2655 x86_push_reg (code, X86_EDI);
2656 x86_mov_reg_imm (code, X86_ECX, (0x1000 >> 2));
2657 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
2658 x86_lea_membase (code, X86_EDI, X86_ESP, 12);
2660 x86_prefix (code, X86_REP_PREFIX);
2662 x86_pop_reg (code, X86_EDI);
2663 x86_pop_reg (code, X86_ECX);
2664 x86_pop_reg (code, X86_EAX);
2667 x86_alu_reg_imm (code, X86_SUB, sreg, 0x1000);
2668 x86_alu_reg_imm (code, X86_CMP, sreg, 0x1000);
2669 br[3] = code; x86_branch8 (code, X86_CC_AE, 0, FALSE);
2670 x86_patch (br[3], br[2]);
2671 x86_test_reg_reg (code, sreg, sreg);
2672 br[4] = code; x86_branch8 (code, X86_CC_Z, 0, FALSE);
2673 x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
2675 br[1] = code; x86_jump8 (code, 0);
2677 x86_patch (br[0], code);
2678 x86_alu_reg_reg (code, X86_SUB, X86_ESP, sreg);
2679 x86_patch (br[1], code);
2680 x86_patch (br[4], code);
2683 x86_alu_reg_reg (code, X86_SUB, X86_ESP, tree->sreg1);
2685 if (tree->flags & MONO_INST_INIT) {
2687 if (tree->dreg != X86_EAX && sreg != X86_EAX) {
2688 x86_push_reg (code, X86_EAX);
2691 if (tree->dreg != X86_ECX && sreg != X86_ECX) {
2692 x86_push_reg (code, X86_ECX);
2695 if (tree->dreg != X86_EDI && sreg != X86_EDI) {
2696 x86_push_reg (code, X86_EDI);
2700 x86_shift_reg_imm (code, X86_SHR, sreg, 2);
2701 if (sreg != X86_ECX)
2702 x86_mov_reg_reg (code, X86_ECX, sreg, 4);
2703 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
2705 x86_lea_membase (code, X86_EDI, X86_ESP, offset);
2707 x86_prefix (code, X86_REP_PREFIX);
2710 if (tree->dreg != X86_EDI && sreg != X86_EDI)
2711 x86_pop_reg (code, X86_EDI);
2712 if (tree->dreg != X86_ECX && sreg != X86_ECX)
2713 x86_pop_reg (code, X86_ECX);
2714 if (tree->dreg != X86_EAX && sreg != X86_EAX)
2715 x86_pop_reg (code, X86_EAX);
2722 emit_move_return_value (MonoCompile *cfg, MonoInst *ins, guint8 *code)
2727 /* Move return value to the target register */
2728 switch (ins->opcode) {
2731 case OP_CALL_MEMBASE:
2732 if (ins->dreg != X86_EAX)
2733 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
2737 case OP_VCALL_MEMBASE:
2738 cinfo = get_call_info (((MonoCallInst*)ins)->signature, FALSE);
2739 if (cinfo->ret.storage == ArgValuetypeInReg) {
2740 /* Pop the destination address from the stack */
2741 x86_pop_reg (code, X86_ECX);
2743 for (quad = 0; quad < 2; quad ++) {
2744 switch (cinfo->ret.pair_storage [quad]) {
2746 g_assert (cinfo->ret.pair_regs [quad] != X86_ECX);
2747 x86_mov_membase_reg (code, X86_ECX, (quad * sizeof (gpointer)), cinfo->ret.pair_regs [quad], sizeof (gpointer));
2752 g_assert_not_reached ();
2765 emit_tls_get (guint8* code, int dreg, int tls_offset)
2767 #ifdef PLATFORM_WIN32
2769 * See the Under the Hood article in the May 1996 issue of Microsoft Systems
2770 * Journal and/or a disassembly of the TlsGet () function.
2772 g_assert (tls_offset < 64);
2773 x86_prefix (code, X86_FS_PREFIX);
2774 x86_mov_reg_mem (code, dreg, 0x18, 4);
2775 /* Dunno what this does but TlsGetValue () contains it */
2776 x86_alu_membase_imm (code, X86_AND, dreg, 0x34, 0);
2777 x86_mov_reg_membase (code, dreg, dreg, 3600 + (tls_offset * 4), 4);
2779 x86_prefix (code, X86_GS_PREFIX);
2780 x86_mov_reg_mem (code, dreg, tls_offset, 4);
2785 #define REAL_PRINT_REG(text,reg) \
2786 mono_assert (reg >= 0); \
2787 x86_push_reg (code, X86_EAX); \
2788 x86_push_reg (code, X86_EDX); \
2789 x86_push_reg (code, X86_ECX); \
2790 x86_push_reg (code, reg); \
2791 x86_push_imm (code, reg); \
2792 x86_push_imm (code, text " %d %p\n"); \
2793 x86_mov_reg_imm (code, X86_EAX, printf); \
2794 x86_call_reg (code, X86_EAX); \
2795 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 3*4); \
2796 x86_pop_reg (code, X86_ECX); \
2797 x86_pop_reg (code, X86_EDX); \
2798 x86_pop_reg (code, X86_EAX);
2800 /* benchmark and set based on cpu */
2801 #define LOOP_ALIGNMENT 8
2802 #define bb_is_loop_start(bb) ((bb)->loop_body_start && (bb)->nesting)
2805 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2810 guint8 *code = cfg->native_code + cfg->code_len;
2811 MonoInst *last_ins = NULL;
2812 guint last_offset = 0;
2815 if (cfg->opt & MONO_OPT_PEEPHOLE)
2816 peephole_pass (cfg, bb);
2818 if (cfg->opt & MONO_OPT_LOOP) {
2819 int pad, align = LOOP_ALIGNMENT;
2820 /* set alignment depending on cpu */
2821 if (bb_is_loop_start (bb) && (pad = (cfg->code_len & (align - 1)))) {
2823 /*g_print ("adding %d pad at %x to loop in %s\n", pad, cfg->code_len, cfg->method->name);*/
2824 x86_padding (code, pad);
2825 cfg->code_len += pad;
2826 bb->native_offset = cfg->code_len;
2830 if (cfg->verbose_level > 2)
2831 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2833 cpos = bb->max_offset;
2835 if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2836 MonoProfileCoverageInfo *cov = cfg->coverage_info;
2837 g_assert (!cfg->compile_aot);
2840 cov->data [bb->dfn].cil_code = bb->cil_code;
2841 /* this is not thread save, but good enough */
2842 x86_inc_mem (code, &cov->data [bb->dfn].count);
2845 offset = code - cfg->native_code;
2849 offset = code - cfg->native_code;
2851 max_len = ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
2853 if (offset > (cfg->code_size - max_len - 16)) {
2854 cfg->code_size *= 2;
2855 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2856 code = cfg->native_code + offset;
2857 mono_jit_stats.code_reallocs++;
2860 mono_debug_record_line_number (cfg, ins, offset);
2862 switch (ins->opcode) {
2864 x86_mul_reg (code, ins->sreg2, TRUE);
2867 x86_mul_reg (code, ins->sreg2, FALSE);
2869 case OP_X86_SETEQ_MEMBASE:
2870 case OP_X86_SETNE_MEMBASE:
2871 x86_set_membase (code, ins->opcode == OP_X86_SETEQ_MEMBASE ? X86_CC_EQ : X86_CC_NE,
2872 ins->inst_basereg, ins->inst_offset, TRUE);
2874 case OP_STOREI1_MEMBASE_IMM:
2875 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 1);
2877 case OP_STOREI2_MEMBASE_IMM:
2878 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 2);
2880 case OP_STORE_MEMBASE_IMM:
2881 case OP_STOREI4_MEMBASE_IMM:
2882 x86_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, ins->inst_imm, 4);
2884 case OP_STOREI1_MEMBASE_REG:
2885 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 1);
2887 case OP_STOREI2_MEMBASE_REG:
2888 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 2);
2890 case OP_STORE_MEMBASE_REG:
2891 case OP_STOREI4_MEMBASE_REG:
2892 x86_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, 4);
2897 x86_mov_reg_mem (code, ins->dreg, ins->inst_p0, 4);
2900 x86_mov_reg_imm (code, ins->dreg, ins->inst_p0);
2901 x86_mov_reg_membase (code, ins->dreg, ins->dreg, 0, 4);
2903 case OP_LOAD_MEMBASE:
2904 case OP_LOADI4_MEMBASE:
2905 case OP_LOADU4_MEMBASE:
2906 x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, 4);
2908 case OP_LOADU1_MEMBASE:
2909 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE);
2911 case OP_LOADI1_MEMBASE:
2912 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, FALSE);
2914 case OP_LOADU2_MEMBASE:
2915 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE);
2917 case OP_LOADI2_MEMBASE:
2918 x86_widen_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, TRUE, TRUE);
2921 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, FALSE);
2924 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, TRUE);
2927 x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, FALSE);
2930 x86_widen_reg (code, ins->dreg, ins->sreg1, FALSE, TRUE);
2933 x86_alu_reg_reg (code, X86_CMP, ins->sreg1, ins->sreg2);
2935 case OP_COMPARE_IMM:
2936 x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
2938 case OP_X86_COMPARE_MEMBASE_REG:
2939 x86_alu_membase_reg (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2);
2941 case OP_X86_COMPARE_MEMBASE_IMM:
2942 x86_alu_membase_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2944 case OP_X86_COMPARE_MEMBASE8_IMM:
2945 x86_alu_membase8_imm (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2947 case OP_X86_COMPARE_REG_MEMBASE:
2948 x86_alu_reg_membase (code, X86_CMP, ins->sreg1, ins->sreg2, ins->inst_offset);
2950 case OP_X86_COMPARE_MEM_IMM:
2951 x86_alu_mem_imm (code, X86_CMP, ins->inst_offset, ins->inst_imm);
2953 case OP_X86_TEST_NULL:
2954 x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
2956 case OP_X86_ADD_MEMBASE_IMM:
2957 x86_alu_membase_imm (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2959 case OP_X86_ADD_MEMBASE:
2960 x86_alu_reg_membase (code, X86_ADD, ins->sreg1, ins->sreg2, ins->inst_offset);
2962 case OP_X86_SUB_MEMBASE_IMM:
2963 x86_alu_membase_imm (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm);
2965 case OP_X86_SUB_MEMBASE:
2966 x86_alu_reg_membase (code, X86_SUB, ins->sreg1, ins->sreg2, ins->inst_offset);
2968 case OP_X86_INC_MEMBASE:
2969 x86_inc_membase (code, ins->inst_basereg, ins->inst_offset);
2971 case OP_X86_INC_REG:
2972 x86_inc_reg (code, ins->dreg);
2974 case OP_X86_DEC_MEMBASE:
2975 x86_dec_membase (code, ins->inst_basereg, ins->inst_offset);
2977 case OP_X86_DEC_REG:
2978 x86_dec_reg (code, ins->dreg);
2980 case OP_X86_MUL_MEMBASE:
2981 x86_imul_reg_membase (code, ins->sreg1, ins->sreg2, ins->inst_offset);
2984 x86_breakpoint (code);
2988 x86_alu_reg_reg (code, X86_ADD, ins->sreg1, ins->sreg2);
2991 x86_alu_reg_reg (code, X86_ADC, ins->sreg1, ins->sreg2);
2995 x86_alu_reg_imm (code, X86_ADD, ins->dreg, ins->inst_imm);
2998 x86_alu_reg_imm (code, X86_ADC, ins->dreg, ins->inst_imm);
3002 x86_alu_reg_reg (code, X86_SUB, ins->sreg1, ins->sreg2);
3005 x86_alu_reg_reg (code, X86_SBB, ins->sreg1, ins->sreg2);
3009 x86_alu_reg_imm (code, X86_SUB, ins->dreg, ins->inst_imm);
3012 x86_alu_reg_imm (code, X86_SBB, ins->dreg, ins->inst_imm);
3015 x86_alu_reg_reg (code, X86_AND, ins->sreg1, ins->sreg2);
3018 x86_alu_reg_imm (code, X86_AND, ins->sreg1, ins->inst_imm);
3022 x86_div_reg (code, ins->sreg2, TRUE);
3025 x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
3026 x86_div_reg (code, ins->sreg2, FALSE);
3029 x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
3031 x86_div_reg (code, ins->sreg2, TRUE);
3035 x86_div_reg (code, ins->sreg2, TRUE);
3038 x86_alu_reg_reg (code, X86_XOR, X86_EDX, X86_EDX);
3039 x86_div_reg (code, ins->sreg2, FALSE);
3042 x86_mov_reg_imm (code, ins->sreg2, ins->inst_imm);
3044 x86_div_reg (code, ins->sreg2, TRUE);
3047 x86_alu_reg_reg (code, X86_OR, ins->sreg1, ins->sreg2);
3050 x86_alu_reg_imm (code, X86_OR, ins->sreg1, ins->inst_imm);
3053 x86_alu_reg_reg (code, X86_XOR, ins->sreg1, ins->sreg2);
3056 x86_alu_reg_imm (code, X86_XOR, ins->sreg1, ins->inst_imm);
3059 g_assert (ins->sreg2 == X86_ECX);
3060 x86_shift_reg (code, X86_SHL, ins->dreg);
3063 g_assert (ins->sreg2 == X86_ECX);
3064 x86_shift_reg (code, X86_SAR, ins->dreg);
3067 x86_shift_reg_imm (code, X86_SAR, ins->dreg, ins->inst_imm);
3070 x86_shift_reg_imm (code, X86_SHR, ins->dreg, ins->inst_imm);
3073 g_assert (ins->sreg2 == X86_ECX);
3074 x86_shift_reg (code, X86_SHR, ins->dreg);
3077 x86_shift_reg_imm (code, X86_SHL, ins->dreg, ins->inst_imm);
3080 guint8 *jump_to_end;
3082 /* handle shifts below 32 bits */
3083 x86_shld_reg (code, ins->unused, ins->sreg1);
3084 x86_shift_reg (code, X86_SHL, ins->sreg1);
3086 x86_test_reg_imm (code, X86_ECX, 32);
3087 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
3089 /* handle shift over 32 bit */
3090 x86_mov_reg_reg (code, ins->unused, ins->sreg1, 4);
3091 x86_clear_reg (code, ins->sreg1);
3093 x86_patch (jump_to_end, code);
3097 guint8 *jump_to_end;
3099 /* handle shifts below 32 bits */
3100 x86_shrd_reg (code, ins->sreg1, ins->unused);
3101 x86_shift_reg (code, X86_SAR, ins->unused);
3103 x86_test_reg_imm (code, X86_ECX, 32);
3104 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, FALSE);
3106 /* handle shifts over 31 bits */
3107 x86_mov_reg_reg (code, ins->sreg1, ins->unused, 4);
3108 x86_shift_reg_imm (code, X86_SAR, ins->unused, 31);
3110 x86_patch (jump_to_end, code);
3114 guint8 *jump_to_end;
3116 /* handle shifts below 32 bits */
3117 x86_shrd_reg (code, ins->sreg1, ins->unused);
3118 x86_shift_reg (code, X86_SHR, ins->unused);
3120 x86_test_reg_imm (code, X86_ECX, 32);
3121 jump_to_end = code; x86_branch8 (code, X86_CC_EQ, 0, FALSE);
3123 /* handle shifts over 31 bits */
3124 x86_mov_reg_reg (code, ins->sreg1, ins->unused, 4);
3125 x86_shift_reg_imm (code, X86_SHR, ins->unused, 31);
3127 x86_patch (jump_to_end, code);
3131 if (ins->inst_imm >= 32) {
3132 x86_mov_reg_reg (code, ins->unused, ins->sreg1, 4);
3133 x86_clear_reg (code, ins->sreg1);
3134 x86_shift_reg_imm (code, X86_SHL, ins->unused, ins->inst_imm - 32);
3136 x86_shld_reg_imm (code, ins->unused, ins->sreg1, ins->inst_imm);
3137 x86_shift_reg_imm (code, X86_SHL, ins->sreg1, ins->inst_imm);
3141 if (ins->inst_imm >= 32) {
3142 x86_mov_reg_reg (code, ins->sreg1, ins->unused, 4);
3143 x86_shift_reg_imm (code, X86_SAR, ins->unused, 0x1f);
3144 x86_shift_reg_imm (code, X86_SAR, ins->sreg1, ins->inst_imm - 32);
3146 x86_shrd_reg_imm (code, ins->sreg1, ins->unused, ins->inst_imm);
3147 x86_shift_reg_imm (code, X86_SAR, ins->unused, ins->inst_imm);
3150 case OP_LSHR_UN_IMM:
3151 if (ins->inst_imm >= 32) {
3152 x86_mov_reg_reg (code, ins->sreg1, ins->unused, 4);
3153 x86_clear_reg (code, ins->unused);
3154 x86_shift_reg_imm (code, X86_SHR, ins->sreg1, ins->inst_imm - 32);
3156 x86_shrd_reg_imm (code, ins->sreg1, ins->unused, ins->inst_imm);
3157 x86_shift_reg_imm (code, X86_SHR, ins->unused, ins->inst_imm);
3161 x86_not_reg (code, ins->sreg1);
3164 x86_neg_reg (code, ins->sreg1);
3167 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, FALSE);
3170 x86_widen_reg (code, ins->dreg, ins->sreg1, TRUE, TRUE);
3173 x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
3176 x86_imul_reg_reg_imm (code, ins->dreg, ins->sreg1, ins->inst_imm);
3179 x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
3180 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
3182 case CEE_MUL_OVF_UN: {
3183 /* the mul operation and the exception check should most likely be split */
3184 int non_eax_reg, saved_eax = FALSE, saved_edx = FALSE;
3185 /*g_assert (ins->sreg2 == X86_EAX);
3186 g_assert (ins->dreg == X86_EAX);*/
3187 if (ins->sreg2 == X86_EAX) {
3188 non_eax_reg = ins->sreg1;
3189 } else if (ins->sreg1 == X86_EAX) {
3190 non_eax_reg = ins->sreg2;
3192 /* no need to save since we're going to store to it anyway */
3193 if (ins->dreg != X86_EAX) {
3195 x86_push_reg (code, X86_EAX);
3197 x86_mov_reg_reg (code, X86_EAX, ins->sreg1, 4);
3198 non_eax_reg = ins->sreg2;
3200 if (ins->dreg == X86_EDX) {
3203 x86_push_reg (code, X86_EAX);
3205 } else if (ins->dreg != X86_EAX) {
3207 x86_push_reg (code, X86_EDX);
3209 x86_mul_reg (code, non_eax_reg, FALSE);
3210 /* save before the check since pop and mov don't change the flags */
3211 if (ins->dreg != X86_EAX)
3212 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
3214 x86_pop_reg (code, X86_EDX);
3216 x86_pop_reg (code, X86_EAX);
3217 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
3221 x86_mov_reg_imm (code, ins->dreg, ins->inst_c0);
3224 g_assert_not_reached ();
3225 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
3226 x86_mov_reg_imm (code, ins->dreg, 0);
3228 case OP_LOAD_GOTADDR:
3229 x86_call_imm (code, 0);
3231 * The patch needs to point to the pop, since the GOT offset needs
3232 * to be added to that address.
3234 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_GOT_OFFSET, NULL);
3235 x86_pop_reg (code, ins->dreg);
3236 x86_alu_reg_imm (code, X86_ADD, ins->dreg, 0xf0f0f0f0);
3239 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_right->inst_i1, ins->inst_right->inst_p0);
3240 x86_mov_reg_membase (code, ins->dreg, ins->inst_basereg, 0xf0f0f0f0, 4);
3242 case OP_X86_PUSH_GOT_ENTRY:
3243 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_right->inst_i1, ins->inst_right->inst_p0);
3244 x86_push_membase (code, ins->inst_basereg, 0xf0f0f0f0);
3248 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
3251 g_assert_not_reached ();
3254 * Note: this 'frame destruction' logic is useful for tail calls, too.
3255 * Keep in sync with the code in emit_epilog.
3259 /* FIXME: no tracing support... */
3260 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
3261 code = mono_arch_instrument_epilog (cfg, mono_profiler_method_leave, code, FALSE);
3262 /* reset offset to make max_len work */
3263 offset = code - cfg->native_code;
3265 g_assert (!cfg->method->save_lmf);
3267 if (cfg->used_int_regs & (1 << X86_EBX))
3269 if (cfg->used_int_regs & (1 << X86_EDI))
3271 if (cfg->used_int_regs & (1 << X86_ESI))
3274 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
3276 if (cfg->used_int_regs & (1 << X86_ESI))
3277 x86_pop_reg (code, X86_ESI);
3278 if (cfg->used_int_regs & (1 << X86_EDI))
3279 x86_pop_reg (code, X86_EDI);
3280 if (cfg->used_int_regs & (1 << X86_EBX))
3281 x86_pop_reg (code, X86_EBX);
3283 /* restore ESP/EBP */
3285 offset = code - cfg->native_code;
3286 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
3287 x86_jump32 (code, 0);
3291 /* ensure ins->sreg1 is not NULL
3292 * note that cmp DWORD PTR [eax], eax is one byte shorter than
3293 * cmp DWORD PTR [eax], 0
3295 x86_alu_membase_reg (code, X86_CMP, ins->sreg1, 0, ins->sreg1);
3298 int hreg = ins->sreg1 == X86_EAX? X86_ECX: X86_EAX;
3299 x86_push_reg (code, hreg);
3300 x86_lea_membase (code, hreg, X86_EBP, cfg->sig_cookie);
3301 x86_mov_membase_reg (code, ins->sreg1, 0, hreg, 4);
3302 x86_pop_reg (code, hreg);
3310 call = (MonoCallInst*)ins;
3311 if (ins->flags & MONO_INST_HAS_METHOD)
3312 code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
3314 code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
3315 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
3316 /* a pop is one byte, while an add reg, imm is 3. So if there are 4 or 8
3317 * bytes to pop, we want to use pops. GCC does this (note it won't happen
3318 * for P4 or i686 because gcc will avoid using pop push at all. But we aren't
3319 * smart enough to do that optimization yet
3321 * It turns out that on my P4, doing two pops for 8 bytes on the stack makes
3322 * mcs botstrap slow down. However, doing 1 pop for 4 bytes creates a small,
3323 * (most likely from locality benefits). People with other processors should
3324 * check on theirs to see what happens.
3326 if (call->stack_usage == 4) {
3327 /* we want to use registers that won't get used soon, so use
3328 * ecx, as eax will get allocated first. edx is used by long calls,
3329 * so we can't use that.
3332 x86_pop_reg (code, X86_ECX);
3334 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
3337 code = emit_move_return_value (cfg, ins, code);
3342 case OP_VOIDCALL_REG:
3344 call = (MonoCallInst*)ins;
3345 x86_call_reg (code, ins->sreg1);
3346 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
3347 if (call->stack_usage == 4)
3348 x86_pop_reg (code, X86_ECX);
3350 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
3352 code = emit_move_return_value (cfg, ins, code);
3354 case OP_FCALL_MEMBASE:
3355 case OP_LCALL_MEMBASE:
3356 case OP_VCALL_MEMBASE:
3357 case OP_VOIDCALL_MEMBASE:
3358 case OP_CALL_MEMBASE:
3359 call = (MonoCallInst*)ins;
3360 x86_call_membase (code, ins->sreg1, ins->inst_offset);
3361 if (call->stack_usage && !CALLCONV_IS_STDCALL (call->signature)) {
3362 if (call->stack_usage == 4)
3363 x86_pop_reg (code, X86_ECX);
3365 x86_alu_reg_imm (code, X86_ADD, X86_ESP, call->stack_usage);
3367 code = emit_move_return_value (cfg, ins, code);
3371 x86_push_reg (code, ins->sreg1);
3373 case OP_X86_PUSH_IMM:
3374 x86_push_imm (code, ins->inst_imm);
3376 case OP_X86_PUSH_MEMBASE:
3377 x86_push_membase (code, ins->inst_basereg, ins->inst_offset);
3379 case OP_X86_PUSH_OBJ:
3380 x86_alu_reg_imm (code, X86_SUB, X86_ESP, ins->inst_imm);
3381 x86_push_reg (code, X86_EDI);
3382 x86_push_reg (code, X86_ESI);
3383 x86_push_reg (code, X86_ECX);
3384 if (ins->inst_offset)
3385 x86_lea_membase (code, X86_ESI, ins->inst_basereg, ins->inst_offset);
3387 x86_mov_reg_reg (code, X86_ESI, ins->inst_basereg, 4);
3388 x86_lea_membase (code, X86_EDI, X86_ESP, 12);
3389 x86_mov_reg_imm (code, X86_ECX, (ins->inst_imm >> 2));
3391 x86_prefix (code, X86_REP_PREFIX);
3393 x86_pop_reg (code, X86_ECX);
3394 x86_pop_reg (code, X86_ESI);
3395 x86_pop_reg (code, X86_EDI);
3398 x86_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->unused);
3400 case OP_X86_LEA_MEMBASE:
3401 x86_lea_membase (code, ins->dreg, ins->sreg1, ins->inst_imm);
3404 x86_xchg_reg_reg (code, ins->sreg1, ins->sreg2, 4);
3407 /* keep alignment */
3408 x86_alu_reg_imm (code, X86_ADD, ins->sreg1, MONO_ARCH_FRAME_ALIGNMENT - 1);
3409 x86_alu_reg_imm (code, X86_AND, ins->sreg1, ~(MONO_ARCH_FRAME_ALIGNMENT - 1));
3410 code = mono_emit_stack_alloc (code, ins);
3411 x86_mov_reg_reg (code, ins->dreg, X86_ESP, 4);
3417 x86_push_reg (code, ins->sreg1);
3418 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD,
3419 (gpointer)"mono_arch_throw_exception");
3423 x86_push_reg (code, ins->sreg1);
3424 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD,
3425 (gpointer)"mono_arch_rethrow_exception");
3428 case OP_CALL_HANDLER:
3429 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3430 x86_call_imm (code, 0);
3433 ins->inst_c0 = code - cfg->native_code;
3436 //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
3437 //if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
3439 if (ins->flags & MONO_INST_BRLABEL) {
3440 if (ins->inst_i0->inst_c0) {
3441 x86_jump_code (code, cfg->native_code + ins->inst_i0->inst_c0);
3443 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
3444 if ((cfg->opt & MONO_OPT_BRANCH) &&
3445 x86_is_imm8 (ins->inst_i0->inst_c1 - cpos))
3446 x86_jump8 (code, 0);
3448 x86_jump32 (code, 0);
3451 if (ins->inst_target_bb->native_offset) {
3452 x86_jump_code (code, cfg->native_code + ins->inst_target_bb->native_offset);
3454 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3455 if ((cfg->opt & MONO_OPT_BRANCH) &&
3456 x86_is_imm8 (ins->inst_target_bb->max_offset - cpos))
3457 x86_jump8 (code, 0);
3459 x86_jump32 (code, 0);
3464 x86_jump_reg (code, ins->sreg1);
3467 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3468 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3471 x86_set_reg (code, X86_CC_LT, ins->dreg, TRUE);
3472 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3475 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
3476 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3479 x86_set_reg (code, X86_CC_GT, ins->dreg, TRUE);
3480 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3483 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
3484 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3487 x86_set_reg (code, X86_CC_NE, ins->dreg, TRUE);
3488 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3490 case OP_COND_EXC_EQ:
3491 case OP_COND_EXC_NE_UN:
3492 case OP_COND_EXC_LT:
3493 case OP_COND_EXC_LT_UN:
3494 case OP_COND_EXC_GT:
3495 case OP_COND_EXC_GT_UN:
3496 case OP_COND_EXC_GE:
3497 case OP_COND_EXC_GE_UN:
3498 case OP_COND_EXC_LE:
3499 case OP_COND_EXC_LE_UN:
3500 case OP_COND_EXC_OV:
3501 case OP_COND_EXC_NO:
3503 case OP_COND_EXC_NC:
3504 EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_EQ],
3505 (ins->opcode < OP_COND_EXC_NE_UN), ins->inst_p1);
3517 EMIT_COND_BRANCH (ins, branch_cc_table [ins->opcode - CEE_BEQ], (ins->opcode < CEE_BNE_UN));
3520 /* floating point opcodes */
3522 double d = *(double *)ins->inst_p0;
3524 if ((d == 0.0) && (mono_signbit (d) == 0)) {
3526 } else if (d == 1.0) {
3529 if (cfg->compile_aot) {
3530 guint32 *val = (guint32*)&d;
3531 x86_push_imm (code, val [1]);
3532 x86_push_imm (code, val [0]);
3533 x86_fld_membase (code, X86_ESP, 0, TRUE);
3534 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
3537 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_R8, ins->inst_p0);
3538 x86_fld (code, NULL, TRUE);
3544 float f = *(float *)ins->inst_p0;
3546 if ((f == 0.0) && (mono_signbit (f) == 0)) {
3548 } else if (f == 1.0) {
3551 if (cfg->compile_aot) {
3552 guint32 val = *(guint32*)&f;
3553 x86_push_imm (code, val);
3554 x86_fld_membase (code, X86_ESP, 0, FALSE);
3555 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3558 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_R4, ins->inst_p0);
3559 x86_fld (code, NULL, FALSE);
3564 case OP_STORER8_MEMBASE_REG:
3565 x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, TRUE, TRUE);
3567 case OP_LOADR8_SPILL_MEMBASE:
3568 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
3571 case OP_LOADR8_MEMBASE:
3572 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
3574 case OP_STORER4_MEMBASE_REG:
3575 x86_fst_membase (code, ins->inst_destbasereg, ins->inst_offset, FALSE, TRUE);
3577 case OP_LOADR4_MEMBASE:
3578 x86_fld_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
3580 case CEE_CONV_R4: /* FIXME: change precision */
3582 x86_push_reg (code, ins->sreg1);
3583 x86_fild_membase (code, X86_ESP, 0, FALSE);
3584 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3586 case OP_X86_FP_LOAD_I8:
3587 x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
3589 case OP_X86_FP_LOAD_I4:
3590 x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
3592 case OP_FCONV_TO_I1:
3593 code = emit_float_to_int (cfg, code, ins->dreg, 1, TRUE);
3595 case OP_FCONV_TO_U1:
3596 code = emit_float_to_int (cfg, code, ins->dreg, 1, FALSE);
3598 case OP_FCONV_TO_I2:
3599 code = emit_float_to_int (cfg, code, ins->dreg, 2, TRUE);
3601 case OP_FCONV_TO_U2:
3602 code = emit_float_to_int (cfg, code, ins->dreg, 2, FALSE);
3604 case OP_FCONV_TO_I4:
3606 code = emit_float_to_int (cfg, code, ins->dreg, 4, TRUE);
3608 case OP_FCONV_TO_I8:
3609 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
3610 x86_fnstcw_membase(code, X86_ESP, 0);
3611 x86_mov_reg_membase (code, ins->dreg, X86_ESP, 0, 2);
3612 x86_alu_reg_imm (code, X86_OR, ins->dreg, 0xc00);
3613 x86_mov_membase_reg (code, X86_ESP, 2, ins->dreg, 2);
3614 x86_fldcw_membase (code, X86_ESP, 2);
3615 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
3616 x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
3617 x86_pop_reg (code, ins->dreg);
3618 x86_pop_reg (code, ins->unused);
3619 x86_fldcw_membase (code, X86_ESP, 0);
3620 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
3622 case OP_LCONV_TO_R_UN: {
3623 static guint8 mn[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x40 };
3626 /* load 64bit integer to FP stack */
3627 x86_push_imm (code, 0);
3628 x86_push_reg (code, ins->sreg2);
3629 x86_push_reg (code, ins->sreg1);
3630 x86_fild_membase (code, X86_ESP, 0, TRUE);
3631 /* store as 80bit FP value */
3632 x86_fst80_membase (code, X86_ESP, 0);
3634 /* test if lreg is negative */
3635 x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
3636 br = code; x86_branch8 (code, X86_CC_GEZ, 0, TRUE);
3638 /* add correction constant mn */
3639 x86_fld80_mem (code, mn);
3640 x86_fld80_membase (code, X86_ESP, 0);
3641 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3642 x86_fst80_membase (code, X86_ESP, 0);
3644 x86_patch (br, code);
3646 x86_fld80_membase (code, X86_ESP, 0);
3647 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
3651 case OP_LCONV_TO_OVF_I: {
3652 guint8 *br [3], *label [1];
3655 * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3657 x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
3659 /* If the low word top bit is set, see if we are negative */
3660 br [0] = code; x86_branch8 (code, X86_CC_LT, 0, TRUE);
3661 /* We are not negative (no top bit set, check for our top word to be zero */
3662 x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
3663 br [1] = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
3666 /* throw exception */
3667 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC, "OverflowException");
3668 x86_jump32 (code, 0);
3670 x86_patch (br [0], code);
3671 /* our top bit is set, check that top word is 0xfffffff */
3672 x86_alu_reg_imm (code, X86_CMP, ins->sreg2, 0xffffffff);
3674 x86_patch (br [1], code);
3675 /* nope, emit exception */
3676 br [2] = code; x86_branch8 (code, X86_CC_NE, 0, TRUE);
3677 x86_patch (br [2], label [0]);
3679 if (ins->dreg != ins->sreg1)
3680 x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
3684 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3687 x86_fp_op_reg (code, X86_FSUB, 1, TRUE);
3690 x86_fp_op_reg (code, X86_FMUL, 1, TRUE);
3693 x86_fp_op_reg (code, X86_FDIV, 1, TRUE);
3701 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3706 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3713 * it really doesn't make sense to inline all this code,
3714 * it's here just to show that things may not be as simple
3717 guchar *check_pos, *end_tan, *pop_jump;
3718 x86_push_reg (code, X86_EAX);
3721 x86_test_reg_imm (code, X86_EAX, X86_FP_C2);
3723 x86_branch8 (code, X86_CC_NE, 0, FALSE);
3724 x86_fstp (code, 0); /* pop the 1.0 */
3726 x86_jump8 (code, 0);
3728 x86_fp_op (code, X86_FADD, 0);
3732 x86_test_reg_imm (code, X86_EAX, X86_FP_C2);
3734 x86_branch8 (code, X86_CC_NE, 0, FALSE);
3737 x86_patch (pop_jump, code);
3738 x86_fstp (code, 0); /* pop the 1.0 */
3739 x86_patch (check_pos, code);
3740 x86_patch (end_tan, code);
3742 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3743 x86_pop_reg (code, X86_EAX);
3750 x86_fp_op_reg (code, X86_FADD, 1, TRUE);
3761 x86_push_reg (code, X86_EAX);
3762 /* we need to exchange ST(0) with ST(1) */
3765 /* this requires a loop, because fprem somtimes
3766 * returns a partial remainder */
3768 /* looks like MS is using fprem instead of the IEEE compatible fprem1 */
3769 /* x86_fprem1 (code); */
3772 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_C2);
3774 x86_branch8 (code, X86_CC_NE, l1 - l2, FALSE);
3779 x86_pop_reg (code, X86_EAX);
3783 if (cfg->opt & MONO_OPT_FCMOV) {
3784 x86_fcomip (code, 1);
3788 /* this overwrites EAX */
3789 EMIT_FPCOMPARE(code);
3790 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3793 if (cfg->opt & MONO_OPT_FCMOV) {
3794 /* zeroing the register at the start results in
3795 * shorter and faster code (we can also remove the widening op)
3797 guchar *unordered_check;
3798 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3799 x86_fcomip (code, 1);
3801 unordered_check = code;
3802 x86_branch8 (code, X86_CC_P, 0, FALSE);
3803 x86_set_reg (code, X86_CC_EQ, ins->dreg, FALSE);
3804 x86_patch (unordered_check, code);
3807 if (ins->dreg != X86_EAX)
3808 x86_push_reg (code, X86_EAX);
3810 EMIT_FPCOMPARE(code);
3811 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3812 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
3813 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3814 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3816 if (ins->dreg != X86_EAX)
3817 x86_pop_reg (code, X86_EAX);
3821 if (cfg->opt & MONO_OPT_FCMOV) {
3822 /* zeroing the register at the start results in
3823 * shorter and faster code (we can also remove the widening op)
3825 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3826 x86_fcomip (code, 1);
3828 if (ins->opcode == OP_FCLT_UN) {
3829 guchar *unordered_check = code;
3830 guchar *jump_to_end;
3831 x86_branch8 (code, X86_CC_P, 0, FALSE);
3832 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
3834 x86_jump8 (code, 0);
3835 x86_patch (unordered_check, code);
3836 x86_inc_reg (code, ins->dreg);
3837 x86_patch (jump_to_end, code);
3839 x86_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
3843 if (ins->dreg != X86_EAX)
3844 x86_push_reg (code, X86_EAX);
3846 EMIT_FPCOMPARE(code);
3847 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3848 if (ins->opcode == OP_FCLT_UN) {
3849 guchar *is_not_zero_check, *end_jump;
3850 is_not_zero_check = code;
3851 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3853 x86_jump8 (code, 0);
3854 x86_patch (is_not_zero_check, code);
3855 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3857 x86_patch (end_jump, code);
3859 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3860 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3862 if (ins->dreg != X86_EAX)
3863 x86_pop_reg (code, X86_EAX);
3867 if (cfg->opt & MONO_OPT_FCMOV) {
3868 /* zeroing the register at the start results in
3869 * shorter and faster code (we can also remove the widening op)
3871 guchar *unordered_check;
3872 x86_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
3873 x86_fcomip (code, 1);
3875 if (ins->opcode == OP_FCGT) {
3876 unordered_check = code;
3877 x86_branch8 (code, X86_CC_P, 0, FALSE);
3878 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
3879 x86_patch (unordered_check, code);
3881 x86_set_reg (code, X86_CC_LT, ins->dreg, FALSE);
3885 if (ins->dreg != X86_EAX)
3886 x86_push_reg (code, X86_EAX);
3888 EMIT_FPCOMPARE(code);
3889 x86_alu_reg_imm (code, X86_AND, X86_EAX, X86_FP_CC_MASK);
3890 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3891 if (ins->opcode == OP_FCGT_UN) {
3892 guchar *is_not_zero_check, *end_jump;
3893 is_not_zero_check = code;
3894 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3896 x86_jump8 (code, 0);
3897 x86_patch (is_not_zero_check, code);
3898 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3900 x86_patch (end_jump, code);
3902 x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
3903 x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
3905 if (ins->dreg != X86_EAX)
3906 x86_pop_reg (code, X86_EAX);
3909 if (cfg->opt & MONO_OPT_FCMOV) {
3910 guchar *jump = code;
3911 x86_branch8 (code, X86_CC_P, 0, TRUE);
3912 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3913 x86_patch (jump, code);
3916 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
3917 EMIT_COND_BRANCH (ins, X86_CC_EQ, TRUE);
3920 /* Branch if C013 != 100 */
3921 if (cfg->opt & MONO_OPT_FCMOV) {
3922 /* branch if !ZF or (PF|CF) */
3923 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3924 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3925 EMIT_COND_BRANCH (ins, X86_CC_B, FALSE);
3928 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C3);
3929 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
3932 if (cfg->opt & MONO_OPT_FCMOV) {
3933 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
3936 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3939 if (cfg->opt & MONO_OPT_FCMOV) {
3940 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
3941 EMIT_COND_BRANCH (ins, X86_CC_GT, FALSE);
3944 if (ins->opcode == OP_FBLT_UN) {
3945 guchar *is_not_zero_check, *end_jump;
3946 is_not_zero_check = code;
3947 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3949 x86_jump8 (code, 0);
3950 x86_patch (is_not_zero_check, code);
3951 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3953 x86_patch (end_jump, code);
3955 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3959 if (cfg->opt & MONO_OPT_FCMOV) {
3960 EMIT_COND_BRANCH (ins, X86_CC_LT, FALSE);
3963 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3964 if (ins->opcode == OP_FBGT_UN) {
3965 guchar *is_not_zero_check, *end_jump;
3966 is_not_zero_check = code;
3967 x86_branch8 (code, X86_CC_NZ, 0, TRUE);
3969 x86_jump8 (code, 0);
3970 x86_patch (is_not_zero_check, code);
3971 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_CC_MASK);
3973 x86_patch (end_jump, code);
3975 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3978 /* Branch if C013 == 100 or 001 */
3979 if (cfg->opt & MONO_OPT_FCMOV) {
3982 /* skip branch if C1=1 */
3984 x86_branch8 (code, X86_CC_P, 0, FALSE);
3985 /* branch if (C0 | C3) = 1 */
3986 EMIT_COND_BRANCH (ins, X86_CC_BE, FALSE);
3987 x86_patch (br1, code);
3990 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
3991 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3992 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C3);
3993 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
3996 /* Branch if C013 == 000 */
3997 if (cfg->opt & MONO_OPT_FCMOV) {
3998 EMIT_COND_BRANCH (ins, X86_CC_LE, FALSE);
4001 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
4004 /* Branch if C013=000 or 100 */
4005 if (cfg->opt & MONO_OPT_FCMOV) {
4008 /* skip branch if C1=1 */
4010 x86_branch8 (code, X86_CC_P, 0, FALSE);
4011 /* branch if C0=0 */
4012 EMIT_COND_BRANCH (ins, X86_CC_NB, FALSE);
4013 x86_patch (br1, code);
4016 x86_alu_reg_imm (code, X86_AND, X86_EAX, (X86_FP_C0|X86_FP_C1));
4017 x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0);
4018 EMIT_COND_BRANCH (ins, X86_CC_EQ, FALSE);
4021 /* Branch if C013 != 001 */
4022 if (cfg->opt & MONO_OPT_FCMOV) {
4023 EMIT_COND_BRANCH (ins, X86_CC_P, FALSE);
4024 EMIT_COND_BRANCH (ins, X86_CC_GE, FALSE);
4027 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
4028 EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
4030 case CEE_CKFINITE: {
4031 x86_push_reg (code, X86_EAX);
4034 x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4100);
4035 x86_alu_reg_imm (code, X86_CMP, X86_EAX, X86_FP_C0);
4036 x86_pop_reg (code, X86_EAX);
4037 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_EQ, FALSE, "ArithmeticException");
4041 code = emit_tls_get (code, ins->dreg, ins->inst_offset);
4044 case OP_ATOMIC_ADD_I4: {
4045 int dreg = ins->dreg;
4047 if (dreg == ins->inst_basereg) {
4048 x86_push_reg (code, ins->sreg2);
4052 if (dreg != ins->sreg2)
4053 x86_mov_reg_reg (code, ins->dreg, ins->sreg2, 4);
4055 x86_prefix (code, X86_LOCK_PREFIX);
4056 x86_xadd_membase_reg (code, ins->inst_basereg, ins->inst_offset, dreg, 4);
4058 if (dreg != ins->dreg) {
4059 x86_mov_reg_reg (code, ins->dreg, dreg, 4);
4060 x86_pop_reg (code, dreg);
4065 case OP_ATOMIC_ADD_NEW_I4: {
4066 int dreg = ins->dreg;
4068 /* hack: limit in regalloc, dreg != sreg1 && dreg != sreg2 */
4069 if (ins->sreg2 == dreg) {
4070 if (dreg == X86_EBX) {
4072 if (ins->inst_basereg == X86_EDI)
4076 if (ins->inst_basereg == X86_EBX)
4079 } else if (ins->inst_basereg == dreg) {
4080 if (dreg == X86_EBX) {
4082 if (ins->sreg2 == X86_EDI)
4086 if (ins->sreg2 == X86_EBX)
4091 if (dreg != ins->dreg) {
4092 x86_push_reg (code, dreg);
4095 x86_mov_reg_reg (code, dreg, ins->sreg2, 4);
4096 x86_prefix (code, X86_LOCK_PREFIX);
4097 x86_xadd_membase_reg (code, ins->inst_basereg, ins->inst_offset, dreg, 4);
4098 /* dreg contains the old value, add with sreg2 value */
4099 x86_alu_reg_reg (code, X86_ADD, dreg, ins->sreg2);
4101 if (ins->dreg != dreg) {
4102 x86_mov_reg_reg (code, ins->dreg, dreg, 4);
4103 x86_pop_reg (code, dreg);
4108 case OP_ATOMIC_EXCHANGE_I4: {
4110 int sreg2 = ins->sreg2;
4111 int breg = ins->inst_basereg;
4113 /* cmpxchg uses eax as comperand, need to make sure we can use it
4114 * hack to overcome limits in x86 reg allocator
4115 * (req: dreg == eax and sreg2 != eax and breg != eax)
4117 if (ins->dreg != X86_EAX)
4118 x86_push_reg (code, X86_EAX);
4120 /* We need the EAX reg for the cmpxchg */
4121 if (ins->sreg2 == X86_EAX) {
4122 x86_push_reg (code, X86_EDX);
4123 x86_mov_reg_reg (code, X86_EDX, X86_EAX, 4);
4127 if (breg == X86_EAX) {
4128 x86_push_reg (code, X86_ESI);
4129 x86_mov_reg_reg (code, X86_ESI, X86_EAX, 4);
4133 x86_mov_reg_membase (code, X86_EAX, breg, ins->inst_offset, 4);
4135 br [0] = code; x86_prefix (code, X86_LOCK_PREFIX);
4136 x86_cmpxchg_membase_reg (code, breg, ins->inst_offset, sreg2);
4137 br [1] = code; x86_branch8 (code, X86_CC_NE, -1, FALSE);
4138 x86_patch (br [1], br [0]);
4140 if (breg != ins->inst_basereg)
4141 x86_pop_reg (code, X86_ESI);
4143 if (ins->dreg != X86_EAX) {
4144 x86_mov_reg_reg (code, ins->dreg, X86_EAX, 4);
4145 x86_pop_reg (code, X86_EAX);
4148 if (ins->sreg2 != sreg2)
4149 x86_pop_reg (code, X86_EDX);
4154 g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
4155 g_assert_not_reached ();
4158 if ((code - cfg->native_code - offset) > max_len) {
4159 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
4160 mono_inst_name (ins->opcode), max_len, code - cfg->native_code - offset);
4161 g_assert_not_reached ();
4167 last_offset = offset;
4172 cfg->code_len = code - cfg->native_code;
4176 mono_arch_register_lowlevel_calls (void)
4181 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
4183 MonoJumpInfo *patch_info;
4184 gboolean compile_aot = !run_cctors;
4186 for (patch_info = ji; patch_info; patch_info = patch_info->next) {
4187 unsigned char *ip = patch_info->ip.i + code;
4188 const unsigned char *target;
4190 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
4193 switch (patch_info->type) {
4194 case MONO_PATCH_INFO_BB:
4195 case MONO_PATCH_INFO_LABEL:
4198 /* No need to patch these */
4203 switch (patch_info->type) {
4204 case MONO_PATCH_INFO_IP:
4205 *((gconstpointer *)(ip)) = target;
4207 case MONO_PATCH_INFO_CLASS_INIT: {
4209 /* Might already been changed to a nop */
4210 x86_call_code (code, 0);
4211 x86_patch (ip, target);
4214 case MONO_PATCH_INFO_ABS:
4215 case MONO_PATCH_INFO_METHOD:
4216 case MONO_PATCH_INFO_METHOD_JUMP:
4217 case MONO_PATCH_INFO_INTERNAL_METHOD:
4218 case MONO_PATCH_INFO_BB:
4219 case MONO_PATCH_INFO_LABEL:
4220 x86_patch (ip, target);
4222 case MONO_PATCH_INFO_NONE:
4225 guint32 offset = mono_arch_get_patch_offset (ip);
4226 *((gconstpointer *)(ip + offset)) = target;
4234 mono_arch_emit_prolog (MonoCompile *cfg)
4236 MonoMethod *method = cfg->method;
4238 MonoMethodSignature *sig;
4240 int alloc_size, pos, max_offset, i;
4243 cfg->code_size = MAX (mono_method_get_header (method)->code_size * 4, 256);
4244 code = cfg->native_code = g_malloc (cfg->code_size);
4246 x86_push_reg (code, X86_EBP);
4247 x86_mov_reg_reg (code, X86_EBP, X86_ESP, 4);
4249 alloc_size = - cfg->stack_offset;
4252 if (method->wrapper_type == MONO_WRAPPER_NATIVE_TO_MANAGED) {
4253 /* Might need to attach the thread to the JIT */
4254 if (lmf_tls_offset != -1) {
4257 code = emit_tls_get ( code, X86_EAX, lmf_tls_offset);
4258 #ifdef PLATFORM_WIN32
4259 /* The TLS key actually contains a pointer to the MonoJitTlsData structure */
4260 /* FIXME: Add a separate key for LMF to avoid this */
4261 x86_alu_reg_imm (code, X86_ADD, X86_EAX, G_STRUCT_OFFSET (MonoJitTlsData, lmf));
4263 x86_test_reg_reg (code, X86_EAX, X86_EAX);
4265 x86_branch8 (code, X86_CC_NE, 0, 0);
4266 x86_push_imm (code, cfg->domain);
4267 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_jit_thread_attach");
4268 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
4269 x86_patch (buf, code);
4272 g_assert (!cfg->compile_aot);
4273 x86_push_imm (code, cfg->domain);
4274 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_jit_thread_attach");
4275 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
4279 if (method->save_lmf) {
4280 pos += sizeof (MonoLMF);
4282 /* save the current IP */
4283 mono_add_patch_info (cfg, code + 1 - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
4284 x86_push_imm_template (code);
4286 /* save all caller saved regs */
4287 x86_push_reg (code, X86_EBP);
4288 x86_push_reg (code, X86_ESI);
4289 x86_push_reg (code, X86_EDI);
4290 x86_push_reg (code, X86_EBX);
4292 /* save method info */
4293 x86_push_imm (code, method);
4295 /* get the address of lmf for the current thread */
4297 * This is performance critical so we try to use some tricks to make
4300 if (lmf_tls_offset != -1) {
4301 /* Load lmf quicky using the GS register */
4302 code = emit_tls_get (code, X86_EAX, lmf_tls_offset);
4303 #ifdef PLATFORM_WIN32
4304 /* The TLS key actually contains a pointer to the MonoJitTlsData structure */
4305 /* FIXME: Add a separate key for LMF to avoid this */
4306 x86_alu_reg_imm (code, X86_ADD, X86_EAX, G_STRUCT_OFFSET (MonoJitTlsData, lmf));
4310 if (cfg->compile_aot) {
4311 /* The GOT var does not exist yet */
4312 x86_call_imm (code, 0);
4313 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_GOT_OFFSET, NULL);
4314 x86_pop_reg (code, X86_EAX);
4315 x86_alu_reg_imm (code, X86_ADD, X86_EAX, 0);
4316 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_get_lmf_addr");
4317 x86_call_membase (code, X86_EAX, 0xf0f0f0f0);
4320 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, (gpointer)"mono_get_lmf_addr");
4324 x86_push_reg (code, X86_EAX);
4325 /* push *lfm (previous_lmf) */
4326 x86_push_membase (code, X86_EAX, 0);
4328 x86_mov_membase_reg (code, X86_EAX, 0, X86_ESP, 4);
4331 if (cfg->used_int_regs & (1 << X86_EBX)) {
4332 x86_push_reg (code, X86_EBX);
4336 if (cfg->used_int_regs & (1 << X86_EDI)) {
4337 x86_push_reg (code, X86_EDI);
4341 if (cfg->used_int_regs & (1 << X86_ESI)) {
4342 x86_push_reg (code, X86_ESI);
4350 /* See mono_emit_stack_alloc */
4351 #if defined(PLATFORM_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
4352 guint32 remaining_size = alloc_size;
4353 while (remaining_size >= 0x1000) {
4354 x86_alu_reg_imm (code, X86_SUB, X86_ESP, 0x1000);
4355 x86_test_membase_reg (code, X86_ESP, 0, X86_ESP);
4356 remaining_size -= 0x1000;
4359 x86_alu_reg_imm (code, X86_SUB, X86_ESP, remaining_size);
4361 x86_alu_reg_imm (code, X86_SUB, X86_ESP, alloc_size);
4365 /* compute max_offset in order to use short forward jumps */
4367 if (cfg->opt & MONO_OPT_BRANCH) {
4368 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
4369 MonoInst *ins = bb->code;
4370 bb->max_offset = max_offset;
4372 if (cfg->prof_options & MONO_PROFILE_COVERAGE)
4374 /* max alignment for loops */
4375 if ((cfg->opt & MONO_OPT_LOOP) && bb_is_loop_start (bb))
4376 max_offset += LOOP_ALIGNMENT;
4379 if (ins->opcode == OP_LABEL)
4380 ins->inst_c1 = max_offset;
4382 max_offset += ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
4388 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4389 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
4391 /* load arguments allocated to register from the stack */
4392 sig = mono_method_signature (method);
4395 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
4396 inst = cfg->varinfo [pos];
4397 if (inst->opcode == OP_REGVAR) {
4398 x86_mov_reg_membase (code, inst->dreg, X86_EBP, inst->inst_offset, 4);
4399 if (cfg->verbose_level > 2)
4400 g_print ("Argument %d assigned to register %s\n", pos, mono_arch_regname (inst->dreg));
4405 cfg->code_len = code - cfg->native_code;
4411 mono_arch_emit_epilog (MonoCompile *cfg)
4413 MonoMethod *method = cfg->method;
4414 MonoMethodSignature *sig = mono_method_signature (method);
4416 guint32 stack_to_pop;
4418 int max_epilog_size = 16;
4421 if (cfg->method->save_lmf)
4422 max_epilog_size += 128;
4424 if (mono_jit_trace_calls != NULL)
4425 max_epilog_size += 50;
4427 while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
4428 cfg->code_size *= 2;
4429 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4430 mono_jit_stats.code_reallocs++;
4433 code = cfg->native_code + cfg->code_len;
4435 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4436 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
4438 /* the code restoring the registers must be kept in sync with CEE_JMP */
4441 if (method->save_lmf) {
4442 gint32 prev_lmf_reg;
4444 /* Find a spare register */
4445 switch (sig->ret->type) {
4448 prev_lmf_reg = X86_EDI;
4449 cfg->used_int_regs |= (1 << X86_EDI);
4452 prev_lmf_reg = X86_EDX;
4456 /* reg = previous_lmf */
4457 x86_mov_reg_membase (code, prev_lmf_reg, X86_EBP, -32, 4);
4460 x86_mov_reg_membase (code, X86_ECX, X86_EBP, -28, 4);
4462 /* *(lmf) = previous_lmf */
4463 x86_mov_membase_reg (code, X86_ECX, 0, prev_lmf_reg, 4);
4465 /* restore caller saved regs */
4466 if (cfg->used_int_regs & (1 << X86_EBX)) {
4467 x86_mov_reg_membase (code, X86_EBX, X86_EBP, -20, 4);
4470 if (cfg->used_int_regs & (1 << X86_EDI)) {
4471 x86_mov_reg_membase (code, X86_EDI, X86_EBP, -16, 4);
4473 if (cfg->used_int_regs & (1 << X86_ESI)) {
4474 x86_mov_reg_membase (code, X86_ESI, X86_EBP, -12, 4);
4477 /* EBP is restored by LEAVE */
4479 if (cfg->used_int_regs & (1 << X86_EBX)) {
4482 if (cfg->used_int_regs & (1 << X86_EDI)) {
4485 if (cfg->used_int_regs & (1 << X86_ESI)) {
4490 x86_lea_membase (code, X86_ESP, X86_EBP, pos);
4492 if (cfg->used_int_regs & (1 << X86_ESI)) {
4493 x86_pop_reg (code, X86_ESI);
4495 if (cfg->used_int_regs & (1 << X86_EDI)) {
4496 x86_pop_reg (code, X86_EDI);
4498 if (cfg->used_int_regs & (1 << X86_EBX)) {
4499 x86_pop_reg (code, X86_EBX);
4503 /* Load returned vtypes into registers if needed */
4504 cinfo = get_call_info (sig, FALSE);
4505 if (cinfo->ret.storage == ArgValuetypeInReg) {
4506 for (quad = 0; quad < 2; quad ++) {
4507 switch (cinfo->ret.pair_storage [quad]) {
4509 x86_mov_reg_membase (code, cinfo->ret.pair_regs [quad], cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), 4);
4511 case ArgOnFloatFpStack:
4512 x86_fld_membase (code, cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), FALSE);
4514 case ArgOnDoubleFpStack:
4515 x86_fld_membase (code, cfg->ret->inst_basereg, cfg->ret->inst_offset + (quad * sizeof (gpointer)), TRUE);
4520 g_assert_not_reached ();
4527 if (CALLCONV_IS_STDCALL (sig)) {
4528 MonoJitArgumentInfo *arg_info = alloca (sizeof (MonoJitArgumentInfo) * (sig->param_count + 1));
4530 stack_to_pop = mono_arch_get_argument_info (sig, sig->param_count, arg_info);
4531 } else if (MONO_TYPE_ISSTRUCT (mono_method_signature (cfg->method)->ret) && (cinfo->ret.storage == ArgOnStack))
4537 x86_ret_imm (code, stack_to_pop);
4543 cfg->code_len = code - cfg->native_code;
4545 g_assert (cfg->code_len < cfg->code_size);
4549 mono_arch_emit_exceptions (MonoCompile *cfg)
4551 MonoJumpInfo *patch_info;
4554 MonoClass *exc_classes [16];
4555 guint8 *exc_throw_start [16], *exc_throw_end [16];
4559 /* Compute needed space */
4560 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4561 if (patch_info->type == MONO_PATCH_INFO_EXC)
4566 * make sure we have enough space for exceptions
4567 * 16 is the size of two push_imm instructions and a call
4569 if (cfg->compile_aot)
4570 code_size = exc_count * 32;
4572 code_size = exc_count * 16;
4574 while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4575 cfg->code_size *= 2;
4576 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4577 mono_jit_stats.code_reallocs++;
4580 code = cfg->native_code + cfg->code_len;
4583 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4584 switch (patch_info->type) {
4585 case MONO_PATCH_INFO_EXC: {
4586 MonoClass *exc_class;
4590 x86_patch (patch_info->ip.i + cfg->native_code, code);
4592 exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4593 g_assert (exc_class);
4594 throw_ip = patch_info->ip.i;
4596 /* Find a throw sequence for the same exception class */
4597 for (i = 0; i < nthrows; ++i)
4598 if (exc_classes [i] == exc_class)
4601 x86_push_imm (code, (exc_throw_end [i] - cfg->native_code) - throw_ip);
4602 x86_jump_code (code, exc_throw_start [i]);
4603 patch_info->type = MONO_PATCH_INFO_NONE;
4606 guint32 got_reg = X86_EAX;
4609 /* Compute size of code following the push <OFFSET> */
4610 if (cfg->compile_aot) {
4614 else if (cfg->got_var->opcode == OP_REGOFFSET)
4620 if ((code - cfg->native_code) - throw_ip < 126 - size) {
4621 /* Use the shorter form */
4623 x86_push_imm (code, 0);
4627 x86_push_imm (code, 0xf0f0f0f0);
4632 exc_classes [nthrows] = exc_class;
4633 exc_throw_start [nthrows] = code;
4636 if (cfg->compile_aot) {
4638 * Since the patches are generated by the back end, there is * no way to generate a got_var at this point.
4640 if (!cfg->got_var) {
4641 x86_call_imm (code, 0);
4642 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_GOT_OFFSET, NULL);
4643 x86_pop_reg (code, X86_EAX);
4644 x86_alu_reg_imm (code, X86_ADD, X86_EAX, 0);
4647 if (cfg->got_var->opcode == OP_REGOFFSET)
4648 x86_mov_reg_membase (code, X86_EAX, cfg->got_var->inst_basereg, cfg->got_var->inst_offset, 4);
4650 got_reg = cfg->got_var->dreg;
4654 x86_push_imm (code, exc_class->type_token);
4655 patch_info->data.name = "mono_arch_throw_corlib_exception";
4656 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4657 patch_info->ip.i = code - cfg->native_code;
4658 if (cfg->compile_aot)
4659 x86_call_membase (code, got_reg, 0xf0f0f0f0);
4661 x86_call_code (code, 0);
4662 x86_push_imm (buf, (code - cfg->native_code) - throw_ip);
4667 exc_throw_end [nthrows] = code;
4679 cfg->code_len = code - cfg->native_code;
4681 g_assert (cfg->code_len < cfg->code_size);
4685 mono_arch_flush_icache (guint8 *code, gint size)
4691 mono_arch_flush_register_windows (void)
4695 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4698 setup_stack (MonoJitTlsData *tls)
4700 pthread_t self = pthread_self();
4701 pthread_attr_t attr;
4703 struct sigaltstack sa;
4704 guint8 *staddr = NULL;
4705 guint8 *current = (guint8*)&staddr;
4707 if (mono_running_on_valgrind ())
4710 /* Determine stack boundaries */
4711 pthread_attr_init( &attr );
4712 #ifdef HAVE_PTHREAD_GETATTR_NP
4713 pthread_getattr_np( self, &attr );
4715 #ifdef HAVE_PTHREAD_ATTR_GET_NP
4716 pthread_attr_get_np( self, &attr );
4718 pthread_attr_getstacksize( &attr, &stsize );
4720 #error "Not implemented"
4724 pthread_attr_getstack( &attr, (void**)&staddr, &stsize );
4729 g_assert ((current > staddr) && (current < staddr + stsize));
4731 tls->end_of_stack = staddr + stsize;
4734 * threads created by nptl does not seem to have a guard page, and
4735 * since the main thread is not created by us, we can't even set one.
4736 * Increasing stsize fools the SIGSEGV signal handler into thinking this
4737 * is a stack overflow exception.
4739 tls->stack_size = stsize + getpagesize ();
4741 /* Setup an alternate signal stack */
4742 tls->signal_stack = mmap (0, SIGNAL_STACK_SIZE, PROT_READ|PROT_WRITE|PROT_EXEC, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0);
4743 tls->signal_stack_size = SIGNAL_STACK_SIZE;
4745 g_assert (tls->signal_stack);
4747 sa.ss_sp = tls->signal_stack;
4748 sa.ss_size = SIGNAL_STACK_SIZE;
4749 sa.ss_flags = SS_ONSTACK;
4750 sigaltstack (&sa, NULL);
4756 * Support for fast access to the thread-local lmf structure using the GS
4757 * segment register on NPTL + kernel 2.6.x.
4760 static gboolean tls_offset_inited = FALSE;
4763 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
4765 if (!tls_offset_inited) {
4766 if (!getenv ("MONO_NO_TLS")) {
4767 #ifdef PLATFORM_WIN32
4769 * We need to init this multiple times, since when we are first called, the key might not
4770 * be initialized yet.
4772 appdomain_tls_offset = mono_domain_get_tls_key ();
4773 lmf_tls_offset = mono_get_jit_tls_key ();
4774 thread_tls_offset = mono_thread_get_tls_key ();
4776 /* Only 64 tls entries can be accessed using inline code */
4777 if (appdomain_tls_offset >= 64)
4778 appdomain_tls_offset = -1;
4779 if (lmf_tls_offset >= 64)
4780 lmf_tls_offset = -1;
4781 if (thread_tls_offset >= 64)
4782 thread_tls_offset = -1;
4784 tls_offset_inited = TRUE;
4785 appdomain_tls_offset = mono_domain_get_tls_offset ();
4786 lmf_tls_offset = mono_get_lmf_tls_offset ();
4787 thread_tls_offset = mono_thread_get_tls_offset ();
4792 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4798 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4800 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4801 struct sigaltstack sa;
4803 sa.ss_sp = tls->signal_stack;
4804 sa.ss_size = SIGNAL_STACK_SIZE;
4805 sa.ss_flags = SS_DISABLE;
4806 sigaltstack (&sa, NULL);
4808 if (tls->signal_stack)
4809 munmap (tls->signal_stack, SIGNAL_STACK_SIZE);
4814 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, int this_reg, int this_type, int vt_reg)
4817 /* add the this argument */
4818 if (this_reg != -1) {
4820 MONO_INST_NEW (cfg, this, OP_OUTARG);
4821 this->type = this_type;
4822 this->sreg1 = this_reg;
4823 mono_bblock_add_inst (cfg->cbb, this);
4827 CallInfo * cinfo = get_call_info (inst->signature, FALSE);
4830 if (cinfo->ret.storage == ArgValuetypeInReg) {
4832 * The valuetype is in EAX:EDX after the call, needs to be copied to
4833 * the stack. Save the address here, so the call instruction can
4836 MONO_INST_NEW (cfg, vtarg, OP_STORE_MEMBASE_REG);
4837 vtarg->inst_destbasereg = X86_ESP;
4838 vtarg->inst_offset = inst->stack_usage;
4839 vtarg->sreg1 = vt_reg;
4840 mono_bblock_add_inst (cfg->cbb, vtarg);
4844 MONO_INST_NEW (cfg, vtarg, OP_OUTARG);
4845 vtarg->type = STACK_MP;
4846 vtarg->sreg1 = vt_reg;
4847 mono_bblock_add_inst (cfg->cbb, vtarg);
4856 mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4858 MonoInst *ins = NULL;
4860 if (cmethod->klass == mono_defaults.math_class) {
4861 if (strcmp (cmethod->name, "Sin") == 0) {
4862 MONO_INST_NEW (cfg, ins, OP_SIN);
4863 ins->inst_i0 = args [0];
4864 } else if (strcmp (cmethod->name, "Cos") == 0) {
4865 MONO_INST_NEW (cfg, ins, OP_COS);
4866 ins->inst_i0 = args [0];
4867 } else if (strcmp (cmethod->name, "Tan") == 0) {
4868 MONO_INST_NEW (cfg, ins, OP_TAN);
4869 ins->inst_i0 = args [0];
4870 } else if (strcmp (cmethod->name, "Atan") == 0) {
4871 MONO_INST_NEW (cfg, ins, OP_ATAN);
4872 ins->inst_i0 = args [0];
4873 } else if (strcmp (cmethod->name, "Sqrt") == 0) {
4874 MONO_INST_NEW (cfg, ins, OP_SQRT);
4875 ins->inst_i0 = args [0];
4876 } else if (strcmp (cmethod->name, "Abs") == 0 && fsig->params [0]->type == MONO_TYPE_R8) {
4877 MONO_INST_NEW (cfg, ins, OP_ABS);
4878 ins->inst_i0 = args [0];
4881 /* OP_FREM is not IEEE compatible */
4882 else if (strcmp (cmethod->name, "IEEERemainder") == 0) {
4883 MONO_INST_NEW (cfg, ins, OP_FREM);
4884 ins->inst_i0 = args [0];
4885 ins->inst_i1 = args [1];
4888 } else if(cmethod->klass->image == mono_defaults.corlib &&
4889 (strcmp (cmethod->klass->name_space, "System.Threading") == 0) &&
4890 (strcmp (cmethod->klass->name, "Interlocked") == 0)) {
4892 if (strcmp (cmethod->name, "Increment") == 0 && fsig->params [0]->type == MONO_TYPE_I4) {
4893 MonoInst *ins_iconst;
4895 MONO_INST_NEW (cfg, ins, OP_ATOMIC_ADD_NEW_I4);
4896 MONO_INST_NEW (cfg, ins_iconst, OP_ICONST);
4897 ins_iconst->inst_c0 = 1;
4899 ins->inst_i0 = args [0];
4900 ins->inst_i1 = ins_iconst;
4901 } else if (strcmp (cmethod->name, "Decrement") == 0 && fsig->params [0]->type == MONO_TYPE_I4) {
4902 MonoInst *ins_iconst;
4904 MONO_INST_NEW (cfg, ins, OP_ATOMIC_ADD_NEW_I4);
4905 MONO_INST_NEW (cfg, ins_iconst, OP_ICONST);
4906 ins_iconst->inst_c0 = -1;
4908 ins->inst_i0 = args [0];
4909 ins->inst_i1 = ins_iconst;
4910 } else if (strcmp (cmethod->name, "Exchange") == 0 && fsig->params [0]->type == MONO_TYPE_I4) {
4911 MONO_INST_NEW (cfg, ins, OP_ATOMIC_EXCHANGE_I4);
4913 ins->inst_i0 = args [0];
4914 ins->inst_i1 = args [1];
4915 } else if (strcmp (cmethod->name, "Add") == 0 && fsig->params [0]->type == MONO_TYPE_I4) {
4916 MONO_INST_NEW (cfg, ins, OP_ATOMIC_ADD_I4);
4918 ins->inst_i0 = args [0];
4919 ins->inst_i1 = args [1];
4928 mono_arch_print_tree (MonoInst *tree, int arity)
4933 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
4937 if (appdomain_tls_offset == -1)
4940 MONO_INST_NEW (cfg, ins, OP_TLS_GET);
4941 ins->inst_offset = appdomain_tls_offset;
4945 MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
4949 if (thread_tls_offset == -1)
4952 MONO_INST_NEW (cfg, ins, OP_TLS_GET);
4953 ins->inst_offset = thread_tls_offset;
4958 mono_arch_get_patch_offset (guint8 *code)
4960 if ((code [0] == 0x8b) && (x86_modrm_mod (code [1]) == 0x2))
4962 else if ((code [0] == 0xba))
4964 else if ((code [0] == 0x68))
4967 else if ((code [0] == 0xff) && (x86_modrm_reg (code [1]) == 0x6))
4968 /* push <OFFSET>(<REG>) */
4970 else if ((code [0] == 0xff) && (x86_modrm_reg (code [1]) == 0x2))
4971 /* call *<OFFSET>(<REG>) */
4973 else if ((code [0] == 0xdd) || (code [0] == 0xd9))
4976 else if ((code [0] == 0x58) && (code [1] == 0x05))
4977 /* pop %eax; add <OFFSET>, %eax */
4979 else if ((code [0] >= 0x58) && (code [0] <= 0x58 + X86_NREG) && (code [1] == 0x81))
4980 /* pop <REG>; add <OFFSET>, <REG> */
4983 g_assert_not_reached ();
4989 mono_arch_get_vcall_slot_addr (guint8 *code, gpointer *regs)
4994 /* go to the start of the call instruction
4996 * address_byte = (m << 6) | (o << 3) | reg
4997 * call opcode: 0xff address_byte displacement
4999 * 0xff m=2,o=2 imm32
5002 if ((code [1] != 0xe8) && (code [3] == 0xff) && ((code [4] & 0x18) == 0x10) && ((code [4] >> 6) == 1)) {
5003 reg = code [4] & 0x07;
5004 disp = (signed char)code [5];
5006 if ((code [0] == 0xff) && ((code [1] & 0x18) == 0x10) && ((code [1] >> 6) == 2)) {
5007 reg = code [1] & 0x07;
5008 disp = *((gint32*)(code + 2));
5009 } else if ((code [1] == 0xe8)) {
5011 } else if ((code [4] == 0xff) && (((code [5] >> 6) & 0x3) == 0) && (((code [5] >> 3) & 0x7) == 2)) {
5013 * This is a interface call: should check the above code can't catch it earlier
5014 * 8b 40 30 mov 0x30(%eax),%eax
5015 * ff 10 call *(%eax)
5018 reg = code [5] & 0x07;
5024 return (gpointer*)(((gint32)(regs [reg])) + disp);
5028 mono_arch_get_delegate_method_ptr_addr (guint8* code, gpointer *regs)
5034 if ((code [0] == 0x8b) && (x86_modrm_mod (code [1]) == 3) && (x86_modrm_reg (code [1]) == X86_EAX) && (code [2] == 0x8b) && (code [3] == 0x40) && (code [5] == 0xff) && (code [6] == 0xd0)) {
5035 reg = x86_modrm_rm (code [1]);
5041 return (gpointer*)(((gint32)(regs [reg])) + disp);