mono/mini/mini-sparc.c

   1 /*
   2  * mini-sparc.c: Sparc backend for the Mono code generator
   3  *
   4  * Authors:
   5  *   Paolo Molaro (lupus@ximian.com)
   6  *   Dietmar Maurer (dietmar@ximian.com)
   7  *
   8  * Modified for SPARC:
   9  *   Christopher Taylor (ct@gentoo.org)
  10  *   Mark Crichton (crichton@gimp.org)
  11  *   Zoltan Varga (vargaz@freemail.hu)
  12  *
  13  * (C) 2003 Ximian, Inc.
  14  */
  15 #include "mini.h"
  16 #include <string.h>
  17 #include <pthread.h>
  18 #include <unistd.h>
  19
  20 #ifndef __linux__
  21 #include <sys/systeminfo.h>
  22 #include <thread.h>
  23 #endif
  24
  25 #include <unistd.h>
  26 #include <sys/mman.h>
  27
  28 #include <mono/metadata/appdomain.h>
  29 #include <mono/metadata/debug-helpers.h>
  30 #include <mono/metadata/tokentype.h>
  31 #include <mono/utils/mono-math.h>
  32
  33 #include "mini-sparc.h"
  34 #include "inssel.h"
  35 #include "trace.h"
  36 #include "cpu-sparc.h"
  37
  38 /*
  39  * Sparc V9 means two things:
  40  * - the instruction set
  41  * - the ABI
  42  *
  43  * V9 instructions are only usable if the underlying processor is 64 bit. Most Sparc
  44  * processors in use are 64 bit processors. The V9 ABI is only usable if the
  45  * mono executable is a 64 bit executable. So it would make sense to use the 64 bit
  46  * instructions without using the 64 bit ABI.
  47  */
  48
  49 /*
  50  * Register usage:
  51  * - %i0..%i<n> hold the incoming arguments, these are never written by JITted
  52  * code. Unused input registers are used for global register allocation.
  53  * - %o0..%o5 and %l7 is used for local register allocation and passing arguments
  54  * - %l0..%l6 is used for global register allocation
  55  * - %o7 and %g1 is used as scratch registers in opcodes
  56  * - all floating point registers are used for local register allocation except %f0.
  57  *   Only double precision registers are used.
  58  * In 64 bit mode:
  59  * - fp registers %d0..%d30 are used for parameter passing, and %d32..%d62 are
  60  *   used for local allocation.
  61  */
  62
  63 /*
  64  * Alignment:
  65  * - doubles and longs must be stored in dword aligned locations
  66  */
  67
  68 /*
  69  * The following things are not implemented or do not work:
  70  *  - some fp arithmetic corner cases
  71  * The following tests in mono/mini are expected to fail:
  72  *  - test_0_simple_double_casts
  73  *      This test casts (guint64)-1 to double and then back to guint64 again.
  74  *    Under x86, it returns 0, while under sparc it returns -1.
  75  *
  76  * In addition to this, the runtime requires the trunc function, or its
  77  * solaris counterpart, aintl, to do some double->int conversions. If this
  78  * function is not available, it is emulated somewhat, but the results can be
  79  * strange.
  80  */
  81
  82 /*
  83  * SPARCV9 FIXME:
  84  * - optimize sparc_set according to the memory model
  85  * - when non-AOT compiling, compute patch targets immediately so we don't
  86  *   have to emit the 6 byte template.
  87  * - varags
  88  * - struct arguments/returns
  89  */
  90
  91 /*
  92  * SPARCV9 ISSUES:
  93  * - sparc_call_simple can't be used in a lot of places since the displacement
  94  *   might not fit into an imm30.
  95  * - g1 can't be used in a lot of places since it is used as a scratch reg in
  96  *   sparc_set.
  97  * - sparc_f0 can't be used as a scratch register on V9
  98  * - the %d34..%d62 fp registers are encoded as: %dx = %f(x - 32 + 1), ie.
  99  *   %d36 = %f5.
 100  * - ldind.i4/u4 needs to sign extend/clear out upper word -> slows things down
 101  * - ins->dreg can't be used as a scatch register in r4 opcodes since it might
 102  *   be a double precision register which has no single precision part.
 103  * - passing/returning structs is hard to implement, because:
 104  *   - the spec is very hard to understand
 105  *   - it requires knowledge about the fields of structure, needs to handle
 106  *     nested structures etc.
 107  */
 108
 109 /*
 110  * Possible optimizations:
 111  * - delay slot scheduling
 112  * - allocate large constants to registers
 113  * - add more mul/div/rem optimizations
 114  */
 115
 116 #ifndef __linux__
 117 #define MONO_SPARC_THR_TLS 1
 118 #endif
 119
 120 /*
 121  * There was a 64 bit bug in glib-2.2: g_bit_nth_msf (0, -1) would return 32,
 122  * causing infinite loops in dominator computation. So glib-2.4 is required.
 123  */
 124 #ifdef SPARCV9
 125 #if GLIB_MAJOR_VERSION == 2 && GLIB_MINOR_VERSION < 4
 126 #error "glib 2.4 or later is required for 64 bit mode."
 127 #endif
 128 #endif
 129
 130 #define NOT_IMPLEMENTED do { g_assert_not_reached (); } while (0)
 131
 132 #define ALIGN_TO(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
 133
 134 #define SIGNAL_STACK_SIZE (64 * 1024)
 135
 136 #define STACK_BIAS MONO_SPARC_STACK_BIAS
 137
 138 #ifdef SPARCV9
 139
 140 /* %g1 is used by sparc_set */
 141 #define GP_SCRATCH_REG sparc_g4
 142 /* %f0 is used for parameter passing */
 143 #define FP_SCRATCH_REG sparc_f30
 144 #define ARGS_OFFSET (STACK_BIAS + 128)
 145
 146 #else
 147
 148 #define FP_SCRATCH_REG sparc_f0
 149 #define ARGS_OFFSET 68
 150 #define GP_SCRATCH_REG sparc_g1
 151
 152 #endif
 153
 154 /* Whenever the CPU supports v9 instructions */
 155 static gboolean sparcv9 = FALSE;
 156
 157 /* Whenever this is a 64bit executable */
 158 #if SPARCV9
 159 static gboolean v64 = TRUE;
 160 #else
 161 static gboolean v64 = FALSE;
 162 #endif
 163
 164 static gpointer mono_arch_get_lmf_addr (void);
 165
 166 static int
 167 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar);
 168
 169 const char*
 170 mono_arch_regname (int reg) {
 171         static const char * rnames[] = {
 172                 "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
 173                 "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
 174                 "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
 175                 "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
 176                 "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
 177                 "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
 178                 "sparc_fp", "sparc_retadr"
 179         };
 180         if (reg >= 0 && reg < 32)
 181                 return rnames [reg];
 182         return "unknown";
 183 }
 184
 185 const char*
 186 mono_arch_fregname (int reg) {
 187         static const char *rnames [] = {
 188                 "sparc_f0", "sparc_f1", "sparc_f2", "sparc_f3", "sparc_f4",
 189                 "sparc_f5", "sparc_f6", "sparc_f7", "sparc_f8", "sparc_f9",
 190                 "sparc_f10", "sparc_f11", "sparc_f12", "sparc_f13", "sparc_f14",
 191                 "sparc_f15", "sparc_f16", "sparc_f17", "sparc_f18", "sparc_f19",
 192                 "sparc_f20", "sparc_f21", "sparc_f22", "sparc_f23", "sparc_f24",
 193                 "sparc_f25", "sparc_f26", "sparc_f27", "sparc_f28", "sparc_f29",
 194                 "sparc_f30", "sparc_f31"
 195         };
 196
 197         if (reg >= 0 && reg < 32)
 198                 return rnames [reg];
 199         else
 200                 return "unknown";
 201 }
 202
 203 /*
 204  * Initialize the cpu to execute managed code.
 205  */
 206 void
 207 mono_arch_cpu_init (void)
 208 {
 209         guint32 dummy;
 210         /* make sure sparcv9 is initialized for embedded use */
 211         mono_arch_cpu_optimizazions(&dummy);
 212 }
 213
 214 /*
 215  * This function returns the optimizations supported on this cpu.
 216  */
 217 guint32
 218 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
 219 {
 220         char buf [1024];
 221         guint32 opts = 0;
 222
 223         *exclude_mask = 0;
 224
 225 #ifndef __linux__
 226         if (!sysinfo (SI_ISALIST, buf, 1024))
 227                 g_assert_not_reached ();
 228 #else
 229         /* From glibc.  If the getpagesize is 8192, we're on sparc64, which
 230          * (in)directly implies that we're a v9 or better.
 231          * Improvements to this are greatly accepted...
 232          * Also, we don't differentiate between v7 and v8.  I sense SIGILL
 233          * sniffing in my future.
 234          */
 235         if (getpagesize() == 8192)
 236                 strcpy (buf, "sparcv9");
 237         else
 238                 strcpy (buf, "sparcv8");
 239 #endif
 240
 241         /*
 242          * On some processors, the cmov instructions are even slower than the
 243          * normal ones...
 244          */
 245         if (strstr (buf, "sparcv9")) {
 246                 opts |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
 247                 sparcv9 = TRUE;
 248         }
 249         else
 250                 *exclude_mask |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
 251
 252         return opts;
 253 }
 254
 255 static void
 256 mono_arch_break (void)
 257 {
 258 }
 259
 260 #ifdef __GNUC__
 261 #define flushi(addr)    __asm__ __volatile__ ("iflush %0"::"r"(addr):"memory")
 262 #else /* assume Sun's compiler */
 263 static void flushi(void *addr)
 264 {
 265     asm("flush %i0");
 266 }
 267 #endif
 268
 269 #ifndef __linux__
 270 void sync_instruction_memory(caddr_t addr, int len);
 271 #endif
 272
 273 void
 274 mono_arch_flush_icache (guint8 *code, gint size)
 275 {
 276 #ifndef __linux__
 277         /* Hopefully this is optimized based on the actual CPU */
 278         sync_instruction_memory (code, size);
 279 #else
 280         guint64 *p = (guint64*)code;
 281         guint64 *end = (guint64*)(code + ((size + 8) /8));
 282
 283         /*
 284          * FIXME: Flushing code in dword chunks in _slow_.
 285          */
 286         while (p < end)
 287 #ifdef __GNUC__
 288                 __asm__ __volatile__ ("iflush %0"::"r"(p++));
 289 #else
 290                         flushi (p ++);
 291 #endif
 292 #endif
 293 }
 294
 295 /*
 296  * mono_sparc_flushw:
 297  *
 298  * Flush all register windows to memory. Every register window is saved to
 299  * a 16 word area on the stack pointed to by its %sp register.
 300  */
 301 void
 302 mono_sparc_flushw (void)
 303 {
 304         static guint32 start [64];
 305         static int inited = 0;
 306         guint32 *code;
 307         static void (*flushw) (void);
 308
 309         if (!inited) {
 310                 code = start;
 311
 312                 sparc_save_imm (code, sparc_sp, -160, sparc_sp);
 313                 sparc_flushw (code);
 314                 sparc_ret (code);
 315                 sparc_restore_simple (code);
 316
 317                 g_assert ((code - start) < 64);
 318
 319                 flushw = (gpointer)start;
 320
 321                 inited = 1;
 322         }
 323
 324         flushw ();
 325 }
 326
 327 void
 328 mono_arch_flush_register_windows (void)
 329 {
 330         mono_sparc_flushw ();
 331 }
 332
 333 gboolean
 334 mono_arch_is_inst_imm (gint64 imm)
 335 {
 336         return sparc_is_imm13 (imm);
 337 }
 338
 339 gboolean
 340 mono_sparc_is_v9 (void) {
 341         return sparcv9;
 342 }
 343
 344 gboolean
 345 mono_sparc_is_sparc64 (void) {
 346         return v64;
 347 }
 348
 349 typedef enum {
 350         ArgInIReg,
 351         ArgInIRegPair,
 352         ArgInSplitRegStack,
 353         ArgInFReg,
 354         ArgInFRegPair,
 355         ArgOnStack,
 356         ArgOnStackPair,
 357         ArgInFloatReg,  /* V9 only */
 358         ArgInDoubleReg  /* V9 only */
 359 } ArgStorage;
 360
 361 typedef struct {
 362         gint16 offset;
 363         /* This needs to be offset by %i0 or %o0 depending on caller/callee */
 364         gint8  reg;
 365         ArgStorage storage;
 366         guint32 vt_offset; /* for valuetypes */
 367 } ArgInfo;
 368
 369 typedef struct {
 370         int nargs;
 371         guint32 stack_usage;
 372         guint32 reg_usage;
 373         ArgInfo ret;
 374         ArgInfo sig_cookie;
 375         ArgInfo args [1];
 376 } CallInfo;
 377
 378 #define DEBUG(a)
 379
 380 /* %o0..%o5 */
 381 #define PARAM_REGS 6
 382
 383 static void inline
 384 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean pair)
 385 {
 386         ainfo->offset = *stack_size;
 387
 388         if (!pair) {
 389                 if (*gr >= PARAM_REGS) {
 390                         ainfo->storage = ArgOnStack;
 391                 }
 392                 else {
 393                         ainfo->storage = ArgInIReg;
 394                         ainfo->reg = *gr;
 395                         (*gr) ++;
 396                 }
 397
 398                 /* Allways reserve stack space for parameters passed in registers */
 399                 (*stack_size) += sizeof (gpointer);
 400         }
 401         else {
 402                 if (*gr < PARAM_REGS - 1) {
 403                         /* A pair of registers */
 404                         ainfo->storage = ArgInIRegPair;
 405                         ainfo->reg = *gr;
 406                         (*gr) += 2;
 407                 }
 408                 else if (*gr >= PARAM_REGS) {
 409                         /* A pair of stack locations */
 410                         ainfo->storage = ArgOnStackPair;
 411                 }
 412                 else {
 413                         ainfo->storage = ArgInSplitRegStack;
 414                         ainfo->reg = *gr;
 415                         (*gr) ++;
 416                 }
 417
 418                 (*stack_size) += 2 * sizeof (gpointer);
 419         }
 420 }
 421
 422 #ifdef SPARCV9
 423
 424 #define FLOAT_PARAM_REGS 32
 425
 426 static void inline
 427 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean single)
 428 {
 429         ainfo->offset = *stack_size;
 430
 431         if (single) {
 432                 if (*gr >= FLOAT_PARAM_REGS) {
 433                         ainfo->storage = ArgOnStack;
 434                 }
 435                 else {
 436                         /* A single is passed in an even numbered fp register */
 437                         ainfo->storage = ArgInFloatReg;
 438                         ainfo->reg = *gr + 1;
 439                         (*gr) += 2;
 440                 }
 441         }
 442         else {
 443                 if (*gr < FLOAT_PARAM_REGS) {
 444                         /* A double register */
 445                         ainfo->storage = ArgInDoubleReg;
 446                         ainfo->reg = *gr;
 447                         (*gr) += 2;
 448                 }
 449                 else {
 450                         ainfo->storage = ArgOnStack;
 451                 }
 452         }
 453
 454         (*stack_size) += sizeof (gpointer);
 455 }
 456
 457 #endif
 458
 459 /*
 460  * get_call_info:
 461  *
 462  *  Obtain information about a call according to the calling convention.
 463  * For V8, see the "System V ABI, Sparc Processor Supplement" Sparc V8 version
 464  * document for more information.
 465  * For V9, see the "Low Level System Information (64-bit psABI)" chapter in
 466  * the 'Sparc Compliance Definition 2.4' document.
 467  */
 468 static CallInfo*
 469 get_call_info (MonoMethodSignature *sig, gboolean is_pinvoke)
 470 {
 471         guint32 i, gr, fr;
 472         int n = sig->hasthis + sig->param_count;
 473         guint32 stack_size = 0;
 474         CallInfo *cinfo;
 475
 476         cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
 477
 478         gr = 0;
 479         fr = 0;
 480
 481 #ifdef SPARCV9
 482         if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
 483                 /* The address of the return value is passed in %o0 */
 484                 add_general (&gr, &stack_size, &cinfo->ret, FALSE);
 485                 cinfo->ret.reg += sparc_i0;
 486         }
 487 #endif
 488
 489         /* this */
 490         if (sig->hasthis)
 491                 add_general (&gr, &stack_size, cinfo->args + 0, FALSE);
 492
 493         if ((sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
 494                 gr = PARAM_REGS;
 495
 496                 /* Emit the signature cookie just before the implicit arguments */
 497                 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 498         }
 499
 500         for (i = 0; i < sig->param_count; ++i) {
 501                 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
 502
 503                 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
 504                         gr = PARAM_REGS;
 505
 506                         /* Emit the signature cookie just before the implicit arguments */
 507                         add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 508                 }
 509
 510                 DEBUG(printf("param %d: ", i));
 511                 if (sig->params [i]->byref) {
 512                         DEBUG(printf("byref\n"));
 513
 514                         add_general (&gr, &stack_size, ainfo, FALSE);
 515                         continue;
 516                 }
 517                 switch (mono_type_get_underlying_type (sig->params [i])->type) {
 518                 case MONO_TYPE_BOOLEAN:
 519                 case MONO_TYPE_I1:
 520                 case MONO_TYPE_U1:
 521                         add_general (&gr, &stack_size, ainfo, FALSE);
 522                         /* the value is in the ls byte */
 523                         ainfo->offset += sizeof (gpointer) - 1;
 524                         break;
 525                 case MONO_TYPE_I2:
 526                 case MONO_TYPE_U2:
 527                 case MONO_TYPE_CHAR:
 528                         add_general (&gr, &stack_size, ainfo, FALSE);
 529                         /* the value is in the ls word */
 530                         ainfo->offset += sizeof (gpointer) - 2;
 531                         break;
 532                 case MONO_TYPE_I4:
 533                 case MONO_TYPE_U4:
 534                         add_general (&gr, &stack_size, ainfo, FALSE);
 535                         /* the value is in the ls dword */
 536                         ainfo->offset += sizeof (gpointer) - 4;
 537                         break;
 538                 case MONO_TYPE_I:
 539                 case MONO_TYPE_U:
 540                 case MONO_TYPE_PTR:
 541                 case MONO_TYPE_FNPTR:
 542                 case MONO_TYPE_CLASS:
 543                 case MONO_TYPE_OBJECT:
 544                 case MONO_TYPE_STRING:
 545                 case MONO_TYPE_SZARRAY:
 546                 case MONO_TYPE_ARRAY:
 547                         add_general (&gr, &stack_size, ainfo, FALSE);
 548                         break;
 549                 case MONO_TYPE_GENERICINST:
 550                         if (!mono_type_generic_inst_is_valuetype (sig->params [i])) {
 551                                 add_general (&gr, &stack_size, ainfo, FALSE);
 552                                 break;
 553                         }
 554                         /* Fall through */
 555                 case MONO_TYPE_VALUETYPE:
 556 #ifdef SPARCV9
 557                         if (sig->pinvoke)
 558                                 NOT_IMPLEMENTED;
 559 #endif
 560                         add_general (&gr, &stack_size, ainfo, FALSE);
 561                         break;
 562                 case MONO_TYPE_TYPEDBYREF:
 563                         add_general (&gr, &stack_size, ainfo, FALSE);
 564                         break;
 565                 case MONO_TYPE_U8:
 566                 case MONO_TYPE_I8:
 567 #ifdef SPARCV9
 568                         add_general (&gr, &stack_size, ainfo, FALSE);
 569 #else
 570                         add_general (&gr, &stack_size, ainfo, TRUE);
 571 #endif
 572                         break;
 573                 case MONO_TYPE_R4:
 574 #ifdef SPARCV9
 575                         add_float (&fr, &stack_size, ainfo, TRUE);
 576                         gr ++;
 577 #else
 578                         /* single precision values are passed in integer registers */
 579                         add_general (&gr, &stack_size, ainfo, FALSE);
 580 #endif
 581                         break;
 582                 case MONO_TYPE_R8:
 583 #ifdef SPARCV9
 584                         add_float (&fr, &stack_size, ainfo, FALSE);
 585                         gr ++;
 586 #else
 587                         /* double precision values are passed in a pair of registers */
 588                         add_general (&gr, &stack_size, ainfo, TRUE);
 589 #endif
 590                         break;
 591                 default:
 592                         g_assert_not_reached ();
 593                 }
 594         }
 595
 596         if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
 597                 gr = PARAM_REGS;
 598
 599                 /* Emit the signature cookie just before the implicit arguments */
 600                 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 601         }
 602
 603         /* return value */
 604         {
 605                 switch (mono_type_get_underlying_type (sig->ret)->type) {
 606                 case MONO_TYPE_BOOLEAN:
 607                 case MONO_TYPE_I1:
 608                 case MONO_TYPE_U1:
 609                 case MONO_TYPE_I2:
 610                 case MONO_TYPE_U2:
 611                 case MONO_TYPE_CHAR:
 612                 case MONO_TYPE_I4:
 613                 case MONO_TYPE_U4:
 614                 case MONO_TYPE_I:
 615                 case MONO_TYPE_U:
 616                 case MONO_TYPE_PTR:
 617                 case MONO_TYPE_FNPTR:
 618                 case MONO_TYPE_CLASS:
 619                 case MONO_TYPE_OBJECT:
 620                 case MONO_TYPE_SZARRAY:
 621                 case MONO_TYPE_ARRAY:
 622                 case MONO_TYPE_STRING:
 623                         cinfo->ret.storage = ArgInIReg;
 624                         cinfo->ret.reg = sparc_i0;
 625                         if (gr < 1)
 626                                 gr = 1;
 627                         break;
 628                 case MONO_TYPE_U8:
 629                 case MONO_TYPE_I8:
 630 #ifdef SPARCV9
 631                         cinfo->ret.storage = ArgInIReg;
 632                         cinfo->ret.reg = sparc_i0;
 633                         if (gr < 1)
 634                                 gr = 1;
 635 #else
 636                         cinfo->ret.storage = ArgInIRegPair;
 637                         cinfo->ret.reg = sparc_i0;
 638                         if (gr < 2)
 639                                 gr = 2;
 640 #endif
 641                         break;
 642                 case MONO_TYPE_R4:
 643                 case MONO_TYPE_R8:
 644                         cinfo->ret.storage = ArgInFReg;
 645                         cinfo->ret.reg = sparc_f0;
 646                         break;
 647                 case MONO_TYPE_GENERICINST:
 648                         if (!mono_type_generic_inst_is_valuetype (sig->ret)) {
 649                                 cinfo->ret.storage = ArgInIReg;
 650                                 cinfo->ret.reg = sparc_i0;
 651                                 if (gr < 1)
 652                                         gr = 1;
 653                                 break;
 654                         }
 655                         /* Fall through */
 656                 case MONO_TYPE_VALUETYPE:
 657                         if (v64) {
 658                                 if (sig->pinvoke)
 659                                         NOT_IMPLEMENTED;
 660                                 else
 661                                         /* Already done */
 662                                         ;
 663                         }
 664                         else
 665                                 cinfo->ret.storage = ArgOnStack;
 666                         break;
 667                 case MONO_TYPE_TYPEDBYREF:
 668                         if (v64) {
 669                                 if (sig->pinvoke)
 670                                         /* Same as a valuetype with size 24 */
 671                                         NOT_IMPLEMENTED;
 672                                 else
 673                                         /* Already done */
 674                                         ;
 675                         }
 676                         else
 677                                 cinfo->ret.storage = ArgOnStack;
 678                         break;
 679                 case MONO_TYPE_VOID:
 680                         break;
 681                 default:
 682                         g_error ("Can't handle as return value 0x%x", sig->ret->type);
 683                 }
 684         }
 685
 686         cinfo->stack_usage = stack_size;
 687         cinfo->reg_usage = gr;
 688         return cinfo;
 689 }
 690
 691 static gboolean
 692 is_regsize_var (MonoType *t) {
 693         if (t->byref)
 694                 return TRUE;
 695         switch (mono_type_get_underlying_type (t)->type) {
 696         case MONO_TYPE_BOOLEAN:
 697         case MONO_TYPE_CHAR:
 698         case MONO_TYPE_I1:
 699         case MONO_TYPE_U1:
 700         case MONO_TYPE_I2:
 701         case MONO_TYPE_U2:
 702         case MONO_TYPE_I4:
 703         case MONO_TYPE_U4:
 704         case MONO_TYPE_I:
 705         case MONO_TYPE_U:
 706                 return TRUE;
 707         case MONO_TYPE_OBJECT:
 708         case MONO_TYPE_STRING:
 709         case MONO_TYPE_CLASS:
 710         case MONO_TYPE_SZARRAY:
 711         case MONO_TYPE_ARRAY:
 712                 return TRUE;
 713         case MONO_TYPE_VALUETYPE:
 714                 return FALSE;
 715 #ifdef SPARCV9
 716         case MONO_TYPE_I8:
 717         case MONO_TYPE_U8:
 718                 return TRUE;
 719 #endif
 720         }
 721         return FALSE;
 722 }
 723
 724 GList *
 725 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
 726 {
 727         GList *vars = NULL;
 728         int i;
 729
 730         /*
 731          * FIXME: If an argument is allocated to a register, then load it from the
 732          * stack in the prolog.
 733          */
 734
 735         for (i = 0; i < cfg->num_varinfo; i++) {
 736                 MonoInst *ins = cfg->varinfo [i];
 737                 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
 738
 739                 /* unused vars */
 740                 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
 741                         continue;
 742
 743                 /* FIXME: Make arguments on stack allocateable to registers */
 744                 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode == OP_REGVAR) || (ins->opcode == OP_ARG))
 745                         continue;
 746
 747                 if (is_regsize_var (ins->inst_vtype)) {
 748                         g_assert (MONO_VARINFO (cfg, i)->reg == -1);
 749                         g_assert (i == vmv->idx);
 750
 751                         vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
 752                 }
 753         }
 754
 755         return vars;
 756 }
 757
 758 GList *
 759 mono_arch_get_global_int_regs (MonoCompile *cfg)
 760 {
 761         GList *regs = NULL;
 762         int i;
 763         MonoMethodSignature *sig;
 764         CallInfo *cinfo;
 765
 766         sig = mono_method_signature (cfg->method);
 767
 768         cinfo = get_call_info (sig, FALSE);
 769
 770         /* Use unused input registers */
 771         for (i = cinfo->reg_usage; i < 6; ++i)
 772                 regs = g_list_prepend (regs, GUINT_TO_POINTER (sparc_i0 + i));
 773
 774         /* Use %l0..%l6 as global registers */
 775         for (i = sparc_l0; i < sparc_l7; ++i)
 776                 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
 777
 778         g_free (cinfo);
 779
 780         return regs;
 781 }
 782
 783 /*
 784  * mono_arch_regalloc_cost:
 785  *
 786  *  Return the cost, in number of memory references, of the action of
 787  * allocating the variable VMV into a register during global register
 788  * allocation.
 789  */
 790 guint32
 791 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
 792 {
 793         return 0;
 794 }
 795
 796 /*
 797  * Set var information according to the calling convention. sparc version.
 798  * The locals var stuff should most likely be split in another method.
 799  */
 800 void
 801 mono_arch_allocate_vars (MonoCompile *m)
 802 {
 803         MonoMethodSignature *sig;
 804         MonoMethodHeader *header;
 805         MonoInst *inst;
 806         int i, offset, size, align, curinst;
 807         CallInfo *cinfo;
 808
 809         header = mono_method_get_header (m->method);
 810
 811         sig = mono_method_signature (m->method);
 812
 813         cinfo = get_call_info (sig, FALSE);
 814
 815         if (sig->ret->type != MONO_TYPE_VOID) {
 816                 switch (cinfo->ret.storage) {
 817                 case ArgInIReg:
 818                 case ArgInFReg:
 819                 case ArgInIRegPair:
 820                         m->ret->opcode = OP_REGVAR;
 821                         m->ret->inst_c0 = cinfo->ret.reg;
 822                         break;
 823                 case ArgOnStack:
 824 #ifdef SPARCV9
 825                         g_assert_not_reached ();
 826 #else
 827                         /* valuetypes */
 828                         m->ret->opcode = OP_REGOFFSET;
 829                         m->ret->inst_basereg = sparc_fp;
 830                         m->ret->inst_offset = 64;
 831 #endif
 832                         break;
 833                 default:
 834                         NOT_IMPLEMENTED;
 835                 }
 836                 m->ret->dreg = m->ret->inst_c0;
 837         }
 838
 839         /*
 840          * We use the ABI calling conventions for managed code as well.
 841          * Exception: valuetypes are never returned in registers on V9.
 842          * FIXME: Use something more optimized.
 843          */
 844
 845         /* Locals are allocated backwards from %fp */
 846         m->frame_reg = sparc_fp;
 847         offset = 0;
 848
 849         /*
 850          * Reserve a stack slot for holding information used during exception
 851          * handling.
 852          */
 853         if (header->num_clauses)
 854                 offset += sizeof (gpointer) * 2;
 855
 856         if (m->method->save_lmf) {
 857                 offset += sizeof (MonoLMF);
 858                 m->arch.lmf_offset = offset;
 859         }
 860
 861         curinst = m->locals_start;
 862         for (i = curinst; i < m->num_varinfo; ++i) {
 863                 inst = m->varinfo [i];
 864
 865                 if (inst->opcode == OP_REGVAR) {
 866                         //g_print ("allocating local %d to %s\n", i, mono_arch_regname (inst->dreg));
 867                         continue;
 868                 }
 869
 870                 if (inst->flags & MONO_INST_IS_DEAD)
 871                         continue;
 872
 873                 /* inst->backend.is_pinvoke indicates native sized value types, this is used by the
 874                 * pinvoke wrappers when they call functions returning structure */
 875                 if (inst->backend.is_pinvoke && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
 876                         size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
 877                 else
 878                         size = mono_type_stack_size (inst->inst_vtype, &align);
 879
 880                 /*
 881                  * This is needed since structures containing doubles must be doubleword
 882          * aligned.
 883                  * FIXME: Do this only if needed.
 884                  */
 885                 if (MONO_TYPE_ISSTRUCT (inst->inst_vtype))
 886                         align = 8;
 887
 888                 /*
 889                  * variables are accessed as negative offsets from %fp, so increase
 890                  * the offset before assigning it to a variable
 891                  */
 892                 offset += size;
 893
 894                 offset += align - 1;
 895                 offset &= ~(align - 1);
 896                 inst->opcode = OP_REGOFFSET;
 897                 inst->inst_basereg = sparc_fp;
 898                 inst->inst_offset = STACK_BIAS + -offset;
 899
 900                 //g_print ("allocating local %d to [%s - %d]\n", i, mono_arch_regname (inst->inst_basereg), - inst->inst_offset);
 901         }
 902
 903         if (sig->call_convention == MONO_CALL_VARARG) {
 904                 m->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
 905         }
 906
 907         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
 908                 inst = m->varinfo [i];
 909                 if (inst->opcode != OP_REGVAR) {
 910                         ArgInfo *ainfo = &cinfo->args [i];
 911                         gboolean inreg = TRUE;
 912                         MonoType *arg_type;
 913                         ArgStorage storage;
 914
 915                         if (sig->hasthis && (i == 0))
 916                                 arg_type = &mono_defaults.object_class->byval_arg;
 917                         else
 918                                 arg_type = sig->params [i - sig->hasthis];
 919
 920 #ifndef SPARCV9
 921                         if (!arg_type->byref && ((arg_type->type == MONO_TYPE_R4)
 922                                                                          || (arg_type->type == MONO_TYPE_R8)))
 923                                 /*
 924                                  * Since float arguments are passed in integer registers, we need to
 925                                  * save them to the stack in the prolog.
 926                                  */
 927                                 inreg = FALSE;
 928 #endif
 929
 930                         /* FIXME: Allocate volatile arguments to registers */
 931                         if (inst->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT))
 932                                 inreg = FALSE;
 933
 934                         if (MONO_TYPE_ISSTRUCT (arg_type))
 935                                 /* FIXME: this isn't needed */
 936                                 inreg = FALSE;
 937
 938                         inst->opcode = OP_REGOFFSET;
 939
 940                         if (!inreg)
 941                                 storage = ArgOnStack;
 942                         else
 943                                 storage = ainfo->storage;
 944
 945                         switch (storage) {
 946                         case ArgInIReg:
 947                         case ArgInIRegPair:
 948                                 inst->opcode = OP_REGVAR;
 949                                 inst->dreg = sparc_i0 + ainfo->reg;
 950                                 break;
 951                         case ArgInFloatReg:
 952                         case ArgInDoubleReg:
 953                                 /*
 954                                  * Since float regs are volatile, we save the arguments to
 955                                  * the stack in the prolog.
 956                                  * FIXME: Avoid this if the method contains no calls.
 957                                  */
 958                         case ArgOnStack:
 959                         case ArgOnStackPair:
 960                         case ArgInSplitRegStack:
 961                                 /* Split arguments are saved to the stack in the prolog */
 962                                 inst->opcode = OP_REGOFFSET;
 963                                 /* in parent frame */
 964                                 inst->inst_basereg = sparc_fp;
 965                                 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
 966
 967                                 if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
 968                                         /*
 969                                          * It is very hard to load doubles from non-doubleword aligned
 970                                          * memory locations. So if the offset is misaligned, we copy the
 971                                          * argument to a stack location in the prolog.
 972                                          */
 973                                         if ((inst->inst_offset - STACK_BIAS) % 8) {
 974                                                 inst->inst_basereg = sparc_fp;
 975                                                 offset += 8;
 976                                                 align = 8;
 977                                                 offset += align - 1;
 978                                                 offset &= ~(align - 1);
 979                                                 inst->inst_offset = STACK_BIAS + -offset;
 980
 981                                         }
 982                                 }
 983                                 break;
 984                         default:
 985                                 NOT_IMPLEMENTED;
 986                         }
 987
 988                         if (MONO_TYPE_ISSTRUCT (arg_type)) {
 989                                 /* Add a level of indirection */
 990                                 /*
 991                                  * It would be easier to add OP_LDIND_I here, but ldind_i instructions
 992                                  * are destructively modified in a lot of places in inssel.brg.
 993                                  */
 994                                 MonoInst *indir;
 995                                 MONO_INST_NEW (m, indir, 0);
 996                                 *indir = *inst;
 997                                 inst->opcode = OP_SPARC_INARG_VT;
 998                                 inst->inst_left = indir;
 999                         }
1000                 }
1001         }
1002
1003         /*
1004          * spillvars are stored between the normal locals and the storage reserved
1005          * by the ABI.
1006          */
1007
1008         m->stack_offset = offset;
1009
1010         /* Add a properly aligned dword for use by int<->float conversion opcodes */
1011         m->spill_count ++;
1012         mono_spillvar_offset_float (m, 0);
1013
1014         g_free (cinfo);
1015 }
1016
1017 static MonoInst *
1018 make_group (MonoCompile *cfg, MonoInst *left, int basereg, int offset)
1019 {
1020         MonoInst *group;
1021
1022         MONO_INST_NEW (cfg, group, OP_GROUP);
1023         group->inst_left = left;
1024         group->inst_basereg = basereg;
1025         group->inst_imm = offset;
1026
1027         return group;
1028 }
1029
1030 static void
1031 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo)
1032 {
1033         MonoInst *arg;
1034         MonoMethodSignature *tmp_sig;
1035         MonoInst *sig_arg;
1036
1037         /*
1038          * mono_ArgIterator_Setup assumes the signature cookie is
1039          * passed first and all the arguments which were before it are
1040          * passed on the stack after the signature. So compensate by
1041          * passing a different signature.
1042          */
1043         tmp_sig = mono_metadata_signature_dup (call->signature);
1044         tmp_sig->param_count -= call->signature->sentinelpos;
1045         tmp_sig->sentinelpos = 0;
1046         memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1047
1048         /* FIXME: Add support for signature tokens to AOT */
1049         cfg->disable_aot = TRUE;
1050         /* We allways pass the signature on the stack for simplicity */
1051         MONO_INST_NEW (cfg, arg, OP_SPARC_OUTARG_MEM);
1052         arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + cinfo->sig_cookie.offset);
1053         MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
1054         sig_arg->inst_p0 = tmp_sig;
1055         arg->inst_left = sig_arg;
1056         arg->type = STACK_PTR;
1057         /* prepend, so they get reversed */
1058         arg->next = call->out_args;
1059         call->out_args = arg;
1060 }
1061
1062 /*
1063  * take the arguments and generate the arch-specific
1064  * instructions to properly call the function in call.
1065  * This includes pushing, moving arguments to the right register
1066  * etc.
1067  */
1068 MonoCallInst*
1069 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
1070         MonoInst *arg, *in;
1071         MonoMethodSignature *sig;
1072         int i, n;
1073         CallInfo *cinfo;
1074         ArgInfo *ainfo;
1075         guint32 extra_space = 0;
1076
1077         sig = call->signature;
1078         n = sig->param_count + sig->hasthis;
1079
1080         cinfo = get_call_info (sig, sig->pinvoke);
1081
1082         for (i = 0; i < n; ++i) {
1083                 ainfo = cinfo->args + i;
1084
1085                 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
1086                         /* Emit the signature cookie just before the first implicit argument */
1087                         emit_sig_cookie (cfg, call, cinfo);
1088                 }
1089
1090                 if (is_virtual && i == 0) {
1091                         /* the argument will be attached to the call instruction */
1092                         in = call->args [i];
1093                 } else {
1094                         MONO_INST_NEW (cfg, arg, OP_OUTARG);
1095                         in = call->args [i];
1096                         arg->cil_code = in->cil_code;
1097                         arg->inst_left = in;
1098                         arg->type = in->type;
1099                         /* prepend, we'll need to reverse them later */
1100                         arg->next = call->out_args;
1101                         call->out_args = arg;
1102
1103                         if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(sig->params [i - sig->hasthis]))) {
1104                                 MonoInst *inst;
1105                                 gint align;
1106                                 guint32 offset, pad;
1107                                 guint32 size;
1108
1109 #ifdef SPARCV9
1110                                 if (sig->pinvoke)
1111                                         NOT_IMPLEMENTED;
1112 #endif
1113
1114                                 if (sig->params [i - sig->hasthis]->type == MONO_TYPE_TYPEDBYREF) {
1115                                         size = sizeof (MonoTypedRef);
1116                                         align = sizeof (gpointer);
1117                                 }
1118                                 else
1119                                 if (sig->pinvoke)
1120                                         size = mono_type_native_stack_size (&in->klass->byval_arg, &align);
1121                                 else {
1122                                         /*
1123                                          * Can't use mono_type_stack_size (), but that
1124                                          * aligns the size to sizeof (gpointer), which is larger
1125                                          * than the size of the source, leading to reads of invalid
1126                                          * memory if the source is at the end of address space or
1127                                          * misaligned reads.
1128                                          */
1129                                         size = mono_class_value_size (in->klass, &align);
1130                                 }
1131
1132                                 /*
1133                                  * We use OP_OUTARG_VT to copy the valuetype to a stack location, then
1134                                  * use the normal OUTARG opcodes to pass the address of the location to
1135                                  * the callee.
1136                                  */
1137                                 MONO_INST_NEW (cfg, inst, OP_OUTARG_VT);
1138                                 inst->inst_left = in;
1139
1140                                 /* The first 6 argument locations are reserved */
1141                                 if (cinfo->stack_usage < 6 * sizeof (gpointer))
1142                                         cinfo->stack_usage = 6 * sizeof (gpointer);
1143
1144                                 offset = ALIGN_TO ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage, align);
1145                                 pad = offset - ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage);
1146
1147                                 inst->inst_c1 = STACK_BIAS + offset;
1148                                 inst->backend.size = size;
1149                                 arg->inst_left = inst;
1150
1151                                 cinfo->stack_usage += size;
1152                                 cinfo->stack_usage += pad;
1153                         }
1154
1155                         arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + ainfo->offset);
1156
1157                         switch (ainfo->storage) {
1158                         case ArgInIReg:
1159                         case ArgInFReg:
1160                         case ArgInIRegPair:
1161                                 if (ainfo->storage == ArgInIRegPair)
1162                                         arg->opcode = OP_SPARC_OUTARG_REGPAIR;
1163                                 arg->backend.reg3 = sparc_o0 + ainfo->reg;
1164                                 call->used_iregs |= 1 << ainfo->reg;
1165
1166                                 if ((i >= sig->hasthis) && !sig->params [i - sig->hasthis]->byref && ((sig->params [i - sig->hasthis]->type == MONO_TYPE_R8) || (sig->params [i - sig->hasthis]->type == MONO_TYPE_R4))) {
1167                                         /* An fp value is passed in an ireg */
1168
1169                                         if (arg->opcode == OP_SPARC_OUTARG_REGPAIR)
1170                                                 arg->opcode = OP_SPARC_OUTARG_REGPAIR_FLOAT;
1171                                         else
1172                                                 arg->opcode = OP_SPARC_OUTARG_FLOAT;
1173
1174                                         /*
1175                                          * The OUTARG (freg) implementation needs an extra dword to store
1176                                          * the temporary value.
1177                                          */
1178                                         extra_space += 8;
1179                                 }
1180                                 break;
1181                         case ArgOnStack:
1182                                 arg->opcode = OP_SPARC_OUTARG_MEM;
1183                                 break;
1184                         case ArgOnStackPair:
1185                                 arg->opcode = OP_SPARC_OUTARG_MEMPAIR;
1186                                 break;
1187                         case ArgInSplitRegStack:
1188                                 arg->opcode = OP_SPARC_OUTARG_SPLIT_REG_STACK;
1189                                 arg->backend.reg3 = sparc_o0 + ainfo->reg;
1190                                 call->used_iregs |= 1 << ainfo->reg;
1191                                 break;
1192                         case ArgInFloatReg:
1193                                 arg->opcode = OP_SPARC_OUTARG_FLOAT_REG;
1194                                 arg->backend.reg3 = sparc_f0 + ainfo->reg;
1195                                 break;
1196                         case ArgInDoubleReg:
1197                                 arg->opcode = OP_SPARC_OUTARG_DOUBLE_REG;
1198                                 arg->backend.reg3 = sparc_f0 + ainfo->reg;
1199                                 break;
1200                         default:
1201                                 NOT_IMPLEMENTED;
1202                         }
1203                 }
1204         }
1205
1206         /* Handle the case where there are no implicit arguments */
1207         if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sig->sentinelpos)) {
1208                 emit_sig_cookie (cfg, call, cinfo);
1209         }
1210
1211         /*
1212          * Reverse the call->out_args list.
1213          */
1214         {
1215                 MonoInst *prev = NULL, *list = call->out_args, *next;
1216                 while (list) {
1217                         next = list->next;
1218                         list->next = prev;
1219                         prev = list;
1220                         list = next;
1221                 }
1222                 call->out_args = prev;
1223         }
1224         call->stack_usage = cinfo->stack_usage + extra_space;
1225         call->out_ireg_args = NULL;
1226         call->out_freg_args = NULL;
1227         cfg->param_area = MAX (cfg->param_area, call->stack_usage);
1228         cfg->flags |= MONO_CFG_HAS_CALLS;
1229
1230         g_free (cinfo);
1231         return call;
1232 }
1233
1234 /* Map opcode to the sparc condition codes */
1235 static inline SparcCond
1236 opcode_to_sparc_cond (int opcode)
1237 {
1238         switch (opcode) {
1239         case OP_FBGE:
1240                 return sparc_fbge;
1241         case OP_FBLE:
1242                 return sparc_fble;
1243         case OP_FBEQ:
1244         case OP_FCEQ:
1245                 return sparc_fbe;
1246         case OP_FBLT:
1247         case OP_FCLT:
1248         case OP_FCLT_UN:
1249                 return sparc_fbl;
1250         case OP_FBGT:
1251         case OP_FCGT:
1252         case OP_FCGT_UN:
1253                 return sparc_fbg;
1254         case CEE_BEQ:
1255         case OP_IBEQ:
1256         case OP_CEQ:
1257         case OP_ICEQ:
1258         case OP_COND_EXC_EQ:
1259                 return sparc_be;
1260         case CEE_BNE_UN:
1261         case OP_COND_EXC_NE_UN:
1262         case OP_IBNE_UN:
1263                 return sparc_bne;
1264         case CEE_BLT:
1265         case OP_IBLT:
1266         case OP_CLT:
1267         case OP_ICLT:
1268         case OP_COND_EXC_LT:
1269                 return sparc_bl;
1270         case CEE_BLT_UN:
1271         case OP_IBLT_UN:
1272         case OP_CLT_UN:
1273         case OP_ICLT_UN:
1274         case OP_COND_EXC_LT_UN:
1275                 return sparc_blu;
1276         case CEE_BGT:
1277         case OP_IBGT:
1278         case OP_CGT:
1279         case OP_ICGT:
1280         case OP_COND_EXC_GT:
1281                 return sparc_bg;
1282         case CEE_BGT_UN:
1283         case OP_IBGT_UN:
1284         case OP_CGT_UN:
1285         case OP_ICGT_UN:
1286         case OP_COND_EXC_GT_UN:
1287                 return sparc_bgu;
1288         case CEE_BGE:
1289         case OP_IBGE:
1290         case OP_COND_EXC_GE:
1291                 return sparc_bge;
1292         case CEE_BGE_UN:
1293         case OP_IBGE_UN:
1294         case OP_COND_EXC_GE_UN:
1295                 return sparc_beu;
1296         case CEE_BLE:
1297         case OP_IBLE:
1298         case OP_COND_EXC_LE:
1299                 return sparc_ble;
1300         case CEE_BLE_UN:
1301         case OP_IBLE_UN:
1302         case OP_COND_EXC_LE_UN:
1303                 return sparc_bleu;
1304         case OP_COND_EXC_OV:
1305         case OP_COND_EXC_IOV:
1306                 return sparc_bvs;
1307         case OP_COND_EXC_C:
1308         case OP_COND_EXC_IC:
1309                 return sparc_bcs;
1310         case OP_COND_EXC_NO:
1311         case OP_COND_EXC_NC:
1312                 NOT_IMPLEMENTED;
1313         default:
1314                 g_assert_not_reached ();
1315                 return sparc_be;
1316         }
1317 }
1318
1319 #define COMPUTE_DISP(ins) \
1320 if (ins->flags & MONO_INST_BRLABEL) { \
1321         if (ins->inst_i0->inst_c0) \
1322            disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2; \
1323         else { \
1324             disp = 0; \
1325                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
1326         } \
1327 } else { \
1328         if (ins->inst_true_bb->native_offset) \
1329            disp = (ins->inst_true_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2; \
1330         else { \
1331             disp = 0; \
1332                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1333         } \
1334 }
1335
1336 #ifdef SPARCV9
1337 #define DEFAULT_ICC sparc_xcc_short
1338 #else
1339 #define DEFAULT_ICC sparc_icc_short
1340 #endif
1341
1342 #ifdef SPARCV9
1343 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) \
1344     do { \
1345         gint32 disp; \
1346         guint32 predict; \
1347         COMPUTE_DISP(ins); \
1348         predict = (disp != 0) ? 1 : 0; \
1349         g_assert (sparc_is_imm19 (disp)); \
1350         sparc_branchp (code, (annul), cond, icc, (predict), disp); \
1351         if (filldelay) sparc_nop (code); \
1352     } while (0)
1353 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_ICC ((ins), (cond), (annul), (filldelay), (sparc_xcc_short))
1354 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) \
1355     do { \
1356         gint32 disp; \
1357         guint32 predict; \
1358         COMPUTE_DISP(ins); \
1359         predict = (disp != 0) ? 1 : 0; \
1360         g_assert (sparc_is_imm19 (disp)); \
1361         sparc_fbranch (code, (annul), cond, disp); \
1362         if (filldelay) sparc_nop (code); \
1363     } while (0)
1364 #else
1365 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) g_assert_not_reached ()
1366 #define EMIT_COND_BRANCH_GENERAL(ins,bop,cond,annul,filldelay) \
1367     do { \
1368         gint32 disp; \
1369         COMPUTE_DISP(ins); \
1370         g_assert (sparc_is_imm22 (disp)); \
1371         sparc_ ## bop (code, (annul), cond, disp); \
1372         if (filldelay) sparc_nop (code); \
1373     } while (0)
1374 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),branch,(cond),annul,filldelay)
1375 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),fbranch,(cond),annul,filldelay)
1376 #endif
1377
1378 #define EMIT_COND_BRANCH_PREDICTED(ins,cond,annul,filldelay) \
1379     do { \
1380             gint32 disp; \
1381         guint32 predict; \
1382         COMPUTE_DISP(ins); \
1383         predict = (disp != 0) ? 1 : 0; \
1384         g_assert (sparc_is_imm19 (disp)); \
1385                 sparc_branchp (code, (annul), (cond), DEFAULT_ICC, (predict), disp); \
1386         if (filldelay) sparc_nop (code); \
1387     } while (0)
1388
1389 #define EMIT_COND_BRANCH_BPR(ins,bop,predict,annul,filldelay) \
1390     do { \
1391             gint32 disp; \
1392         COMPUTE_DISP(ins); \
1393                 g_assert (sparc_is_imm22 (disp)); \
1394                 sparc_ ## bop (code, (annul), (predict), ins->sreg1, disp); \
1395         if (filldelay) sparc_nop (code); \
1396     } while (0)
1397
1398 /* emit an exception if condition is fail */
1399 /*
1400  * We put the exception throwing code out-of-line, at the end of the method
1401  */
1402 #define EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,filldelay,icc) do {     \
1403                 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,   \
1404                                     MONO_PATCH_INFO_EXC, sexc_name);  \
1405         if (sparcv9) { \
1406            sparc_branchp (code, 0, (cond), (icc), 0, 0); \
1407         } \
1408         else { \
1409                         sparc_branch (code, 0, cond, 0);     \
1410         } \
1411         if (filldelay) sparc_nop (code);     \
1412         } while (0);
1413
1414 #define EMIT_COND_SYSTEM_EXCEPTION(ins,cond,sexc_name) EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,TRUE,DEFAULT_ICC)
1415
1416 #define EMIT_COND_SYSTEM_EXCEPTION_BPR(ins,bop,sexc_name) do { \
1417                 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,   \
1418                                     MONO_PATCH_INFO_EXC, sexc_name);  \
1419                 sparc_ ## bop (code, FALSE, FALSE, ins->sreg1, 0); \
1420         sparc_nop (code);    \
1421 } while (0);
1422
1423 #define EMIT_ALU_IMM(ins,op,setcc) do { \
1424                         if (sparc_is_imm13 ((ins)->inst_imm)) \
1425                                 sparc_ ## op ## _imm (code, (setcc), (ins)->sreg1, ins->inst_imm, (ins)->dreg); \
1426                         else { \
1427                                 sparc_set (code, ins->inst_imm, sparc_o7); \
1428                                 sparc_ ## op (code, (setcc), (ins)->sreg1, sparc_o7, (ins)->dreg); \
1429                         } \
1430 } while (0);
1431
1432 #define EMIT_LOAD_MEMBASE(ins,op) do { \
1433                         if (sparc_is_imm13 (ins->inst_offset)) \
1434                                 sparc_ ## op ## _imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg); \
1435                         else { \
1436                                 sparc_set (code, ins->inst_offset, sparc_o7); \
1437                                 sparc_ ## op (code, ins->inst_basereg, sparc_o7, ins->dreg); \
1438                         } \
1439 } while (0);
1440
1441 /* max len = 5 */
1442 #define EMIT_STORE_MEMBASE_IMM(ins,op) do { \
1443                         guint32 sreg; \
1444                         if (ins->inst_imm == 0) \
1445                                 sreg = sparc_g0; \
1446                         else { \
1447                                 sparc_set (code, ins->inst_imm, sparc_o7); \
1448                                 sreg = sparc_o7; \
1449                         } \
1450                         if (!sparc_is_imm13 (ins->inst_offset)) { \
1451                                 sparc_set (code, ins->inst_offset, GP_SCRATCH_REG); \
1452                                 sparc_ ## op (code, sreg, ins->inst_destbasereg, GP_SCRATCH_REG); \
1453                         } \
1454                         else \
1455                                 sparc_ ## op ## _imm (code, sreg, ins->inst_destbasereg, ins->inst_offset); \
1456                                                                                                                                                                                  } while (0);
1457
1458 #define EMIT_STORE_MEMBASE_REG(ins,op) do { \
1459                         if (!sparc_is_imm13 (ins->inst_offset)) { \
1460                                 sparc_set (code, ins->inst_offset, sparc_o7); \
1461                                 sparc_ ## op (code, ins->sreg1, ins->inst_destbasereg, sparc_o7); \
1462                         } \
1463                                   else \
1464                                 sparc_ ## op ## _imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset); \
1465                                                                                                                                                                                  } while (0);
1466
1467 #define EMIT_CALL() do { \
1468     if (v64) { \
1469         sparc_set_template (code, sparc_o7); \
1470         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7); \
1471     } \
1472     else { \
1473         sparc_call_simple (code, 0); \
1474     } \
1475     sparc_nop (code); \
1476 } while (0);
1477
1478 /*
1479  * A call template is 7 instructions long, so we want to avoid it if possible.
1480  */
1481 static guint32*
1482 emit_call (MonoCompile *cfg, guint32 *code, guint32 patch_type, gconstpointer data)
1483 {
1484         gpointer target;
1485
1486         /* FIXME: This only works if the target method is already compiled */
1487         if (0 && v64 && !cfg->compile_aot) {
1488                 MonoJumpInfo patch_info;
1489
1490                 patch_info.type = patch_type;
1491                 patch_info.data.target = data;
1492
1493                 target = mono_resolve_patch_target (cfg->method, cfg->domain, NULL, &patch_info, FALSE);
1494
1495                 /* FIXME: Add optimizations if the target is close enough */
1496                 sparc_set (code, target, sparc_o7);
1497                 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7);
1498                 sparc_nop (code);
1499         }
1500         else {
1501                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, patch_type, data);
1502                 EMIT_CALL ();
1503         }
1504
1505         return code;
1506 }
1507
1508 static void
1509 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1510 {
1511         MonoInst *ins, *last_ins = NULL;
1512         ins = bb->code;
1513
1514         while (ins) {
1515
1516                 switch (ins->opcode) {
1517                 case OP_MUL_IMM:
1518                         /* remove unnecessary multiplication with 1 */
1519                         if (ins->inst_imm == 1) {
1520                                 if (ins->dreg != ins->sreg1) {
1521                                         ins->opcode = OP_MOVE;
1522                                 } else {
1523                                         last_ins->next = ins->next;
1524                                         ins = ins->next;
1525                                         continue;
1526                                 }
1527                         }
1528                         break;
1529 #ifndef SPARCV9
1530                 case OP_LOAD_MEMBASE:
1531                 case OP_LOADI4_MEMBASE:
1532                         /*
1533                          * OP_STORE_MEMBASE_REG reg, offset(basereg)
1534                          * OP_LOAD_MEMBASE offset(basereg), reg
1535                          */
1536                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
1537                                          || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1538                             ins->inst_basereg == last_ins->inst_destbasereg &&
1539                             ins->inst_offset == last_ins->inst_offset) {
1540                                 if (ins->dreg == last_ins->sreg1) {
1541                                         last_ins->next = ins->next;
1542                                         ins = ins->next;
1543                                         continue;
1544                                 } else {
1545                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1546                                         ins->opcode = OP_MOVE;
1547                                         ins->sreg1 = last_ins->sreg1;
1548                                 }
1549
1550                         /*
1551                          * Note: reg1 must be different from the basereg in the second load
1552                          * OP_LOAD_MEMBASE offset(basereg), reg1
1553                          * OP_LOAD_MEMBASE offset(basereg), reg2
1554                          * -->
1555                          * OP_LOAD_MEMBASE offset(basereg), reg1
1556                          * OP_MOVE reg1, reg2
1557                          */
1558                         } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1559                                            || last_ins->opcode == OP_LOAD_MEMBASE) &&
1560                               ins->inst_basereg != last_ins->dreg &&
1561                               ins->inst_basereg == last_ins->inst_basereg &&
1562                               ins->inst_offset == last_ins->inst_offset) {
1563
1564                                 if (ins->dreg == last_ins->dreg) {
1565                                         last_ins->next = ins->next;
1566                                         ins = ins->next;
1567                                         continue;
1568                                 } else {
1569                                         ins->opcode = OP_MOVE;
1570                                         ins->sreg1 = last_ins->dreg;
1571                                 }
1572
1573                                 //g_assert_not_reached ();
1574
1575 #if 0
1576                         /*
1577                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1578                          * OP_LOAD_MEMBASE offset(basereg), reg
1579                          * -->
1580                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1581                          * OP_ICONST reg, imm
1582                          */
1583                         } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1584                                                 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1585                                    ins->inst_basereg == last_ins->inst_destbasereg &&
1586                                    ins->inst_offset == last_ins->inst_offset) {
1587                                 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1588                                 ins->opcode = OP_ICONST;
1589                                 ins->inst_c0 = last_ins->inst_imm;
1590                                 g_assert_not_reached (); // check this rule
1591 #endif
1592                         }
1593                         break;
1594 #endif
1595                 case OP_LOADU1_MEMBASE:
1596                 case OP_LOADI1_MEMBASE:
1597                         if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1598                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1599                                         ins->inst_offset == last_ins->inst_offset) {
1600                                 if (ins->dreg == last_ins->sreg1) {
1601                                         last_ins->next = ins->next;
1602                                         ins = ins->next;
1603                                         continue;
1604                                 } else {
1605                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1606                                         ins->opcode = OP_MOVE;
1607                                         ins->sreg1 = last_ins->sreg1;
1608                                 }
1609                         }
1610                         break;
1611                 case OP_LOADU2_MEMBASE:
1612                 case OP_LOADI2_MEMBASE:
1613                         if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1614                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1615                                         ins->inst_offset == last_ins->inst_offset) {
1616                                 if (ins->dreg == last_ins->sreg1) {
1617                                         last_ins->next = ins->next;
1618                                         ins = ins->next;
1619                                         continue;
1620                                 } else {
1621                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1622                                         ins->opcode = OP_MOVE;
1623                                         ins->sreg1 = last_ins->sreg1;
1624                                 }
1625                         }
1626                         break;
1627                 case OP_STOREI4_MEMBASE_IMM:
1628                         /* Convert pairs of 0 stores to a dword 0 store */
1629                         /* Used when initializing temporaries */
1630                         /* We know sparc_fp is dword aligned */
1631                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM) &&
1632                                 (ins->inst_destbasereg == last_ins->inst_destbasereg) &&
1633                                 (ins->inst_destbasereg == sparc_fp) &&
1634                                 (ins->inst_offset < 0) &&
1635                                 ((ins->inst_offset % 8) == 0) &&
1636                                 ((ins->inst_offset == last_ins->inst_offset - 4)) &&
1637                                 (ins->inst_imm == 0) &&
1638                                 (last_ins->inst_imm == 0)) {
1639                                 if (sparcv9) {
1640                                         last_ins->opcode = OP_STOREI8_MEMBASE_IMM;
1641                                         last_ins->inst_offset = ins->inst_offset;
1642                                         last_ins->next = ins->next;
1643                                         ins = ins->next;
1644                                         continue;
1645                                 }
1646                         }
1647                         break;
1648                 case CEE_BEQ:
1649                 case CEE_BNE_UN:
1650                 case CEE_BLT:
1651                 case CEE_BGT:
1652                 case CEE_BGE:
1653                 case CEE_BLE:
1654                 case OP_COND_EXC_EQ:
1655                 case OP_COND_EXC_GE:
1656                 case OP_COND_EXC_GT:
1657                 case OP_COND_EXC_LE:
1658                 case OP_COND_EXC_LT:
1659                 case OP_COND_EXC_NE_UN:
1660                         /*
1661                          * Convert compare with zero+branch to BRcc
1662                          */
1663                         /*
1664                          * This only works in 64 bit mode, since it examines all 64
1665                          * bits of the register.
1666                          * Only do this if the method is small since BPr only has a 16bit
1667                          * displacement.
1668                          */
1669                         if (v64 && (mono_method_get_header (cfg->method)->code_size < 10000) && last_ins &&
1670                                 (last_ins->opcode == OP_COMPARE_IMM) &&
1671                                 (last_ins->inst_imm == 0)) {
1672                                 MonoInst *next = ins->next;
1673                                 switch (ins->opcode) {
1674                                 case CEE_BEQ:
1675                                         ins->opcode = OP_SPARC_BRZ;
1676                                         break;
1677                                 case CEE_BNE_UN:
1678                                         ins->opcode = OP_SPARC_BRNZ;
1679                                         break;
1680                                 case CEE_BLT:
1681                                         ins->opcode = OP_SPARC_BRLZ;
1682                                         break;
1683                                 case CEE_BGT:
1684                                         ins->opcode = OP_SPARC_BRGZ;
1685                                         break;
1686                                 case CEE_BGE:
1687                                         ins->opcode = OP_SPARC_BRGEZ;
1688                                         break;
1689                                 case CEE_BLE:
1690                                         ins->opcode = OP_SPARC_BRLEZ;
1691                                         break;
1692                                 case OP_COND_EXC_EQ:
1693                                         ins->opcode = OP_SPARC_COND_EXC_EQZ;
1694                                         break;
1695                                 case OP_COND_EXC_GE:
1696                                         ins->opcode = OP_SPARC_COND_EXC_GEZ;
1697                                         break;
1698                                 case OP_COND_EXC_GT:
1699                                         ins->opcode = OP_SPARC_COND_EXC_GTZ;
1700                                         break;
1701                                 case OP_COND_EXC_LE:
1702                                         ins->opcode = OP_SPARC_COND_EXC_LEZ;
1703                                         break;
1704                                 case OP_COND_EXC_LT:
1705                                         ins->opcode = OP_SPARC_COND_EXC_LTZ;
1706                                         break;
1707                                 case OP_COND_EXC_NE_UN:
1708                                         ins->opcode = OP_SPARC_COND_EXC_NEZ;
1709                                         break;
1710                                 default:
1711                                         g_assert_not_reached ();
1712                                 }
1713                                 ins->sreg1 = last_ins->sreg1;
1714                                 *last_ins = *ins;
1715                                 last_ins->next = next;
1716                                 ins = next;
1717                                 continue;
1718                         }
1719                         break;
1720                 case CEE_CONV_I4:
1721                 case CEE_CONV_U4:
1722                 case OP_MOVE:
1723                         /*
1724                          * OP_MOVE reg, reg
1725                          */
1726                         if (ins->dreg == ins->sreg1) {
1727                                 if (last_ins)
1728                                         last_ins->next = ins->next;
1729                                 ins = ins->next;
1730                                 continue;
1731                         }
1732                         /*
1733                          * OP_MOVE sreg, dreg
1734                          * OP_MOVE dreg, sreg
1735                          */
1736                         if (last_ins && last_ins->opcode == OP_MOVE &&
1737                             ins->sreg1 == last_ins->dreg &&
1738                             ins->dreg == last_ins->sreg1) {
1739                                 last_ins->next = ins->next;
1740                                 ins = ins->next;
1741                                 continue;
1742                         }
1743                         break;
1744                 }
1745                 last_ins = ins;
1746                 ins = ins->next;
1747         }
1748         bb->last_ins = last_ins;
1749 }
1750
1751 static const char*const * ins_spec = sparc_desc;
1752
1753 static inline const char*
1754 get_ins_spec (int opcode)
1755 {
1756         if (ins_spec [opcode])
1757                 return ins_spec [opcode];
1758         else
1759                 return ins_spec [CEE_ADD];
1760 }
1761
1762 static int
1763 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
1764 {
1765         MonoSpillInfo **si, *info;
1766         int i = 0;
1767
1768         si = &cfg->spill_info_float;
1769
1770         while (i <= spillvar) {
1771
1772                 if (!*si) {
1773                         *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1774                         info->next = NULL;
1775                         cfg->stack_offset += sizeof (double);
1776                         cfg->stack_offset = ALIGN_TO (cfg->stack_offset, 8);
1777                         info->offset = - cfg->stack_offset;
1778                 }
1779
1780                 if (i == spillvar)
1781                         return MONO_SPARC_STACK_BIAS + (*si)->offset;
1782
1783                 i++;
1784                 si = &(*si)->next;
1785         }
1786
1787         g_assert_not_reached ();
1788         return 0;
1789 }
1790
1791 /* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
1792
1793 void
1794 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1795 {
1796         mono_local_regalloc (cfg, bb);
1797 }
1798
1799 static void
1800 sparc_patch (guint32 *code, const gpointer target)
1801 {
1802         guint32 *c = code;
1803         guint32 ins = *code;
1804         guint32 op = ins >> 30;
1805         guint32 op2 = (ins >> 22) & 0x7;
1806         guint32 rd = (ins >> 25) & 0x1f;
1807         guint8* target8 = (guint8*)target;
1808         gint64 disp = (target8 - (guint8*)code) >> 2;
1809         int reg;
1810
1811 //      g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
1812
1813         if ((op == 0) && (op2 == 2)) {
1814                 if (!sparc_is_imm22 (disp))
1815                         NOT_IMPLEMENTED;
1816                 /* Bicc */
1817                 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1818         }
1819         else if ((op == 0) && (op2 == 1)) {
1820                 if (!sparc_is_imm19 (disp))
1821                         NOT_IMPLEMENTED;
1822                 /* BPcc */
1823                 *code = ((ins >> 19) << 19) | (disp & 0x7ffff);
1824         }
1825         else if ((op == 0) && (op2 == 3)) {
1826                 if (!sparc_is_imm16 (disp))
1827                         NOT_IMPLEMENTED;
1828                 /* BPr */
1829                 *code &= ~(0x180000 | 0x3fff);
1830                 *code |= ((disp << 21) & (0x180000)) | (disp & 0x3fff);
1831         }
1832         else if ((op == 0) && (op2 == 6)) {
1833                 if (!sparc_is_imm22 (disp))
1834                         NOT_IMPLEMENTED;
1835                 /* FBicc */
1836                 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1837         }
1838         else if ((op == 0) && (op2 == 4)) {
1839                 guint32 ins2 = code [1];
1840
1841                 if (((ins2 >> 30) == 2) && (((ins2 >> 19) & 0x3f) == 2)) {
1842                         /* sethi followed by or */
1843                         guint32 *p = code;
1844                         sparc_set (p, target8, rd);
1845                         while (p <= (code + 1))
1846                                 sparc_nop (p);
1847                 }
1848                 else if (ins2 == 0x01000000) {
1849                         /* sethi followed by nop */
1850                         guint32 *p = code;
1851                         sparc_set (p, target8, rd);
1852                         while (p <= (code + 1))
1853                                 sparc_nop (p);
1854                 }
1855                 else if ((sparc_inst_op (ins2) == 3) && (sparc_inst_imm (ins2))) {
1856                         /* sethi followed by load/store */
1857 #ifndef SPARCV9
1858                         guint32 t = (guint32)target8;
1859                         *code &= ~(0x3fffff);
1860                         *code |= (t >> 10);
1861                         *(code + 1) &= ~(0x3ff);
1862                         *(code + 1) |= (t & 0x3ff);
1863 #endif
1864                 }
1865                 else if (v64 &&
1866                                  (sparc_inst_rd (ins) == sparc_g1) &&
1867                                  (sparc_inst_op (c [1]) == 0) && (sparc_inst_op2 (c [1]) == 4) &&
1868                                  (sparc_inst_op (c [2]) == 2) && (sparc_inst_op3 (c [2]) == 2) &&
1869                                  (sparc_inst_op (c [3]) == 2) && (sparc_inst_op3 (c [3]) == 2))
1870                 {
1871                         /* sparc_set */
1872                         guint32 *p = c;
1873                         reg = sparc_inst_rd (c [1]);
1874                         sparc_set (p, target8, reg);
1875                         while (p < (c + 6))
1876                                 sparc_nop (p);
1877                 }
1878                 else if ((sparc_inst_op (ins2) == 2) && (sparc_inst_op3 (ins2) == 0x38) &&
1879                                  (sparc_inst_imm (ins2))) {
1880                         /* sethi followed by jmpl */
1881 #ifndef SPARCV9
1882                         guint32 t = (guint32)target8;
1883                         *code &= ~(0x3fffff);
1884                         *code |= (t >> 10);
1885                         *(code + 1) &= ~(0x3ff);
1886                         *(code + 1) |= (t & 0x3ff);
1887 #endif
1888                 }
1889                 else
1890                         NOT_IMPLEMENTED;
1891         }
1892         else if (op == 01) {
1893                 gint64 disp = (target8 - (guint8*)code) >> 2;
1894
1895                 if (!sparc_is_imm30 (disp))
1896                         NOT_IMPLEMENTED;
1897                 sparc_call_simple (code, target8 - (guint8*)code);
1898         }
1899         else if ((op == 2) && (sparc_inst_op3 (ins) == 0x2) && sparc_inst_imm (ins)) {
1900                 /* mov imm, reg */
1901                 g_assert (sparc_is_imm13 (target8));
1902                 *code &= ~(0x1fff);
1903                 *code |= (guint32)target8;
1904         }
1905         else if ((sparc_inst_op (ins) == 2) && (sparc_inst_op3 (ins) == 0x7)) {
1906                 /* sparc_set case 5. */
1907                 guint32 *p = c;
1908
1909                 g_assert (v64);
1910                 reg = sparc_inst_rd (c [3]);
1911                 sparc_set (p, target, reg);
1912                 while (p < (c + 6))
1913                         sparc_nop (p);
1914         }
1915         else
1916                 NOT_IMPLEMENTED;
1917
1918 //      g_print ("patched with 0x%08x\n", ins);
1919 }
1920
1921 /*
1922  * mono_sparc_emit_save_lmf:
1923  *
1924  *  Emit the code neccesary to push a new entry onto the lmf stack. Used by
1925  * trampolines as well.
1926  */
1927 guint32*
1928 mono_sparc_emit_save_lmf (guint32 *code, guint32 lmf_offset)
1929 {
1930         /* Save lmf_addr */
1931         sparc_sti_imm (code, sparc_o0, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr));
1932         /* Save previous_lmf */
1933         sparc_ldi (code, sparc_o0, sparc_g0, sparc_o7);
1934         sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf));
1935         /* Set new lmf */
1936         sparc_add_imm (code, FALSE, sparc_fp, lmf_offset, sparc_o7);
1937         sparc_sti (code, sparc_o7, sparc_o0, sparc_g0);
1938
1939         return code;
1940 }
1941
1942 guint32*
1943 mono_sparc_emit_restore_lmf (guint32 *code, guint32 lmf_offset)
1944 {
1945         /* Load previous_lmf */
1946         sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), sparc_l0);
1947         /* Load lmf_addr */
1948         sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), sparc_l1);
1949         /* *(lmf) = previous_lmf */
1950         sparc_sti (code, sparc_l0, sparc_l1, sparc_g0);
1951         return code;
1952 }
1953
1954 static guint32*
1955 emit_save_sp_to_lmf (MonoCompile *cfg, guint32 *code)
1956 {
1957         /*
1958          * Since register windows are saved to the current value of %sp, we need to
1959          * set the sp field in the lmf before the call, not in the prolog.
1960          */
1961         if (cfg->method->save_lmf) {
1962                 gint32 lmf_offset = MONO_SPARC_STACK_BIAS - cfg->arch.lmf_offset;
1963
1964                 /* Save sp */
1965                 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
1966         }
1967
1968         return code;
1969 }
1970
1971 static guint32*
1972 emit_vret_token (MonoInst *ins, guint32 *code)
1973 {
1974         MonoCallInst *call = (MonoCallInst*)ins;
1975         guint32 size;
1976
1977         /*
1978          * The sparc ABI requires that calls to functions which return a structure
1979          * contain an additional unimpl instruction which is checked by the callee.
1980          */
1981         if (call->signature->pinvoke && MONO_TYPE_ISSTRUCT(call->signature->ret)) {
1982                 if (call->signature->ret->type == MONO_TYPE_TYPEDBYREF)
1983                         size = mono_type_stack_size (call->signature->ret, NULL);
1984                 else
1985                         size = mono_class_native_size (call->signature->ret->data.klass, NULL);
1986                 sparc_unimp (code, size & 0xfff);
1987         }
1988
1989         return code;
1990 }
1991
1992 static guint32*
1993 emit_move_return_value (MonoInst *ins, guint32 *code)
1994 {
1995         /* Move return value to the target register */
1996         /* FIXME: do more things in the local reg allocator */
1997         switch (ins->opcode) {
1998         case OP_VOIDCALL:
1999         case OP_VOIDCALL_REG:
2000         case OP_VOIDCALL_MEMBASE:
2001                 break;
2002         case CEE_CALL:
2003         case OP_CALL_REG:
2004         case OP_CALL_MEMBASE:
2005                 g_assert (ins->dreg == sparc_o0);
2006                 break;
2007         case OP_LCALL:
2008         case OP_LCALL_REG:
2009         case OP_LCALL_MEMBASE:
2010                 /*
2011                  * ins->dreg is the least significant reg due to the lreg: LCALL rule
2012                  * in inssel-long32.brg.
2013                  */
2014 #ifdef SPARCV9
2015                 sparc_mov_reg_reg (code, sparc_o0, ins->dreg);
2016 #else
2017                 g_assert (ins->dreg == sparc_o1);
2018 #endif
2019                 break;
2020         case OP_FCALL:
2021         case OP_FCALL_REG:
2022         case OP_FCALL_MEMBASE:
2023 #ifdef SPARCV9
2024                 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4) {
2025                         sparc_fmovs (code, sparc_f0, ins->dreg);
2026                         sparc_fstod (code, ins->dreg, ins->dreg);
2027                 }
2028                 else
2029                         sparc_fmovd (code, sparc_f0, ins->dreg);
2030 #else
2031                 sparc_fmovs (code, sparc_f0, ins->dreg);
2032                 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4)
2033                         sparc_fstod (code, ins->dreg, ins->dreg);
2034                 else
2035                         sparc_fmovs (code, sparc_f1, ins->dreg + 1);
2036 #endif
2037                 break;
2038         case OP_VCALL:
2039         case OP_VCALL_REG:
2040         case OP_VCALL_MEMBASE:
2041                 break;
2042         default:
2043                 NOT_IMPLEMENTED;
2044         }
2045
2046         return code;
2047 }
2048
2049 /*
2050  * emit_load_volatile_arguments:
2051  *
2052  *  Load volatile arguments from the stack to the original input registers.
2053  * Required before a tail call.
2054  */
2055 static guint32*
2056 emit_load_volatile_arguments (MonoCompile *cfg, guint32 *code)
2057 {
2058         MonoMethod *method = cfg->method;
2059         MonoMethodSignature *sig;
2060         MonoInst *inst;
2061         CallInfo *cinfo;
2062         guint32 i, ireg;
2063
2064         /* FIXME: Generate intermediate code instead */
2065
2066         sig = mono_method_signature (method);
2067
2068         cinfo = get_call_info (sig, FALSE);
2069
2070         /* This is the opposite of the code in emit_prolog */
2071
2072         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
2073                 ArgInfo *ainfo = cinfo->args + i;
2074                 gint32 stack_offset;
2075                 MonoType *arg_type;
2076                 inst = cfg->varinfo [i];
2077
2078                 if (sig->hasthis && (i == 0))
2079                         arg_type = &mono_defaults.object_class->byval_arg;
2080                 else
2081                         arg_type = sig->params [i - sig->hasthis];
2082
2083                 stack_offset = ainfo->offset + ARGS_OFFSET;
2084                 ireg = sparc_i0 + ainfo->reg;
2085
2086                 if (ainfo->storage == ArgInSplitRegStack) {
2087                         g_assert (inst->opcode == OP_REGOFFSET);
2088
2089                         if (!sparc_is_imm13 (stack_offset))
2090                                 NOT_IMPLEMENTED;
2091                         sparc_st_imm (code, inst->inst_basereg, stack_offset, sparc_i5);
2092                 }
2093
2094                 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
2095                         if (ainfo->storage == ArgInIRegPair) {
2096                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
2097                                         NOT_IMPLEMENTED;
2098                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2099                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2100                         }
2101                         else
2102                                 if (ainfo->storage == ArgInSplitRegStack) {
2103                                         if (stack_offset != inst->inst_offset) {
2104                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_i5);
2105                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2106                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2107
2108                                         }
2109                                 }
2110                         else
2111                                 if (ainfo->storage == ArgOnStackPair) {
2112                                         if (stack_offset != inst->inst_offset) {
2113                                                 /* stack_offset is not dword aligned, so we need to make a copy */
2114                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_o7);
2115                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset);
2116
2117                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2118                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2119
2120                                         }
2121                                 }
2122                          else
2123                                 g_assert_not_reached ();
2124                 }
2125                 else
2126                         if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
2127                                 /* Argument in register, but need to be saved to stack */
2128                                 if (!sparc_is_imm13 (stack_offset))
2129                                         NOT_IMPLEMENTED;
2130                                 if ((stack_offset - ARGS_OFFSET) & 0x1)
2131                                         /* FIXME: Is this ldsb or ldub ? */
2132                                         sparc_ldsb_imm (code, inst->inst_basereg, stack_offset, ireg);
2133                                 else
2134                                         if ((stack_offset - ARGS_OFFSET) & 0x2)
2135                                                 sparc_ldsh_imm (code, inst->inst_basereg, stack_offset, ireg);
2136                                 else
2137                                         if ((stack_offset - ARGS_OFFSET) & 0x4)
2138                                                 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2139                                         else {
2140                                                 if (v64)
2141                                                         sparc_ldx_imm (code, inst->inst_basereg, stack_offset, ireg);
2142                                                 else
2143                                                         sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2144                                         }
2145                         }
2146                         else if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
2147                                 /* Argument in regpair, but need to be saved to stack */
2148                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
2149                                         NOT_IMPLEMENTED;
2150                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2151                                 sparc_st_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2152                         }
2153                         else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
2154                                 NOT_IMPLEMENTED;
2155                         }
2156                         else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
2157                                 NOT_IMPLEMENTED;
2158                         }
2159
2160                 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
2161                         if (inst->opcode == OP_REGVAR)
2162                                 /* FIXME: Load the argument into memory */
2163                                 NOT_IMPLEMENTED;
2164         }
2165
2166         g_free (cinfo);
2167
2168         return code;
2169 }
2170
2171 /*
2172  * mono_sparc_is_virtual_call:
2173  *
2174  *  Determine whenever the instruction at CODE is a virtual call.
2175  */
2176 gboolean
2177 mono_sparc_is_virtual_call (guint32 *code)
2178 {
2179         guint32 buf[1];
2180         guint32 *p;
2181
2182         p = buf;
2183
2184         if ((sparc_inst_op (*code) == 0x2) && (sparc_inst_op3 (*code) == 0x38)) {
2185                 /*
2186                  * Register indirect call. If it is a virtual call, then the
2187                  * instruction in the delay slot is a special kind of nop.
2188                  */
2189
2190                 /* Construct special nop */
2191                 sparc_or_imm (p, FALSE, sparc_g0, 0xca, sparc_g0);
2192                 p --;
2193
2194                 if (code [1] == p [0])
2195                         return TRUE;
2196         }
2197
2198         return FALSE;
2199 }
2200
2201 /*
2202  * mono_arch_get_vcall_slot_addr:
2203  *
2204  *  Determine the vtable slot used by a virtual call.
2205  */
2206 gpointer*
2207 mono_arch_get_vcall_slot_addr (guint8 *code8, gpointer *regs)
2208 {
2209         guint32 *code = (guint32*)(gpointer)code8;
2210         guint32 ins = code [0];
2211         guint32 prev_ins = code [-1];
2212
2213         mono_sparc_flushw ();
2214
2215         if (!mono_sparc_is_virtual_call (code))
2216                 return NULL;
2217
2218         if ((sparc_inst_op (ins) == 0x2) && (sparc_inst_op3 (ins) == 0x38)) {
2219                 if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_i (prev_ins) == 1) && (sparc_inst_op3 (prev_ins) == 0 || sparc_inst_op3 (prev_ins) == 0xb)) {
2220                         /* ld [r1 + CONST ], r2; call r2 */
2221                         guint32 base = sparc_inst_rs1 (prev_ins);
2222                         guint32 disp = sparc_inst_imm13 (prev_ins);
2223                         gpointer base_val;
2224
2225                         g_assert (sparc_inst_rd (prev_ins) == sparc_inst_rs1 (ins));
2226
2227                         g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2228
2229                         base_val = regs [base - sparc_o0];
2230
2231                         return (gpointer)((guint8*)base_val + disp);
2232                 }
2233                 else if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_i (prev_ins) == 0) && (sparc_inst_op3 (prev_ins) == 0)) {
2234                         /* set r1, ICONST; ld [r1 + r2], r2; call r2 */
2235                         /* Decode a sparc_set32 */
2236                         guint32 base = sparc_inst_rs1 (prev_ins);
2237                         guint32 disp;
2238                         gpointer base_val;
2239                         guint32 s1 = code [-3];
2240                         guint32 s2 = code [-2];
2241
2242 #ifdef SPARCV9
2243                         NOT_IMPLEMENTED;
2244 #endif
2245
2246                         /* sparc_sethi */
2247                         g_assert (sparc_inst_op (s1) == 0);
2248                         g_assert (sparc_inst_op2 (s1) == 4);
2249
2250                         /* sparc_or_imm */
2251                         g_assert (sparc_inst_op (s2) == 2);
2252                         g_assert (sparc_inst_op3 (s2) == 2);
2253                         g_assert (sparc_inst_i (s2) == 1);
2254                         g_assert (sparc_inst_rs1 (s2) == sparc_inst_rd (s2));
2255                         g_assert (sparc_inst_rd (s1) == sparc_inst_rs1 (s2));
2256
2257                         disp = ((s1 & 0x3fffff) << 10) | sparc_inst_imm13 (s2);
2258
2259                         g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2260
2261                         base_val = regs [base - sparc_o0];
2262
2263                         return (gpointer)((guint8*)base_val + disp);
2264                 } else
2265                         g_assert_not_reached ();
2266         }
2267         else
2268                 g_assert_not_reached ();
2269
2270         return NULL;
2271 }
2272
2273 /*
2274  * Some conventions used in the following code.
2275  * 2) The only scratch registers we have are o7 and g1.  We try to
2276  * stick to o7 when we can, and use g1 when necessary.
2277  */
2278
2279 void
2280 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2281 {
2282         MonoInst *ins;
2283         MonoCallInst *call;
2284         guint offset;
2285         guint32 *code = (guint32*)(cfg->native_code + cfg->code_len);
2286         MonoInst *last_ins = NULL;
2287         int max_len, cpos;
2288         const char *spec;
2289
2290         if (cfg->opt & MONO_OPT_PEEPHOLE)
2291                 peephole_pass (cfg, bb);
2292
2293         if (cfg->verbose_level > 2)
2294                 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2295
2296         cpos = bb->max_offset;
2297
2298         if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2299                 NOT_IMPLEMENTED;
2300         }
2301
2302         ins = bb->code;
2303         while (ins) {
2304                 guint8* code_start;
2305
2306                 offset = (guint8*)code - cfg->native_code;
2307
2308                 spec = ins_spec [ins->opcode];
2309                 if (!spec)
2310                         spec = ins_spec [CEE_ADD];
2311
2312                 max_len = ((guint8 *)spec)[MONO_INST_LEN];
2313
2314                 if (offset > (cfg->code_size - max_len - 16)) {
2315                         cfg->code_size *= 2;
2316                         cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2317                         code = (guint32*)(cfg->native_code + offset);
2318                 }
2319                 code_start = (guint8*)code;
2320                 //      if (ins->cil_code)
2321                 //              g_print ("cil code\n");
2322                 mono_debug_record_line_number (cfg, ins, offset);
2323
2324                 switch (ins->opcode) {
2325                 case OP_STOREI1_MEMBASE_IMM:
2326                         EMIT_STORE_MEMBASE_IMM (ins, stb);
2327                         break;
2328                 case OP_STOREI2_MEMBASE_IMM:
2329                         EMIT_STORE_MEMBASE_IMM (ins, sth);
2330                         break;
2331                 case OP_STORE_MEMBASE_IMM:
2332                         EMIT_STORE_MEMBASE_IMM (ins, sti);
2333                         break;
2334                 case OP_STOREI4_MEMBASE_IMM:
2335                         EMIT_STORE_MEMBASE_IMM (ins, st);
2336                         break;
2337                 case OP_STOREI8_MEMBASE_IMM:
2338 #ifdef SPARCV9
2339                         EMIT_STORE_MEMBASE_IMM (ins, stx);
2340 #else
2341                         /* Only generated by peephole opts */
2342                         g_assert ((ins->inst_offset % 8) == 0);
2343                         g_assert (ins->inst_imm == 0);
2344                         EMIT_STORE_MEMBASE_IMM (ins, stx);
2345 #endif
2346                         break;
2347                 case OP_STOREI1_MEMBASE_REG:
2348                         EMIT_STORE_MEMBASE_REG (ins, stb);
2349                         break;
2350                 case OP_STOREI2_MEMBASE_REG:
2351                         EMIT_STORE_MEMBASE_REG (ins, sth);
2352                         break;
2353                 case OP_STOREI4_MEMBASE_REG:
2354                         EMIT_STORE_MEMBASE_REG (ins, st);
2355                         break;
2356                 case OP_STOREI8_MEMBASE_REG:
2357 #ifdef SPARCV9
2358                         EMIT_STORE_MEMBASE_REG (ins, stx);
2359 #else
2360                         /* Only used by OP_MEMSET */
2361                         EMIT_STORE_MEMBASE_REG (ins, std);
2362 #endif
2363                         break;
2364                 case OP_STORE_MEMBASE_REG:
2365                         EMIT_STORE_MEMBASE_REG (ins, sti);
2366                         break;
2367                 case CEE_LDIND_I:
2368 #ifdef SPARCV9
2369                         sparc_ldx (code, ins->inst_c0, sparc_g0, ins->dreg);
2370 #else
2371                         sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2372 #endif
2373                         break;
2374                 case CEE_LDIND_I4:
2375 #ifdef SPARCV9
2376                         sparc_ldsw (code, ins->inst_c0, sparc_g0, ins->dreg);
2377 #else
2378                         sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2379 #endif
2380                         break;
2381                 case CEE_LDIND_U4:
2382                         sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2383                         break;
2384                 case OP_LOADU4_MEM:
2385                         sparc_set (code, ins->inst_c0, ins->dreg);
2386                         sparc_ld (code, ins->dreg, sparc_g0, ins->dreg);
2387                         break;
2388                 case OP_LOADI4_MEMBASE:
2389 #ifdef SPARCV9
2390                         EMIT_LOAD_MEMBASE (ins, ldsw);
2391 #else
2392                         EMIT_LOAD_MEMBASE (ins, ld);
2393 #endif
2394                         break;
2395                 case OP_LOADU4_MEMBASE:
2396                         EMIT_LOAD_MEMBASE (ins, ld);
2397                         break;
2398                 case OP_LOADU1_MEMBASE:
2399                         EMIT_LOAD_MEMBASE (ins, ldub);
2400                         break;
2401                 case OP_LOADI1_MEMBASE:
2402                         EMIT_LOAD_MEMBASE (ins, ldsb);
2403                         break;
2404                 case OP_LOADU2_MEMBASE:
2405                         EMIT_LOAD_MEMBASE (ins, lduh);
2406                         break;
2407                 case OP_LOADI2_MEMBASE:
2408                         EMIT_LOAD_MEMBASE (ins, ldsh);
2409                         break;
2410                 case OP_LOAD_MEMBASE:
2411 #ifdef SPARCV9
2412                                 EMIT_LOAD_MEMBASE (ins, ldx);
2413 #else
2414                                 EMIT_LOAD_MEMBASE (ins, ld);
2415 #endif
2416                         break;
2417 #ifdef SPARCV9
2418                 case OP_LOADI8_MEMBASE:
2419                         EMIT_LOAD_MEMBASE (ins, ldx);
2420                         break;
2421 #endif
2422                 case CEE_CONV_I1:
2423                         sparc_sll_imm (code, ins->sreg1, 24, sparc_o7);
2424                         sparc_sra_imm (code, sparc_o7, 24, ins->dreg);
2425                         break;
2426                 case CEE_CONV_I2:
2427                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2428                         sparc_sra_imm (code, sparc_o7, 16, ins->dreg);
2429                         break;
2430                 case CEE_CONV_U1:
2431                         sparc_and_imm (code, FALSE, ins->sreg1, 0xff, ins->dreg);
2432                         break;
2433                 case CEE_CONV_U2:
2434                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2435                         sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
2436                         break;
2437                 case CEE_CONV_OVF_U4:
2438                         /* Only used on V9 */
2439                         sparc_cmp_imm (code, ins->sreg1, 0);
2440                         mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2441                                                                  MONO_PATCH_INFO_EXC, "OverflowException");
2442                         sparc_branchp (code, 0, sparc_bl, sparc_xcc_short, 0, 0);
2443                         /* Delay slot */
2444                         sparc_set (code, 1, sparc_o7);
2445                         sparc_sllx_imm (code, sparc_o7, 32, sparc_o7);
2446                         sparc_cmp (code, ins->sreg1, sparc_o7);
2447                         mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2448                                                                  MONO_PATCH_INFO_EXC, "OverflowException");
2449                         sparc_branchp (code, 0, sparc_bge, sparc_xcc_short, 0, 0);
2450                         sparc_nop (code);
2451                         sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2452                         break;
2453                 case CEE_CONV_OVF_I4_UN:
2454                         /* Only used on V9 */
2455                         NOT_IMPLEMENTED;
2456                         break;
2457                 case CEE_CONV_U:
2458                 case CEE_CONV_U8:
2459                         /* Only used on V9 */
2460                         sparc_srl_imm (code, ins->sreg1, 0, ins->dreg);
2461                         break;
2462                 case CEE_CONV_I:
2463                 case CEE_CONV_I8:
2464                         /* Only used on V9 */
2465                         sparc_sra_imm (code, ins->sreg1, 0, ins->dreg);
2466                         break;
2467                 case OP_COMPARE:
2468                 case OP_LCOMPARE:
2469                 case OP_ICOMPARE:
2470                         sparc_cmp (code, ins->sreg1, ins->sreg2);
2471                         break;
2472                 case OP_COMPARE_IMM:
2473                 case OP_ICOMPARE_IMM:
2474                         if (sparc_is_imm13 (ins->inst_imm))
2475                                 sparc_cmp_imm (code, ins->sreg1, ins->inst_imm);
2476                         else {
2477                                 sparc_set (code, ins->inst_imm, sparc_o7);
2478                                 sparc_cmp (code, ins->sreg1, sparc_o7);
2479                         }
2480                         break;
2481                 case CEE_BREAK:
2482                         /*
2483                          * gdb does not like encountering 'ta 1' in the debugged code. So
2484                          * instead of emitting a trap, we emit a call a C function and place a
2485                          * breakpoint there.
2486                          */
2487                         //sparc_ta (code, 1);
2488                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, mono_arch_break);
2489                         EMIT_CALL();
2490                         break;
2491                 case OP_ADDCC:
2492                 case OP_IADDCC:
2493                         sparc_add (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2494                         break;
2495                 case CEE_ADD:
2496                 case OP_IADD:
2497                         sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2498                         break;
2499                 case OP_ADDCC_IMM:
2500                 case OP_ADD_IMM:
2501                 case OP_IADD_IMM:
2502                         /* according to inssel-long32.brg, this should set cc */
2503                         EMIT_ALU_IMM (ins, add, TRUE);
2504                         break;
2505                 case OP_ADC:
2506                 case OP_IADC:
2507                         /* according to inssel-long32.brg, this should set cc */
2508                         sparc_addx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2509                         break;
2510                 case OP_ADC_IMM:
2511                 case OP_IADC_IMM:
2512                         EMIT_ALU_IMM (ins, addx, TRUE);
2513                         break;
2514                 case OP_SUBCC:
2515                 case OP_ISUBCC:
2516                         sparc_sub (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2517                         break;
2518                 case CEE_SUB:
2519                 case OP_ISUB:
2520                         sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2521                         break;
2522                 case OP_SUBCC_IMM:
2523                 case OP_SUB_IMM:
2524                 case OP_ISUB_IMM:
2525                         /* according to inssel-long32.brg, this should set cc */
2526                         EMIT_ALU_IMM (ins, sub, TRUE);
2527                         break;
2528                 case OP_SBB:
2529                 case OP_ISBB:
2530                         /* according to inssel-long32.brg, this should set cc */
2531                         sparc_subx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2532                         break;
2533                 case OP_SBB_IMM:
2534                 case OP_ISBB_IMM:
2535                         EMIT_ALU_IMM (ins, subx, TRUE);
2536                         break;
2537                 case CEE_AND:
2538                 case OP_IAND:
2539                         sparc_and (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2540                         break;
2541                 case OP_AND_IMM:
2542                 case OP_IAND_IMM:
2543                         EMIT_ALU_IMM (ins, and, FALSE);
2544                         break;
2545                 case CEE_DIV:
2546                 case OP_IDIV:
2547                         /* Sign extend sreg1 into %y */
2548                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2549                         sparc_wry (code, sparc_o7, sparc_g0);
2550                         sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2551                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2552                         break;
2553                 case CEE_DIV_UN:
2554                 case OP_IDIV_UN:
2555                         sparc_wry (code, sparc_g0, sparc_g0);
2556                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2557                         break;
2558                 case OP_DIV_IMM: {
2559                         int i, imm;
2560
2561                         /* Transform division into a shift */
2562                         for (i = 1; i < 30; ++i) {
2563                                 imm = (1 << i);
2564                                 if (ins->inst_imm == imm)
2565                                         break;
2566                         }
2567                         if (i < 30) {
2568                                 if (i == 1) {
2569                                         /* gcc 2.95.3 */
2570                                         sparc_srl_imm (code, ins->sreg1, 31, sparc_o7);
2571                                         sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2572                                         sparc_sra_imm (code, ins->dreg, 1, ins->dreg);
2573                                 }
2574                                 else {
2575                                         /* http://compilers.iecc.com/comparch/article/93-04-079 */
2576                                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2577                                         sparc_srl_imm (code, sparc_o7, 32 - i, sparc_o7);
2578                                         sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2579                                         sparc_sra_imm (code, ins->dreg, i, ins->dreg);
2580                                 }
2581                         }
2582                         else {
2583                                 /* Sign extend sreg1 into %y */
2584                                 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2585                                 sparc_wry (code, sparc_o7, sparc_g0);
2586                                 EMIT_ALU_IMM (ins, sdiv, TRUE);
2587                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2588                         }
2589                         break;
2590                 }
2591                 case CEE_REM:
2592                 case OP_IREM:
2593                         /* Sign extend sreg1 into %y */
2594                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2595                         sparc_wry (code, sparc_o7, sparc_g0);
2596                         sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, sparc_o7);
2597                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2598                         sparc_smul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2599                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2600                         break;
2601                 case CEE_REM_UN:
2602                 case OP_IREM_UN:
2603                         sparc_wry (code, sparc_g0, sparc_g0);
2604                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2605                         sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2606                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2607                         break;
2608                 case OP_REM_IMM:
2609                 case OP_IREM_IMM:
2610                         /* Sign extend sreg1 into %y */
2611                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2612                         sparc_wry (code, sparc_o7, sparc_g0);
2613                         if (!sparc_is_imm13 (ins->inst_imm)) {
2614                                 sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
2615                                 sparc_sdiv (code, TRUE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
2616                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2617                                 sparc_smul (code, FALSE, sparc_o7, GP_SCRATCH_REG, sparc_o7);
2618                         }
2619                         else {
2620                                 sparc_sdiv_imm (code, TRUE, ins->sreg1, ins->inst_imm, sparc_o7);
2621                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2622                                 sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
2623                         }
2624                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2625                         break;
2626                 case CEE_OR:
2627                 case OP_IOR:
2628                         sparc_or (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2629                         break;
2630                 case OP_OR_IMM:
2631                 case OP_IOR_IMM:
2632                         EMIT_ALU_IMM (ins, or, FALSE);
2633                         break;
2634                 case CEE_XOR:
2635                 case OP_IXOR:
2636                         sparc_xor (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2637                         break;
2638                 case OP_XOR_IMM:
2639                 case OP_IXOR_IMM:
2640                         EMIT_ALU_IMM (ins, xor, FALSE);
2641                         break;
2642                 case CEE_SHL:
2643                 case OP_ISHL:
2644                         sparc_sll (code, ins->sreg1, ins->sreg2, ins->dreg);
2645                         break;
2646                 case OP_SHL_IMM:
2647                 case OP_ISHL_IMM:
2648                         if (ins->inst_imm < (1 << 5))
2649                                 sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2650                         else {
2651                                 sparc_set (code, ins->inst_imm, sparc_o7);
2652                                 sparc_sll (code, ins->sreg1, sparc_o7, ins->dreg);
2653                         }
2654                         break;
2655                 case CEE_SHR:
2656                 case OP_ISHR:
2657                         sparc_sra (code, ins->sreg1, ins->sreg2, ins->dreg);
2658                         break;
2659                 case OP_ISHR_IMM:
2660                 case OP_SHR_IMM:
2661                         if (ins->inst_imm < (1 << 5))
2662                                 sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2663                         else {
2664                                 sparc_set (code, ins->inst_imm, sparc_o7);
2665                                 sparc_sra (code, ins->sreg1, sparc_o7, ins->dreg);
2666                         }
2667                         break;
2668                 case OP_SHR_UN_IMM:
2669                 case OP_ISHR_UN_IMM:
2670                         if (ins->inst_imm < (1 << 5))
2671                                 sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2672                         else {
2673                                 sparc_set (code, ins->inst_imm, sparc_o7);
2674                                 sparc_srl (code, ins->sreg1, sparc_o7, ins->dreg);
2675                         }
2676                         break;
2677                 case CEE_SHR_UN:
2678                 case OP_ISHR_UN:
2679                         sparc_srl (code, ins->sreg1, ins->sreg2, ins->dreg);
2680                         break;
2681                 case OP_LSHL:
2682                         sparc_sllx (code, ins->sreg1, ins->sreg2, ins->dreg);
2683                         break;
2684                 case OP_LSHL_IMM:
2685                         if (ins->inst_imm < (1 << 6))
2686                                 sparc_sllx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2687                         else {
2688                                 sparc_set (code, ins->inst_imm, sparc_o7);
2689                                 sparc_sllx (code, ins->sreg1, sparc_o7, ins->dreg);
2690                         }
2691                         break;
2692                 case OP_LSHR:
2693                         sparc_srax (code, ins->sreg1, ins->sreg2, ins->dreg);
2694                         break;
2695                 case OP_LSHR_IMM:
2696                         if (ins->inst_imm < (1 << 6))
2697                                 sparc_srax_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2698                         else {
2699                                 sparc_set (code, ins->inst_imm, sparc_o7);
2700                                 sparc_srax (code, ins->sreg1, sparc_o7, ins->dreg);
2701                         }
2702                         break;
2703                 case OP_LSHR_UN:
2704                         sparc_srlx (code, ins->sreg1, ins->sreg2, ins->dreg);
2705                         break;
2706                 case OP_LSHR_UN_IMM:
2707                         if (ins->inst_imm < (1 << 6))
2708                                 sparc_srlx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2709                         else {
2710                                 sparc_set (code, ins->inst_imm, sparc_o7);
2711                                 sparc_srlx (code, ins->sreg1, sparc_o7, ins->dreg);
2712                         }
2713                         break;
2714                 case CEE_NOT:
2715                 case OP_INOT:
2716                         /* can't use sparc_not */
2717                         sparc_xnor (code, FALSE, ins->sreg1, sparc_g0, ins->dreg);
2718                         break;
2719                 case CEE_NEG:
2720                 case OP_INEG:
2721                         /* can't use sparc_neg */
2722                         sparc_sub (code, FALSE, sparc_g0, ins->sreg1, ins->dreg);
2723                         break;
2724                 case CEE_MUL:
2725                 case OP_IMUL:
2726                         sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2727                         break;
2728                 case OP_IMUL_IMM:
2729                 case OP_MUL_IMM: {
2730                         int i, imm;
2731
2732                         if ((ins->inst_imm == 1) && (ins->sreg1 == ins->dreg))
2733                                 break;
2734
2735                         /* Transform multiplication into a shift */
2736                         for (i = 0; i < 30; ++i) {
2737                                 imm = (1 << i);
2738                                 if (ins->inst_imm == imm)
2739                                         break;
2740                         }
2741                         if (i < 30)
2742                                 sparc_sll_imm (code, ins->sreg1, i, ins->dreg);
2743                         else
2744                                 EMIT_ALU_IMM (ins, smul, FALSE);
2745                         break;
2746                 }
2747                 case CEE_MUL_OVF:
2748                 case OP_IMUL_OVF:
2749                         sparc_smul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2750                         sparc_rdy (code, sparc_g1);
2751                         sparc_sra_imm (code, ins->dreg, 31, sparc_o7);
2752                         sparc_cmp (code, sparc_g1, sparc_o7);
2753                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2754                         break;
2755                 case CEE_MUL_OVF_UN:
2756                 case OP_IMUL_OVF_UN:
2757                         sparc_umul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2758                         sparc_rdy (code, sparc_o7);
2759                         sparc_cmp (code, sparc_o7, sparc_g0);
2760                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2761                         break;
2762                 case OP_ICONST:
2763                 case OP_SETREGIMM:
2764                         sparc_set (code, ins->inst_c0, ins->dreg);
2765                         break;
2766                 case OP_I8CONST:
2767                         sparc_set (code, ins->inst_l, ins->dreg);
2768                         break;
2769                 case OP_AOTCONST:
2770                         mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2771                         sparc_set_template (code, ins->dreg);
2772                         break;
2773                 case CEE_CONV_I4:
2774                 case CEE_CONV_U4:
2775                 case OP_MOVE:
2776                 case OP_SETREG:
2777                         if (ins->sreg1 != ins->dreg)
2778                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2779                         break;
2780                 case OP_SETFREG:
2781                         /* Only used on V9 */
2782                         if (ins->sreg1 != ins->dreg)
2783                                 sparc_fmovd (code, ins->sreg1, ins->dreg);
2784                         break;
2785                 case OP_SPARC_SETFREG_FLOAT:
2786                         /* Only used on V9 */
2787                         sparc_fdtos (code, ins->sreg1, ins->dreg);
2788                         break;
2789                 case CEE_JMP:
2790                         if (cfg->method->save_lmf)
2791                                 NOT_IMPLEMENTED;
2792
2793                         code = emit_load_volatile_arguments (cfg, code);
2794                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2795                         sparc_set_template (code, sparc_o7);
2796                         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_g0);
2797                         /* Restore parent frame in delay slot */
2798                         sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
2799                         break;
2800                 case OP_CHECK_THIS:
2801                         /* ensure ins->sreg1 is not NULL */
2802                         sparc_ld_imm (code, ins->sreg1, 0, sparc_g0);
2803                         break;
2804                 case OP_ARGLIST:
2805                         sparc_add_imm (code, FALSE, sparc_fp, cfg->sig_cookie, sparc_o7);
2806                         sparc_sti_imm (code, sparc_o7, ins->sreg1, 0);
2807                         break;
2808                 case OP_FCALL:
2809                 case OP_LCALL:
2810                 case OP_VCALL:
2811                 case OP_VOIDCALL:
2812                 case CEE_CALL:
2813                         call = (MonoCallInst*)ins;
2814                         g_assert (!call->virtual);
2815                         code = emit_save_sp_to_lmf (cfg, code);
2816                         if (ins->flags & MONO_INST_HAS_METHOD)
2817                             code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2818                         else
2819                             code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2820
2821                         code = emit_vret_token (ins, code);
2822                         code = emit_move_return_value (ins, code);
2823                         break;
2824                 case OP_FCALL_REG:
2825                 case OP_LCALL_REG:
2826                 case OP_VCALL_REG:
2827                 case OP_VOIDCALL_REG:
2828                 case OP_CALL_REG:
2829                         call = (MonoCallInst*)ins;
2830                         code = emit_save_sp_to_lmf (cfg, code);
2831                         sparc_jmpl (code, ins->sreg1, sparc_g0, sparc_callsite);
2832                         /*
2833                          * We emit a special kind of nop in the delay slot to tell the
2834                          * trampoline code that this is a virtual call, thus an unbox
2835                          * trampoline might need to be called.
2836                          */
2837                         if (call->virtual)
2838                                 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2839                         else
2840                                 sparc_nop (code);
2841
2842                         code = emit_vret_token (ins, code);
2843                         code = emit_move_return_value (ins, code);
2844                         break;
2845                 case OP_FCALL_MEMBASE:
2846                 case OP_LCALL_MEMBASE:
2847                 case OP_VCALL_MEMBASE:
2848                 case OP_VOIDCALL_MEMBASE:
2849                 case OP_CALL_MEMBASE:
2850                         call = (MonoCallInst*)ins;
2851                         code = emit_save_sp_to_lmf (cfg, code);
2852                         if (sparc_is_imm13 (ins->inst_offset)) {
2853                                 sparc_ldi_imm (code, ins->inst_basereg, ins->inst_offset, sparc_o7);
2854                         } else {
2855                                 sparc_set (code, ins->inst_offset, sparc_o7);
2856                                 sparc_ldi (code, ins->inst_basereg, sparc_o7, sparc_o7);
2857                         }
2858                         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_callsite);
2859                         if (call->virtual)
2860                                 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2861                         else
2862                                 sparc_nop (code);
2863
2864                         code = emit_vret_token (ins, code);
2865                         code = emit_move_return_value (ins, code);
2866                         break;
2867                 case OP_SETFRET:
2868                         if (mono_method_signature (cfg->method)->ret->type == MONO_TYPE_R4)
2869                                 sparc_fdtos (code, ins->sreg1, sparc_f0);
2870                         else {
2871 #ifdef SPARCV9
2872                                 sparc_fmovd (code, ins->sreg1, ins->dreg);
2873 #else
2874                                 /* FIXME: Why not use fmovd ? */
2875                                 sparc_fmovs (code, ins->sreg1, ins->dreg);
2876                                 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2877 #endif
2878                         }
2879                         break;
2880                 case OP_OUTARG:
2881                         g_assert_not_reached ();
2882                         break;
2883                 case OP_LOCALLOC: {
2884                         guint32 size_reg;
2885
2886 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2887                         /* Perform stack touching */
2888                         NOT_IMPLEMENTED;
2889 #endif
2890
2891                         /* Keep alignment */
2892                         sparc_add_imm (code, FALSE, ins->sreg1, MONO_ARCH_FRAME_ALIGNMENT - 1, ins->dreg);
2893                         sparc_set (code, ~(MONO_ARCH_FRAME_ALIGNMENT - 1), sparc_o7);
2894                         sparc_and (code, FALSE, ins->dreg, sparc_o7, ins->dreg);
2895
2896                         if ((ins->flags & MONO_INST_INIT) && (ins->sreg1 == ins->dreg)) {
2897 #ifdef SPARCV9
2898                                 size_reg = sparc_g4;
2899 #else
2900                                 size_reg = sparc_g1;
2901 #endif
2902                                 sparc_mov_reg_reg (code, ins->dreg, size_reg);
2903                         }
2904                         else
2905                                 size_reg = ins->sreg1;
2906
2907                         sparc_sub (code, FALSE, sparc_sp, ins->dreg, ins->dreg);
2908                         /* Keep %sp valid at all times */
2909                         sparc_mov_reg_reg (code, ins->dreg, sparc_sp);
2910                         g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
2911                         sparc_add_imm (code, FALSE, ins->dreg, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
2912
2913                         if (ins->flags & MONO_INST_INIT) {
2914                                 guint32 *br [3];
2915                                 /* Initialize memory region */
2916                                 sparc_cmp_imm (code, size_reg, 0);
2917                                 br [0] = code;
2918                                 sparc_branch (code, 0, sparc_be, 0);
2919                                 /* delay slot */
2920                                 sparc_set (code, 0, sparc_o7);
2921                                 sparc_sub_imm (code, 0, size_reg, sparcv9 ? 8 : 4, size_reg);
2922                                 /* start of loop */
2923                                 br [1] = code;
2924                                 if (sparcv9)
2925                                         sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
2926                                 else
2927                                         sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
2928                                 sparc_cmp (code, sparc_o7, size_reg);
2929                                 br [2] = code;
2930                                 sparc_branch (code, 0, sparc_bl, 0);
2931                                 sparc_patch (br [2], br [1]);
2932                                 /* delay slot */
2933                                 sparc_add_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2934                                 sparc_patch (br [0], code);
2935                         }
2936                         break;
2937                 }
2938                 case OP_SPARC_LOCALLOC_IMM: {
2939                         gint32 offset = ins->inst_c0;
2940
2941 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2942                         /* Perform stack touching */
2943                         NOT_IMPLEMENTED;
2944 #endif
2945
2946                         offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
2947                         if (sparc_is_imm13 (offset))
2948                                 sparc_sub_imm (code, FALSE, sparc_sp, offset, sparc_sp);
2949                         else {
2950                                 sparc_set (code, offset, sparc_o7);
2951                                 sparc_sub (code, FALSE, sparc_sp, sparc_o7, sparc_sp);
2952                         }
2953                         g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
2954                         sparc_add_imm (code, FALSE, sparc_sp, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
2955                         if ((ins->flags & MONO_INST_INIT) && (offset > 0)) {
2956                                 guint32 *br [2];
2957                                 int i;
2958
2959                                 if (offset <= 16) {
2960                                         i = 0;
2961                                         while (i < offset) {
2962                                                 if (sparcv9) {
2963                                                         sparc_stx_imm (code, sparc_g0, ins->dreg, i);
2964                                                         i += 8;
2965                                                 }
2966                                                 else {
2967                                                         sparc_st_imm (code, sparc_g0, ins->dreg, i);
2968                                                         i += 4;
2969                                                 }
2970                                         }
2971                                 }
2972                                 else {
2973                                         sparc_set (code, offset, sparc_o7);
2974                                         sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2975                                         /* beginning of loop */
2976                                         br [0] = code;
2977                                         if (sparcv9)
2978                                                 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
2979                                         else
2980                                                 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
2981                                         sparc_cmp_imm (code, sparc_o7, 0);
2982                                         br [1] = code;
2983                                         sparc_branch (code, 0, sparc_bne, 0);
2984                                         /* delay slot */
2985                                         sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2986                                         sparc_patch (br [1], br [0]);
2987                                 }
2988                         }
2989                         break;
2990                 }
2991                 case CEE_RET:
2992                         /* The return is done in the epilog */
2993                         g_assert_not_reached ();
2994                         break;
2995                 case CEE_THROW:
2996                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2997                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2998                                              (gpointer)"mono_arch_throw_exception");
2999                         EMIT_CALL ();
3000                         break;
3001                 case OP_RETHROW:
3002                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3003                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3004                                              (gpointer)"mono_arch_rethrow_exception");
3005                         EMIT_CALL ();
3006                         break;
3007                 case OP_START_HANDLER: {
3008                         /*
3009                          * The START_HANDLER instruction marks the beginning of a handler
3010                          * block. It is called using a call instruction, so %o7 contains
3011                          * the return address. Since the handler executes in the same stack
3012              * frame as the method itself, we can't use save/restore to save
3013                          * the return address. Instead, we save it into a dedicated
3014                          * variable.
3015                          */
3016                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3017                         if (!sparc_is_imm13 (spvar->inst_offset)) {
3018                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3019                                 sparc_sti (code, sparc_o7, spvar->inst_basereg, GP_SCRATCH_REG);
3020                         }
3021                         else
3022                                 sparc_sti_imm (code, sparc_o7, spvar->inst_basereg, spvar->inst_offset);
3023                         break;
3024                 }
3025                 case OP_ENDFILTER: {
3026                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3027                         if (!sparc_is_imm13 (spvar->inst_offset)) {
3028                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3029                                 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
3030                         }
3031                         else
3032                                 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3033                         sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3034                         /* Delay slot */
3035                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3036                         break;
3037                 }
3038                 case CEE_ENDFINALLY: {
3039                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3040                         if (!sparc_is_imm13 (spvar->inst_offset)) {
3041                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3042                                 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
3043                         }
3044                         else
3045                                 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3046                         sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3047                         sparc_nop (code);
3048                         break;
3049                 }
3050                 case OP_CALL_HANDLER:
3051                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3052                         /* This is a jump inside the method, so call_simple works even on V9 */
3053                         sparc_call_simple (code, 0);
3054                         sparc_nop (code);
3055                         break;
3056                 case OP_LABEL:
3057                         ins->inst_c0 = (guint8*)code - cfg->native_code;
3058                         break;
3059                 case CEE_BR:
3060                         //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
3061                         if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
3062                                 break;
3063                         if (ins->flags & MONO_INST_BRLABEL) {
3064                                 if (ins->inst_i0->inst_c0) {
3065                                         gint32 disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2;
3066                                         g_assert (sparc_is_imm22 (disp));
3067                                         sparc_branch (code, 1, sparc_ba, disp);
3068                                 } else {
3069                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
3070                                         sparc_branch (code, 1, sparc_ba, 0);
3071                                 }
3072                         } else {
3073                                 if (ins->inst_target_bb->native_offset) {
3074                                         gint32 disp = (ins->inst_target_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2;
3075                                         g_assert (sparc_is_imm22 (disp));
3076                                         sparc_branch (code, 1, sparc_ba, disp);
3077                                 } else {
3078                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3079                                         sparc_branch (code, 1, sparc_ba, 0);
3080                                 }
3081                         }
3082                         sparc_nop (code);
3083                         break;
3084                 case OP_BR_REG:
3085                         sparc_jmp (code, ins->sreg1, sparc_g0);
3086                         sparc_nop (code);
3087                         break;
3088                 case OP_CEQ:
3089                 case OP_CLT:
3090                 case OP_CLT_UN:
3091                 case OP_CGT:
3092                 case OP_CGT_UN:
3093                         if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3094                                 sparc_clr_reg (code, ins->dreg);
3095                                 sparc_movcc_imm (code, sparc_xcc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3096                         }
3097                         else {
3098                                 sparc_clr_reg (code, ins->dreg);
3099 #ifdef SPARCV9
3100                                 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), DEFAULT_ICC, 0, 2);
3101 #else
3102                                 sparc_branch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3103 #endif
3104                                 /* delay slot */
3105                                 sparc_set (code, 1, ins->dreg);
3106                         }
3107                         break;
3108                 case OP_ICEQ:
3109                 case OP_ICLT:
3110                 case OP_ICLT_UN:
3111                 case OP_ICGT:
3112                 case OP_ICGT_UN:
3113                     if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3114                                 sparc_clr_reg (code, ins->dreg);
3115                                 sparc_movcc_imm (code, sparc_icc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3116                     }
3117                     else {
3118                         sparc_clr_reg (code, ins->dreg);
3119                         sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), sparc_icc_short, 0, 2);
3120                         /* delay slot */
3121                         sparc_set (code, 1, ins->dreg);
3122                     }
3123                     break;
3124                 case OP_COND_EXC_EQ:
3125                 case OP_COND_EXC_NE_UN:
3126                 case OP_COND_EXC_LT:
3127                 case OP_COND_EXC_LT_UN:
3128                 case OP_COND_EXC_GT:
3129                 case OP_COND_EXC_GT_UN:
3130                 case OP_COND_EXC_GE:
3131                 case OP_COND_EXC_GE_UN:
3132                 case OP_COND_EXC_LE:
3133                 case OP_COND_EXC_LE_UN:
3134                 case OP_COND_EXC_OV:
3135                 case OP_COND_EXC_NO:
3136                 case OP_COND_EXC_C:
3137                 case OP_COND_EXC_NC:
3138                         EMIT_COND_SYSTEM_EXCEPTION (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1);
3139                         break;
3140                 case OP_SPARC_COND_EXC_EQZ:
3141                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brz, ins->inst_p1);
3142                         break;
3143                 case OP_SPARC_COND_EXC_GEZ:
3144                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgez, ins->inst_p1);
3145                         break;
3146                 case OP_SPARC_COND_EXC_GTZ:
3147                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgz, ins->inst_p1);
3148                         break;
3149                 case OP_SPARC_COND_EXC_LEZ:
3150                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlez, ins->inst_p1);
3151                         break;
3152                 case OP_SPARC_COND_EXC_LTZ:
3153                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlz, ins->inst_p1);
3154                         break;
3155                 case OP_SPARC_COND_EXC_NEZ:
3156                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brnz, ins->inst_p1);
3157                         break;
3158                 case OP_COND_EXC_IOV:
3159                 case OP_COND_EXC_IC:
3160                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1, TRUE, sparc_icc_short);
3161                         break;
3162                 case CEE_BEQ:
3163                 case CEE_BNE_UN:
3164                 case CEE_BLT:
3165                 case CEE_BLT_UN:
3166                 case CEE_BGT:
3167                 case CEE_BGT_UN:
3168                 case CEE_BGE:
3169                 case CEE_BGE_UN:
3170                 case CEE_BLE:
3171                 case CEE_BLE_UN: {
3172                         if (sparcv9)
3173                                 EMIT_COND_BRANCH_PREDICTED (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3174                         else
3175                                 EMIT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3176                         break;
3177                 }
3178
3179                 case OP_IBEQ:
3180                 case OP_IBNE_UN:
3181                 case OP_IBLT:
3182                 case OP_IBLT_UN:
3183                 case OP_IBGT:
3184                 case OP_IBGT_UN:
3185                 case OP_IBGE:
3186                 case OP_IBGE_UN:
3187                 case OP_IBLE:
3188                 case OP_IBLE_UN: {
3189                         /* Only used on V9 */
3190                         EMIT_COND_BRANCH_ICC (ins, opcode_to_sparc_cond (ins->opcode), 1, 1, sparc_icc_short);
3191                         break;
3192                 }
3193
3194                 case OP_SPARC_BRZ:
3195                         EMIT_COND_BRANCH_BPR (ins, brz, 1, 1, 1);
3196                         break;
3197                 case OP_SPARC_BRLEZ:
3198                         EMIT_COND_BRANCH_BPR (ins, brlez, 1, 1, 1);
3199                         break;
3200                 case OP_SPARC_BRLZ:
3201                         EMIT_COND_BRANCH_BPR (ins, brlz, 1, 1, 1);
3202                         break;
3203                 case OP_SPARC_BRNZ:
3204                         EMIT_COND_BRANCH_BPR (ins, brnz, 1, 1, 1);
3205                         break;
3206                 case OP_SPARC_BRGZ:
3207                         EMIT_COND_BRANCH_BPR (ins, brgz, 1, 1, 1);
3208                         break;
3209                 case OP_SPARC_BRGEZ:
3210                         EMIT_COND_BRANCH_BPR (ins, brgez, 1, 1, 1);
3211                         break;
3212
3213                 /* floating point opcodes */
3214                 case OP_R8CONST:
3215                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
3216 #ifdef SPARCV9
3217                         sparc_set_template (code, sparc_o7);
3218 #else
3219                         sparc_sethi (code, 0, sparc_o7);
3220 #endif
3221                         sparc_lddf_imm (code, sparc_o7, 0, ins->dreg);
3222                         break;
3223                 case OP_R4CONST:
3224                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
3225 #ifdef SPARCV9
3226                         sparc_set_template (code, sparc_o7);
3227 #else
3228                         sparc_sethi (code, 0, sparc_o7);
3229 #endif
3230                         sparc_ldf_imm (code, sparc_o7, 0, FP_SCRATCH_REG);
3231
3232                         /* Extend to double */
3233                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3234                         break;
3235                 case OP_STORER8_MEMBASE_REG:
3236                         if (!sparc_is_imm13 (ins->inst_offset + 4)) {
3237                                 sparc_set (code, ins->inst_offset, sparc_o7);
3238                                 /* SPARCV9 handles misaligned fp loads/stores */
3239                                 if (!v64 && (ins->inst_offset % 8)) {
3240                                         /* Misaligned */
3241                                         sparc_add (code, FALSE, ins->inst_destbasereg, sparc_o7, sparc_o7);
3242                                         sparc_stf (code, ins->sreg1, sparc_o7, sparc_g0);
3243                                         sparc_stf_imm (code, ins->sreg1 + 1, sparc_o7, 4);
3244                                 } else
3245                                         sparc_stdf (code, ins->sreg1, ins->inst_destbasereg, sparc_o7);
3246                         }
3247                         else {
3248                                 if (!v64 && (ins->inst_offset % 8)) {
3249                                         /* Misaligned */
3250                                         sparc_stf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3251                                         sparc_stf_imm (code, ins->sreg1 + 1, ins->inst_destbasereg, ins->inst_offset + 4);
3252                                 } else
3253                                         sparc_stdf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3254                         }
3255                         break;
3256                 case OP_LOADR8_MEMBASE:
3257                         EMIT_LOAD_MEMBASE (ins, lddf);
3258                         break;
3259                 case OP_STORER4_MEMBASE_REG:
3260                         /* This requires a double->single conversion */
3261                         sparc_fdtos (code, ins->sreg1, FP_SCRATCH_REG);
3262                         if (!sparc_is_imm13 (ins->inst_offset)) {
3263                                 sparc_set (code, ins->inst_offset, sparc_o7);
3264                                 sparc_stf (code, FP_SCRATCH_REG, ins->inst_destbasereg, sparc_o7);
3265                         }
3266                         else
3267                                 sparc_stf_imm (code, FP_SCRATCH_REG, ins->inst_destbasereg, ins->inst_offset);
3268                         break;
3269                 case OP_LOADR4_MEMBASE: {
3270                         /* ldf needs a single precision register */
3271                         int dreg = ins->dreg;
3272                         ins->dreg = FP_SCRATCH_REG;
3273                         EMIT_LOAD_MEMBASE (ins, ldf);
3274                         ins->dreg = dreg;
3275                         /* Extend to double */
3276                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3277                         break;
3278                 }
3279                 case OP_FMOVE:
3280 #ifdef SPARCV9
3281                         sparc_fmovd (code, ins->sreg1, ins->dreg);
3282 #else
3283                         sparc_fmovs (code, ins->sreg1, ins->dreg);
3284                         sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3285 #endif
3286                         break;
3287                 case CEE_CONV_R4: {
3288                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3289 #ifdef SPARCV9
3290                         if (!sparc_is_imm13 (offset)) {
3291                                 sparc_set (code, offset, sparc_o7);
3292                                 sparc_stx (code, ins->sreg1, sparc_sp, offset);
3293                                 sparc_lddf (code, sparc_sp, offset, FP_SCRATCH_REG);
3294                         } else {
3295                                 sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3296                                 sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3297                         }
3298                         sparc_fxtos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3299 #else
3300                         if (!sparc_is_imm13 (offset)) {
3301                                 sparc_set (code, offset, sparc_o7);
3302                                 sparc_st (code, ins->sreg1, sparc_sp, sparc_o7);
3303                                 sparc_ldf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3304                         } else {
3305                                 sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3306                                 sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3307                         }
3308                         sparc_fitos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3309 #endif
3310                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3311                         break;
3312                 }
3313                 case CEE_CONV_R8: {
3314                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3315 #ifdef SPARCV9
3316                         if (!sparc_is_imm13 (offset)) {
3317                                 sparc_set (code, offset, sparc_o7);
3318                                 sparc_stx (code, ins->sreg1, sparc_sp, sparc_o7);
3319                                 sparc_lddf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3320                         } else {
3321                                 sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3322                                 sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3323                         }
3324                         sparc_fxtod (code, FP_SCRATCH_REG, ins->dreg);
3325 #else
3326                         if (!sparc_is_imm13 (offset)) {
3327                                 sparc_set (code, offset, sparc_o7);
3328                                 sparc_st (code, ins->sreg1, sparc_sp, sparc_o7);
3329                                 sparc_ldf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3330                         } else {
3331                                 sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3332                                 sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3333                         }
3334                         sparc_fitod (code, FP_SCRATCH_REG, ins->dreg);
3335 #endif
3336                         break;
3337                 }
3338                 case OP_FCONV_TO_I1:
3339                 case OP_FCONV_TO_U1:
3340                 case OP_FCONV_TO_I2:
3341                 case OP_FCONV_TO_U2:
3342 #ifndef SPARCV9
3343                 case OP_FCONV_TO_I:
3344                 case OP_FCONV_TO_U:
3345 #endif
3346                 case OP_FCONV_TO_I4:
3347                 case OP_FCONV_TO_U4: {
3348                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3349                         sparc_fdtoi (code, ins->sreg1, FP_SCRATCH_REG);
3350                         if (!sparc_is_imm13 (offset)) {
3351                                 sparc_set (code, offset, sparc_o7);
3352                                 sparc_stdf (code, FP_SCRATCH_REG, sparc_sp, sparc_o7);
3353                                 sparc_ld (code, sparc_sp, sparc_o7, ins->dreg);
3354                         } else {
3355                                 sparc_stdf_imm (code, FP_SCRATCH_REG, sparc_sp, offset);
3356                                 sparc_ld_imm (code, sparc_sp, offset, ins->dreg);
3357                         }
3358
3359                         switch (ins->opcode) {
3360                         case OP_FCONV_TO_I1:
3361                         case OP_FCONV_TO_U1:
3362                                 sparc_and_imm (code, 0, ins->dreg, 0xff, ins->dreg);
3363                                 break;
3364                         case OP_FCONV_TO_I2:
3365                         case OP_FCONV_TO_U2:
3366                                 sparc_set (code, 0xffff, sparc_o7);
3367                                 sparc_and (code, 0, ins->dreg, sparc_o7, ins->dreg);
3368                                 break;
3369                         default:
3370                                 break;
3371                         }
3372                         break;
3373                 }
3374                 case OP_FCONV_TO_I8:
3375                 case OP_FCONV_TO_U8:
3376                         /* Emulated */
3377                         g_assert_not_reached ();
3378                         break;
3379                 case CEE_CONV_R_UN:
3380                         /* Emulated */
3381                         g_assert_not_reached ();
3382                         break;
3383                 case OP_LCONV_TO_R_UN: {
3384                         /* Emulated */
3385                         g_assert_not_reached ();
3386                         break;
3387                 }
3388                 case OP_LCONV_TO_OVF_I: {
3389                         guint32 *br [3], *label [1];
3390
3391                         /*
3392                          * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3393                          */
3394                         sparc_cmp_imm (code, ins->sreg1, 0);
3395                         br [0] = code;
3396                         sparc_branch (code, 1, sparc_bneg, 0);
3397                         sparc_nop (code);
3398
3399                         /* positive */
3400                         /* ms word must be 0 */
3401                         sparc_cmp_imm (code, ins->sreg2, 0);
3402                         br [1] = code;
3403                         sparc_branch (code, 1, sparc_be, 0);
3404                         sparc_nop (code);
3405
3406                         label [0] = code;
3407
3408                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_ba, "OverflowException");
3409
3410                         /* negative */
3411                         sparc_patch (br [0], code);
3412
3413                         /* ms word must 0xfffffff */
3414                         sparc_cmp_imm (code, ins->sreg2, -1);
3415                         br [2] = code;
3416                         sparc_branch (code, 1, sparc_bne, 0);
3417                         sparc_nop (code);
3418                         sparc_patch (br [2], label [0]);
3419
3420                         /* Ok */
3421                         sparc_patch (br [1], code);
3422                         if (ins->sreg1 != ins->dreg)
3423                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
3424                         break;
3425                 }
3426                 case OP_FADD:
3427                         sparc_faddd (code, ins->sreg1, ins->sreg2, ins->dreg);
3428                         break;
3429                 case OP_FSUB:
3430                         sparc_fsubd (code, ins->sreg1, ins->sreg2, ins->dreg);
3431                         break;
3432                 case OP_FMUL:
3433                         sparc_fmuld (code, ins->sreg1, ins->sreg2, ins->dreg);
3434                         break;
3435                 case OP_FDIV:
3436                         sparc_fdivd (code, ins->sreg1, ins->sreg2, ins->dreg);
3437                         break;
3438                 case OP_FNEG:
3439 #ifdef SPARCV9
3440                         sparc_fnegd (code, ins->sreg1, ins->dreg);
3441 #else
3442                         /* FIXME: why don't use fnegd ? */
3443                         sparc_fnegs (code, ins->sreg1, ins->dreg);
3444 #endif
3445                         break;
3446                 case OP_FREM:
3447                         sparc_fdivd (code, ins->sreg1, ins->sreg2, FP_SCRATCH_REG);
3448                         sparc_fmuld (code, ins->sreg2, FP_SCRATCH_REG, FP_SCRATCH_REG);
3449                         sparc_fsubd (code, ins->sreg1, FP_SCRATCH_REG, ins->dreg);
3450                         break;
3451                 case OP_FCOMPARE:
3452                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3453                         break;
3454                 case OP_FCEQ:
3455                 case OP_FCLT:
3456                 case OP_FCLT_UN:
3457                 case OP_FCGT:
3458                 case OP_FCGT_UN:
3459                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3460                         sparc_clr_reg (code, ins->dreg);
3461                         switch (ins->opcode) {
3462                         case OP_FCLT_UN:
3463                         case OP_FCGT_UN:
3464                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 4);
3465                                 /* delay slot */
3466                                 sparc_set (code, 1, ins->dreg);
3467                                 sparc_fbranch (code, 1, sparc_fbu, 2);
3468                                 /* delay slot */
3469                                 sparc_set (code, 1, ins->dreg);
3470                                 break;
3471                         default:
3472                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3473                                 /* delay slot */
3474                                 sparc_set (code, 1, ins->dreg);
3475                         }
3476                         break;
3477                 case OP_FBEQ:
3478                 case OP_FBLT:
3479                 case OP_FBGT:
3480                         EMIT_FLOAT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3481                         break;
3482                 case OP_FBGE: {
3483                         /* clt.un + brfalse */
3484                         guint32 *p = code;
3485                         sparc_fbranch (code, 1, sparc_fbul, 0);
3486                         /* delay slot */
3487                         sparc_nop (code);
3488                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3489                         sparc_patch (p, (guint8*)code);
3490                         break;
3491                 }
3492                 case OP_FBLE: {
3493                         /* cgt.un + brfalse */
3494                         guint32 *p = code;
3495                         sparc_fbranch (code, 1, sparc_fbug, 0);
3496                         /* delay slot */
3497                         sparc_nop (code);
3498                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3499                         sparc_patch (p, (guint8*)code);
3500                         break;
3501                 }
3502                 case OP_FBNE_UN:
3503                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbne, 1, 1);
3504                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3505                         break;
3506                 case OP_FBLT_UN:
3507                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbl, 1, 1);
3508                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3509                         break;
3510                 case OP_FBGT_UN:
3511                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbg, 1, 1);
3512                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3513                         break;
3514                 case OP_FBGE_UN:
3515                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbge, 1, 1);
3516                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3517                         break;
3518                 case OP_FBLE_UN:
3519                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fble, 1, 1);
3520                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3521                         break;
3522                 case CEE_CKFINITE: {
3523                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3524                         if (!sparc_is_imm13 (offset)) {
3525                                 sparc_set (code, offset, sparc_o7);
3526                                 sparc_stdf (code, ins->sreg1, sparc_sp, sparc_o7);
3527                                 sparc_lduh (code, sparc_sp, sparc_o7, sparc_o7);
3528                         } else {
3529                                 sparc_stdf_imm (code, ins->sreg1, sparc_sp, offset);
3530                                 sparc_lduh_imm (code, sparc_sp, offset, sparc_o7);
3531                         }
3532                         sparc_srl_imm (code, sparc_o7, 4, sparc_o7);
3533                         sparc_and_imm (code, FALSE, sparc_o7, 2047, sparc_o7);
3534                         sparc_cmp_imm (code, sparc_o7, 2047);
3535                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_be, "ArithmeticException");
3536 #ifdef SPARCV9
3537                         sparc_fmovd (code, ins->sreg1, ins->dreg);
3538 #else
3539                         sparc_fmovs (code, ins->sreg1, ins->dreg);
3540                         sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3541 #endif
3542                         break;
3543                 }
3544
3545                 case OP_MEMORY_BARRIER:
3546                         sparc_membar (code, sparc_membar_all);
3547                         break;
3548
3549                 default:
3550 #ifdef __GNUC__
3551                         g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
3552 #else
3553                         g_warning ("%s:%d: unknown opcode %s\n", __FILE__, __LINE__, mono_inst_name (ins->opcode));
3554 #endif
3555                         g_assert_not_reached ();
3556                 }
3557
3558                 if ((((guint8*)code) - code_start) > max_len) {
3559                         g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3560                                    mono_inst_name (ins->opcode), max_len, ((guint8*)code) - code_start);
3561                         g_assert_not_reached ();
3562                 }
3563
3564                 cpos += max_len;
3565
3566                 last_ins = ins;
3567
3568                 ins = ins->next;
3569         }
3570
3571         cfg->code_len = (guint8*)code - cfg->native_code;
3572 }
3573
3574 void
3575 mono_arch_register_lowlevel_calls (void)
3576 {
3577         mono_register_jit_icall (mono_arch_break, "mono_arch_break", NULL, TRUE);
3578         mono_register_jit_icall (mono_arch_get_lmf_addr, "mono_arch_get_lmf_addr", NULL, TRUE);
3579 }
3580
3581 void
3582 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3583 {
3584         MonoJumpInfo *patch_info;
3585
3586         /* FIXME: Move part of this to arch independent code */
3587         for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3588                 unsigned char *ip = patch_info->ip.i + code;
3589                 gpointer target;
3590
3591                 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3592
3593                 switch (patch_info->type) {
3594                 case MONO_PATCH_INFO_NONE:
3595                         continue;
3596                 case MONO_PATCH_INFO_CLASS_INIT: {
3597                         guint32 *ip2 = (guint32*)ip;
3598                         /* Might already been changed to a nop */
3599 #ifdef SPARCV9
3600                         sparc_set_template (ip2, sparc_o7);
3601                         sparc_jmpl (ip2, sparc_o7, sparc_g0, sparc_o7);
3602 #else
3603                         sparc_call_simple (ip2, 0);
3604 #endif
3605                         break;
3606                 }
3607                 case MONO_PATCH_INFO_METHOD_JUMP: {
3608                         guint32 *ip2 = (guint32*)ip;
3609                         /* Might already been patched */
3610                         sparc_set_template (ip2, sparc_o7);
3611                         break;
3612                 }
3613                 default:
3614                         break;
3615                 }
3616                 sparc_patch ((guint32*)ip, target);
3617         }
3618 }
3619
3620 void*
3621 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3622 {
3623         int i;
3624         guint32 *code = (guint32*)p;
3625         MonoMethodSignature *sig = mono_method_signature (cfg->method);
3626         CallInfo *cinfo;
3627
3628         /* Save registers to stack */
3629         for (i = 0; i < 6; ++i)
3630                 sparc_sti_imm (code, sparc_i0 + i, sparc_fp, ARGS_OFFSET + (i * sizeof (gpointer)));
3631
3632         cinfo = get_call_info (sig, FALSE);
3633
3634         /* Save float regs on V9, since they are caller saved */
3635         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3636                 ArgInfo *ainfo = cinfo->args + i;
3637                 gint32 stack_offset;
3638
3639                 stack_offset = ainfo->offset + ARGS_OFFSET;
3640
3641                 if (ainfo->storage == ArgInFloatReg) {
3642                         if (!sparc_is_imm13 (stack_offset))
3643                                 NOT_IMPLEMENTED;
3644                         sparc_stf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3645                 }
3646                 else if (ainfo->storage == ArgInDoubleReg) {
3647                         /* The offset is guaranteed to be aligned by the ABI rules */
3648                         sparc_stdf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3649                 }
3650         }
3651
3652         sparc_set (code, cfg->method, sparc_o0);
3653         sparc_add_imm (code, FALSE, sparc_fp, MONO_SPARC_STACK_BIAS, sparc_o1);
3654
3655         mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
3656         EMIT_CALL ();
3657
3658         /* Restore float regs on V9 */
3659         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3660                 ArgInfo *ainfo = cinfo->args + i;
3661                 gint32 stack_offset;
3662
3663                 stack_offset = ainfo->offset + ARGS_OFFSET;
3664
3665                 if (ainfo->storage == ArgInFloatReg) {
3666                         if (!sparc_is_imm13 (stack_offset))
3667                                 NOT_IMPLEMENTED;
3668                         sparc_ldf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3669                 }
3670                 else if (ainfo->storage == ArgInDoubleReg) {
3671                         /* The offset is guaranteed to be aligned by the ABI rules */
3672                         sparc_lddf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3673                 }
3674         }
3675
3676         g_free (cinfo);
3677
3678         return code;
3679 }
3680
3681 enum {
3682         SAVE_NONE,
3683         SAVE_STRUCT,
3684         SAVE_ONE,
3685         SAVE_TWO,
3686         SAVE_FP
3687 };
3688
3689 void*
3690 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3691 {
3692         guint32 *code = (guint32*)p;
3693         int save_mode = SAVE_NONE;
3694         MonoMethod *method = cfg->method;
3695
3696         switch (mono_type_get_underlying_type (mono_method_signature (method)->ret)->type) {
3697         case MONO_TYPE_VOID:
3698                 /* special case string .ctor icall */
3699                 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
3700                         save_mode = SAVE_ONE;
3701                 else
3702                         save_mode = SAVE_NONE;
3703                 break;
3704         case MONO_TYPE_I8:
3705         case MONO_TYPE_U8:
3706 #ifdef SPARCV9
3707                 save_mode = SAVE_ONE;
3708 #else
3709                 save_mode = SAVE_TWO;
3710 #endif
3711                 break;
3712         case MONO_TYPE_R4:
3713         case MONO_TYPE_R8:
3714                 save_mode = SAVE_FP;
3715                 break;
3716         case MONO_TYPE_VALUETYPE:
3717                 save_mode = SAVE_STRUCT;
3718                 break;
3719         default:
3720                 save_mode = SAVE_ONE;
3721                 break;
3722         }
3723
3724         /* Save the result to the stack and also put it into the output registers */
3725
3726         switch (save_mode) {
3727         case SAVE_TWO:
3728                 /* V8 only */
3729                 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
3730                 sparc_st_imm (code, sparc_i0, sparc_fp, 72);
3731                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3732                 sparc_mov_reg_reg (code, sparc_i1, sparc_o2);
3733                 break;
3734         case SAVE_ONE:
3735                 sparc_sti_imm (code, sparc_i0, sparc_fp, ARGS_OFFSET);
3736                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3737                 break;
3738         case SAVE_FP:
3739 #ifdef SPARCV9
3740                 sparc_stdf_imm (code, sparc_f0, sparc_fp, ARGS_OFFSET);
3741 #else
3742                 sparc_stdf_imm (code, sparc_f0, sparc_fp, 72);
3743                 sparc_ld_imm (code, sparc_fp, 72, sparc_o1);
3744                 sparc_ld_imm (code, sparc_fp, 72 + 4, sparc_o2);
3745 #endif
3746                 break;
3747         case SAVE_STRUCT:
3748 #ifdef SPARCV9
3749                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3750 #else
3751                 sparc_ld_imm (code, sparc_fp, 64, sparc_o1);
3752 #endif
3753                 break;
3754         case SAVE_NONE:
3755         default:
3756                 break;
3757         }
3758
3759         sparc_set (code, cfg->method, sparc_o0);
3760
3761         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, func);
3762         EMIT_CALL ();
3763
3764         /* Restore result */
3765
3766         switch (save_mode) {
3767         case SAVE_TWO:
3768                 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
3769                 sparc_ld_imm (code, sparc_fp, 72, sparc_i0);
3770                 break;
3771         case SAVE_ONE:
3772                 sparc_ldi_imm (code, sparc_fp, ARGS_OFFSET, sparc_i0);
3773                 break;
3774         case SAVE_FP:
3775                 sparc_lddf_imm (code, sparc_fp, ARGS_OFFSET, sparc_f0);
3776                 break;
3777         case SAVE_NONE:
3778         default:
3779                 break;
3780         }
3781
3782         return code;
3783 }
3784
3785 guint8 *
3786 mono_arch_emit_prolog (MonoCompile *cfg)
3787 {
3788         MonoMethod *method = cfg->method;
3789         MonoMethodSignature *sig;
3790         MonoInst *inst;
3791         guint32 *code;
3792         CallInfo *cinfo;
3793         guint32 i, offset;
3794
3795         cfg->code_size = 256;
3796         cfg->native_code = g_malloc (cfg->code_size);
3797         code = (guint32*)cfg->native_code;
3798
3799         /* FIXME: Generate intermediate code instead */
3800
3801         offset = cfg->stack_offset;
3802         offset += (16 * sizeof (gpointer)); /* register save area */
3803 #ifndef SPARCV9
3804         offset += 4; /* struct/union return pointer */
3805 #endif
3806
3807         /* add parameter area size for called functions */
3808         if (cfg->param_area < (6 * sizeof (gpointer)))
3809                 /* Reserve space for the first 6 arguments even if it is unused */
3810                 offset += 6 * sizeof (gpointer);
3811         else
3812                 offset += cfg->param_area;
3813
3814         /* align the stack size */
3815         offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3816
3817         /*
3818          * localloc'd memory is stored between the local variables (whose
3819          * size is given by cfg->stack_offset), and between the space reserved
3820          * by the ABI.
3821          */
3822         cfg->arch.localloc_offset = offset - cfg->stack_offset;
3823
3824         cfg->stack_offset = offset;
3825
3826 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3827                         /* Perform stack touching */
3828                         NOT_IMPLEMENTED;
3829 #endif
3830
3831         if (!sparc_is_imm13 (- cfg->stack_offset)) {
3832                 /* Can't use sparc_o7 here, since we're still in the caller's frame */
3833                 sparc_set (code, (- cfg->stack_offset), GP_SCRATCH_REG);
3834                 sparc_save (code, sparc_sp, GP_SCRATCH_REG, sparc_sp);
3835         }
3836         else
3837                 sparc_save_imm (code, sparc_sp, - cfg->stack_offset, sparc_sp);
3838
3839 /*
3840         if (strstr (cfg->method->name, "foo")) {
3841                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
3842                 sparc_call_simple (code, 0);
3843                 sparc_nop (code);
3844         }
3845 */
3846
3847         sig = mono_method_signature (method);
3848
3849         cinfo = get_call_info (sig, FALSE);
3850
3851         /* Keep in sync with emit_load_volatile_arguments */
3852         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3853                 ArgInfo *ainfo = cinfo->args + i;
3854                 gint32 stack_offset;
3855                 MonoType *arg_type;
3856                 inst = cfg->varinfo [i];
3857
3858                 if (sig->hasthis && (i == 0))
3859                         arg_type = &mono_defaults.object_class->byval_arg;
3860                 else
3861                         arg_type = sig->params [i - sig->hasthis];
3862
3863                 stack_offset = ainfo->offset + ARGS_OFFSET;
3864
3865                 /* Save the split arguments so they will reside entirely on the stack */
3866                 if (ainfo->storage == ArgInSplitRegStack) {
3867                         /* Save the register to the stack */
3868                         g_assert (inst->opcode == OP_REGOFFSET);
3869                         if (!sparc_is_imm13 (stack_offset))
3870                                 NOT_IMPLEMENTED;
3871                         sparc_st_imm (code, sparc_i5, inst->inst_basereg, stack_offset);
3872                 }
3873
3874                 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
3875                         /* Save the argument to a dword aligned stack location */
3876                         /*
3877                          * stack_offset contains the offset of the argument on the stack.
3878                          * inst->inst_offset contains the dword aligned offset where the value
3879                          * should be stored.
3880                          */
3881                         if (ainfo->storage == ArgInIRegPair) {
3882                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3883                                         NOT_IMPLEMENTED;
3884                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3885                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3886                         }
3887                         else
3888                                 if (ainfo->storage == ArgInSplitRegStack) {
3889 #ifdef SPARCV9
3890                                         g_assert_not_reached ();
3891 #endif
3892                                         if (stack_offset != inst->inst_offset) {
3893                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3894                                                 sparc_st_imm (code, sparc_i5, inst->inst_basereg, inst->inst_offset);
3895                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3896                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3897                                         }
3898                                 }
3899                         else
3900                                 if (ainfo->storage == ArgOnStackPair) {
3901 #ifdef SPARCV9
3902                                         g_assert_not_reached ();
3903 #endif
3904                                         if (stack_offset != inst->inst_offset) {
3905                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3906                                                 sparc_ld_imm (code, sparc_fp, stack_offset, sparc_o7);
3907                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset);
3908                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3909                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3910                                         }
3911                                 }
3912                         else
3913                                 g_assert_not_reached ();
3914                 }
3915                 else
3916                         if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
3917                                 /* Argument in register, but need to be saved to stack */
3918                                 if (!sparc_is_imm13 (stack_offset))
3919                                         NOT_IMPLEMENTED;
3920                                 if ((stack_offset - ARGS_OFFSET) & 0x1)
3921                                         sparc_stb_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3922                                 else
3923                                         if ((stack_offset - ARGS_OFFSET) & 0x2)
3924                                                 sparc_sth_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3925                                 else
3926                                         if ((stack_offset - ARGS_OFFSET) & 0x4)
3927                                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3928                                         else {
3929                                                 if (v64)
3930                                                         sparc_stx_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3931                                                 else
3932                                                         sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3933                                         }
3934                         }
3935                 else
3936                         if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
3937 #ifdef SPARCV9
3938                                 NOT_IMPLEMENTED;
3939 #endif
3940                                 /* Argument in regpair, but need to be saved to stack */
3941                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3942                                         NOT_IMPLEMENTED;
3943                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3944                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3945                         }
3946                 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
3947                                 if (!sparc_is_imm13 (stack_offset))
3948                                         NOT_IMPLEMENTED;
3949                                 sparc_stf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
3950                                 }
3951                         else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
3952                                 /* The offset is guaranteed to be aligned by the ABI rules */
3953                                 sparc_stdf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
3954                         }
3955
3956                 if ((ainfo->storage == ArgInFloatReg) && (inst->opcode == OP_REGVAR)) {
3957                         /* Need to move into the a double precision register */
3958                         sparc_fstod (code, ainfo->reg, ainfo->reg - 1);
3959                 }
3960
3961                 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
3962                         if (inst->opcode == OP_REGVAR)
3963                                 /* FIXME: Load the argument into memory */
3964                                 NOT_IMPLEMENTED;
3965         }
3966
3967         g_free (cinfo);
3968
3969         if (cfg->method->save_lmf) {
3970                 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
3971
3972                 /* Save ip */
3973                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3974                 sparc_set_template (code, sparc_o7);
3975                 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ip));
3976                 /* Save sp */
3977                 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
3978                 /* Save fp */
3979                 sparc_sti_imm (code, sparc_fp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebp));
3980                 /* Save method */
3981                 /* FIXME: add a relocation for this */
3982                 sparc_set (code, cfg->method, sparc_o7);
3983                 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method));
3984
3985                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3986                                                          (gpointer)"mono_arch_get_lmf_addr");
3987                 EMIT_CALL ();
3988
3989                 code = (guint32*)mono_sparc_emit_save_lmf (code, lmf_offset);
3990         }
3991
3992         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3993                 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
3994
3995         cfg->code_len = (guint8*)code - cfg->native_code;
3996
3997         g_assert (cfg->code_len <= cfg->code_size);
3998
3999         return (guint8*)code;
4000 }
4001
4002 void
4003 mono_arch_emit_epilog (MonoCompile *cfg)
4004 {
4005         MonoMethod *method = cfg->method;
4006         guint32 *code;
4007         int can_fold = 0;
4008         int max_epilog_size = 16 + 20 * 4;
4009
4010         if (cfg->method->save_lmf)
4011                 max_epilog_size += 128;
4012
4013         if (mono_jit_trace_calls != NULL)
4014                 max_epilog_size += 50;
4015
4016         if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
4017                 max_epilog_size += 50;
4018
4019         while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
4020                 cfg->code_size *= 2;
4021                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4022                 mono_jit_stats.code_reallocs++;
4023         }
4024
4025         code = (guint32*)(cfg->native_code + cfg->code_len);
4026
4027         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4028                 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
4029
4030         if (cfg->method->save_lmf) {
4031                 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
4032
4033                 code = mono_sparc_emit_restore_lmf (code, lmf_offset);
4034         }
4035
4036         /*
4037          * The V8 ABI requires that calls to functions which return a structure
4038          * return to %i7+12
4039          */
4040         if (!v64 && mono_method_signature (cfg->method)->pinvoke && MONO_TYPE_ISSTRUCT(mono_method_signature (cfg->method)->ret))
4041                 sparc_jmpl_imm (code, sparc_i7, 12, sparc_g0);
4042         else
4043                 sparc_ret (code);
4044
4045         /* Only fold last instruction into the restore if the exit block has an in count of 1
4046            and the previous block hasn't been optimized away since it may have an in count > 1 */
4047         if (cfg->bb_exit->in_count == 1 && cfg->bb_exit->in_bb[0]->native_offset != cfg->bb_exit->native_offset)
4048                 can_fold = 1;
4049
4050         /* Try folding last instruction into the restore */
4051         if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && sparc_inst_imm (code [-2]) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4052                 /* or reg, imm, %i0 */
4053                 int reg = sparc_inst_rs1 (code [-2]);
4054                 int imm = sparc_inst_imm13 (code [-2]);
4055                 code [-2] = code [-1];
4056                 code --;
4057                 sparc_restore_imm (code, reg, imm, sparc_o0);
4058         }
4059         else
4060         if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && (!sparc_inst_imm (code [-2])) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4061                 /* or reg, reg, %i0 */
4062                 int reg1 = sparc_inst_rs1 (code [-2]);
4063                 int reg2 = sparc_inst_rs2 (code [-2]);
4064                 code [-2] = code [-1];
4065                 code --;
4066                 sparc_restore (code, reg1, reg2, sparc_o0);
4067         }
4068         else
4069                 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
4070
4071         cfg->code_len = (guint8*)code - cfg->native_code;
4072
4073         g_assert (cfg->code_len < cfg->code_size);
4074
4075 }
4076
4077 void
4078 mono_arch_emit_exceptions (MonoCompile *cfg)
4079 {
4080         MonoJumpInfo *patch_info;
4081         guint32 *code;
4082         int nthrows = 0, i;
4083         int exc_count = 0;
4084         guint32 code_size;
4085         MonoClass *exc_classes [16];
4086         guint8 *exc_throw_start [16], *exc_throw_end [16];
4087
4088         /* Compute needed space */
4089         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4090                 if (patch_info->type == MONO_PATCH_INFO_EXC)
4091                         exc_count++;
4092         }
4093
4094         /*
4095          * make sure we have enough space for exceptions
4096          */
4097 #ifdef SPARCV9
4098         code_size = exc_count * (20 * 4);
4099 #else
4100         code_size = exc_count * 24;
4101 #endif
4102
4103         while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4104                 cfg->code_size *= 2;
4105                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4106                 mono_jit_stats.code_reallocs++;
4107         }
4108
4109         code = (guint32*)(cfg->native_code + cfg->code_len);
4110
4111         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4112                 switch (patch_info->type) {
4113                 case MONO_PATCH_INFO_EXC: {
4114                         MonoClass *exc_class;
4115                         guint32 *buf, *buf2;
4116                         guint32 throw_ip, type_idx;
4117                         gint32 disp;
4118
4119                         sparc_patch ((guint32*)(cfg->native_code + patch_info->ip.i), code);
4120
4121                         exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4122                         type_idx = exc_class->type_token - MONO_TOKEN_TYPE_DEF;
4123                         g_assert (exc_class);
4124                         throw_ip = patch_info->ip.i;
4125
4126                         /* Find a throw sequence for the same exception class */
4127                         for (i = 0; i < nthrows; ++i)
4128                                 if (exc_classes [i] == exc_class)
4129                                         break;
4130
4131                         if (i < nthrows) {
4132                                 guint32 throw_offset = (((guint8*)exc_throw_end [i] - cfg->native_code) - throw_ip) >> 2;
4133                                 if (!sparc_is_imm13 (throw_offset))
4134                                         sparc_set32 (code, throw_offset, sparc_o1);
4135
4136                                 disp = (exc_throw_start [i] - (guint8*)code) >> 2;
4137                                 g_assert (sparc_is_imm22 (disp));
4138                                 sparc_branch (code, 0, sparc_ba, disp);
4139                                 if (sparc_is_imm13 (throw_offset))
4140                                         sparc_set32 (code, throw_offset, sparc_o1);
4141                                 else
4142                                         sparc_nop (code);
4143                                 patch_info->type = MONO_PATCH_INFO_NONE;
4144                         }
4145                         else {
4146                                 /* Emit the template for setting o1 */
4147                                 buf = code;
4148                                 if (sparc_is_imm13 (((((guint8*)code - cfg->native_code) - throw_ip) >> 2) - 8))
4149                                         /* Can use a short form */
4150                                         sparc_nop (code);
4151                                 else
4152                                         sparc_set_template (code, sparc_o1);
4153                                 buf2 = code;
4154
4155                                 if (nthrows < 16) {
4156                                         exc_classes [nthrows] = exc_class;
4157                                         exc_throw_start [nthrows] = (guint8*)code;
4158                                 }
4159
4160                                 /*
4161                                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
4162                                 EMIT_CALL();
4163                                 */
4164
4165                                 /* first arg = type token */
4166                                 /* Pass the type index to reduce the size of the sparc_set */
4167                                 if (!sparc_is_imm13 (type_idx))
4168                                         sparc_set32 (code, type_idx, sparc_o0);
4169
4170                                 /* second arg = offset between the throw ip and the current ip */
4171                                 /* On sparc, the saved ip points to the call instruction */
4172                                 disp = (((guint8*)code - cfg->native_code) - throw_ip) >> 2;
4173                                 sparc_set32 (buf, disp, sparc_o1);
4174                                 while (buf < buf2)
4175                                         sparc_nop (buf);
4176
4177                                 if (nthrows < 16) {
4178                                         exc_throw_end [nthrows] = (guint8*)code;
4179                                         nthrows ++;
4180                                 }
4181
4182                                 patch_info->data.name = "mono_arch_throw_corlib_exception";
4183                                 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4184                                 patch_info->ip.i = (guint8*)code - cfg->native_code;
4185
4186                                 EMIT_CALL ();
4187
4188                                 if (sparc_is_imm13 (type_idx)) {
4189                                         /* Put it into the delay slot */
4190                                         code --;
4191                                         buf = code;
4192                                         sparc_set32 (code, type_idx, sparc_o0);
4193                                         g_assert (code - buf == 1);
4194                                 }
4195                         }
4196                         break;
4197                 }
4198                 default:
4199                         /* do nothing */
4200                         break;
4201                 }
4202         }
4203
4204         cfg->code_len = (guint8*)code - cfg->native_code;
4205
4206         g_assert (cfg->code_len < cfg->code_size);
4207
4208 }
4209
4210 gboolean lmf_addr_key_inited = FALSE;
4211
4212 #ifdef MONO_SPARC_THR_TLS
4213 thread_key_t lmf_addr_key;
4214 #else
4215 pthread_key_t lmf_addr_key;
4216 #endif
4217
4218 gpointer
4219 mono_arch_get_lmf_addr (void)
4220 {
4221         /* This is perf critical so we bypass the IO layer */
4222         /* The thr_... functions seem to be somewhat faster */
4223 #ifdef MONO_SPARC_THR_TLS
4224         gpointer res;
4225         thr_getspecific (lmf_addr_key, &res);
4226         return res;
4227 #else
4228         return pthread_getspecific (lmf_addr_key);
4229 #endif
4230 }
4231
4232 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4233
4234 /*
4235  * There seems to be no way to determine stack boundaries under solaris,
4236  * so it's not possible to determine whenever a SIGSEGV is caused by stack
4237  * overflow or not.
4238  */
4239 #error "--with-sigaltstack=yes not supported on solaris"
4240
4241 #endif
4242
4243 void
4244 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
4245 {
4246         if (!lmf_addr_key_inited) {
4247                 int res;
4248
4249                 lmf_addr_key_inited = TRUE;
4250
4251 #ifdef MONO_SPARC_THR_TLS
4252                 res = thr_keycreate (&lmf_addr_key, NULL);
4253 #else
4254                 res = pthread_key_create (&lmf_addr_key, NULL);
4255 #endif
4256                 g_assert (res == 0);
4257
4258         }
4259
4260 #ifdef MONO_SPARC_THR_TLS
4261         thr_setspecific (lmf_addr_key, &tls->lmf);
4262 #else
4263         pthread_setspecific (lmf_addr_key, &tls->lmf);
4264 #endif
4265 }
4266
4267 void
4268 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4269 {
4270 }
4271
4272 void
4273 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *call, int this_reg, int this_type, int vt_reg)
4274 {
4275         int this_out_reg = sparc_o0;
4276
4277         if (vt_reg != -1) {
4278 #ifdef SPARCV9
4279                 MonoInst *ins;
4280                 MONO_INST_NEW (cfg, ins, OP_SETREG);
4281                 ins->sreg1 = vt_reg;
4282                 ins->dreg = mono_regstate_next_int (cfg->rs);
4283                 mono_bblock_add_inst (cfg->cbb, ins);
4284
4285                 mono_call_inst_add_outarg_reg (cfg, call, ins->dreg, sparc_o0, FALSE);
4286
4287                 this_out_reg = sparc_o1;
4288 #else
4289                 /* Set the 'struct/union return pointer' location on the stack */
4290                 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, 64, vt_reg);
4291 #endif
4292         }
4293
4294         /* add the this argument */
4295         if (this_reg != -1) {
4296                 MonoInst *this;
4297                 MONO_INST_NEW (cfg, this, OP_SETREG);
4298                 this->type = this_type;
4299                 this->sreg1 = this_reg;
4300                 this->dreg = mono_regstate_next_int (cfg->rs);
4301                 mono_bblock_add_inst (cfg->cbb, this);
4302
4303                 mono_call_inst_add_outarg_reg (cfg, call, this->dreg, this_out_reg, FALSE);
4304         }
4305 }
4306
4307
4308 MonoInst*
4309 mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4310 {
4311         MonoInst *ins = NULL;
4312
4313         if (cmethod->klass == mono_defaults.thread_class &&
4314                 strcmp (cmethod->name, "MemoryBarrier") == 0) {
4315                 if (sparcv9)
4316                         MONO_INST_NEW (cfg, ins, OP_MEMORY_BARRIER);
4317         }
4318
4319         return ins;
4320 }
4321
4322 /*
4323  * mono_arch_get_argument_info:
4324  * @csig:  a method signature
4325  * @param_count: the number of parameters to consider
4326  * @arg_info: an array to store the result infos
4327  *
4328  * Gathers information on parameters such as size, alignment and
4329  * padding. arg_info should be large enought to hold param_count + 1 entries.
4330  *
4331  * Returns the size of the activation frame.
4332  */
4333 int
4334 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
4335 {
4336         int k, align;
4337         CallInfo *cinfo;
4338         ArgInfo *ainfo;
4339
4340         cinfo = get_call_info (csig, FALSE);
4341
4342         if (csig->hasthis) {
4343                 ainfo = &cinfo->args [0];
4344                 arg_info [0].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4345         }
4346
4347         for (k = 0; k < param_count; k++) {
4348                 ainfo = &cinfo->args [k + csig->hasthis];
4349
4350                 arg_info [k + 1].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4351                 arg_info [k + 1].size = mono_type_size (csig->params [k], &align);
4352         }
4353
4354         g_free (cinfo);
4355
4356         return 0;
4357 }
4358
4359 gboolean
4360 mono_arch_print_tree (MonoInst *tree, int arity)
4361 {
4362         return 0;
4363 }
4364
4365 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
4366 {
4367         return NULL;
4368 }
4369
4370 MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
4371 {
4372         return NULL;
4373 }