mono/mini/mini-sparc.c

   1 /*
   2  * mini-sparc.c: Sparc backend for the Mono code generator
   3  *
   4  * Authors:
   5  *   Paolo Molaro (lupus@ximian.com)
   6  *   Dietmar Maurer (dietmar@ximian.com)
   7  *
   8  * Modified for SPARC:
   9  *   Christopher Taylor (ct@gentoo.org)
  10  *   Mark Crichton (crichton@gimp.org)
  11  *   Zoltan Varga (vargaz@freemail.hu)
  12  *
  13  * (C) 2003 Ximian, Inc.
  14  */
  15 #include "mini.h"
  16 #include <string.h>
  17
  18 #include <mono/metadata/appdomain.h>
  19 #include <mono/metadata/debug-helpers.h>
  20 #include <mono/utils/mono-math.h>
  21
  22 #include "mini-sparc.h"
  23 #include "inssel.h"
  24 #include "trace.h"
  25 #include "cpu-sparc.h"
  26
  27 /*
  28  * Sparc V9 means two things:
  29  * - the instruction set
  30  * - the ABI
  31  *
  32  * V9 instructions are only usable if the underlying processor is 64 bit. Most Sparc
  33  * processors in use are 64 bit processors. The V9 ABI is only usable if the
  34  * mono executable is a 64 bit executable. So it would make sense to use the 64 bit
  35  * instructions without using the 64 bit ABI.
  36  */
  37
  38 /*
  39  * Register usage:
  40  * - %i0..%i7 hold the incoming arguments, these are never written by JITted code
  41  * - %l0..%l7 is used for local register allocation
  42  * - %o0..%o6 is used for outgoing arguments
  43  * - %o7 and %g1 is used as scratch registers in opcodes
  44  * - all floating point registers are used for local register allocation except %f0.
  45  *   Only double precision registers are used.
  46  */
  47
  48 /*
  49  * Alignment:
  50  * - doubles and longs must be stored in dword aligned locations
  51  */
  52
  53 #if SPARCV9
  54 #error "Sparc V9 support not yet implemented."
  55 #endif
  56
  57 int mono_exc_esp_offset = 0;
  58
  59 #define NOT_IMPLEMENTED g_assert_not_reached ();
  60
  61 #define ALIGN_TO(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
  62
  63 const char*
  64 mono_arch_regname (int reg) {
  65         static const char * rnames[] = {
  66                 "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
  67                 "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
  68                 "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
  69                 "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
  70                 "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
  71                 "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
  72                 "sparc_fp", "sparc_retadr"
  73         };
  74         if (reg >= 0 && reg < 32)
  75                 return rnames [reg];
  76         return "unknown";
  77 }
  78
  79 /*
  80  * Initialize the cpu to execute managed code.
  81  */
  82 void
  83 mono_arch_cpu_init (void)
  84 {
  85 }
  86
  87 /*
  88  * This function returns the optimizations supported on this cpu.
  89  */
  90 guint32
  91 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
  92 {
  93         guint32 opts = 0;
  94         *exclude_mask = 0;
  95         return opts;
  96 }
  97
  98 static gboolean
  99 is_regsize_var (MonoType *t) {
 100         if (t->byref)
 101                 return TRUE;
 102         switch (t->type) {
 103         case MONO_TYPE_I4:
 104         case MONO_TYPE_U4:
 105         case MONO_TYPE_I:
 106         case MONO_TYPE_U:
 107                 return TRUE;
 108         case MONO_TYPE_OBJECT:
 109         case MONO_TYPE_STRING:
 110         case MONO_TYPE_CLASS:
 111         case MONO_TYPE_SZARRAY:
 112         case MONO_TYPE_ARRAY:
 113                 return FALSE;
 114         case MONO_TYPE_VALUETYPE:
 115                 if (t->data.klass->enumtype)
 116                         return is_regsize_var (t->data.klass->enum_basetype);
 117                 return FALSE;
 118         }
 119         return FALSE;
 120 }
 121
 122 GList *
 123 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
 124 {
 125         GList *vars = NULL;
 126         int i;
 127
 128         /* FIXME: */
 129         return NULL;
 130
 131         /*
 132          * FIXME: If an argument is allocated to a register, then load it from the
 133          * stack in the prolog.
 134          */
 135
 136         for (i = 0; i < cfg->num_varinfo; i++) {
 137                 MonoInst *ins = cfg->varinfo [i];
 138                 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
 139
 140                 /* unused vars */
 141                 if (vmv->range.first_use.abs_pos > vmv->range.last_use.abs_pos)
 142                         continue;
 143
 144                 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
 145                         continue;
 146
 147                 /* FIXME: */
 148                 /* we can only allocate 32 bit values */
 149                 if (is_regsize_var (ins->inst_vtype)) {
 150                         g_assert (MONO_VARINFO (cfg, i)->reg == -1);
 151                         g_assert (i == vmv->idx);
 152                         vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
 153                 }
 154         }
 155
 156         return vars;
 157 }
 158
 159 GList *
 160 mono_arch_get_global_int_regs (MonoCompile *cfg)
 161 {
 162         GList *regs = NULL;
 163         int i;
 164
 165         /* FIXME: Use unused input registers for global allocation */
 166
 167         /* Use %l0..%l3 as global registers */
 168
 169         for (i = 16; i < 20; ++i)
 170                 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
 171
 172         return regs;
 173 }
 174
 175 #ifdef __GNUC__
 176 #define flushi(addr)    __asm__ __volatile__ ("flush %0"::"r"(addr):"memory")
 177 #else /* assume Sun's compiler */
 178 static void flushi(void *addr)
 179 {
 180     asm("flush %i0");
 181 }
 182 #endif
 183
 184 void
 185 mono_arch_flush_icache (guint8 *code, gint size)
 186 {
 187         /*
 188          * FIXME: This might not work on older machines, but flushing code in dword
 189          * chunks in _slow_.
 190          */
 191
 192         flushi (code);
 193
 194         /*
 195         for (i = 0; i < (size/8); i++)
 196                 flushi(code + (i*8));
 197         */
 198 }
 199
 200 typedef enum {
 201         ArgInIReg,
 202         ArgInIRegPair,
 203         ArgInSplitRegStack,
 204         ArgInFReg,
 205         ArgInFRegPair,
 206         ArgOnStack,
 207         ArgOnStackPair
 208 } ArgStorage;
 209
 210 typedef struct {
 211         gint16 offset;
 212         /* This needs to be offset by %i0 or %o0 depending on caller/callee */
 213         gint8  reg;
 214         ArgStorage storage;
 215         guint32 vt_offset; /* for valuetypes */
 216 } ArgInfo;
 217
 218 typedef struct {
 219         int nargs;
 220         guint32 stack_usage;
 221         ArgInfo ret;
 222         ArgInfo args [1];
 223 } CallInfo;
 224
 225 #define DEBUG(a)
 226
 227 /* %o0..%o5 */
 228 #define PARAM_REGS 6
 229
 230 static void inline
 231 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean pair)
 232 {
 233         ainfo->offset = *stack_size;
 234
 235         if (!pair) {
 236                 if (*gr >= PARAM_REGS) {
 237                         ainfo->storage = ArgOnStack;
 238                 }
 239                 else {
 240                         ainfo->storage = ArgInIReg;
 241                         ainfo->reg = *gr;
 242                         (*gr) ++;
 243                 }
 244
 245                 /* Allways reserve stack space for parameters passed in registers */
 246                 (*stack_size) += 4;
 247         }
 248         else {
 249                 if (*gr < PARAM_REGS - 1) {
 250                         /* A pair of registers */
 251                         ainfo->storage = ArgInIRegPair;
 252                         ainfo->reg = *gr;
 253                         (*gr) += 2;
 254                 }
 255                 else if (*gr >= PARAM_REGS) {
 256                         /* A pair of stack locations */
 257                         ainfo->storage = ArgOnStackPair;
 258                         ainfo->offset = *stack_size;
 259                 }
 260                 else {
 261                         ainfo->storage = ArgInSplitRegStack;
 262                         ainfo->reg = *gr;
 263                         ainfo->offset = *stack_size;
 264                         (*gr) ++;
 265                 }
 266
 267                 (*stack_size) += 8;
 268         }
 269 }
 270
 271 /*
 272  * get_call_info:
 273  *
 274  *  Obtain information about a call according to the calling convention.
 275  * See the "System V ABI, Sparc Processor Supplement" Sparc V8 version document for
 276  * more information.
 277  */
 278 static CallInfo*
 279 get_call_info (MonoMethodSignature *sig, gboolean is_pinvoke)
 280 {
 281         guint32 i, gr, simpletype;
 282         int n = sig->hasthis + sig->param_count;
 283         guint32 stack_size = 0;
 284         CallInfo *cinfo;
 285
 286         cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
 287
 288         gr = 0;
 289
 290         /* this */
 291         if (sig->hasthis)
 292                 add_general (&gr, &stack_size, cinfo->args + 0, FALSE);
 293
 294         for (i = 0; i < sig->param_count; ++i) {
 295                 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
 296
 297                 DEBUG(printf("param %d: ", i));
 298                 if (sig->params [i]->byref) {
 299                         DEBUG(printf("byref\n"));
 300
 301                         add_general (&gr, &stack_size, ainfo, FALSE);
 302                         continue;
 303                 }
 304                 simpletype = sig->params [i]->type;
 305         enum_calc_size:
 306                 switch (simpletype) {
 307                 case MONO_TYPE_BOOLEAN:
 308                 case MONO_TYPE_CHAR:
 309                 case MONO_TYPE_I1:
 310                 case MONO_TYPE_U1:
 311                         add_general (&gr, &stack_size, ainfo, FALSE);
 312                         /* the value is in the ls byte */
 313                         ainfo->offset += 3;
 314                         break;
 315                 case MONO_TYPE_I2:
 316                 case MONO_TYPE_U2:
 317                         add_general (&gr, &stack_size, ainfo, FALSE);
 318                         /* the value is in the ls word */
 319                         ainfo->offset += 2;
 320                         break;
 321                 case MONO_TYPE_I4:
 322                 case MONO_TYPE_U4:
 323                 case MONO_TYPE_I:
 324                 case MONO_TYPE_U:
 325                 case MONO_TYPE_PTR:
 326                 case MONO_TYPE_CLASS:
 327                 case MONO_TYPE_OBJECT:
 328                 case MONO_TYPE_STRING:
 329                 case MONO_TYPE_SZARRAY:
 330                 case MONO_TYPE_ARRAY:
 331                         add_general (&gr, &stack_size, ainfo, FALSE);
 332                         break;
 333                 case MONO_TYPE_VALUETYPE: {
 334                         if (sig->params [i]->data.klass->enumtype) {
 335                                 simpletype = sig->params [i]->data.klass->enum_basetype->type;
 336                                 goto enum_calc_size;
 337                         }
 338
 339                         add_general (&gr, &stack_size, ainfo, FALSE);
 340                         break;
 341                 }
 342                 case MONO_TYPE_U8:
 343                 case MONO_TYPE_I8:
 344                         add_general (&gr, &stack_size, ainfo, TRUE);
 345                         break;
 346                 case MONO_TYPE_R4:
 347                         /* single precision values are passed in integer registers */
 348                         add_general (&gr, &stack_size, ainfo, FALSE);
 349                         break;
 350                 case MONO_TYPE_R8:
 351                         /* double precision values are passed in a pair of registers */
 352                         add_general (&gr, &stack_size, ainfo, TRUE);
 353                         break;
 354                 default:
 355                         g_assert_not_reached ();
 356                 }
 357         }
 358
 359         /* return value */
 360         {
 361                 simpletype = sig->ret->type;
 362 enum_retvalue:
 363                 switch (simpletype) {
 364                 case MONO_TYPE_BOOLEAN:
 365                 case MONO_TYPE_I1:
 366                 case MONO_TYPE_U1:
 367                 case MONO_TYPE_I2:
 368                 case MONO_TYPE_U2:
 369                 case MONO_TYPE_CHAR:
 370                 case MONO_TYPE_I4:
 371                 case MONO_TYPE_U4:
 372                 case MONO_TYPE_I:
 373                 case MONO_TYPE_U:
 374                 case MONO_TYPE_CLASS:
 375                 case MONO_TYPE_OBJECT:
 376                 case MONO_TYPE_SZARRAY:
 377                 case MONO_TYPE_ARRAY:
 378                 case MONO_TYPE_STRING:
 379                         cinfo->ret.storage = ArgInIReg;
 380                         cinfo->ret.reg = sparc_i0;
 381                         break;
 382                 case MONO_TYPE_U8:
 383                 case MONO_TYPE_I8:
 384                         cinfo->ret.storage = ArgInIRegPair;
 385                         cinfo->ret.reg = sparc_i0;
 386                         break;
 387                 case MONO_TYPE_R4:
 388                 case MONO_TYPE_R8:
 389                         cinfo->ret.storage = ArgInFReg;
 390                         cinfo->ret.reg = sparc_f0;
 391                         break;
 392                 case MONO_TYPE_VALUETYPE:
 393                         if (sig->ret->data.klass->enumtype) {
 394                                 simpletype = sig->ret->data.klass->enum_basetype->type;
 395                                 goto enum_retvalue;
 396                         }
 397                         cinfo->ret.storage = ArgOnStack;
 398                         break;
 399                 case MONO_TYPE_VOID:
 400                         break;
 401                 default:
 402                         g_error ("Can't handle as return value 0x%x", sig->ret->type);
 403                 }
 404         }
 405
 406         cinfo->stack_usage = stack_size;
 407         return cinfo;
 408 }
 409
 410 /*
 411  * Set var information according to the calling convention. sparc version.
 412  * The locals var stuff should most likely be split in another method.
 413  */
 414 void
 415 mono_arch_allocate_vars (MonoCompile *m)
 416 {
 417         MonoMethodSignature *sig;
 418         MonoMethodHeader *header;
 419         MonoInst *inst;
 420         int i, offset, size, align, curinst;
 421         int frame_reg = sparc_sp;
 422         CallInfo *cinfo;
 423
 424         m->frame_reg = frame_reg;
 425
 426         header = ((MonoMethodNormal *)m->method)->header;
 427
 428         sig = m->method->signature;
 429
 430         cinfo = get_call_info (sig, FALSE);
 431
 432         if (sig->ret->type != MONO_TYPE_VOID) {
 433                 switch (cinfo->ret.storage) {
 434                 case ArgInIReg:
 435                 case ArgInFReg:
 436                 case ArgInIRegPair:
 437                         m->ret->opcode = OP_REGVAR;
 438                         m->ret->inst_c0 = cinfo->ret.reg;
 439                         break;
 440                 case ArgOnStack:
 441                         /* valuetypes */
 442                         m->ret->opcode = OP_REGOFFSET;
 443                         m->ret->inst_basereg = sparc_fp;
 444                         m->ret->inst_offset = 64;
 445                         break;
 446                 default:
 447                         NOT_IMPLEMENTED;
 448                 }
 449         }
 450
 451         /*
 452          * We use the Sparc V8 calling conventions for managed code as well.
 453          * FIXME: Use something more optimized.
 454          */
 455
 456         offset = 64; /* register save area */
 457         offset += 4; /* struct/union return pointer */
 458
 459         /* add parameter area size for called functions */
 460         if (m->param_area < 24)
 461                 /* Reserve space for the first 6 arguments even if it is unused */
 462                 offset += 24;
 463         else
 464                 offset += m->param_area;
 465
 466         curinst = m->locals_start;
 467         for (i = curinst; i < m->num_varinfo; ++i) {
 468                 inst = m->varinfo [i];
 469
 470                 if (inst->opcode == OP_REGVAR)
 471                         continue;
 472
 473                 /* inst->unused indicates native sized value types, this is used by the
 474                 * pinvoke wrappers when they call functions returning structure */
 475                 if (inst->unused && MONO_TYPE_ISSTRUCT (inst->inst_vtype))
 476                         size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
 477                 else
 478                         size = mono_type_stack_size (inst->inst_vtype, &align);
 479
 480                 /*
 481                  * This is needed since structures containing doubles must be doubleword
 482          * aligned.
 483                  * FIXME: Do this only if needed.
 484                  */
 485                 if (MONO_TYPE_ISSTRUCT (inst->inst_vtype))
 486                         align = 8;
 487
 488                 offset += align - 1;
 489                 offset &= ~(align - 1);
 490                 inst->inst_offset = offset;
 491                 inst->opcode = OP_REGOFFSET;
 492                 inst->inst_basereg = frame_reg;
 493                 offset += size;
 494                 //g_print ("allocating local %d to %d\n", i, inst->inst_offset);
 495         }
 496
 497         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
 498                 inst = m->varinfo [i];
 499                 if (inst->opcode != OP_REGVAR) {
 500                         ArgInfo *ainfo = &cinfo->args [i];
 501                         gboolean inreg = TRUE;
 502                         MonoType *arg_type;
 503
 504                         if (sig->hasthis && (i == 0))
 505                                 arg_type = mono_defaults.object_class;
 506                         else
 507                                 arg_type = sig->params [i - sig->hasthis];
 508
 509                         if ((arg_type->type == MONO_TYPE_R4)
 510                                 || (arg_type->type == MONO_TYPE_R8))
 511                                 /*
 512                                  * Since float arguments are passed in integer registers, we need to
 513                                  * save them to the stack in the prolog.
 514                                  */
 515                                 inreg = FALSE;
 516
 517                         if (inst->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT))
 518                                 inreg = FALSE;
 519
 520                         if (MONO_TYPE_ISSTRUCT (arg_type))
 521                                 /* FIXME: this isn't needed */
 522                                 inreg = FALSE;
 523
 524                         switch (ainfo->storage) {
 525                         case ArgInIReg:
 526                         case ArgInIRegPair:
 527                                 if (inreg) {
 528                                         inst->opcode = OP_REGVAR;
 529                                         inst->dreg = sparc_i0 + ainfo->reg;
 530                                         break;
 531                                 }
 532                                 else {
 533                                         /* Fall through */
 534                                 }
 535                         case ArgOnStack:
 536                         case ArgOnStackPair:
 537                         case ArgInSplitRegStack:
 538                                 /* Split arguments are saved to the stack in the prolog */
 539                                 inst->opcode = OP_REGOFFSET;
 540                                 /* in parent frame */
 541                                 inst->inst_basereg = sparc_fp;
 542                                 inst->inst_offset = ainfo->offset + 68;
 543
 544                                 if (arg_type->type == MONO_TYPE_R8) {
 545                                         /*
 546                                          * It is very hard to load doubles from non-doubleword aligned
 547                                          * memory locations. So if the offset is misaligned, we copy the
 548                                          * argument to a stack location in the prolog.
 549                                          */
 550                                         if (inst->inst_offset % 8) {
 551                                                 inst->inst_basereg = sparc_sp;
 552                                                 align = 8;
 553                                                 offset += align - 1;
 554                                                 offset &= ~(align - 1);
 555                                                 inst->inst_offset = offset;
 556                                                 offset += 8;
 557                                         }
 558                                 }
 559                                 break;
 560                         default:
 561                                 NOT_IMPLEMENTED;
 562                         }
 563
 564                         if (MONO_TYPE_ISSTRUCT (arg_type)) {
 565                                 /* Add a level of indirection */
 566                                 /*
 567                                  * It would be easier to add OP_LDIND_I here, but ldind_i instructions
 568                                  * are destructively modified in a lot of places in inssel.brg.
 569                                  */
 570                                 MonoInst *indir;
 571                                 MONO_INST_NEW (m, indir, 0);
 572                                 *indir = *inst;
 573                                 inst->opcode = OP_SPARC_INARG_VT;
 574                                 inst->inst_left = indir;
 575                         }
 576                 }
 577                 else
 578                         g_assert_not_reached ();
 579         }
 580
 581         /* align the stack size to 8 bytes */
 582         offset += 8 - 1;
 583         offset &= ~(8 - 1);
 584
 585         /* Add a properly aligned dword for use by int<->float conversion opcodes */
 586         offset += 8;
 587
 588         m->stack_offset = offset;
 589
 590         g_free (cinfo);
 591 }
 592
 593 /*
 594  * take the arguments and generate the arch-specific
 595  * instructions to properly call the function in call.
 596  * This includes pushing, moving arguments to the right register
 597  * etc.
 598  */
 599 MonoCallInst*
 600 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
 601         MonoInst *arg, *in;
 602         MonoMethodSignature *sig;
 603         int i, n;
 604         CallInfo *cinfo;
 605         ArgInfo *ainfo;
 606         guint32 extra_space = 0;
 607
 608         sig = call->signature;
 609         n = sig->param_count + sig->hasthis;
 610
 611         cinfo = get_call_info (sig, sig->pinvoke);
 612
 613         for (i = 0; i < n; ++i) {
 614                 ainfo = cinfo->args + i;
 615                 if (is_virtual && i == 0) {
 616                         /* the argument will be attached to the call instruction */
 617                         in = call->args [i];
 618                 } else {
 619                         MONO_INST_NEW (cfg, arg, OP_OUTARG);
 620                         in = call->args [i];
 621                         arg->cil_code = in->cil_code;
 622                         arg->inst_left = in;
 623                         arg->type = in->type;
 624                         /* prepend, we'll need to reverse them later */
 625                         arg->next = call->out_args;
 626                         call->out_args = arg;
 627
 628                         if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(sig->params [i - sig->hasthis]))) {
 629                                 MonoInst *inst;
 630                                 gint align;
 631                                 guint32 offset, pad;
 632                                 guint32 size = mono_type_stack_size (&in->klass->byval_arg, &align);
 633
 634                                 /*
 635                                  * We use OP_OUTARG_VT to copy the valuetype to a stack location, then
 636                                  * use the normal OUTARG opcodes to pass the address of the location to
 637                                  * the callee.
 638                                  */
 639                                 MONO_INST_NEW (cfg, inst, OP_OUTARG_VT);
 640                                 inst->inst_left = in;
 641
 642                                 /* The first 6 argument locations are reserved */
 643                                 if (cinfo->stack_usage < 24)
 644                                         cinfo->stack_usage = 24;
 645
 646                                 offset = ALIGN_TO (68 + cinfo->stack_usage, align);
 647                                 pad = offset - (68 + cinfo->stack_usage);
 648
 649                                 inst->inst_c1 = offset;
 650                                 inst->unused = size;
 651                                 arg->inst_left = inst;
 652
 653                                 cinfo->stack_usage += size;
 654                                 cinfo->stack_usage += pad;
 655                         }
 656
 657                         switch (ainfo->storage) {
 658                         case ArgInIReg:
 659                         case ArgInFReg:
 660                         case ArgInIRegPair:
 661                                 if (ainfo->storage == ArgInIRegPair)
 662                                         arg->opcode = OP_SPARC_OUTARG_REGPAIR;
 663                                 arg->unused = sparc_o0 + ainfo->reg;
 664                                 /* outgoing arguments begin at sp+68 */
 665                                 arg->inst_basereg = sparc_sp;
 666                                 arg->inst_imm = 68 + ainfo->offset;
 667                                 call->used_iregs |= 1 << ainfo->reg;
 668
 669                                 if ((i >= sig->hasthis) && (sig->params [i - sig->hasthis]->type == MONO_TYPE_R8)) {
 670                                         /*
 671                                          * The OUTARG (freg) implementation needs an extra dword to store
 672                                          * the temporary value.
 673                                          */
 674                                         extra_space += 8;
 675                                 }
 676                                 break;
 677                         case ArgOnStack:
 678                                 arg->opcode = OP_SPARC_OUTARG_MEM;
 679                                 arg->inst_basereg = sparc_sp;
 680                                 arg->inst_imm = 68 + ainfo->offset;
 681                                 break;
 682                         case ArgOnStackPair:
 683                                 arg->opcode = OP_SPARC_OUTARG_MEMPAIR;
 684                                 arg->inst_basereg = sparc_sp;
 685                                 arg->inst_imm = 68 + ainfo->offset;
 686                                 break;
 687                         case ArgInSplitRegStack:
 688                                 arg->opcode = OP_SPARC_OUTARG_SPLIT_REG_STACK;
 689                                 arg->unused = sparc_o0 + ainfo->reg;
 690                                 arg->inst_basereg = sparc_sp;
 691                                 arg->inst_imm = 68 + ainfo->offset;
 692                                 call->used_iregs |= 1 << ainfo->reg;
 693                                 break;
 694                         default:
 695                                 NOT_IMPLEMENTED;
 696                         }
 697                 }
 698         }
 699
 700         /*
 701          * Reverse the call->out_args list.
 702          */
 703         {
 704                 MonoInst *prev = NULL, *list = call->out_args, *next;
 705                 while (list) {
 706                         next = list->next;
 707                         list->next = prev;
 708                         prev = list;
 709                         list = next;
 710                 }
 711                 call->out_args = prev;
 712         }
 713         call->stack_usage = cinfo->stack_usage + extra_space;
 714         cfg->param_area = MAX (cfg->param_area, call->stack_usage);
 715         cfg->flags |= MONO_CFG_HAS_CALLS;
 716
 717         g_free (cinfo);
 718         return call;
 719 }
 720
 721 /* Map opcode to the sparc condition codes */
 722 static inline SparcCond
 723 opcode_to_sparc_cond (int opcode)
 724 {
 725         switch (opcode) {
 726
 727         case OP_FBGE:
 728                 return sparc_fbge;
 729         case OP_FBLE:
 730                 return sparc_fble;
 731         case OP_FBEQ:
 732         case OP_FCEQ:
 733                 return sparc_fbe;
 734         case OP_FBLT:
 735         case OP_FCLT:
 736         case OP_FCLT_UN:
 737                 return sparc_fbl;
 738         case OP_FBGT:
 739         case OP_FCGT:
 740         case OP_FCGT_UN:
 741                 return sparc_fbg;
 742         case CEE_BEQ:
 743         case OP_CEQ:
 744                 return sparc_be;
 745         case CEE_BNE_UN:
 746                 return sparc_bne;
 747         case CEE_BLT:
 748         case OP_CLT:
 749                 return sparc_bl;
 750         case CEE_BLT_UN:
 751         case OP_CLT_UN:
 752                 return sparc_blu;
 753         case CEE_BGT:
 754         case OP_CGT:
 755                 return sparc_bg;
 756         case CEE_BGT_UN:
 757         case OP_CGT_UN:
 758                 return sparc_bgu;
 759         case CEE_BGE:
 760                 return sparc_bge;
 761         case CEE_BGE_UN:
 762                 return sparc_beu;
 763         case CEE_BLE:
 764                 return sparc_ble;
 765         case CEE_BLE_UN:
 766                 return sparc_bleu;
 767         default:
 768                 g_assert_not_reached ();
 769                 return sparc_be;
 770         }
 771 }
 772
 773 #define EMIT_COND_BRANCH_GENERAL(ins,bop,cond) \
 774 if (ins->flags & MONO_INST_BRLABEL) { \
 775         if (ins->inst_i0->inst_c0) { \
 776            gint32 disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2; \
 777            g_assert (sparc_is_imm22 (disp)); \
 778            sparc_ ## bop (code, 1, cond, disp); \
 779         } else { \
 780                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
 781             sparc_ ## bop (code, 1, cond, 0); \
 782         } \
 783                 sparc_nop (code); \
 784 } else { \
 785         if (ins->inst_true_bb->native_offset) { \
 786            gint32 disp = (ins->inst_true_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2; \
 787            g_assert (sparc_is_imm22 (disp)); \
 788            sparc_ ## bop (code, 1, cond, disp); \
 789         } else { \
 790                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
 791             sparc_ ## bop (code, 1, cond, 0); \
 792         } \
 793                 sparc_nop (code); \
 794 }
 795
 796 #define EMIT_COND_BRANCH(ins,cond) EMIT_COND_BRANCH_GENERAL((ins),branch,(cond))
 797
 798 #define EMIT_FLOAT_COND_BRANCH(ins,cond) EMIT_COND_BRANCH_GENERAL((ins),fbranch,(cond))
 799
 800 #define EMIT_ALU_IMM(ins,op,setcc) do { \
 801                         if (sparc_is_imm13 ((ins)->inst_imm)) \
 802                                 sparc_ ## op ## _imm (code, (setcc), (ins)->sreg1, ins->inst_imm, (ins)->dreg); \
 803                         else { \
 804                                 sparc_set (code, ins->inst_imm, sparc_o7); \
 805                                 sparc_ ## op (code, (setcc), (ins)->sreg1, sparc_o7, (ins)->dreg); \
 806                         } \
 807 } while (0);
 808
 809 #define EMIT_LOAD_MEMBASE(ins,op) do { \
 810                         if (sparc_is_imm13 (ins->inst_offset)) \
 811                                 sparc_ ## op ## _imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg); \
 812                         else { \
 813                                 sparc_set (code, ins->inst_offset, sparc_o7); \
 814                                 sparc_ ## op (code, ins->inst_basereg, sparc_o7, ins->dreg); \
 815                         } \
 816 } while (0);
 817
 818 /* max len = 5 */
 819 #define EMIT_STORE_MEMBASE_IMM(ins,op) do { \
 820                         guint32 sreg; \
 821                         if (ins->inst_imm == 0) \
 822                                 sreg = sparc_g0; \
 823                         else { \
 824                                 sparc_set (code, ins->inst_imm, sparc_o7); \
 825                                 sreg = sparc_o7; \
 826                         } \
 827                         if (!sparc_is_imm13 (ins->inst_offset)) { \
 828                                 sparc_set (code, ins->inst_offset, sparc_g1); \
 829                                 sparc_ ## op (code, sreg, ins->inst_destbasereg, sparc_g1); \
 830                         } \
 831                         else \
 832                                 sparc_ ## op ## _imm (code, sreg, ins->inst_destbasereg, ins->inst_offset); \
 833                                                                                                                                                                                  } while (0);
 834
 835 #define EMIT_STORE_MEMBASE_REG(ins,op) do { \
 836                         if (!sparc_is_imm13 (ins->inst_offset)) { \
 837                                 sparc_set (code, ins->inst_offset, sparc_o7); \
 838                                 sparc_ ## op (code, ins->sreg1, ins->inst_destbasereg, sparc_o7); \
 839                         } \
 840                                   else \
 841                                 sparc_ ## op ## _imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset); \
 842                                                                                                                                                                                  } while (0);
 843
 844
 845 /* emit an exception if condition is fail */
 846 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name)            \
 847         do {                                                        \
 848                 mono_add_patch_info (cfg, code - cfg->native_code,   \
 849                                     MONO_PATCH_INFO_EXC, exc_name);  \
 850                 x86_branch32 (code, cond, 0, signed);               \
 851         } while (0);
 852
 853 #define EMIT_FPCOMPARE(code) do { \
 854         x86_fcompp (code); \
 855         x86_fnstsw (code); \
 856         x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4500); \
 857 } while (0);
 858
 859 static void
 860 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
 861 {
 862         MonoInst *ins, *last_ins = NULL;
 863         ins = bb->code;
 864
 865         /* short circuit this for now */
 866         return;
 867
 868         while (ins) {
 869
 870                 switch (ins->opcode) {
 871                 case OP_MUL_IMM:
 872                         /* remove unnecessary multiplication with 1 */
 873                         if (ins->inst_imm == 1) {
 874                                 if (ins->dreg != ins->sreg1) {
 875                                         ins->opcode = OP_MOVE;
 876                                 } else {
 877                                         last_ins->next = ins->next;
 878                                         ins = ins->next;
 879                                         continue;
 880                                 }
 881                         }
 882                         break;
 883                 case OP_LOAD_MEMBASE:
 884                 case OP_LOADI4_MEMBASE:
 885                         /*
 886                          * OP_STORE_MEMBASE_REG reg, offset(basereg)
 887                          * OP_LOAD_MEMBASE offset(basereg), reg
 888                          */
 889                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
 890                                          || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
 891                             ins->inst_basereg == last_ins->inst_destbasereg &&
 892                             ins->inst_offset == last_ins->inst_offset) {
 893                                 if (ins->dreg == last_ins->sreg1) {
 894                                         last_ins->next = ins->next;
 895                                         ins = ins->next;
 896                                         continue;
 897                                 } else {
 898                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
 899                                         ins->opcode = OP_MOVE;
 900                                         ins->sreg1 = last_ins->sreg1;
 901                                 }
 902
 903                         /*
 904                          * Note: reg1 must be different from the basereg in the second load
 905                          * OP_LOAD_MEMBASE offset(basereg), reg1
 906                          * OP_LOAD_MEMBASE offset(basereg), reg2
 907                          * -->
 908                          * OP_LOAD_MEMBASE offset(basereg), reg1
 909                          * OP_MOVE reg1, reg2
 910                          */
 911                         } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
 912                                            || last_ins->opcode == OP_LOAD_MEMBASE) &&
 913                               ins->inst_basereg != last_ins->dreg &&
 914                               ins->inst_basereg == last_ins->inst_basereg &&
 915                               ins->inst_offset == last_ins->inst_offset) {
 916
 917                                 if (ins->dreg == last_ins->dreg) {
 918                                         last_ins->next = ins->next;
 919                                         ins = ins->next;
 920                                         continue;
 921                                 } else {
 922                                         ins->opcode = OP_MOVE;
 923                                         ins->sreg1 = last_ins->dreg;
 924                                 }
 925
 926                                 //g_assert_not_reached ();
 927
 928 #if 0
 929                         /*
 930                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
 931                          * OP_LOAD_MEMBASE offset(basereg), reg
 932                          * -->
 933                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
 934                          * OP_ICONST reg, imm
 935                          */
 936                         } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
 937                                                 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
 938                                    ins->inst_basereg == last_ins->inst_destbasereg &&
 939                                    ins->inst_offset == last_ins->inst_offset) {
 940                                 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
 941                                 ins->opcode = OP_ICONST;
 942                                 ins->inst_c0 = last_ins->inst_imm;
 943                                 g_assert_not_reached (); // check this rule
 944 #endif
 945                         }
 946                         break;
 947                 case OP_LOADU1_MEMBASE:
 948                 case OP_LOADI1_MEMBASE:
 949                         if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
 950                                         ins->inst_basereg == last_ins->inst_destbasereg &&
 951                                         ins->inst_offset == last_ins->inst_offset) {
 952                                 if (ins->dreg == last_ins->sreg1) {
 953                                         last_ins->next = ins->next;
 954                                         ins = ins->next;
 955                                         continue;
 956                                 } else {
 957                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
 958                                         ins->opcode = OP_MOVE;
 959                                         ins->sreg1 = last_ins->sreg1;
 960                                 }
 961                         }
 962                         break;
 963                 case OP_LOADU2_MEMBASE:
 964                 case OP_LOADI2_MEMBASE:
 965                         if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
 966                                         ins->inst_basereg == last_ins->inst_destbasereg &&
 967                                         ins->inst_offset == last_ins->inst_offset) {
 968                                 if (ins->dreg == last_ins->sreg1) {
 969                                         last_ins->next = ins->next;
 970                                         ins = ins->next;
 971                                         continue;
 972                                 } else {
 973                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
 974                                         ins->opcode = OP_MOVE;
 975                                         ins->sreg1 = last_ins->sreg1;
 976                                 }
 977                         }
 978                         break;
 979                 case CEE_CONV_I4:
 980                 case CEE_CONV_U4:
 981                 case OP_MOVE:
 982                         /*
 983                          * OP_MOVE reg, reg
 984                          */
 985                         if (ins->dreg == ins->sreg1) {
 986                                 if (last_ins)
 987                                         last_ins->next = ins->next;
 988                                 ins = ins->next;
 989                                 continue;
 990                         }
 991                         /*
 992                          * OP_MOVE sreg, dreg
 993                          * OP_MOVE dreg, sreg
 994                          */
 995                         if (last_ins && last_ins->opcode == OP_MOVE &&
 996                             ins->sreg1 == last_ins->dreg &&
 997                             ins->dreg == last_ins->sreg1) {
 998                                 last_ins->next = ins->next;
 999                                 ins = ins->next;
1000                                 continue;
1001                         }
1002                         break;
1003                 }
1004                 last_ins = ins;
1005                 ins = ins->next;
1006         }
1007         bb->last_ins = last_ins;
1008 }
1009
1010 #undef DEBUG
1011 #define DEBUG(a) if (cfg->verbose_level > 1) a
1012 //#define DEBUG(a)
1013 #define reg_is_freeable(r) (TRUE)
1014 #define freg_is_freeable(r) (TRUE)
1015
1016 typedef struct {
1017         int born_in;
1018         int killed_in;
1019         int last_use;
1020         int prev_use;
1021 } RegTrack;
1022
1023 static const char*const * ins_spec = sparc_desc;
1024
1025 static void
1026 print_ins (int i, MonoInst *ins)
1027 {
1028         const char *spec = ins_spec [ins->opcode];
1029         g_print ("\t%-2d %s", i, mono_inst_name (ins->opcode));
1030         if (spec [MONO_INST_DEST]) {
1031                 if (ins->dreg >= MONO_MAX_IREGS)
1032                         g_print (" R%d <-", ins->dreg);
1033                 else
1034                         if (spec [MONO_INST_DEST] == 'b')
1035                                 g_print (" [%s + 0x%x] <-", mono_arch_regname (ins->dreg), ins->inst_offset);
1036                 else
1037                         g_print (" %s <-", mono_arch_regname (ins->dreg));
1038         }
1039         if (spec [MONO_INST_SRC1]) {
1040                 if (ins->sreg1 >= MONO_MAX_IREGS)
1041                         g_print (" R%d", ins->sreg1);
1042                 else
1043                         if (spec [MONO_INST_SRC1] == 'b')
1044                                 g_print (" [%s + 0x%x]", mono_arch_regname (ins->sreg1), ins->inst_offset);
1045                 else
1046                         g_print (" %s", mono_arch_regname (ins->sreg1));
1047         }
1048         if (spec [MONO_INST_SRC2]) {
1049                 if (ins->sreg2 >= MONO_MAX_IREGS)
1050                         g_print (" R%d", ins->sreg2);
1051                 else
1052                         g_print (" %s", mono_arch_regname (ins->sreg2));
1053         }
1054         if (spec [MONO_INST_CLOB])
1055                 g_print (" clobbers: %c", spec [MONO_INST_CLOB]);
1056         g_print ("\n");
1057 }
1058
1059 static void
1060 print_regtrack (RegTrack *t, int num)
1061 {
1062         int i;
1063         char buf [32];
1064         const char *r;
1065
1066         for (i = 0; i < num; ++i) {
1067                 if (!t [i].born_in)
1068                         continue;
1069                 if (i >= MONO_MAX_IREGS) {
1070                         g_snprintf (buf, sizeof(buf), "R%d", i);
1071                         r = buf;
1072                 } else
1073                         r = mono_arch_regname (i);
1074                 g_print ("liveness: %s [%d - %d]\n", r, t [i].born_in, t[i].last_use);
1075         }
1076 }
1077
1078 typedef struct InstList InstList;
1079
1080 struct InstList {
1081         InstList *prev;
1082         InstList *next;
1083         MonoInst *data;
1084 };
1085
1086 static inline InstList*
1087 inst_list_prepend (MonoMemPool *pool, InstList *list, MonoInst *data)
1088 {
1089         InstList *item = mono_mempool_alloc (pool, sizeof (InstList));
1090         item->data = data;
1091         item->prev = NULL;
1092         item->next = list;
1093         if (list)
1094                 list->prev = item;
1095         return item;
1096 }
1097
1098 #define STACK_OFFSETS_POSITIVE
1099
1100 /*
1101  * returns the offset used by spillvar. It allocates a new
1102  * spill variable if necessary. Likely incorrect for sparc.
1103  */
1104 static int
1105 mono_spillvar_offset (MonoCompile *cfg, int spillvar)
1106 {
1107         MonoSpillInfo **si, *info;
1108         int i = 0;
1109
1110         si = &cfg->spill_info;
1111
1112         while (i <= spillvar) {
1113
1114                 if (!*si) {
1115                         *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1116                         info->next = NULL;
1117 #ifdef STACK_OFFSETS_POSITIVE
1118                         cfg->stack_offset += sizeof (gpointer);
1119 #else
1120                         cfg->stack_offset -= sizeof (gpointer);
1121 #endif
1122                         info->offset = cfg->stack_offset;
1123                 }
1124
1125                 if (i == spillvar)
1126                         return (*si)->offset;
1127
1128                 i++;
1129                 si = &(*si)->next;
1130         }
1131
1132         g_assert_not_reached ();
1133         return 0;
1134 }
1135
1136 static int
1137 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
1138 {
1139         MonoSpillInfo **si, *info;
1140         int i = 0;
1141
1142         si = &cfg->spill_info_float;
1143
1144         while (i <= spillvar) {
1145
1146                 if (!*si) {
1147                         *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1148                         info->next = NULL;
1149                         cfg->stack_offset += 7;
1150                         cfg->stack_offset &= ~7;
1151                         info->offset = cfg->stack_offset;
1152                         cfg->stack_offset += sizeof (double);
1153                 }
1154
1155                 if (i == spillvar)
1156                         return (*si)->offset;
1157
1158                 i++;
1159                 si = &(*si)->next;
1160         }
1161
1162         g_assert_not_reached ();
1163         return 0;
1164 }
1165
1166 /*
1167  * Force the spilling of the variable in the symbolic register 'reg'.
1168  */
1169 static int
1170 get_register_force_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, int reg)
1171 {
1172         MonoInst *load;
1173         int i, sel, spill;
1174
1175         sel = cfg->rs->iassign [reg];
1176         /*i = cfg->rs->isymbolic [sel];
1177         g_assert (i == reg);*/
1178         i = reg;
1179         spill = ++cfg->spill_count;
1180         cfg->rs->iassign [i] = -spill - 1;
1181         mono_regstate_free_int (cfg->rs, sel);
1182         /* we need to create a spill var and insert a load to sel after the current instruction */
1183         MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1184         load->dreg = sel;
1185         load->inst_basereg = cfg->frame_reg;
1186         load->inst_offset = mono_spillvar_offset (cfg, spill);
1187         if (item->prev) {
1188                 while (ins->next != item->prev->data)
1189                         ins = ins->next;
1190         }
1191         load->next = ins->next;
1192         ins->next = load;
1193         DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%sp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1194         i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1195         g_assert (i == sel);
1196
1197         return sel;
1198 }
1199
1200 static int
1201 get_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, guint32 regmask, int reg)
1202 {
1203         MonoInst *load;
1204         int i, sel, spill;
1205
1206         DEBUG (g_print ("start regmask to assign R%d: 0x%08x (R%d <- R%d R%d)\n", reg, regmask, ins->dreg, ins->sreg1, ins->sreg2));
1207         /* exclude the registers in the current instruction */
1208         if (reg != ins->sreg1 && (reg_is_freeable (ins->sreg1) || (ins->sreg1 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg1] >= 0))) {
1209                 if (ins->sreg1 >= MONO_MAX_IREGS)
1210                         regmask &= ~ (1 << cfg->rs->iassign [ins->sreg1]);
1211                 else
1212                         regmask &= ~ (1 << ins->sreg1);
1213                 DEBUG (g_print ("excluding sreg1 %s\n", mono_arch_regname (ins->sreg1)));
1214         }
1215         if (reg != ins->sreg2 && (reg_is_freeable (ins->sreg2) || (ins->sreg2 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg2] >= 0))) {
1216                 if (ins->sreg2 >= MONO_MAX_IREGS)
1217                         regmask &= ~ (1 << cfg->rs->iassign [ins->sreg2]);
1218                 else
1219                         regmask &= ~ (1 << ins->sreg2);
1220                 DEBUG (g_print ("excluding sreg2 %s %d\n", mono_arch_regname (ins->sreg2), ins->sreg2));
1221         }
1222         if (reg != ins->dreg && reg_is_freeable (ins->dreg)) {
1223                 regmask &= ~ (1 << ins->dreg);
1224                 DEBUG (g_print ("excluding dreg %s\n", mono_arch_regname (ins->dreg)));
1225         }
1226
1227         DEBUG (g_print ("available regmask: 0x%08x\n", regmask));
1228         g_assert (regmask); /* need at least a register we can free */
1229         sel = -1;
1230         /* we should track prev_use and spill the register that's farther */
1231         for (i = 0; i < MONO_MAX_IREGS; ++i) {
1232                 if (regmask & (1 << i)) {
1233                         sel = i;
1234                         DEBUG (g_print ("selected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->iassign [sel]));
1235                         break;
1236                 }
1237         }
1238         i = cfg->rs->isymbolic [sel];
1239         spill = ++cfg->spill_count;
1240         cfg->rs->iassign [i] = -spill - 1;
1241         mono_regstate_free_int (cfg->rs, sel);
1242         /* we need to create a spill var and insert a load to sel after the current instruction */
1243         MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1244         load->dreg = sel;
1245         load->inst_basereg = cfg->frame_reg;
1246         load->inst_offset = mono_spillvar_offset (cfg, spill);
1247         if (item->prev) {
1248                 while (ins->next != item->prev->data)
1249                         ins = ins->next;
1250         }
1251         load->next = ins->next;
1252         ins->next = load;
1253         DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%sp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1254         i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1255         g_assert (i == sel);
1256
1257         return sel;
1258 }
1259
1260 static int
1261 get_float_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, guint32 regmask, int reg)
1262 {
1263         MonoInst *load;
1264         int i, sel, spill;
1265
1266         DEBUG (g_print ("start regmask to assign R%d: 0x%08x (R%d <- R%d R%d)\n", reg, regmask, ins->dreg, ins->sreg1, ins->sreg2));
1267         /* exclude the registers in the current instruction */
1268         if (reg != ins->sreg1 && (freg_is_freeable (ins->sreg1) || (ins->sreg1 >= MONO_MAX_FREGS && cfg->rs->fassign [ins->sreg1] >= 0))) {
1269                 if (ins->sreg1 >= MONO_MAX_FREGS)
1270                         regmask &= ~ (1 << cfg->rs->fassign [ins->sreg1]);
1271                 else
1272                         regmask &= ~ (1 << ins->sreg1);
1273                 DEBUG (g_print ("excluding sreg1 %s\n", mono_arch_regname (ins->sreg1)));
1274         }
1275         if (reg != ins->sreg2 && (freg_is_freeable (ins->sreg2) || (ins->sreg2 >= MONO_MAX_FREGS && cfg->rs->fassign [ins->sreg2] >= 0))) {
1276                 if (ins->sreg2 >= MONO_MAX_FREGS)
1277                         regmask &= ~ (1 << cfg->rs->fassign [ins->sreg2]);
1278                 else
1279                         regmask &= ~ (1 << ins->sreg2);
1280                 DEBUG (g_print ("excluding sreg2 %s %d\n", mono_arch_regname (ins->sreg2), ins->sreg2));
1281         }
1282         if (reg != ins->dreg && freg_is_freeable (ins->dreg)) {
1283                 regmask &= ~ (1 << ins->dreg);
1284                 DEBUG (g_print ("excluding dreg %s\n", mono_arch_regname (ins->dreg)));
1285         }
1286
1287         DEBUG (g_print ("available regmask: 0x%08x\n", regmask));
1288         g_assert (regmask); /* need at least a register we can free */
1289         sel = -1;
1290         /* we should track prev_use and spill the register that's farther */
1291         for (i = 0; i < MONO_MAX_FREGS; ++i) {
1292                 if (regmask & (1 << i)) {
1293                         sel = i;
1294                         DEBUG (g_print ("selected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->fassign [sel]));
1295                         break;
1296                 }
1297         }
1298         i = cfg->rs->fsymbolic [sel];
1299         spill = ++cfg->spill_count;
1300         cfg->rs->fassign [i] = -spill - 1;
1301         mono_regstate_free_float(cfg->rs, sel);
1302         /* we need to create a spill var and insert a load to sel after the current instruction */
1303         MONO_INST_NEW (cfg, load, OP_LOADR8_MEMBASE);
1304         load->dreg = sel;
1305         load->inst_basereg = cfg->frame_reg;
1306         load->inst_offset = mono_spillvar_offset_float (cfg, spill);
1307         if (item->prev) {
1308                 while (ins->next != item->prev->data)
1309                         ins = ins->next;
1310         }
1311         load->next = ins->next;
1312         ins->next = load;
1313         DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%sp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1314         i = mono_regstate_alloc_float (cfg->rs, 1 << sel);
1315         g_assert (i == sel);
1316
1317         return sel;
1318 }
1319
1320 static MonoInst*
1321 create_copy_ins (MonoCompile *cfg, int dest, int src, MonoInst *ins)
1322 {
1323         MonoInst *copy;
1324         MONO_INST_NEW (cfg, copy, OP_MOVE);
1325         copy->dreg = dest;
1326         copy->sreg1 = src;
1327         if (ins) {
1328                 copy->next = ins->next;
1329                 ins->next = copy;
1330         }
1331         DEBUG (g_print ("\tforced copy from %s to %s\n", mono_arch_regname (src), mono_arch_regname (dest)));
1332         return copy;
1333 }
1334
1335 static MonoInst*
1336 create_copy_ins_float (MonoCompile *cfg, int dest, int src, MonoInst *ins)
1337 {
1338         MonoInst *copy;
1339         MONO_INST_NEW (cfg, copy, OP_FMOVE);
1340         copy->dreg = dest;
1341         copy->sreg1 = src;
1342         if (ins) {
1343                 copy->next = ins->next;
1344                 ins->next = copy;
1345         }
1346         DEBUG (g_print ("\tforced copy from %s to %s\n", mono_arch_regname (src), mono_arch_regname (dest)));
1347         return copy;
1348 }
1349
1350 static MonoInst*
1351 create_spilled_store (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins)
1352 {
1353         MonoInst *store;
1354         MONO_INST_NEW (cfg, store, OP_STORE_MEMBASE_REG);
1355         store->sreg1 = reg;
1356         store->inst_destbasereg = cfg->frame_reg;
1357         store->inst_offset = mono_spillvar_offset (cfg, spill);
1358         if (ins) {
1359                 store->next = ins->next;
1360                 ins->next = store;
1361         }
1362         DEBUG (g_print ("SPILLED STORE (%d at 0x%08x(%%sp)) R%d (from %s)\n", spill, store->inst_offset, prev_reg, mono_arch_regname (reg)));
1363         return store;
1364 }
1365
1366 static MonoInst*
1367 create_spilled_store_float (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins)
1368 {
1369         MonoInst *store;
1370         MONO_INST_NEW (cfg, store, OP_STORER8_MEMBASE_REG);
1371         store->sreg1 = reg;
1372         store->inst_destbasereg = cfg->frame_reg;
1373         store->inst_offset = mono_spillvar_offset_float (cfg, spill);
1374         if (ins) {
1375                 store->next = ins->next;
1376                 ins->next = store;
1377         }
1378         DEBUG (g_print ("SPILLED STORE (%d at 0x%08x(%%sp)) R%d (from %s)\n", spill, store->inst_offset, prev_reg, mono_arch_regname (reg)));
1379         return store;
1380 }
1381
1382 static void
1383 insert_before_ins (MonoInst *ins, InstList *item, MonoInst* to_insert)
1384 {
1385         MonoInst *prev;
1386         g_assert (item->next);
1387         prev = item->next->data;
1388
1389         while (prev->next != ins)
1390                 prev = prev->next;
1391         to_insert->next = ins;
1392         prev->next = to_insert;
1393         /*
1394          * needed otherwise in the next instruction we can add an ins to the
1395          * end and that would get past this instruction.
1396          */
1397         item->data = to_insert;
1398 }
1399
1400 static int
1401 alloc_int_reg (MonoCompile *cfg, InstList *curinst, MonoInst *ins, int sym_reg, guint32 allow_mask)
1402 {
1403         int val = cfg->rs->iassign [sym_reg];
1404         if (val < 0) {
1405                 int spill = 0;
1406                 if (val < -1) {
1407                         /* the register gets spilled after this inst */
1408                         spill = -val -1;
1409                 }
1410                 val = mono_regstate_alloc_int (cfg->rs, allow_mask);
1411                 if (val < 0)
1412                         val = get_register_spilling (cfg, curinst, ins, allow_mask, sym_reg);
1413                 cfg->rs->iassign [sym_reg] = val;
1414                 /* add option to store before the instruction for src registers */
1415                 if (spill)
1416                         create_spilled_store (cfg, spill, val, sym_reg, ins);
1417         }
1418         cfg->rs->isymbolic [val] = sym_reg;
1419         return val;
1420 }
1421
1422 /* Parameters used by the register allocator */
1423
1424 /* Use %l4..%l7 as local registers */
1425 #define ARCH_CALLER_REGS (0xf0<<16)
1426 /* Use %f2..%f30 as the double precision floating point local registers */
1427 #define ARCH_CALLER_FREGS (0x55555554)
1428
1429 /* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
1430
1431 /*
1432  * Local register allocation.
1433  * We first scan the list of instructions and we save the liveness info of
1434  * each register (when the register is first used, when it's value is set etc.).
1435  * We also reverse the list of instructions (in the InstList list) because assigning
1436  * registers backwards allows for more tricks to be used.
1437  */
1438 void
1439 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1440 {
1441         MonoInst *ins;
1442         MonoRegState *rs = cfg->rs;
1443         int i, val;
1444         RegTrack *reginfo, *reginfof;
1445         RegTrack *reginfo1, *reginfo2, *reginfod;
1446         InstList *tmp, *reversed = NULL;
1447         const char *spec;
1448         guint32 src1_mask, src2_mask, dest_mask;
1449         guint32 cur_iregs, cur_fregs;
1450
1451         /* FIXME: clobbering */
1452
1453         if (!bb->code)
1454                 return;
1455         rs->next_vireg = bb->max_ireg;
1456         rs->next_vfreg = bb->max_freg;
1457         mono_regstate_assign (rs);
1458         reginfo = mono_mempool_alloc0 (cfg->mempool, sizeof (RegTrack) * rs->next_vireg);
1459         reginfof = mono_mempool_alloc0 (cfg->mempool, sizeof (RegTrack) * rs->next_vfreg);
1460         rs->ifree_mask = ARCH_CALLER_REGS;
1461         rs->ffree_mask = ARCH_CALLER_FREGS;
1462
1463         ins = bb->code;
1464         i = 1;
1465         DEBUG (g_print ("LOCAL regalloc: basic block: %d\n", bb->block_num));
1466         /* forward pass on the instructions to collect register liveness info */
1467         while (ins) {
1468                 spec = ins_spec [ins->opcode];
1469                 g_assert (spec);
1470                 DEBUG (print_ins (i, ins));
1471
1472                 if (spec [MONO_INST_SRC1]) {
1473                         if (spec [MONO_INST_SRC1] == 'f')
1474                                 reginfo1 = reginfof;
1475                         else
1476                                 reginfo1 = reginfo;
1477                         reginfo1 [ins->sreg1].prev_use = reginfo1 [ins->sreg1].last_use;
1478                         reginfo1 [ins->sreg1].last_use = i;
1479                 } else {
1480                         ins->sreg1 = -1;
1481                 }
1482                 if (spec [MONO_INST_SRC2]) {
1483                         if (spec [MONO_INST_SRC2] == 'f')
1484                                 reginfo2 = reginfof;
1485                         else
1486                                 reginfo2 = reginfo;
1487                         reginfo2 [ins->sreg2].prev_use = reginfo2 [ins->sreg2].last_use;
1488                         reginfo2 [ins->sreg2].last_use = i;
1489                 } else {
1490                         ins->sreg2 = -1;
1491                 }
1492                 if (spec [MONO_INST_DEST]) {
1493                         if (spec [MONO_INST_DEST] == 'f')
1494                                 reginfod = reginfof;
1495                         else
1496                                 reginfod = reginfo;
1497                         if (spec [MONO_INST_DEST] != 'b') /* it's not just a base register */
1498                                 reginfod [ins->dreg].killed_in = i;
1499                         reginfod [ins->dreg].prev_use = reginfod [ins->dreg].last_use;
1500                         reginfod [ins->dreg].last_use = i;
1501                         if (reginfod [ins->dreg].born_in == 0 || reginfod [ins->dreg].born_in > i)
1502                                 reginfod [ins->dreg].born_in = i;
1503                         if (spec [MONO_INST_DEST] == 'l') {
1504                                 /* result in eax:edx, the virtual register is allocated sequentially */
1505                                 reginfod [ins->dreg + 1].prev_use = reginfod [ins->dreg + 1].last_use;
1506                                 reginfod [ins->dreg + 1].last_use = i;
1507                                 if (reginfod [ins->dreg + 1].born_in == 0 || reginfod [ins->dreg + 1].born_in > i)
1508                                         reginfod [ins->dreg + 1].born_in = i;
1509                         }
1510                 } else {
1511                         ins->dreg = -1;
1512                 }
1513                 reversed = inst_list_prepend (cfg->mempool, reversed, ins);
1514                 ++i;
1515                 ins = ins->next;
1516         }
1517
1518         cur_iregs = ARCH_CALLER_REGS;
1519         cur_fregs = ARCH_CALLER_FREGS;
1520
1521         DEBUG (print_regtrack (reginfo, rs->next_vireg));
1522         DEBUG (print_regtrack (reginfof, rs->next_vfreg));
1523         tmp = reversed;
1524         while (tmp) {
1525                 int prev_dreg, prev_sreg1, prev_sreg2;
1526                 --i;
1527                 ins = tmp->data;
1528                 spec = ins_spec [ins->opcode];
1529                 DEBUG (g_print ("processing:"));
1530                 DEBUG (print_ins (i, ins));
1531
1532                 /* make the register available for allocation: FIXME add fp reg */
1533                 if (ins->opcode == OP_SETREG || ins->opcode == OP_SETREGIMM) {
1534                         /* Dont free register which can't be allocated */
1535                         if ((ins->dreg << 1) | ARCH_CALLER_REGS) {
1536                                 cur_iregs |= 1 << ins->dreg;
1537                                 DEBUG (g_print ("adding %d to cur_iregs\n", ins->dreg));
1538                         }
1539                 } else if (ins->opcode == OP_SETFREG) {
1540                         if ((ins->dreg << 1) | ARCH_CALLER_FREGS) {
1541                                 cur_fregs |= 1 << ins->dreg;
1542                                 DEBUG (g_print ("adding %d to cur_fregs\n", ins->dreg));
1543                         }
1544                 } else if (spec [MONO_INST_CLOB] == 'c') {
1545                         MonoCallInst *cinst = (MonoCallInst*)ins;
1546                         DEBUG (g_print ("excluding regs 0x%x from cur_iregs (0x%x)\n", cinst->used_iregs, cur_iregs));
1547                         cur_iregs &= ~cinst->used_iregs;
1548                         cur_fregs &= ~cinst->used_fregs;
1549                         DEBUG (g_print ("available cur_iregs: 0x%x\n", cur_iregs));
1550                         /* registers used by the calling convention are excluded from
1551                          * allocation: they will be selectively enabled when they are
1552                          * assigned by the special SETREG opcodes.
1553                          */
1554                 }
1555                 dest_mask = src1_mask = src2_mask = cur_iregs;
1556
1557                 /*
1558                  * DEST
1559                  */
1560                 /* update for use with FP regs... */
1561                 if (spec [MONO_INST_DEST] == 'f') {
1562                         if (ins->dreg >= MONO_MAX_FREGS) {
1563                                 val = rs->fassign [ins->dreg];
1564                                 prev_dreg = ins->dreg;
1565                                 if (val < 0) {
1566                                         int spill = 0;
1567                                         if (val < -1) {
1568                                                 /* the register gets spilled after this inst */
1569                                                 spill = -val -1;
1570                                         }
1571                                         dest_mask = cur_fregs;
1572                                         val = mono_regstate_alloc_float (rs, dest_mask);
1573                                         if (val < 0)
1574                                                 val = get_float_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1575                                         rs->fassign [ins->dreg] = val;
1576                                         if (spill)
1577                                                 create_spilled_store_float (cfg, spill, val, prev_dreg, ins);
1578                                 }
1579                                 DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
1580                                 rs->fsymbolic [val] = prev_dreg;
1581                                 ins->dreg = val;
1582                         } else {
1583                                 prev_dreg = -1;
1584                         }
1585                         if (freg_is_freeable (ins->dreg) && prev_dreg >= 0 && (reginfo [prev_dreg].born_in >= i || !(cur_fregs & (1 << ins->dreg)))) {
1586                                 DEBUG (g_print ("\tfreeable %s (R%d) (born in %d)\n", mono_arch_regname (ins->dreg), prev_dreg, reginfo [prev_dreg].born_in));
1587                                 mono_regstate_free_float (rs, ins->dreg);
1588                         }
1589                 } else if (ins->dreg >= MONO_MAX_IREGS) {
1590                         val = rs->iassign [ins->dreg];
1591                         prev_dreg = ins->dreg;
1592                         if (val < 0) {
1593                                 int spill = 0;
1594                                 if (val < -1) {
1595                                         /* the register gets spilled after this inst */
1596                                         spill = -val -1;
1597                                 }
1598                                 val = mono_regstate_alloc_int (rs, dest_mask);
1599                                 if (val < 0)
1600                                         val = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1601                                 rs->iassign [ins->dreg] = val;
1602                                 if (spill)
1603                                         create_spilled_store (cfg, spill, val, prev_dreg, ins);
1604                         }
1605                         DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
1606                         rs->isymbolic [val] = prev_dreg;
1607                         ins->dreg = val;
1608                         if (spec [MONO_INST_DEST] == 'l') {
1609                                 int hreg = prev_dreg + 1;
1610                                 val = rs->iassign [hreg];
1611                                 if (val < 0) {
1612                                         int spill = 0;
1613                                         if (val < -1) {
1614                                                 /* the register gets spilled after this inst */
1615                                                 spill = -val -1;
1616                                         }
1617                                         /* The second register must be a pair of the first */
1618                                         dest_mask = 1 << (rs->iassign [prev_dreg] + 1);
1619                                         val = mono_regstate_alloc_int (rs, dest_mask);
1620                                         if (val < 0)
1621                                                 val = get_register_spilling (cfg, tmp, ins, dest_mask, hreg);
1622                                         rs->iassign [hreg] = val;
1623                                         if (spill)
1624                                                 create_spilled_store (cfg, spill, val, hreg, ins);
1625                                 }
1626                                 else {
1627                                         /* The second register must be a pair of the first */
1628                                         if (val != rs->iassign [prev_dreg] + 1) {
1629                                                 dest_mask = 1 << (rs->iassign [prev_dreg] + 1);
1630
1631                                                 val = mono_regstate_alloc_int (rs, dest_mask);
1632                                                 if (val < 0)
1633                                                         val = get_register_spilling (cfg, tmp, ins, dest_mask, hreg);
1634
1635                                                 create_copy_ins (cfg, rs->iassign [hreg], val, ins);
1636
1637                                                 rs->iassign [hreg] = val;
1638                                         }
1639                                 }
1640
1641                                 DEBUG (g_print ("\tassigned hreg %s to dest R%d\n", mono_arch_regname (val), hreg));
1642                                 rs->isymbolic [val] = hreg;
1643
1644                                 if (reg_is_freeable (val) && hreg >= 0 && (reginfo [hreg].born_in >= i && !(cur_iregs & (1 << val)))) {
1645                                         DEBUG (g_print ("\tfreeable %s (R%d)\n", mono_arch_regname (val), hreg));
1646                                         mono_regstate_free_int (rs, val);
1647                                 }
1648                         }
1649                 } else {
1650                         prev_dreg = -1;
1651                 }
1652                 if (spec [MONO_INST_DEST] != 'f' && reg_is_freeable (ins->dreg) && prev_dreg >= 0 && (reginfo [prev_dreg].born_in >= i)) {
1653                         DEBUG (g_print ("\tfreeable %s (R%d) (born in %d)\n", mono_arch_regname (ins->dreg), prev_dreg, reginfo [prev_dreg].born_in));
1654                         mono_regstate_free_int (rs, ins->dreg);
1655                 }
1656
1657                 /**
1658                  * SRC1
1659                  */
1660                 if (spec [MONO_INST_SRC1] == 'f') {
1661                         if (ins->sreg1 >= MONO_MAX_FREGS) {
1662                                 val = rs->fassign [ins->sreg1];
1663                                 prev_sreg1 = ins->sreg1;
1664                                 if (val < 0) {
1665                                         int spill = 0;
1666                                         if (val < -1) {
1667                                                 /* the register gets spilled after this inst */
1668                                                 spill = -val -1;
1669                                         }
1670                                         //g_assert (val == -1); /* source cannot be spilled */
1671                                         src1_mask = cur_fregs;
1672                                         val = mono_regstate_alloc_float (rs, src1_mask);
1673                                         if (val < 0)
1674                                                 val = get_float_register_spilling (cfg, tmp, ins, src1_mask, ins->sreg1);
1675                                         rs->fassign [ins->sreg1] = val;
1676                                         DEBUG (g_print ("\tassigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1677                                         if (spill) {
1678                                                 MonoInst *store = create_spilled_store_float (cfg, spill, val, prev_sreg1, NULL);
1679                                                 insert_before_ins (ins, tmp, store);
1680                                         }
1681                                 }
1682                                 rs->fsymbolic [val] = prev_sreg1;
1683                                 ins->sreg1 = val;
1684                         } else {
1685                                 prev_sreg1 = -1;
1686                         }
1687                 } else if (ins->sreg1 >= MONO_MAX_IREGS) {
1688                         val = rs->iassign [ins->sreg1];
1689                         prev_sreg1 = ins->sreg1;
1690                         if (val < 0) {
1691                                 int spill = 0;
1692                                 if (val < -1) {
1693                                         /* the register gets spilled after this inst */
1694                                         spill = -val -1;
1695                                 }
1696                                 if (0 && ins->opcode == OP_MOVE) {
1697                                         /*
1698                                          * small optimization: the dest register is already allocated
1699                                          * but the src one is not: we can simply assign the same register
1700                                          * here and peephole will get rid of the instruction later.
1701                                          * This optimization may interfere with the clobbering handling:
1702                                          * it removes a mov operation that will be added again to handle clobbering.
1703                                          * There are also some other issues that should with make testjit.
1704                                          */
1705                                         mono_regstate_alloc_int (rs, 1 << ins->dreg);
1706                                         val = rs->iassign [ins->sreg1] = ins->dreg;
1707                                         //g_assert (val >= 0);
1708                                         DEBUG (g_print ("\tfast assigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1709                                 } else {
1710                                         //g_assert (val == -1); /* source cannot be spilled */
1711                                         val = mono_regstate_alloc_int (rs, src1_mask);
1712                                         if (val < 0)
1713                                                 val = get_register_spilling (cfg, tmp, ins, src1_mask, ins->sreg1);
1714                                         rs->iassign [ins->sreg1] = val;
1715                                         DEBUG (g_print ("\tassigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1716                                 }
1717                                 if (spill) {
1718                                         MonoInst *store = create_spilled_store (cfg, spill, val, prev_sreg1, NULL);
1719                                         insert_before_ins (ins, tmp, store);
1720                                 }
1721                         }
1722                         rs->isymbolic [val] = prev_sreg1;
1723                         ins->sreg1 = val;
1724                 } else {
1725                         prev_sreg1 = -1;
1726                 }
1727
1728                 /*
1729                  * SRC2
1730                  */
1731                 if (spec [MONO_INST_SRC2] == 'f') {
1732                         if (ins->sreg2 >= MONO_MAX_FREGS) {
1733                                 val = rs->fassign [ins->sreg2];
1734                                 prev_sreg2 = ins->sreg2;
1735                                 if (val < 0) {
1736                                         int spill = 0;
1737                                         if (val < -1) {
1738                                                 /* the register gets spilled after this inst */
1739                                                 spill = -val -1;
1740                                         }
1741                                         src2_mask = cur_fregs;
1742                                         val = mono_regstate_alloc_float (rs, src2_mask);
1743                                         if (val < 0)
1744                                                 val = get_float_register_spilling (cfg, tmp, ins, src2_mask, ins->sreg2);
1745                                         rs->fassign [ins->sreg2] = val;
1746                                         DEBUG (g_print ("\tassigned sreg2 %s to R%d\n", mono_arch_regname (val), ins->sreg2));
1747                                         if (spill)
1748                                                 create_spilled_store_float (cfg, spill, val, prev_sreg2, ins);
1749                                 }
1750                                 rs->fsymbolic [val] = prev_sreg2;
1751                                 ins->sreg2 = val;
1752                         } else {
1753                                 prev_sreg2 = -1;
1754                         }
1755                 } else if (ins->sreg2 >= MONO_MAX_IREGS) {
1756                         val = rs->iassign [ins->sreg2];
1757                         prev_sreg2 = ins->sreg2;
1758                         if (val < 0) {
1759                                 int spill = 0;
1760                                 if (val < -1) {
1761                                         /* the register gets spilled after this inst */
1762                                         spill = -val -1;
1763                                 }
1764                                 val = mono_regstate_alloc_int (rs, src2_mask);
1765                                 if (val < 0)
1766                                         val = get_register_spilling (cfg, tmp, ins, src2_mask, ins->sreg2);
1767                                 rs->iassign [ins->sreg2] = val;
1768                                 DEBUG (g_print ("\tassigned sreg2 %s to R%d\n", mono_arch_regname (val), ins->sreg2));
1769                                 if (spill)
1770                                         create_spilled_store (cfg, spill, val, prev_sreg2, ins);
1771                         }
1772                         rs->isymbolic [val] = prev_sreg2;
1773                         ins->sreg2 = val;
1774                 } else {
1775                         prev_sreg2 = -1;
1776                 }
1777
1778                 if (spec [MONO_INST_CLOB] == 'c') {
1779                         int j, s;
1780                         guint32 clob_mask = ARCH_CALLER_REGS;
1781                         for (j = 0; j < MONO_MAX_IREGS; ++j) {
1782                                 s = 1 << j;
1783                                 if ((clob_mask & s) && !(rs->ifree_mask & s) && j != ins->sreg1) {
1784                                         //g_warning ("register %s busy at call site\n", mono_arch_regname (j));
1785                                 }
1786                         }
1787                 }
1788                 /*if (reg_is_freeable (ins->sreg1) && prev_sreg1 >= 0 && reginfo [prev_sreg1].born_in >= i) {
1789                         DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg1)));
1790                         mono_regstate_free_int (rs, ins->sreg1);
1791                 }
1792                 if (reg_is_freeable (ins->sreg2) && prev_sreg2 >= 0 && reginfo [prev_sreg2].born_in >= i) {
1793                         DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg2)));
1794                         mono_regstate_free_int (rs, ins->sreg2);
1795                 }*/
1796
1797                 //DEBUG (print_ins (i, ins));
1798
1799                 tmp = tmp->next;
1800         }
1801 }
1802
1803 static guchar*
1804 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int size, gboolean is_signed)
1805 {
1806         return code;
1807 }
1808
1809 static unsigned char*
1810 mono_emit_stack_alloc (guchar *code, MonoInst* tree)
1811 {
1812         NOT_IMPLEMENTED;
1813         return code;
1814 }
1815
1816 static void
1817 sparc_patch (guint8 *code, guint8 *target)
1818 {
1819         guint32 ins = *(guint32*)code;
1820         guint32 op = ins >> 30;
1821         guint32 op2 = (ins >> 22) & 0x7;
1822         guint32 rd = (ins >> 25) & 0x1f;
1823         gint32 disp = (target - code) >> 2;
1824
1825 //      g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
1826
1827         if ((op == 0) && (op2 == 2)) {
1828                 if (!sparc_is_imm22 (disp))
1829                         NOT_IMPLEMENTED;
1830                 /* Bicc */
1831                 *(guint32*)code = ((ins >> 22) << 22) | disp;
1832         }
1833         else if ((op == 0) && (op2 == 6)) {
1834                 if (!sparc_is_imm22 (disp))
1835                         NOT_IMPLEMENTED;
1836                 /* FBicc */
1837                 *(guint32*)code = ((ins >> 22) << 22) | disp;
1838         }
1839         else if ((op == 0) && (op2 == 4)) {
1840                 guint32 ins2 = *(guint32*)(code + 4);
1841
1842                 if (((ins2 >> 30) == 2) && (((ins2 >> 19) & 0x3f) == 2)) {
1843                         /* sethi followed by or */
1844                         guint32 *p = (guint32*)code;
1845                         sparc_set (p, target, rd);
1846                         while (p < (code + 4))
1847                                 sparc_nop (p);
1848                 }
1849                 else if ((sparc_inst_op (ins2) == 3) && (sparc_inst_imm (ins2))) {
1850                         /* sethi followed by load/store */
1851                         guint32 t = (guint32)target;
1852                         *(guint32*)code = ins | (t >> 10);
1853                         *(guint32*)(code + 4) = ins2 | (t & 0x3ff);
1854                 }
1855                 else if ((sparc_inst_op (ins2) == 2) && (sparc_inst_op3 (ins2) == 0x38) &&
1856                                  (sparc_inst_imm (ins2))) {
1857                         /* sethi followed by jmpl */
1858                         guint32 t = (guint32)target;
1859                         *(guint32*)code = ins | (t >> 10);
1860                         *(guint32*)(code + 4) = ins2 | (t & 0x3ff);
1861                 }
1862                 else
1863                         NOT_IMPLEMENTED;
1864         }
1865         else if (op == 01) {
1866                 sparc_call_simple (code, target - code);
1867         }
1868         else
1869                 NOT_IMPLEMENTED;
1870
1871 //      g_print ("patched with 0x%08x\n", ins);
1872 }
1873
1874 static guint32*
1875 emit_move_return_value (MonoInst *ins, guint32 *code)
1876 {
1877         /* Move return value to the target register */
1878         /* FIXME: do this in the local reg allocator */
1879         switch (ins->opcode) {
1880         case OP_VOIDCALL:
1881         case OP_VOIDCALL_REG:
1882         case OP_VOIDCALL_MEMBASE:
1883                 break;
1884         case CEE_CALL:
1885         case OP_CALL_REG:
1886         case OP_CALL_MEMBASE:
1887                 sparc_mov_reg_reg (code, sparc_o0, ins->dreg);
1888                 break;
1889         case OP_LCALL:
1890         case OP_LCALL_REG:
1891         case OP_LCALL_MEMBASE:
1892                 /*
1893                  * ins->dreg is the least significant reg due to the lreg: LCALL rule
1894                  * in inssel.brg.
1895                  */
1896                 sparc_mov_reg_reg (code, sparc_o0, ins->dreg + 1);
1897                 sparc_mov_reg_reg (code, sparc_o1, ins->dreg);
1898                 break;
1899         case OP_FCALL:
1900         case OP_FCALL_REG:
1901         case OP_FCALL_MEMBASE:
1902                 sparc_fmovs (code, sparc_f0, ins->dreg);
1903                 sparc_fmovs (code, sparc_f1, ins->dreg + 1);
1904                 break;
1905         case OP_VCALL:
1906         case OP_VCALL_REG:
1907         case OP_VCALL_MEMBASE:
1908                 break;
1909         default:
1910                 NOT_IMPLEMENTED;
1911         }
1912
1913         return code;
1914 }
1915
1916 /*
1917  * Some conventions used in the following code.
1918  * 2) The only scratch registers we have are o7 and g1.  We try to
1919  * stick to o7 when we can, and use g1 when necessary.
1920  */
1921
1922 void
1923 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
1924 {
1925         MonoInst *ins;
1926         MonoCallInst *call;
1927         guint offset;
1928         guint32 *code = (guint32*)(cfg->native_code + cfg->code_len);
1929         MonoInst *last_ins = NULL;
1930         guint last_offset = 0;
1931         int max_len, cpos;
1932
1933         GC_malloc (240);
1934
1935         if (cfg->opt & MONO_OPT_PEEPHOLE)
1936                 peephole_pass (cfg, bb);
1937
1938         if (cfg->verbose_level > 2)
1939                 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
1940
1941         cpos = bb->max_offset;
1942
1943         if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
1944                 NOT_IMPLEMENTED;
1945         }
1946
1947         ins = bb->code;
1948         while (ins) {
1949                 offset = (guint8*)code - cfg->native_code;
1950
1951                 max_len = ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
1952
1953                 if (offset > (cfg->code_size - max_len - 16)) {
1954                         cfg->code_size *= 2;
1955                         cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
1956                         code = (guint32*)(cfg->native_code + offset);
1957                 }
1958                 //      if (ins->cil_code)
1959                 //              g_print ("cil code\n");
1960
1961                 switch (ins->opcode) {
1962                 case OP_STOREI1_MEMBASE_IMM:
1963                         EMIT_STORE_MEMBASE_IMM (ins, stb);
1964                         break;
1965                 case OP_STOREI2_MEMBASE_IMM:
1966                         EMIT_STORE_MEMBASE_IMM (ins, sth);
1967                         break;
1968                 case OP_STORE_MEMBASE_IMM:
1969                 case OP_STOREI4_MEMBASE_IMM:
1970                         EMIT_STORE_MEMBASE_IMM (ins, st);
1971                         break;
1972                 case OP_STOREI1_MEMBASE_REG:
1973                         EMIT_STORE_MEMBASE_REG (ins, stb);
1974                         break;
1975                 case OP_STOREI2_MEMBASE_REG:
1976                         EMIT_STORE_MEMBASE_REG (ins, sth);
1977                         break;
1978                 case OP_STORE_MEMBASE_REG:
1979                 case OP_STOREI4_MEMBASE_REG:
1980                         EMIT_STORE_MEMBASE_REG (ins, st);
1981                         break;
1982                 case OP_STOREI8_MEMBASE_REG:
1983                         /* Only used by OP_MEMSET */
1984                         EMIT_STORE_MEMBASE_REG (ins, std);
1985                         break;
1986                 case CEE_LDIND_I:
1987                 case CEE_LDIND_I4:
1988                 case CEE_LDIND_U4:
1989                         sparc_ld (code, ins->inst_p0, sparc_g0, ins->dreg);
1990                         break;
1991                 /* The cast IS BAD (maybe).  But it needs to be done... */
1992                 case OP_LOADU4_MEM:
1993                         sparc_set (code, (guint)ins->inst_p0, ins->dreg);
1994                         sparc_ld (code, ins->dreg, sparc_g0, ins->dreg);
1995                         break;
1996                 case OP_LOAD_MEMBASE:
1997                 case OP_LOADI4_MEMBASE:
1998                 case OP_LOADU4_MEMBASE:
1999                         EMIT_LOAD_MEMBASE (ins, ld);
2000                         break;
2001                 case OP_LOADU1_MEMBASE:
2002                         EMIT_LOAD_MEMBASE (ins, ldub);
2003                         break;
2004                 case OP_LOADI1_MEMBASE:
2005                         EMIT_LOAD_MEMBASE (ins, ldsb);
2006                         break;
2007                 case OP_LOADU2_MEMBASE:
2008                         EMIT_LOAD_MEMBASE (ins, lduh);
2009                         break;
2010                 case OP_LOADI2_MEMBASE:
2011                         EMIT_LOAD_MEMBASE (ins, ldsh);
2012                         break;
2013                 case CEE_CONV_I1:
2014                         sparc_sll_imm (code, ins->sreg1, 24, sparc_o7);
2015                         sparc_sra_imm (code, sparc_o7, 24, ins->dreg);
2016                         break;
2017                 case CEE_CONV_I2:
2018                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2019                         sparc_sra_imm (code, sparc_o7, 16, ins->dreg);
2020                         break;
2021                 /* GCC does this one differently.  Don't ask me WHY. */
2022                 case CEE_CONV_U1:
2023                         sparc_and_imm (code, FALSE, ins->sreg1, 0xff, ins->dreg);
2024                         break;
2025                 case CEE_CONV_U2:
2026                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2027                         sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
2028                         break;
2029                 case OP_COMPARE:
2030                         sparc_cmp (code, ins->sreg1, ins->sreg2);
2031                         break;
2032                 case OP_COMPARE_IMM:
2033                         if (sparc_is_imm13 (ins->inst_imm))
2034                                 sparc_cmp_imm (code, ins->sreg1, ins->inst_imm);
2035                         else {
2036                                 sparc_set (code, ins->inst_imm, sparc_o7);
2037                                 sparc_cmp (code, ins->sreg1, sparc_o7);
2038                         }
2039                         break;
2040                 case OP_X86_TEST_NULL:
2041                         sparc_cmp_imm (code, ins->sreg1, 0);
2042                         break;
2043                 case CEE_BREAK:
2044                         sparc_ta (code, 1);
2045                         break;
2046                 case OP_ADDCC:
2047                         sparc_add (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2048                         break;
2049                 case CEE_ADD:
2050                         sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2051                         break;
2052                 case OP_ADC:
2053                         sparc_addx (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2054                         break;
2055                 case OP_ADD_IMM:
2056                         EMIT_ALU_IMM (ins, add, FALSE);
2057                         break;
2058                 case OP_ADC_IMM:
2059                         EMIT_ALU_IMM (ins, addx, FALSE);
2060                         break;
2061                 case OP_SUBCC:
2062                         sparc_sub (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2063                         break;
2064                 case CEE_SUB:
2065                         sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2066                         break;
2067                 case OP_SBB:
2068                         sparc_subx (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2069                         break;
2070                 case OP_SUB_IMM:
2071                         // we add the negated value
2072                         if (sparc_is_imm13 (- ins->inst_imm))
2073                                 sparc_add_imm (code, FALSE, ins->sreg1, -ins->inst_imm, ins->dreg);
2074                         else {
2075                                 sparc_set (code, - ins->inst_imm, sparc_o7);
2076                                 sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2077                         }
2078                         break;
2079                 case OP_SBB_IMM:
2080                         EMIT_ALU_IMM (ins, subx, FALSE);
2081                         break;
2082                 case CEE_AND:
2083                         sparc_and (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2084                         break;
2085                 case OP_AND_IMM:
2086                         EMIT_ALU_IMM (ins, and, FALSE);
2087                         break;
2088                 case CEE_DIV:
2089                         /* Sign extend sreg1 into %y */
2090                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2091                         sparc_wry (code, sparc_o7, sparc_g0);
2092                         sparc_sdiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2093                         break;
2094                 case CEE_DIV_UN:
2095                         sparc_wry (code, sparc_g0, sparc_g0);
2096                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2097                         break;
2098                 case OP_DIV_IMM:
2099                         /* Sign extend sreg1 into %y */
2100                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2101                         sparc_wry (code, sparc_o7, sparc_g0);
2102                         EMIT_ALU_IMM (ins, sdiv, FALSE);
2103                         break;
2104                 case CEE_REM:
2105                         /* Sign extend sreg1 into %y */
2106                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2107                         sparc_wry (code, sparc_o7, sparc_g0);
2108                         sparc_sdiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2109                         sparc_smul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2110                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2111                         break;
2112                 case CEE_REM_UN:
2113                         sparc_wry (code, sparc_g0, sparc_g0);
2114                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2115                         sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2116                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2117                         break;
2118                 case OP_REM_IMM:
2119                         /* Sign extend sreg1 into %y */
2120                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2121                         sparc_wry (code, sparc_o7, sparc_g0);
2122                         if (!sparc_is_imm13 (ins->inst_imm)) {
2123                                 sparc_set (code, ins->inst_imm, sparc_g1);
2124                                 sparc_sdiv (code, FALSE, ins->sreg1, sparc_g1, sparc_o7);
2125                                 sparc_smul (code, FALSE, sparc_o7, sparc_g1, sparc_o7);
2126                         }
2127                         else {
2128                                 sparc_sdiv_imm (code, FALSE, ins->sreg1, ins->inst_imm, sparc_o7);
2129                                 sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
2130                         }
2131                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2132                         break;
2133                 case CEE_OR:
2134                         sparc_or (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2135                         break;
2136                 case OP_OR_IMM:
2137                         EMIT_ALU_IMM (ins, or, FALSE);
2138                         break;
2139                 case CEE_XOR:
2140                         sparc_xor (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2141                         break;
2142                 case OP_XOR_IMM:
2143                         EMIT_ALU_IMM (ins, xor, FALSE);
2144                         break;
2145                 case CEE_SHL:
2146                         sparc_sll (code, ins->sreg1, ins->sreg2, ins->dreg);
2147                         break;
2148                 case OP_SHL_IMM:
2149                         if (sparc_is_imm13 (ins->inst_imm))
2150                                 sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2151                         else {
2152                                 sparc_set (code, ins->inst_imm, sparc_o7);
2153                                 sparc_sll (code, ins->sreg1, sparc_o7, ins->dreg);
2154                         }
2155                         break;
2156                 case CEE_SHR:
2157                         sparc_sra (code, ins->sreg1, ins->sreg2, ins->dreg);
2158                         break;
2159                 case OP_SHR_IMM:
2160                         if (sparc_is_imm13 (ins->inst_imm))
2161                                 sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2162                         else {
2163                                 sparc_set (code, ins->inst_imm, sparc_o7);
2164                                 sparc_sra (code, ins->sreg1, sparc_o7, ins->dreg);
2165                         }
2166                         break;
2167                 case OP_SHR_UN_IMM:
2168                         if (sparc_is_imm13 (ins->inst_imm))
2169                                 sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2170                         else {
2171                                 sparc_set (code, ins->inst_imm, sparc_o7);
2172                                 sparc_srl (code, ins->sreg1, sparc_o7, ins->dreg);
2173                         }
2174                         break;
2175                 case CEE_SHR_UN:
2176                         sparc_srl (code, ins->sreg1, ins->sreg2, ins->dreg);
2177                         break;
2178                 case CEE_NOT:
2179                         /* can't use sparc_not */
2180                         sparc_xnor (code, FALSE, ins->sreg1, sparc_g0, ins->dreg);
2181                         break;
2182                 case CEE_NEG:
2183                         /* can't use sparc_neg */
2184                         sparc_sub (code, FALSE, sparc_g0, ins->sreg1, ins->dreg);
2185                         break;
2186                 case CEE_MUL:
2187                         sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2188                         break;
2189                 case OP_MUL_IMM:
2190                         EMIT_ALU_IMM (ins, smul, FALSE);
2191                         break;
2192                 case CEE_MUL_OVF:
2193                         /* FIXME: */
2194                         sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2195                         break;
2196                 case CEE_MUL_OVF_UN:
2197                         /* FIXME: */
2198                         sparc_umul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2199                         break;
2200                 case OP_ICONST:
2201                 case OP_SETREGIMM:
2202                         sparc_set (code, ins->inst_c0, ins->dreg);
2203                         break;
2204                 case CEE_CONV_I4:
2205                 case CEE_CONV_U4:
2206                 case OP_MOVE:
2207                 case OP_SETREG:
2208                         if (ins->sreg1 != ins->dreg)
2209                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2210                         break;
2211                 case CEE_JMP:
2212                         g_assert_not_reached ();
2213                         break;
2214                 case OP_CHECK_THIS:
2215                         /* ensure ins->sreg1 is not NULL */
2216                         sparc_ld_imm (code, ins->sreg1, 0, sparc_g0);
2217                         break;
2218                 case OP_FCALL:
2219                 case OP_LCALL:
2220                 case OP_VCALL:
2221                 case OP_VOIDCALL:
2222                 case CEE_CALL:
2223                         call = (MonoCallInst*)ins;
2224                         if (ins->flags & MONO_INST_HAS_METHOD)
2225                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD, call->method);
2226                         else
2227                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, call->fptr);
2228                         sparc_call_simple (code, 0);
2229                         sparc_nop (code);
2230
2231                         code = emit_move_return_value (ins, code);
2232                         break;
2233                 case OP_FCALL_REG:
2234                 case OP_LCALL_REG:
2235                 case OP_VCALL_REG:
2236                 case OP_VOIDCALL_REG:
2237                 case OP_CALL_REG:
2238                         call = (MonoCallInst*)ins;
2239                         sparc_jmpl (code, ins->sreg1, sparc_g0, sparc_callsite);
2240                         sparc_nop (code);
2241
2242                         code = emit_move_return_value (ins, code);
2243                         break;
2244                 case OP_FCALL_MEMBASE:
2245                 case OP_LCALL_MEMBASE:
2246                 case OP_VCALL_MEMBASE:
2247                 case OP_VOIDCALL_MEMBASE:
2248                 case OP_CALL_MEMBASE:
2249                         call = (MonoCallInst*)ins;
2250                         g_assert (sparc_is_imm13 (ins->inst_offset));
2251
2252                         sparc_ld_imm (code, ins->inst_basereg, ins->inst_offset, sparc_o7);
2253                         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_callsite);
2254                         sparc_nop (code);
2255
2256                         code = emit_move_return_value (ins, code);
2257                         break;
2258                 case OP_OUTARG:
2259                         g_assert_not_reached ();
2260                         break;
2261                 case OP_LOCALLOC:
2262                         NOT_IMPLEMENTED;
2263                         break;
2264                 case CEE_RET:
2265                         /* The return is done in the epilog */
2266                         g_assert_not_reached ();
2267                         break;
2268                 case CEE_THROW: {
2269                         sparc_unimp (code, 0);
2270                         /* FIXME: */
2271                         break;
2272                 }
2273                 case OP_ENDFILTER:
2274                         /* FIXME: */
2275                         break;
2276                 case CEE_ENDFINALLY:
2277                         /* FIXME: */
2278                         break;
2279                 case OP_CALL_HANDLER:
2280                         /* FIXME: */
2281                         break;
2282                 case OP_LABEL:
2283                         ins->inst_c0 = (guint8*)code - cfg->native_code;
2284                         break;
2285                 case CEE_BR:
2286                         //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
2287                         if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
2288                                 break;
2289                         if (ins->flags & MONO_INST_BRLABEL) {
2290                                 if (ins->inst_i0->inst_c0) {
2291                                         gint32 disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2;
2292                                         g_assert (sparc_is_imm22 (disp));
2293                                         sparc_branch (code, 1, sparc_ba, disp);
2294                                 } else {
2295                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
2296                                         sparc_branch (code, 1, sparc_ba, 0);
2297                                 }
2298                         } else {
2299                                 if (ins->inst_target_bb->native_offset) {
2300                                         gint32 disp = (ins->inst_target_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2;
2301                                         g_assert (sparc_is_imm22 (disp));
2302                                         sparc_branch (code, 1, sparc_ba, disp);
2303                                 } else {
2304                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2305                                         sparc_branch (code, 1, sparc_ba, 0);
2306                                 }
2307                         }
2308                         sparc_nop (code);
2309                         break;
2310                 case OP_BR_REG:
2311                         sparc_jmp (code, ins->sreg1, sparc_g0);
2312                         sparc_nop (code);
2313                         break;
2314                 case OP_CEQ:
2315                 case OP_CLT:
2316                 case OP_CLT_UN:
2317                 case OP_CGT:
2318                 case OP_CGT_UN:
2319                         sparc_clr_reg (code, ins->dreg);
2320                         sparc_branch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
2321                         /* delay slot */
2322                         sparc_set (code, 1, ins->dreg);
2323                         break;
2324                 case OP_COND_EXC_EQ:
2325                 case OP_COND_EXC_NE_UN:
2326                 case OP_COND_EXC_LT:
2327                 case OP_COND_EXC_LT_UN:
2328                 case OP_COND_EXC_GT:
2329                 case OP_COND_EXC_GT_UN:
2330                 case OP_COND_EXC_GE:
2331                 case OP_COND_EXC_GE_UN:
2332                 case OP_COND_EXC_LE:
2333                 case OP_COND_EXC_LE_UN:
2334                 case OP_COND_EXC_OV:
2335                 case OP_COND_EXC_NO:
2336                 case OP_COND_EXC_C:
2337                 case OP_COND_EXC_NC:
2338                         /* FIXME: */
2339                         //EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_EQ],
2340                         //                          (ins->opcode < OP_COND_EXC_NE_UN), ins->inst_p1);
2341                         break;
2342                 case CEE_BEQ:
2343                 case CEE_BNE_UN:
2344                 case CEE_BLT:
2345                 case CEE_BLT_UN:
2346                 case CEE_BGT:
2347                 case CEE_BGT_UN:
2348                 case CEE_BGE:
2349                 case CEE_BGE_UN:
2350                 case CEE_BLE:
2351                 case CEE_BLE_UN:
2352                         EMIT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode));
2353                         break;
2354
2355                 /* floating point opcodes */
2356                 case OP_R8CONST: {
2357                         double d = *(double*)ins->inst_p0;
2358
2359                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
2360                         sparc_sethi (code, 0, sparc_o7);
2361                         sparc_lddf_imm (code, sparc_o7, 0, ins->dreg);
2362                         break;
2363                 }
2364                 case OP_R4CONST: {
2365                         float f = *(float*)ins->inst_p0;
2366
2367                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
2368                         sparc_sethi (code, 0, sparc_o7);
2369                         sparc_ldf_imm (code, sparc_o7, 0, ins->dreg);
2370
2371                         /* Extend to double */
2372                         sparc_fstod (code, ins->dreg, ins->dreg);
2373                         break;
2374                 }
2375                 case OP_STORER8_MEMBASE_REG:
2376                         if (!sparc_is_imm13 (ins->inst_offset + 4)) {
2377                                 sparc_set (code, ins->inst_offset, sparc_o7);
2378                                 if (ins->inst_offset % 8) {
2379                                         /* Misaligned */
2380                                         sparc_add (code, FALSE, ins->inst_destbasereg, sparc_o7, sparc_o7);
2381                                         sparc_stf (code, ins->sreg1, sparc_o7, sparc_g0);
2382                                         sparc_stf_imm (code, ins->sreg1 + 1, sparc_o7, 4);
2383                                 } else
2384                                         sparc_stdf (code, ins->sreg1, ins->inst_destbasereg, sparc_o7);
2385                         }
2386                         else {
2387                                 if (ins->inst_offset % 8) {
2388                                         /* Misaligned */
2389                                         sparc_stf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
2390                                         sparc_stf_imm (code, ins->sreg1 + 1, ins->inst_destbasereg, ins->inst_offset + 4);
2391                                 } else
2392                                         sparc_stdf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
2393                         }
2394                         break;
2395                 case OP_LOADR8_MEMBASE:
2396                         g_assert ((ins->inst_offset % 8) == 0);
2397                         EMIT_LOAD_MEMBASE (ins, lddf);
2398                         break;
2399                 case OP_STORER4_MEMBASE_REG:
2400                         /* This requires a double->single conversion */
2401                         sparc_fdtos (code, ins->sreg1, sparc_f0);
2402                         if (!sparc_is_imm13 (ins->inst_offset)) {
2403                                 sparc_set (code, ins->inst_offset, sparc_o7);
2404                                 sparc_stf (code, sparc_f0, ins->inst_destbasereg, sparc_o7);
2405                         }
2406                         else
2407                                 sparc_stf_imm (code, sparc_f0, ins->inst_destbasereg, ins->inst_offset);
2408                         break;
2409                 case OP_LOADR4_MEMBASE:
2410                         EMIT_LOAD_MEMBASE (ins, ldf);
2411                         /* Extend to double */
2412                         sparc_fstod (code, ins->dreg, ins->dreg);
2413                         break;
2414                 case OP_FMOVE:
2415                         sparc_fmovs (code, ins->sreg1, ins->dreg);
2416                         sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2417                         break;
2418                 case CEE_CONV_R4:
2419                         g_assert (sparc_is_imm13 (cfg->stack_offset));
2420                         sparc_st_imm (code, ins->sreg1, sparc_sp, cfg->stack_offset - 8);
2421                         sparc_ldf_imm (code, sparc_sp, cfg->stack_offset - 8, sparc_f0);
2422                         sparc_fitos (code, sparc_f0, sparc_f0);
2423                         sparc_fstod (code, sparc_f0, ins->dreg);
2424                         break;
2425                 case CEE_CONV_R8:
2426                         g_assert (sparc_is_imm13 (cfg->stack_offset));
2427                         sparc_st_imm (code, ins->sreg1, sparc_sp, cfg->stack_offset - 8);
2428                         sparc_ldf_imm (code, sparc_sp, cfg->stack_offset - 8, sparc_f0);
2429                         sparc_fitod (code, sparc_f0, ins->dreg);
2430                         break;
2431                 case OP_FCONV_TO_I1:
2432                         NOT_IMPLEMENTED;
2433                         break;
2434                 case OP_FCONV_TO_U1:
2435                         NOT_IMPLEMENTED;
2436                         break;
2437                 case OP_FCONV_TO_I2:
2438                         NOT_IMPLEMENTED;
2439                         break;
2440                 case OP_FCONV_TO_U2:
2441                         NOT_IMPLEMENTED;
2442                         break;
2443                 case OP_FCONV_TO_I4:
2444                 case OP_FCONV_TO_I:
2445                         sparc_fdtoi (code, ins->sreg1, sparc_f0);
2446                         sparc_stdf_imm (code, sparc_f0, sparc_sp, cfg->stack_offset - 8);
2447                         sparc_ld_imm (code, sparc_sp, cfg->stack_offset - 8, ins->dreg);
2448                         break;
2449                 case OP_FCONV_TO_U4:
2450                 case OP_FCONV_TO_U:
2451                         NOT_IMPLEMENTED;
2452                         break;
2453                 case OP_FCONV_TO_I8:
2454                 case OP_FCONV_TO_U8:
2455                         NOT_IMPLEMENTED;
2456                         break;
2457                 case OP_LCONV_TO_R_UN: {
2458                         NOT_IMPLEMENTED;
2459                         break;
2460                 }
2461                 case OP_LCONV_TO_OVF_I: {
2462                         guint32 *br [3], *label [1];
2463
2464                         /*
2465                          * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
2466                          */
2467                         sparc_cmp_imm (code, ins->sreg1, 0);
2468                         br [0] = code;
2469                         sparc_branch (code, 1, sparc_bneg, 0);
2470                         sparc_nop (code);
2471
2472                         /* positive */
2473                         /* ms word must be 0 */
2474                         sparc_cmp_imm (code, ins->sreg2, 0);
2475                         br [1] = code;
2476                         sparc_branch (code, 1, sparc_be, 0);
2477                         sparc_nop (code);
2478
2479                         label [0] = code;
2480                         /* FIXME: throw exception */
2481
2482                         /* negative */
2483                         sparc_patch (br [0], code);
2484
2485                         /* ms word must 0xfffffff */
2486                         sparc_cmp_imm (code, ins->sreg2, -1);
2487                         sparc_branch (code, 1, sparc_bne, label [0]);
2488
2489                         /* Ok */
2490                         sparc_patch (br [1], code);
2491                         if (ins->sreg1 != ins->dreg)
2492                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2493                         break;
2494                 }
2495                 case OP_FADD:
2496                         sparc_faddd (code, ins->sreg1, ins->sreg2, ins->dreg);
2497                         break;
2498                 case OP_FSUB:
2499                         sparc_fsubd (code, ins->sreg1, ins->sreg2, ins->dreg);
2500                         break;
2501                 case OP_FMUL:
2502                         sparc_fmuld (code, ins->sreg1, ins->sreg2, ins->dreg);
2503                         break;
2504                 case OP_FDIV:
2505                         sparc_fdivd (code, ins->sreg1, ins->sreg2, ins->dreg);
2506                         break;
2507                 case OP_FNEG:
2508                         sparc_fnegs (code, ins->sreg1, ins->dreg);
2509                         break;
2510                 case OP_FREM:
2511                         sparc_fdivd (code, ins->sreg1, ins->sreg2, sparc_f0);
2512                         sparc_fmuld (code, ins->sreg2, sparc_f0, sparc_f0);
2513                         sparc_fsubd (code, ins->sreg1, sparc_f0, ins->dreg);
2514                         break;
2515                 case OP_FCOMPARE:
2516                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
2517                         break;
2518                 case OP_FCEQ:
2519                 case OP_FCLT:
2520                 case OP_FCLT_UN:
2521                 case OP_FCGT:
2522                 case OP_FCGT_UN:
2523                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
2524                         sparc_clr_reg (code, ins->dreg);
2525                         switch (ins->opcode) {
2526                         case OP_FCLT_UN:
2527                         case OP_FCGT_UN:
2528                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 4);
2529                                 /* delay slot */
2530                                 sparc_set (code, 1, ins->dreg);
2531                                 sparc_fbranch (code, 1, sparc_fbu, 2);
2532                                 /* delay slot */
2533                                 sparc_set (code, 1, ins->dreg);
2534                                 break;
2535                         default:
2536                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
2537                                 /* delay slot */
2538                                 sparc_set (code, 1, ins->dreg);
2539                         }
2540                         break;
2541                 case OP_FBEQ:
2542                 case OP_FBLT:
2543                 case OP_FBGT:
2544                         EMIT_FLOAT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode));
2545                         break;
2546                 case OP_FBGE: {
2547                         /* clt.un + brfalse */
2548                         guint32 *p = code;
2549                         sparc_fbranch (code, 1, sparc_fbul, 0);
2550                         /* delay slot */
2551                         sparc_nop (code);
2552                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba);
2553                         sparc_patch ((guint8*)p, (guint8*)code);
2554                         break;
2555                 }
2556                 case OP_FBLE: {
2557                         /* cgt.un + brfalse */
2558                         guint32 *p = code;
2559                         sparc_fbranch (code, 1, sparc_fbug, 0);
2560                         /* delay slot */
2561                         sparc_nop (code);
2562                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba);
2563                         sparc_patch ((guint8*)p, (guint8*)code);
2564                         break;
2565                 }
2566                 case OP_FBNE_UN:
2567                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbne);
2568                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu);
2569                         break;
2570                 case OP_FBLT_UN:
2571                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbl);
2572                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu);
2573                         break;
2574                 case OP_FBGT_UN:
2575                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbg);
2576                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu);
2577                         break;
2578                 case OP_FBGE_UN:
2579                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbge);
2580                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu);
2581                         break;
2582                 case OP_FBLE_UN:
2583                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fble);
2584                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu);
2585                         break;
2586                 case CEE_CKFINITE: {
2587                         NOT_IMPLEMENTED;
2588                         break;
2589                 }
2590                 default:
2591 #ifdef __GNUC__
2592                         g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
2593 #else
2594                         g_warning ("%s:%d: unknown opcode %s\n", __FILE__, __LINE__, mono_inst_name (ins->opcode));
2595 #endif
2596                         g_assert_not_reached ();
2597                 }
2598
2599                 if ((cfg->opt & MONO_OPT_BRANCH) && (((guint8*)code - cfg->native_code - offset) > max_len)) {
2600                         g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
2601                                    mono_inst_name (ins->opcode), max_len, (guint8*)code - cfg->native_code - offset);
2602                         g_assert_not_reached ();
2603                 }
2604
2605                 cpos += max_len;
2606
2607                 last_ins = ins;
2608                 last_offset = offset;
2609
2610                 ins = ins->next;
2611         }
2612
2613         cfg->code_len = (guint8*)code - cfg->native_code;
2614 }
2615
2616 void
2617 mono_arch_register_lowlevel_calls (void)
2618 {
2619 }
2620
2621 void
2622 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
2623 {
2624         MonoJumpInfo *patch_info;
2625
2626         /* FIXME: Move part of this to arch independent code */
2627         for (patch_info = ji; patch_info; patch_info = patch_info->next) {
2628                 unsigned char *ip = patch_info->ip.i + code;
2629                 const unsigned char *target = NULL;
2630
2631                 switch (patch_info->type) {
2632                 case MONO_PATCH_INFO_BB:
2633                         target = patch_info->data.bb->native_offset + code;
2634                         break;
2635                 case MONO_PATCH_INFO_ABS:
2636                         target = patch_info->data.target;
2637                         break;
2638                 case MONO_PATCH_INFO_LABEL:
2639                         target = patch_info->data.inst->inst_c0 + code;
2640                         break;
2641                 case MONO_PATCH_INFO_IP:
2642                         *((gpointer *)(ip)) = ip;
2643                         continue;
2644                 case MONO_PATCH_INFO_METHOD_REL:
2645                         NOT_IMPLEMENTED;
2646                         *((gpointer *)(ip)) = code + patch_info->data.offset;
2647                         continue;
2648                 case MONO_PATCH_INFO_INTERNAL_METHOD: {
2649                         MonoJitICallInfo *mi = mono_find_jit_icall_by_name (patch_info->data.name);
2650                         if (!mi) {
2651                                 g_warning ("unknown MONO_PATCH_INFO_INTERNAL_METHOD %s", patch_info->data.name);
2652                                 g_assert_not_reached ();
2653                         }
2654                         target = mono_icall_get_wrapper (mi);
2655                         break;
2656                 }
2657                 case MONO_PATCH_INFO_METHOD_JUMP: {
2658                         GSList *list;
2659
2660                         /* get the trampoline to the method from the domain */
2661                         target = mono_arch_create_jump_trampoline (patch_info->data.method);
2662                         if (!domain->jump_target_hash)
2663                                 domain->jump_target_hash = g_hash_table_new (NULL, NULL);
2664                         list = g_hash_table_lookup (domain->jump_target_hash, patch_info->data.method);
2665                         list = g_slist_prepend (list, ip);
2666                         g_hash_table_insert (domain->jump_target_hash, patch_info->data.method, list);
2667                         break;
2668                 }
2669                 case MONO_PATCH_INFO_METHOD:
2670                         if (patch_info->data.method == method) {
2671                                 target = code;
2672                         } else
2673                                 /* get the trampoline to the method from the domain */
2674                                 target = mono_arch_create_jit_trampoline (patch_info->data.method);
2675                         break;
2676                 case MONO_PATCH_INFO_SWITCH: {
2677                         guint32 *p = (guint32*)ip;
2678                         gpointer *jump_table = mono_code_manager_reserve (domain->code_mp, sizeof (gpointer) * patch_info->table_size);
2679                         int i;
2680
2681                         target = jump_table;
2682
2683                         for (i = 0; i < patch_info->table_size; i++) {
2684                                 jump_table [i] = code + (int)patch_info->data.table [i];
2685                         }
2686                         break;
2687                 }
2688                 case MONO_PATCH_INFO_METHODCONST:
2689                 case MONO_PATCH_INFO_CLASS:
2690                 case MONO_PATCH_INFO_IMAGE:
2691                 case MONO_PATCH_INFO_FIELD:
2692                         NOT_IMPLEMENTED;
2693                         *((gconstpointer *)(ip + 1)) = patch_info->data.target;
2694                         continue;
2695                 case MONO_PATCH_INFO_IID:
2696                         NOT_IMPLEMENTED;
2697                         mono_class_init (patch_info->data.klass);
2698                         *((guint32 *)(ip + 1)) = patch_info->data.klass->interface_id;
2699                         continue;
2700                 case MONO_PATCH_INFO_VTABLE:
2701                         NOT_IMPLEMENTED;
2702                         *((gconstpointer *)(ip + 1)) = mono_class_vtable (domain, patch_info->data.klass);
2703                         continue;
2704                 case MONO_PATCH_INFO_CLASS_INIT: {
2705                         /* Might already been changed to a nop */
2706                         target = mono_create_class_init_trampoline (mono_class_vtable (domain, patch_info->data.klass));
2707                         break;
2708                 }
2709                 case MONO_PATCH_INFO_SFLDA: {
2710                         MonoVTable *vtable = mono_class_vtable (domain, patch_info->data.field->parent);
2711                         if (!vtable->initialized && !(vtable->klass->flags & TYPE_ATTRIBUTE_BEFORE_FIELD_INIT) && mono_class_needs_cctor_run (vtable->klass, method))
2712                                 /* Done by the generated code */
2713                                 ;
2714                         else {
2715                                 if (run_cctors)
2716                                         mono_runtime_class_init (vtable);
2717                         }
2718                         NOT_IMPLEMENTED;
2719                         *((gconstpointer *)(ip + 1)) =
2720                                 (char*)vtable->data + patch_info->data.field->offset;
2721                         continue;
2722                 }
2723                 case MONO_PATCH_INFO_R4: {
2724                         float *f = g_new0 (float, 1);
2725                         *f = *(float*)patch_info->data.target;
2726                         target = f;
2727                         break;
2728                 }
2729                 case MONO_PATCH_INFO_R8: {
2730                         double *d = g_new0 (double, 1);
2731                         *d = *(double*)patch_info->data.target;
2732                         target = d;
2733                         break;
2734                 }
2735                 case MONO_PATCH_INFO_EXC_NAME:
2736                         NOT_IMPLEMENTED;
2737                         *((gconstpointer *)(ip + 1)) = patch_info->data.name;
2738                         continue;
2739                 case MONO_PATCH_INFO_LDSTR:
2740                         NOT_IMPLEMENTED;
2741                         *((gconstpointer *)(ip + 1)) =
2742                                 mono_ldstr (domain, patch_info->data.token->image,
2743                                                         mono_metadata_token_index (patch_info->data.token->token));
2744                         continue;
2745                 case MONO_PATCH_INFO_TYPE_FROM_HANDLE: {
2746                         gpointer handle;
2747                         MonoClass *handle_class;
2748
2749                         handle = mono_ldtoken (patch_info->data.token->image,
2750                                                                    patch_info->data.token->token, &handle_class);
2751                         mono_class_init (handle_class);
2752                         mono_class_init (mono_class_from_mono_type (handle));
2753
2754                         NOT_IMPLEMENTED;
2755                         *((gconstpointer *)(ip + 1)) =
2756                                 mono_type_get_object (domain, handle);
2757                         continue;
2758                 }
2759                 case MONO_PATCH_INFO_LDTOKEN: {
2760                         gpointer handle;
2761                         MonoClass *handle_class;
2762
2763                         handle = mono_ldtoken (patch_info->data.token->image,
2764                                                                    patch_info->data.token->token, &handle_class);
2765                         mono_class_init (handle_class);
2766
2767                         NOT_IMPLEMENTED;
2768                         *((gconstpointer *)(ip + 1)) = handle;
2769                         continue;
2770                 }
2771                 default:
2772                         g_assert_not_reached ();
2773                 }
2774                 sparc_patch (ip, target);
2775         }
2776 }
2777
2778 /*
2779  * Allow tracing to work with this interface (with an optional argument)
2780  */
2781
2782 /*
2783  * This may be needed on some archs or for debugging support.
2784  */
2785 void
2786 mono_arch_instrument_mem_needs (MonoMethod *method, int *stack, int *code)
2787 {
2788         /* no stack room needed now (may be needed for FASTCALL-trace support) */
2789         *stack = 0;
2790         /* split prolog-epilog requirements? */
2791         *code = 256; /* max bytes needed: check this number */
2792 }
2793
2794 void*
2795 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
2796 {
2797         int stack, code_size;
2798         guint32 *code = (guint32*)p;
2799
2800         /* Save registers to stack */
2801         sparc_st_imm (code, sparc_i0, sparc_fp, 68);
2802         sparc_st_imm (code, sparc_i1, sparc_fp, 72);
2803         sparc_st_imm (code, sparc_i2, sparc_fp, 76);
2804         sparc_st_imm (code, sparc_i3, sparc_fp, 80);
2805         sparc_st_imm (code, sparc_i4, sparc_fp, 84);
2806
2807         sparc_set (code, cfg->method, sparc_o0);
2808         sparc_mov_reg_reg (code, sparc_fp, sparc_o1);
2809
2810         mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
2811         sparc_sethi (code, 0, sparc_o7);
2812         sparc_jmpl_imm (code, sparc_o7, 0, sparc_callsite);
2813         sparc_nop (code);
2814
2815         mono_arch_instrument_mem_needs (cfg->method, &stack, &code_size);
2816
2817         g_assert ((code - (guint32*)p) <= (code_size * 4));
2818
2819         return code;
2820 }
2821
2822 enum {
2823         SAVE_NONE,
2824         SAVE_STRUCT,
2825         SAVE_ONE,
2826         SAVE_TWO,
2827         SAVE_FP
2828 };
2829
2830 void*
2831 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
2832 {
2833         guchar *code = p;
2834         int arg_size = 0, save_mode = SAVE_NONE;
2835         MonoMethod *method = cfg->method;
2836         int rtype = method->signature->ret->type;
2837
2838 handle_enum:
2839         switch (rtype) {
2840         case MONO_TYPE_VOID:
2841                 /* special case string .ctor icall */
2842                 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
2843                         save_mode = SAVE_ONE;
2844                 else
2845                         save_mode = SAVE_NONE;
2846                 break;
2847         case MONO_TYPE_I8:
2848         case MONO_TYPE_U8:
2849                 save_mode = SAVE_TWO;
2850                 break;
2851         case MONO_TYPE_R4:
2852         case MONO_TYPE_R8:
2853                 save_mode = SAVE_FP;
2854                 break;
2855         case MONO_TYPE_VALUETYPE:
2856                 if (method->signature->ret->data.klass->enumtype) {
2857                         rtype = method->signature->ret->data.klass->enum_basetype->type;
2858                         goto handle_enum;
2859                 }
2860                 save_mode = SAVE_STRUCT;
2861                 break;
2862         default:
2863                 save_mode = SAVE_ONE;
2864                 break;
2865         }
2866
2867         /* Save the result to the stack and also put it into the output registers */
2868
2869         switch (save_mode) {
2870         case SAVE_TWO:
2871                 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
2872                 sparc_st_imm (code, sparc_i0, sparc_fp, 72);
2873                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
2874                 sparc_mov_reg_reg (code, sparc_i1, sparc_o2);
2875                 break;
2876         case SAVE_ONE:
2877                 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
2878                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
2879                 break;
2880         case SAVE_FP:
2881                 sparc_stdf (code, sparc_f0, sparc_fp, 72);
2882                 sparc_ld_imm (code, sparc_fp, 72, sparc_o1);
2883                 sparc_ld_imm (code, sparc_fp, 72, sparc_o2);
2884                 break;
2885         case SAVE_STRUCT:
2886                 sparc_ld_imm (code, sparc_fp, 64, sparc_o1);
2887                 break;
2888         case SAVE_NONE:
2889         default:
2890                 break;
2891         }
2892
2893         sparc_set (code, cfg->method, sparc_o0);
2894
2895         mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
2896         sparc_sethi (code, 0, sparc_o7);
2897         sparc_jmpl_imm (code, sparc_o7, 0, sparc_callsite);
2898         sparc_nop (code);
2899
2900         /* Restore result */
2901
2902         switch (save_mode) {
2903         case SAVE_TWO:
2904                 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
2905                 sparc_ld_imm (code, sparc_fp, 72, sparc_i0);
2906                 break;
2907         case SAVE_ONE:
2908                 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
2909                 break;
2910         case SAVE_FP:
2911                 sparc_lddf_imm (code, sparc_fp, 72, sparc_f0);
2912                 break;
2913         case SAVE_NONE:
2914         default:
2915                 break;
2916         }
2917
2918         return code;
2919 }
2920
2921 int
2922 mono_arch_max_epilog_size (MonoCompile *cfg)
2923 {
2924         int exc_count = 0, max_epilog_size = 16 + 20*4;
2925         MonoJumpInfo *patch_info;
2926
2927         if (cfg->method->save_lmf)
2928                 max_epilog_size += 128;
2929
2930         if (mono_jit_trace_calls != NULL)
2931                 max_epilog_size += 50;
2932
2933         if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
2934                 max_epilog_size += 50;
2935
2936         /* count the number of exception infos */
2937
2938         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
2939                 if (patch_info->type == MONO_PATCH_INFO_EXC)
2940                         exc_count++;
2941         }
2942
2943         /*
2944          * make sure we have enough space for exceptions
2945          * 16 is the size of two push_imm instructions and a call
2946          */
2947         max_epilog_size += exc_count*16;
2948
2949         return max_epilog_size;
2950 }
2951
2952 guint8 *
2953 mono_arch_emit_prolog (MonoCompile *cfg)
2954 {
2955         MonoMethod *method = cfg->method;
2956         MonoBasicBlock *bb;
2957         MonoMethodSignature *sig;
2958         MonoInst *inst;
2959         int alloc_size, pos, max_offset, i;
2960         guint8 *code;
2961         CallInfo *cinfo;
2962
2963         cfg->code_size = 256;
2964         code = cfg->native_code = g_malloc (cfg->code_size);
2965
2966         /*
2967          * Align stack_offset. It is aligned at the end of allocate_vars, but
2968          * spillvars may make in unaligned.
2969          */
2970         cfg->stack_offset += (MONO_ARCH_FRAME_ALIGNMENT - 1);
2971         cfg->stack_offset &= ~(MONO_ARCH_FRAME_ALIGNMENT - 1);
2972
2973         if (!sparc_is_imm13 (- cfg->stack_offset)) {
2974                 /* Can't use sparc_o7 here, since we're still in the caller's frame */
2975                 sparc_set (code, (- cfg->stack_offset), sparc_g1);
2976                 sparc_save (code, sparc_sp, sparc_g1, sparc_sp);
2977         }
2978         else
2979                 sparc_save_imm (code, sparc_sp, - cfg->stack_offset, sparc_sp);
2980
2981         sig = method->signature;
2982         pos = 0;
2983         if (sig->hasthis)
2984                 pos ++;
2985
2986         cinfo = get_call_info (sig, FALSE);
2987
2988         for (i = 0; i < sig->param_count; ++i) {
2989                 ArgInfo *ainfo = cinfo->args + pos;
2990                 guint32 stack_offset;
2991                 inst = cfg->varinfo [pos];
2992
2993                 stack_offset = ainfo->offset + 68;
2994
2995                 /* Save the split arguments so they will reside entirely on the stack */
2996                 if (ainfo->storage == ArgInSplitRegStack) {
2997                         /* Save the register to the stack */
2998                         g_assert (inst->opcode == OP_REGOFFSET);
2999                         if (!sparc_is_imm13 (stack_offset))
3000                                 NOT_IMPLEMENTED;
3001                         sparc_st_imm (code, sparc_i5, inst->inst_basereg, stack_offset);
3002                 }
3003
3004                 if (sig->params [i]->type == MONO_TYPE_R8) {
3005                         /* Save the argument to a dword aligned stack location */
3006                         /*
3007                          * stack_offset contains the offset of the argument on the stack.
3008                          * inst->inst_offset contains the dword aligned offset where the value
3009                          * should be stored.
3010                          */
3011                         if (ainfo->storage == ArgInIRegPair) {
3012                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3013                                         NOT_IMPLEMENTED;
3014                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3015                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3016                         }
3017                         else
3018                                 if (ainfo->storage == ArgInSplitRegStack) {
3019                                         if (stack_offset != inst->inst_offset) {
3020                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3021                                                 sparc_st_imm (code, sparc_i5, inst->inst_basereg, inst->inst_offset);
3022                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3023                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3024                                         }
3025                                 }
3026                         else
3027                                 if (ainfo->storage == ArgOnStackPair) {
3028                                         if (stack_offset != inst->inst_offset) {
3029                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3030                                                 sparc_ld_imm (code, sparc_fp, stack_offset, sparc_o7);
3031                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset);
3032                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3033                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3034                                         }
3035                                 }
3036                         else
3037                                 g_assert_not_reached ();
3038                 }
3039                 else
3040                         if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
3041                                 /* Argument in register, but need to be saved to stack */
3042                                 if (!sparc_is_imm13 (stack_offset))
3043                                         NOT_IMPLEMENTED;
3044                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3045                         }
3046                 else
3047                         if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
3048                                 /* Argument in regpair, but need to be saved to stack */
3049                                 g_assert (((inst->inst_offset) % 8) == 0);
3050                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3051                                         NOT_IMPLEMENTED;
3052                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3053                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3054                         }
3055
3056                 pos++;
3057         }
3058
3059         g_free (cinfo);
3060
3061         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3062                 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
3063
3064         cfg->code_len = code - cfg->native_code;
3065
3066         g_assert (cfg->code_len <= cfg->code_size);
3067
3068         return code;
3069 }
3070
3071 void
3072 mono_arch_emit_epilog (MonoCompile *cfg)
3073 {
3074         MonoJumpInfo *patch_info;
3075         MonoMethod *method = cfg->method;
3076         int pos, i;
3077         guint8 *code;
3078
3079         code = cfg->native_code + cfg->code_len;
3080
3081         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3082                 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
3083
3084         sparc_ret (code);
3085         sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
3086
3087 #if 0
3088
3089
3090         pos = 0;
3091
3092         if (method->save_lmf) {
3093                 pos = -sizeof (MonoLMF);
3094         }
3095
3096         if (method->save_lmf) {
3097 #if 0
3098                 /* ebx = previous_lmf */
3099                 x86_pop_reg (code, X86_EBX);
3100                 /* edi = lmf */
3101                 x86_pop_reg (code, X86_EDI);
3102                 /* *(lmf) = previous_lmf */
3103                 x86_mov_membase_reg (code, X86_EDI, 0, X86_EBX, 4);
3104
3105                 /* discard method info */
3106                 x86_pop_reg (code, X86_ESI);
3107
3108                 /* restore caller saved regs */
3109                 x86_pop_reg (code, X86_EBP);
3110                 x86_pop_reg (code, X86_ESI);
3111                 x86_pop_reg (code, X86_EDI);
3112                 x86_pop_reg (code, X86_EBX);
3113 #endif
3114         }
3115
3116         if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
3117                 //ppc_lwz (code, sparc_l0, cfg->stack_usage + 8, cfg->frame_reg);
3118                 //ppc_mtlr (code, sparc_l0);
3119         }
3120         //ppc_addic (code, ppc_sp, cfg->frame_reg, cfg->stack_usage);
3121         for (i = 13; i < 32; ++i) {
3122                 if (cfg->used_int_regs & (1 << i)) {
3123                         pos += 4;
3124                         //ppc_lwz (code, i, -pos, cfg->frame_reg);
3125                 }
3126         }
3127         //ppc_blr (code);
3128
3129         /* add code to raise exceptions */
3130         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3131                 switch (patch_info->type) {
3132                 case MONO_PATCH_INFO_EXC:
3133                         /*x86_patch (patch_info->ip.i + cfg->native_code, code);
3134                         x86_push_imm (code, patch_info->data.target);
3135                         x86_push_imm (code, patch_info->ip.i + cfg->native_code);
3136                         patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
3137                         patch_info->data.name = "throw_exception_by_name";
3138                         patch_info->ip.i = code - cfg->native_code;
3139                         x86_jump_code (code, 0);*/
3140                         break;
3141                 default:
3142                         /* do nothing */
3143                         break;
3144                 }
3145         }
3146 #endif
3147
3148         cfg->code_len = code - cfg->native_code;
3149
3150         g_assert (cfg->code_len < cfg->code_size);
3151
3152 }
3153
3154 void
3155 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
3156 {
3157 }
3158
3159 void
3160 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
3161 {
3162 }
3163
3164 void
3165 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, int this_reg, int this_type, int vt_reg)
3166 {
3167         /* add the this argument */
3168         if (this_reg != -1) {
3169                 MonoInst *this;
3170                 MONO_INST_NEW (cfg, this, OP_SETREG);
3171                 this->type = this_type;
3172                 this->sreg1 = this_reg;
3173                 this->dreg = sparc_o0;
3174                 mono_bblock_add_inst (cfg->cbb, this);
3175         }
3176
3177         if (vt_reg != -1) {
3178                 /* Set the 'struct/union return pointer' location on the stack */
3179                 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, 64, vt_reg);
3180         }
3181 }
3182
3183
3184 gint
3185 mono_arch_get_opcode_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
3186 {
3187         return -1;
3188 }
3189
3190 /*
3191  * mono_arch_get_argument_info:
3192  * @csig:  a method signature
3193  * @param_count: the number of parameters to consider
3194  * @arg_info: an array to store the result infos
3195  *
3196  * Gathers information on parameters such as size, alignment and
3197  * padding. arg_info should be large enought to hold param_count + 1 entries.
3198  *
3199  * Returns the size of the activation frame.
3200  */
3201 int
3202 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
3203 {
3204         int k, frame_size = 0;
3205         int size, align, pad;
3206         int offset = 8;
3207         CallInfo *cinfo;
3208         ArgInfo *ainfo;
3209
3210         cinfo = get_call_info (csig, FALSE);
3211
3212         if (csig->hasthis) {
3213                 ainfo = &cinfo->args [0];
3214                 arg_info [0].offset = 68 + ainfo->offset;
3215         }
3216
3217         for (k = 0; k < param_count; k++) {
3218                 ainfo = &cinfo->args [k + csig->hasthis];
3219
3220                 arg_info [k + 1].offset = 68 + ainfo->offset;
3221                 arg_info [k + 1].size = mono_type_size (csig->params [k], &align);
3222         }
3223
3224         g_free (cinfo);
3225
3226         /* FIXME: */
3227         return 0;
3228 }