mono/mini/mini-sparc.c

   1 /*
   2  * mini-sparc.c: Sparc backend for the Mono code generator
   3  *
   4  * Authors:
   5  *   Paolo Molaro (lupus@ximian.com)
   6  *   Dietmar Maurer (dietmar@ximian.com)
   7  *
   8  * Modified for SPARC:
   9  *   Christopher Taylor (ct@gentoo.org)
  10  *   Mark Crichton (crichton@gimp.org)
  11  *   Zoltan Varga (vargaz@freemail.hu)
  12  *
  13  * (C) 2003 Ximian, Inc.
  14  */
  15 #include "mini.h"
  16 #include <string.h>
  17 #include <pthread.h>
  18 #include <unistd.h>
  19
  20 #ifndef __linux__
  21 #include <sys/systeminfo.h>
  22 #include <thread.h>
  23 #endif
  24
  25 #include <unistd.h>
  26 #include <sys/mman.h>
  27
  28 #include <mono/metadata/appdomain.h>
  29 #include <mono/metadata/debug-helpers.h>
  30 #include <mono/metadata/tokentype.h>
  31 #include <mono/utils/mono-math.h>
  32
  33 #include "mini-sparc.h"
  34 #include "inssel.h"
  35 #include "trace.h"
  36 #include "cpu-sparc.h"
  37
  38 /*
  39  * Sparc V9 means two things:
  40  * - the instruction set
  41  * - the ABI
  42  *
  43  * V9 instructions are only usable if the underlying processor is 64 bit. Most Sparc
  44  * processors in use are 64 bit processors. The V9 ABI is only usable if the
  45  * mono executable is a 64 bit executable. So it would make sense to use the 64 bit
  46  * instructions without using the 64 bit ABI.
  47  */
  48
  49 /*
  50  * Register usage:
  51  * - %i0..%i<n> hold the incoming arguments, these are never written by JITted
  52  * code. Unused input registers are used for global register allocation.
  53  * - %o0..%o5 and %l7 is used for local register allocation and passing arguments
  54  * - %l0..%l6 is used for global register allocation
  55  * - %o7 and %g1 is used as scratch registers in opcodes
  56  * - all floating point registers are used for local register allocation except %f0.
  57  *   Only double precision registers are used.
  58  * In 64 bit mode:
  59  * - fp registers %d0..%d30 are used for parameter passing, and %d32..%d62 are
  60  *   used for local allocation.
  61  */
  62
  63 /*
  64  * Alignment:
  65  * - doubles and longs must be stored in dword aligned locations
  66  */
  67
  68 /*
  69  * The following things are not implemented or do not work:
  70  *  - some fp arithmetic corner cases
  71  * The following tests in mono/mini are expected to fail:
  72  *  - test_0_simple_double_casts
  73  *      This test casts (guint64)-1 to double and then back to guint64 again.
  74  *    Under x86, it returns 0, while under sparc it returns -1.
  75  *
  76  * In addition to this, the runtime requires the trunc function, or its
  77  * solaris counterpart, aintl, to do some double->int conversions. If this
  78  * function is not available, it is emulated somewhat, but the results can be
  79  * strange.
  80  */
  81
  82 /*
  83  * SPARCV9 FIXME:
  84  * - optimize sparc_set according to the memory model
  85  * - when non-AOT compiling, compute patch targets immediately so we don't
  86  *   have to emit the 6 byte template.
  87  * - varags
  88  * - struct arguments/returns
  89  */
  90
  91 /*
  92  * SPARCV9 ISSUES:
  93  * - sparc_call_simple can't be used in a lot of places since the displacement
  94  *   might not fit into an imm30.
  95  * - g1 can't be used in a lot of places since it is used as a scratch reg in
  96  *   sparc_set.
  97  * - sparc_f0 can't be used as a scratch register on V9
  98  * - the %d34..%d62 fp registers are encoded as: %dx = %f(x - 32 + 1), ie.
  99  *   %d36 = %f5.
 100  * - ldind.i4/u4 needs to sign extend/clear out upper word -> slows things down
 101  * - ins->dreg can't be used as a scatch register in r4 opcodes since it might
 102  *   be a double precision register which has no single precision part.
 103  * - passing/returning structs is hard to implement, because:
 104  *   - the spec is very hard to understand
 105  *   - it requires knowledge about the fields of structure, needs to handle
 106  *     nested structures etc.
 107  */
 108
 109 /*
 110  * Possible optimizations:
 111  * - delay slot scheduling
 112  * - allocate large constants to registers
 113  * - add more mul/div/rem optimizations
 114  */
 115
 116 #ifndef __linux__
 117 #define MONO_SPARC_THR_TLS 1
 118 #endif
 119
 120 /*
 121  * There was a 64 bit bug in glib-2.2: g_bit_nth_msf (0, -1) would return 32,
 122  * causing infinite loops in dominator computation. So glib-2.4 is required.
 123  */
 124 #ifdef SPARCV9
 125 #if GLIB_MAJOR_VERSION == 2 && GLIB_MINOR_VERSION < 4
 126 #error "glib 2.4 or later is required for 64 bit mode."
 127 #endif
 128 #endif
 129
 130 #define NOT_IMPLEMENTED do { g_assert_not_reached (); } while (0)
 131
 132 #define ALIGN_TO(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
 133
 134 #define SIGNAL_STACK_SIZE (64 * 1024)
 135
 136 #define STACK_BIAS MONO_SPARC_STACK_BIAS
 137
 138 #ifdef SPARCV9
 139
 140 /* %g1 is used by sparc_set */
 141 #define GP_SCRATCH_REG sparc_g4
 142 /* %f0 is used for parameter passing */
 143 #define FP_SCRATCH_REG sparc_f30
 144 #define ARGS_OFFSET (STACK_BIAS + 128)
 145
 146 #else
 147
 148 #define FP_SCRATCH_REG sparc_f0
 149 #define ARGS_OFFSET 68
 150 #define GP_SCRATCH_REG sparc_g1
 151
 152 #endif
 153
 154 /* Whenever the CPU supports v9 instructions */
 155 static gboolean sparcv9 = FALSE;
 156
 157 /* Whenever this is a 64bit executable */
 158 #if SPARCV9
 159 static gboolean v64 = TRUE;
 160 #else
 161 static gboolean v64 = FALSE;
 162 #endif
 163
 164 static gpointer mono_arch_get_lmf_addr (void);
 165
 166 static int
 167 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar);
 168
 169 const char*
 170 mono_arch_regname (int reg) {
 171         static const char * rnames[] = {
 172                 "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
 173                 "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
 174                 "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
 175                 "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
 176                 "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
 177                 "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
 178                 "sparc_fp", "sparc_retadr"
 179         };
 180         if (reg >= 0 && reg < 32)
 181                 return rnames [reg];
 182         return "unknown";
 183 }
 184
 185 const char*
 186 mono_arch_fregname (int reg) {
 187         static const char *rnames [] = {
 188                 "sparc_f0", "sparc_f1", "sparc_f2", "sparc_f3", "sparc_f4",
 189                 "sparc_f5", "sparc_f6", "sparc_f7", "sparc_f8", "sparc_f9",
 190                 "sparc_f10", "sparc_f11", "sparc_f12", "sparc_f13", "sparc_f14",
 191                 "sparc_f15", "sparc_f16", "sparc_f17", "sparc_f18", "sparc_f19",
 192                 "sparc_f20", "sparc_f21", "sparc_f22", "sparc_f23", "sparc_f24",
 193                 "sparc_f25", "sparc_f26", "sparc_f27", "sparc_f28", "sparc_f29",
 194                 "sparc_f30", "sparc_f31"
 195         };
 196
 197         if (reg >= 0 && reg < 32)
 198                 return rnames [reg];
 199         else
 200                 return "unknown";
 201 }
 202
 203 /*
 204  * Initialize the cpu to execute managed code.
 205  */
 206 void
 207 mono_arch_cpu_init (void)
 208 {
 209         guint32 dummy;
 210         /* make sure sparcv9 is initialized for embedded use */
 211         mono_arch_cpu_optimizazions(&dummy);
 212 }
 213
 214 /*
 215  * This function returns the optimizations supported on this cpu.
 216  */
 217 guint32
 218 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
 219 {
 220         char buf [1024];
 221         guint32 opts = 0;
 222
 223         *exclude_mask = 0;
 224
 225 #ifndef __linux__
 226         if (!sysinfo (SI_ISALIST, buf, 1024))
 227                 g_assert_not_reached ();
 228 #else
 229         /* From glibc.  If the getpagesize is 8192, we're on sparc64, which
 230          * (in)directly implies that we're a v9 or better.
 231          * Improvements to this are greatly accepted...
 232          * Also, we don't differentiate between v7 and v8.  I sense SIGILL
 233          * sniffing in my future.
 234          */
 235         if (getpagesize() == 8192)
 236                 strcpy (buf, "sparcv9");
 237         else
 238                 strcpy (buf, "sparcv8");
 239 #endif
 240
 241         /*
 242          * On some processors, the cmov instructions are even slower than the
 243          * normal ones...
 244          */
 245         if (strstr (buf, "sparcv9")) {
 246                 opts |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
 247                 sparcv9 = TRUE;
 248         }
 249         else
 250                 *exclude_mask |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
 251
 252         return opts;
 253 }
 254
 255 static void
 256 mono_arch_break (void)
 257 {
 258 }
 259
 260 #ifdef __GNUC__
 261 #define flushi(addr)    __asm__ __volatile__ ("iflush %0"::"r"(addr):"memory")
 262 #else /* assume Sun's compiler */
 263 static void flushi(void *addr)
 264 {
 265     asm("flush %i0");
 266 }
 267 #endif
 268
 269 #ifndef __linux__
 270 void sync_instruction_memory(caddr_t addr, int len);
 271 #endif
 272
 273 void
 274 mono_arch_flush_icache (guint8 *code, gint size)
 275 {
 276 #ifndef __linux__
 277         /* Hopefully this is optimized based on the actual CPU */
 278         sync_instruction_memory (code, size);
 279 #else
 280         guint64 *p = (guint64*)code;
 281         guint64 *end = (guint64*)(code + ((size + 8) /8));
 282
 283         /*
 284          * FIXME: Flushing code in dword chunks in _slow_.
 285          */
 286         while (p < end)
 287 #ifdef __GNUC__
 288                 __asm__ __volatile__ ("iflush %0"::"r"(p++));
 289 #else
 290                         flushi (p ++);
 291 #endif
 292 #endif
 293 }
 294
 295 /*
 296  * mono_sparc_flushw:
 297  *
 298  * Flush all register windows to memory. Every register window is saved to
 299  * a 16 word area on the stack pointed to by its %sp register.
 300  */
 301 void
 302 mono_sparc_flushw (void)
 303 {
 304         static guint32 start [64];
 305         static int inited = 0;
 306         guint32 *code;
 307         static void (*flushw) (void);
 308
 309         if (!inited) {
 310                 code = start;
 311
 312                 sparc_save_imm (code, sparc_sp, -160, sparc_sp);
 313                 sparc_flushw (code);
 314                 sparc_ret (code);
 315                 sparc_restore_simple (code);
 316
 317                 g_assert ((code - start) < 64);
 318
 319                 mono_arch_flush_icache ((guint8*)start, (guint8*)code - (guint8*)start);
 320
 321                 flushw = (gpointer)start;
 322
 323                 inited = 1;
 324         }
 325
 326         flushw ();
 327 }
 328
 329 void
 330 mono_arch_flush_register_windows (void)
 331 {
 332         mono_sparc_flushw ();
 333 }
 334
 335 gboolean
 336 mono_arch_is_inst_imm (gint64 imm)
 337 {
 338         return sparc_is_imm13 (imm);
 339 }
 340
 341 gboolean
 342 mono_sparc_is_v9 (void) {
 343         return sparcv9;
 344 }
 345
 346 gboolean
 347 mono_sparc_is_sparc64 (void) {
 348         return v64;
 349 }
 350
 351 typedef enum {
 352         ArgInIReg,
 353         ArgInIRegPair,
 354         ArgInSplitRegStack,
 355         ArgInFReg,
 356         ArgInFRegPair,
 357         ArgOnStack,
 358         ArgOnStackPair,
 359         ArgInFloatReg,  /* V9 only */
 360         ArgInDoubleReg  /* V9 only */
 361 } ArgStorage;
 362
 363 typedef struct {
 364         gint16 offset;
 365         /* This needs to be offset by %i0 or %o0 depending on caller/callee */
 366         gint8  reg;
 367         ArgStorage storage;
 368         guint32 vt_offset; /* for valuetypes */
 369 } ArgInfo;
 370
 371 typedef struct {
 372         int nargs;
 373         guint32 stack_usage;
 374         guint32 reg_usage;
 375         ArgInfo ret;
 376         ArgInfo sig_cookie;
 377         ArgInfo args [1];
 378 } CallInfo;
 379
 380 #define DEBUG(a)
 381
 382 /* %o0..%o5 */
 383 #define PARAM_REGS 6
 384
 385 static void inline
 386 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean pair)
 387 {
 388         ainfo->offset = *stack_size;
 389
 390         if (!pair) {
 391                 if (*gr >= PARAM_REGS) {
 392                         ainfo->storage = ArgOnStack;
 393                 }
 394                 else {
 395                         ainfo->storage = ArgInIReg;
 396                         ainfo->reg = *gr;
 397                         (*gr) ++;
 398                 }
 399
 400                 /* Allways reserve stack space for parameters passed in registers */
 401                 (*stack_size) += sizeof (gpointer);
 402         }
 403         else {
 404                 if (*gr < PARAM_REGS - 1) {
 405                         /* A pair of registers */
 406                         ainfo->storage = ArgInIRegPair;
 407                         ainfo->reg = *gr;
 408                         (*gr) += 2;
 409                 }
 410                 else if (*gr >= PARAM_REGS) {
 411                         /* A pair of stack locations */
 412                         ainfo->storage = ArgOnStackPair;
 413                 }
 414                 else {
 415                         ainfo->storage = ArgInSplitRegStack;
 416                         ainfo->reg = *gr;
 417                         (*gr) ++;
 418                 }
 419
 420                 (*stack_size) += 2 * sizeof (gpointer);
 421         }
 422 }
 423
 424 #ifdef SPARCV9
 425
 426 #define FLOAT_PARAM_REGS 32
 427
 428 static void inline
 429 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean single)
 430 {
 431         ainfo->offset = *stack_size;
 432
 433         if (single) {
 434                 if (*gr >= FLOAT_PARAM_REGS) {
 435                         ainfo->storage = ArgOnStack;
 436                 }
 437                 else {
 438                         /* A single is passed in an even numbered fp register */
 439                         ainfo->storage = ArgInFloatReg;
 440                         ainfo->reg = *gr + 1;
 441                         (*gr) += 2;
 442                 }
 443         }
 444         else {
 445                 if (*gr < FLOAT_PARAM_REGS) {
 446                         /* A double register */
 447                         ainfo->storage = ArgInDoubleReg;
 448                         ainfo->reg = *gr;
 449                         (*gr) += 2;
 450                 }
 451                 else {
 452                         ainfo->storage = ArgOnStack;
 453                 }
 454         }
 455
 456         (*stack_size) += sizeof (gpointer);
 457 }
 458
 459 #endif
 460
 461 /*
 462  * get_call_info:
 463  *
 464  *  Obtain information about a call according to the calling convention.
 465  * For V8, see the "System V ABI, Sparc Processor Supplement" Sparc V8 version
 466  * document for more information.
 467  * For V9, see the "Low Level System Information (64-bit psABI)" chapter in
 468  * the 'Sparc Compliance Definition 2.4' document.
 469  */
 470 static CallInfo*
 471 get_call_info (MonoMethodSignature *sig, gboolean is_pinvoke)
 472 {
 473         guint32 i, gr, fr;
 474         int n = sig->hasthis + sig->param_count;
 475         guint32 stack_size = 0;
 476         CallInfo *cinfo;
 477
 478         cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
 479
 480         gr = 0;
 481         fr = 0;
 482
 483 #ifdef SPARCV9
 484         if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
 485                 /* The address of the return value is passed in %o0 */
 486                 add_general (&gr, &stack_size, &cinfo->ret, FALSE);
 487                 cinfo->ret.reg += sparc_i0;
 488         }
 489 #endif
 490
 491         /* this */
 492         if (sig->hasthis)
 493                 add_general (&gr, &stack_size, cinfo->args + 0, FALSE);
 494
 495         if ((sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
 496                 gr = PARAM_REGS;
 497
 498                 /* Emit the signature cookie just before the implicit arguments */
 499                 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 500         }
 501
 502         for (i = 0; i < sig->param_count; ++i) {
 503                 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
 504
 505                 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
 506                         gr = PARAM_REGS;
 507
 508                         /* Emit the signature cookie just before the implicit arguments */
 509                         add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 510                 }
 511
 512                 DEBUG(printf("param %d: ", i));
 513                 if (sig->params [i]->byref) {
 514                         DEBUG(printf("byref\n"));
 515
 516                         add_general (&gr, &stack_size, ainfo, FALSE);
 517                         continue;
 518                 }
 519                 switch (mono_type_get_underlying_type (sig->params [i])->type) {
 520                 case MONO_TYPE_BOOLEAN:
 521                 case MONO_TYPE_I1:
 522                 case MONO_TYPE_U1:
 523                         add_general (&gr, &stack_size, ainfo, FALSE);
 524                         /* the value is in the ls byte */
 525                         ainfo->offset += sizeof (gpointer) - 1;
 526                         break;
 527                 case MONO_TYPE_I2:
 528                 case MONO_TYPE_U2:
 529                 case MONO_TYPE_CHAR:
 530                         add_general (&gr, &stack_size, ainfo, FALSE);
 531                         /* the value is in the ls word */
 532                         ainfo->offset += sizeof (gpointer) - 2;
 533                         break;
 534                 case MONO_TYPE_I4:
 535                 case MONO_TYPE_U4:
 536                         add_general (&gr, &stack_size, ainfo, FALSE);
 537                         /* the value is in the ls dword */
 538                         ainfo->offset += sizeof (gpointer) - 4;
 539                         break;
 540                 case MONO_TYPE_I:
 541                 case MONO_TYPE_U:
 542                 case MONO_TYPE_PTR:
 543                 case MONO_TYPE_FNPTR:
 544                 case MONO_TYPE_CLASS:
 545                 case MONO_TYPE_OBJECT:
 546                 case MONO_TYPE_STRING:
 547                 case MONO_TYPE_SZARRAY:
 548                 case MONO_TYPE_ARRAY:
 549                         add_general (&gr, &stack_size, ainfo, FALSE);
 550                         break;
 551                 case MONO_TYPE_GENERICINST:
 552                         if (!mono_type_generic_inst_is_valuetype (sig->params [i])) {
 553                                 add_general (&gr, &stack_size, ainfo, FALSE);
 554                                 break;
 555                         }
 556                         /* Fall through */
 557                 case MONO_TYPE_VALUETYPE:
 558 #ifdef SPARCV9
 559                         if (sig->pinvoke)
 560                                 NOT_IMPLEMENTED;
 561 #endif
 562                         add_general (&gr, &stack_size, ainfo, FALSE);
 563                         break;
 564                 case MONO_TYPE_TYPEDBYREF:
 565                         add_general (&gr, &stack_size, ainfo, FALSE);
 566                         break;
 567                 case MONO_TYPE_U8:
 568                 case MONO_TYPE_I8:
 569 #ifdef SPARCV9
 570                         add_general (&gr, &stack_size, ainfo, FALSE);
 571 #else
 572                         add_general (&gr, &stack_size, ainfo, TRUE);
 573 #endif
 574                         break;
 575                 case MONO_TYPE_R4:
 576 #ifdef SPARCV9
 577                         add_float (&fr, &stack_size, ainfo, TRUE);
 578                         gr ++;
 579 #else
 580                         /* single precision values are passed in integer registers */
 581                         add_general (&gr, &stack_size, ainfo, FALSE);
 582 #endif
 583                         break;
 584                 case MONO_TYPE_R8:
 585 #ifdef SPARCV9
 586                         add_float (&fr, &stack_size, ainfo, FALSE);
 587                         gr ++;
 588 #else
 589                         /* double precision values are passed in a pair of registers */
 590                         add_general (&gr, &stack_size, ainfo, TRUE);
 591 #endif
 592                         break;
 593                 default:
 594                         g_assert_not_reached ();
 595                 }
 596         }
 597
 598         if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
 599                 gr = PARAM_REGS;
 600
 601                 /* Emit the signature cookie just before the implicit arguments */
 602                 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 603         }
 604
 605         /* return value */
 606         {
 607                 switch (mono_type_get_underlying_type (sig->ret)->type) {
 608                 case MONO_TYPE_BOOLEAN:
 609                 case MONO_TYPE_I1:
 610                 case MONO_TYPE_U1:
 611                 case MONO_TYPE_I2:
 612                 case MONO_TYPE_U2:
 613                 case MONO_TYPE_CHAR:
 614                 case MONO_TYPE_I4:
 615                 case MONO_TYPE_U4:
 616                 case MONO_TYPE_I:
 617                 case MONO_TYPE_U:
 618                 case MONO_TYPE_PTR:
 619                 case MONO_TYPE_FNPTR:
 620                 case MONO_TYPE_CLASS:
 621                 case MONO_TYPE_OBJECT:
 622                 case MONO_TYPE_SZARRAY:
 623                 case MONO_TYPE_ARRAY:
 624                 case MONO_TYPE_STRING:
 625                         cinfo->ret.storage = ArgInIReg;
 626                         cinfo->ret.reg = sparc_i0;
 627                         if (gr < 1)
 628                                 gr = 1;
 629                         break;
 630                 case MONO_TYPE_U8:
 631                 case MONO_TYPE_I8:
 632 #ifdef SPARCV9
 633                         cinfo->ret.storage = ArgInIReg;
 634                         cinfo->ret.reg = sparc_i0;
 635                         if (gr < 1)
 636                                 gr = 1;
 637 #else
 638                         cinfo->ret.storage = ArgInIRegPair;
 639                         cinfo->ret.reg = sparc_i0;
 640                         if (gr < 2)
 641                                 gr = 2;
 642 #endif
 643                         break;
 644                 case MONO_TYPE_R4:
 645                 case MONO_TYPE_R8:
 646                         cinfo->ret.storage = ArgInFReg;
 647                         cinfo->ret.reg = sparc_f0;
 648                         break;
 649                 case MONO_TYPE_GENERICINST:
 650                         if (!mono_type_generic_inst_is_valuetype (sig->ret)) {
 651                                 cinfo->ret.storage = ArgInIReg;
 652                                 cinfo->ret.reg = sparc_i0;
 653                                 if (gr < 1)
 654                                         gr = 1;
 655                                 break;
 656                         }
 657                         /* Fall through */
 658                 case MONO_TYPE_VALUETYPE:
 659                         if (v64) {
 660                                 if (sig->pinvoke)
 661                                         NOT_IMPLEMENTED;
 662                                 else
 663                                         /* Already done */
 664                                         ;
 665                         }
 666                         else
 667                                 cinfo->ret.storage = ArgOnStack;
 668                         break;
 669                 case MONO_TYPE_TYPEDBYREF:
 670                         if (v64) {
 671                                 if (sig->pinvoke)
 672                                         /* Same as a valuetype with size 24 */
 673                                         NOT_IMPLEMENTED;
 674                                 else
 675                                         /* Already done */
 676                                         ;
 677                         }
 678                         else
 679                                 cinfo->ret.storage = ArgOnStack;
 680                         break;
 681                 case MONO_TYPE_VOID:
 682                         break;
 683                 default:
 684                         g_error ("Can't handle as return value 0x%x", sig->ret->type);
 685                 }
 686         }
 687
 688         cinfo->stack_usage = stack_size;
 689         cinfo->reg_usage = gr;
 690         return cinfo;
 691 }
 692
 693 GList *
 694 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
 695 {
 696         GList *vars = NULL;
 697         int i;
 698
 699         /*
 700          * FIXME: If an argument is allocated to a register, then load it from the
 701          * stack in the prolog.
 702          */
 703
 704         for (i = 0; i < cfg->num_varinfo; i++) {
 705                 MonoInst *ins = cfg->varinfo [i];
 706                 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
 707
 708                 /* unused vars */
 709                 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
 710                         continue;
 711
 712                 /* FIXME: Make arguments on stack allocateable to registers */
 713                 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode == OP_REGVAR) || (ins->opcode == OP_ARG))
 714                         continue;
 715
 716                 if (mono_is_regsize_var (ins->inst_vtype)) {
 717                         g_assert (MONO_VARINFO (cfg, i)->reg == -1);
 718                         g_assert (i == vmv->idx);
 719
 720                         vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
 721                 }
 722         }
 723
 724         return vars;
 725 }
 726
 727 GList *
 728 mono_arch_get_global_int_regs (MonoCompile *cfg)
 729 {
 730         GList *regs = NULL;
 731         int i;
 732         MonoMethodSignature *sig;
 733         CallInfo *cinfo;
 734
 735         sig = mono_method_signature (cfg->method);
 736
 737         cinfo = get_call_info (sig, FALSE);
 738
 739         /* Use unused input registers */
 740         for (i = cinfo->reg_usage; i < 6; ++i)
 741                 regs = g_list_prepend (regs, GUINT_TO_POINTER (sparc_i0 + i));
 742
 743         /* Use %l0..%l6 as global registers */
 744         for (i = sparc_l0; i < sparc_l7; ++i)
 745                 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
 746
 747         g_free (cinfo);
 748
 749         return regs;
 750 }
 751
 752 /*
 753  * mono_arch_regalloc_cost:
 754  *
 755  *  Return the cost, in number of memory references, of the action of
 756  * allocating the variable VMV into a register during global register
 757  * allocation.
 758  */
 759 guint32
 760 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
 761 {
 762         return 0;
 763 }
 764
 765 /*
 766  * Set var information according to the calling convention. sparc version.
 767  * The locals var stuff should most likely be split in another method.
 768  */
 769 void
 770 mono_arch_allocate_vars (MonoCompile *m)
 771 {
 772         MonoMethodSignature *sig;
 773         MonoMethodHeader *header;
 774         MonoInst *inst;
 775         int i, offset, size, align, curinst;
 776         CallInfo *cinfo;
 777
 778         header = mono_method_get_header (m->method);
 779
 780         sig = mono_method_signature (m->method);
 781
 782         cinfo = get_call_info (sig, FALSE);
 783
 784         if (sig->ret->type != MONO_TYPE_VOID) {
 785                 switch (cinfo->ret.storage) {
 786                 case ArgInIReg:
 787                 case ArgInFReg:
 788                 case ArgInIRegPair:
 789                         m->ret->opcode = OP_REGVAR;
 790                         m->ret->inst_c0 = cinfo->ret.reg;
 791                         break;
 792                 case ArgOnStack:
 793 #ifdef SPARCV9
 794                         g_assert_not_reached ();
 795 #else
 796                         /* valuetypes */
 797                         m->ret->opcode = OP_REGOFFSET;
 798                         m->ret->inst_basereg = sparc_fp;
 799                         m->ret->inst_offset = 64;
 800 #endif
 801                         break;
 802                 default:
 803                         NOT_IMPLEMENTED;
 804                 }
 805                 m->ret->dreg = m->ret->inst_c0;
 806         }
 807
 808         /*
 809          * We use the ABI calling conventions for managed code as well.
 810          * Exception: valuetypes are never returned in registers on V9.
 811          * FIXME: Use something more optimized.
 812          */
 813
 814         /* Locals are allocated backwards from %fp */
 815         m->frame_reg = sparc_fp;
 816         offset = 0;
 817
 818         /*
 819          * Reserve a stack slot for holding information used during exception
 820          * handling.
 821          */
 822         if (header->num_clauses)
 823                 offset += sizeof (gpointer) * 2;
 824
 825         if (m->method->save_lmf) {
 826                 offset += sizeof (MonoLMF);
 827                 m->arch.lmf_offset = offset;
 828         }
 829
 830         curinst = m->locals_start;
 831         for (i = curinst; i < m->num_varinfo; ++i) {
 832                 inst = m->varinfo [i];
 833
 834                 if (inst->opcode == OP_REGVAR) {
 835                         //g_print ("allocating local %d to %s\n", i, mono_arch_regname (inst->dreg));
 836                         continue;
 837                 }
 838
 839                 if (inst->flags & MONO_INST_IS_DEAD)
 840                         continue;
 841
 842                 /* inst->backend.is_pinvoke indicates native sized value types, this is used by the
 843                 * pinvoke wrappers when they call functions returning structure */
 844                 if (inst->backend.is_pinvoke && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
 845                         size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
 846                 else
 847                         size = mono_type_stack_size (inst->inst_vtype, &align);
 848
 849                 /*
 850                  * This is needed since structures containing doubles must be doubleword
 851          * aligned.
 852                  * FIXME: Do this only if needed.
 853                  */
 854                 if (MONO_TYPE_ISSTRUCT (inst->inst_vtype))
 855                         align = 8;
 856
 857                 /*
 858                  * variables are accessed as negative offsets from %fp, so increase
 859                  * the offset before assigning it to a variable
 860                  */
 861                 offset += size;
 862
 863                 offset += align - 1;
 864                 offset &= ~(align - 1);
 865                 inst->opcode = OP_REGOFFSET;
 866                 inst->inst_basereg = sparc_fp;
 867                 inst->inst_offset = STACK_BIAS + -offset;
 868
 869                 //g_print ("allocating local %d to [%s - %d]\n", i, mono_arch_regname (inst->inst_basereg), - inst->inst_offset);
 870         }
 871
 872         if (sig->call_convention == MONO_CALL_VARARG) {
 873                 m->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
 874         }
 875
 876         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
 877                 inst = m->varinfo [i];
 878                 if (inst->opcode != OP_REGVAR) {
 879                         ArgInfo *ainfo = &cinfo->args [i];
 880                         gboolean inreg = TRUE;
 881                         MonoType *arg_type;
 882                         ArgStorage storage;
 883
 884                         if (sig->hasthis && (i == 0))
 885                                 arg_type = &mono_defaults.object_class->byval_arg;
 886                         else
 887                                 arg_type = sig->params [i - sig->hasthis];
 888
 889 #ifndef SPARCV9
 890                         if (!arg_type->byref && ((arg_type->type == MONO_TYPE_R4)
 891                                                                          || (arg_type->type == MONO_TYPE_R8)))
 892                                 /*
 893                                  * Since float arguments are passed in integer registers, we need to
 894                                  * save them to the stack in the prolog.
 895                                  */
 896                                 inreg = FALSE;
 897 #endif
 898
 899                         /* FIXME: Allocate volatile arguments to registers */
 900                         if (inst->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT))
 901                                 inreg = FALSE;
 902
 903                         if (MONO_TYPE_ISSTRUCT (arg_type))
 904                                 /* FIXME: this isn't needed */
 905                                 inreg = FALSE;
 906
 907                         inst->opcode = OP_REGOFFSET;
 908
 909                         if (!inreg)
 910                                 storage = ArgOnStack;
 911                         else
 912                                 storage = ainfo->storage;
 913
 914                         switch (storage) {
 915                         case ArgInIReg:
 916                         case ArgInIRegPair:
 917                                 inst->opcode = OP_REGVAR;
 918                                 inst->dreg = sparc_i0 + ainfo->reg;
 919                                 break;
 920                         case ArgInFloatReg:
 921                         case ArgInDoubleReg:
 922                                 /*
 923                                  * Since float regs are volatile, we save the arguments to
 924                                  * the stack in the prolog.
 925                                  * FIXME: Avoid this if the method contains no calls.
 926                                  */
 927                         case ArgOnStack:
 928                         case ArgOnStackPair:
 929                         case ArgInSplitRegStack:
 930                                 /* Split arguments are saved to the stack in the prolog */
 931                                 inst->opcode = OP_REGOFFSET;
 932                                 /* in parent frame */
 933                                 inst->inst_basereg = sparc_fp;
 934                                 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
 935
 936                                 if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
 937                                         /*
 938                                          * It is very hard to load doubles from non-doubleword aligned
 939                                          * memory locations. So if the offset is misaligned, we copy the
 940                                          * argument to a stack location in the prolog.
 941                                          */
 942                                         if ((inst->inst_offset - STACK_BIAS) % 8) {
 943                                                 inst->inst_basereg = sparc_fp;
 944                                                 offset += 8;
 945                                                 align = 8;
 946                                                 offset += align - 1;
 947                                                 offset &= ~(align - 1);
 948                                                 inst->inst_offset = STACK_BIAS + -offset;
 949
 950                                         }
 951                                 }
 952                                 break;
 953                         default:
 954                                 NOT_IMPLEMENTED;
 955                         }
 956
 957                         if (MONO_TYPE_ISSTRUCT (arg_type)) {
 958                                 /* Add a level of indirection */
 959                                 /*
 960                                  * It would be easier to add OP_LDIND_I here, but ldind_i instructions
 961                                  * are destructively modified in a lot of places in inssel.brg.
 962                                  */
 963                                 MonoInst *indir;
 964                                 MONO_INST_NEW (m, indir, 0);
 965                                 *indir = *inst;
 966                                 inst->opcode = OP_SPARC_INARG_VT;
 967                                 inst->inst_left = indir;
 968                         }
 969                 }
 970         }
 971
 972         /*
 973          * spillvars are stored between the normal locals and the storage reserved
 974          * by the ABI.
 975          */
 976
 977         m->stack_offset = offset;
 978
 979         /* Add a properly aligned dword for use by int<->float conversion opcodes */
 980         m->spill_count ++;
 981         mono_spillvar_offset_float (m, 0);
 982
 983         g_free (cinfo);
 984 }
 985
 986 static MonoInst *
 987 make_group (MonoCompile *cfg, MonoInst *left, int basereg, int offset)
 988 {
 989         MonoInst *group;
 990
 991         MONO_INST_NEW (cfg, group, OP_GROUP);
 992         group->inst_left = left;
 993         group->inst_basereg = basereg;
 994         group->inst_imm = offset;
 995
 996         return group;
 997 }
 998
 999 static void
1000 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo)
1001 {
1002         MonoInst *arg;
1003         MonoMethodSignature *tmp_sig;
1004         MonoInst *sig_arg;
1005
1006         /*
1007          * mono_ArgIterator_Setup assumes the signature cookie is
1008          * passed first and all the arguments which were before it are
1009          * passed on the stack after the signature. So compensate by
1010          * passing a different signature.
1011          */
1012         tmp_sig = mono_metadata_signature_dup (call->signature);
1013         tmp_sig->param_count -= call->signature->sentinelpos;
1014         tmp_sig->sentinelpos = 0;
1015         memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1016
1017         /* FIXME: Add support for signature tokens to AOT */
1018         cfg->disable_aot = TRUE;
1019         /* We allways pass the signature on the stack for simplicity */
1020         MONO_INST_NEW (cfg, arg, OP_SPARC_OUTARG_MEM);
1021         arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + cinfo->sig_cookie.offset);
1022         MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
1023         sig_arg->inst_p0 = tmp_sig;
1024         arg->inst_left = sig_arg;
1025         arg->type = STACK_PTR;
1026         /* prepend, so they get reversed */
1027         arg->next = call->out_args;
1028         call->out_args = arg;
1029 }
1030
1031 /*
1032  * take the arguments and generate the arch-specific
1033  * instructions to properly call the function in call.
1034  * This includes pushing, moving arguments to the right register
1035  * etc.
1036  */
1037 MonoCallInst*
1038 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
1039         MonoInst *arg, *in;
1040         MonoMethodSignature *sig;
1041         int i, n;
1042         CallInfo *cinfo;
1043         ArgInfo *ainfo;
1044         guint32 extra_space = 0;
1045
1046         sig = call->signature;
1047         n = sig->param_count + sig->hasthis;
1048
1049         cinfo = get_call_info (sig, sig->pinvoke);
1050
1051         for (i = 0; i < n; ++i) {
1052                 ainfo = cinfo->args + i;
1053
1054                 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
1055                         /* Emit the signature cookie just before the first implicit argument */
1056                         emit_sig_cookie (cfg, call, cinfo);
1057                 }
1058
1059                 if (is_virtual && i == 0) {
1060                         /* the argument will be attached to the call instruction */
1061                         in = call->args [i];
1062                 } else {
1063                         MONO_INST_NEW (cfg, arg, OP_OUTARG);
1064                         in = call->args [i];
1065                         arg->cil_code = in->cil_code;
1066                         arg->inst_left = in;
1067                         arg->type = in->type;
1068                         /* prepend, we'll need to reverse them later */
1069                         arg->next = call->out_args;
1070                         call->out_args = arg;
1071
1072                         if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(sig->params [i - sig->hasthis]))) {
1073                                 MonoInst *inst;
1074                                 gint align;
1075                                 guint32 offset, pad;
1076                                 guint32 size;
1077
1078 #ifdef SPARCV9
1079                                 if (sig->pinvoke)
1080                                         NOT_IMPLEMENTED;
1081 #endif
1082
1083                                 if (sig->params [i - sig->hasthis]->type == MONO_TYPE_TYPEDBYREF) {
1084                                         size = sizeof (MonoTypedRef);
1085                                         align = sizeof (gpointer);
1086                                 }
1087                                 else
1088                                 if (sig->pinvoke)
1089                                         size = mono_type_native_stack_size (&in->klass->byval_arg, &align);
1090                                 else {
1091                                         /*
1092                                          * Can't use mono_type_stack_size (), but that
1093                                          * aligns the size to sizeof (gpointer), which is larger
1094                                          * than the size of the source, leading to reads of invalid
1095                                          * memory if the source is at the end of address space or
1096                                          * misaligned reads.
1097                                          */
1098                                         size = mono_class_value_size (in->klass, &align);
1099                                 }
1100
1101                                 /*
1102                                  * We use OP_OUTARG_VT to copy the valuetype to a stack location, then
1103                                  * use the normal OUTARG opcodes to pass the address of the location to
1104                                  * the callee.
1105                                  */
1106                                 MONO_INST_NEW (cfg, inst, OP_OUTARG_VT);
1107                                 inst->inst_left = in;
1108
1109                                 /* The first 6 argument locations are reserved */
1110                                 if (cinfo->stack_usage < 6 * sizeof (gpointer))
1111                                         cinfo->stack_usage = 6 * sizeof (gpointer);
1112
1113                                 offset = ALIGN_TO ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage, align);
1114                                 pad = offset - ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage);
1115
1116                                 inst->inst_c1 = STACK_BIAS + offset;
1117                                 inst->backend.size = size;
1118                                 arg->inst_left = inst;
1119
1120                                 cinfo->stack_usage += size;
1121                                 cinfo->stack_usage += pad;
1122                         }
1123
1124                         arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + ainfo->offset);
1125
1126                         switch (ainfo->storage) {
1127                         case ArgInIReg:
1128                         case ArgInFReg:
1129                         case ArgInIRegPair:
1130                                 if (ainfo->storage == ArgInIRegPair)
1131                                         arg->opcode = OP_SPARC_OUTARG_REGPAIR;
1132                                 arg->backend.reg3 = sparc_o0 + ainfo->reg;
1133                                 call->used_iregs |= 1 << ainfo->reg;
1134
1135                                 if ((i >= sig->hasthis) && !sig->params [i - sig->hasthis]->byref && ((sig->params [i - sig->hasthis]->type == MONO_TYPE_R8) || (sig->params [i - sig->hasthis]->type == MONO_TYPE_R4))) {
1136                                         /* An fp value is passed in an ireg */
1137
1138                                         if (arg->opcode == OP_SPARC_OUTARG_REGPAIR)
1139                                                 arg->opcode = OP_SPARC_OUTARG_REGPAIR_FLOAT;
1140                                         else
1141                                                 arg->opcode = OP_SPARC_OUTARG_FLOAT;
1142
1143                                         /*
1144                                          * The OUTARG (freg) implementation needs an extra dword to store
1145                                          * the temporary value.
1146                                          */
1147                                         extra_space += 8;
1148                                 }
1149                                 break;
1150                         case ArgOnStack:
1151                                 arg->opcode = OP_SPARC_OUTARG_MEM;
1152                                 break;
1153                         case ArgOnStackPair:
1154                                 arg->opcode = OP_SPARC_OUTARG_MEMPAIR;
1155                                 break;
1156                         case ArgInSplitRegStack:
1157                                 arg->opcode = OP_SPARC_OUTARG_SPLIT_REG_STACK;
1158                                 arg->backend.reg3 = sparc_o0 + ainfo->reg;
1159                                 call->used_iregs |= 1 << ainfo->reg;
1160                                 break;
1161                         case ArgInFloatReg:
1162                                 arg->opcode = OP_SPARC_OUTARG_FLOAT_REG;
1163                                 arg->backend.reg3 = sparc_f0 + ainfo->reg;
1164                                 break;
1165                         case ArgInDoubleReg:
1166                                 arg->opcode = OP_SPARC_OUTARG_DOUBLE_REG;
1167                                 arg->backend.reg3 = sparc_f0 + ainfo->reg;
1168                                 break;
1169                         default:
1170                                 NOT_IMPLEMENTED;
1171                         }
1172                 }
1173         }
1174
1175         /* Handle the case where there are no implicit arguments */
1176         if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sig->sentinelpos)) {
1177                 emit_sig_cookie (cfg, call, cinfo);
1178         }
1179
1180         /*
1181          * Reverse the call->out_args list.
1182          */
1183         {
1184                 MonoInst *prev = NULL, *list = call->out_args, *next;
1185                 while (list) {
1186                         next = list->next;
1187                         list->next = prev;
1188                         prev = list;
1189                         list = next;
1190                 }
1191                 call->out_args = prev;
1192         }
1193         call->stack_usage = cinfo->stack_usage + extra_space;
1194         call->out_ireg_args = NULL;
1195         call->out_freg_args = NULL;
1196         cfg->param_area = MAX (cfg->param_area, call->stack_usage);
1197         cfg->flags |= MONO_CFG_HAS_CALLS;
1198
1199         g_free (cinfo);
1200         return call;
1201 }
1202
1203 /* Map opcode to the sparc condition codes */
1204 static inline SparcCond
1205 opcode_to_sparc_cond (int opcode)
1206 {
1207         switch (opcode) {
1208         case OP_FBGE:
1209                 return sparc_fbge;
1210         case OP_FBLE:
1211                 return sparc_fble;
1212         case OP_FBEQ:
1213         case OP_FCEQ:
1214                 return sparc_fbe;
1215         case OP_FBLT:
1216         case OP_FCLT:
1217         case OP_FCLT_UN:
1218                 return sparc_fbl;
1219         case OP_FBGT:
1220         case OP_FCGT:
1221         case OP_FCGT_UN:
1222                 return sparc_fbg;
1223         case CEE_BEQ:
1224         case OP_IBEQ:
1225         case OP_CEQ:
1226         case OP_ICEQ:
1227         case OP_COND_EXC_EQ:
1228                 return sparc_be;
1229         case CEE_BNE_UN:
1230         case OP_COND_EXC_NE_UN:
1231         case OP_IBNE_UN:
1232                 return sparc_bne;
1233         case CEE_BLT:
1234         case OP_IBLT:
1235         case OP_CLT:
1236         case OP_ICLT:
1237         case OP_COND_EXC_LT:
1238                 return sparc_bl;
1239         case CEE_BLT_UN:
1240         case OP_IBLT_UN:
1241         case OP_CLT_UN:
1242         case OP_ICLT_UN:
1243         case OP_COND_EXC_LT_UN:
1244                 return sparc_blu;
1245         case CEE_BGT:
1246         case OP_IBGT:
1247         case OP_CGT:
1248         case OP_ICGT:
1249         case OP_COND_EXC_GT:
1250                 return sparc_bg;
1251         case CEE_BGT_UN:
1252         case OP_IBGT_UN:
1253         case OP_CGT_UN:
1254         case OP_ICGT_UN:
1255         case OP_COND_EXC_GT_UN:
1256                 return sparc_bgu;
1257         case CEE_BGE:
1258         case OP_IBGE:
1259         case OP_COND_EXC_GE:
1260                 return sparc_bge;
1261         case CEE_BGE_UN:
1262         case OP_IBGE_UN:
1263         case OP_COND_EXC_GE_UN:
1264                 return sparc_beu;
1265         case CEE_BLE:
1266         case OP_IBLE:
1267         case OP_COND_EXC_LE:
1268                 return sparc_ble;
1269         case CEE_BLE_UN:
1270         case OP_IBLE_UN:
1271         case OP_COND_EXC_LE_UN:
1272                 return sparc_bleu;
1273         case OP_COND_EXC_OV:
1274         case OP_COND_EXC_IOV:
1275                 return sparc_bvs;
1276         case OP_COND_EXC_C:
1277         case OP_COND_EXC_IC:
1278                 return sparc_bcs;
1279         case OP_COND_EXC_NO:
1280         case OP_COND_EXC_NC:
1281                 NOT_IMPLEMENTED;
1282         default:
1283                 g_assert_not_reached ();
1284                 return sparc_be;
1285         }
1286 }
1287
1288 #define COMPUTE_DISP(ins) \
1289 if (ins->flags & MONO_INST_BRLABEL) { \
1290         if (ins->inst_i0->inst_c0) \
1291            disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2; \
1292         else { \
1293             disp = 0; \
1294                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
1295         } \
1296 } else { \
1297         if (ins->inst_true_bb->native_offset) \
1298            disp = (ins->inst_true_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2; \
1299         else { \
1300             disp = 0; \
1301                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1302         } \
1303 }
1304
1305 #ifdef SPARCV9
1306 #define DEFAULT_ICC sparc_xcc_short
1307 #else
1308 #define DEFAULT_ICC sparc_icc_short
1309 #endif
1310
1311 #ifdef SPARCV9
1312 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) \
1313     do { \
1314         gint32 disp; \
1315         guint32 predict; \
1316         COMPUTE_DISP(ins); \
1317         predict = (disp != 0) ? 1 : 0; \
1318         g_assert (sparc_is_imm19 (disp)); \
1319         sparc_branchp (code, (annul), cond, icc, (predict), disp); \
1320         if (filldelay) sparc_nop (code); \
1321     } while (0)
1322 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_ICC ((ins), (cond), (annul), (filldelay), (sparc_xcc_short))
1323 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) \
1324     do { \
1325         gint32 disp; \
1326         guint32 predict; \
1327         COMPUTE_DISP(ins); \
1328         predict = (disp != 0) ? 1 : 0; \
1329         g_assert (sparc_is_imm19 (disp)); \
1330         sparc_fbranch (code, (annul), cond, disp); \
1331         if (filldelay) sparc_nop (code); \
1332     } while (0)
1333 #else
1334 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) g_assert_not_reached ()
1335 #define EMIT_COND_BRANCH_GENERAL(ins,bop,cond,annul,filldelay) \
1336     do { \
1337         gint32 disp; \
1338         COMPUTE_DISP(ins); \
1339         g_assert (sparc_is_imm22 (disp)); \
1340         sparc_ ## bop (code, (annul), cond, disp); \
1341         if (filldelay) sparc_nop (code); \
1342     } while (0)
1343 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),branch,(cond),annul,filldelay)
1344 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),fbranch,(cond),annul,filldelay)
1345 #endif
1346
1347 #define EMIT_COND_BRANCH_PREDICTED(ins,cond,annul,filldelay) \
1348     do { \
1349             gint32 disp; \
1350         guint32 predict; \
1351         COMPUTE_DISP(ins); \
1352         predict = (disp != 0) ? 1 : 0; \
1353         g_assert (sparc_is_imm19 (disp)); \
1354                 sparc_branchp (code, (annul), (cond), DEFAULT_ICC, (predict), disp); \
1355         if (filldelay) sparc_nop (code); \
1356     } while (0)
1357
1358 #define EMIT_COND_BRANCH_BPR(ins,bop,predict,annul,filldelay) \
1359     do { \
1360             gint32 disp; \
1361         COMPUTE_DISP(ins); \
1362                 g_assert (sparc_is_imm22 (disp)); \
1363                 sparc_ ## bop (code, (annul), (predict), ins->sreg1, disp); \
1364         if (filldelay) sparc_nop (code); \
1365     } while (0)
1366
1367 /* emit an exception if condition is fail */
1368 /*
1369  * We put the exception throwing code out-of-line, at the end of the method
1370  */
1371 #define EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,filldelay,icc) do {     \
1372                 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,   \
1373                                     MONO_PATCH_INFO_EXC, sexc_name);  \
1374         if (sparcv9) { \
1375            sparc_branchp (code, 0, (cond), (icc), 0, 0); \
1376         } \
1377         else { \
1378                         sparc_branch (code, 0, cond, 0);     \
1379         } \
1380         if (filldelay) sparc_nop (code);     \
1381         } while (0);
1382
1383 #define EMIT_COND_SYSTEM_EXCEPTION(ins,cond,sexc_name) EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,TRUE,DEFAULT_ICC)
1384
1385 #define EMIT_COND_SYSTEM_EXCEPTION_BPR(ins,bop,sexc_name) do { \
1386                 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,   \
1387                                     MONO_PATCH_INFO_EXC, sexc_name);  \
1388                 sparc_ ## bop (code, FALSE, FALSE, ins->sreg1, 0); \
1389         sparc_nop (code);    \
1390 } while (0);
1391
1392 #define EMIT_ALU_IMM(ins,op,setcc) do { \
1393                         if (sparc_is_imm13 ((ins)->inst_imm)) \
1394                                 sparc_ ## op ## _imm (code, (setcc), (ins)->sreg1, ins->inst_imm, (ins)->dreg); \
1395                         else { \
1396                                 sparc_set (code, ins->inst_imm, sparc_o7); \
1397                                 sparc_ ## op (code, (setcc), (ins)->sreg1, sparc_o7, (ins)->dreg); \
1398                         } \
1399 } while (0);
1400
1401 #define EMIT_LOAD_MEMBASE(ins,op) do { \
1402                         if (sparc_is_imm13 (ins->inst_offset)) \
1403                                 sparc_ ## op ## _imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg); \
1404                         else { \
1405                                 sparc_set (code, ins->inst_offset, sparc_o7); \
1406                                 sparc_ ## op (code, ins->inst_basereg, sparc_o7, ins->dreg); \
1407                         } \
1408 } while (0);
1409
1410 /* max len = 5 */
1411 #define EMIT_STORE_MEMBASE_IMM(ins,op) do { \
1412                         guint32 sreg; \
1413                         if (ins->inst_imm == 0) \
1414                                 sreg = sparc_g0; \
1415                         else { \
1416                                 sparc_set (code, ins->inst_imm, sparc_o7); \
1417                                 sreg = sparc_o7; \
1418                         } \
1419                         if (!sparc_is_imm13 (ins->inst_offset)) { \
1420                                 sparc_set (code, ins->inst_offset, GP_SCRATCH_REG); \
1421                                 sparc_ ## op (code, sreg, ins->inst_destbasereg, GP_SCRATCH_REG); \
1422                         } \
1423                         else \
1424                                 sparc_ ## op ## _imm (code, sreg, ins->inst_destbasereg, ins->inst_offset); \
1425                                                                                                                                                                                  } while (0);
1426
1427 #define EMIT_STORE_MEMBASE_REG(ins,op) do { \
1428                         if (!sparc_is_imm13 (ins->inst_offset)) { \
1429                                 sparc_set (code, ins->inst_offset, sparc_o7); \
1430                                 sparc_ ## op (code, ins->sreg1, ins->inst_destbasereg, sparc_o7); \
1431                         } \
1432                                   else \
1433                                 sparc_ ## op ## _imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset); \
1434                                                                                                                                                                                  } while (0);
1435
1436 #define EMIT_CALL() do { \
1437     if (v64) { \
1438         sparc_set_template (code, sparc_o7); \
1439         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7); \
1440     } \
1441     else { \
1442         sparc_call_simple (code, 0); \
1443     } \
1444     sparc_nop (code); \
1445 } while (0);
1446
1447 /*
1448  * A call template is 7 instructions long, so we want to avoid it if possible.
1449  */
1450 static guint32*
1451 emit_call (MonoCompile *cfg, guint32 *code, guint32 patch_type, gconstpointer data)
1452 {
1453         gpointer target;
1454
1455         /* FIXME: This only works if the target method is already compiled */
1456         if (0 && v64 && !cfg->compile_aot) {
1457                 MonoJumpInfo patch_info;
1458
1459                 patch_info.type = patch_type;
1460                 patch_info.data.target = data;
1461
1462                 target = mono_resolve_patch_target (cfg->method, cfg->domain, NULL, &patch_info, FALSE);
1463
1464                 /* FIXME: Add optimizations if the target is close enough */
1465                 sparc_set (code, target, sparc_o7);
1466                 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7);
1467                 sparc_nop (code);
1468         }
1469         else {
1470                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, patch_type, data);
1471                 EMIT_CALL ();
1472         }
1473
1474         return code;
1475 }
1476
1477 static void
1478 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1479 {
1480         MonoInst *ins, *last_ins = NULL;
1481         ins = bb->code;
1482
1483         while (ins) {
1484
1485                 switch (ins->opcode) {
1486                 case OP_MUL_IMM:
1487                         /* remove unnecessary multiplication with 1 */
1488                         if (ins->inst_imm == 1) {
1489                                 if (ins->dreg != ins->sreg1) {
1490                                         ins->opcode = OP_MOVE;
1491                                 } else {
1492                                         last_ins->next = ins->next;
1493                                         ins = ins->next;
1494                                         continue;
1495                                 }
1496                         }
1497                         break;
1498 #ifndef SPARCV9
1499                 case OP_LOAD_MEMBASE:
1500                 case OP_LOADI4_MEMBASE:
1501                         /*
1502                          * OP_STORE_MEMBASE_REG reg, offset(basereg)
1503                          * OP_LOAD_MEMBASE offset(basereg), reg
1504                          */
1505                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
1506                                          || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1507                             ins->inst_basereg == last_ins->inst_destbasereg &&
1508                             ins->inst_offset == last_ins->inst_offset) {
1509                                 if (ins->dreg == last_ins->sreg1) {
1510                                         last_ins->next = ins->next;
1511                                         ins = ins->next;
1512                                         continue;
1513                                 } else {
1514                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1515                                         ins->opcode = OP_MOVE;
1516                                         ins->sreg1 = last_ins->sreg1;
1517                                 }
1518
1519                         /*
1520                          * Note: reg1 must be different from the basereg in the second load
1521                          * OP_LOAD_MEMBASE offset(basereg), reg1
1522                          * OP_LOAD_MEMBASE offset(basereg), reg2
1523                          * -->
1524                          * OP_LOAD_MEMBASE offset(basereg), reg1
1525                          * OP_MOVE reg1, reg2
1526                          */
1527                         } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1528                                            || last_ins->opcode == OP_LOAD_MEMBASE) &&
1529                               ins->inst_basereg != last_ins->dreg &&
1530                               ins->inst_basereg == last_ins->inst_basereg &&
1531                               ins->inst_offset == last_ins->inst_offset) {
1532
1533                                 if (ins->dreg == last_ins->dreg) {
1534                                         last_ins->next = ins->next;
1535                                         ins = ins->next;
1536                                         continue;
1537                                 } else {
1538                                         ins->opcode = OP_MOVE;
1539                                         ins->sreg1 = last_ins->dreg;
1540                                 }
1541
1542                                 //g_assert_not_reached ();
1543
1544 #if 0
1545                         /*
1546                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1547                          * OP_LOAD_MEMBASE offset(basereg), reg
1548                          * -->
1549                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1550                          * OP_ICONST reg, imm
1551                          */
1552                         } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1553                                                 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1554                                    ins->inst_basereg == last_ins->inst_destbasereg &&
1555                                    ins->inst_offset == last_ins->inst_offset) {
1556                                 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1557                                 ins->opcode = OP_ICONST;
1558                                 ins->inst_c0 = last_ins->inst_imm;
1559                                 g_assert_not_reached (); // check this rule
1560 #endif
1561                         }
1562                         break;
1563 #endif
1564                 case OP_LOADI1_MEMBASE:
1565                         if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1566                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1567                                         ins->inst_offset == last_ins->inst_offset) {
1568                                 if (ins->dreg == last_ins->sreg1) {
1569                                         last_ins->next = ins->next;
1570                                         ins = ins->next;
1571                                         continue;
1572                                 } else {
1573                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1574                                         ins->opcode = OP_MOVE;
1575                                         ins->sreg1 = last_ins->sreg1;
1576                                 }
1577                         }
1578                         break;
1579                 case OP_LOADI2_MEMBASE:
1580                         if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1581                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1582                                         ins->inst_offset == last_ins->inst_offset) {
1583                                 if (ins->dreg == last_ins->sreg1) {
1584                                         last_ins->next = ins->next;
1585                                         ins = ins->next;
1586                                         continue;
1587                                 } else {
1588                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1589                                         ins->opcode = OP_MOVE;
1590                                         ins->sreg1 = last_ins->sreg1;
1591                                 }
1592                         }
1593                         break;
1594                 case OP_STOREI4_MEMBASE_IMM:
1595                         /* Convert pairs of 0 stores to a dword 0 store */
1596                         /* Used when initializing temporaries */
1597                         /* We know sparc_fp is dword aligned */
1598                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM) &&
1599                                 (ins->inst_destbasereg == last_ins->inst_destbasereg) &&
1600                                 (ins->inst_destbasereg == sparc_fp) &&
1601                                 (ins->inst_offset < 0) &&
1602                                 ((ins->inst_offset % 8) == 0) &&
1603                                 ((ins->inst_offset == last_ins->inst_offset - 4)) &&
1604                                 (ins->inst_imm == 0) &&
1605                                 (last_ins->inst_imm == 0)) {
1606                                 if (sparcv9) {
1607                                         last_ins->opcode = OP_STOREI8_MEMBASE_IMM;
1608                                         last_ins->inst_offset = ins->inst_offset;
1609                                         last_ins->next = ins->next;
1610                                         ins = ins->next;
1611                                         continue;
1612                                 }
1613                         }
1614                         break;
1615                 case CEE_BEQ:
1616                 case CEE_BNE_UN:
1617                 case CEE_BLT:
1618                 case CEE_BGT:
1619                 case CEE_BGE:
1620                 case CEE_BLE:
1621                 case OP_COND_EXC_EQ:
1622                 case OP_COND_EXC_GE:
1623                 case OP_COND_EXC_GT:
1624                 case OP_COND_EXC_LE:
1625                 case OP_COND_EXC_LT:
1626                 case OP_COND_EXC_NE_UN:
1627                         /*
1628                          * Convert compare with zero+branch to BRcc
1629                          */
1630                         /*
1631                          * This only works in 64 bit mode, since it examines all 64
1632                          * bits of the register.
1633                          * Only do this if the method is small since BPr only has a 16bit
1634                          * displacement.
1635                          */
1636                         if (v64 && (mono_method_get_header (cfg->method)->code_size < 10000) && last_ins &&
1637                                 (last_ins->opcode == OP_COMPARE_IMM) &&
1638                                 (last_ins->inst_imm == 0)) {
1639                                 MonoInst *next = ins->next;
1640                                 switch (ins->opcode) {
1641                                 case CEE_BEQ:
1642                                         ins->opcode = OP_SPARC_BRZ;
1643                                         break;
1644                                 case CEE_BNE_UN:
1645                                         ins->opcode = OP_SPARC_BRNZ;
1646                                         break;
1647                                 case CEE_BLT:
1648                                         ins->opcode = OP_SPARC_BRLZ;
1649                                         break;
1650                                 case CEE_BGT:
1651                                         ins->opcode = OP_SPARC_BRGZ;
1652                                         break;
1653                                 case CEE_BGE:
1654                                         ins->opcode = OP_SPARC_BRGEZ;
1655                                         break;
1656                                 case CEE_BLE:
1657                                         ins->opcode = OP_SPARC_BRLEZ;
1658                                         break;
1659                                 case OP_COND_EXC_EQ:
1660                                         ins->opcode = OP_SPARC_COND_EXC_EQZ;
1661                                         break;
1662                                 case OP_COND_EXC_GE:
1663                                         ins->opcode = OP_SPARC_COND_EXC_GEZ;
1664                                         break;
1665                                 case OP_COND_EXC_GT:
1666                                         ins->opcode = OP_SPARC_COND_EXC_GTZ;
1667                                         break;
1668                                 case OP_COND_EXC_LE:
1669                                         ins->opcode = OP_SPARC_COND_EXC_LEZ;
1670                                         break;
1671                                 case OP_COND_EXC_LT:
1672                                         ins->opcode = OP_SPARC_COND_EXC_LTZ;
1673                                         break;
1674                                 case OP_COND_EXC_NE_UN:
1675                                         ins->opcode = OP_SPARC_COND_EXC_NEZ;
1676                                         break;
1677                                 default:
1678                                         g_assert_not_reached ();
1679                                 }
1680                                 ins->sreg1 = last_ins->sreg1;
1681                                 *last_ins = *ins;
1682                                 last_ins->next = next;
1683                                 ins = next;
1684                                 continue;
1685                         }
1686                         break;
1687                 case CEE_CONV_I4:
1688                 case CEE_CONV_U4:
1689                 case OP_MOVE:
1690                         /*
1691                          * OP_MOVE reg, reg
1692                          */
1693                         if (ins->dreg == ins->sreg1) {
1694                                 if (last_ins)
1695                                         last_ins->next = ins->next;
1696                                 ins = ins->next;
1697                                 continue;
1698                         }
1699                         /*
1700                          * OP_MOVE sreg, dreg
1701                          * OP_MOVE dreg, sreg
1702                          */
1703                         if (last_ins && last_ins->opcode == OP_MOVE &&
1704                             ins->sreg1 == last_ins->dreg &&
1705                             ins->dreg == last_ins->sreg1) {
1706                                 last_ins->next = ins->next;
1707                                 ins = ins->next;
1708                                 continue;
1709                         }
1710                         break;
1711                 }
1712                 last_ins = ins;
1713                 ins = ins->next;
1714         }
1715         bb->last_ins = last_ins;
1716 }
1717
1718 static int
1719 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
1720 {
1721         MonoSpillInfo **si, *info;
1722         int i = 0;
1723
1724         si = &cfg->spill_info_float;
1725
1726         while (i <= spillvar) {
1727
1728                 if (!*si) {
1729                         *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1730                         info->next = NULL;
1731                         cfg->stack_offset += sizeof (double);
1732                         cfg->stack_offset = ALIGN_TO (cfg->stack_offset, 8);
1733                         info->offset = - cfg->stack_offset;
1734                 }
1735
1736                 if (i == spillvar)
1737                         return MONO_SPARC_STACK_BIAS + (*si)->offset;
1738
1739                 i++;
1740                 si = &(*si)->next;
1741         }
1742
1743         g_assert_not_reached ();
1744         return 0;
1745 }
1746
1747 /* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
1748
1749 void
1750 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1751 {
1752         mono_local_regalloc (cfg, bb);
1753 }
1754
1755 static void
1756 sparc_patch (guint32 *code, const gpointer target)
1757 {
1758         guint32 *c = code;
1759         guint32 ins = *code;
1760         guint32 op = ins >> 30;
1761         guint32 op2 = (ins >> 22) & 0x7;
1762         guint32 rd = (ins >> 25) & 0x1f;
1763         guint8* target8 = (guint8*)target;
1764         gint64 disp = (target8 - (guint8*)code) >> 2;
1765         int reg;
1766
1767 //      g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
1768
1769         if ((op == 0) && (op2 == 2)) {
1770                 if (!sparc_is_imm22 (disp))
1771                         NOT_IMPLEMENTED;
1772                 /* Bicc */
1773                 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1774         }
1775         else if ((op == 0) && (op2 == 1)) {
1776                 if (!sparc_is_imm19 (disp))
1777                         NOT_IMPLEMENTED;
1778                 /* BPcc */
1779                 *code = ((ins >> 19) << 19) | (disp & 0x7ffff);
1780         }
1781         else if ((op == 0) && (op2 == 3)) {
1782                 if (!sparc_is_imm16 (disp))
1783                         NOT_IMPLEMENTED;
1784                 /* BPr */
1785                 *code &= ~(0x180000 | 0x3fff);
1786                 *code |= ((disp << 21) & (0x180000)) | (disp & 0x3fff);
1787         }
1788         else if ((op == 0) && (op2 == 6)) {
1789                 if (!sparc_is_imm22 (disp))
1790                         NOT_IMPLEMENTED;
1791                 /* FBicc */
1792                 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1793         }
1794         else if ((op == 0) && (op2 == 4)) {
1795                 guint32 ins2 = code [1];
1796
1797                 if (((ins2 >> 30) == 2) && (((ins2 >> 19) & 0x3f) == 2)) {
1798                         /* sethi followed by or */
1799                         guint32 *p = code;
1800                         sparc_set (p, target8, rd);
1801                         while (p <= (code + 1))
1802                                 sparc_nop (p);
1803                 }
1804                 else if (ins2 == 0x01000000) {
1805                         /* sethi followed by nop */
1806                         guint32 *p = code;
1807                         sparc_set (p, target8, rd);
1808                         while (p <= (code + 1))
1809                                 sparc_nop (p);
1810                 }
1811                 else if ((sparc_inst_op (ins2) == 3) && (sparc_inst_imm (ins2))) {
1812                         /* sethi followed by load/store */
1813 #ifndef SPARCV9
1814                         guint32 t = (guint32)target8;
1815                         *code &= ~(0x3fffff);
1816                         *code |= (t >> 10);
1817                         *(code + 1) &= ~(0x3ff);
1818                         *(code + 1) |= (t & 0x3ff);
1819 #endif
1820                 }
1821                 else if (v64 &&
1822                                  (sparc_inst_rd (ins) == sparc_g1) &&
1823                                  (sparc_inst_op (c [1]) == 0) && (sparc_inst_op2 (c [1]) == 4) &&
1824                                  (sparc_inst_op (c [2]) == 2) && (sparc_inst_op3 (c [2]) == 2) &&
1825                                  (sparc_inst_op (c [3]) == 2) && (sparc_inst_op3 (c [3]) == 2))
1826                 {
1827                         /* sparc_set */
1828                         guint32 *p = c;
1829                         reg = sparc_inst_rd (c [1]);
1830                         sparc_set (p, target8, reg);
1831                         while (p < (c + 6))
1832                                 sparc_nop (p);
1833                 }
1834                 else if ((sparc_inst_op (ins2) == 2) && (sparc_inst_op3 (ins2) == 0x38) &&
1835                                  (sparc_inst_imm (ins2))) {
1836                         /* sethi followed by jmpl */
1837 #ifndef SPARCV9
1838                         guint32 t = (guint32)target8;
1839                         *code &= ~(0x3fffff);
1840                         *code |= (t >> 10);
1841                         *(code + 1) &= ~(0x3ff);
1842                         *(code + 1) |= (t & 0x3ff);
1843 #endif
1844                 }
1845                 else
1846                         NOT_IMPLEMENTED;
1847         }
1848         else if (op == 01) {
1849                 gint64 disp = (target8 - (guint8*)code) >> 2;
1850
1851                 if (!sparc_is_imm30 (disp))
1852                         NOT_IMPLEMENTED;
1853                 sparc_call_simple (code, target8 - (guint8*)code);
1854         }
1855         else if ((op == 2) && (sparc_inst_op3 (ins) == 0x2) && sparc_inst_imm (ins)) {
1856                 /* mov imm, reg */
1857                 g_assert (sparc_is_imm13 (target8));
1858                 *code &= ~(0x1fff);
1859                 *code |= (guint32)target8;
1860         }
1861         else if ((sparc_inst_op (ins) == 2) && (sparc_inst_op3 (ins) == 0x7)) {
1862                 /* sparc_set case 5. */
1863                 guint32 *p = c;
1864
1865                 g_assert (v64);
1866                 reg = sparc_inst_rd (c [3]);
1867                 sparc_set (p, target, reg);
1868                 while (p < (c + 6))
1869                         sparc_nop (p);
1870         }
1871         else
1872                 NOT_IMPLEMENTED;
1873
1874 //      g_print ("patched with 0x%08x\n", ins);
1875 }
1876
1877 /*
1878  * mono_sparc_emit_save_lmf:
1879  *
1880  *  Emit the code neccesary to push a new entry onto the lmf stack. Used by
1881  * trampolines as well.
1882  */
1883 guint32*
1884 mono_sparc_emit_save_lmf (guint32 *code, guint32 lmf_offset)
1885 {
1886         /* Save lmf_addr */
1887         sparc_sti_imm (code, sparc_o0, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr));
1888         /* Save previous_lmf */
1889         sparc_ldi (code, sparc_o0, sparc_g0, sparc_o7);
1890         sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf));
1891         /* Set new lmf */
1892         sparc_add_imm (code, FALSE, sparc_fp, lmf_offset, sparc_o7);
1893         sparc_sti (code, sparc_o7, sparc_o0, sparc_g0);
1894
1895         return code;
1896 }
1897
1898 guint32*
1899 mono_sparc_emit_restore_lmf (guint32 *code, guint32 lmf_offset)
1900 {
1901         /* Load previous_lmf */
1902         sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), sparc_l0);
1903         /* Load lmf_addr */
1904         sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), sparc_l1);
1905         /* *(lmf) = previous_lmf */
1906         sparc_sti (code, sparc_l0, sparc_l1, sparc_g0);
1907         return code;
1908 }
1909
1910 static guint32*
1911 emit_save_sp_to_lmf (MonoCompile *cfg, guint32 *code)
1912 {
1913         /*
1914          * Since register windows are saved to the current value of %sp, we need to
1915          * set the sp field in the lmf before the call, not in the prolog.
1916          */
1917         if (cfg->method->save_lmf) {
1918                 gint32 lmf_offset = MONO_SPARC_STACK_BIAS - cfg->arch.lmf_offset;
1919
1920                 /* Save sp */
1921                 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
1922         }
1923
1924         return code;
1925 }
1926
1927 static guint32*
1928 emit_vret_token (MonoInst *ins, guint32 *code)
1929 {
1930         MonoCallInst *call = (MonoCallInst*)ins;
1931         guint32 size;
1932
1933         /*
1934          * The sparc ABI requires that calls to functions which return a structure
1935          * contain an additional unimpl instruction which is checked by the callee.
1936          */
1937         if (call->signature->pinvoke && MONO_TYPE_ISSTRUCT(call->signature->ret)) {
1938                 if (call->signature->ret->type == MONO_TYPE_TYPEDBYREF)
1939                         size = mono_type_stack_size (call->signature->ret, NULL);
1940                 else
1941                         size = mono_class_native_size (call->signature->ret->data.klass, NULL);
1942                 sparc_unimp (code, size & 0xfff);
1943         }
1944
1945         return code;
1946 }
1947
1948 static guint32*
1949 emit_move_return_value (MonoInst *ins, guint32 *code)
1950 {
1951         /* Move return value to the target register */
1952         /* FIXME: do more things in the local reg allocator */
1953         switch (ins->opcode) {
1954         case OP_VOIDCALL:
1955         case OP_VOIDCALL_REG:
1956         case OP_VOIDCALL_MEMBASE:
1957                 break;
1958         case CEE_CALL:
1959         case OP_CALL_REG:
1960         case OP_CALL_MEMBASE:
1961                 g_assert (ins->dreg == sparc_o0);
1962                 break;
1963         case OP_LCALL:
1964         case OP_LCALL_REG:
1965         case OP_LCALL_MEMBASE:
1966                 /*
1967                  * ins->dreg is the least significant reg due to the lreg: LCALL rule
1968                  * in inssel-long32.brg.
1969                  */
1970 #ifdef SPARCV9
1971                 sparc_mov_reg_reg (code, sparc_o0, ins->dreg);
1972 #else
1973                 g_assert (ins->dreg == sparc_o1);
1974 #endif
1975                 break;
1976         case OP_FCALL:
1977         case OP_FCALL_REG:
1978         case OP_FCALL_MEMBASE:
1979 #ifdef SPARCV9
1980                 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4) {
1981                         sparc_fmovs (code, sparc_f0, ins->dreg);
1982                         sparc_fstod (code, ins->dreg, ins->dreg);
1983                 }
1984                 else
1985                         sparc_fmovd (code, sparc_f0, ins->dreg);
1986 #else
1987                 sparc_fmovs (code, sparc_f0, ins->dreg);
1988                 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4)
1989                         sparc_fstod (code, ins->dreg, ins->dreg);
1990                 else
1991                         sparc_fmovs (code, sparc_f1, ins->dreg + 1);
1992 #endif
1993                 break;
1994         case OP_VCALL:
1995         case OP_VCALL_REG:
1996         case OP_VCALL_MEMBASE:
1997                 break;
1998         default:
1999                 NOT_IMPLEMENTED;
2000         }
2001
2002         return code;
2003 }
2004
2005 /*
2006  * emit_load_volatile_arguments:
2007  *
2008  *  Load volatile arguments from the stack to the original input registers.
2009  * Required before a tail call.
2010  */
2011 static guint32*
2012 emit_load_volatile_arguments (MonoCompile *cfg, guint32 *code)
2013 {
2014         MonoMethod *method = cfg->method;
2015         MonoMethodSignature *sig;
2016         MonoInst *inst;
2017         CallInfo *cinfo;
2018         guint32 i, ireg;
2019
2020         /* FIXME: Generate intermediate code instead */
2021
2022         sig = mono_method_signature (method);
2023
2024         cinfo = get_call_info (sig, FALSE);
2025
2026         /* This is the opposite of the code in emit_prolog */
2027
2028         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
2029                 ArgInfo *ainfo = cinfo->args + i;
2030                 gint32 stack_offset;
2031                 MonoType *arg_type;
2032                 inst = cfg->varinfo [i];
2033
2034                 if (sig->hasthis && (i == 0))
2035                         arg_type = &mono_defaults.object_class->byval_arg;
2036                 else
2037                         arg_type = sig->params [i - sig->hasthis];
2038
2039                 stack_offset = ainfo->offset + ARGS_OFFSET;
2040                 ireg = sparc_i0 + ainfo->reg;
2041
2042                 if (ainfo->storage == ArgInSplitRegStack) {
2043                         g_assert (inst->opcode == OP_REGOFFSET);
2044
2045                         if (!sparc_is_imm13 (stack_offset))
2046                                 NOT_IMPLEMENTED;
2047                         sparc_st_imm (code, inst->inst_basereg, stack_offset, sparc_i5);
2048                 }
2049
2050                 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
2051                         if (ainfo->storage == ArgInIRegPair) {
2052                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
2053                                         NOT_IMPLEMENTED;
2054                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2055                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2056                         }
2057                         else
2058                                 if (ainfo->storage == ArgInSplitRegStack) {
2059                                         if (stack_offset != inst->inst_offset) {
2060                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_i5);
2061                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2062                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2063
2064                                         }
2065                                 }
2066                         else
2067                                 if (ainfo->storage == ArgOnStackPair) {
2068                                         if (stack_offset != inst->inst_offset) {
2069                                                 /* stack_offset is not dword aligned, so we need to make a copy */
2070                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_o7);
2071                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset);
2072
2073                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2074                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2075
2076                                         }
2077                                 }
2078                          else
2079                                 g_assert_not_reached ();
2080                 }
2081                 else
2082                         if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
2083                                 /* Argument in register, but need to be saved to stack */
2084                                 if (!sparc_is_imm13 (stack_offset))
2085                                         NOT_IMPLEMENTED;
2086                                 if ((stack_offset - ARGS_OFFSET) & 0x1)
2087                                         /* FIXME: Is this ldsb or ldub ? */
2088                                         sparc_ldsb_imm (code, inst->inst_basereg, stack_offset, ireg);
2089                                 else
2090                                         if ((stack_offset - ARGS_OFFSET) & 0x2)
2091                                                 sparc_ldsh_imm (code, inst->inst_basereg, stack_offset, ireg);
2092                                 else
2093                                         if ((stack_offset - ARGS_OFFSET) & 0x4)
2094                                                 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2095                                         else {
2096                                                 if (v64)
2097                                                         sparc_ldx_imm (code, inst->inst_basereg, stack_offset, ireg);
2098                                                 else
2099                                                         sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2100                                         }
2101                         }
2102                         else if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
2103                                 /* Argument in regpair, but need to be saved to stack */
2104                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
2105                                         NOT_IMPLEMENTED;
2106                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2107                                 sparc_st_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2108                         }
2109                         else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
2110                                 NOT_IMPLEMENTED;
2111                         }
2112                         else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
2113                                 NOT_IMPLEMENTED;
2114                         }
2115
2116                 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
2117                         if (inst->opcode == OP_REGVAR)
2118                                 /* FIXME: Load the argument into memory */
2119                                 NOT_IMPLEMENTED;
2120         }
2121
2122         g_free (cinfo);
2123
2124         return code;
2125 }
2126
2127 /*
2128  * mono_sparc_is_virtual_call:
2129  *
2130  *  Determine whenever the instruction at CODE is a virtual call.
2131  */
2132 gboolean
2133 mono_sparc_is_virtual_call (guint32 *code)
2134 {
2135         guint32 buf[1];
2136         guint32 *p;
2137
2138         p = buf;
2139
2140         if ((sparc_inst_op (*code) == 0x2) && (sparc_inst_op3 (*code) == 0x38)) {
2141                 /*
2142                  * Register indirect call. If it is a virtual call, then the
2143                  * instruction in the delay slot is a special kind of nop.
2144                  */
2145
2146                 /* Construct special nop */
2147                 sparc_or_imm (p, FALSE, sparc_g0, 0xca, sparc_g0);
2148                 p --;
2149
2150                 if (code [1] == p [0])
2151                         return TRUE;
2152         }
2153
2154         return FALSE;
2155 }
2156
2157 /*
2158  * mono_arch_get_vcall_slot_addr:
2159  *
2160  *  Determine the vtable slot used by a virtual call.
2161  */
2162 gpointer*
2163 mono_arch_get_vcall_slot_addr (guint8 *code8, gpointer *regs)
2164 {
2165         guint32 *code = (guint32*)(gpointer)code8;
2166         guint32 ins = code [0];
2167         guint32 prev_ins = code [-1];
2168
2169         mono_sparc_flushw ();
2170
2171         if (!mono_sparc_is_virtual_call (code))
2172                 return NULL;
2173
2174         if ((sparc_inst_op (ins) == 0x2) && (sparc_inst_op3 (ins) == 0x38)) {
2175                 if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_i (prev_ins) == 1) && (sparc_inst_op3 (prev_ins) == 0 || sparc_inst_op3 (prev_ins) == 0xb)) {
2176                         /* ld [r1 + CONST ], r2; call r2 */
2177                         guint32 base = sparc_inst_rs1 (prev_ins);
2178                         guint32 disp = sparc_inst_imm13 (prev_ins);
2179                         gpointer base_val;
2180
2181                         g_assert (sparc_inst_rd (prev_ins) == sparc_inst_rs1 (ins));
2182
2183                         g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2184
2185                         base_val = regs [base - sparc_o0];
2186
2187                         return (gpointer)((guint8*)base_val + disp);
2188                 }
2189                 else if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_i (prev_ins) == 0) && (sparc_inst_op3 (prev_ins) == 0)) {
2190                         /* set r1, ICONST; ld [r1 + r2], r2; call r2 */
2191                         /* Decode a sparc_set32 */
2192                         guint32 base = sparc_inst_rs1 (prev_ins);
2193                         guint32 disp;
2194                         gpointer base_val;
2195                         guint32 s1 = code [-3];
2196                         guint32 s2 = code [-2];
2197
2198 #ifdef SPARCV9
2199                         NOT_IMPLEMENTED;
2200 #endif
2201
2202                         /* sparc_sethi */
2203                         g_assert (sparc_inst_op (s1) == 0);
2204                         g_assert (sparc_inst_op2 (s1) == 4);
2205
2206                         /* sparc_or_imm */
2207                         g_assert (sparc_inst_op (s2) == 2);
2208                         g_assert (sparc_inst_op3 (s2) == 2);
2209                         g_assert (sparc_inst_i (s2) == 1);
2210                         g_assert (sparc_inst_rs1 (s2) == sparc_inst_rd (s2));
2211                         g_assert (sparc_inst_rd (s1) == sparc_inst_rs1 (s2));
2212
2213                         disp = ((s1 & 0x3fffff) << 10) | sparc_inst_imm13 (s2);
2214
2215                         g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2216
2217                         base_val = regs [base - sparc_o0];
2218
2219                         return (gpointer)((guint8*)base_val + disp);
2220                 } else
2221                         g_assert_not_reached ();
2222         }
2223         else
2224                 g_assert_not_reached ();
2225
2226         return NULL;
2227 }
2228
2229 /*
2230  * Some conventions used in the following code.
2231  * 2) The only scratch registers we have are o7 and g1.  We try to
2232  * stick to o7 when we can, and use g1 when necessary.
2233  */
2234
2235 void
2236 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2237 {
2238         MonoInst *ins;
2239         MonoCallInst *call;
2240         guint offset;
2241         guint32 *code = (guint32*)(cfg->native_code + cfg->code_len);
2242         MonoInst *last_ins = NULL;
2243         int max_len, cpos;
2244         const char *spec;
2245
2246         if (cfg->opt & MONO_OPT_PEEPHOLE)
2247                 peephole_pass (cfg, bb);
2248
2249         if (cfg->verbose_level > 2)
2250                 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2251
2252         cpos = bb->max_offset;
2253
2254         if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2255                 NOT_IMPLEMENTED;
2256         }
2257
2258         ins = bb->code;
2259         while (ins) {
2260                 guint8* code_start;
2261
2262                 offset = (guint8*)code - cfg->native_code;
2263
2264                 spec = ins_get_spec (ins->opcode);
2265                 /* I kept this, but this looks a workaround for a bug */
2266                 if (spec == MONO_ARCH_CPU_SPEC)
2267                         spec = ins_get_spec (CEE_ADD);
2268
2269                 max_len = ((guint8 *)spec)[MONO_INST_LEN];
2270
2271                 if (offset > (cfg->code_size - max_len - 16)) {
2272                         cfg->code_size *= 2;
2273                         cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2274                         code = (guint32*)(cfg->native_code + offset);
2275                 }
2276                 code_start = (guint8*)code;
2277                 //      if (ins->cil_code)
2278                 //              g_print ("cil code\n");
2279                 mono_debug_record_line_number (cfg, ins, offset);
2280
2281                 switch (ins->opcode) {
2282                 case OP_STOREI1_MEMBASE_IMM:
2283                         EMIT_STORE_MEMBASE_IMM (ins, stb);
2284                         break;
2285                 case OP_STOREI2_MEMBASE_IMM:
2286                         EMIT_STORE_MEMBASE_IMM (ins, sth);
2287                         break;
2288                 case OP_STORE_MEMBASE_IMM:
2289                         EMIT_STORE_MEMBASE_IMM (ins, sti);
2290                         break;
2291                 case OP_STOREI4_MEMBASE_IMM:
2292                         EMIT_STORE_MEMBASE_IMM (ins, st);
2293                         break;
2294                 case OP_STOREI8_MEMBASE_IMM:
2295 #ifdef SPARCV9
2296                         EMIT_STORE_MEMBASE_IMM (ins, stx);
2297 #else
2298                         /* Only generated by peephole opts */
2299                         g_assert ((ins->inst_offset % 8) == 0);
2300                         g_assert (ins->inst_imm == 0);
2301                         EMIT_STORE_MEMBASE_IMM (ins, stx);
2302 #endif
2303                         break;
2304                 case OP_STOREI1_MEMBASE_REG:
2305                         EMIT_STORE_MEMBASE_REG (ins, stb);
2306                         break;
2307                 case OP_STOREI2_MEMBASE_REG:
2308                         EMIT_STORE_MEMBASE_REG (ins, sth);
2309                         break;
2310                 case OP_STOREI4_MEMBASE_REG:
2311                         EMIT_STORE_MEMBASE_REG (ins, st);
2312                         break;
2313                 case OP_STOREI8_MEMBASE_REG:
2314 #ifdef SPARCV9
2315                         EMIT_STORE_MEMBASE_REG (ins, stx);
2316 #else
2317                         /* Only used by OP_MEMSET */
2318                         EMIT_STORE_MEMBASE_REG (ins, std);
2319 #endif
2320                         break;
2321                 case OP_STORE_MEMBASE_REG:
2322                         EMIT_STORE_MEMBASE_REG (ins, sti);
2323                         break;
2324                 case CEE_LDIND_I:
2325 #ifdef SPARCV9
2326                         sparc_ldx (code, ins->inst_c0, sparc_g0, ins->dreg);
2327 #else
2328                         sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2329 #endif
2330                         break;
2331                 case CEE_LDIND_I4:
2332 #ifdef SPARCV9
2333                         sparc_ldsw (code, ins->inst_c0, sparc_g0, ins->dreg);
2334 #else
2335                         sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2336 #endif
2337                         break;
2338                 case CEE_LDIND_U4:
2339                         sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2340                         break;
2341                 case OP_LOADU4_MEM:
2342                         sparc_set (code, ins->inst_c0, ins->dreg);
2343                         sparc_ld (code, ins->dreg, sparc_g0, ins->dreg);
2344                         break;
2345                 case OP_LOADI4_MEMBASE:
2346 #ifdef SPARCV9
2347                         EMIT_LOAD_MEMBASE (ins, ldsw);
2348 #else
2349                         EMIT_LOAD_MEMBASE (ins, ld);
2350 #endif
2351                         break;
2352                 case OP_LOADU4_MEMBASE:
2353                         EMIT_LOAD_MEMBASE (ins, ld);
2354                         break;
2355                 case OP_LOADU1_MEMBASE:
2356                         EMIT_LOAD_MEMBASE (ins, ldub);
2357                         break;
2358                 case OP_LOADI1_MEMBASE:
2359                         EMIT_LOAD_MEMBASE (ins, ldsb);
2360                         break;
2361                 case OP_LOADU2_MEMBASE:
2362                         EMIT_LOAD_MEMBASE (ins, lduh);
2363                         break;
2364                 case OP_LOADI2_MEMBASE:
2365                         EMIT_LOAD_MEMBASE (ins, ldsh);
2366                         break;
2367                 case OP_LOAD_MEMBASE:
2368 #ifdef SPARCV9
2369                                 EMIT_LOAD_MEMBASE (ins, ldx);
2370 #else
2371                                 EMIT_LOAD_MEMBASE (ins, ld);
2372 #endif
2373                         break;
2374 #ifdef SPARCV9
2375                 case OP_LOADI8_MEMBASE:
2376                         EMIT_LOAD_MEMBASE (ins, ldx);
2377                         break;
2378 #endif
2379                 case CEE_CONV_I1:
2380                         sparc_sll_imm (code, ins->sreg1, 24, sparc_o7);
2381                         sparc_sra_imm (code, sparc_o7, 24, ins->dreg);
2382                         break;
2383                 case CEE_CONV_I2:
2384                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2385                         sparc_sra_imm (code, sparc_o7, 16, ins->dreg);
2386                         break;
2387                 case CEE_CONV_U1:
2388                         sparc_and_imm (code, FALSE, ins->sreg1, 0xff, ins->dreg);
2389                         break;
2390                 case CEE_CONV_U2:
2391                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2392                         sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
2393                         break;
2394                 case CEE_CONV_OVF_U4:
2395                         /* Only used on V9 */
2396                         sparc_cmp_imm (code, ins->sreg1, 0);
2397                         mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2398                                                                  MONO_PATCH_INFO_EXC, "OverflowException");
2399                         sparc_branchp (code, 0, sparc_bl, sparc_xcc_short, 0, 0);
2400                         /* Delay slot */
2401                         sparc_set (code, 1, sparc_o7);
2402                         sparc_sllx_imm (code, sparc_o7, 32, sparc_o7);
2403                         sparc_cmp (code, ins->sreg1, sparc_o7);
2404                         mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2405                                                                  MONO_PATCH_INFO_EXC, "OverflowException");
2406                         sparc_branchp (code, 0, sparc_bge, sparc_xcc_short, 0, 0);
2407                         sparc_nop (code);
2408                         sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2409                         break;
2410                 case CEE_CONV_OVF_I4_UN:
2411                         /* Only used on V9 */
2412                         NOT_IMPLEMENTED;
2413                         break;
2414                 case CEE_CONV_U:
2415                 case CEE_CONV_U8:
2416                         /* Only used on V9 */
2417                         sparc_srl_imm (code, ins->sreg1, 0, ins->dreg);
2418                         break;
2419                 case CEE_CONV_I:
2420                 case CEE_CONV_I8:
2421                         /* Only used on V9 */
2422                         sparc_sra_imm (code, ins->sreg1, 0, ins->dreg);
2423                         break;
2424                 case OP_COMPARE:
2425                 case OP_LCOMPARE:
2426                 case OP_ICOMPARE:
2427                         sparc_cmp (code, ins->sreg1, ins->sreg2);
2428                         break;
2429                 case OP_COMPARE_IMM:
2430                 case OP_ICOMPARE_IMM:
2431                         if (sparc_is_imm13 (ins->inst_imm))
2432                                 sparc_cmp_imm (code, ins->sreg1, ins->inst_imm);
2433                         else {
2434                                 sparc_set (code, ins->inst_imm, sparc_o7);
2435                                 sparc_cmp (code, ins->sreg1, sparc_o7);
2436                         }
2437                         break;
2438                 case CEE_BREAK:
2439                         /*
2440                          * gdb does not like encountering 'ta 1' in the debugged code. So
2441                          * instead of emitting a trap, we emit a call a C function and place a
2442                          * breakpoint there.
2443                          */
2444                         //sparc_ta (code, 1);
2445                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, mono_arch_break);
2446                         EMIT_CALL();
2447                         break;
2448                 case OP_ADDCC:
2449                 case OP_IADDCC:
2450                         sparc_add (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2451                         break;
2452                 case CEE_ADD:
2453                 case OP_IADD:
2454                         sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2455                         break;
2456                 case OP_ADDCC_IMM:
2457                 case OP_ADD_IMM:
2458                 case OP_IADD_IMM:
2459                         /* according to inssel-long32.brg, this should set cc */
2460                         EMIT_ALU_IMM (ins, add, TRUE);
2461                         break;
2462                 case OP_ADC:
2463                 case OP_IADC:
2464                         /* according to inssel-long32.brg, this should set cc */
2465                         sparc_addx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2466                         break;
2467                 case OP_ADC_IMM:
2468                 case OP_IADC_IMM:
2469                         EMIT_ALU_IMM (ins, addx, TRUE);
2470                         break;
2471                 case OP_SUBCC:
2472                 case OP_ISUBCC:
2473                         sparc_sub (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2474                         break;
2475                 case CEE_SUB:
2476                 case OP_ISUB:
2477                         sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2478                         break;
2479                 case OP_SUBCC_IMM:
2480                 case OP_SUB_IMM:
2481                 case OP_ISUB_IMM:
2482                         /* according to inssel-long32.brg, this should set cc */
2483                         EMIT_ALU_IMM (ins, sub, TRUE);
2484                         break;
2485                 case OP_SBB:
2486                 case OP_ISBB:
2487                         /* according to inssel-long32.brg, this should set cc */
2488                         sparc_subx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2489                         break;
2490                 case OP_SBB_IMM:
2491                 case OP_ISBB_IMM:
2492                         EMIT_ALU_IMM (ins, subx, TRUE);
2493                         break;
2494                 case CEE_AND:
2495                 case OP_IAND:
2496                         sparc_and (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2497                         break;
2498                 case OP_AND_IMM:
2499                 case OP_IAND_IMM:
2500                         EMIT_ALU_IMM (ins, and, FALSE);
2501                         break;
2502                 case CEE_DIV:
2503                 case OP_IDIV:
2504                         /* Sign extend sreg1 into %y */
2505                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2506                         sparc_wry (code, sparc_o7, sparc_g0);
2507                         sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2508                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2509                         break;
2510                 case CEE_DIV_UN:
2511                 case OP_IDIV_UN:
2512                         sparc_wry (code, sparc_g0, sparc_g0);
2513                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2514                         break;
2515                 case OP_DIV_IMM: {
2516                         int i, imm;
2517
2518                         /* Transform division into a shift */
2519                         for (i = 1; i < 30; ++i) {
2520                                 imm = (1 << i);
2521                                 if (ins->inst_imm == imm)
2522                                         break;
2523                         }
2524                         if (i < 30) {
2525                                 if (i == 1) {
2526                                         /* gcc 2.95.3 */
2527                                         sparc_srl_imm (code, ins->sreg1, 31, sparc_o7);
2528                                         sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2529                                         sparc_sra_imm (code, ins->dreg, 1, ins->dreg);
2530                                 }
2531                                 else {
2532                                         /* http://compilers.iecc.com/comparch/article/93-04-079 */
2533                                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2534                                         sparc_srl_imm (code, sparc_o7, 32 - i, sparc_o7);
2535                                         sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2536                                         sparc_sra_imm (code, ins->dreg, i, ins->dreg);
2537                                 }
2538                         }
2539                         else {
2540                                 /* Sign extend sreg1 into %y */
2541                                 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2542                                 sparc_wry (code, sparc_o7, sparc_g0);
2543                                 EMIT_ALU_IMM (ins, sdiv, TRUE);
2544                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2545                         }
2546                         break;
2547                 }
2548                 case CEE_REM:
2549                 case OP_IREM:
2550                         /* Sign extend sreg1 into %y */
2551                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2552                         sparc_wry (code, sparc_o7, sparc_g0);
2553                         sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, sparc_o7);
2554                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2555                         sparc_smul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2556                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2557                         break;
2558                 case CEE_REM_UN:
2559                 case OP_IREM_UN:
2560                         sparc_wry (code, sparc_g0, sparc_g0);
2561                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2562                         sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2563                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2564                         break;
2565                 case OP_REM_IMM:
2566                 case OP_IREM_IMM:
2567                         /* Sign extend sreg1 into %y */
2568                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2569                         sparc_wry (code, sparc_o7, sparc_g0);
2570                         if (!sparc_is_imm13 (ins->inst_imm)) {
2571                                 sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
2572                                 sparc_sdiv (code, TRUE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
2573                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2574                                 sparc_smul (code, FALSE, sparc_o7, GP_SCRATCH_REG, sparc_o7);
2575                         }
2576                         else {
2577                                 sparc_sdiv_imm (code, TRUE, ins->sreg1, ins->inst_imm, sparc_o7);
2578                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2579                                 sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
2580                         }
2581                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2582                         break;
2583                 case CEE_OR:
2584                 case OP_IOR:
2585                         sparc_or (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2586                         break;
2587                 case OP_OR_IMM:
2588                 case OP_IOR_IMM:
2589                         EMIT_ALU_IMM (ins, or, FALSE);
2590                         break;
2591                 case CEE_XOR:
2592                 case OP_IXOR:
2593                         sparc_xor (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2594                         break;
2595                 case OP_XOR_IMM:
2596                 case OP_IXOR_IMM:
2597                         EMIT_ALU_IMM (ins, xor, FALSE);
2598                         break;
2599                 case CEE_SHL:
2600                 case OP_ISHL:
2601                         sparc_sll (code, ins->sreg1, ins->sreg2, ins->dreg);
2602                         break;
2603                 case OP_SHL_IMM:
2604                 case OP_ISHL_IMM:
2605                         if (ins->inst_imm < (1 << 5))
2606                                 sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2607                         else {
2608                                 sparc_set (code, ins->inst_imm, sparc_o7);
2609                                 sparc_sll (code, ins->sreg1, sparc_o7, ins->dreg);
2610                         }
2611                         break;
2612                 case CEE_SHR:
2613                 case OP_ISHR:
2614                         sparc_sra (code, ins->sreg1, ins->sreg2, ins->dreg);
2615                         break;
2616                 case OP_ISHR_IMM:
2617                 case OP_SHR_IMM:
2618                         if (ins->inst_imm < (1 << 5))
2619                                 sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2620                         else {
2621                                 sparc_set (code, ins->inst_imm, sparc_o7);
2622                                 sparc_sra (code, ins->sreg1, sparc_o7, ins->dreg);
2623                         }
2624                         break;
2625                 case OP_SHR_UN_IMM:
2626                 case OP_ISHR_UN_IMM:
2627                         if (ins->inst_imm < (1 << 5))
2628                                 sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2629                         else {
2630                                 sparc_set (code, ins->inst_imm, sparc_o7);
2631                                 sparc_srl (code, ins->sreg1, sparc_o7, ins->dreg);
2632                         }
2633                         break;
2634                 case CEE_SHR_UN:
2635                 case OP_ISHR_UN:
2636                         sparc_srl (code, ins->sreg1, ins->sreg2, ins->dreg);
2637                         break;
2638                 case OP_LSHL:
2639                         sparc_sllx (code, ins->sreg1, ins->sreg2, ins->dreg);
2640                         break;
2641                 case OP_LSHL_IMM:
2642                         if (ins->inst_imm < (1 << 6))
2643                                 sparc_sllx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2644                         else {
2645                                 sparc_set (code, ins->inst_imm, sparc_o7);
2646                                 sparc_sllx (code, ins->sreg1, sparc_o7, ins->dreg);
2647                         }
2648                         break;
2649                 case OP_LSHR:
2650                         sparc_srax (code, ins->sreg1, ins->sreg2, ins->dreg);
2651                         break;
2652                 case OP_LSHR_IMM:
2653                         if (ins->inst_imm < (1 << 6))
2654                                 sparc_srax_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2655                         else {
2656                                 sparc_set (code, ins->inst_imm, sparc_o7);
2657                                 sparc_srax (code, ins->sreg1, sparc_o7, ins->dreg);
2658                         }
2659                         break;
2660                 case OP_LSHR_UN:
2661                         sparc_srlx (code, ins->sreg1, ins->sreg2, ins->dreg);
2662                         break;
2663                 case OP_LSHR_UN_IMM:
2664                         if (ins->inst_imm < (1 << 6))
2665                                 sparc_srlx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2666                         else {
2667                                 sparc_set (code, ins->inst_imm, sparc_o7);
2668                                 sparc_srlx (code, ins->sreg1, sparc_o7, ins->dreg);
2669                         }
2670                         break;
2671                 case CEE_NOT:
2672                 case OP_INOT:
2673                         /* can't use sparc_not */
2674                         sparc_xnor (code, FALSE, ins->sreg1, sparc_g0, ins->dreg);
2675                         break;
2676                 case CEE_NEG:
2677                 case OP_INEG:
2678                         /* can't use sparc_neg */
2679                         sparc_sub (code, FALSE, sparc_g0, ins->sreg1, ins->dreg);
2680                         break;
2681                 case CEE_MUL:
2682                 case OP_IMUL:
2683                         sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2684                         break;
2685                 case OP_IMUL_IMM:
2686                 case OP_MUL_IMM: {
2687                         int i, imm;
2688
2689                         if ((ins->inst_imm == 1) && (ins->sreg1 == ins->dreg))
2690                                 break;
2691
2692                         /* Transform multiplication into a shift */
2693                         for (i = 0; i < 30; ++i) {
2694                                 imm = (1 << i);
2695                                 if (ins->inst_imm == imm)
2696                                         break;
2697                         }
2698                         if (i < 30)
2699                                 sparc_sll_imm (code, ins->sreg1, i, ins->dreg);
2700                         else
2701                                 EMIT_ALU_IMM (ins, smul, FALSE);
2702                         break;
2703                 }
2704                 case CEE_MUL_OVF:
2705                 case OP_IMUL_OVF:
2706                         sparc_smul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2707                         sparc_rdy (code, sparc_g1);
2708                         sparc_sra_imm (code, ins->dreg, 31, sparc_o7);
2709                         sparc_cmp (code, sparc_g1, sparc_o7);
2710                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2711                         break;
2712                 case CEE_MUL_OVF_UN:
2713                 case OP_IMUL_OVF_UN:
2714                         sparc_umul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2715                         sparc_rdy (code, sparc_o7);
2716                         sparc_cmp (code, sparc_o7, sparc_g0);
2717                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2718                         break;
2719                 case OP_ICONST:
2720                         sparc_set (code, ins->inst_c0, ins->dreg);
2721                         break;
2722                 case OP_I8CONST:
2723                         sparc_set (code, ins->inst_l, ins->dreg);
2724                         break;
2725                 case OP_AOTCONST:
2726                         mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2727                         sparc_set_template (code, ins->dreg);
2728                         break;
2729                 case CEE_CONV_I4:
2730                 case CEE_CONV_U4:
2731                 case OP_MOVE:
2732                         if (ins->sreg1 != ins->dreg)
2733                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2734                         break;
2735                 case OP_SETFREG:
2736                         /* Only used on V9 */
2737                         if (ins->sreg1 != ins->dreg)
2738                                 sparc_fmovd (code, ins->sreg1, ins->dreg);
2739                         break;
2740                 case OP_SPARC_SETFREG_FLOAT:
2741                         /* Only used on V9 */
2742                         sparc_fdtos (code, ins->sreg1, ins->dreg);
2743                         break;
2744                 case CEE_JMP:
2745                         if (cfg->method->save_lmf)
2746                                 NOT_IMPLEMENTED;
2747
2748                         code = emit_load_volatile_arguments (cfg, code);
2749                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2750                         sparc_set_template (code, sparc_o7);
2751                         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_g0);
2752                         /* Restore parent frame in delay slot */
2753                         sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
2754                         break;
2755                 case OP_CHECK_THIS:
2756                         /* ensure ins->sreg1 is not NULL */
2757                         sparc_ld_imm (code, ins->sreg1, 0, sparc_g0);
2758                         break;
2759                 case OP_ARGLIST:
2760                         sparc_add_imm (code, FALSE, sparc_fp, cfg->sig_cookie, sparc_o7);
2761                         sparc_sti_imm (code, sparc_o7, ins->sreg1, 0);
2762                         break;
2763                 case OP_FCALL:
2764                 case OP_LCALL:
2765                 case OP_VCALL:
2766                 case OP_VOIDCALL:
2767                 case CEE_CALL:
2768                         call = (MonoCallInst*)ins;
2769                         g_assert (!call->virtual);
2770                         code = emit_save_sp_to_lmf (cfg, code);
2771                         if (ins->flags & MONO_INST_HAS_METHOD)
2772                             code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2773                         else
2774                             code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2775
2776                         code = emit_vret_token (ins, code);
2777                         code = emit_move_return_value (ins, code);
2778                         break;
2779                 case OP_FCALL_REG:
2780                 case OP_LCALL_REG:
2781                 case OP_VCALL_REG:
2782                 case OP_VOIDCALL_REG:
2783                 case OP_CALL_REG:
2784                         call = (MonoCallInst*)ins;
2785                         code = emit_save_sp_to_lmf (cfg, code);
2786                         sparc_jmpl (code, ins->sreg1, sparc_g0, sparc_callsite);
2787                         /*
2788                          * We emit a special kind of nop in the delay slot to tell the
2789                          * trampoline code that this is a virtual call, thus an unbox
2790                          * trampoline might need to be called.
2791                          */
2792                         if (call->virtual)
2793                                 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2794                         else
2795                                 sparc_nop (code);
2796
2797                         code = emit_vret_token (ins, code);
2798                         code = emit_move_return_value (ins, code);
2799                         break;
2800                 case OP_FCALL_MEMBASE:
2801                 case OP_LCALL_MEMBASE:
2802                 case OP_VCALL_MEMBASE:
2803                 case OP_VOIDCALL_MEMBASE:
2804                 case OP_CALL_MEMBASE:
2805                         call = (MonoCallInst*)ins;
2806                         code = emit_save_sp_to_lmf (cfg, code);
2807                         if (sparc_is_imm13 (ins->inst_offset)) {
2808                                 sparc_ldi_imm (code, ins->inst_basereg, ins->inst_offset, sparc_o7);
2809                         } else {
2810                                 sparc_set (code, ins->inst_offset, sparc_o7);
2811                                 sparc_ldi (code, ins->inst_basereg, sparc_o7, sparc_o7);
2812                         }
2813                         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_callsite);
2814                         if (call->virtual)
2815                                 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2816                         else
2817                                 sparc_nop (code);
2818
2819                         code = emit_vret_token (ins, code);
2820                         code = emit_move_return_value (ins, code);
2821                         break;
2822                 case OP_SETFRET:
2823                         if (mono_method_signature (cfg->method)->ret->type == MONO_TYPE_R4)
2824                                 sparc_fdtos (code, ins->sreg1, sparc_f0);
2825                         else {
2826 #ifdef SPARCV9
2827                                 sparc_fmovd (code, ins->sreg1, ins->dreg);
2828 #else
2829                                 /* FIXME: Why not use fmovd ? */
2830                                 sparc_fmovs (code, ins->sreg1, ins->dreg);
2831                                 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2832 #endif
2833                         }
2834                         break;
2835                 case OP_OUTARG:
2836                         g_assert_not_reached ();
2837                         break;
2838                 case OP_LOCALLOC: {
2839                         guint32 size_reg;
2840
2841 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2842                         /* Perform stack touching */
2843                         NOT_IMPLEMENTED;
2844 #endif
2845
2846                         /* Keep alignment */
2847                         sparc_add_imm (code, FALSE, ins->sreg1, MONO_ARCH_LOCALLOC_ALIGNMENT - 1, ins->dreg);
2848                         sparc_set (code, ~(MONO_ARCH_LOCALLOC_ALIGNMENT - 1), sparc_o7);
2849                         sparc_and (code, FALSE, ins->dreg, sparc_o7, ins->dreg);
2850
2851                         if ((ins->flags & MONO_INST_INIT) && (ins->sreg1 == ins->dreg)) {
2852 #ifdef SPARCV9
2853                                 size_reg = sparc_g4;
2854 #else
2855                                 size_reg = sparc_g1;
2856 #endif
2857                                 sparc_mov_reg_reg (code, ins->dreg, size_reg);
2858                         }
2859                         else
2860                                 size_reg = ins->sreg1;
2861
2862                         sparc_sub (code, FALSE, sparc_sp, ins->dreg, ins->dreg);
2863                         /* Keep %sp valid at all times */
2864                         sparc_mov_reg_reg (code, ins->dreg, sparc_sp);
2865                         g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
2866                         sparc_add_imm (code, FALSE, ins->dreg, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
2867
2868                         if (ins->flags & MONO_INST_INIT) {
2869                                 guint32 *br [3];
2870                                 /* Initialize memory region */
2871                                 sparc_cmp_imm (code, size_reg, 0);
2872                                 br [0] = code;
2873                                 sparc_branch (code, 0, sparc_be, 0);
2874                                 /* delay slot */
2875                                 sparc_set (code, 0, sparc_o7);
2876                                 sparc_sub_imm (code, 0, size_reg, sparcv9 ? 8 : 4, size_reg);
2877                                 /* start of loop */
2878                                 br [1] = code;
2879                                 if (sparcv9)
2880                                         sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
2881                                 else
2882                                         sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
2883                                 sparc_cmp (code, sparc_o7, size_reg);
2884                                 br [2] = code;
2885                                 sparc_branch (code, 0, sparc_bl, 0);
2886                                 sparc_patch (br [2], br [1]);
2887                                 /* delay slot */
2888                                 sparc_add_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2889                                 sparc_patch (br [0], code);
2890                         }
2891                         break;
2892                 }
2893                 case OP_SPARC_LOCALLOC_IMM: {
2894                         gint32 offset = ins->inst_c0;
2895
2896 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2897                         /* Perform stack touching */
2898                         NOT_IMPLEMENTED;
2899 #endif
2900
2901                         offset = ALIGN_TO (offset, MONO_ARCH_LOCALLOC_ALIGNMENT);
2902                         if (sparc_is_imm13 (offset))
2903                                 sparc_sub_imm (code, FALSE, sparc_sp, offset, sparc_sp);
2904                         else {
2905                                 sparc_set (code, offset, sparc_o7);
2906                                 sparc_sub (code, FALSE, sparc_sp, sparc_o7, sparc_sp);
2907                         }
2908                         g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
2909                         sparc_add_imm (code, FALSE, sparc_sp, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
2910                         if ((ins->flags & MONO_INST_INIT) && (offset > 0)) {
2911                                 guint32 *br [2];
2912                                 int i;
2913
2914                                 if (offset <= 16) {
2915                                         i = 0;
2916                                         while (i < offset) {
2917                                                 if (sparcv9) {
2918                                                         sparc_stx_imm (code, sparc_g0, ins->dreg, i);
2919                                                         i += 8;
2920                                                 }
2921                                                 else {
2922                                                         sparc_st_imm (code, sparc_g0, ins->dreg, i);
2923                                                         i += 4;
2924                                                 }
2925                                         }
2926                                 }
2927                                 else {
2928                                         sparc_set (code, offset, sparc_o7);
2929                                         sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2930                                         /* beginning of loop */
2931                                         br [0] = code;
2932                                         if (sparcv9)
2933                                                 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
2934                                         else
2935                                                 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
2936                                         sparc_cmp_imm (code, sparc_o7, 0);
2937                                         br [1] = code;
2938                                         sparc_branch (code, 0, sparc_bne, 0);
2939                                         /* delay slot */
2940                                         sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2941                                         sparc_patch (br [1], br [0]);
2942                                 }
2943                         }
2944                         break;
2945                 }
2946                 case CEE_RET:
2947                         /* The return is done in the epilog */
2948                         g_assert_not_reached ();
2949                         break;
2950                 case CEE_THROW:
2951                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2952                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2953                                              (gpointer)"mono_arch_throw_exception");
2954                         EMIT_CALL ();
2955                         break;
2956                 case OP_RETHROW:
2957                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2958                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2959                                              (gpointer)"mono_arch_rethrow_exception");
2960                         EMIT_CALL ();
2961                         break;
2962                 case OP_START_HANDLER: {
2963                         /*
2964                          * The START_HANDLER instruction marks the beginning of a handler
2965                          * block. It is called using a call instruction, so %o7 contains
2966                          * the return address. Since the handler executes in the same stack
2967              * frame as the method itself, we can't use save/restore to save
2968                          * the return address. Instead, we save it into a dedicated
2969                          * variable.
2970                          */
2971                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2972                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2973                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
2974                                 sparc_sti (code, sparc_o7, spvar->inst_basereg, GP_SCRATCH_REG);
2975                         }
2976                         else
2977                                 sparc_sti_imm (code, sparc_o7, spvar->inst_basereg, spvar->inst_offset);
2978                         break;
2979                 }
2980                 case OP_ENDFILTER: {
2981                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2982                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2983                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
2984                                 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
2985                         }
2986                         else
2987                                 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
2988                         sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
2989                         /* Delay slot */
2990                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2991                         break;
2992                 }
2993                 case CEE_ENDFINALLY: {
2994                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2995                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2996                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
2997                                 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
2998                         }
2999                         else
3000                                 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3001                         sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3002                         sparc_nop (code);
3003                         break;
3004                 }
3005                 case OP_CALL_HANDLER:
3006                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3007                         /* This is a jump inside the method, so call_simple works even on V9 */
3008                         sparc_call_simple (code, 0);
3009                         sparc_nop (code);
3010                         break;
3011                 case OP_LABEL:
3012                         ins->inst_c0 = (guint8*)code - cfg->native_code;
3013                         break;
3014                 case CEE_BR:
3015                         //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
3016                         if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
3017                                 break;
3018                         if (ins->flags & MONO_INST_BRLABEL) {
3019                                 if (ins->inst_i0->inst_c0) {
3020                                         gint32 disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2;
3021                                         g_assert (sparc_is_imm22 (disp));
3022                                         sparc_branch (code, 1, sparc_ba, disp);
3023                                 } else {
3024                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
3025                                         sparc_branch (code, 1, sparc_ba, 0);
3026                                 }
3027                         } else {
3028                                 if (ins->inst_target_bb->native_offset) {
3029                                         gint32 disp = (ins->inst_target_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2;
3030                                         g_assert (sparc_is_imm22 (disp));
3031                                         sparc_branch (code, 1, sparc_ba, disp);
3032                                 } else {
3033                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3034                                         sparc_branch (code, 1, sparc_ba, 0);
3035                                 }
3036                         }
3037                         sparc_nop (code);
3038                         break;
3039                 case OP_BR_REG:
3040                         sparc_jmp (code, ins->sreg1, sparc_g0);
3041                         sparc_nop (code);
3042                         break;
3043                 case OP_CEQ:
3044                 case OP_CLT:
3045                 case OP_CLT_UN:
3046                 case OP_CGT:
3047                 case OP_CGT_UN:
3048                         if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3049                                 sparc_clr_reg (code, ins->dreg);
3050                                 sparc_movcc_imm (code, sparc_xcc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3051                         }
3052                         else {
3053                                 sparc_clr_reg (code, ins->dreg);
3054 #ifdef SPARCV9
3055                                 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), DEFAULT_ICC, 0, 2);
3056 #else
3057                                 sparc_branch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3058 #endif
3059                                 /* delay slot */
3060                                 sparc_set (code, 1, ins->dreg);
3061                         }
3062                         break;
3063                 case OP_ICEQ:
3064                 case OP_ICLT:
3065                 case OP_ICLT_UN:
3066                 case OP_ICGT:
3067                 case OP_ICGT_UN:
3068                     if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3069                                 sparc_clr_reg (code, ins->dreg);
3070                                 sparc_movcc_imm (code, sparc_icc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3071                     }
3072                     else {
3073                         sparc_clr_reg (code, ins->dreg);
3074                         sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), sparc_icc_short, 0, 2);
3075                         /* delay slot */
3076                         sparc_set (code, 1, ins->dreg);
3077                     }
3078                     break;
3079                 case OP_COND_EXC_EQ:
3080                 case OP_COND_EXC_NE_UN:
3081                 case OP_COND_EXC_LT:
3082                 case OP_COND_EXC_LT_UN:
3083                 case OP_COND_EXC_GT:
3084                 case OP_COND_EXC_GT_UN:
3085                 case OP_COND_EXC_GE:
3086                 case OP_COND_EXC_GE_UN:
3087                 case OP_COND_EXC_LE:
3088                 case OP_COND_EXC_LE_UN:
3089                 case OP_COND_EXC_OV:
3090                 case OP_COND_EXC_NO:
3091                 case OP_COND_EXC_C:
3092                 case OP_COND_EXC_NC:
3093                         EMIT_COND_SYSTEM_EXCEPTION (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1);
3094                         break;
3095                 case OP_SPARC_COND_EXC_EQZ:
3096                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brz, ins->inst_p1);
3097                         break;
3098                 case OP_SPARC_COND_EXC_GEZ:
3099                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgez, ins->inst_p1);
3100                         break;
3101                 case OP_SPARC_COND_EXC_GTZ:
3102                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgz, ins->inst_p1);
3103                         break;
3104                 case OP_SPARC_COND_EXC_LEZ:
3105                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlez, ins->inst_p1);
3106                         break;
3107                 case OP_SPARC_COND_EXC_LTZ:
3108                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlz, ins->inst_p1);
3109                         break;
3110                 case OP_SPARC_COND_EXC_NEZ:
3111                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brnz, ins->inst_p1);
3112                         break;
3113                 case OP_COND_EXC_IOV:
3114                 case OP_COND_EXC_IC:
3115                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1, TRUE, sparc_icc_short);
3116                         break;
3117                 case CEE_BEQ:
3118                 case CEE_BNE_UN:
3119                 case CEE_BLT:
3120                 case CEE_BLT_UN:
3121                 case CEE_BGT:
3122                 case CEE_BGT_UN:
3123                 case CEE_BGE:
3124                 case CEE_BGE_UN:
3125                 case CEE_BLE:
3126                 case CEE_BLE_UN: {
3127                         if (sparcv9)
3128                                 EMIT_COND_BRANCH_PREDICTED (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3129                         else
3130                                 EMIT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3131                         break;
3132                 }
3133
3134                 case OP_IBEQ:
3135                 case OP_IBNE_UN:
3136                 case OP_IBLT:
3137                 case OP_IBLT_UN:
3138                 case OP_IBGT:
3139                 case OP_IBGT_UN:
3140                 case OP_IBGE:
3141                 case OP_IBGE_UN:
3142                 case OP_IBLE:
3143                 case OP_IBLE_UN: {
3144                         /* Only used on V9 */
3145                         EMIT_COND_BRANCH_ICC (ins, opcode_to_sparc_cond (ins->opcode), 1, 1, sparc_icc_short);
3146                         break;
3147                 }
3148
3149                 case OP_SPARC_BRZ:
3150                         EMIT_COND_BRANCH_BPR (ins, brz, 1, 1, 1);
3151                         break;
3152                 case OP_SPARC_BRLEZ:
3153                         EMIT_COND_BRANCH_BPR (ins, brlez, 1, 1, 1);
3154                         break;
3155                 case OP_SPARC_BRLZ:
3156                         EMIT_COND_BRANCH_BPR (ins, brlz, 1, 1, 1);
3157                         break;
3158                 case OP_SPARC_BRNZ:
3159                         EMIT_COND_BRANCH_BPR (ins, brnz, 1, 1, 1);
3160                         break;
3161                 case OP_SPARC_BRGZ:
3162                         EMIT_COND_BRANCH_BPR (ins, brgz, 1, 1, 1);
3163                         break;
3164                 case OP_SPARC_BRGEZ:
3165                         EMIT_COND_BRANCH_BPR (ins, brgez, 1, 1, 1);
3166                         break;
3167
3168                 /* floating point opcodes */
3169                 case OP_R8CONST:
3170                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
3171 #ifdef SPARCV9
3172                         sparc_set_template (code, sparc_o7);
3173 #else
3174                         sparc_sethi (code, 0, sparc_o7);
3175 #endif
3176                         sparc_lddf_imm (code, sparc_o7, 0, ins->dreg);
3177                         break;
3178                 case OP_R4CONST:
3179                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
3180 #ifdef SPARCV9
3181                         sparc_set_template (code, sparc_o7);
3182 #else
3183                         sparc_sethi (code, 0, sparc_o7);
3184 #endif
3185                         sparc_ldf_imm (code, sparc_o7, 0, FP_SCRATCH_REG);
3186
3187                         /* Extend to double */
3188                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3189                         break;
3190                 case OP_STORER8_MEMBASE_REG:
3191                         if (!sparc_is_imm13 (ins->inst_offset + 4)) {
3192                                 sparc_set (code, ins->inst_offset, sparc_o7);
3193                                 /* SPARCV9 handles misaligned fp loads/stores */
3194                                 if (!v64 && (ins->inst_offset % 8)) {
3195                                         /* Misaligned */
3196                                         sparc_add (code, FALSE, ins->inst_destbasereg, sparc_o7, sparc_o7);
3197                                         sparc_stf (code, ins->sreg1, sparc_o7, sparc_g0);
3198                                         sparc_stf_imm (code, ins->sreg1 + 1, sparc_o7, 4);
3199                                 } else
3200                                         sparc_stdf (code, ins->sreg1, ins->inst_destbasereg, sparc_o7);
3201                         }
3202                         else {
3203                                 if (!v64 && (ins->inst_offset % 8)) {
3204                                         /* Misaligned */
3205                                         sparc_stf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3206                                         sparc_stf_imm (code, ins->sreg1 + 1, ins->inst_destbasereg, ins->inst_offset + 4);
3207                                 } else
3208                                         sparc_stdf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3209                         }
3210                         break;
3211                 case OP_LOADR8_MEMBASE:
3212                         EMIT_LOAD_MEMBASE (ins, lddf);
3213                         break;
3214                 case OP_STORER4_MEMBASE_REG:
3215                         /* This requires a double->single conversion */
3216                         sparc_fdtos (code, ins->sreg1, FP_SCRATCH_REG);
3217                         if (!sparc_is_imm13 (ins->inst_offset)) {
3218                                 sparc_set (code, ins->inst_offset, sparc_o7);
3219                                 sparc_stf (code, FP_SCRATCH_REG, ins->inst_destbasereg, sparc_o7);
3220                         }
3221                         else
3222                                 sparc_stf_imm (code, FP_SCRATCH_REG, ins->inst_destbasereg, ins->inst_offset);
3223                         break;
3224                 case OP_LOADR4_MEMBASE: {
3225                         /* ldf needs a single precision register */
3226                         int dreg = ins->dreg;
3227                         ins->dreg = FP_SCRATCH_REG;
3228                         EMIT_LOAD_MEMBASE (ins, ldf);
3229                         ins->dreg = dreg;
3230                         /* Extend to double */
3231                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3232                         break;
3233                 }
3234                 case OP_FMOVE:
3235 #ifdef SPARCV9
3236                         sparc_fmovd (code, ins->sreg1, ins->dreg);
3237 #else
3238                         sparc_fmovs (code, ins->sreg1, ins->dreg);
3239                         sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3240 #endif
3241                         break;
3242                 case CEE_CONV_R4: {
3243                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3244 #ifdef SPARCV9
3245                         if (!sparc_is_imm13 (offset)) {
3246                                 sparc_set (code, offset, sparc_o7);
3247                                 sparc_stx (code, ins->sreg1, sparc_sp, offset);
3248                                 sparc_lddf (code, sparc_sp, offset, FP_SCRATCH_REG);
3249                         } else {
3250                                 sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3251                                 sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3252                         }
3253                         sparc_fxtos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3254 #else
3255                         if (!sparc_is_imm13 (offset)) {
3256                                 sparc_set (code, offset, sparc_o7);
3257                                 sparc_st (code, ins->sreg1, sparc_sp, sparc_o7);
3258                                 sparc_ldf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3259                         } else {
3260                                 sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3261                                 sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3262                         }
3263                         sparc_fitos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3264 #endif
3265                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3266                         break;
3267                 }
3268                 case CEE_CONV_R8: {
3269                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3270 #ifdef SPARCV9
3271                         if (!sparc_is_imm13 (offset)) {
3272                                 sparc_set (code, offset, sparc_o7);
3273                                 sparc_stx (code, ins->sreg1, sparc_sp, sparc_o7);
3274                                 sparc_lddf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3275                         } else {
3276                                 sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3277                                 sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3278                         }
3279                         sparc_fxtod (code, FP_SCRATCH_REG, ins->dreg);
3280 #else
3281                         if (!sparc_is_imm13 (offset)) {
3282                                 sparc_set (code, offset, sparc_o7);
3283                                 sparc_st (code, ins->sreg1, sparc_sp, sparc_o7);
3284                                 sparc_ldf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3285                         } else {
3286                                 sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3287                                 sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3288                         }
3289                         sparc_fitod (code, FP_SCRATCH_REG, ins->dreg);
3290 #endif
3291                         break;
3292                 }
3293                 case OP_FCONV_TO_I1:
3294                 case OP_FCONV_TO_U1:
3295                 case OP_FCONV_TO_I2:
3296                 case OP_FCONV_TO_U2:
3297 #ifndef SPARCV9
3298                 case OP_FCONV_TO_I:
3299                 case OP_FCONV_TO_U:
3300 #endif
3301                 case OP_FCONV_TO_I4:
3302                 case OP_FCONV_TO_U4: {
3303                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3304                         sparc_fdtoi (code, ins->sreg1, FP_SCRATCH_REG);
3305                         if (!sparc_is_imm13 (offset)) {
3306                                 sparc_set (code, offset, sparc_o7);
3307                                 sparc_stdf (code, FP_SCRATCH_REG, sparc_sp, sparc_o7);
3308                                 sparc_ld (code, sparc_sp, sparc_o7, ins->dreg);
3309                         } else {
3310                                 sparc_stdf_imm (code, FP_SCRATCH_REG, sparc_sp, offset);
3311                                 sparc_ld_imm (code, sparc_sp, offset, ins->dreg);
3312                         }
3313
3314                         switch (ins->opcode) {
3315                         case OP_FCONV_TO_I1:
3316                         case OP_FCONV_TO_U1:
3317                                 sparc_and_imm (code, 0, ins->dreg, 0xff, ins->dreg);
3318                                 break;
3319                         case OP_FCONV_TO_I2:
3320                         case OP_FCONV_TO_U2:
3321                                 sparc_set (code, 0xffff, sparc_o7);
3322                                 sparc_and (code, 0, ins->dreg, sparc_o7, ins->dreg);
3323                                 break;
3324                         default:
3325                                 break;
3326                         }
3327                         break;
3328                 }
3329                 case OP_FCONV_TO_I8:
3330                 case OP_FCONV_TO_U8:
3331                         /* Emulated */
3332                         g_assert_not_reached ();
3333                         break;
3334                 case CEE_CONV_R_UN:
3335                         /* Emulated */
3336                         g_assert_not_reached ();
3337                         break;
3338                 case OP_LCONV_TO_R_UN: {
3339                         /* Emulated */
3340                         g_assert_not_reached ();
3341                         break;
3342                 }
3343                 case OP_LCONV_TO_OVF_I: {
3344                         guint32 *br [3], *label [1];
3345
3346                         /*
3347                          * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3348                          */
3349                         sparc_cmp_imm (code, ins->sreg1, 0);
3350                         br [0] = code;
3351                         sparc_branch (code, 1, sparc_bneg, 0);
3352                         sparc_nop (code);
3353
3354                         /* positive */
3355                         /* ms word must be 0 */
3356                         sparc_cmp_imm (code, ins->sreg2, 0);
3357                         br [1] = code;
3358                         sparc_branch (code, 1, sparc_be, 0);
3359                         sparc_nop (code);
3360
3361                         label [0] = code;
3362
3363                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_ba, "OverflowException");
3364
3365                         /* negative */
3366                         sparc_patch (br [0], code);
3367
3368                         /* ms word must 0xfffffff */
3369                         sparc_cmp_imm (code, ins->sreg2, -1);
3370                         br [2] = code;
3371                         sparc_branch (code, 1, sparc_bne, 0);
3372                         sparc_nop (code);
3373                         sparc_patch (br [2], label [0]);
3374
3375                         /* Ok */
3376                         sparc_patch (br [1], code);
3377                         if (ins->sreg1 != ins->dreg)
3378                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
3379                         break;
3380                 }
3381                 case OP_FADD:
3382                         sparc_faddd (code, ins->sreg1, ins->sreg2, ins->dreg);
3383                         break;
3384                 case OP_FSUB:
3385                         sparc_fsubd (code, ins->sreg1, ins->sreg2, ins->dreg);
3386                         break;
3387                 case OP_FMUL:
3388                         sparc_fmuld (code, ins->sreg1, ins->sreg2, ins->dreg);
3389                         break;
3390                 case OP_FDIV:
3391                         sparc_fdivd (code, ins->sreg1, ins->sreg2, ins->dreg);
3392                         break;
3393                 case OP_FNEG:
3394 #ifdef SPARCV9
3395                         sparc_fnegd (code, ins->sreg1, ins->dreg);
3396 #else
3397                         /* FIXME: why don't use fnegd ? */
3398                         sparc_fnegs (code, ins->sreg1, ins->dreg);
3399 #endif
3400                         break;
3401                 case OP_FREM:
3402                         sparc_fdivd (code, ins->sreg1, ins->sreg2, FP_SCRATCH_REG);
3403                         sparc_fmuld (code, ins->sreg2, FP_SCRATCH_REG, FP_SCRATCH_REG);
3404                         sparc_fsubd (code, ins->sreg1, FP_SCRATCH_REG, ins->dreg);
3405                         break;
3406                 case OP_FCOMPARE:
3407                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3408                         break;
3409                 case OP_FCEQ:
3410                 case OP_FCLT:
3411                 case OP_FCLT_UN:
3412                 case OP_FCGT:
3413                 case OP_FCGT_UN:
3414                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3415                         sparc_clr_reg (code, ins->dreg);
3416                         switch (ins->opcode) {
3417                         case OP_FCLT_UN:
3418                         case OP_FCGT_UN:
3419                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 4);
3420                                 /* delay slot */
3421                                 sparc_set (code, 1, ins->dreg);
3422                                 sparc_fbranch (code, 1, sparc_fbu, 2);
3423                                 /* delay slot */
3424                                 sparc_set (code, 1, ins->dreg);
3425                                 break;
3426                         default:
3427                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3428                                 /* delay slot */
3429                                 sparc_set (code, 1, ins->dreg);
3430                         }
3431                         break;
3432                 case OP_FBEQ:
3433                 case OP_FBLT:
3434                 case OP_FBGT:
3435                         EMIT_FLOAT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3436                         break;
3437                 case OP_FBGE: {
3438                         /* clt.un + brfalse */
3439                         guint32 *p = code;
3440                         sparc_fbranch (code, 1, sparc_fbul, 0);
3441                         /* delay slot */
3442                         sparc_nop (code);
3443                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3444                         sparc_patch (p, (guint8*)code);
3445                         break;
3446                 }
3447                 case OP_FBLE: {
3448                         /* cgt.un + brfalse */
3449                         guint32 *p = code;
3450                         sparc_fbranch (code, 1, sparc_fbug, 0);
3451                         /* delay slot */
3452                         sparc_nop (code);
3453                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3454                         sparc_patch (p, (guint8*)code);
3455                         break;
3456                 }
3457                 case OP_FBNE_UN:
3458                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbne, 1, 1);
3459                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3460                         break;
3461                 case OP_FBLT_UN:
3462                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbl, 1, 1);
3463                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3464                         break;
3465                 case OP_FBGT_UN:
3466                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbg, 1, 1);
3467                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3468                         break;
3469                 case OP_FBGE_UN:
3470                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbge, 1, 1);
3471                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3472                         break;
3473                 case OP_FBLE_UN:
3474                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fble, 1, 1);
3475                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3476                         break;
3477                 case CEE_CKFINITE: {
3478                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3479                         if (!sparc_is_imm13 (offset)) {
3480                                 sparc_set (code, offset, sparc_o7);
3481                                 sparc_stdf (code, ins->sreg1, sparc_sp, sparc_o7);
3482                                 sparc_lduh (code, sparc_sp, sparc_o7, sparc_o7);
3483                         } else {
3484                                 sparc_stdf_imm (code, ins->sreg1, sparc_sp, offset);
3485                                 sparc_lduh_imm (code, sparc_sp, offset, sparc_o7);
3486                         }
3487                         sparc_srl_imm (code, sparc_o7, 4, sparc_o7);
3488                         sparc_and_imm (code, FALSE, sparc_o7, 2047, sparc_o7);
3489                         sparc_cmp_imm (code, sparc_o7, 2047);
3490                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_be, "ArithmeticException");
3491 #ifdef SPARCV9
3492                         sparc_fmovd (code, ins->sreg1, ins->dreg);
3493 #else
3494                         sparc_fmovs (code, ins->sreg1, ins->dreg);
3495                         sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3496 #endif
3497                         break;
3498                 }
3499
3500                 case OP_MEMORY_BARRIER:
3501                         sparc_membar (code, sparc_membar_all);
3502                         break;
3503
3504                 default:
3505 #ifdef __GNUC__
3506                         g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
3507 #else
3508                         g_warning ("%s:%d: unknown opcode %s\n", __FILE__, __LINE__, mono_inst_name (ins->opcode));
3509 #endif
3510                         g_assert_not_reached ();
3511                 }
3512
3513                 if ((((guint8*)code) - code_start) > max_len) {
3514                         g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3515                                    mono_inst_name (ins->opcode), max_len, ((guint8*)code) - code_start);
3516                         g_assert_not_reached ();
3517                 }
3518
3519                 cpos += max_len;
3520
3521                 last_ins = ins;
3522
3523                 ins = ins->next;
3524         }
3525
3526         cfg->code_len = (guint8*)code - cfg->native_code;
3527 }
3528
3529 void
3530 mono_arch_register_lowlevel_calls (void)
3531 {
3532         mono_register_jit_icall (mono_arch_break, "mono_arch_break", NULL, TRUE);
3533         mono_register_jit_icall (mono_arch_get_lmf_addr, "mono_arch_get_lmf_addr", NULL, TRUE);
3534 }
3535
3536 void
3537 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3538 {
3539         MonoJumpInfo *patch_info;
3540
3541         /* FIXME: Move part of this to arch independent code */
3542         for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3543                 unsigned char *ip = patch_info->ip.i + code;
3544                 gpointer target;
3545
3546                 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3547
3548                 switch (patch_info->type) {
3549                 case MONO_PATCH_INFO_NONE:
3550                         continue;
3551                 case MONO_PATCH_INFO_CLASS_INIT: {
3552                         guint32 *ip2 = (guint32*)ip;
3553                         /* Might already been changed to a nop */
3554 #ifdef SPARCV9
3555                         sparc_set_template (ip2, sparc_o7);
3556                         sparc_jmpl (ip2, sparc_o7, sparc_g0, sparc_o7);
3557 #else
3558                         sparc_call_simple (ip2, 0);
3559 #endif
3560                         break;
3561                 }
3562                 case MONO_PATCH_INFO_METHOD_JUMP: {
3563                         guint32 *ip2 = (guint32*)ip;
3564                         /* Might already been patched */
3565                         sparc_set_template (ip2, sparc_o7);
3566                         break;
3567                 }
3568                 default:
3569                         break;
3570                 }
3571                 sparc_patch ((guint32*)ip, target);
3572         }
3573 }
3574
3575 void*
3576 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3577 {
3578         int i;
3579         guint32 *code = (guint32*)p;
3580         MonoMethodSignature *sig = mono_method_signature (cfg->method);
3581         CallInfo *cinfo;
3582
3583         /* Save registers to stack */
3584         for (i = 0; i < 6; ++i)
3585                 sparc_sti_imm (code, sparc_i0 + i, sparc_fp, ARGS_OFFSET + (i * sizeof (gpointer)));
3586
3587         cinfo = get_call_info (sig, FALSE);
3588
3589         /* Save float regs on V9, since they are caller saved */
3590         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3591                 ArgInfo *ainfo = cinfo->args + i;
3592                 gint32 stack_offset;
3593
3594                 stack_offset = ainfo->offset + ARGS_OFFSET;
3595
3596                 if (ainfo->storage == ArgInFloatReg) {
3597                         if (!sparc_is_imm13 (stack_offset))
3598                                 NOT_IMPLEMENTED;
3599                         sparc_stf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3600                 }
3601                 else if (ainfo->storage == ArgInDoubleReg) {
3602                         /* The offset is guaranteed to be aligned by the ABI rules */
3603                         sparc_stdf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3604                 }
3605         }
3606
3607         sparc_set (code, cfg->method, sparc_o0);
3608         sparc_add_imm (code, FALSE, sparc_fp, MONO_SPARC_STACK_BIAS, sparc_o1);
3609
3610         mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
3611         EMIT_CALL ();
3612
3613         /* Restore float regs on V9 */
3614         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3615                 ArgInfo *ainfo = cinfo->args + i;
3616                 gint32 stack_offset;
3617
3618                 stack_offset = ainfo->offset + ARGS_OFFSET;
3619
3620                 if (ainfo->storage == ArgInFloatReg) {
3621                         if (!sparc_is_imm13 (stack_offset))
3622                                 NOT_IMPLEMENTED;
3623                         sparc_ldf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3624                 }
3625                 else if (ainfo->storage == ArgInDoubleReg) {
3626                         /* The offset is guaranteed to be aligned by the ABI rules */
3627                         sparc_lddf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3628                 }
3629         }
3630
3631         g_free (cinfo);
3632
3633         return code;
3634 }
3635
3636 enum {
3637         SAVE_NONE,
3638         SAVE_STRUCT,
3639         SAVE_ONE,
3640         SAVE_TWO,
3641         SAVE_FP
3642 };
3643
3644 void*
3645 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3646 {
3647         guint32 *code = (guint32*)p;
3648         int save_mode = SAVE_NONE;
3649         MonoMethod *method = cfg->method;
3650
3651         switch (mono_type_get_underlying_type (mono_method_signature (method)->ret)->type) {
3652         case MONO_TYPE_VOID:
3653                 /* special case string .ctor icall */
3654                 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
3655                         save_mode = SAVE_ONE;
3656                 else
3657                         save_mode = SAVE_NONE;
3658                 break;
3659         case MONO_TYPE_I8:
3660         case MONO_TYPE_U8:
3661 #ifdef SPARCV9
3662                 save_mode = SAVE_ONE;
3663 #else
3664                 save_mode = SAVE_TWO;
3665 #endif
3666                 break;
3667         case MONO_TYPE_R4:
3668         case MONO_TYPE_R8:
3669                 save_mode = SAVE_FP;
3670                 break;
3671         case MONO_TYPE_VALUETYPE:
3672                 save_mode = SAVE_STRUCT;
3673                 break;
3674         default:
3675                 save_mode = SAVE_ONE;
3676                 break;
3677         }
3678
3679         /* Save the result to the stack and also put it into the output registers */
3680
3681         switch (save_mode) {
3682         case SAVE_TWO:
3683                 /* V8 only */
3684                 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
3685                 sparc_st_imm (code, sparc_i0, sparc_fp, 72);
3686                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3687                 sparc_mov_reg_reg (code, sparc_i1, sparc_o2);
3688                 break;
3689         case SAVE_ONE:
3690                 sparc_sti_imm (code, sparc_i0, sparc_fp, ARGS_OFFSET);
3691                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3692                 break;
3693         case SAVE_FP:
3694 #ifdef SPARCV9
3695                 sparc_stdf_imm (code, sparc_f0, sparc_fp, ARGS_OFFSET);
3696 #else
3697                 sparc_stdf_imm (code, sparc_f0, sparc_fp, 72);
3698                 sparc_ld_imm (code, sparc_fp, 72, sparc_o1);
3699                 sparc_ld_imm (code, sparc_fp, 72 + 4, sparc_o2);
3700 #endif
3701                 break;
3702         case SAVE_STRUCT:
3703 #ifdef SPARCV9
3704                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3705 #else
3706                 sparc_ld_imm (code, sparc_fp, 64, sparc_o1);
3707 #endif
3708                 break;
3709         case SAVE_NONE:
3710         default:
3711                 break;
3712         }
3713
3714         sparc_set (code, cfg->method, sparc_o0);
3715
3716         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, func);
3717         EMIT_CALL ();
3718
3719         /* Restore result */
3720
3721         switch (save_mode) {
3722         case SAVE_TWO:
3723                 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
3724                 sparc_ld_imm (code, sparc_fp, 72, sparc_i0);
3725                 break;
3726         case SAVE_ONE:
3727                 sparc_ldi_imm (code, sparc_fp, ARGS_OFFSET, sparc_i0);
3728                 break;
3729         case SAVE_FP:
3730                 sparc_lddf_imm (code, sparc_fp, ARGS_OFFSET, sparc_f0);
3731                 break;
3732         case SAVE_NONE:
3733         default:
3734                 break;
3735         }
3736
3737         return code;
3738 }
3739
3740 guint8 *
3741 mono_arch_emit_prolog (MonoCompile *cfg)
3742 {
3743         MonoMethod *method = cfg->method;
3744         MonoMethodSignature *sig;
3745         MonoInst *inst;
3746         guint32 *code;
3747         CallInfo *cinfo;
3748         guint32 i, offset;
3749
3750         cfg->code_size = 256;
3751         cfg->native_code = g_malloc (cfg->code_size);
3752         code = (guint32*)cfg->native_code;
3753
3754         /* FIXME: Generate intermediate code instead */
3755
3756         offset = cfg->stack_offset;
3757         offset += (16 * sizeof (gpointer)); /* register save area */
3758 #ifndef SPARCV9
3759         offset += 4; /* struct/union return pointer */
3760 #endif
3761
3762         /* add parameter area size for called functions */
3763         if (cfg->param_area < (6 * sizeof (gpointer)))
3764                 /* Reserve space for the first 6 arguments even if it is unused */
3765                 offset += 6 * sizeof (gpointer);
3766         else
3767                 offset += cfg->param_area;
3768
3769         /* align the stack size */
3770         offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3771
3772         /*
3773          * localloc'd memory is stored between the local variables (whose
3774          * size is given by cfg->stack_offset), and between the space reserved
3775          * by the ABI.
3776          */
3777         cfg->arch.localloc_offset = offset - cfg->stack_offset;
3778
3779         cfg->stack_offset = offset;
3780
3781 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3782                         /* Perform stack touching */
3783                         NOT_IMPLEMENTED;
3784 #endif
3785
3786         if (!sparc_is_imm13 (- cfg->stack_offset)) {
3787                 /* Can't use sparc_o7 here, since we're still in the caller's frame */
3788                 sparc_set (code, (- cfg->stack_offset), GP_SCRATCH_REG);
3789                 sparc_save (code, sparc_sp, GP_SCRATCH_REG, sparc_sp);
3790         }
3791         else
3792                 sparc_save_imm (code, sparc_sp, - cfg->stack_offset, sparc_sp);
3793
3794 /*
3795         if (strstr (cfg->method->name, "foo")) {
3796                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
3797                 sparc_call_simple (code, 0);
3798                 sparc_nop (code);
3799         }
3800 */
3801
3802         sig = mono_method_signature (method);
3803
3804         cinfo = get_call_info (sig, FALSE);
3805
3806         /* Keep in sync with emit_load_volatile_arguments */
3807         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3808                 ArgInfo *ainfo = cinfo->args + i;
3809                 gint32 stack_offset;
3810                 MonoType *arg_type;
3811                 inst = cfg->varinfo [i];
3812
3813                 if (sig->hasthis && (i == 0))
3814                         arg_type = &mono_defaults.object_class->byval_arg;
3815                 else
3816                         arg_type = sig->params [i - sig->hasthis];
3817
3818                 stack_offset = ainfo->offset + ARGS_OFFSET;
3819
3820                 /* Save the split arguments so they will reside entirely on the stack */
3821                 if (ainfo->storage == ArgInSplitRegStack) {
3822                         /* Save the register to the stack */
3823                         g_assert (inst->opcode == OP_REGOFFSET);
3824                         if (!sparc_is_imm13 (stack_offset))
3825                                 NOT_IMPLEMENTED;
3826                         sparc_st_imm (code, sparc_i5, inst->inst_basereg, stack_offset);
3827                 }
3828
3829                 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
3830                         /* Save the argument to a dword aligned stack location */
3831                         /*
3832                          * stack_offset contains the offset of the argument on the stack.
3833                          * inst->inst_offset contains the dword aligned offset where the value
3834                          * should be stored.
3835                          */
3836                         if (ainfo->storage == ArgInIRegPair) {
3837                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3838                                         NOT_IMPLEMENTED;
3839                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3840                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3841                         }
3842                         else
3843                                 if (ainfo->storage == ArgInSplitRegStack) {
3844 #ifdef SPARCV9
3845                                         g_assert_not_reached ();
3846 #endif
3847                                         if (stack_offset != inst->inst_offset) {
3848                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3849                                                 sparc_st_imm (code, sparc_i5, inst->inst_basereg, inst->inst_offset);
3850                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3851                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3852                                         }
3853                                 }
3854                         else
3855                                 if (ainfo->storage == ArgOnStackPair) {
3856 #ifdef SPARCV9
3857                                         g_assert_not_reached ();
3858 #endif
3859                                         if (stack_offset != inst->inst_offset) {
3860                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3861                                                 sparc_ld_imm (code, sparc_fp, stack_offset, sparc_o7);
3862                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset);
3863                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3864                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3865                                         }
3866                                 }
3867                         else
3868                                 g_assert_not_reached ();
3869                 }
3870                 else
3871                         if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
3872                                 /* Argument in register, but need to be saved to stack */
3873                                 if (!sparc_is_imm13 (stack_offset))
3874                                         NOT_IMPLEMENTED;
3875                                 if ((stack_offset - ARGS_OFFSET) & 0x1)
3876                                         sparc_stb_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3877                                 else
3878                                         if ((stack_offset - ARGS_OFFSET) & 0x2)
3879                                                 sparc_sth_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3880                                 else
3881                                         if ((stack_offset - ARGS_OFFSET) & 0x4)
3882                                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3883                                         else {
3884                                                 if (v64)
3885                                                         sparc_stx_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3886                                                 else
3887                                                         sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3888                                         }
3889                         }
3890                 else
3891                         if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
3892 #ifdef SPARCV9
3893                                 NOT_IMPLEMENTED;
3894 #endif
3895                                 /* Argument in regpair, but need to be saved to stack */
3896                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3897                                         NOT_IMPLEMENTED;
3898                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3899                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3900                         }
3901                 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
3902                                 if (!sparc_is_imm13 (stack_offset))
3903                                         NOT_IMPLEMENTED;
3904                                 sparc_stf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
3905                                 }
3906                         else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
3907                                 /* The offset is guaranteed to be aligned by the ABI rules */
3908                                 sparc_stdf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
3909                         }
3910
3911                 if ((ainfo->storage == ArgInFloatReg) && (inst->opcode == OP_REGVAR)) {
3912                         /* Need to move into the a double precision register */
3913                         sparc_fstod (code, ainfo->reg, ainfo->reg - 1);
3914                 }
3915
3916                 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
3917                         if (inst->opcode == OP_REGVAR)
3918                                 /* FIXME: Load the argument into memory */
3919                                 NOT_IMPLEMENTED;
3920         }
3921
3922         g_free (cinfo);
3923
3924         if (cfg->method->save_lmf) {
3925                 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
3926
3927                 /* Save ip */
3928                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3929                 sparc_set_template (code, sparc_o7);
3930                 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ip));
3931                 /* Save sp */
3932                 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
3933                 /* Save fp */
3934                 sparc_sti_imm (code, sparc_fp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebp));
3935                 /* Save method */
3936                 /* FIXME: add a relocation for this */
3937                 sparc_set (code, cfg->method, sparc_o7);
3938                 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method));
3939
3940                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3941                                                          (gpointer)"mono_arch_get_lmf_addr");
3942                 EMIT_CALL ();
3943
3944                 code = (guint32*)mono_sparc_emit_save_lmf (code, lmf_offset);
3945         }
3946
3947         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3948                 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
3949
3950         cfg->code_len = (guint8*)code - cfg->native_code;
3951
3952         g_assert (cfg->code_len <= cfg->code_size);
3953
3954         return (guint8*)code;
3955 }
3956
3957 void
3958 mono_arch_emit_epilog (MonoCompile *cfg)
3959 {
3960         MonoMethod *method = cfg->method;
3961         guint32 *code;
3962         int can_fold = 0;
3963         int max_epilog_size = 16 + 20 * 4;
3964
3965         if (cfg->method->save_lmf)
3966                 max_epilog_size += 128;
3967
3968         if (mono_jit_trace_calls != NULL)
3969                 max_epilog_size += 50;
3970
3971         if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
3972                 max_epilog_size += 50;
3973
3974         while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
3975                 cfg->code_size *= 2;
3976                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
3977                 mono_jit_stats.code_reallocs++;
3978         }
3979
3980         code = (guint32*)(cfg->native_code + cfg->code_len);
3981
3982         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3983                 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
3984
3985         if (cfg->method->save_lmf) {
3986                 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
3987
3988                 code = mono_sparc_emit_restore_lmf (code, lmf_offset);
3989         }
3990
3991         /*
3992          * The V8 ABI requires that calls to functions which return a structure
3993          * return to %i7+12
3994          */
3995         if (!v64 && mono_method_signature (cfg->method)->pinvoke && MONO_TYPE_ISSTRUCT(mono_method_signature (cfg->method)->ret))
3996                 sparc_jmpl_imm (code, sparc_i7, 12, sparc_g0);
3997         else
3998                 sparc_ret (code);
3999
4000         /* Only fold last instruction into the restore if the exit block has an in count of 1
4001            and the previous block hasn't been optimized away since it may have an in count > 1 */
4002         if (cfg->bb_exit->in_count == 1 && cfg->bb_exit->in_bb[0]->native_offset != cfg->bb_exit->native_offset)
4003                 can_fold = 1;
4004
4005         /* Try folding last instruction into the restore */
4006         if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && sparc_inst_imm (code [-2]) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4007                 /* or reg, imm, %i0 */
4008                 int reg = sparc_inst_rs1 (code [-2]);
4009                 int imm = sparc_inst_imm13 (code [-2]);
4010                 code [-2] = code [-1];
4011                 code --;
4012                 sparc_restore_imm (code, reg, imm, sparc_o0);
4013         }
4014         else
4015         if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && (!sparc_inst_imm (code [-2])) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4016                 /* or reg, reg, %i0 */
4017                 int reg1 = sparc_inst_rs1 (code [-2]);
4018                 int reg2 = sparc_inst_rs2 (code [-2]);
4019                 code [-2] = code [-1];
4020                 code --;
4021                 sparc_restore (code, reg1, reg2, sparc_o0);
4022         }
4023         else
4024                 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
4025
4026         cfg->code_len = (guint8*)code - cfg->native_code;
4027
4028         g_assert (cfg->code_len < cfg->code_size);
4029
4030 }
4031
4032 void
4033 mono_arch_emit_exceptions (MonoCompile *cfg)
4034 {
4035         MonoJumpInfo *patch_info;
4036         guint32 *code;
4037         int nthrows = 0, i;
4038         int exc_count = 0;
4039         guint32 code_size;
4040         MonoClass *exc_classes [16];
4041         guint8 *exc_throw_start [16], *exc_throw_end [16];
4042
4043         /* Compute needed space */
4044         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4045                 if (patch_info->type == MONO_PATCH_INFO_EXC)
4046                         exc_count++;
4047         }
4048
4049         /*
4050          * make sure we have enough space for exceptions
4051          */
4052 #ifdef SPARCV9
4053         code_size = exc_count * (20 * 4);
4054 #else
4055         code_size = exc_count * 24;
4056 #endif
4057
4058         while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4059                 cfg->code_size *= 2;
4060                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4061                 mono_jit_stats.code_reallocs++;
4062         }
4063
4064         code = (guint32*)(cfg->native_code + cfg->code_len);
4065
4066         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4067                 switch (patch_info->type) {
4068                 case MONO_PATCH_INFO_EXC: {
4069                         MonoClass *exc_class;
4070                         guint32 *buf, *buf2;
4071                         guint32 throw_ip, type_idx;
4072                         gint32 disp;
4073
4074                         sparc_patch ((guint32*)(cfg->native_code + patch_info->ip.i), code);
4075
4076                         exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4077                         type_idx = exc_class->type_token - MONO_TOKEN_TYPE_DEF;
4078                         g_assert (exc_class);
4079                         throw_ip = patch_info->ip.i;
4080
4081                         /* Find a throw sequence for the same exception class */
4082                         for (i = 0; i < nthrows; ++i)
4083                                 if (exc_classes [i] == exc_class)
4084                                         break;
4085
4086                         if (i < nthrows) {
4087                                 guint32 throw_offset = (((guint8*)exc_throw_end [i] - cfg->native_code) - throw_ip) >> 2;
4088                                 if (!sparc_is_imm13 (throw_offset))
4089                                         sparc_set32 (code, throw_offset, sparc_o1);
4090
4091                                 disp = (exc_throw_start [i] - (guint8*)code) >> 2;
4092                                 g_assert (sparc_is_imm22 (disp));
4093                                 sparc_branch (code, 0, sparc_ba, disp);
4094                                 if (sparc_is_imm13 (throw_offset))
4095                                         sparc_set32 (code, throw_offset, sparc_o1);
4096                                 else
4097                                         sparc_nop (code);
4098                                 patch_info->type = MONO_PATCH_INFO_NONE;
4099                         }
4100                         else {
4101                                 /* Emit the template for setting o1 */
4102                                 buf = code;
4103                                 if (sparc_is_imm13 (((((guint8*)code - cfg->native_code) - throw_ip) >> 2) - 8))
4104                                         /* Can use a short form */
4105                                         sparc_nop (code);
4106                                 else
4107                                         sparc_set_template (code, sparc_o1);
4108                                 buf2 = code;
4109
4110                                 if (nthrows < 16) {
4111                                         exc_classes [nthrows] = exc_class;
4112                                         exc_throw_start [nthrows] = (guint8*)code;
4113                                 }
4114
4115                                 /*
4116                                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
4117                                 EMIT_CALL();
4118                                 */
4119
4120                                 /* first arg = type token */
4121                                 /* Pass the type index to reduce the size of the sparc_set */
4122                                 if (!sparc_is_imm13 (type_idx))
4123                                         sparc_set32 (code, type_idx, sparc_o0);
4124
4125                                 /* second arg = offset between the throw ip and the current ip */
4126                                 /* On sparc, the saved ip points to the call instruction */
4127                                 disp = (((guint8*)code - cfg->native_code) - throw_ip) >> 2;
4128                                 sparc_set32 (buf, disp, sparc_o1);
4129                                 while (buf < buf2)
4130                                         sparc_nop (buf);
4131
4132                                 if (nthrows < 16) {
4133                                         exc_throw_end [nthrows] = (guint8*)code;
4134                                         nthrows ++;
4135                                 }
4136
4137                                 patch_info->data.name = "mono_arch_throw_corlib_exception";
4138                                 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4139                                 patch_info->ip.i = (guint8*)code - cfg->native_code;
4140
4141                                 EMIT_CALL ();
4142
4143                                 if (sparc_is_imm13 (type_idx)) {
4144                                         /* Put it into the delay slot */
4145                                         code --;
4146                                         buf = code;
4147                                         sparc_set32 (code, type_idx, sparc_o0);
4148                                         g_assert (code - buf == 1);
4149                                 }
4150                         }
4151                         break;
4152                 }
4153                 default:
4154                         /* do nothing */
4155                         break;
4156                 }
4157         }
4158
4159         cfg->code_len = (guint8*)code - cfg->native_code;
4160
4161         g_assert (cfg->code_len < cfg->code_size);
4162
4163 }
4164
4165 gboolean lmf_addr_key_inited = FALSE;
4166
4167 #ifdef MONO_SPARC_THR_TLS
4168 thread_key_t lmf_addr_key;
4169 #else
4170 pthread_key_t lmf_addr_key;
4171 #endif
4172
4173 gpointer
4174 mono_arch_get_lmf_addr (void)
4175 {
4176         /* This is perf critical so we bypass the IO layer */
4177         /* The thr_... functions seem to be somewhat faster */
4178 #ifdef MONO_SPARC_THR_TLS
4179         gpointer res;
4180         thr_getspecific (lmf_addr_key, &res);
4181         return res;
4182 #else
4183         return pthread_getspecific (lmf_addr_key);
4184 #endif
4185 }
4186
4187 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4188
4189 /*
4190  * There seems to be no way to determine stack boundaries under solaris,
4191  * so it's not possible to determine whenever a SIGSEGV is caused by stack
4192  * overflow or not.
4193  */
4194 #error "--with-sigaltstack=yes not supported on solaris"
4195
4196 #endif
4197
4198 void
4199 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
4200 {
4201         if (!lmf_addr_key_inited) {
4202                 int res;
4203
4204                 lmf_addr_key_inited = TRUE;
4205
4206 #ifdef MONO_SPARC_THR_TLS
4207                 res = thr_keycreate (&lmf_addr_key, NULL);
4208 #else
4209                 res = pthread_key_create (&lmf_addr_key, NULL);
4210 #endif
4211                 g_assert (res == 0);
4212
4213         }
4214
4215 #ifdef MONO_SPARC_THR_TLS
4216         thr_setspecific (lmf_addr_key, &tls->lmf);
4217 #else
4218         pthread_setspecific (lmf_addr_key, &tls->lmf);
4219 #endif
4220 }
4221
4222 void
4223 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4224 {
4225 }
4226
4227 void
4228 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *call, int this_reg, int this_type, int vt_reg)
4229 {
4230         int this_out_reg = sparc_o0;
4231
4232         if (vt_reg != -1) {
4233 #ifdef SPARCV9
4234                 MonoInst *ins;
4235                 MONO_INST_NEW (cfg, ins, OP_MOVE);
4236                 ins->sreg1 = vt_reg;
4237                 ins->dreg = mono_regstate_next_int (cfg->rs);
4238                 mono_bblock_add_inst (cfg->cbb, ins);
4239
4240                 mono_call_inst_add_outarg_reg (cfg, call, ins->dreg, sparc_o0, FALSE);
4241
4242                 this_out_reg = sparc_o1;
4243 #else
4244                 /* Set the 'struct/union return pointer' location on the stack */
4245                 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, 64, vt_reg);
4246 #endif
4247         }
4248
4249         /* add the this argument */
4250         if (this_reg != -1) {
4251                 MonoInst *this;
4252                 MONO_INST_NEW (cfg, this, OP_MOVE);
4253                 this->type = this_type;
4254                 this->sreg1 = this_reg;
4255                 this->dreg = mono_regstate_next_int (cfg->rs);
4256                 mono_bblock_add_inst (cfg->cbb, this);
4257
4258                 mono_call_inst_add_outarg_reg (cfg, call, this->dreg, this_out_reg, FALSE);
4259         }
4260 }
4261
4262
4263 MonoInst*
4264 mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4265 {
4266         MonoInst *ins = NULL;
4267
4268         if (cmethod->klass == mono_defaults.thread_class &&
4269                 strcmp (cmethod->name, "MemoryBarrier") == 0) {
4270                 if (sparcv9)
4271                         MONO_INST_NEW (cfg, ins, OP_MEMORY_BARRIER);
4272         }
4273
4274         return ins;
4275 }
4276
4277 /*
4278  * mono_arch_get_argument_info:
4279  * @csig:  a method signature
4280  * @param_count: the number of parameters to consider
4281  * @arg_info: an array to store the result infos
4282  *
4283  * Gathers information on parameters such as size, alignment and
4284  * padding. arg_info should be large enought to hold param_count + 1 entries.
4285  *
4286  * Returns the size of the activation frame.
4287  */
4288 int
4289 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
4290 {
4291         int k, align;
4292         CallInfo *cinfo;
4293         ArgInfo *ainfo;
4294
4295         cinfo = get_call_info (csig, FALSE);
4296
4297         if (csig->hasthis) {
4298                 ainfo = &cinfo->args [0];
4299                 arg_info [0].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4300         }
4301
4302         for (k = 0; k < param_count; k++) {
4303                 ainfo = &cinfo->args [k + csig->hasthis];
4304
4305                 arg_info [k + 1].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4306                 arg_info [k + 1].size = mono_type_size (csig->params [k], &align);
4307         }
4308
4309         g_free (cinfo);
4310
4311         return 0;
4312 }
4313
4314 gboolean
4315 mono_arch_print_tree (MonoInst *tree, int arity)
4316 {
4317         return 0;
4318 }
4319
4320 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
4321 {
4322         return NULL;
4323 }
4324
4325 MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
4326 {
4327         return NULL;
4328 }