2 * mini-sparc.c: Sparc backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
9 * Christopher Taylor (ct@gentoo.org)
10 * Mark Crichton (crichton@gimp.org)
11 * Zoltan Varga (vargaz@freemail.hu)
13 * (C) 2003 Ximian, Inc.
21 #include <sys/systeminfo.h>
28 #include <mono/metadata/appdomain.h>
29 #include <mono/metadata/debug-helpers.h>
30 #include <mono/metadata/tokentype.h>
31 #include <mono/utils/mono-math.h>
33 #include "mini-sparc.h"
36 #include "cpu-sparc.h"
39 * Sparc V9 means two things:
40 * - the instruction set
43 * V9 instructions are only usable if the underlying processor is 64 bit. Most Sparc
44 * processors in use are 64 bit processors. The V9 ABI is only usable if the
45 * mono executable is a 64 bit executable. So it would make sense to use the 64 bit
46 * instructions without using the 64 bit ABI.
51 * - %i0..%i<n> hold the incoming arguments, these are never written by JITted
52 * code. Unused input registers are used for global register allocation.
53 * - %o0..%o5 and %l7 is used for local register allocation and passing arguments
54 * - %l0..%l6 is used for global register allocation
55 * - %o7 and %g1 is used as scratch registers in opcodes
56 * - all floating point registers are used for local register allocation except %f0.
57 * Only double precision registers are used.
59 * - fp registers %d0..%d30 are used for parameter passing, and %d32..%d62 are
60 * used for local allocation.
65 * - doubles and longs must be stored in dword aligned locations
69 * The following things are not implemented or do not work:
70 * - some fp arithmetic corner cases
71 * The following tests in mono/mini are expected to fail:
72 * - test_0_simple_double_casts
73 * This test casts (guint64)-1 to double and then back to guint64 again.
74 * Under x86, it returns 0, while under sparc it returns -1.
76 * In addition to this, the runtime requires the trunc function, or its
77 * solaris counterpart, aintl, to do some double->int conversions. If this
78 * function is not available, it is emulated somewhat, but the results can be
84 * - optimize sparc_set according to the memory model
85 * - when non-AOT compiling, compute patch targets immediately so we don't
86 * have to emit the 6 byte template.
88 * - struct arguments/returns
93 * - sparc_call_simple can't be used in a lot of places since the displacement
94 * might not fit into an imm30.
95 * - g1 can't be used in a lot of places since it is used as a scratch reg in
97 * - sparc_f0 can't be used as a scratch register on V9
98 * - the %d34..%d62 fp registers are encoded as: %dx = %f(x - 32 + 1), ie.
100 * - ldind.i4/u4 needs to sign extend/clear out upper word -> slows things down
101 * - ins->dreg can't be used as a scatch register in r4 opcodes since it might
102 * be a double precision register which has no single precision part.
103 * - passing/returning structs is hard to implement, because:
104 * - the spec is very hard to understand
105 * - it requires knowledge about the fields of structure, needs to handle
106 * nested structures etc.
110 * Possible optimizations:
111 * - delay slot scheduling
112 * - allocate large constants to registers
113 * - add more mul/div/rem optimizations
117 #define MONO_SPARC_THR_TLS 1
121 * There was a 64 bit bug in glib-2.2: g_bit_nth_msf (0, -1) would return 32,
122 * causing infinite loops in dominator computation. So glib-2.4 is required.
125 #if GLIB_MAJOR_VERSION == 2 && GLIB_MINOR_VERSION < 4
126 #error "glib 2.4 or later is required for 64 bit mode."
130 #define NOT_IMPLEMENTED do { g_assert_not_reached (); } while (0)
132 #define ALIGN_TO(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
134 #define SIGNAL_STACK_SIZE (64 * 1024)
136 #define STACK_BIAS MONO_SPARC_STACK_BIAS
140 /* %g1 is used by sparc_set */
141 #define GP_SCRATCH_REG sparc_g4
142 /* %f0 is used for parameter passing */
143 #define FP_SCRATCH_REG sparc_f30
144 #define ARGS_OFFSET (STACK_BIAS + 128)
148 #define FP_SCRATCH_REG sparc_f0
149 #define ARGS_OFFSET 68
150 #define GP_SCRATCH_REG sparc_g1
154 /* Whenever the CPU supports v9 instructions */
155 static gboolean sparcv9 = FALSE;
157 /* Whenever this is a 64bit executable */
159 static gboolean v64 = TRUE;
161 static gboolean v64 = FALSE;
164 static gpointer mono_arch_get_lmf_addr (void);
167 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar);
170 mono_arch_regname (int reg) {
171 static const char * rnames[] = {
172 "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
173 "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
174 "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
175 "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
176 "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
177 "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
178 "sparc_fp", "sparc_retadr"
180 if (reg >= 0 && reg < 32)
186 mono_arch_fregname (int reg) {
187 static const char *rnames [] = {
188 "sparc_f0", "sparc_f1", "sparc_f2", "sparc_f3", "sparc_f4",
189 "sparc_f5", "sparc_f6", "sparc_f7", "sparc_f8", "sparc_f9",
190 "sparc_f10", "sparc_f11", "sparc_f12", "sparc_f13", "sparc_f14",
191 "sparc_f15", "sparc_f16", "sparc_f17", "sparc_f18", "sparc_f19",
192 "sparc_f20", "sparc_f21", "sparc_f22", "sparc_f23", "sparc_f24",
193 "sparc_f25", "sparc_f26", "sparc_f27", "sparc_f28", "sparc_f29",
194 "sparc_f30", "sparc_f31"
197 if (reg >= 0 && reg < 32)
204 * Initialize the cpu to execute managed code.
207 mono_arch_cpu_init (void)
210 /* make sure sparcv9 is initialized for embedded use */
211 mono_arch_cpu_optimizazions(&dummy);
215 * This function returns the optimizations supported on this cpu.
218 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
226 if (!sysinfo (SI_ISALIST, buf, 1024))
227 g_assert_not_reached ();
229 /* From glibc. If the getpagesize is 8192, we're on sparc64, which
230 * (in)directly implies that we're a v9 or better.
231 * Improvements to this are greatly accepted...
232 * Also, we don't differentiate between v7 and v8. I sense SIGILL
233 * sniffing in my future.
235 if (getpagesize() == 8192)
236 strcpy (buf, "sparcv9");
238 strcpy (buf, "sparcv8");
242 * On some processors, the cmov instructions are even slower than the
245 if (strstr (buf, "sparcv9")) {
246 opts |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
250 *exclude_mask |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
256 mono_arch_break (void)
261 #define flushi(addr) __asm__ __volatile__ ("iflush %0"::"r"(addr):"memory")
262 #else /* assume Sun's compiler */
263 static void flushi(void *addr)
270 void sync_instruction_memory(caddr_t addr, int len);
274 mono_arch_flush_icache (guint8 *code, gint size)
277 /* Hopefully this is optimized based on the actual CPU */
278 sync_instruction_memory (code, size);
280 guint64 *p = (guint64*)code;
281 guint64 *end = (guint64*)(code + ((size + 8) /8));
284 * FIXME: Flushing code in dword chunks in _slow_.
288 __asm__ __volatile__ ("iflush %0"::"r"(p++));
298 * Flush all register windows to memory. Every register window is saved to
299 * a 16 word area on the stack pointed to by its %sp register.
302 mono_sparc_flushw (void)
304 static guint32 start [64];
305 static int inited = 0;
307 static void (*flushw) (void);
312 sparc_save_imm (code, sparc_sp, -160, sparc_sp);
315 sparc_restore_simple (code);
317 g_assert ((code - start) < 64);
319 flushw = (gpointer)start;
328 mono_arch_flush_register_windows (void)
330 mono_sparc_flushw ();
334 mono_arch_is_inst_imm (gint64 imm)
336 return sparc_is_imm13 (imm);
340 mono_sparc_is_v9 (void) {
345 mono_sparc_is_sparc64 (void) {
357 ArgInFloatReg, /* V9 only */
358 ArgInDoubleReg /* V9 only */
363 /* This needs to be offset by %i0 or %o0 depending on caller/callee */
366 guint32 vt_offset; /* for valuetypes */
384 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean pair)
386 ainfo->offset = *stack_size;
389 if (*gr >= PARAM_REGS) {
390 ainfo->storage = ArgOnStack;
393 ainfo->storage = ArgInIReg;
398 /* Allways reserve stack space for parameters passed in registers */
399 (*stack_size) += sizeof (gpointer);
402 if (*gr < PARAM_REGS - 1) {
403 /* A pair of registers */
404 ainfo->storage = ArgInIRegPair;
408 else if (*gr >= PARAM_REGS) {
409 /* A pair of stack locations */
410 ainfo->storage = ArgOnStackPair;
413 ainfo->storage = ArgInSplitRegStack;
418 (*stack_size) += 2 * sizeof (gpointer);
424 #define FLOAT_PARAM_REGS 32
427 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean single)
429 ainfo->offset = *stack_size;
432 if (*gr >= FLOAT_PARAM_REGS) {
433 ainfo->storage = ArgOnStack;
436 /* A single is passed in an even numbered fp register */
437 ainfo->storage = ArgInFloatReg;
438 ainfo->reg = *gr + 1;
443 if (*gr < FLOAT_PARAM_REGS) {
444 /* A double register */
445 ainfo->storage = ArgInDoubleReg;
450 ainfo->storage = ArgOnStack;
454 (*stack_size) += sizeof (gpointer);
462 * Obtain information about a call according to the calling convention.
463 * For V8, see the "System V ABI, Sparc Processor Supplement" Sparc V8 version
464 * document for more information.
465 * For V9, see the "Low Level System Information (64-bit psABI)" chapter in
466 * the 'Sparc Compliance Definition 2.4' document.
469 get_call_info (MonoMethodSignature *sig, gboolean is_pinvoke)
472 int n = sig->hasthis + sig->param_count;
473 guint32 stack_size = 0;
476 cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
482 if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
483 /* The address of the return value is passed in %o0 */
484 add_general (&gr, &stack_size, &cinfo->ret, FALSE);
485 cinfo->ret.reg += sparc_i0;
491 add_general (&gr, &stack_size, cinfo->args + 0, FALSE);
493 if ((sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
496 /* Emit the signature cookie just before the implicit arguments */
497 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
500 for (i = 0; i < sig->param_count; ++i) {
501 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
503 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
506 /* Emit the signature cookie just before the implicit arguments */
507 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
510 DEBUG(printf("param %d: ", i));
511 if (sig->params [i]->byref) {
512 DEBUG(printf("byref\n"));
514 add_general (&gr, &stack_size, ainfo, FALSE);
517 switch (mono_type_get_underlying_type (sig->params [i])->type) {
518 case MONO_TYPE_BOOLEAN:
521 add_general (&gr, &stack_size, ainfo, FALSE);
522 /* the value is in the ls byte */
523 ainfo->offset += sizeof (gpointer) - 1;
528 add_general (&gr, &stack_size, ainfo, FALSE);
529 /* the value is in the ls word */
530 ainfo->offset += sizeof (gpointer) - 2;
534 add_general (&gr, &stack_size, ainfo, FALSE);
535 /* the value is in the ls dword */
536 ainfo->offset += sizeof (gpointer) - 4;
541 case MONO_TYPE_FNPTR:
542 case MONO_TYPE_CLASS:
543 case MONO_TYPE_OBJECT:
544 case MONO_TYPE_STRING:
545 case MONO_TYPE_SZARRAY:
546 case MONO_TYPE_ARRAY:
547 add_general (&gr, &stack_size, ainfo, FALSE);
549 case MONO_TYPE_GENERICINST:
550 if (!mono_type_generic_inst_is_valuetype (sig->params [i])) {
551 add_general (&gr, &stack_size, ainfo, FALSE);
555 case MONO_TYPE_VALUETYPE:
560 add_general (&gr, &stack_size, ainfo, FALSE);
562 case MONO_TYPE_TYPEDBYREF:
563 add_general (&gr, &stack_size, ainfo, FALSE);
568 add_general (&gr, &stack_size, ainfo, FALSE);
570 add_general (&gr, &stack_size, ainfo, TRUE);
575 add_float (&fr, &stack_size, ainfo, TRUE);
578 /* single precision values are passed in integer registers */
579 add_general (&gr, &stack_size, ainfo, FALSE);
584 add_float (&fr, &stack_size, ainfo, FALSE);
587 /* double precision values are passed in a pair of registers */
588 add_general (&gr, &stack_size, ainfo, TRUE);
592 g_assert_not_reached ();
596 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
599 /* Emit the signature cookie just before the implicit arguments */
600 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
605 switch (mono_type_get_underlying_type (sig->ret)->type) {
606 case MONO_TYPE_BOOLEAN:
617 case MONO_TYPE_FNPTR:
618 case MONO_TYPE_CLASS:
619 case MONO_TYPE_OBJECT:
620 case MONO_TYPE_SZARRAY:
621 case MONO_TYPE_ARRAY:
622 case MONO_TYPE_STRING:
623 cinfo->ret.storage = ArgInIReg;
624 cinfo->ret.reg = sparc_i0;
631 cinfo->ret.storage = ArgInIReg;
632 cinfo->ret.reg = sparc_i0;
636 cinfo->ret.storage = ArgInIRegPair;
637 cinfo->ret.reg = sparc_i0;
644 cinfo->ret.storage = ArgInFReg;
645 cinfo->ret.reg = sparc_f0;
647 case MONO_TYPE_GENERICINST:
648 if (!mono_type_generic_inst_is_valuetype (sig->ret)) {
649 cinfo->ret.storage = ArgInIReg;
650 cinfo->ret.reg = sparc_i0;
656 case MONO_TYPE_VALUETYPE:
665 cinfo->ret.storage = ArgOnStack;
667 case MONO_TYPE_TYPEDBYREF:
670 /* Same as a valuetype with size 24 */
677 cinfo->ret.storage = ArgOnStack;
682 g_error ("Can't handle as return value 0x%x", sig->ret->type);
686 cinfo->stack_usage = stack_size;
687 cinfo->reg_usage = gr;
692 is_regsize_var (MonoType *t) {
695 switch (mono_type_get_underlying_type (t)->type) {
696 case MONO_TYPE_BOOLEAN:
707 case MONO_TYPE_OBJECT:
708 case MONO_TYPE_STRING:
709 case MONO_TYPE_CLASS:
710 case MONO_TYPE_SZARRAY:
711 case MONO_TYPE_ARRAY:
713 case MONO_TYPE_VALUETYPE:
725 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
731 * FIXME: If an argument is allocated to a register, then load it from the
732 * stack in the prolog.
735 for (i = 0; i < cfg->num_varinfo; i++) {
736 MonoInst *ins = cfg->varinfo [i];
737 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
740 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
743 /* FIXME: Make arguments on stack allocateable to registers */
744 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode == OP_REGVAR) || (ins->opcode == OP_ARG))
747 if (is_regsize_var (ins->inst_vtype)) {
748 g_assert (MONO_VARINFO (cfg, i)->reg == -1);
749 g_assert (i == vmv->idx);
751 vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
759 mono_arch_get_global_int_regs (MonoCompile *cfg)
763 MonoMethodSignature *sig;
766 sig = mono_method_signature (cfg->method);
768 cinfo = get_call_info (sig, FALSE);
770 /* Use unused input registers */
771 for (i = cinfo->reg_usage; i < 6; ++i)
772 regs = g_list_prepend (regs, GUINT_TO_POINTER (sparc_i0 + i));
774 /* Use %l0..%l6 as global registers */
775 for (i = sparc_l0; i < sparc_l7; ++i)
776 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
784 * mono_arch_regalloc_cost:
786 * Return the cost, in number of memory references, of the action of
787 * allocating the variable VMV into a register during global register
791 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
797 * Set var information according to the calling convention. sparc version.
798 * The locals var stuff should most likely be split in another method.
801 mono_arch_allocate_vars (MonoCompile *m)
803 MonoMethodSignature *sig;
804 MonoMethodHeader *header;
806 int i, offset, size, align, curinst;
809 header = mono_method_get_header (m->method);
811 sig = mono_method_signature (m->method);
813 cinfo = get_call_info (sig, FALSE);
815 if (sig->ret->type != MONO_TYPE_VOID) {
816 switch (cinfo->ret.storage) {
820 m->ret->opcode = OP_REGVAR;
821 m->ret->inst_c0 = cinfo->ret.reg;
825 g_assert_not_reached ();
828 m->ret->opcode = OP_REGOFFSET;
829 m->ret->inst_basereg = sparc_fp;
830 m->ret->inst_offset = 64;
836 m->ret->dreg = m->ret->inst_c0;
840 * We use the ABI calling conventions for managed code as well.
841 * Exception: valuetypes are never returned in registers on V9.
842 * FIXME: Use something more optimized.
845 /* Locals are allocated backwards from %fp */
846 m->frame_reg = sparc_fp;
850 * Reserve a stack slot for holding information used during exception
853 if (header->num_clauses)
854 offset += sizeof (gpointer) * 2;
856 if (m->method->save_lmf) {
857 offset += sizeof (MonoLMF);
858 m->arch.lmf_offset = offset;
861 curinst = m->locals_start;
862 for (i = curinst; i < m->num_varinfo; ++i) {
863 inst = m->varinfo [i];
865 if (inst->opcode == OP_REGVAR) {
866 //g_print ("allocating local %d to %s\n", i, mono_arch_regname (inst->dreg));
870 if (inst->flags & MONO_INST_IS_DEAD)
873 /* inst->backend.is_pinvoke indicates native sized value types, this is used by the
874 * pinvoke wrappers when they call functions returning structure */
875 if (inst->backend.is_pinvoke && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
876 size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
878 size = mono_type_stack_size (inst->inst_vtype, &align);
881 * This is needed since structures containing doubles must be doubleword
883 * FIXME: Do this only if needed.
885 if (MONO_TYPE_ISSTRUCT (inst->inst_vtype))
889 * variables are accessed as negative offsets from %fp, so increase
890 * the offset before assigning it to a variable
895 offset &= ~(align - 1);
896 inst->opcode = OP_REGOFFSET;
897 inst->inst_basereg = sparc_fp;
898 inst->inst_offset = STACK_BIAS + -offset;
900 //g_print ("allocating local %d to [%s - %d]\n", i, mono_arch_regname (inst->inst_basereg), - inst->inst_offset);
903 if (sig->call_convention == MONO_CALL_VARARG) {
904 m->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
907 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
908 inst = m->varinfo [i];
909 if (inst->opcode != OP_REGVAR) {
910 ArgInfo *ainfo = &cinfo->args [i];
911 gboolean inreg = TRUE;
915 if (sig->hasthis && (i == 0))
916 arg_type = &mono_defaults.object_class->byval_arg;
918 arg_type = sig->params [i - sig->hasthis];
921 if (!arg_type->byref && ((arg_type->type == MONO_TYPE_R4)
922 || (arg_type->type == MONO_TYPE_R8)))
924 * Since float arguments are passed in integer registers, we need to
925 * save them to the stack in the prolog.
930 /* FIXME: Allocate volatile arguments to registers */
931 if (inst->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT))
934 if (MONO_TYPE_ISSTRUCT (arg_type))
935 /* FIXME: this isn't needed */
938 inst->opcode = OP_REGOFFSET;
941 storage = ArgOnStack;
943 storage = ainfo->storage;
948 inst->opcode = OP_REGVAR;
949 inst->dreg = sparc_i0 + ainfo->reg;
954 * Since float regs are volatile, we save the arguments to
955 * the stack in the prolog.
956 * FIXME: Avoid this if the method contains no calls.
960 case ArgInSplitRegStack:
961 /* Split arguments are saved to the stack in the prolog */
962 inst->opcode = OP_REGOFFSET;
963 /* in parent frame */
964 inst->inst_basereg = sparc_fp;
965 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
967 if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
969 * It is very hard to load doubles from non-doubleword aligned
970 * memory locations. So if the offset is misaligned, we copy the
971 * argument to a stack location in the prolog.
973 if ((inst->inst_offset - STACK_BIAS) % 8) {
974 inst->inst_basereg = sparc_fp;
978 offset &= ~(align - 1);
979 inst->inst_offset = STACK_BIAS + -offset;
988 if (MONO_TYPE_ISSTRUCT (arg_type)) {
989 /* Add a level of indirection */
991 * It would be easier to add OP_LDIND_I here, but ldind_i instructions
992 * are destructively modified in a lot of places in inssel.brg.
995 MONO_INST_NEW (m, indir, 0);
997 inst->opcode = OP_SPARC_INARG_VT;
998 inst->inst_left = indir;
1004 * spillvars are stored between the normal locals and the storage reserved
1008 m->stack_offset = offset;
1010 /* Add a properly aligned dword for use by int<->float conversion opcodes */
1012 mono_spillvar_offset_float (m, 0);
1018 make_group (MonoCompile *cfg, MonoInst *left, int basereg, int offset)
1022 MONO_INST_NEW (cfg, group, OP_GROUP);
1023 group->inst_left = left;
1024 group->inst_basereg = basereg;
1025 group->inst_imm = offset;
1031 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo)
1034 MonoMethodSignature *tmp_sig;
1038 * mono_ArgIterator_Setup assumes the signature cookie is
1039 * passed first and all the arguments which were before it are
1040 * passed on the stack after the signature. So compensate by
1041 * passing a different signature.
1043 tmp_sig = mono_metadata_signature_dup (call->signature);
1044 tmp_sig->param_count -= call->signature->sentinelpos;
1045 tmp_sig->sentinelpos = 0;
1046 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1048 /* FIXME: Add support for signature tokens to AOT */
1049 cfg->disable_aot = TRUE;
1050 /* We allways pass the signature on the stack for simplicity */
1051 MONO_INST_NEW (cfg, arg, OP_SPARC_OUTARG_MEM);
1052 arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + cinfo->sig_cookie.offset);
1053 MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
1054 sig_arg->inst_p0 = tmp_sig;
1055 arg->inst_left = sig_arg;
1056 arg->type = STACK_PTR;
1057 /* prepend, so they get reversed */
1058 arg->next = call->out_args;
1059 call->out_args = arg;
1063 * take the arguments and generate the arch-specific
1064 * instructions to properly call the function in call.
1065 * This includes pushing, moving arguments to the right register
1069 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
1071 MonoMethodSignature *sig;
1075 guint32 extra_space = 0;
1077 sig = call->signature;
1078 n = sig->param_count + sig->hasthis;
1080 cinfo = get_call_info (sig, sig->pinvoke);
1082 for (i = 0; i < n; ++i) {
1083 ainfo = cinfo->args + i;
1085 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
1086 /* Emit the signature cookie just before the first implicit argument */
1087 emit_sig_cookie (cfg, call, cinfo);
1090 if (is_virtual && i == 0) {
1091 /* the argument will be attached to the call instruction */
1092 in = call->args [i];
1094 MONO_INST_NEW (cfg, arg, OP_OUTARG);
1095 in = call->args [i];
1096 arg->cil_code = in->cil_code;
1097 arg->inst_left = in;
1098 arg->type = in->type;
1099 /* prepend, we'll need to reverse them later */
1100 arg->next = call->out_args;
1101 call->out_args = arg;
1103 if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(sig->params [i - sig->hasthis]))) {
1106 guint32 offset, pad;
1114 if (sig->params [i - sig->hasthis]->type == MONO_TYPE_TYPEDBYREF) {
1115 size = sizeof (MonoTypedRef);
1116 align = sizeof (gpointer);
1120 size = mono_type_native_stack_size (&in->klass->byval_arg, &align);
1123 * Can't use mono_type_stack_size (), but that
1124 * aligns the size to sizeof (gpointer), which is larger
1125 * than the size of the source, leading to reads of invalid
1126 * memory if the source is at the end of address space or
1129 size = mono_class_value_size (in->klass, &align);
1133 * We use OP_OUTARG_VT to copy the valuetype to a stack location, then
1134 * use the normal OUTARG opcodes to pass the address of the location to
1137 MONO_INST_NEW (cfg, inst, OP_OUTARG_VT);
1138 inst->inst_left = in;
1140 /* The first 6 argument locations are reserved */
1141 if (cinfo->stack_usage < 6 * sizeof (gpointer))
1142 cinfo->stack_usage = 6 * sizeof (gpointer);
1144 offset = ALIGN_TO ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage, align);
1145 pad = offset - ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage);
1147 inst->inst_c1 = STACK_BIAS + offset;
1148 inst->backend.size = size;
1149 arg->inst_left = inst;
1151 cinfo->stack_usage += size;
1152 cinfo->stack_usage += pad;
1155 arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + ainfo->offset);
1157 switch (ainfo->storage) {
1161 if (ainfo->storage == ArgInIRegPair)
1162 arg->opcode = OP_SPARC_OUTARG_REGPAIR;
1163 arg->backend.reg3 = sparc_o0 + ainfo->reg;
1164 call->used_iregs |= 1 << ainfo->reg;
1166 if ((i >= sig->hasthis) && !sig->params [i - sig->hasthis]->byref && ((sig->params [i - sig->hasthis]->type == MONO_TYPE_R8) || (sig->params [i - sig->hasthis]->type == MONO_TYPE_R4))) {
1167 /* An fp value is passed in an ireg */
1169 if (arg->opcode == OP_SPARC_OUTARG_REGPAIR)
1170 arg->opcode = OP_SPARC_OUTARG_REGPAIR_FLOAT;
1172 arg->opcode = OP_SPARC_OUTARG_FLOAT;
1175 * The OUTARG (freg) implementation needs an extra dword to store
1176 * the temporary value.
1182 arg->opcode = OP_SPARC_OUTARG_MEM;
1184 case ArgOnStackPair:
1185 arg->opcode = OP_SPARC_OUTARG_MEMPAIR;
1187 case ArgInSplitRegStack:
1188 arg->opcode = OP_SPARC_OUTARG_SPLIT_REG_STACK;
1189 arg->backend.reg3 = sparc_o0 + ainfo->reg;
1190 call->used_iregs |= 1 << ainfo->reg;
1193 arg->opcode = OP_SPARC_OUTARG_FLOAT_REG;
1194 arg->backend.reg3 = sparc_f0 + ainfo->reg;
1196 case ArgInDoubleReg:
1197 arg->opcode = OP_SPARC_OUTARG_DOUBLE_REG;
1198 arg->backend.reg3 = sparc_f0 + ainfo->reg;
1206 /* Handle the case where there are no implicit arguments */
1207 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sig->sentinelpos)) {
1208 emit_sig_cookie (cfg, call, cinfo);
1212 * Reverse the call->out_args list.
1215 MonoInst *prev = NULL, *list = call->out_args, *next;
1222 call->out_args = prev;
1224 call->stack_usage = cinfo->stack_usage + extra_space;
1225 call->out_ireg_args = NULL;
1226 call->out_freg_args = NULL;
1227 cfg->param_area = MAX (cfg->param_area, call->stack_usage);
1228 cfg->flags |= MONO_CFG_HAS_CALLS;
1234 /* Map opcode to the sparc condition codes */
1235 static inline SparcCond
1236 opcode_to_sparc_cond (int opcode)
1258 case OP_COND_EXC_EQ:
1261 case OP_COND_EXC_NE_UN:
1268 case OP_COND_EXC_LT:
1274 case OP_COND_EXC_LT_UN:
1280 case OP_COND_EXC_GT:
1286 case OP_COND_EXC_GT_UN:
1290 case OP_COND_EXC_GE:
1294 case OP_COND_EXC_GE_UN:
1298 case OP_COND_EXC_LE:
1302 case OP_COND_EXC_LE_UN:
1304 case OP_COND_EXC_OV:
1305 case OP_COND_EXC_IOV:
1308 case OP_COND_EXC_IC:
1310 case OP_COND_EXC_NO:
1311 case OP_COND_EXC_NC:
1314 g_assert_not_reached ();
1319 #define COMPUTE_DISP(ins) \
1320 if (ins->flags & MONO_INST_BRLABEL) { \
1321 if (ins->inst_i0->inst_c0) \
1322 disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2; \
1325 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
1328 if (ins->inst_true_bb->native_offset) \
1329 disp = (ins->inst_true_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2; \
1332 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1337 #define DEFAULT_ICC sparc_xcc_short
1339 #define DEFAULT_ICC sparc_icc_short
1343 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) \
1347 COMPUTE_DISP(ins); \
1348 predict = (disp != 0) ? 1 : 0; \
1349 g_assert (sparc_is_imm19 (disp)); \
1350 sparc_branchp (code, (annul), cond, icc, (predict), disp); \
1351 if (filldelay) sparc_nop (code); \
1353 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_ICC ((ins), (cond), (annul), (filldelay), (sparc_xcc_short))
1354 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) \
1358 COMPUTE_DISP(ins); \
1359 predict = (disp != 0) ? 1 : 0; \
1360 g_assert (sparc_is_imm19 (disp)); \
1361 sparc_fbranch (code, (annul), cond, disp); \
1362 if (filldelay) sparc_nop (code); \
1365 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) g_assert_not_reached ()
1366 #define EMIT_COND_BRANCH_GENERAL(ins,bop,cond,annul,filldelay) \
1369 COMPUTE_DISP(ins); \
1370 g_assert (sparc_is_imm22 (disp)); \
1371 sparc_ ## bop (code, (annul), cond, disp); \
1372 if (filldelay) sparc_nop (code); \
1374 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),branch,(cond),annul,filldelay)
1375 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),fbranch,(cond),annul,filldelay)
1378 #define EMIT_COND_BRANCH_PREDICTED(ins,cond,annul,filldelay) \
1382 COMPUTE_DISP(ins); \
1383 predict = (disp != 0) ? 1 : 0; \
1384 g_assert (sparc_is_imm19 (disp)); \
1385 sparc_branchp (code, (annul), (cond), DEFAULT_ICC, (predict), disp); \
1386 if (filldelay) sparc_nop (code); \
1389 #define EMIT_COND_BRANCH_BPR(ins,bop,predict,annul,filldelay) \
1392 COMPUTE_DISP(ins); \
1393 g_assert (sparc_is_imm22 (disp)); \
1394 sparc_ ## bop (code, (annul), (predict), ins->sreg1, disp); \
1395 if (filldelay) sparc_nop (code); \
1398 /* emit an exception if condition is fail */
1400 * We put the exception throwing code out-of-line, at the end of the method
1402 #define EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,filldelay,icc) do { \
1403 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code, \
1404 MONO_PATCH_INFO_EXC, sexc_name); \
1406 sparc_branchp (code, 0, (cond), (icc), 0, 0); \
1409 sparc_branch (code, 0, cond, 0); \
1411 if (filldelay) sparc_nop (code); \
1414 #define EMIT_COND_SYSTEM_EXCEPTION(ins,cond,sexc_name) EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,TRUE,DEFAULT_ICC)
1416 #define EMIT_COND_SYSTEM_EXCEPTION_BPR(ins,bop,sexc_name) do { \
1417 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code, \
1418 MONO_PATCH_INFO_EXC, sexc_name); \
1419 sparc_ ## bop (code, FALSE, FALSE, ins->sreg1, 0); \
1423 #define EMIT_ALU_IMM(ins,op,setcc) do { \
1424 if (sparc_is_imm13 ((ins)->inst_imm)) \
1425 sparc_ ## op ## _imm (code, (setcc), (ins)->sreg1, ins->inst_imm, (ins)->dreg); \
1427 sparc_set (code, ins->inst_imm, sparc_o7); \
1428 sparc_ ## op (code, (setcc), (ins)->sreg1, sparc_o7, (ins)->dreg); \
1432 #define EMIT_LOAD_MEMBASE(ins,op) do { \
1433 if (sparc_is_imm13 (ins->inst_offset)) \
1434 sparc_ ## op ## _imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg); \
1436 sparc_set (code, ins->inst_offset, sparc_o7); \
1437 sparc_ ## op (code, ins->inst_basereg, sparc_o7, ins->dreg); \
1442 #define EMIT_STORE_MEMBASE_IMM(ins,op) do { \
1444 if (ins->inst_imm == 0) \
1447 sparc_set (code, ins->inst_imm, sparc_o7); \
1450 if (!sparc_is_imm13 (ins->inst_offset)) { \
1451 sparc_set (code, ins->inst_offset, GP_SCRATCH_REG); \
1452 sparc_ ## op (code, sreg, ins->inst_destbasereg, GP_SCRATCH_REG); \
1455 sparc_ ## op ## _imm (code, sreg, ins->inst_destbasereg, ins->inst_offset); \
1458 #define EMIT_STORE_MEMBASE_REG(ins,op) do { \
1459 if (!sparc_is_imm13 (ins->inst_offset)) { \
1460 sparc_set (code, ins->inst_offset, sparc_o7); \
1461 sparc_ ## op (code, ins->sreg1, ins->inst_destbasereg, sparc_o7); \
1464 sparc_ ## op ## _imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset); \
1467 #define EMIT_CALL() do { \
1469 sparc_set_template (code, sparc_o7); \
1470 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7); \
1473 sparc_call_simple (code, 0); \
1479 * A call template is 7 instructions long, so we want to avoid it if possible.
1482 emit_call (MonoCompile *cfg, guint32 *code, guint32 patch_type, gconstpointer data)
1486 /* FIXME: This only works if the target method is already compiled */
1487 if (0 && v64 && !cfg->compile_aot) {
1488 MonoJumpInfo patch_info;
1490 patch_info.type = patch_type;
1491 patch_info.data.target = data;
1493 target = mono_resolve_patch_target (cfg->method, cfg->domain, NULL, &patch_info, FALSE);
1495 /* FIXME: Add optimizations if the target is close enough */
1496 sparc_set (code, target, sparc_o7);
1497 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7);
1501 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, patch_type, data);
1509 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1511 MonoInst *ins, *last_ins = NULL;
1516 switch (ins->opcode) {
1518 /* remove unnecessary multiplication with 1 */
1519 if (ins->inst_imm == 1) {
1520 if (ins->dreg != ins->sreg1) {
1521 ins->opcode = OP_MOVE;
1523 last_ins->next = ins->next;
1530 case OP_LOAD_MEMBASE:
1531 case OP_LOADI4_MEMBASE:
1533 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1534 * OP_LOAD_MEMBASE offset(basereg), reg
1536 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
1537 || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1538 ins->inst_basereg == last_ins->inst_destbasereg &&
1539 ins->inst_offset == last_ins->inst_offset) {
1540 if (ins->dreg == last_ins->sreg1) {
1541 last_ins->next = ins->next;
1545 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1546 ins->opcode = OP_MOVE;
1547 ins->sreg1 = last_ins->sreg1;
1551 * Note: reg1 must be different from the basereg in the second load
1552 * OP_LOAD_MEMBASE offset(basereg), reg1
1553 * OP_LOAD_MEMBASE offset(basereg), reg2
1555 * OP_LOAD_MEMBASE offset(basereg), reg1
1556 * OP_MOVE reg1, reg2
1558 } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1559 || last_ins->opcode == OP_LOAD_MEMBASE) &&
1560 ins->inst_basereg != last_ins->dreg &&
1561 ins->inst_basereg == last_ins->inst_basereg &&
1562 ins->inst_offset == last_ins->inst_offset) {
1564 if (ins->dreg == last_ins->dreg) {
1565 last_ins->next = ins->next;
1569 ins->opcode = OP_MOVE;
1570 ins->sreg1 = last_ins->dreg;
1573 //g_assert_not_reached ();
1577 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1578 * OP_LOAD_MEMBASE offset(basereg), reg
1580 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1581 * OP_ICONST reg, imm
1583 } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1584 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1585 ins->inst_basereg == last_ins->inst_destbasereg &&
1586 ins->inst_offset == last_ins->inst_offset) {
1587 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1588 ins->opcode = OP_ICONST;
1589 ins->inst_c0 = last_ins->inst_imm;
1590 g_assert_not_reached (); // check this rule
1595 case OP_LOADU1_MEMBASE:
1596 case OP_LOADI1_MEMBASE:
1597 if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1598 ins->inst_basereg == last_ins->inst_destbasereg &&
1599 ins->inst_offset == last_ins->inst_offset) {
1600 if (ins->dreg == last_ins->sreg1) {
1601 last_ins->next = ins->next;
1605 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1606 ins->opcode = OP_MOVE;
1607 ins->sreg1 = last_ins->sreg1;
1611 case OP_LOADU2_MEMBASE:
1612 case OP_LOADI2_MEMBASE:
1613 if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1614 ins->inst_basereg == last_ins->inst_destbasereg &&
1615 ins->inst_offset == last_ins->inst_offset) {
1616 if (ins->dreg == last_ins->sreg1) {
1617 last_ins->next = ins->next;
1621 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1622 ins->opcode = OP_MOVE;
1623 ins->sreg1 = last_ins->sreg1;
1627 case OP_STOREI4_MEMBASE_IMM:
1628 /* Convert pairs of 0 stores to a dword 0 store */
1629 /* Used when initializing temporaries */
1630 /* We know sparc_fp is dword aligned */
1631 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM) &&
1632 (ins->inst_destbasereg == last_ins->inst_destbasereg) &&
1633 (ins->inst_destbasereg == sparc_fp) &&
1634 (ins->inst_offset < 0) &&
1635 ((ins->inst_offset % 8) == 0) &&
1636 ((ins->inst_offset == last_ins->inst_offset - 4)) &&
1637 (ins->inst_imm == 0) &&
1638 (last_ins->inst_imm == 0)) {
1640 last_ins->opcode = OP_STOREI8_MEMBASE_IMM;
1641 last_ins->inst_offset = ins->inst_offset;
1642 last_ins->next = ins->next;
1654 case OP_COND_EXC_EQ:
1655 case OP_COND_EXC_GE:
1656 case OP_COND_EXC_GT:
1657 case OP_COND_EXC_LE:
1658 case OP_COND_EXC_LT:
1659 case OP_COND_EXC_NE_UN:
1661 * Convert compare with zero+branch to BRcc
1664 * This only works in 64 bit mode, since it examines all 64
1665 * bits of the register.
1666 * Only do this if the method is small since BPr only has a 16bit
1669 if (v64 && (mono_method_get_header (cfg->method)->code_size < 10000) && last_ins &&
1670 (last_ins->opcode == OP_COMPARE_IMM) &&
1671 (last_ins->inst_imm == 0)) {
1672 MonoInst *next = ins->next;
1673 switch (ins->opcode) {
1675 ins->opcode = OP_SPARC_BRZ;
1678 ins->opcode = OP_SPARC_BRNZ;
1681 ins->opcode = OP_SPARC_BRLZ;
1684 ins->opcode = OP_SPARC_BRGZ;
1687 ins->opcode = OP_SPARC_BRGEZ;
1690 ins->opcode = OP_SPARC_BRLEZ;
1692 case OP_COND_EXC_EQ:
1693 ins->opcode = OP_SPARC_COND_EXC_EQZ;
1695 case OP_COND_EXC_GE:
1696 ins->opcode = OP_SPARC_COND_EXC_GEZ;
1698 case OP_COND_EXC_GT:
1699 ins->opcode = OP_SPARC_COND_EXC_GTZ;
1701 case OP_COND_EXC_LE:
1702 ins->opcode = OP_SPARC_COND_EXC_LEZ;
1704 case OP_COND_EXC_LT:
1705 ins->opcode = OP_SPARC_COND_EXC_LTZ;
1707 case OP_COND_EXC_NE_UN:
1708 ins->opcode = OP_SPARC_COND_EXC_NEZ;
1711 g_assert_not_reached ();
1713 ins->sreg1 = last_ins->sreg1;
1715 last_ins->next = next;
1726 if (ins->dreg == ins->sreg1) {
1728 last_ins->next = ins->next;
1733 * OP_MOVE sreg, dreg
1734 * OP_MOVE dreg, sreg
1736 if (last_ins && last_ins->opcode == OP_MOVE &&
1737 ins->sreg1 == last_ins->dreg &&
1738 ins->dreg == last_ins->sreg1) {
1739 last_ins->next = ins->next;
1748 bb->last_ins = last_ins;
1751 static const char*const * ins_spec = sparc_desc;
1753 static inline const char*
1754 get_ins_spec (int opcode)
1756 if (ins_spec [opcode])
1757 return ins_spec [opcode];
1759 return ins_spec [CEE_ADD];
1763 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
1765 MonoSpillInfo **si, *info;
1768 si = &cfg->spill_info_float;
1770 while (i <= spillvar) {
1773 *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1775 cfg->stack_offset += sizeof (double);
1776 cfg->stack_offset = ALIGN_TO (cfg->stack_offset, 8);
1777 info->offset = - cfg->stack_offset;
1781 return MONO_SPARC_STACK_BIAS + (*si)->offset;
1787 g_assert_not_reached ();
1791 /* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
1794 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1796 mono_local_regalloc (cfg, bb);
1800 sparc_patch (guint32 *code, const gpointer target)
1803 guint32 ins = *code;
1804 guint32 op = ins >> 30;
1805 guint32 op2 = (ins >> 22) & 0x7;
1806 guint32 rd = (ins >> 25) & 0x1f;
1807 guint8* target8 = (guint8*)target;
1808 gint64 disp = (target8 - (guint8*)code) >> 2;
1811 // g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
1813 if ((op == 0) && (op2 == 2)) {
1814 if (!sparc_is_imm22 (disp))
1817 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1819 else if ((op == 0) && (op2 == 1)) {
1820 if (!sparc_is_imm19 (disp))
1823 *code = ((ins >> 19) << 19) | (disp & 0x7ffff);
1825 else if ((op == 0) && (op2 == 3)) {
1826 if (!sparc_is_imm16 (disp))
1829 *code &= ~(0x180000 | 0x3fff);
1830 *code |= ((disp << 21) & (0x180000)) | (disp & 0x3fff);
1832 else if ((op == 0) && (op2 == 6)) {
1833 if (!sparc_is_imm22 (disp))
1836 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1838 else if ((op == 0) && (op2 == 4)) {
1839 guint32 ins2 = code [1];
1841 if (((ins2 >> 30) == 2) && (((ins2 >> 19) & 0x3f) == 2)) {
1842 /* sethi followed by or */
1844 sparc_set (p, target8, rd);
1845 while (p <= (code + 1))
1848 else if (ins2 == 0x01000000) {
1849 /* sethi followed by nop */
1851 sparc_set (p, target8, rd);
1852 while (p <= (code + 1))
1855 else if ((sparc_inst_op (ins2) == 3) && (sparc_inst_imm (ins2))) {
1856 /* sethi followed by load/store */
1858 guint32 t = (guint32)target8;
1859 *code &= ~(0x3fffff);
1861 *(code + 1) &= ~(0x3ff);
1862 *(code + 1) |= (t & 0x3ff);
1866 (sparc_inst_rd (ins) == sparc_g1) &&
1867 (sparc_inst_op (c [1]) == 0) && (sparc_inst_op2 (c [1]) == 4) &&
1868 (sparc_inst_op (c [2]) == 2) && (sparc_inst_op3 (c [2]) == 2) &&
1869 (sparc_inst_op (c [3]) == 2) && (sparc_inst_op3 (c [3]) == 2))
1873 reg = sparc_inst_rd (c [1]);
1874 sparc_set (p, target8, reg);
1878 else if ((sparc_inst_op (ins2) == 2) && (sparc_inst_op3 (ins2) == 0x38) &&
1879 (sparc_inst_imm (ins2))) {
1880 /* sethi followed by jmpl */
1882 guint32 t = (guint32)target8;
1883 *code &= ~(0x3fffff);
1885 *(code + 1) &= ~(0x3ff);
1886 *(code + 1) |= (t & 0x3ff);
1892 else if (op == 01) {
1893 gint64 disp = (target8 - (guint8*)code) >> 2;
1895 if (!sparc_is_imm30 (disp))
1897 sparc_call_simple (code, target8 - (guint8*)code);
1899 else if ((op == 2) && (sparc_inst_op3 (ins) == 0x2) && sparc_inst_imm (ins)) {
1901 g_assert (sparc_is_imm13 (target8));
1903 *code |= (guint32)target8;
1905 else if ((sparc_inst_op (ins) == 2) && (sparc_inst_op3 (ins) == 0x7)) {
1906 /* sparc_set case 5. */
1910 reg = sparc_inst_rd (c [3]);
1911 sparc_set (p, target, reg);
1918 // g_print ("patched with 0x%08x\n", ins);
1922 * mono_sparc_emit_save_lmf:
1924 * Emit the code neccesary to push a new entry onto the lmf stack. Used by
1925 * trampolines as well.
1928 mono_sparc_emit_save_lmf (guint32 *code, guint32 lmf_offset)
1931 sparc_sti_imm (code, sparc_o0, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr));
1932 /* Save previous_lmf */
1933 sparc_ldi (code, sparc_o0, sparc_g0, sparc_o7);
1934 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf));
1936 sparc_add_imm (code, FALSE, sparc_fp, lmf_offset, sparc_o7);
1937 sparc_sti (code, sparc_o7, sparc_o0, sparc_g0);
1943 mono_sparc_emit_restore_lmf (guint32 *code, guint32 lmf_offset)
1945 /* Load previous_lmf */
1946 sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), sparc_l0);
1948 sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), sparc_l1);
1949 /* *(lmf) = previous_lmf */
1950 sparc_sti (code, sparc_l0, sparc_l1, sparc_g0);
1955 emit_save_sp_to_lmf (MonoCompile *cfg, guint32 *code)
1958 * Since register windows are saved to the current value of %sp, we need to
1959 * set the sp field in the lmf before the call, not in the prolog.
1961 if (cfg->method->save_lmf) {
1962 gint32 lmf_offset = MONO_SPARC_STACK_BIAS - cfg->arch.lmf_offset;
1965 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
1972 emit_vret_token (MonoInst *ins, guint32 *code)
1974 MonoCallInst *call = (MonoCallInst*)ins;
1978 * The sparc ABI requires that calls to functions which return a structure
1979 * contain an additional unimpl instruction which is checked by the callee.
1981 if (call->signature->pinvoke && MONO_TYPE_ISSTRUCT(call->signature->ret)) {
1982 if (call->signature->ret->type == MONO_TYPE_TYPEDBYREF)
1983 size = mono_type_stack_size (call->signature->ret, NULL);
1985 size = mono_class_native_size (call->signature->ret->data.klass, NULL);
1986 sparc_unimp (code, size & 0xfff);
1993 emit_move_return_value (MonoInst *ins, guint32 *code)
1995 /* Move return value to the target register */
1996 /* FIXME: do more things in the local reg allocator */
1997 switch (ins->opcode) {
1999 case OP_VOIDCALL_REG:
2000 case OP_VOIDCALL_MEMBASE:
2004 case OP_CALL_MEMBASE:
2005 g_assert (ins->dreg == sparc_o0);
2009 case OP_LCALL_MEMBASE:
2011 * ins->dreg is the least significant reg due to the lreg: LCALL rule
2012 * in inssel-long32.brg.
2015 sparc_mov_reg_reg (code, sparc_o0, ins->dreg);
2017 g_assert (ins->dreg == sparc_o1);
2022 case OP_FCALL_MEMBASE:
2024 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4) {
2025 sparc_fmovs (code, sparc_f0, ins->dreg);
2026 sparc_fstod (code, ins->dreg, ins->dreg);
2029 sparc_fmovd (code, sparc_f0, ins->dreg);
2031 sparc_fmovs (code, sparc_f0, ins->dreg);
2032 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4)
2033 sparc_fstod (code, ins->dreg, ins->dreg);
2035 sparc_fmovs (code, sparc_f1, ins->dreg + 1);
2040 case OP_VCALL_MEMBASE:
2050 * emit_load_volatile_arguments:
2052 * Load volatile arguments from the stack to the original input registers.
2053 * Required before a tail call.
2056 emit_load_volatile_arguments (MonoCompile *cfg, guint32 *code)
2058 MonoMethod *method = cfg->method;
2059 MonoMethodSignature *sig;
2064 /* FIXME: Generate intermediate code instead */
2066 sig = mono_method_signature (method);
2068 cinfo = get_call_info (sig, FALSE);
2070 /* This is the opposite of the code in emit_prolog */
2072 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
2073 ArgInfo *ainfo = cinfo->args + i;
2074 gint32 stack_offset;
2076 inst = cfg->varinfo [i];
2078 if (sig->hasthis && (i == 0))
2079 arg_type = &mono_defaults.object_class->byval_arg;
2081 arg_type = sig->params [i - sig->hasthis];
2083 stack_offset = ainfo->offset + ARGS_OFFSET;
2084 ireg = sparc_i0 + ainfo->reg;
2086 if (ainfo->storage == ArgInSplitRegStack) {
2087 g_assert (inst->opcode == OP_REGOFFSET);
2089 if (!sparc_is_imm13 (stack_offset))
2091 sparc_st_imm (code, inst->inst_basereg, stack_offset, sparc_i5);
2094 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
2095 if (ainfo->storage == ArgInIRegPair) {
2096 if (!sparc_is_imm13 (inst->inst_offset + 4))
2098 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2099 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2102 if (ainfo->storage == ArgInSplitRegStack) {
2103 if (stack_offset != inst->inst_offset) {
2104 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_i5);
2105 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2106 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2111 if (ainfo->storage == ArgOnStackPair) {
2112 if (stack_offset != inst->inst_offset) {
2113 /* stack_offset is not dword aligned, so we need to make a copy */
2114 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_o7);
2115 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset);
2117 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2118 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2123 g_assert_not_reached ();
2126 if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
2127 /* Argument in register, but need to be saved to stack */
2128 if (!sparc_is_imm13 (stack_offset))
2130 if ((stack_offset - ARGS_OFFSET) & 0x1)
2131 /* FIXME: Is this ldsb or ldub ? */
2132 sparc_ldsb_imm (code, inst->inst_basereg, stack_offset, ireg);
2134 if ((stack_offset - ARGS_OFFSET) & 0x2)
2135 sparc_ldsh_imm (code, inst->inst_basereg, stack_offset, ireg);
2137 if ((stack_offset - ARGS_OFFSET) & 0x4)
2138 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2141 sparc_ldx_imm (code, inst->inst_basereg, stack_offset, ireg);
2143 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2146 else if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
2147 /* Argument in regpair, but need to be saved to stack */
2148 if (!sparc_is_imm13 (inst->inst_offset + 4))
2150 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2151 sparc_st_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2153 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
2156 else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
2160 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
2161 if (inst->opcode == OP_REGVAR)
2162 /* FIXME: Load the argument into memory */
2172 * mono_sparc_is_virtual_call:
2174 * Determine whenever the instruction at CODE is a virtual call.
2177 mono_sparc_is_virtual_call (guint32 *code)
2184 if ((sparc_inst_op (*code) == 0x2) && (sparc_inst_op3 (*code) == 0x38)) {
2186 * Register indirect call. If it is a virtual call, then the
2187 * instruction in the delay slot is a special kind of nop.
2190 /* Construct special nop */
2191 sparc_or_imm (p, FALSE, sparc_g0, 0xca, sparc_g0);
2194 if (code [1] == p [0])
2202 * mono_arch_get_vcall_slot_addr:
2204 * Determine the vtable slot used by a virtual call.
2207 mono_arch_get_vcall_slot_addr (guint8 *code8, gpointer *regs)
2209 guint32 *code = (guint32*)(gpointer)code8;
2210 guint32 ins = code [0];
2211 guint32 prev_ins = code [-1];
2213 mono_sparc_flushw ();
2215 if (!mono_sparc_is_virtual_call (code))
2218 if ((sparc_inst_op (ins) == 0x2) && (sparc_inst_op3 (ins) == 0x38)) {
2219 if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_i (prev_ins) == 1) && (sparc_inst_op3 (prev_ins) == 0 || sparc_inst_op3 (prev_ins) == 0xb)) {
2220 /* ld [r1 + CONST ], r2; call r2 */
2221 guint32 base = sparc_inst_rs1 (prev_ins);
2222 guint32 disp = sparc_inst_imm13 (prev_ins);
2225 g_assert (sparc_inst_rd (prev_ins) == sparc_inst_rs1 (ins));
2227 g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2229 base_val = regs [base - sparc_o0];
2231 return (gpointer)((guint8*)base_val + disp);
2233 else if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_i (prev_ins) == 0) && (sparc_inst_op3 (prev_ins) == 0)) {
2234 /* set r1, ICONST; ld [r1 + r2], r2; call r2 */
2235 /* Decode a sparc_set32 */
2236 guint32 base = sparc_inst_rs1 (prev_ins);
2239 guint32 s1 = code [-3];
2240 guint32 s2 = code [-2];
2247 g_assert (sparc_inst_op (s1) == 0);
2248 g_assert (sparc_inst_op2 (s1) == 4);
2251 g_assert (sparc_inst_op (s2) == 2);
2252 g_assert (sparc_inst_op3 (s2) == 2);
2253 g_assert (sparc_inst_i (s2) == 1);
2254 g_assert (sparc_inst_rs1 (s2) == sparc_inst_rd (s2));
2255 g_assert (sparc_inst_rd (s1) == sparc_inst_rs1 (s2));
2257 disp = ((s1 & 0x3fffff) << 10) | sparc_inst_imm13 (s2);
2259 g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2261 base_val = regs [base - sparc_o0];
2263 return (gpointer)((guint8*)base_val + disp);
2265 g_assert_not_reached ();
2268 g_assert_not_reached ();
2274 * Some conventions used in the following code.
2275 * 2) The only scratch registers we have are o7 and g1. We try to
2276 * stick to o7 when we can, and use g1 when necessary.
2280 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2285 guint32 *code = (guint32*)(cfg->native_code + cfg->code_len);
2286 MonoInst *last_ins = NULL;
2290 if (cfg->opt & MONO_OPT_PEEPHOLE)
2291 peephole_pass (cfg, bb);
2293 if (cfg->verbose_level > 2)
2294 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2296 cpos = bb->max_offset;
2298 if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2306 offset = (guint8*)code - cfg->native_code;
2308 spec = ins_spec [ins->opcode];
2310 spec = ins_spec [CEE_ADD];
2312 max_len = ((guint8 *)spec)[MONO_INST_LEN];
2314 if (offset > (cfg->code_size - max_len - 16)) {
2315 cfg->code_size *= 2;
2316 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2317 code = (guint32*)(cfg->native_code + offset);
2319 code_start = (guint8*)code;
2320 // if (ins->cil_code)
2321 // g_print ("cil code\n");
2322 mono_debug_record_line_number (cfg, ins, offset);
2324 switch (ins->opcode) {
2325 case OP_STOREI1_MEMBASE_IMM:
2326 EMIT_STORE_MEMBASE_IMM (ins, stb);
2328 case OP_STOREI2_MEMBASE_IMM:
2329 EMIT_STORE_MEMBASE_IMM (ins, sth);
2331 case OP_STORE_MEMBASE_IMM:
2332 EMIT_STORE_MEMBASE_IMM (ins, sti);
2334 case OP_STOREI4_MEMBASE_IMM:
2335 EMIT_STORE_MEMBASE_IMM (ins, st);
2337 case OP_STOREI8_MEMBASE_IMM:
2339 EMIT_STORE_MEMBASE_IMM (ins, stx);
2341 /* Only generated by peephole opts */
2342 g_assert ((ins->inst_offset % 8) == 0);
2343 g_assert (ins->inst_imm == 0);
2344 EMIT_STORE_MEMBASE_IMM (ins, stx);
2347 case OP_STOREI1_MEMBASE_REG:
2348 EMIT_STORE_MEMBASE_REG (ins, stb);
2350 case OP_STOREI2_MEMBASE_REG:
2351 EMIT_STORE_MEMBASE_REG (ins, sth);
2353 case OP_STOREI4_MEMBASE_REG:
2354 EMIT_STORE_MEMBASE_REG (ins, st);
2356 case OP_STOREI8_MEMBASE_REG:
2358 EMIT_STORE_MEMBASE_REG (ins, stx);
2360 /* Only used by OP_MEMSET */
2361 EMIT_STORE_MEMBASE_REG (ins, std);
2364 case OP_STORE_MEMBASE_REG:
2365 EMIT_STORE_MEMBASE_REG (ins, sti);
2369 sparc_ldx (code, ins->inst_c0, sparc_g0, ins->dreg);
2371 sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2376 sparc_ldsw (code, ins->inst_c0, sparc_g0, ins->dreg);
2378 sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2382 sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2385 sparc_set (code, ins->inst_c0, ins->dreg);
2386 sparc_ld (code, ins->dreg, sparc_g0, ins->dreg);
2388 case OP_LOADI4_MEMBASE:
2390 EMIT_LOAD_MEMBASE (ins, ldsw);
2392 EMIT_LOAD_MEMBASE (ins, ld);
2395 case OP_LOADU4_MEMBASE:
2396 EMIT_LOAD_MEMBASE (ins, ld);
2398 case OP_LOADU1_MEMBASE:
2399 EMIT_LOAD_MEMBASE (ins, ldub);
2401 case OP_LOADI1_MEMBASE:
2402 EMIT_LOAD_MEMBASE (ins, ldsb);
2404 case OP_LOADU2_MEMBASE:
2405 EMIT_LOAD_MEMBASE (ins, lduh);
2407 case OP_LOADI2_MEMBASE:
2408 EMIT_LOAD_MEMBASE (ins, ldsh);
2410 case OP_LOAD_MEMBASE:
2412 EMIT_LOAD_MEMBASE (ins, ldx);
2414 EMIT_LOAD_MEMBASE (ins, ld);
2418 case OP_LOADI8_MEMBASE:
2419 EMIT_LOAD_MEMBASE (ins, ldx);
2423 sparc_sll_imm (code, ins->sreg1, 24, sparc_o7);
2424 sparc_sra_imm (code, sparc_o7, 24, ins->dreg);
2427 sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2428 sparc_sra_imm (code, sparc_o7, 16, ins->dreg);
2431 sparc_and_imm (code, FALSE, ins->sreg1, 0xff, ins->dreg);
2434 sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2435 sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
2437 case CEE_CONV_OVF_U4:
2438 /* Only used on V9 */
2439 sparc_cmp_imm (code, ins->sreg1, 0);
2440 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2441 MONO_PATCH_INFO_EXC, "OverflowException");
2442 sparc_branchp (code, 0, sparc_bl, sparc_xcc_short, 0, 0);
2444 sparc_set (code, 1, sparc_o7);
2445 sparc_sllx_imm (code, sparc_o7, 32, sparc_o7);
2446 sparc_cmp (code, ins->sreg1, sparc_o7);
2447 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2448 MONO_PATCH_INFO_EXC, "OverflowException");
2449 sparc_branchp (code, 0, sparc_bge, sparc_xcc_short, 0, 0);
2451 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2453 case CEE_CONV_OVF_I4_UN:
2454 /* Only used on V9 */
2459 /* Only used on V9 */
2460 sparc_srl_imm (code, ins->sreg1, 0, ins->dreg);
2464 /* Only used on V9 */
2465 sparc_sra_imm (code, ins->sreg1, 0, ins->dreg);
2470 sparc_cmp (code, ins->sreg1, ins->sreg2);
2472 case OP_COMPARE_IMM:
2473 case OP_ICOMPARE_IMM:
2474 if (sparc_is_imm13 (ins->inst_imm))
2475 sparc_cmp_imm (code, ins->sreg1, ins->inst_imm);
2477 sparc_set (code, ins->inst_imm, sparc_o7);
2478 sparc_cmp (code, ins->sreg1, sparc_o7);
2483 * gdb does not like encountering 'ta 1' in the debugged code. So
2484 * instead of emitting a trap, we emit a call a C function and place a
2487 //sparc_ta (code, 1);
2488 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, mono_arch_break);
2493 sparc_add (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2497 sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2502 /* according to inssel-long32.brg, this should set cc */
2503 EMIT_ALU_IMM (ins, add, TRUE);
2507 /* according to inssel-long32.brg, this should set cc */
2508 sparc_addx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2512 EMIT_ALU_IMM (ins, addx, TRUE);
2516 sparc_sub (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2520 sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2525 /* according to inssel-long32.brg, this should set cc */
2526 EMIT_ALU_IMM (ins, sub, TRUE);
2530 /* according to inssel-long32.brg, this should set cc */
2531 sparc_subx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2535 EMIT_ALU_IMM (ins, subx, TRUE);
2539 sparc_and (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2543 EMIT_ALU_IMM (ins, and, FALSE);
2547 /* Sign extend sreg1 into %y */
2548 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2549 sparc_wry (code, sparc_o7, sparc_g0);
2550 sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2551 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2555 sparc_wry (code, sparc_g0, sparc_g0);
2556 sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2561 /* Transform division into a shift */
2562 for (i = 1; i < 30; ++i) {
2564 if (ins->inst_imm == imm)
2570 sparc_srl_imm (code, ins->sreg1, 31, sparc_o7);
2571 sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2572 sparc_sra_imm (code, ins->dreg, 1, ins->dreg);
2575 /* http://compilers.iecc.com/comparch/article/93-04-079 */
2576 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2577 sparc_srl_imm (code, sparc_o7, 32 - i, sparc_o7);
2578 sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2579 sparc_sra_imm (code, ins->dreg, i, ins->dreg);
2583 /* Sign extend sreg1 into %y */
2584 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2585 sparc_wry (code, sparc_o7, sparc_g0);
2586 EMIT_ALU_IMM (ins, sdiv, TRUE);
2587 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2593 /* Sign extend sreg1 into %y */
2594 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2595 sparc_wry (code, sparc_o7, sparc_g0);
2596 sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, sparc_o7);
2597 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2598 sparc_smul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2599 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2603 sparc_wry (code, sparc_g0, sparc_g0);
2604 sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2605 sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2606 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2610 /* Sign extend sreg1 into %y */
2611 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2612 sparc_wry (code, sparc_o7, sparc_g0);
2613 if (!sparc_is_imm13 (ins->inst_imm)) {
2614 sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
2615 sparc_sdiv (code, TRUE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
2616 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2617 sparc_smul (code, FALSE, sparc_o7, GP_SCRATCH_REG, sparc_o7);
2620 sparc_sdiv_imm (code, TRUE, ins->sreg1, ins->inst_imm, sparc_o7);
2621 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2622 sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
2624 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2628 sparc_or (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2632 EMIT_ALU_IMM (ins, or, FALSE);
2636 sparc_xor (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2640 EMIT_ALU_IMM (ins, xor, FALSE);
2644 sparc_sll (code, ins->sreg1, ins->sreg2, ins->dreg);
2648 if (ins->inst_imm < (1 << 5))
2649 sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2651 sparc_set (code, ins->inst_imm, sparc_o7);
2652 sparc_sll (code, ins->sreg1, sparc_o7, ins->dreg);
2657 sparc_sra (code, ins->sreg1, ins->sreg2, ins->dreg);
2661 if (ins->inst_imm < (1 << 5))
2662 sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2664 sparc_set (code, ins->inst_imm, sparc_o7);
2665 sparc_sra (code, ins->sreg1, sparc_o7, ins->dreg);
2669 case OP_ISHR_UN_IMM:
2670 if (ins->inst_imm < (1 << 5))
2671 sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2673 sparc_set (code, ins->inst_imm, sparc_o7);
2674 sparc_srl (code, ins->sreg1, sparc_o7, ins->dreg);
2679 sparc_srl (code, ins->sreg1, ins->sreg2, ins->dreg);
2682 sparc_sllx (code, ins->sreg1, ins->sreg2, ins->dreg);
2685 if (ins->inst_imm < (1 << 6))
2686 sparc_sllx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2688 sparc_set (code, ins->inst_imm, sparc_o7);
2689 sparc_sllx (code, ins->sreg1, sparc_o7, ins->dreg);
2693 sparc_srax (code, ins->sreg1, ins->sreg2, ins->dreg);
2696 if (ins->inst_imm < (1 << 6))
2697 sparc_srax_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2699 sparc_set (code, ins->inst_imm, sparc_o7);
2700 sparc_srax (code, ins->sreg1, sparc_o7, ins->dreg);
2704 sparc_srlx (code, ins->sreg1, ins->sreg2, ins->dreg);
2706 case OP_LSHR_UN_IMM:
2707 if (ins->inst_imm < (1 << 6))
2708 sparc_srlx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2710 sparc_set (code, ins->inst_imm, sparc_o7);
2711 sparc_srlx (code, ins->sreg1, sparc_o7, ins->dreg);
2716 /* can't use sparc_not */
2717 sparc_xnor (code, FALSE, ins->sreg1, sparc_g0, ins->dreg);
2721 /* can't use sparc_neg */
2722 sparc_sub (code, FALSE, sparc_g0, ins->sreg1, ins->dreg);
2726 sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2732 if ((ins->inst_imm == 1) && (ins->sreg1 == ins->dreg))
2735 /* Transform multiplication into a shift */
2736 for (i = 0; i < 30; ++i) {
2738 if (ins->inst_imm == imm)
2742 sparc_sll_imm (code, ins->sreg1, i, ins->dreg);
2744 EMIT_ALU_IMM (ins, smul, FALSE);
2749 sparc_smul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2750 sparc_rdy (code, sparc_g1);
2751 sparc_sra_imm (code, ins->dreg, 31, sparc_o7);
2752 sparc_cmp (code, sparc_g1, sparc_o7);
2753 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2755 case CEE_MUL_OVF_UN:
2756 case OP_IMUL_OVF_UN:
2757 sparc_umul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2758 sparc_rdy (code, sparc_o7);
2759 sparc_cmp (code, sparc_o7, sparc_g0);
2760 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2764 sparc_set (code, ins->inst_c0, ins->dreg);
2767 sparc_set (code, ins->inst_l, ins->dreg);
2770 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2771 sparc_set_template (code, ins->dreg);
2777 if (ins->sreg1 != ins->dreg)
2778 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2781 /* Only used on V9 */
2782 if (ins->sreg1 != ins->dreg)
2783 sparc_fmovd (code, ins->sreg1, ins->dreg);
2785 case OP_SPARC_SETFREG_FLOAT:
2786 /* Only used on V9 */
2787 sparc_fdtos (code, ins->sreg1, ins->dreg);
2790 if (cfg->method->save_lmf)
2793 code = emit_load_volatile_arguments (cfg, code);
2794 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2795 sparc_set_template (code, sparc_o7);
2796 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_g0);
2797 /* Restore parent frame in delay slot */
2798 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
2801 /* ensure ins->sreg1 is not NULL */
2802 sparc_ld_imm (code, ins->sreg1, 0, sparc_g0);
2805 sparc_add_imm (code, FALSE, sparc_fp, cfg->sig_cookie, sparc_o7);
2806 sparc_sti_imm (code, sparc_o7, ins->sreg1, 0);
2813 call = (MonoCallInst*)ins;
2814 g_assert (!call->virtual);
2815 code = emit_save_sp_to_lmf (cfg, code);
2816 if (ins->flags & MONO_INST_HAS_METHOD)
2817 code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2819 code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2821 code = emit_vret_token (ins, code);
2822 code = emit_move_return_value (ins, code);
2827 case OP_VOIDCALL_REG:
2829 call = (MonoCallInst*)ins;
2830 code = emit_save_sp_to_lmf (cfg, code);
2831 sparc_jmpl (code, ins->sreg1, sparc_g0, sparc_callsite);
2833 * We emit a special kind of nop in the delay slot to tell the
2834 * trampoline code that this is a virtual call, thus an unbox
2835 * trampoline might need to be called.
2838 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2842 code = emit_vret_token (ins, code);
2843 code = emit_move_return_value (ins, code);
2845 case OP_FCALL_MEMBASE:
2846 case OP_LCALL_MEMBASE:
2847 case OP_VCALL_MEMBASE:
2848 case OP_VOIDCALL_MEMBASE:
2849 case OP_CALL_MEMBASE:
2850 call = (MonoCallInst*)ins;
2851 code = emit_save_sp_to_lmf (cfg, code);
2852 if (sparc_is_imm13 (ins->inst_offset)) {
2853 sparc_ldi_imm (code, ins->inst_basereg, ins->inst_offset, sparc_o7);
2855 sparc_set (code, ins->inst_offset, sparc_o7);
2856 sparc_ldi (code, ins->inst_basereg, sparc_o7, sparc_o7);
2858 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_callsite);
2860 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2864 code = emit_vret_token (ins, code);
2865 code = emit_move_return_value (ins, code);
2868 if (mono_method_signature (cfg->method)->ret->type == MONO_TYPE_R4)
2869 sparc_fdtos (code, ins->sreg1, sparc_f0);
2872 sparc_fmovd (code, ins->sreg1, ins->dreg);
2874 /* FIXME: Why not use fmovd ? */
2875 sparc_fmovs (code, ins->sreg1, ins->dreg);
2876 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2881 g_assert_not_reached ();
2886 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2887 /* Perform stack touching */
2891 /* Keep alignment */
2892 sparc_add_imm (code, FALSE, ins->sreg1, MONO_ARCH_FRAME_ALIGNMENT - 1, ins->dreg);
2893 sparc_set (code, ~(MONO_ARCH_FRAME_ALIGNMENT - 1), sparc_o7);
2894 sparc_and (code, FALSE, ins->dreg, sparc_o7, ins->dreg);
2896 if ((ins->flags & MONO_INST_INIT) && (ins->sreg1 == ins->dreg)) {
2898 size_reg = sparc_g4;
2900 size_reg = sparc_g1;
2902 sparc_mov_reg_reg (code, ins->dreg, size_reg);
2905 size_reg = ins->sreg1;
2907 sparc_sub (code, FALSE, sparc_sp, ins->dreg, ins->dreg);
2908 /* Keep %sp valid at all times */
2909 sparc_mov_reg_reg (code, ins->dreg, sparc_sp);
2910 g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
2911 sparc_add_imm (code, FALSE, ins->dreg, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
2913 if (ins->flags & MONO_INST_INIT) {
2915 /* Initialize memory region */
2916 sparc_cmp_imm (code, size_reg, 0);
2918 sparc_branch (code, 0, sparc_be, 0);
2920 sparc_set (code, 0, sparc_o7);
2921 sparc_sub_imm (code, 0, size_reg, sparcv9 ? 8 : 4, size_reg);
2925 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
2927 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
2928 sparc_cmp (code, sparc_o7, size_reg);
2930 sparc_branch (code, 0, sparc_bl, 0);
2931 sparc_patch (br [2], br [1]);
2933 sparc_add_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2934 sparc_patch (br [0], code);
2938 case OP_SPARC_LOCALLOC_IMM: {
2939 gint32 offset = ins->inst_c0;
2941 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2942 /* Perform stack touching */
2946 offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
2947 if (sparc_is_imm13 (offset))
2948 sparc_sub_imm (code, FALSE, sparc_sp, offset, sparc_sp);
2950 sparc_set (code, offset, sparc_o7);
2951 sparc_sub (code, FALSE, sparc_sp, sparc_o7, sparc_sp);
2953 g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
2954 sparc_add_imm (code, FALSE, sparc_sp, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
2955 if ((ins->flags & MONO_INST_INIT) && (offset > 0)) {
2961 while (i < offset) {
2963 sparc_stx_imm (code, sparc_g0, ins->dreg, i);
2967 sparc_st_imm (code, sparc_g0, ins->dreg, i);
2973 sparc_set (code, offset, sparc_o7);
2974 sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2975 /* beginning of loop */
2978 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
2980 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
2981 sparc_cmp_imm (code, sparc_o7, 0);
2983 sparc_branch (code, 0, sparc_bne, 0);
2985 sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2986 sparc_patch (br [1], br [0]);
2992 /* The return is done in the epilog */
2993 g_assert_not_reached ();
2996 sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2997 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2998 (gpointer)"mono_arch_throw_exception");
3002 sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3003 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3004 (gpointer)"mono_arch_rethrow_exception");
3007 case OP_START_HANDLER: {
3009 * The START_HANDLER instruction marks the beginning of a handler
3010 * block. It is called using a call instruction, so %o7 contains
3011 * the return address. Since the handler executes in the same stack
3012 * frame as the method itself, we can't use save/restore to save
3013 * the return address. Instead, we save it into a dedicated
3016 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3017 if (!sparc_is_imm13 (spvar->inst_offset)) {
3018 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3019 sparc_sti (code, sparc_o7, spvar->inst_basereg, GP_SCRATCH_REG);
3022 sparc_sti_imm (code, sparc_o7, spvar->inst_basereg, spvar->inst_offset);
3025 case OP_ENDFILTER: {
3026 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3027 if (!sparc_is_imm13 (spvar->inst_offset)) {
3028 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3029 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
3032 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3033 sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3035 sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3038 case CEE_ENDFINALLY: {
3039 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3040 if (!sparc_is_imm13 (spvar->inst_offset)) {
3041 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3042 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
3045 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3046 sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3050 case OP_CALL_HANDLER:
3051 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3052 /* This is a jump inside the method, so call_simple works even on V9 */
3053 sparc_call_simple (code, 0);
3057 ins->inst_c0 = (guint8*)code - cfg->native_code;
3060 //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
3061 if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
3063 if (ins->flags & MONO_INST_BRLABEL) {
3064 if (ins->inst_i0->inst_c0) {
3065 gint32 disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2;
3066 g_assert (sparc_is_imm22 (disp));
3067 sparc_branch (code, 1, sparc_ba, disp);
3069 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
3070 sparc_branch (code, 1, sparc_ba, 0);
3073 if (ins->inst_target_bb->native_offset) {
3074 gint32 disp = (ins->inst_target_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2;
3075 g_assert (sparc_is_imm22 (disp));
3076 sparc_branch (code, 1, sparc_ba, disp);
3078 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3079 sparc_branch (code, 1, sparc_ba, 0);
3085 sparc_jmp (code, ins->sreg1, sparc_g0);
3093 if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3094 sparc_clr_reg (code, ins->dreg);
3095 sparc_movcc_imm (code, sparc_xcc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3098 sparc_clr_reg (code, ins->dreg);
3100 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), DEFAULT_ICC, 0, 2);
3102 sparc_branch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3105 sparc_set (code, 1, ins->dreg);
3113 if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3114 sparc_clr_reg (code, ins->dreg);
3115 sparc_movcc_imm (code, sparc_icc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3118 sparc_clr_reg (code, ins->dreg);
3119 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), sparc_icc_short, 0, 2);
3121 sparc_set (code, 1, ins->dreg);
3124 case OP_COND_EXC_EQ:
3125 case OP_COND_EXC_NE_UN:
3126 case OP_COND_EXC_LT:
3127 case OP_COND_EXC_LT_UN:
3128 case OP_COND_EXC_GT:
3129 case OP_COND_EXC_GT_UN:
3130 case OP_COND_EXC_GE:
3131 case OP_COND_EXC_GE_UN:
3132 case OP_COND_EXC_LE:
3133 case OP_COND_EXC_LE_UN:
3134 case OP_COND_EXC_OV:
3135 case OP_COND_EXC_NO:
3137 case OP_COND_EXC_NC:
3138 EMIT_COND_SYSTEM_EXCEPTION (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1);
3140 case OP_SPARC_COND_EXC_EQZ:
3141 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brz, ins->inst_p1);
3143 case OP_SPARC_COND_EXC_GEZ:
3144 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgez, ins->inst_p1);
3146 case OP_SPARC_COND_EXC_GTZ:
3147 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgz, ins->inst_p1);
3149 case OP_SPARC_COND_EXC_LEZ:
3150 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlez, ins->inst_p1);
3152 case OP_SPARC_COND_EXC_LTZ:
3153 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlz, ins->inst_p1);
3155 case OP_SPARC_COND_EXC_NEZ:
3156 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brnz, ins->inst_p1);
3158 case OP_COND_EXC_IOV:
3159 case OP_COND_EXC_IC:
3160 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1, TRUE, sparc_icc_short);
3173 EMIT_COND_BRANCH_PREDICTED (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3175 EMIT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3189 /* Only used on V9 */
3190 EMIT_COND_BRANCH_ICC (ins, opcode_to_sparc_cond (ins->opcode), 1, 1, sparc_icc_short);
3195 EMIT_COND_BRANCH_BPR (ins, brz, 1, 1, 1);
3197 case OP_SPARC_BRLEZ:
3198 EMIT_COND_BRANCH_BPR (ins, brlez, 1, 1, 1);
3201 EMIT_COND_BRANCH_BPR (ins, brlz, 1, 1, 1);
3204 EMIT_COND_BRANCH_BPR (ins, brnz, 1, 1, 1);
3207 EMIT_COND_BRANCH_BPR (ins, brgz, 1, 1, 1);
3209 case OP_SPARC_BRGEZ:
3210 EMIT_COND_BRANCH_BPR (ins, brgez, 1, 1, 1);
3213 /* floating point opcodes */
3215 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
3217 sparc_set_template (code, sparc_o7);
3219 sparc_sethi (code, 0, sparc_o7);
3221 sparc_lddf_imm (code, sparc_o7, 0, ins->dreg);
3224 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
3226 sparc_set_template (code, sparc_o7);
3228 sparc_sethi (code, 0, sparc_o7);
3230 sparc_ldf_imm (code, sparc_o7, 0, FP_SCRATCH_REG);
3232 /* Extend to double */
3233 sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3235 case OP_STORER8_MEMBASE_REG:
3236 if (!sparc_is_imm13 (ins->inst_offset + 4)) {
3237 sparc_set (code, ins->inst_offset, sparc_o7);
3238 /* SPARCV9 handles misaligned fp loads/stores */
3239 if (!v64 && (ins->inst_offset % 8)) {
3241 sparc_add (code, FALSE, ins->inst_destbasereg, sparc_o7, sparc_o7);
3242 sparc_stf (code, ins->sreg1, sparc_o7, sparc_g0);
3243 sparc_stf_imm (code, ins->sreg1 + 1, sparc_o7, 4);
3245 sparc_stdf (code, ins->sreg1, ins->inst_destbasereg, sparc_o7);
3248 if (!v64 && (ins->inst_offset % 8)) {
3250 sparc_stf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3251 sparc_stf_imm (code, ins->sreg1 + 1, ins->inst_destbasereg, ins->inst_offset + 4);
3253 sparc_stdf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3256 case OP_LOADR8_MEMBASE:
3257 EMIT_LOAD_MEMBASE (ins, lddf);
3259 case OP_STORER4_MEMBASE_REG:
3260 /* This requires a double->single conversion */
3261 sparc_fdtos (code, ins->sreg1, FP_SCRATCH_REG);
3262 if (!sparc_is_imm13 (ins->inst_offset)) {
3263 sparc_set (code, ins->inst_offset, sparc_o7);
3264 sparc_stf (code, FP_SCRATCH_REG, ins->inst_destbasereg, sparc_o7);
3267 sparc_stf_imm (code, FP_SCRATCH_REG, ins->inst_destbasereg, ins->inst_offset);
3269 case OP_LOADR4_MEMBASE: {
3270 /* ldf needs a single precision register */
3271 int dreg = ins->dreg;
3272 ins->dreg = FP_SCRATCH_REG;
3273 EMIT_LOAD_MEMBASE (ins, ldf);
3275 /* Extend to double */
3276 sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3281 sparc_fmovd (code, ins->sreg1, ins->dreg);
3283 sparc_fmovs (code, ins->sreg1, ins->dreg);
3284 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3288 gint32 offset = mono_spillvar_offset_float (cfg, 0);
3290 if (!sparc_is_imm13 (offset)) {
3291 sparc_set (code, offset, sparc_o7);
3292 sparc_stx (code, ins->sreg1, sparc_sp, offset);
3293 sparc_lddf (code, sparc_sp, offset, FP_SCRATCH_REG);
3295 sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3296 sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3298 sparc_fxtos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3300 if (!sparc_is_imm13 (offset)) {
3301 sparc_set (code, offset, sparc_o7);
3302 sparc_st (code, ins->sreg1, sparc_sp, sparc_o7);
3303 sparc_ldf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3305 sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3306 sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3308 sparc_fitos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3310 sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3314 gint32 offset = mono_spillvar_offset_float (cfg, 0);
3316 if (!sparc_is_imm13 (offset)) {
3317 sparc_set (code, offset, sparc_o7);
3318 sparc_stx (code, ins->sreg1, sparc_sp, sparc_o7);
3319 sparc_lddf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3321 sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3322 sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3324 sparc_fxtod (code, FP_SCRATCH_REG, ins->dreg);
3326 if (!sparc_is_imm13 (offset)) {
3327 sparc_set (code, offset, sparc_o7);
3328 sparc_st (code, ins->sreg1, sparc_sp, sparc_o7);
3329 sparc_ldf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3331 sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3332 sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3334 sparc_fitod (code, FP_SCRATCH_REG, ins->dreg);
3338 case OP_FCONV_TO_I1:
3339 case OP_FCONV_TO_U1:
3340 case OP_FCONV_TO_I2:
3341 case OP_FCONV_TO_U2:
3346 case OP_FCONV_TO_I4:
3347 case OP_FCONV_TO_U4: {
3348 gint32 offset = mono_spillvar_offset_float (cfg, 0);
3349 sparc_fdtoi (code, ins->sreg1, FP_SCRATCH_REG);
3350 if (!sparc_is_imm13 (offset)) {
3351 sparc_set (code, offset, sparc_o7);
3352 sparc_stdf (code, FP_SCRATCH_REG, sparc_sp, sparc_o7);
3353 sparc_ld (code, sparc_sp, sparc_o7, ins->dreg);
3355 sparc_stdf_imm (code, FP_SCRATCH_REG, sparc_sp, offset);
3356 sparc_ld_imm (code, sparc_sp, offset, ins->dreg);
3359 switch (ins->opcode) {
3360 case OP_FCONV_TO_I1:
3361 case OP_FCONV_TO_U1:
3362 sparc_and_imm (code, 0, ins->dreg, 0xff, ins->dreg);
3364 case OP_FCONV_TO_I2:
3365 case OP_FCONV_TO_U2:
3366 sparc_set (code, 0xffff, sparc_o7);
3367 sparc_and (code, 0, ins->dreg, sparc_o7, ins->dreg);
3374 case OP_FCONV_TO_I8:
3375 case OP_FCONV_TO_U8:
3377 g_assert_not_reached ();
3381 g_assert_not_reached ();
3383 case OP_LCONV_TO_R_UN: {
3385 g_assert_not_reached ();
3388 case OP_LCONV_TO_OVF_I: {
3389 guint32 *br [3], *label [1];
3392 * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3394 sparc_cmp_imm (code, ins->sreg1, 0);
3396 sparc_branch (code, 1, sparc_bneg, 0);
3400 /* ms word must be 0 */
3401 sparc_cmp_imm (code, ins->sreg2, 0);
3403 sparc_branch (code, 1, sparc_be, 0);
3408 EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_ba, "OverflowException");
3411 sparc_patch (br [0], code);
3413 /* ms word must 0xfffffff */
3414 sparc_cmp_imm (code, ins->sreg2, -1);
3416 sparc_branch (code, 1, sparc_bne, 0);
3418 sparc_patch (br [2], label [0]);
3421 sparc_patch (br [1], code);
3422 if (ins->sreg1 != ins->dreg)
3423 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
3427 sparc_faddd (code, ins->sreg1, ins->sreg2, ins->dreg);
3430 sparc_fsubd (code, ins->sreg1, ins->sreg2, ins->dreg);
3433 sparc_fmuld (code, ins->sreg1, ins->sreg2, ins->dreg);
3436 sparc_fdivd (code, ins->sreg1, ins->sreg2, ins->dreg);
3440 sparc_fnegd (code, ins->sreg1, ins->dreg);
3442 /* FIXME: why don't use fnegd ? */
3443 sparc_fnegs (code, ins->sreg1, ins->dreg);
3447 sparc_fdivd (code, ins->sreg1, ins->sreg2, FP_SCRATCH_REG);
3448 sparc_fmuld (code, ins->sreg2, FP_SCRATCH_REG, FP_SCRATCH_REG);
3449 sparc_fsubd (code, ins->sreg1, FP_SCRATCH_REG, ins->dreg);
3452 sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3459 sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3460 sparc_clr_reg (code, ins->dreg);
3461 switch (ins->opcode) {
3464 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 4);
3466 sparc_set (code, 1, ins->dreg);
3467 sparc_fbranch (code, 1, sparc_fbu, 2);
3469 sparc_set (code, 1, ins->dreg);
3472 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3474 sparc_set (code, 1, ins->dreg);
3480 EMIT_FLOAT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3483 /* clt.un + brfalse */
3485 sparc_fbranch (code, 1, sparc_fbul, 0);
3488 EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3489 sparc_patch (p, (guint8*)code);
3493 /* cgt.un + brfalse */
3495 sparc_fbranch (code, 1, sparc_fbug, 0);
3498 EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3499 sparc_patch (p, (guint8*)code);
3503 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbne, 1, 1);
3504 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3507 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbl, 1, 1);
3508 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3511 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbg, 1, 1);
3512 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3515 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbge, 1, 1);
3516 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3519 EMIT_FLOAT_COND_BRANCH (ins, sparc_fble, 1, 1);
3520 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3522 case CEE_CKFINITE: {
3523 gint32 offset = mono_spillvar_offset_float (cfg, 0);
3524 if (!sparc_is_imm13 (offset)) {
3525 sparc_set (code, offset, sparc_o7);
3526 sparc_stdf (code, ins->sreg1, sparc_sp, sparc_o7);
3527 sparc_lduh (code, sparc_sp, sparc_o7, sparc_o7);
3529 sparc_stdf_imm (code, ins->sreg1, sparc_sp, offset);
3530 sparc_lduh_imm (code, sparc_sp, offset, sparc_o7);
3532 sparc_srl_imm (code, sparc_o7, 4, sparc_o7);
3533 sparc_and_imm (code, FALSE, sparc_o7, 2047, sparc_o7);
3534 sparc_cmp_imm (code, sparc_o7, 2047);
3535 EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_be, "ArithmeticException");
3537 sparc_fmovd (code, ins->sreg1, ins->dreg);
3539 sparc_fmovs (code, ins->sreg1, ins->dreg);
3540 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3545 case OP_MEMORY_BARRIER:
3546 sparc_membar (code, sparc_membar_all);
3551 g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
3553 g_warning ("%s:%d: unknown opcode %s\n", __FILE__, __LINE__, mono_inst_name (ins->opcode));
3555 g_assert_not_reached ();
3558 if ((((guint8*)code) - code_start) > max_len) {
3559 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3560 mono_inst_name (ins->opcode), max_len, ((guint8*)code) - code_start);
3561 g_assert_not_reached ();
3571 cfg->code_len = (guint8*)code - cfg->native_code;
3575 mono_arch_register_lowlevel_calls (void)
3577 mono_register_jit_icall (mono_arch_break, "mono_arch_break", NULL, TRUE);
3578 mono_register_jit_icall (mono_arch_get_lmf_addr, "mono_arch_get_lmf_addr", NULL, TRUE);
3582 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3584 MonoJumpInfo *patch_info;
3586 /* FIXME: Move part of this to arch independent code */
3587 for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3588 unsigned char *ip = patch_info->ip.i + code;
3591 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3593 switch (patch_info->type) {
3594 case MONO_PATCH_INFO_NONE:
3596 case MONO_PATCH_INFO_CLASS_INIT: {
3597 guint32 *ip2 = (guint32*)ip;
3598 /* Might already been changed to a nop */
3600 sparc_set_template (ip2, sparc_o7);
3601 sparc_jmpl (ip2, sparc_o7, sparc_g0, sparc_o7);
3603 sparc_call_simple (ip2, 0);
3607 case MONO_PATCH_INFO_METHOD_JUMP: {
3608 guint32 *ip2 = (guint32*)ip;
3609 /* Might already been patched */
3610 sparc_set_template (ip2, sparc_o7);
3616 sparc_patch ((guint32*)ip, target);
3621 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3624 guint32 *code = (guint32*)p;
3625 MonoMethodSignature *sig = mono_method_signature (cfg->method);
3628 /* Save registers to stack */
3629 for (i = 0; i < 6; ++i)
3630 sparc_sti_imm (code, sparc_i0 + i, sparc_fp, ARGS_OFFSET + (i * sizeof (gpointer)));
3632 cinfo = get_call_info (sig, FALSE);
3634 /* Save float regs on V9, since they are caller saved */
3635 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3636 ArgInfo *ainfo = cinfo->args + i;
3637 gint32 stack_offset;
3639 stack_offset = ainfo->offset + ARGS_OFFSET;
3641 if (ainfo->storage == ArgInFloatReg) {
3642 if (!sparc_is_imm13 (stack_offset))
3644 sparc_stf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3646 else if (ainfo->storage == ArgInDoubleReg) {
3647 /* The offset is guaranteed to be aligned by the ABI rules */
3648 sparc_stdf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3652 sparc_set (code, cfg->method, sparc_o0);
3653 sparc_add_imm (code, FALSE, sparc_fp, MONO_SPARC_STACK_BIAS, sparc_o1);
3655 mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
3658 /* Restore float regs on V9 */
3659 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3660 ArgInfo *ainfo = cinfo->args + i;
3661 gint32 stack_offset;
3663 stack_offset = ainfo->offset + ARGS_OFFSET;
3665 if (ainfo->storage == ArgInFloatReg) {
3666 if (!sparc_is_imm13 (stack_offset))
3668 sparc_ldf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3670 else if (ainfo->storage == ArgInDoubleReg) {
3671 /* The offset is guaranteed to be aligned by the ABI rules */
3672 sparc_lddf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3690 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3692 guint32 *code = (guint32*)p;
3693 int save_mode = SAVE_NONE;
3694 MonoMethod *method = cfg->method;
3696 switch (mono_type_get_underlying_type (mono_method_signature (method)->ret)->type) {
3697 case MONO_TYPE_VOID:
3698 /* special case string .ctor icall */
3699 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
3700 save_mode = SAVE_ONE;
3702 save_mode = SAVE_NONE;
3707 save_mode = SAVE_ONE;
3709 save_mode = SAVE_TWO;
3714 save_mode = SAVE_FP;
3716 case MONO_TYPE_VALUETYPE:
3717 save_mode = SAVE_STRUCT;
3720 save_mode = SAVE_ONE;
3724 /* Save the result to the stack and also put it into the output registers */
3726 switch (save_mode) {
3729 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
3730 sparc_st_imm (code, sparc_i0, sparc_fp, 72);
3731 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3732 sparc_mov_reg_reg (code, sparc_i1, sparc_o2);
3735 sparc_sti_imm (code, sparc_i0, sparc_fp, ARGS_OFFSET);
3736 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3740 sparc_stdf_imm (code, sparc_f0, sparc_fp, ARGS_OFFSET);
3742 sparc_stdf_imm (code, sparc_f0, sparc_fp, 72);
3743 sparc_ld_imm (code, sparc_fp, 72, sparc_o1);
3744 sparc_ld_imm (code, sparc_fp, 72 + 4, sparc_o2);
3749 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3751 sparc_ld_imm (code, sparc_fp, 64, sparc_o1);
3759 sparc_set (code, cfg->method, sparc_o0);
3761 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, func);
3764 /* Restore result */
3766 switch (save_mode) {
3768 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
3769 sparc_ld_imm (code, sparc_fp, 72, sparc_i0);
3772 sparc_ldi_imm (code, sparc_fp, ARGS_OFFSET, sparc_i0);
3775 sparc_lddf_imm (code, sparc_fp, ARGS_OFFSET, sparc_f0);
3786 mono_arch_emit_prolog (MonoCompile *cfg)
3788 MonoMethod *method = cfg->method;
3789 MonoMethodSignature *sig;
3795 cfg->code_size = 256;
3796 cfg->native_code = g_malloc (cfg->code_size);
3797 code = (guint32*)cfg->native_code;
3799 /* FIXME: Generate intermediate code instead */
3801 offset = cfg->stack_offset;
3802 offset += (16 * sizeof (gpointer)); /* register save area */
3804 offset += 4; /* struct/union return pointer */
3807 /* add parameter area size for called functions */
3808 if (cfg->param_area < (6 * sizeof (gpointer)))
3809 /* Reserve space for the first 6 arguments even if it is unused */
3810 offset += 6 * sizeof (gpointer);
3812 offset += cfg->param_area;
3814 /* align the stack size */
3815 offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3818 * localloc'd memory is stored between the local variables (whose
3819 * size is given by cfg->stack_offset), and between the space reserved
3822 cfg->arch.localloc_offset = offset - cfg->stack_offset;
3824 cfg->stack_offset = offset;
3826 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3827 /* Perform stack touching */
3831 if (!sparc_is_imm13 (- cfg->stack_offset)) {
3832 /* Can't use sparc_o7 here, since we're still in the caller's frame */
3833 sparc_set (code, (- cfg->stack_offset), GP_SCRATCH_REG);
3834 sparc_save (code, sparc_sp, GP_SCRATCH_REG, sparc_sp);
3837 sparc_save_imm (code, sparc_sp, - cfg->stack_offset, sparc_sp);
3840 if (strstr (cfg->method->name, "foo")) {
3841 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
3842 sparc_call_simple (code, 0);
3847 sig = mono_method_signature (method);
3849 cinfo = get_call_info (sig, FALSE);
3851 /* Keep in sync with emit_load_volatile_arguments */
3852 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3853 ArgInfo *ainfo = cinfo->args + i;
3854 gint32 stack_offset;
3856 inst = cfg->varinfo [i];
3858 if (sig->hasthis && (i == 0))
3859 arg_type = &mono_defaults.object_class->byval_arg;
3861 arg_type = sig->params [i - sig->hasthis];
3863 stack_offset = ainfo->offset + ARGS_OFFSET;
3865 /* Save the split arguments so they will reside entirely on the stack */
3866 if (ainfo->storage == ArgInSplitRegStack) {
3867 /* Save the register to the stack */
3868 g_assert (inst->opcode == OP_REGOFFSET);
3869 if (!sparc_is_imm13 (stack_offset))
3871 sparc_st_imm (code, sparc_i5, inst->inst_basereg, stack_offset);
3874 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
3875 /* Save the argument to a dword aligned stack location */
3877 * stack_offset contains the offset of the argument on the stack.
3878 * inst->inst_offset contains the dword aligned offset where the value
3881 if (ainfo->storage == ArgInIRegPair) {
3882 if (!sparc_is_imm13 (inst->inst_offset + 4))
3884 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3885 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3888 if (ainfo->storage == ArgInSplitRegStack) {
3890 g_assert_not_reached ();
3892 if (stack_offset != inst->inst_offset) {
3893 /* stack_offset is not dword aligned, so we need to make a copy */
3894 sparc_st_imm (code, sparc_i5, inst->inst_basereg, inst->inst_offset);
3895 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3896 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3900 if (ainfo->storage == ArgOnStackPair) {
3902 g_assert_not_reached ();
3904 if (stack_offset != inst->inst_offset) {
3905 /* stack_offset is not dword aligned, so we need to make a copy */
3906 sparc_ld_imm (code, sparc_fp, stack_offset, sparc_o7);
3907 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset);
3908 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3909 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3913 g_assert_not_reached ();
3916 if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
3917 /* Argument in register, but need to be saved to stack */
3918 if (!sparc_is_imm13 (stack_offset))
3920 if ((stack_offset - ARGS_OFFSET) & 0x1)
3921 sparc_stb_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3923 if ((stack_offset - ARGS_OFFSET) & 0x2)
3924 sparc_sth_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3926 if ((stack_offset - ARGS_OFFSET) & 0x4)
3927 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3930 sparc_stx_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3932 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3936 if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
3940 /* Argument in regpair, but need to be saved to stack */
3941 if (!sparc_is_imm13 (inst->inst_offset + 4))
3943 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3944 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3946 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
3947 if (!sparc_is_imm13 (stack_offset))
3949 sparc_stf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
3951 else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
3952 /* The offset is guaranteed to be aligned by the ABI rules */
3953 sparc_stdf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
3956 if ((ainfo->storage == ArgInFloatReg) && (inst->opcode == OP_REGVAR)) {
3957 /* Need to move into the a double precision register */
3958 sparc_fstod (code, ainfo->reg, ainfo->reg - 1);
3961 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
3962 if (inst->opcode == OP_REGVAR)
3963 /* FIXME: Load the argument into memory */
3969 if (cfg->method->save_lmf) {
3970 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
3973 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3974 sparc_set_template (code, sparc_o7);
3975 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ip));
3977 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
3979 sparc_sti_imm (code, sparc_fp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebp));
3981 /* FIXME: add a relocation for this */
3982 sparc_set (code, cfg->method, sparc_o7);
3983 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method));
3985 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3986 (gpointer)"mono_arch_get_lmf_addr");
3989 code = (guint32*)mono_sparc_emit_save_lmf (code, lmf_offset);
3992 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3993 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
3995 cfg->code_len = (guint8*)code - cfg->native_code;
3997 g_assert (cfg->code_len <= cfg->code_size);
3999 return (guint8*)code;
4003 mono_arch_emit_epilog (MonoCompile *cfg)
4005 MonoMethod *method = cfg->method;
4008 int max_epilog_size = 16 + 20 * 4;
4010 if (cfg->method->save_lmf)
4011 max_epilog_size += 128;
4013 if (mono_jit_trace_calls != NULL)
4014 max_epilog_size += 50;
4016 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
4017 max_epilog_size += 50;
4019 while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
4020 cfg->code_size *= 2;
4021 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4022 mono_jit_stats.code_reallocs++;
4025 code = (guint32*)(cfg->native_code + cfg->code_len);
4027 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4028 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
4030 if (cfg->method->save_lmf) {
4031 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
4033 code = mono_sparc_emit_restore_lmf (code, lmf_offset);
4037 * The V8 ABI requires that calls to functions which return a structure
4040 if (!v64 && mono_method_signature (cfg->method)->pinvoke && MONO_TYPE_ISSTRUCT(mono_method_signature (cfg->method)->ret))
4041 sparc_jmpl_imm (code, sparc_i7, 12, sparc_g0);
4045 /* Only fold last instruction into the restore if the exit block has an in count of 1
4046 and the previous block hasn't been optimized away since it may have an in count > 1 */
4047 if (cfg->bb_exit->in_count == 1 && cfg->bb_exit->in_bb[0]->native_offset != cfg->bb_exit->native_offset)
4050 /* Try folding last instruction into the restore */
4051 if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && sparc_inst_imm (code [-2]) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4052 /* or reg, imm, %i0 */
4053 int reg = sparc_inst_rs1 (code [-2]);
4054 int imm = sparc_inst_imm13 (code [-2]);
4055 code [-2] = code [-1];
4057 sparc_restore_imm (code, reg, imm, sparc_o0);
4060 if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && (!sparc_inst_imm (code [-2])) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4061 /* or reg, reg, %i0 */
4062 int reg1 = sparc_inst_rs1 (code [-2]);
4063 int reg2 = sparc_inst_rs2 (code [-2]);
4064 code [-2] = code [-1];
4066 sparc_restore (code, reg1, reg2, sparc_o0);
4069 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
4071 cfg->code_len = (guint8*)code - cfg->native_code;
4073 g_assert (cfg->code_len < cfg->code_size);
4078 mono_arch_emit_exceptions (MonoCompile *cfg)
4080 MonoJumpInfo *patch_info;
4085 MonoClass *exc_classes [16];
4086 guint8 *exc_throw_start [16], *exc_throw_end [16];
4088 /* Compute needed space */
4089 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4090 if (patch_info->type == MONO_PATCH_INFO_EXC)
4095 * make sure we have enough space for exceptions
4098 code_size = exc_count * (20 * 4);
4100 code_size = exc_count * 24;
4103 while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4104 cfg->code_size *= 2;
4105 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4106 mono_jit_stats.code_reallocs++;
4109 code = (guint32*)(cfg->native_code + cfg->code_len);
4111 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4112 switch (patch_info->type) {
4113 case MONO_PATCH_INFO_EXC: {
4114 MonoClass *exc_class;
4115 guint32 *buf, *buf2;
4116 guint32 throw_ip, type_idx;
4119 sparc_patch ((guint32*)(cfg->native_code + patch_info->ip.i), code);
4121 exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4122 type_idx = exc_class->type_token - MONO_TOKEN_TYPE_DEF;
4123 g_assert (exc_class);
4124 throw_ip = patch_info->ip.i;
4126 /* Find a throw sequence for the same exception class */
4127 for (i = 0; i < nthrows; ++i)
4128 if (exc_classes [i] == exc_class)
4132 guint32 throw_offset = (((guint8*)exc_throw_end [i] - cfg->native_code) - throw_ip) >> 2;
4133 if (!sparc_is_imm13 (throw_offset))
4134 sparc_set32 (code, throw_offset, sparc_o1);
4136 disp = (exc_throw_start [i] - (guint8*)code) >> 2;
4137 g_assert (sparc_is_imm22 (disp));
4138 sparc_branch (code, 0, sparc_ba, disp);
4139 if (sparc_is_imm13 (throw_offset))
4140 sparc_set32 (code, throw_offset, sparc_o1);
4143 patch_info->type = MONO_PATCH_INFO_NONE;
4146 /* Emit the template for setting o1 */
4148 if (sparc_is_imm13 (((((guint8*)code - cfg->native_code) - throw_ip) >> 2) - 8))
4149 /* Can use a short form */
4152 sparc_set_template (code, sparc_o1);
4156 exc_classes [nthrows] = exc_class;
4157 exc_throw_start [nthrows] = (guint8*)code;
4161 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
4165 /* first arg = type token */
4166 /* Pass the type index to reduce the size of the sparc_set */
4167 if (!sparc_is_imm13 (type_idx))
4168 sparc_set32 (code, type_idx, sparc_o0);
4170 /* second arg = offset between the throw ip and the current ip */
4171 /* On sparc, the saved ip points to the call instruction */
4172 disp = (((guint8*)code - cfg->native_code) - throw_ip) >> 2;
4173 sparc_set32 (buf, disp, sparc_o1);
4178 exc_throw_end [nthrows] = (guint8*)code;
4182 patch_info->data.name = "mono_arch_throw_corlib_exception";
4183 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4184 patch_info->ip.i = (guint8*)code - cfg->native_code;
4188 if (sparc_is_imm13 (type_idx)) {
4189 /* Put it into the delay slot */
4192 sparc_set32 (code, type_idx, sparc_o0);
4193 g_assert (code - buf == 1);
4204 cfg->code_len = (guint8*)code - cfg->native_code;
4206 g_assert (cfg->code_len < cfg->code_size);
4210 gboolean lmf_addr_key_inited = FALSE;
4212 #ifdef MONO_SPARC_THR_TLS
4213 thread_key_t lmf_addr_key;
4215 pthread_key_t lmf_addr_key;
4219 mono_arch_get_lmf_addr (void)
4221 /* This is perf critical so we bypass the IO layer */
4222 /* The thr_... functions seem to be somewhat faster */
4223 #ifdef MONO_SPARC_THR_TLS
4225 thr_getspecific (lmf_addr_key, &res);
4228 return pthread_getspecific (lmf_addr_key);
4232 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4235 * There seems to be no way to determine stack boundaries under solaris,
4236 * so it's not possible to determine whenever a SIGSEGV is caused by stack
4239 #error "--with-sigaltstack=yes not supported on solaris"
4244 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
4246 if (!lmf_addr_key_inited) {
4249 lmf_addr_key_inited = TRUE;
4251 #ifdef MONO_SPARC_THR_TLS
4252 res = thr_keycreate (&lmf_addr_key, NULL);
4254 res = pthread_key_create (&lmf_addr_key, NULL);
4256 g_assert (res == 0);
4260 #ifdef MONO_SPARC_THR_TLS
4261 thr_setspecific (lmf_addr_key, &tls->lmf);
4263 pthread_setspecific (lmf_addr_key, &tls->lmf);
4268 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4273 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *call, int this_reg, int this_type, int vt_reg)
4275 int this_out_reg = sparc_o0;
4280 MONO_INST_NEW (cfg, ins, OP_SETREG);
4281 ins->sreg1 = vt_reg;
4282 ins->dreg = mono_regstate_next_int (cfg->rs);
4283 mono_bblock_add_inst (cfg->cbb, ins);
4285 mono_call_inst_add_outarg_reg (cfg, call, ins->dreg, sparc_o0, FALSE);
4287 this_out_reg = sparc_o1;
4289 /* Set the 'struct/union return pointer' location on the stack */
4290 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, 64, vt_reg);
4294 /* add the this argument */
4295 if (this_reg != -1) {
4297 MONO_INST_NEW (cfg, this, OP_SETREG);
4298 this->type = this_type;
4299 this->sreg1 = this_reg;
4300 this->dreg = mono_regstate_next_int (cfg->rs);
4301 mono_bblock_add_inst (cfg->cbb, this);
4303 mono_call_inst_add_outarg_reg (cfg, call, this->dreg, this_out_reg, FALSE);
4309 mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4311 MonoInst *ins = NULL;
4313 if (cmethod->klass == mono_defaults.thread_class &&
4314 strcmp (cmethod->name, "MemoryBarrier") == 0) {
4316 MONO_INST_NEW (cfg, ins, OP_MEMORY_BARRIER);
4323 * mono_arch_get_argument_info:
4324 * @csig: a method signature
4325 * @param_count: the number of parameters to consider
4326 * @arg_info: an array to store the result infos
4328 * Gathers information on parameters such as size, alignment and
4329 * padding. arg_info should be large enought to hold param_count + 1 entries.
4331 * Returns the size of the activation frame.
4334 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
4340 cinfo = get_call_info (csig, FALSE);
4342 if (csig->hasthis) {
4343 ainfo = &cinfo->args [0];
4344 arg_info [0].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4347 for (k = 0; k < param_count; k++) {
4348 ainfo = &cinfo->args [k + csig->hasthis];
4350 arg_info [k + 1].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4351 arg_info [k + 1].size = mono_type_size (csig->params [k], &align);
4360 mono_arch_print_tree (MonoInst *tree, int arity)
4365 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
4370 MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)