2 * mini-sparc.c: Sparc backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
9 * Christopher Taylor (ct@gentoo.org)
10 * Mark Crichton (crichton@gimp.org)
11 * Zoltan Varga (vargaz@freemail.hu)
13 * (C) 2003 Ximian, Inc.
21 #include <sys/systeminfo.h>
28 #include <mono/metadata/appdomain.h>
29 #include <mono/metadata/debug-helpers.h>
30 #include <mono/metadata/tokentype.h>
31 #include <mono/utils/mono-math.h>
33 #include "mini-sparc.h"
35 #include "cpu-sparc.h"
36 #include "jit-icalls.h"
40 * Sparc V9 means two things:
41 * - the instruction set
44 * V9 instructions are only usable if the underlying processor is 64 bit. Most Sparc
45 * processors in use are 64 bit processors. The V9 ABI is only usable if the
46 * mono executable is a 64 bit executable. So it would make sense to use the 64 bit
47 * instructions without using the 64 bit ABI.
52 * - %i0..%i<n> hold the incoming arguments, these are never written by JITted
53 * code. Unused input registers are used for global register allocation.
54 * - %o0..%o5 and %l7 is used for local register allocation and passing arguments
55 * - %l0..%l6 is used for global register allocation
56 * - %o7 and %g1 is used as scratch registers in opcodes
57 * - all floating point registers are used for local register allocation except %f0.
58 * Only double precision registers are used.
60 * - fp registers %d0..%d30 are used for parameter passing, and %d32..%d62 are
61 * used for local allocation.
66 * - doubles and longs must be stored in dword aligned locations
70 * The following things are not implemented or do not work:
71 * - some fp arithmetic corner cases
72 * The following tests in mono/mini are expected to fail:
73 * - test_0_simple_double_casts
74 * This test casts (guint64)-1 to double and then back to guint64 again.
75 * Under x86, it returns 0, while under sparc it returns -1.
77 * In addition to this, the runtime requires the trunc function, or its
78 * solaris counterpart, aintl, to do some double->int conversions. If this
79 * function is not available, it is emulated somewhat, but the results can be
85 * - optimize sparc_set according to the memory model
86 * - when non-AOT compiling, compute patch targets immediately so we don't
87 * have to emit the 6 byte template.
89 * - struct arguments/returns
94 * - sparc_call_simple can't be used in a lot of places since the displacement
95 * might not fit into an imm30.
96 * - g1 can't be used in a lot of places since it is used as a scratch reg in
98 * - sparc_f0 can't be used as a scratch register on V9
99 * - the %d34..%d62 fp registers are encoded as: %dx = %f(x - 32 + 1), ie.
101 * - ldind.i4/u4 needs to sign extend/clear out upper word -> slows things down
102 * - ins->dreg can't be used as a scatch register in r4 opcodes since it might
103 * be a double precision register which has no single precision part.
104 * - passing/returning structs is hard to implement, because:
105 * - the spec is very hard to understand
106 * - it requires knowledge about the fields of structure, needs to handle
107 * nested structures etc.
111 * Possible optimizations:
112 * - delay slot scheduling
113 * - allocate large constants to registers
114 * - add more mul/div/rem optimizations
118 #define MONO_SPARC_THR_TLS 1
122 * There was a 64 bit bug in glib-2.2: g_bit_nth_msf (0, -1) would return 32,
123 * causing infinite loops in dominator computation. So glib-2.4 is required.
126 #if GLIB_MAJOR_VERSION == 2 && GLIB_MINOR_VERSION < 4
127 #error "glib 2.4 or later is required for 64 bit mode."
131 #define ALIGN_TO(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
133 #define SIGNAL_STACK_SIZE (64 * 1024)
135 #define STACK_BIAS MONO_SPARC_STACK_BIAS
139 /* %g1 is used by sparc_set */
140 #define GP_SCRATCH_REG sparc_g4
141 /* %f0 is used for parameter passing */
142 #define FP_SCRATCH_REG sparc_f30
143 #define ARGS_OFFSET (STACK_BIAS + 128)
147 #define FP_SCRATCH_REG sparc_f0
148 #define ARGS_OFFSET 68
149 #define GP_SCRATCH_REG sparc_g1
153 /* Whenever the CPU supports v9 instructions */
154 static gboolean sparcv9 = FALSE;
156 /* Whenever this is a 64bit executable */
158 static gboolean v64 = TRUE;
160 static gboolean v64 = FALSE;
163 static gpointer mono_arch_get_lmf_addr (void);
166 mono_arch_regname (int reg) {
167 static const char * rnames[] = {
168 "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
169 "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
170 "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
171 "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
172 "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
173 "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
174 "sparc_fp", "sparc_retadr"
176 if (reg >= 0 && reg < 32)
182 mono_arch_fregname (int reg) {
183 static const char *rnames [] = {
184 "sparc_f0", "sparc_f1", "sparc_f2", "sparc_f3", "sparc_f4",
185 "sparc_f5", "sparc_f6", "sparc_f7", "sparc_f8", "sparc_f9",
186 "sparc_f10", "sparc_f11", "sparc_f12", "sparc_f13", "sparc_f14",
187 "sparc_f15", "sparc_f16", "sparc_f17", "sparc_f18", "sparc_f19",
188 "sparc_f20", "sparc_f21", "sparc_f22", "sparc_f23", "sparc_f24",
189 "sparc_f25", "sparc_f26", "sparc_f27", "sparc_f28", "sparc_f29",
190 "sparc_f30", "sparc_f31"
193 if (reg >= 0 && reg < 32)
200 * Initialize the cpu to execute managed code.
203 mono_arch_cpu_init (void)
206 /* make sure sparcv9 is initialized for embedded use */
207 mono_arch_cpu_optimizazions(&dummy);
211 * Initialize architecture specific code.
214 mono_arch_init (void)
219 * Cleanup architecture specific code.
222 mono_arch_cleanup (void)
227 * This function returns the optimizations supported on this cpu.
230 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
238 if (!sysinfo (SI_ISALIST, buf, 1024))
239 g_assert_not_reached ();
241 /* From glibc. If the getpagesize is 8192, we're on sparc64, which
242 * (in)directly implies that we're a v9 or better.
243 * Improvements to this are greatly accepted...
244 * Also, we don't differentiate between v7 and v8. I sense SIGILL
245 * sniffing in my future.
247 if (getpagesize() == 8192)
248 strcpy (buf, "sparcv9");
250 strcpy (buf, "sparcv8");
254 * On some processors, the cmov instructions are even slower than the
257 if (strstr (buf, "sparcv9")) {
258 opts |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
262 *exclude_mask |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
268 #define flushi(addr) __asm__ __volatile__ ("iflush %0"::"r"(addr):"memory")
269 #else /* assume Sun's compiler */
270 static void flushi(void *addr)
277 void sync_instruction_memory(caddr_t addr, int len);
281 mono_arch_flush_icache (guint8 *code, gint size)
284 /* Hopefully this is optimized based on the actual CPU */
285 sync_instruction_memory (code, size);
287 gulong start = (gulong) code;
288 gulong end = start + size;
291 /* Sparcv9 chips only need flushes on 32 byte
292 * cacheline boundaries.
294 * Sparcv8 needs a flush every 8 bytes.
296 align = (sparcv9 ? 32 : 8);
298 start &= ~(align - 1);
299 end = (end + (align - 1)) & ~(align - 1);
301 while (start < end) {
303 __asm__ __volatile__ ("iflush %0"::"r"(start));
315 * Flush all register windows to memory. Every register window is saved to
316 * a 16 word area on the stack pointed to by its %sp register.
319 mono_sparc_flushw (void)
321 static guint32 start [64];
322 static int inited = 0;
324 static void (*flushw) (void);
329 sparc_save_imm (code, sparc_sp, -160, sparc_sp);
332 sparc_restore_simple (code);
334 g_assert ((code - start) < 64);
336 mono_arch_flush_icache ((guint8*)start, (guint8*)code - (guint8*)start);
338 flushw = (gpointer)start;
347 mono_arch_flush_register_windows (void)
349 mono_sparc_flushw ();
353 mono_arch_is_inst_imm (gint64 imm)
355 return sparc_is_imm13 (imm);
359 mono_sparc_is_v9 (void) {
364 mono_sparc_is_sparc64 (void) {
376 ArgInFloatReg, /* V9 only */
377 ArgInDoubleReg /* V9 only */
382 /* This needs to be offset by %i0 or %o0 depending on caller/callee */
385 guint32 vt_offset; /* for valuetypes */
403 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean pair)
405 ainfo->offset = *stack_size;
408 if (*gr >= PARAM_REGS) {
409 ainfo->storage = ArgOnStack;
412 ainfo->storage = ArgInIReg;
417 /* Allways reserve stack space for parameters passed in registers */
418 (*stack_size) += sizeof (gpointer);
421 if (*gr < PARAM_REGS - 1) {
422 /* A pair of registers */
423 ainfo->storage = ArgInIRegPair;
427 else if (*gr >= PARAM_REGS) {
428 /* A pair of stack locations */
429 ainfo->storage = ArgOnStackPair;
432 ainfo->storage = ArgInSplitRegStack;
437 (*stack_size) += 2 * sizeof (gpointer);
443 #define FLOAT_PARAM_REGS 32
446 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean single)
448 ainfo->offset = *stack_size;
451 if (*gr >= FLOAT_PARAM_REGS) {
452 ainfo->storage = ArgOnStack;
455 /* A single is passed in an even numbered fp register */
456 ainfo->storage = ArgInFloatReg;
457 ainfo->reg = *gr + 1;
462 if (*gr < FLOAT_PARAM_REGS) {
463 /* A double register */
464 ainfo->storage = ArgInDoubleReg;
469 ainfo->storage = ArgOnStack;
473 (*stack_size) += sizeof (gpointer);
481 * Obtain information about a call according to the calling convention.
482 * For V8, see the "System V ABI, Sparc Processor Supplement" Sparc V8 version
483 * document for more information.
484 * For V9, see the "Low Level System Information (64-bit psABI)" chapter in
485 * the 'Sparc Compliance Definition 2.4' document.
488 get_call_info (MonoCompile *cfg, MonoMethodSignature *sig, gboolean is_pinvoke)
491 int n = sig->hasthis + sig->param_count;
492 guint32 stack_size = 0;
495 MonoGenericSharingContext *gsctx = cfg ? cfg->generic_sharing_context : NULL;
497 cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
503 if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
504 /* The address of the return value is passed in %o0 */
505 add_general (&gr, &stack_size, &cinfo->ret, FALSE);
506 cinfo->ret.reg += sparc_i0;
507 /* FIXME: Pass this after this as on other platforms */
514 add_general (&gr, &stack_size, cinfo->args + 0, FALSE);
516 if ((sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
519 /* Emit the signature cookie just before the implicit arguments */
520 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
523 for (i = 0; i < sig->param_count; ++i) {
524 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
527 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
530 /* Emit the signature cookie just before the implicit arguments */
531 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
534 DEBUG(printf("param %d: ", i));
535 if (sig->params [i]->byref) {
536 DEBUG(printf("byref\n"));
538 add_general (&gr, &stack_size, ainfo, FALSE);
541 ptype = mono_type_get_underlying_type (sig->params [i]);
542 ptype = mini_get_basic_type_from_generic (gsctx, ptype);
543 switch (ptype->type) {
544 case MONO_TYPE_BOOLEAN:
547 add_general (&gr, &stack_size, ainfo, FALSE);
548 /* the value is in the ls byte */
549 ainfo->offset += sizeof (gpointer) - 1;
554 add_general (&gr, &stack_size, ainfo, FALSE);
555 /* the value is in the ls word */
556 ainfo->offset += sizeof (gpointer) - 2;
560 add_general (&gr, &stack_size, ainfo, FALSE);
561 /* the value is in the ls dword */
562 ainfo->offset += sizeof (gpointer) - 4;
567 case MONO_TYPE_FNPTR:
568 case MONO_TYPE_CLASS:
569 case MONO_TYPE_OBJECT:
570 case MONO_TYPE_STRING:
571 case MONO_TYPE_SZARRAY:
572 case MONO_TYPE_ARRAY:
573 add_general (&gr, &stack_size, ainfo, FALSE);
575 case MONO_TYPE_GENERICINST:
576 if (!mono_type_generic_inst_is_valuetype (ptype)) {
577 add_general (&gr, &stack_size, ainfo, FALSE);
581 case MONO_TYPE_VALUETYPE:
586 add_general (&gr, &stack_size, ainfo, FALSE);
588 case MONO_TYPE_TYPEDBYREF:
589 add_general (&gr, &stack_size, ainfo, FALSE);
594 add_general (&gr, &stack_size, ainfo, FALSE);
596 add_general (&gr, &stack_size, ainfo, TRUE);
601 add_float (&fr, &stack_size, ainfo, TRUE);
604 /* single precision values are passed in integer registers */
605 add_general (&gr, &stack_size, ainfo, FALSE);
610 add_float (&fr, &stack_size, ainfo, FALSE);
613 /* double precision values are passed in a pair of registers */
614 add_general (&gr, &stack_size, ainfo, TRUE);
618 g_assert_not_reached ();
622 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
625 /* Emit the signature cookie just before the implicit arguments */
626 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
630 ret_type = mono_type_get_underlying_type (sig->ret);
631 ret_type = mini_get_basic_type_from_generic (gsctx, ret_type);
632 switch (ret_type->type) {
633 case MONO_TYPE_BOOLEAN:
644 case MONO_TYPE_FNPTR:
645 case MONO_TYPE_CLASS:
646 case MONO_TYPE_OBJECT:
647 case MONO_TYPE_SZARRAY:
648 case MONO_TYPE_ARRAY:
649 case MONO_TYPE_STRING:
650 cinfo->ret.storage = ArgInIReg;
651 cinfo->ret.reg = sparc_i0;
658 cinfo->ret.storage = ArgInIReg;
659 cinfo->ret.reg = sparc_i0;
663 cinfo->ret.storage = ArgInIRegPair;
664 cinfo->ret.reg = sparc_i0;
671 cinfo->ret.storage = ArgInFReg;
672 cinfo->ret.reg = sparc_f0;
674 case MONO_TYPE_GENERICINST:
675 if (!mono_type_generic_inst_is_valuetype (ret_type)) {
676 cinfo->ret.storage = ArgInIReg;
677 cinfo->ret.reg = sparc_i0;
683 case MONO_TYPE_VALUETYPE:
692 cinfo->ret.storage = ArgOnStack;
694 case MONO_TYPE_TYPEDBYREF:
697 /* Same as a valuetype with size 24 */
704 cinfo->ret.storage = ArgOnStack;
709 g_error ("Can't handle as return value 0x%x", sig->ret->type);
712 cinfo->stack_usage = stack_size;
713 cinfo->reg_usage = gr;
718 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
724 * FIXME: If an argument is allocated to a register, then load it from the
725 * stack in the prolog.
728 for (i = 0; i < cfg->num_varinfo; i++) {
729 MonoInst *ins = cfg->varinfo [i];
730 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
733 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
736 /* FIXME: Make arguments on stack allocateable to registers */
737 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode == OP_REGVAR) || (ins->opcode == OP_ARG))
740 if (mono_is_regsize_var (ins->inst_vtype)) {
741 g_assert (MONO_VARINFO (cfg, i)->reg == -1);
742 g_assert (i == vmv->idx);
744 vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
752 mono_arch_get_global_int_regs (MonoCompile *cfg)
756 MonoMethodSignature *sig;
759 sig = mono_method_signature (cfg->method);
761 cinfo = get_call_info (cfg, sig, FALSE);
763 /* Use unused input registers */
764 for (i = cinfo->reg_usage; i < 6; ++i)
765 regs = g_list_prepend (regs, GUINT_TO_POINTER (sparc_i0 + i));
767 /* Use %l0..%l6 as global registers */
768 for (i = sparc_l0; i < sparc_l7; ++i)
769 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
777 * mono_arch_regalloc_cost:
779 * Return the cost, in number of memory references, of the action of
780 * allocating the variable VMV into a register during global register
784 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
790 * Set var information according to the calling convention. sparc version.
791 * The locals var stuff should most likely be split in another method.
795 mono_arch_allocate_vars (MonoCompile *cfg)
797 MonoMethodSignature *sig;
798 MonoMethodHeader *header;
800 int i, offset, size, align, curinst;
803 header = cfg->header;
805 sig = mono_method_signature (cfg->method);
807 cinfo = get_call_info (cfg, sig, FALSE);
809 if (sig->ret->type != MONO_TYPE_VOID) {
810 switch (cinfo->ret.storage) {
813 cfg->ret->opcode = OP_REGVAR;
814 cfg->ret->inst_c0 = cinfo->ret.reg;
816 case ArgInIRegPair: {
817 MonoType *t = mono_type_get_underlying_type (sig->ret);
818 if (((t->type == MONO_TYPE_I8) || (t->type == MONO_TYPE_U8))) {
819 MonoInst *low = get_vreg_to_inst (cfg, cfg->ret->dreg + 1);
820 MonoInst *high = get_vreg_to_inst (cfg, cfg->ret->dreg + 2);
822 low->opcode = OP_REGVAR;
823 low->dreg = cinfo->ret.reg + 1;
824 high->opcode = OP_REGVAR;
825 high->dreg = cinfo->ret.reg;
827 cfg->ret->opcode = OP_REGVAR;
828 cfg->ret->inst_c0 = cinfo->ret.reg;
833 g_assert_not_reached ();
836 cfg->vret_addr->opcode = OP_REGOFFSET;
837 cfg->vret_addr->inst_basereg = sparc_fp;
838 cfg->vret_addr->inst_offset = 64;
844 cfg->ret->dreg = cfg->ret->inst_c0;
848 * We use the ABI calling conventions for managed code as well.
849 * Exception: valuetypes are never returned in registers on V9.
850 * FIXME: Use something more optimized.
853 /* Locals are allocated backwards from %fp */
854 cfg->frame_reg = sparc_fp;
858 * Reserve a stack slot for holding information used during exception
861 if (header->num_clauses)
862 offset += sizeof (gpointer) * 2;
864 if (cfg->method->save_lmf) {
865 offset += sizeof (MonoLMF);
866 cfg->arch.lmf_offset = offset;
869 curinst = cfg->locals_start;
870 for (i = curinst; i < cfg->num_varinfo; ++i) {
871 inst = cfg->varinfo [i];
873 if ((inst->opcode == OP_REGVAR) || (inst->opcode == OP_REGOFFSET)) {
874 //g_print ("allocating local %d to %s\n", i, mono_arch_regname (inst->dreg));
878 if (inst->flags & MONO_INST_IS_DEAD)
881 /* inst->backend.is_pinvoke indicates native sized value types, this is used by the
882 * pinvoke wrappers when they call functions returning structure */
883 if (inst->backend.is_pinvoke && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
884 size = mono_class_native_size (mono_class_from_mono_type (inst->inst_vtype), &align);
886 size = mini_type_stack_size (cfg->generic_sharing_context, inst->inst_vtype, &align);
889 * This is needed since structures containing doubles must be doubleword
891 * FIXME: Do this only if needed.
893 if (MONO_TYPE_ISSTRUCT (inst->inst_vtype))
897 * variables are accessed as negative offsets from %fp, so increase
898 * the offset before assigning it to a variable
903 offset &= ~(align - 1);
904 inst->opcode = OP_REGOFFSET;
905 inst->inst_basereg = sparc_fp;
906 inst->inst_offset = STACK_BIAS + -offset;
908 //g_print ("allocating local %d to [%s - %d]\n", i, mono_arch_regname (inst->inst_basereg), - inst->inst_offset);
911 if (sig->call_convention == MONO_CALL_VARARG) {
912 cfg->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
915 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
916 inst = cfg->args [i];
917 if (inst->opcode != OP_REGVAR) {
918 ArgInfo *ainfo = &cinfo->args [i];
919 gboolean inreg = TRUE;
923 if (sig->hasthis && (i == 0))
924 arg_type = &mono_defaults.object_class->byval_arg;
926 arg_type = sig->params [i - sig->hasthis];
929 if (!arg_type->byref && ((arg_type->type == MONO_TYPE_R4)
930 || (arg_type->type == MONO_TYPE_R8)))
932 * Since float arguments are passed in integer registers, we need to
933 * save them to the stack in the prolog.
938 /* FIXME: Allocate volatile arguments to registers */
939 /* FIXME: This makes the argument holding a vtype address into volatile */
940 if (inst->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT))
943 if (MONO_TYPE_ISSTRUCT (arg_type))
944 /* FIXME: this isn't needed */
947 inst->opcode = OP_REGOFFSET;
950 storage = ArgOnStack;
952 storage = ainfo->storage;
956 inst->opcode = OP_REGVAR;
957 inst->dreg = sparc_i0 + ainfo->reg;
960 if (inst->type == STACK_I8) {
961 MonoInst *low = get_vreg_to_inst (cfg, inst->dreg + 1);
962 MonoInst *high = get_vreg_to_inst (cfg, inst->dreg + 2);
964 low->opcode = OP_REGVAR;
965 low->dreg = sparc_i0 + ainfo->reg + 1;
966 high->opcode = OP_REGVAR;
967 high->dreg = sparc_i0 + ainfo->reg;
969 inst->opcode = OP_REGVAR;
970 inst->dreg = sparc_i0 + ainfo->reg;
975 * Since float regs are volatile, we save the arguments to
976 * the stack in the prolog.
977 * FIXME: Avoid this if the method contains no calls.
981 case ArgInSplitRegStack:
982 /* Split arguments are saved to the stack in the prolog */
983 inst->opcode = OP_REGOFFSET;
984 /* in parent frame */
985 inst->inst_basereg = sparc_fp;
986 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
988 if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
990 * It is very hard to load doubles from non-doubleword aligned
991 * memory locations. So if the offset is misaligned, we copy the
992 * argument to a stack location in the prolog.
994 if ((inst->inst_offset - STACK_BIAS) % 8) {
995 inst->inst_basereg = sparc_fp;
999 offset &= ~(align - 1);
1000 inst->inst_offset = STACK_BIAS + -offset;
1009 if (MONO_TYPE_ISSTRUCT (arg_type)) {
1010 /* Add a level of indirection */
1012 * It would be easier to add OP_LDIND_I here, but ldind_i instructions
1013 * are destructively modified in a lot of places in inssel.brg.
1016 MONO_INST_NEW (cfg, indir, 0);
1018 inst->opcode = OP_VTARG_ADDR;
1019 inst->inst_left = indir;
1025 * spillvars are stored between the normal locals and the storage reserved
1029 cfg->stack_offset = offset;
1035 mono_arch_create_vars (MonoCompile *cfg)
1037 MonoMethodSignature *sig;
1039 sig = mono_method_signature (cfg->method);
1041 if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
1042 cfg->vret_addr = mono_compile_create_var (cfg, &mono_defaults.int_class->byval_arg, OP_ARG);
1043 if (G_UNLIKELY (cfg->verbose_level > 1)) {
1044 printf ("vret_addr = ");
1045 mono_print_ins (cfg->vret_addr);
1049 if (!sig->ret->byref && (sig->ret->type == MONO_TYPE_I8 || sig->ret->type == MONO_TYPE_U8)) {
1050 MonoInst *low = get_vreg_to_inst (cfg, cfg->ret->dreg + 1);
1051 MonoInst *high = get_vreg_to_inst (cfg, cfg->ret->dreg + 2);
1053 low->flags |= MONO_INST_VOLATILE;
1054 high->flags |= MONO_INST_VOLATILE;
1057 /* Add a properly aligned dword for use by int<->float conversion opcodes */
1058 cfg->arch.float_spill_slot = mono_compile_create_var (cfg, &mono_defaults.double_class->byval_arg, OP_ARG);
1059 ((MonoInst*)cfg->arch.float_spill_slot)->flags |= MONO_INST_VOLATILE;
1063 add_outarg_reg (MonoCompile *cfg, MonoCallInst *call, ArgStorage storage, int reg, guint32 sreg)
1067 MONO_INST_NEW (cfg, arg, 0);
1073 arg->opcode = OP_MOVE;
1074 arg->dreg = mono_alloc_ireg (cfg);
1076 mono_call_inst_add_outarg_reg (cfg, call, arg->dreg, reg, FALSE);
1079 arg->opcode = OP_FMOVE;
1080 arg->dreg = mono_alloc_freg (cfg);
1082 mono_call_inst_add_outarg_reg (cfg, call, arg->dreg, reg, TRUE);
1085 g_assert_not_reached ();
1088 MONO_ADD_INS (cfg->cbb, arg);
1092 add_outarg_load (MonoCompile *cfg, MonoCallInst *call, int opcode, int basereg, int offset, int reg)
1094 int dreg = mono_alloc_ireg (cfg);
1096 MONO_EMIT_NEW_LOAD_MEMBASE (cfg, dreg, sparc_sp, offset);
1098 mono_call_inst_add_outarg_reg (cfg, call, dreg, reg, FALSE);
1102 emit_pass_long (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoInst *in)
1104 int offset = ARGS_OFFSET + ainfo->offset;
1106 switch (ainfo->storage) {
1108 add_outarg_reg (cfg, call, ArgInIReg, sparc_o0 + ainfo->reg + 1, in->dreg + 1);
1109 add_outarg_reg (cfg, call, ArgInIReg, sparc_o0 + ainfo->reg, in->dreg + 2);
1111 case ArgOnStackPair:
1112 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, offset, in->dreg + 2);
1113 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, offset + 4, in->dreg + 1);
1115 case ArgInSplitRegStack:
1116 add_outarg_reg (cfg, call, ArgInIReg, sparc_o0 + ainfo->reg, in->dreg + 2);
1117 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, offset + 4, in->dreg + 1);
1120 g_assert_not_reached ();
1125 emit_pass_double (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoInst *in)
1127 int offset = ARGS_OFFSET + ainfo->offset;
1129 switch (ainfo->storage) {
1131 /* floating-point <-> integer transfer must go through memory */
1132 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER8_MEMBASE_REG, sparc_sp, offset, in->dreg);
1134 /* Load into a register pair */
1135 add_outarg_load (cfg, call, OP_LOADI4_MEMBASE, sparc_sp, offset, sparc_o0 + ainfo->reg);
1136 add_outarg_load (cfg, call, OP_LOADI4_MEMBASE, sparc_sp, offset + 4, sparc_o0 + ainfo->reg + 1);
1138 case ArgOnStackPair:
1139 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER8_MEMBASE_REG, sparc_sp, offset, in->dreg);
1141 case ArgInSplitRegStack:
1142 /* floating-point <-> integer transfer must go through memory */
1143 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER8_MEMBASE_REG, sparc_sp, offset, in->dreg);
1144 /* Load most significant word into register */
1145 add_outarg_load (cfg, call, OP_LOADI4_MEMBASE, sparc_sp, offset, sparc_o0 + ainfo->reg);
1148 g_assert_not_reached ();
1153 emit_pass_float (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoInst *in)
1155 int offset = ARGS_OFFSET + ainfo->offset;
1157 switch (ainfo->storage) {
1159 /* floating-point <-> integer transfer must go through memory */
1160 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER4_MEMBASE_REG, sparc_sp, offset, in->dreg);
1161 add_outarg_load (cfg, call, OP_LOADI4_MEMBASE, sparc_sp, offset, sparc_o0 + ainfo->reg);
1164 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER4_MEMBASE_REG, sparc_sp, offset, in->dreg);
1167 g_assert_not_reached ();
1172 emit_pass_other (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoType *arg_type, MonoInst *in);
1175 emit_pass_vtype (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo, ArgInfo *ainfo, MonoType *arg_type, MonoInst *in, gboolean pinvoke)
1178 guint32 align, offset, pad, size;
1180 if (arg_type->type == MONO_TYPE_TYPEDBYREF) {
1181 size = sizeof (MonoTypedRef);
1182 align = sizeof (gpointer);
1185 size = mono_type_native_stack_size (&in->klass->byval_arg, &align);
1188 * Other backends use mono_type_stack_size (), but that
1189 * aligns the size to 8, which is larger than the size of
1190 * the source, leading to reads of invalid memory if the
1191 * source is at the end of address space.
1193 size = mono_class_value_size (in->klass, &align);
1196 /* The first 6 argument locations are reserved */
1197 if (cinfo->stack_usage < 6 * sizeof (gpointer))
1198 cinfo->stack_usage = 6 * sizeof (gpointer);
1200 offset = ALIGN_TO ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage, align);
1201 pad = offset - ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage);
1203 cinfo->stack_usage += size;
1204 cinfo->stack_usage += pad;
1207 * We use OP_OUTARG_VT to copy the valuetype to a stack location, then
1208 * use the normal OUTARG opcodes to pass the address of the location to
1212 MONO_INST_NEW (cfg, arg, OP_OUTARG_VT);
1213 arg->sreg1 = in->dreg;
1214 arg->klass = in->klass;
1215 arg->backend.size = size;
1216 arg->inst_p0 = call;
1217 arg->inst_p1 = mono_mempool_alloc (cfg->mempool, sizeof (ArgInfo));
1218 memcpy (arg->inst_p1, ainfo, sizeof (ArgInfo));
1219 ((ArgInfo*)(arg->inst_p1))->offset = STACK_BIAS + offset;
1220 MONO_ADD_INS (cfg->cbb, arg);
1222 MONO_INST_NEW (cfg, arg, OP_ADD_IMM);
1223 arg->dreg = mono_alloc_preg (cfg);
1224 arg->sreg1 = sparc_sp;
1225 arg->inst_imm = STACK_BIAS + offset;
1226 MONO_ADD_INS (cfg->cbb, arg);
1228 emit_pass_other (cfg, call, ainfo, NULL, arg);
1233 emit_pass_other (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoType *arg_type, MonoInst *in)
1235 int offset = ARGS_OFFSET + ainfo->offset;
1238 switch (ainfo->storage) {
1240 add_outarg_reg (cfg, call, ArgInIReg, sparc_o0 + ainfo->reg, in->dreg);
1247 opcode = OP_STOREI1_MEMBASE_REG;
1248 else if (offset & 0x2)
1249 opcode = OP_STOREI2_MEMBASE_REG;
1251 opcode = OP_STOREI4_MEMBASE_REG;
1252 MONO_EMIT_NEW_STORE_MEMBASE (cfg, opcode, sparc_sp, offset, in->dreg);
1256 g_assert_not_reached ();
1261 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo)
1263 MonoMethodSignature *tmp_sig;
1266 * mono_ArgIterator_Setup assumes the signature cookie is
1267 * passed first and all the arguments which were before it are
1268 * passed on the stack after the signature. So compensate by
1269 * passing a different signature.
1271 tmp_sig = mono_metadata_signature_dup (call->signature);
1272 tmp_sig->param_count -= call->signature->sentinelpos;
1273 tmp_sig->sentinelpos = 0;
1274 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1276 /* FIXME: Add support for signature tokens to AOT */
1277 cfg->disable_aot = TRUE;
1278 /* We allways pass the signature on the stack for simplicity */
1279 MONO_EMIT_NEW_STORE_MEMBASE_IMM (cfg, OP_STORE_MEMBASE_IMM, sparc_sp, ARGS_OFFSET + cinfo->sig_cookie.offset, tmp_sig);
1283 mono_arch_emit_call (MonoCompile *cfg, MonoCallInst *call)
1286 MonoMethodSignature *sig;
1290 guint32 extra_space = 0;
1292 sig = call->signature;
1293 n = sig->param_count + sig->hasthis;
1295 cinfo = get_call_info (cfg, sig, sig->pinvoke);
1297 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1298 /* Set the 'struct/union return pointer' location on the stack */
1299 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, 64, call->vret_var->dreg);
1302 for (i = 0; i < n; ++i) {
1305 ainfo = cinfo->args + i;
1307 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
1308 /* Emit the signature cookie just before the first implicit argument */
1309 emit_sig_cookie (cfg, call, cinfo);
1312 in = call->args [i];
1314 if (sig->hasthis && (i == 0))
1315 arg_type = &mono_defaults.object_class->byval_arg;
1317 arg_type = sig->params [i - sig->hasthis];
1319 arg_type = mono_type_get_underlying_type (arg_type);
1320 if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(sig->params [i - sig->hasthis])))
1321 emit_pass_vtype (cfg, call, cinfo, ainfo, arg_type, in, sig->pinvoke);
1322 else if (!arg_type->byref && ((arg_type->type == MONO_TYPE_I8) || (arg_type->type == MONO_TYPE_U8)))
1323 emit_pass_long (cfg, call, ainfo, in);
1324 else if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8))
1325 emit_pass_double (cfg, call, ainfo, in);
1326 else if (!arg_type->byref && (arg_type->type == MONO_TYPE_R4))
1327 emit_pass_float (cfg, call, ainfo, in);
1329 emit_pass_other (cfg, call, ainfo, arg_type, in);
1332 /* Handle the case where there are no implicit arguments */
1333 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sig->sentinelpos)) {
1334 emit_sig_cookie (cfg, call, cinfo);
1337 call->stack_usage = cinfo->stack_usage + extra_space;
1343 mono_arch_emit_outarg_vt (MonoCompile *cfg, MonoInst *ins, MonoInst *src)
1345 ArgInfo *ainfo = (ArgInfo*)ins->inst_p1;
1346 int size = ins->backend.size;
1348 mini_emit_memcpy (cfg, sparc_sp, ainfo->offset, src->dreg, 0, size, 0);
1352 mono_arch_emit_setret (MonoCompile *cfg, MonoMethod *method, MonoInst *val)
1354 CallInfo *cinfo = get_call_info (cfg, mono_method_signature (method), FALSE);
1355 MonoType *ret = mini_type_get_underlying_type (cfg->generic_sharing_context, mono_method_signature (method)->ret);
1357 switch (cinfo->ret.storage) {
1359 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg, val->dreg);
1362 if (ret->type == MONO_TYPE_I8 || ret->type == MONO_TYPE_U8) {
1363 MONO_EMIT_NEW_UNALU (cfg, OP_LMOVE, cfg->ret->dreg, val->dreg);
1365 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg + 2, val->dreg + 2);
1366 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg + 1, val->dreg + 1);
1370 if (ret->type == MONO_TYPE_R4)
1371 MONO_EMIT_NEW_UNALU (cfg, OP_SETFRET, cfg->ret->dreg, val->dreg);
1373 MONO_EMIT_NEW_UNALU (cfg, OP_FMOVE, cfg->ret->dreg, val->dreg);
1376 g_assert_not_reached ();
1382 int cond_to_sparc_cond [][3] = {
1383 {sparc_be, sparc_be, sparc_fbe},
1384 {sparc_bne, sparc_bne, 0},
1385 {sparc_ble, sparc_ble, sparc_fble},
1386 {sparc_bge, sparc_bge, sparc_fbge},
1387 {sparc_bl, sparc_bl, sparc_fbl},
1388 {sparc_bg, sparc_bg, sparc_fbg},
1389 {sparc_bleu, sparc_bleu, 0},
1390 {sparc_beu, sparc_beu, 0},
1391 {sparc_blu, sparc_blu, sparc_fbl},
1392 {sparc_bgu, sparc_bgu, sparc_fbg}
1395 /* Map opcode to the sparc condition codes */
1396 static inline SparcCond
1397 opcode_to_sparc_cond (int opcode)
1403 case OP_COND_EXC_OV:
1404 case OP_COND_EXC_IOV:
1407 case OP_COND_EXC_IC:
1409 case OP_COND_EXC_NO:
1410 case OP_COND_EXC_NC:
1413 rel = mono_opcode_to_cond (opcode);
1414 t = mono_opcode_to_type (opcode, -1);
1416 return cond_to_sparc_cond [rel][t];
1423 #define COMPUTE_DISP(ins) \
1424 if (ins->inst_true_bb->native_offset) \
1425 disp = (ins->inst_true_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2; \
1428 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1432 #define DEFAULT_ICC sparc_xcc_short
1434 #define DEFAULT_ICC sparc_icc_short
1438 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) \
1442 COMPUTE_DISP(ins); \
1443 predict = (disp != 0) ? 1 : 0; \
1444 g_assert (sparc_is_imm19 (disp)); \
1445 sparc_branchp (code, (annul), cond, icc, (predict), disp); \
1446 if (filldelay) sparc_nop (code); \
1448 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_ICC ((ins), (cond), (annul), (filldelay), (sparc_xcc_short))
1449 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) \
1453 COMPUTE_DISP(ins); \
1454 predict = (disp != 0) ? 1 : 0; \
1455 g_assert (sparc_is_imm19 (disp)); \
1456 sparc_fbranch (code, (annul), cond, disp); \
1457 if (filldelay) sparc_nop (code); \
1460 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) g_assert_not_reached ()
1461 #define EMIT_COND_BRANCH_GENERAL(ins,bop,cond,annul,filldelay) \
1464 COMPUTE_DISP(ins); \
1465 g_assert (sparc_is_imm22 (disp)); \
1466 sparc_ ## bop (code, (annul), cond, disp); \
1467 if (filldelay) sparc_nop (code); \
1469 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),branch,(cond),annul,filldelay)
1470 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),fbranch,(cond),annul,filldelay)
1473 #define EMIT_COND_BRANCH_PREDICTED(ins,cond,annul,filldelay) \
1477 COMPUTE_DISP(ins); \
1478 predict = (disp != 0) ? 1 : 0; \
1479 g_assert (sparc_is_imm19 (disp)); \
1480 sparc_branchp (code, (annul), (cond), DEFAULT_ICC, (predict), disp); \
1481 if (filldelay) sparc_nop (code); \
1484 #define EMIT_COND_BRANCH_BPR(ins,bop,predict,annul,filldelay) \
1487 COMPUTE_DISP(ins); \
1488 g_assert (sparc_is_imm22 (disp)); \
1489 sparc_ ## bop (code, (annul), (predict), ins->sreg1, disp); \
1490 if (filldelay) sparc_nop (code); \
1493 /* emit an exception if condition is fail */
1495 * We put the exception throwing code out-of-line, at the end of the method
1497 #define EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,filldelay,icc) do { \
1498 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code, \
1499 MONO_PATCH_INFO_EXC, sexc_name); \
1500 if (sparcv9 && ((icc) != sparc_icc_short)) { \
1501 sparc_branchp (code, 0, (cond), (icc), 0, 0); \
1504 sparc_branch (code, 0, cond, 0); \
1506 if (filldelay) sparc_nop (code); \
1509 #define EMIT_COND_SYSTEM_EXCEPTION(ins,cond,sexc_name) EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,TRUE,DEFAULT_ICC)
1511 #define EMIT_COND_SYSTEM_EXCEPTION_BPR(ins,bop,sexc_name) do { \
1512 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code, \
1513 MONO_PATCH_INFO_EXC, sexc_name); \
1514 sparc_ ## bop (code, FALSE, FALSE, ins->sreg1, 0); \
1518 #define EMIT_ALU_IMM(ins,op,setcc) do { \
1519 if (sparc_is_imm13 ((ins)->inst_imm)) \
1520 sparc_ ## op ## _imm (code, (setcc), (ins)->sreg1, ins->inst_imm, (ins)->dreg); \
1522 sparc_set (code, ins->inst_imm, sparc_o7); \
1523 sparc_ ## op (code, (setcc), (ins)->sreg1, sparc_o7, (ins)->dreg); \
1527 #define EMIT_LOAD_MEMBASE(ins,op) do { \
1528 if (sparc_is_imm13 (ins->inst_offset)) \
1529 sparc_ ## op ## _imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg); \
1531 sparc_set (code, ins->inst_offset, sparc_o7); \
1532 sparc_ ## op (code, ins->inst_basereg, sparc_o7, ins->dreg); \
1537 #define EMIT_STORE_MEMBASE_IMM(ins,op) do { \
1539 if (ins->inst_imm == 0) \
1542 sparc_set (code, ins->inst_imm, sparc_o7); \
1545 if (!sparc_is_imm13 (ins->inst_offset)) { \
1546 sparc_set (code, ins->inst_offset, GP_SCRATCH_REG); \
1547 sparc_ ## op (code, sreg, ins->inst_destbasereg, GP_SCRATCH_REG); \
1550 sparc_ ## op ## _imm (code, sreg, ins->inst_destbasereg, ins->inst_offset); \
1553 #define EMIT_STORE_MEMBASE_REG(ins,op) do { \
1554 if (!sparc_is_imm13 (ins->inst_offset)) { \
1555 sparc_set (code, ins->inst_offset, sparc_o7); \
1556 sparc_ ## op (code, ins->sreg1, ins->inst_destbasereg, sparc_o7); \
1559 sparc_ ## op ## _imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset); \
1562 #define EMIT_CALL() do { \
1564 sparc_set_template (code, sparc_o7); \
1565 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7); \
1568 sparc_call_simple (code, 0); \
1574 * A call template is 7 instructions long, so we want to avoid it if possible.
1577 emit_call (MonoCompile *cfg, guint32 *code, guint32 patch_type, gconstpointer data)
1581 /* FIXME: This only works if the target method is already compiled */
1582 if (0 && v64 && !cfg->compile_aot) {
1583 MonoJumpInfo patch_info;
1585 patch_info.type = patch_type;
1586 patch_info.data.target = data;
1588 target = mono_resolve_patch_target (cfg->method, cfg->domain, NULL, &patch_info, FALSE);
1590 /* FIXME: Add optimizations if the target is close enough */
1591 sparc_set (code, target, sparc_o7);
1592 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7);
1596 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, patch_type, data);
1604 mono_arch_peephole_pass_1 (MonoCompile *cfg, MonoBasicBlock *bb)
1609 mono_arch_peephole_pass_2 (MonoCompile *cfg, MonoBasicBlock *bb)
1611 MonoInst *ins, *n, *last_ins = NULL;
1614 MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
1615 switch (ins->opcode) {
1617 /* remove unnecessary multiplication with 1 */
1618 if (ins->inst_imm == 1) {
1619 if (ins->dreg != ins->sreg1) {
1620 ins->opcode = OP_MOVE;
1622 MONO_DELETE_INS (bb, ins);
1628 case OP_LOAD_MEMBASE:
1629 case OP_LOADI4_MEMBASE:
1631 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1632 * OP_LOAD_MEMBASE offset(basereg), reg
1634 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
1635 || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1636 ins->inst_basereg == last_ins->inst_destbasereg &&
1637 ins->inst_offset == last_ins->inst_offset) {
1638 if (ins->dreg == last_ins->sreg1) {
1639 MONO_DELETE_INS (bb, ins);
1642 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1643 ins->opcode = OP_MOVE;
1644 ins->sreg1 = last_ins->sreg1;
1648 * Note: reg1 must be different from the basereg in the second load
1649 * OP_LOAD_MEMBASE offset(basereg), reg1
1650 * OP_LOAD_MEMBASE offset(basereg), reg2
1652 * OP_LOAD_MEMBASE offset(basereg), reg1
1653 * OP_MOVE reg1, reg2
1655 } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1656 || last_ins->opcode == OP_LOAD_MEMBASE) &&
1657 ins->inst_basereg != last_ins->dreg &&
1658 ins->inst_basereg == last_ins->inst_basereg &&
1659 ins->inst_offset == last_ins->inst_offset) {
1661 if (ins->dreg == last_ins->dreg) {
1662 MONO_DELETE_INS (bb, ins);
1665 ins->opcode = OP_MOVE;
1666 ins->sreg1 = last_ins->dreg;
1669 //g_assert_not_reached ();
1673 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1674 * OP_LOAD_MEMBASE offset(basereg), reg
1676 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1677 * OP_ICONST reg, imm
1679 } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1680 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1681 ins->inst_basereg == last_ins->inst_destbasereg &&
1682 ins->inst_offset == last_ins->inst_offset) {
1683 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1684 ins->opcode = OP_ICONST;
1685 ins->inst_c0 = last_ins->inst_imm;
1686 g_assert_not_reached (); // check this rule
1691 case OP_LOADI1_MEMBASE:
1692 if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1693 ins->inst_basereg == last_ins->inst_destbasereg &&
1694 ins->inst_offset == last_ins->inst_offset) {
1695 if (ins->dreg == last_ins->sreg1) {
1696 MONO_DELETE_INS (bb, ins);
1699 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1700 ins->opcode = OP_MOVE;
1701 ins->sreg1 = last_ins->sreg1;
1705 case OP_LOADI2_MEMBASE:
1706 if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1707 ins->inst_basereg == last_ins->inst_destbasereg &&
1708 ins->inst_offset == last_ins->inst_offset) {
1709 if (ins->dreg == last_ins->sreg1) {
1710 MONO_DELETE_INS (bb, ins);
1713 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1714 ins->opcode = OP_MOVE;
1715 ins->sreg1 = last_ins->sreg1;
1719 case OP_STOREI4_MEMBASE_IMM:
1720 /* Convert pairs of 0 stores to a dword 0 store */
1721 /* Used when initializing temporaries */
1722 /* We know sparc_fp is dword aligned */
1723 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM) &&
1724 (ins->inst_destbasereg == last_ins->inst_destbasereg) &&
1725 (ins->inst_destbasereg == sparc_fp) &&
1726 (ins->inst_offset < 0) &&
1727 ((ins->inst_offset % 8) == 0) &&
1728 ((ins->inst_offset == last_ins->inst_offset - 4)) &&
1729 (ins->inst_imm == 0) &&
1730 (last_ins->inst_imm == 0)) {
1732 last_ins->opcode = OP_STOREI8_MEMBASE_IMM;
1733 last_ins->inst_offset = ins->inst_offset;
1734 MONO_DELETE_INS (bb, ins);
1745 case OP_COND_EXC_EQ:
1746 case OP_COND_EXC_GE:
1747 case OP_COND_EXC_GT:
1748 case OP_COND_EXC_LE:
1749 case OP_COND_EXC_LT:
1750 case OP_COND_EXC_NE_UN:
1752 * Convert compare with zero+branch to BRcc
1755 * This only works in 64 bit mode, since it examines all 64
1756 * bits of the register.
1757 * Only do this if the method is small since BPr only has a 16bit
1760 if (v64 && (cfg->header->code_size < 10000) && last_ins &&
1761 (last_ins->opcode == OP_COMPARE_IMM) &&
1762 (last_ins->inst_imm == 0)) {
1763 switch (ins->opcode) {
1765 ins->opcode = OP_SPARC_BRZ;
1768 ins->opcode = OP_SPARC_BRNZ;
1771 ins->opcode = OP_SPARC_BRLZ;
1774 ins->opcode = OP_SPARC_BRGZ;
1777 ins->opcode = OP_SPARC_BRGEZ;
1780 ins->opcode = OP_SPARC_BRLEZ;
1782 case OP_COND_EXC_EQ:
1783 ins->opcode = OP_SPARC_COND_EXC_EQZ;
1785 case OP_COND_EXC_GE:
1786 ins->opcode = OP_SPARC_COND_EXC_GEZ;
1788 case OP_COND_EXC_GT:
1789 ins->opcode = OP_SPARC_COND_EXC_GTZ;
1791 case OP_COND_EXC_LE:
1792 ins->opcode = OP_SPARC_COND_EXC_LEZ;
1794 case OP_COND_EXC_LT:
1795 ins->opcode = OP_SPARC_COND_EXC_LTZ;
1797 case OP_COND_EXC_NE_UN:
1798 ins->opcode = OP_SPARC_COND_EXC_NEZ;
1801 g_assert_not_reached ();
1803 ins->sreg1 = last_ins->sreg1;
1805 MONO_DELETE_INS (bb, ins);
1813 if (ins->dreg == ins->sreg1) {
1814 MONO_DELETE_INS (bb, ins);
1818 * OP_MOVE sreg, dreg
1819 * OP_MOVE dreg, sreg
1821 if (last_ins && last_ins->opcode == OP_MOVE &&
1822 ins->sreg1 == last_ins->dreg &&
1823 ins->dreg == last_ins->sreg1) {
1824 MONO_DELETE_INS (bb, ins);
1832 bb->last_ins = last_ins;
1836 mono_arch_decompose_long_opts (MonoCompile *cfg, MonoInst *ins)
1838 switch (ins->opcode) {
1840 MONO_EMIT_NEW_BIALU (cfg, OP_SUBCC, ins->dreg + 1, 0, ins->sreg1 + 1);
1841 MONO_EMIT_NEW_BIALU (cfg, OP_SBB, ins->dreg + 2, 0, ins->sreg1 + 2);
1850 mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1854 /* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
1857 sparc_patch (guint32 *code, const gpointer target)
1860 guint32 ins = *code;
1861 guint32 op = ins >> 30;
1862 guint32 op2 = (ins >> 22) & 0x7;
1863 guint32 rd = (ins >> 25) & 0x1f;
1864 guint8* target8 = (guint8*)target;
1865 gint64 disp = (target8 - (guint8*)code) >> 2;
1868 // g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
1870 if ((op == 0) && (op2 == 2)) {
1871 if (!sparc_is_imm22 (disp))
1874 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1876 else if ((op == 0) && (op2 == 1)) {
1877 if (!sparc_is_imm19 (disp))
1880 *code = ((ins >> 19) << 19) | (disp & 0x7ffff);
1882 else if ((op == 0) && (op2 == 3)) {
1883 if (!sparc_is_imm16 (disp))
1886 *code &= ~(0x180000 | 0x3fff);
1887 *code |= ((disp << 21) & (0x180000)) | (disp & 0x3fff);
1889 else if ((op == 0) && (op2 == 6)) {
1890 if (!sparc_is_imm22 (disp))
1893 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1895 else if ((op == 0) && (op2 == 4)) {
1896 guint32 ins2 = code [1];
1898 if (((ins2 >> 30) == 2) && (((ins2 >> 19) & 0x3f) == 2)) {
1899 /* sethi followed by or */
1901 sparc_set (p, target8, rd);
1902 while (p <= (code + 1))
1905 else if (ins2 == 0x01000000) {
1906 /* sethi followed by nop */
1908 sparc_set (p, target8, rd);
1909 while (p <= (code + 1))
1912 else if ((sparc_inst_op (ins2) == 3) && (sparc_inst_imm (ins2))) {
1913 /* sethi followed by load/store */
1915 guint32 t = (guint32)target8;
1916 *code &= ~(0x3fffff);
1918 *(code + 1) &= ~(0x3ff);
1919 *(code + 1) |= (t & 0x3ff);
1923 (sparc_inst_rd (ins) == sparc_g1) &&
1924 (sparc_inst_op (c [1]) == 0) && (sparc_inst_op2 (c [1]) == 4) &&
1925 (sparc_inst_op (c [2]) == 2) && (sparc_inst_op3 (c [2]) == 2) &&
1926 (sparc_inst_op (c [3]) == 2) && (sparc_inst_op3 (c [3]) == 2))
1930 reg = sparc_inst_rd (c [1]);
1931 sparc_set (p, target8, reg);
1935 else if ((sparc_inst_op (ins2) == 2) && (sparc_inst_op3 (ins2) == 0x38) &&
1936 (sparc_inst_imm (ins2))) {
1937 /* sethi followed by jmpl */
1939 guint32 t = (guint32)target8;
1940 *code &= ~(0x3fffff);
1942 *(code + 1) &= ~(0x3ff);
1943 *(code + 1) |= (t & 0x3ff);
1949 else if (op == 01) {
1950 gint64 disp = (target8 - (guint8*)code) >> 2;
1952 if (!sparc_is_imm30 (disp))
1954 sparc_call_simple (code, target8 - (guint8*)code);
1956 else if ((op == 2) && (sparc_inst_op3 (ins) == 0x2) && sparc_inst_imm (ins)) {
1958 g_assert (sparc_is_imm13 (target8));
1960 *code |= (guint32)target8;
1962 else if ((sparc_inst_op (ins) == 2) && (sparc_inst_op3 (ins) == 0x7)) {
1963 /* sparc_set case 5. */
1967 reg = sparc_inst_rd (c [3]);
1968 sparc_set (p, target, reg);
1975 // g_print ("patched with 0x%08x\n", ins);
1979 * mono_sparc_emit_save_lmf:
1981 * Emit the code neccesary to push a new entry onto the lmf stack. Used by
1982 * trampolines as well.
1985 mono_sparc_emit_save_lmf (guint32 *code, guint32 lmf_offset)
1988 sparc_sti_imm (code, sparc_o0, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr));
1989 /* Save previous_lmf */
1990 sparc_ldi (code, sparc_o0, sparc_g0, sparc_o7);
1991 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf));
1993 sparc_add_imm (code, FALSE, sparc_fp, lmf_offset, sparc_o7);
1994 sparc_sti (code, sparc_o7, sparc_o0, sparc_g0);
2000 mono_sparc_emit_restore_lmf (guint32 *code, guint32 lmf_offset)
2002 /* Load previous_lmf */
2003 sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), sparc_l0);
2005 sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), sparc_l1);
2006 /* *(lmf) = previous_lmf */
2007 sparc_sti (code, sparc_l0, sparc_l1, sparc_g0);
2012 emit_save_sp_to_lmf (MonoCompile *cfg, guint32 *code)
2015 * Since register windows are saved to the current value of %sp, we need to
2016 * set the sp field in the lmf before the call, not in the prolog.
2018 if (cfg->method->save_lmf) {
2019 gint32 lmf_offset = MONO_SPARC_STACK_BIAS - cfg->arch.lmf_offset;
2022 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
2029 emit_vret_token (MonoGenericSharingContext *gsctx, MonoInst *ins, guint32 *code)
2031 MonoCallInst *call = (MonoCallInst*)ins;
2035 * The sparc ABI requires that calls to functions which return a structure
2036 * contain an additional unimpl instruction which is checked by the callee.
2038 if (call->signature->pinvoke && MONO_TYPE_ISSTRUCT(call->signature->ret)) {
2039 if (call->signature->ret->type == MONO_TYPE_TYPEDBYREF)
2040 size = mini_type_stack_size (gsctx, call->signature->ret, NULL);
2042 size = mono_class_native_size (call->signature->ret->data.klass, NULL);
2043 sparc_unimp (code, size & 0xfff);
2050 emit_move_return_value (MonoInst *ins, guint32 *code)
2052 /* Move return value to the target register */
2053 /* FIXME: do more things in the local reg allocator */
2054 switch (ins->opcode) {
2056 case OP_VOIDCALL_REG:
2057 case OP_VOIDCALL_MEMBASE:
2061 case OP_CALL_MEMBASE:
2062 g_assert (ins->dreg == sparc_o0);
2066 case OP_LCALL_MEMBASE:
2068 * ins->dreg is the least significant reg due to the lreg: LCALL rule
2069 * in inssel-long32.brg.
2072 sparc_mov_reg_reg (code, sparc_o0, ins->dreg);
2074 g_assert (ins->dreg == sparc_o1);
2079 case OP_FCALL_MEMBASE:
2081 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4) {
2082 sparc_fmovs (code, sparc_f0, ins->dreg);
2083 sparc_fstod (code, ins->dreg, ins->dreg);
2086 sparc_fmovd (code, sparc_f0, ins->dreg);
2088 sparc_fmovs (code, sparc_f0, ins->dreg);
2089 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4)
2090 sparc_fstod (code, ins->dreg, ins->dreg);
2092 sparc_fmovs (code, sparc_f1, ins->dreg + 1);
2097 case OP_VCALL_MEMBASE:
2100 case OP_VCALL2_MEMBASE:
2110 * emit_load_volatile_arguments:
2112 * Load volatile arguments from the stack to the original input registers.
2113 * Required before a tail call.
2116 emit_load_volatile_arguments (MonoCompile *cfg, guint32 *code)
2118 MonoMethod *method = cfg->method;
2119 MonoMethodSignature *sig;
2124 /* FIXME: Generate intermediate code instead */
2126 sig = mono_method_signature (method);
2128 cinfo = get_call_info (cfg, sig, FALSE);
2130 /* This is the opposite of the code in emit_prolog */
2132 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
2133 ArgInfo *ainfo = cinfo->args + i;
2134 gint32 stack_offset;
2137 inst = cfg->args [i];
2139 if (sig->hasthis && (i == 0))
2140 arg_type = &mono_defaults.object_class->byval_arg;
2142 arg_type = sig->params [i - sig->hasthis];
2144 stack_offset = ainfo->offset + ARGS_OFFSET;
2145 ireg = sparc_i0 + ainfo->reg;
2147 if (ainfo->storage == ArgInSplitRegStack) {
2148 g_assert (inst->opcode == OP_REGOFFSET);
2150 if (!sparc_is_imm13 (stack_offset))
2152 sparc_st_imm (code, inst->inst_basereg, stack_offset, sparc_i5);
2155 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
2156 if (ainfo->storage == ArgInIRegPair) {
2157 if (!sparc_is_imm13 (inst->inst_offset + 4))
2159 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2160 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2163 if (ainfo->storage == ArgInSplitRegStack) {
2164 if (stack_offset != inst->inst_offset) {
2165 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_i5);
2166 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2167 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2172 if (ainfo->storage == ArgOnStackPair) {
2173 if (stack_offset != inst->inst_offset) {
2174 /* stack_offset is not dword aligned, so we need to make a copy */
2175 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_o7);
2176 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset);
2178 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2179 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2184 g_assert_not_reached ();
2187 if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
2188 /* Argument in register, but need to be saved to stack */
2189 if (!sparc_is_imm13 (stack_offset))
2191 if ((stack_offset - ARGS_OFFSET) & 0x1)
2192 /* FIXME: Is this ldsb or ldub ? */
2193 sparc_ldsb_imm (code, inst->inst_basereg, stack_offset, ireg);
2195 if ((stack_offset - ARGS_OFFSET) & 0x2)
2196 sparc_ldsh_imm (code, inst->inst_basereg, stack_offset, ireg);
2198 if ((stack_offset - ARGS_OFFSET) & 0x4)
2199 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2202 sparc_ldx_imm (code, inst->inst_basereg, stack_offset, ireg);
2204 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2207 else if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
2208 /* Argument in regpair, but need to be saved to stack */
2209 if (!sparc_is_imm13 (inst->inst_offset + 4))
2211 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2212 sparc_st_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2214 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
2217 else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
2221 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
2222 if (inst->opcode == OP_REGVAR)
2223 /* FIXME: Load the argument into memory */
2233 * mono_sparc_is_virtual_call:
2235 * Determine whenever the instruction at CODE is a virtual call.
2238 mono_sparc_is_virtual_call (guint32 *code)
2245 if ((sparc_inst_op (*code) == 0x2) && (sparc_inst_op3 (*code) == 0x38)) {
2247 * Register indirect call. If it is a virtual call, then the
2248 * instruction in the delay slot is a special kind of nop.
2251 /* Construct special nop */
2252 sparc_or_imm (p, FALSE, sparc_g0, 0xca, sparc_g0);
2255 if (code [1] == p [0])
2263 #define BR_SMALL_SIZE 2
2264 #define BR_LARGE_SIZE 2
2265 #define JUMP_IMM_SIZE 5
2266 #define ENABLE_WRONG_METHOD_CHECK 0
2269 * LOCKING: called with the domain lock held
2272 mono_arch_build_imt_thunk (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count,
2273 gpointer fail_tramp)
2277 guint32 *code, *start;
2279 for (i = 0; i < count; ++i) {
2280 MonoIMTCheckItem *item = imt_entries [i];
2281 if (item->is_equals) {
2282 if (item->check_target_idx) {
2283 if (!item->compare_done)
2284 item->chunk_size += CMP_SIZE;
2285 item->chunk_size += BR_SMALL_SIZE + JUMP_IMM_SIZE;
2288 item->chunk_size += 16;
2289 item->chunk_size += JUMP_IMM_SIZE;
2290 #if ENABLE_WRONG_METHOD_CHECK
2291 item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
2295 item->chunk_size += CMP_SIZE + BR_LARGE_SIZE;
2296 imt_entries [item->check_target_idx]->compare_done = TRUE;
2298 size += item->chunk_size;
2301 code = mono_method_alloc_generic_virtual_thunk (domain, size * 4);
2303 code = mono_domain_code_reserve (domain, size * 4);
2305 for (i = 0; i < count; ++i) {
2306 MonoIMTCheckItem *item = imt_entries [i];
2307 item->code_target = (guint8*)code;
2308 if (item->is_equals) {
2309 gboolean fail_case = !item->check_target_idx && fail_tramp;
2311 if (item->check_target_idx || fail_case) {
2312 if (!item->compare_done || fail_case) {
2313 sparc_set (code, (guint32)item->key, sparc_g5);
2314 sparc_cmp (code, MONO_ARCH_IMT_REG, sparc_g5);
2316 item->jmp_code = (guint8*)code;
2317 sparc_branch (code, 0, sparc_bne, 0);
2319 sparc_set (code, ((guint32)(&(vtable->vtable [item->value.vtable_slot]))), sparc_g5);
2320 sparc_ld (code, sparc_g5, 0, sparc_g5);
2321 sparc_jmpl (code, sparc_g5, sparc_g0, sparc_g0);
2325 sparc_patch (item->jmp_code, code);
2326 sparc_set (code, fail_tramp, sparc_g5);
2327 sparc_jmpl (code, sparc_g5, sparc_g0, sparc_g0);
2329 item->jmp_code = NULL;
2332 /* enable the commented code to assert on wrong method */
2333 #if ENABLE_WRONG_METHOD_CHECK
2334 g_assert_not_reached ();
2336 sparc_set (code, ((guint32)(&(vtable->vtable [item->value.vtable_slot]))), sparc_g5);
2337 sparc_ld (code, sparc_g5, 0, sparc_g5);
2338 sparc_jmpl (code, sparc_g5, sparc_g0, sparc_g0);
2340 #if ENABLE_WRONG_METHOD_CHECK
2341 g_assert_not_reached ();
2345 sparc_set (code, (guint32)item->key, sparc_g5);
2346 sparc_cmp (code, MONO_ARCH_IMT_REG, sparc_g5);
2347 item->jmp_code = (guint8*)code;
2348 sparc_branch (code, 0, sparc_beu, 0);
2352 /* patch the branches to get to the target items */
2353 for (i = 0; i < count; ++i) {
2354 MonoIMTCheckItem *item = imt_entries [i];
2355 if (item->jmp_code) {
2356 if (item->check_target_idx) {
2357 sparc_patch ((guint32*)item->jmp_code, imt_entries [item->check_target_idx]->code_target);
2362 mono_arch_flush_icache ((guint8*)start, (code - start) * 4);
2364 mono_stats.imt_thunks_size += (code - start) * 4;
2365 g_assert (code - start <= size);
2370 mono_arch_find_imt_method (mgreg_t *regs, guint8 *code)
2373 g_assert_not_reached ();
2376 return (MonoMethod*)regs [sparc_g1];
2380 mono_arch_get_this_arg_from_call (MonoGenericSharingContext *gsctx, MonoMethodSignature *sig, mgreg_t *regs, guint8 *code)
2382 mono_sparc_flushw ();
2384 return (gpointer)regs [sparc_o0];
2388 * Some conventions used in the following code.
2389 * 2) The only scratch registers we have are o7 and g1. We try to
2390 * stick to o7 when we can, and use g1 when necessary.
2394 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2399 guint32 *code = (guint32*)(cfg->native_code + cfg->code_len);
2400 MonoInst *last_ins = NULL;
2404 if (cfg->verbose_level > 2)
2405 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2407 cpos = bb->max_offset;
2409 if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2413 MONO_BB_FOR_EACH_INS (bb, ins) {
2416 offset = (guint8*)code - cfg->native_code;
2418 spec = ins_get_spec (ins->opcode);
2420 max_len = ((guint8 *)spec)[MONO_INST_LEN];
2422 if (offset > (cfg->code_size - max_len - 16)) {
2423 cfg->code_size *= 2;
2424 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2425 code = (guint32*)(cfg->native_code + offset);
2427 code_start = (guint8*)code;
2428 // if (ins->cil_code)
2429 // g_print ("cil code\n");
2430 mono_debug_record_line_number (cfg, ins, offset);
2432 switch (ins->opcode) {
2433 case OP_STOREI1_MEMBASE_IMM:
2434 EMIT_STORE_MEMBASE_IMM (ins, stb);
2436 case OP_STOREI2_MEMBASE_IMM:
2437 EMIT_STORE_MEMBASE_IMM (ins, sth);
2439 case OP_STORE_MEMBASE_IMM:
2440 EMIT_STORE_MEMBASE_IMM (ins, sti);
2442 case OP_STOREI4_MEMBASE_IMM:
2443 EMIT_STORE_MEMBASE_IMM (ins, st);
2445 case OP_STOREI8_MEMBASE_IMM:
2447 EMIT_STORE_MEMBASE_IMM (ins, stx);
2449 /* Only generated by peephole opts */
2450 g_assert ((ins->inst_offset % 8) == 0);
2451 g_assert (ins->inst_imm == 0);
2452 EMIT_STORE_MEMBASE_IMM (ins, stx);
2455 case OP_STOREI1_MEMBASE_REG:
2456 EMIT_STORE_MEMBASE_REG (ins, stb);
2458 case OP_STOREI2_MEMBASE_REG:
2459 EMIT_STORE_MEMBASE_REG (ins, sth);
2461 case OP_STOREI4_MEMBASE_REG:
2462 EMIT_STORE_MEMBASE_REG (ins, st);
2464 case OP_STOREI8_MEMBASE_REG:
2466 EMIT_STORE_MEMBASE_REG (ins, stx);
2468 /* Only used by OP_MEMSET */
2469 EMIT_STORE_MEMBASE_REG (ins, std);
2472 case OP_STORE_MEMBASE_REG:
2473 EMIT_STORE_MEMBASE_REG (ins, sti);
2476 sparc_set (code, ins->inst_c0, ins->dreg);
2477 sparc_ld (code, ins->dreg, sparc_g0, ins->dreg);
2479 case OP_LOADI4_MEMBASE:
2481 EMIT_LOAD_MEMBASE (ins, ldsw);
2483 EMIT_LOAD_MEMBASE (ins, ld);
2486 case OP_LOADU4_MEMBASE:
2487 EMIT_LOAD_MEMBASE (ins, ld);
2489 case OP_LOADU1_MEMBASE:
2490 EMIT_LOAD_MEMBASE (ins, ldub);
2492 case OP_LOADI1_MEMBASE:
2493 EMIT_LOAD_MEMBASE (ins, ldsb);
2495 case OP_LOADU2_MEMBASE:
2496 EMIT_LOAD_MEMBASE (ins, lduh);
2498 case OP_LOADI2_MEMBASE:
2499 EMIT_LOAD_MEMBASE (ins, ldsh);
2501 case OP_LOAD_MEMBASE:
2503 EMIT_LOAD_MEMBASE (ins, ldx);
2505 EMIT_LOAD_MEMBASE (ins, ld);
2509 case OP_LOADI8_MEMBASE:
2510 EMIT_LOAD_MEMBASE (ins, ldx);
2513 case OP_ICONV_TO_I1:
2514 sparc_sll_imm (code, ins->sreg1, 24, sparc_o7);
2515 sparc_sra_imm (code, sparc_o7, 24, ins->dreg);
2517 case OP_ICONV_TO_I2:
2518 sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2519 sparc_sra_imm (code, sparc_o7, 16, ins->dreg);
2521 case OP_ICONV_TO_U1:
2522 sparc_and_imm (code, FALSE, ins->sreg1, 0xff, ins->dreg);
2524 case OP_ICONV_TO_U2:
2525 sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2526 sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
2528 case OP_LCONV_TO_OVF_U4:
2529 case OP_ICONV_TO_OVF_U4:
2530 /* Only used on V9 */
2531 sparc_cmp_imm (code, ins->sreg1, 0);
2532 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2533 MONO_PATCH_INFO_EXC, "OverflowException");
2534 sparc_branchp (code, 0, sparc_bl, sparc_xcc_short, 0, 0);
2536 sparc_set (code, 1, sparc_o7);
2537 sparc_sllx_imm (code, sparc_o7, 32, sparc_o7);
2538 sparc_cmp (code, ins->sreg1, sparc_o7);
2539 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2540 MONO_PATCH_INFO_EXC, "OverflowException");
2541 sparc_branchp (code, 0, sparc_bge, sparc_xcc_short, 0, 0);
2543 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2545 case OP_LCONV_TO_OVF_I4_UN:
2546 case OP_ICONV_TO_OVF_I4_UN:
2547 /* Only used on V9 */
2553 sparc_cmp (code, ins->sreg1, ins->sreg2);
2555 case OP_COMPARE_IMM:
2556 case OP_ICOMPARE_IMM:
2557 if (sparc_is_imm13 (ins->inst_imm))
2558 sparc_cmp_imm (code, ins->sreg1, ins->inst_imm);
2560 sparc_set (code, ins->inst_imm, sparc_o7);
2561 sparc_cmp (code, ins->sreg1, sparc_o7);
2566 * gdb does not like encountering 'ta 1' in the debugged code. So
2567 * instead of emitting a trap, we emit a call a C function and place a
2570 //sparc_ta (code, 1);
2571 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, mono_break);
2576 sparc_add (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2579 sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2584 /* according to inssel-long32.brg, this should set cc */
2585 EMIT_ALU_IMM (ins, add, TRUE);
2589 /* according to inssel-long32.brg, this should set cc */
2590 sparc_addx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2594 EMIT_ALU_IMM (ins, addx, TRUE);
2598 sparc_sub (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2601 sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2606 /* according to inssel-long32.brg, this should set cc */
2607 EMIT_ALU_IMM (ins, sub, TRUE);
2611 /* according to inssel-long32.brg, this should set cc */
2612 sparc_subx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2616 EMIT_ALU_IMM (ins, subx, TRUE);
2619 sparc_and (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2623 EMIT_ALU_IMM (ins, and, FALSE);
2626 /* Sign extend sreg1 into %y */
2627 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2628 sparc_wry (code, sparc_o7, sparc_g0);
2629 sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2630 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2633 sparc_wry (code, sparc_g0, sparc_g0);
2634 sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2640 /* Transform division into a shift */
2641 for (i = 1; i < 30; ++i) {
2643 if (ins->inst_imm == imm)
2649 sparc_srl_imm (code, ins->sreg1, 31, sparc_o7);
2650 sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2651 sparc_sra_imm (code, ins->dreg, 1, ins->dreg);
2654 /* http://compilers.iecc.com/comparch/article/93-04-079 */
2655 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2656 sparc_srl_imm (code, sparc_o7, 32 - i, sparc_o7);
2657 sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2658 sparc_sra_imm (code, ins->dreg, i, ins->dreg);
2662 /* Sign extend sreg1 into %y */
2663 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2664 sparc_wry (code, sparc_o7, sparc_g0);
2665 EMIT_ALU_IMM (ins, sdiv, TRUE);
2666 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2670 case OP_IDIV_UN_IMM:
2671 sparc_wry (code, sparc_g0, sparc_g0);
2672 EMIT_ALU_IMM (ins, udiv, FALSE);
2675 /* Sign extend sreg1 into %y */
2676 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2677 sparc_wry (code, sparc_o7, sparc_g0);
2678 sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, sparc_o7);
2679 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2680 sparc_smul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2681 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2684 sparc_wry (code, sparc_g0, sparc_g0);
2685 sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2686 sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2687 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2691 /* Sign extend sreg1 into %y */
2692 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2693 sparc_wry (code, sparc_o7, sparc_g0);
2694 if (!sparc_is_imm13 (ins->inst_imm)) {
2695 sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
2696 sparc_sdiv (code, TRUE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
2697 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2698 sparc_smul (code, FALSE, sparc_o7, GP_SCRATCH_REG, sparc_o7);
2701 sparc_sdiv_imm (code, TRUE, ins->sreg1, ins->inst_imm, sparc_o7);
2702 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2703 sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
2705 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2707 case OP_IREM_UN_IMM:
2708 sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
2709 sparc_wry (code, sparc_g0, sparc_g0);
2710 sparc_udiv (code, FALSE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
2711 sparc_umul (code, FALSE, GP_SCRATCH_REG, sparc_o7, sparc_o7);
2712 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2715 sparc_or (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2719 EMIT_ALU_IMM (ins, or, FALSE);
2722 sparc_xor (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2726 EMIT_ALU_IMM (ins, xor, FALSE);
2729 sparc_sll (code, ins->sreg1, ins->sreg2, ins->dreg);
2733 if (ins->inst_imm < (1 << 5))
2734 sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2736 sparc_set (code, ins->inst_imm, sparc_o7);
2737 sparc_sll (code, ins->sreg1, sparc_o7, ins->dreg);
2741 sparc_sra (code, ins->sreg1, ins->sreg2, ins->dreg);
2745 if (ins->inst_imm < (1 << 5))
2746 sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2748 sparc_set (code, ins->inst_imm, sparc_o7);
2749 sparc_sra (code, ins->sreg1, sparc_o7, ins->dreg);
2753 case OP_ISHR_UN_IMM:
2754 if (ins->inst_imm < (1 << 5))
2755 sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2757 sparc_set (code, ins->inst_imm, sparc_o7);
2758 sparc_srl (code, ins->sreg1, sparc_o7, ins->dreg);
2762 sparc_srl (code, ins->sreg1, ins->sreg2, ins->dreg);
2765 sparc_sllx (code, ins->sreg1, ins->sreg2, ins->dreg);
2768 if (ins->inst_imm < (1 << 6))
2769 sparc_sllx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2771 sparc_set (code, ins->inst_imm, sparc_o7);
2772 sparc_sllx (code, ins->sreg1, sparc_o7, ins->dreg);
2776 sparc_srax (code, ins->sreg1, ins->sreg2, ins->dreg);
2779 if (ins->inst_imm < (1 << 6))
2780 sparc_srax_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2782 sparc_set (code, ins->inst_imm, sparc_o7);
2783 sparc_srax (code, ins->sreg1, sparc_o7, ins->dreg);
2787 sparc_srlx (code, ins->sreg1, ins->sreg2, ins->dreg);
2789 case OP_LSHR_UN_IMM:
2790 if (ins->inst_imm < (1 << 6))
2791 sparc_srlx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2793 sparc_set (code, ins->inst_imm, sparc_o7);
2794 sparc_srlx (code, ins->sreg1, sparc_o7, ins->dreg);
2798 /* can't use sparc_not */
2799 sparc_xnor (code, FALSE, ins->sreg1, sparc_g0, ins->dreg);
2802 /* can't use sparc_neg */
2803 sparc_sub (code, FALSE, sparc_g0, ins->sreg1, ins->dreg);
2806 sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2812 if ((ins->inst_imm == 1) && (ins->sreg1 == ins->dreg))
2815 /* Transform multiplication into a shift */
2816 for (i = 0; i < 30; ++i) {
2818 if (ins->inst_imm == imm)
2822 sparc_sll_imm (code, ins->sreg1, i, ins->dreg);
2824 EMIT_ALU_IMM (ins, smul, FALSE);
2828 sparc_smul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2829 sparc_rdy (code, sparc_g1);
2830 sparc_sra_imm (code, ins->dreg, 31, sparc_o7);
2831 sparc_cmp (code, sparc_g1, sparc_o7);
2832 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2834 case OP_IMUL_OVF_UN:
2835 sparc_umul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2836 sparc_rdy (code, sparc_o7);
2837 sparc_cmp (code, sparc_o7, sparc_g0);
2838 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2841 sparc_set (code, ins->inst_c0, ins->dreg);
2844 sparc_set (code, ins->inst_l, ins->dreg);
2847 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2848 sparc_set_template (code, ins->dreg);
2851 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2852 sparc_set_template (code, ins->dreg);
2854 case OP_ICONV_TO_I4:
2855 case OP_ICONV_TO_U4:
2857 if (ins->sreg1 != ins->dreg)
2858 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2862 if (ins->sreg1 != ins->dreg)
2863 sparc_fmovd (code, ins->sreg1, ins->dreg);
2865 sparc_fmovs (code, ins->sreg1, ins->dreg);
2866 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2870 if (cfg->method->save_lmf)
2873 code = emit_load_volatile_arguments (cfg, code);
2874 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2875 sparc_set_template (code, sparc_o7);
2876 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_g0);
2877 /* Restore parent frame in delay slot */
2878 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
2881 /* ensure ins->sreg1 is not NULL */
2882 /* Might be misaligned in case of vtypes so use a byte load */
2883 sparc_ldsb_imm (code, ins->sreg1, 0, sparc_g0);
2886 sparc_add_imm (code, FALSE, sparc_fp, cfg->sig_cookie, sparc_o7);
2887 sparc_sti_imm (code, sparc_o7, ins->sreg1, 0);
2895 call = (MonoCallInst*)ins;
2896 g_assert (!call->virtual);
2897 code = emit_save_sp_to_lmf (cfg, code);
2898 if (ins->flags & MONO_INST_HAS_METHOD)
2899 code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2901 code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2903 code = emit_vret_token (cfg->generic_sharing_context, ins, code);
2904 code = emit_move_return_value (ins, code);
2910 case OP_VOIDCALL_REG:
2912 call = (MonoCallInst*)ins;
2913 code = emit_save_sp_to_lmf (cfg, code);
2914 sparc_jmpl (code, ins->sreg1, sparc_g0, sparc_callsite);
2916 * We emit a special kind of nop in the delay slot to tell the
2917 * trampoline code that this is a virtual call, thus an unbox
2918 * trampoline might need to be called.
2921 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2925 code = emit_vret_token (cfg->generic_sharing_context, ins, code);
2926 code = emit_move_return_value (ins, code);
2928 case OP_FCALL_MEMBASE:
2929 case OP_LCALL_MEMBASE:
2930 case OP_VCALL_MEMBASE:
2931 case OP_VCALL2_MEMBASE:
2932 case OP_VOIDCALL_MEMBASE:
2933 case OP_CALL_MEMBASE:
2934 call = (MonoCallInst*)ins;
2935 code = emit_save_sp_to_lmf (cfg, code);
2936 if (sparc_is_imm13 (ins->inst_offset)) {
2937 sparc_ldi_imm (code, ins->inst_basereg, ins->inst_offset, sparc_o7);
2939 sparc_set (code, ins->inst_offset, sparc_o7);
2940 sparc_ldi (code, ins->inst_basereg, sparc_o7, sparc_o7);
2942 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_callsite);
2944 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2948 code = emit_vret_token (cfg->generic_sharing_context, ins, code);
2949 code = emit_move_return_value (ins, code);
2952 if (mono_method_signature (cfg->method)->ret->type == MONO_TYPE_R4)
2953 sparc_fdtos (code, ins->sreg1, sparc_f0);
2956 sparc_fmovd (code, ins->sreg1, ins->dreg);
2958 /* FIXME: Why not use fmovd ? */
2959 sparc_fmovs (code, ins->sreg1, ins->dreg);
2960 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2968 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2969 /* Perform stack touching */
2973 /* Keep alignment */
2974 /* Add 4 to compensate for the rounding of localloc_offset */
2975 sparc_add_imm (code, FALSE, ins->sreg1, 4 + MONO_ARCH_LOCALLOC_ALIGNMENT - 1, ins->dreg);
2976 sparc_set (code, ~(MONO_ARCH_LOCALLOC_ALIGNMENT - 1), sparc_o7);
2977 sparc_and (code, FALSE, ins->dreg, sparc_o7, ins->dreg);
2979 if ((ins->flags & MONO_INST_INIT) && (ins->sreg1 == ins->dreg)) {
2981 size_reg = sparc_g4;
2983 size_reg = sparc_g1;
2985 sparc_mov_reg_reg (code, ins->dreg, size_reg);
2988 size_reg = ins->sreg1;
2990 sparc_sub (code, FALSE, sparc_sp, ins->dreg, ins->dreg);
2991 /* Keep %sp valid at all times */
2992 sparc_mov_reg_reg (code, ins->dreg, sparc_sp);
2993 /* Round localloc_offset too so the result is at least 8 aligned */
2994 offset2 = ALIGN_TO (cfg->arch.localloc_offset, 8);
2995 g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + offset2));
2996 sparc_add_imm (code, FALSE, ins->dreg, MONO_SPARC_STACK_BIAS + offset2, ins->dreg);
2998 if (ins->flags & MONO_INST_INIT) {
3000 /* Initialize memory region */
3001 sparc_cmp_imm (code, size_reg, 0);
3003 sparc_branch (code, 0, sparc_be, 0);
3005 sparc_set (code, 0, sparc_o7);
3006 sparc_sub_imm (code, 0, size_reg, sparcv9 ? 8 : 4, size_reg);
3010 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
3012 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
3013 sparc_cmp (code, sparc_o7, size_reg);
3015 sparc_branch (code, 0, sparc_bl, 0);
3016 sparc_patch (br [2], br [1]);
3018 sparc_add_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
3019 sparc_patch (br [0], code);
3023 case OP_LOCALLOC_IMM: {
3024 gint32 offset = ins->inst_imm;
3027 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3028 /* Perform stack touching */
3032 /* To compensate for the rounding of localloc_offset */
3033 offset += sizeof (gpointer);
3034 offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3035 if (sparc_is_imm13 (offset))
3036 sparc_sub_imm (code, FALSE, sparc_sp, offset, sparc_sp);
3038 sparc_set (code, offset, sparc_o7);
3039 sparc_sub (code, FALSE, sparc_sp, sparc_o7, sparc_sp);
3041 /* Round localloc_offset too so the result is at least 8 aligned */
3042 offset2 = ALIGN_TO (cfg->arch.localloc_offset, 8);
3043 g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + offset2));
3044 sparc_add_imm (code, FALSE, sparc_sp, MONO_SPARC_STACK_BIAS + offset2, ins->dreg);
3045 if ((ins->flags & MONO_INST_INIT) && (offset > 0)) {
3051 while (i < offset) {
3053 sparc_stx_imm (code, sparc_g0, ins->dreg, i);
3057 sparc_st_imm (code, sparc_g0, ins->dreg, i);
3063 sparc_set (code, offset, sparc_o7);
3064 sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
3065 /* beginning of loop */
3068 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
3070 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
3071 sparc_cmp_imm (code, sparc_o7, 0);
3073 sparc_branch (code, 0, sparc_bne, 0);
3075 sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
3076 sparc_patch (br [1], br [0]);
3082 sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3083 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3084 (gpointer)"mono_arch_throw_exception");
3088 sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3089 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3090 (gpointer)"mono_arch_rethrow_exception");
3093 case OP_START_HANDLER: {
3095 * The START_HANDLER instruction marks the beginning of a handler
3096 * block. It is called using a call instruction, so %o7 contains
3097 * the return address. Since the handler executes in the same stack
3098 * frame as the method itself, we can't use save/restore to save
3099 * the return address. Instead, we save it into a dedicated
3102 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3103 if (!sparc_is_imm13 (spvar->inst_offset)) {
3104 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3105 sparc_sti (code, sparc_o7, spvar->inst_basereg, GP_SCRATCH_REG);
3108 sparc_sti_imm (code, sparc_o7, spvar->inst_basereg, spvar->inst_offset);
3111 case OP_ENDFILTER: {
3112 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3113 if (!sparc_is_imm13 (spvar->inst_offset)) {
3114 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3115 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
3118 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3119 sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3121 sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3124 case OP_ENDFINALLY: {
3125 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3126 if (!sparc_is_imm13 (spvar->inst_offset)) {
3127 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3128 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
3131 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3132 sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3136 case OP_CALL_HANDLER:
3137 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3138 /* This is a jump inside the method, so call_simple works even on V9 */
3139 sparc_call_simple (code, 0);
3141 mono_cfg_add_try_hole (cfg, ins->inst_eh_block, code, bb);
3144 ins->inst_c0 = (guint8*)code - cfg->native_code;
3146 case OP_RELAXED_NOP:
3149 case OP_DUMMY_STORE:
3150 case OP_NOT_REACHED:
3154 //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
3155 if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
3157 if (ins->inst_target_bb->native_offset) {
3158 gint32 disp = (ins->inst_target_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2;
3159 g_assert (sparc_is_imm22 (disp));
3160 sparc_branch (code, 1, sparc_ba, disp);
3162 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3163 sparc_branch (code, 1, sparc_ba, 0);
3168 sparc_jmp (code, ins->sreg1, sparc_g0);
3176 if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3177 sparc_clr_reg (code, ins->dreg);
3178 sparc_movcc_imm (code, sparc_xcc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3181 sparc_clr_reg (code, ins->dreg);
3183 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), DEFAULT_ICC, 0, 2);
3185 sparc_branch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3188 sparc_set (code, 1, ins->dreg);
3196 if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3197 sparc_clr_reg (code, ins->dreg);
3198 sparc_movcc_imm (code, sparc_icc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3201 sparc_clr_reg (code, ins->dreg);
3202 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), sparc_icc_short, 0, 2);
3204 sparc_set (code, 1, ins->dreg);
3207 case OP_COND_EXC_EQ:
3208 case OP_COND_EXC_NE_UN:
3209 case OP_COND_EXC_LT:
3210 case OP_COND_EXC_LT_UN:
3211 case OP_COND_EXC_GT:
3212 case OP_COND_EXC_GT_UN:
3213 case OP_COND_EXC_GE:
3214 case OP_COND_EXC_GE_UN:
3215 case OP_COND_EXC_LE:
3216 case OP_COND_EXC_LE_UN:
3217 case OP_COND_EXC_OV:
3218 case OP_COND_EXC_NO:
3220 case OP_COND_EXC_NC:
3221 case OP_COND_EXC_IEQ:
3222 case OP_COND_EXC_INE_UN:
3223 case OP_COND_EXC_ILT:
3224 case OP_COND_EXC_ILT_UN:
3225 case OP_COND_EXC_IGT:
3226 case OP_COND_EXC_IGT_UN:
3227 case OP_COND_EXC_IGE:
3228 case OP_COND_EXC_IGE_UN:
3229 case OP_COND_EXC_ILE:
3230 case OP_COND_EXC_ILE_UN:
3231 case OP_COND_EXC_IOV:
3232 case OP_COND_EXC_INO:
3233 case OP_COND_EXC_IC:
3234 case OP_COND_EXC_INC:
3238 EMIT_COND_SYSTEM_EXCEPTION (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1);
3241 case OP_SPARC_COND_EXC_EQZ:
3242 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brz, ins->inst_p1);
3244 case OP_SPARC_COND_EXC_GEZ:
3245 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgez, ins->inst_p1);
3247 case OP_SPARC_COND_EXC_GTZ:
3248 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgz, ins->inst_p1);
3250 case OP_SPARC_COND_EXC_LEZ:
3251 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlez, ins->inst_p1);
3253 case OP_SPARC_COND_EXC_LTZ:
3254 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlz, ins->inst_p1);
3256 case OP_SPARC_COND_EXC_NEZ:
3257 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brnz, ins->inst_p1);
3271 EMIT_COND_BRANCH_PREDICTED (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3273 EMIT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3278 EMIT_COND_BRANCH_BPR (ins, brz, 1, 1, 1);
3280 case OP_SPARC_BRLEZ:
3281 EMIT_COND_BRANCH_BPR (ins, brlez, 1, 1, 1);
3284 EMIT_COND_BRANCH_BPR (ins, brlz, 1, 1, 1);
3287 EMIT_COND_BRANCH_BPR (ins, brnz, 1, 1, 1);
3290 EMIT_COND_BRANCH_BPR (ins, brgz, 1, 1, 1);
3292 case OP_SPARC_BRGEZ:
3293 EMIT_COND_BRANCH_BPR (ins, brgez, 1, 1, 1);
3296 /* floating point opcodes */
3298 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
3300 sparc_set_template (code, sparc_o7);
3302 sparc_sethi (code, 0, sparc_o7);
3304 sparc_lddf_imm (code, sparc_o7, 0, ins->dreg);
3307 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
3309 sparc_set_template (code, sparc_o7);
3311 sparc_sethi (code, 0, sparc_o7);
3313 sparc_ldf_imm (code, sparc_o7, 0, FP_SCRATCH_REG);
3315 /* Extend to double */
3316 sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3318 case OP_STORER8_MEMBASE_REG:
3319 if (!sparc_is_imm13 (ins->inst_offset + 4)) {
3320 sparc_set (code, ins->inst_offset, sparc_o7);
3321 /* SPARCV9 handles misaligned fp loads/stores */
3322 if (!v64 && (ins->inst_offset % 8)) {
3324 sparc_add (code, FALSE, ins->inst_destbasereg, sparc_o7, sparc_o7);
3325 sparc_stf (code, ins->sreg1, sparc_o7, sparc_g0);
3326 sparc_stf_imm (code, ins->sreg1 + 1, sparc_o7, 4);
3328 sparc_stdf (code, ins->sreg1, ins->inst_destbasereg, sparc_o7);
3331 if (!v64 && (ins->inst_offset % 8)) {
3333 sparc_stf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3334 sparc_stf_imm (code, ins->sreg1 + 1, ins->inst_destbasereg, ins->inst_offset + 4);
3336 sparc_stdf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3339 case OP_LOADR8_MEMBASE:
3340 EMIT_LOAD_MEMBASE (ins, lddf);
3342 case OP_STORER4_MEMBASE_REG:
3343 /* This requires a double->single conversion */
3344 sparc_fdtos (code, ins->sreg1, FP_SCRATCH_REG);
3345 if (!sparc_is_imm13 (ins->inst_offset)) {
3346 sparc_set (code, ins->inst_offset, sparc_o7);
3347 sparc_stf (code, FP_SCRATCH_REG, ins->inst_destbasereg, sparc_o7);
3350 sparc_stf_imm (code, FP_SCRATCH_REG, ins->inst_destbasereg, ins->inst_offset);
3352 case OP_LOADR4_MEMBASE: {
3353 /* ldf needs a single precision register */
3354 int dreg = ins->dreg;
3355 ins->dreg = FP_SCRATCH_REG;
3356 EMIT_LOAD_MEMBASE (ins, ldf);
3358 /* Extend to double */
3359 sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3362 case OP_ICONV_TO_R4: {
3363 MonoInst *spill = cfg->arch.float_spill_slot;
3364 gint32 reg = spill->inst_basereg;
3365 gint32 offset = spill->inst_offset;
3367 g_assert (spill->opcode == OP_REGOFFSET);
3369 if (!sparc_is_imm13 (offset)) {
3370 sparc_set (code, offset, sparc_o7);
3371 sparc_stx (code, ins->sreg1, reg, offset);
3372 sparc_lddf (code, reg, offset, FP_SCRATCH_REG);
3374 sparc_stx_imm (code, ins->sreg1, reg, offset);
3375 sparc_lddf_imm (code, reg, offset, FP_SCRATCH_REG);
3377 sparc_fxtos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3379 if (!sparc_is_imm13 (offset)) {
3380 sparc_set (code, offset, sparc_o7);
3381 sparc_st (code, ins->sreg1, reg, sparc_o7);
3382 sparc_ldf (code, reg, sparc_o7, FP_SCRATCH_REG);
3384 sparc_st_imm (code, ins->sreg1, reg, offset);
3385 sparc_ldf_imm (code, reg, offset, FP_SCRATCH_REG);
3387 sparc_fitos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3389 sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3392 case OP_ICONV_TO_R8: {
3393 MonoInst *spill = cfg->arch.float_spill_slot;
3394 gint32 reg = spill->inst_basereg;
3395 gint32 offset = spill->inst_offset;
3397 g_assert (spill->opcode == OP_REGOFFSET);
3400 if (!sparc_is_imm13 (offset)) {
3401 sparc_set (code, offset, sparc_o7);
3402 sparc_stx (code, ins->sreg1, reg, sparc_o7);
3403 sparc_lddf (code, reg, sparc_o7, FP_SCRATCH_REG);
3405 sparc_stx_imm (code, ins->sreg1, reg, offset);
3406 sparc_lddf_imm (code, reg, offset, FP_SCRATCH_REG);
3408 sparc_fxtod (code, FP_SCRATCH_REG, ins->dreg);
3410 if (!sparc_is_imm13 (offset)) {
3411 sparc_set (code, offset, sparc_o7);
3412 sparc_st (code, ins->sreg1, reg, sparc_o7);
3413 sparc_ldf (code, reg, sparc_o7, FP_SCRATCH_REG);
3415 sparc_st_imm (code, ins->sreg1, reg, offset);
3416 sparc_ldf_imm (code, reg, offset, FP_SCRATCH_REG);
3418 sparc_fitod (code, FP_SCRATCH_REG, ins->dreg);
3422 case OP_FCONV_TO_I1:
3423 case OP_FCONV_TO_U1:
3424 case OP_FCONV_TO_I2:
3425 case OP_FCONV_TO_U2:
3430 case OP_FCONV_TO_I4:
3431 case OP_FCONV_TO_U4: {
3432 MonoInst *spill = cfg->arch.float_spill_slot;
3433 gint32 reg = spill->inst_basereg;
3434 gint32 offset = spill->inst_offset;
3436 g_assert (spill->opcode == OP_REGOFFSET);
3438 sparc_fdtoi (code, ins->sreg1, FP_SCRATCH_REG);
3439 if (!sparc_is_imm13 (offset)) {
3440 sparc_set (code, offset, sparc_o7);
3441 sparc_stdf (code, FP_SCRATCH_REG, reg, sparc_o7);
3442 sparc_ld (code, reg, sparc_o7, ins->dreg);
3444 sparc_stdf_imm (code, FP_SCRATCH_REG, reg, offset);
3445 sparc_ld_imm (code, reg, offset, ins->dreg);
3448 switch (ins->opcode) {
3449 case OP_FCONV_TO_I1:
3450 case OP_FCONV_TO_U1:
3451 sparc_and_imm (code, 0, ins->dreg, 0xff, ins->dreg);
3453 case OP_FCONV_TO_I2:
3454 case OP_FCONV_TO_U2:
3455 sparc_set (code, 0xffff, sparc_o7);
3456 sparc_and (code, 0, ins->dreg, sparc_o7, ins->dreg);
3463 case OP_FCONV_TO_I8:
3464 case OP_FCONV_TO_U8:
3466 g_assert_not_reached ();
3468 case OP_FCONV_TO_R4:
3469 /* FIXME: Change precision ? */
3471 sparc_fmovd (code, ins->sreg1, ins->dreg);
3473 sparc_fmovs (code, ins->sreg1, ins->dreg);
3474 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3477 case OP_LCONV_TO_R_UN: {
3479 g_assert_not_reached ();
3482 case OP_LCONV_TO_OVF_I:
3483 case OP_LCONV_TO_OVF_I4_2: {
3484 guint32 *br [3], *label [1];
3487 * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3489 sparc_cmp_imm (code, ins->sreg1, 0);
3491 sparc_branch (code, 1, sparc_bneg, 0);
3495 /* ms word must be 0 */
3496 sparc_cmp_imm (code, ins->sreg2, 0);
3498 sparc_branch (code, 1, sparc_be, 0);
3503 EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_ba, "OverflowException");
3506 sparc_patch (br [0], code);
3508 /* ms word must 0xfffffff */
3509 sparc_cmp_imm (code, ins->sreg2, -1);
3511 sparc_branch (code, 1, sparc_bne, 0);
3513 sparc_patch (br [2], label [0]);
3516 sparc_patch (br [1], code);
3517 if (ins->sreg1 != ins->dreg)
3518 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
3522 sparc_faddd (code, ins->sreg1, ins->sreg2, ins->dreg);
3525 sparc_fsubd (code, ins->sreg1, ins->sreg2, ins->dreg);
3528 sparc_fmuld (code, ins->sreg1, ins->sreg2, ins->dreg);
3531 sparc_fdivd (code, ins->sreg1, ins->sreg2, ins->dreg);
3535 sparc_fnegd (code, ins->sreg1, ins->dreg);
3537 /* FIXME: why don't use fnegd ? */
3538 sparc_fnegs (code, ins->sreg1, ins->dreg);
3542 sparc_fdivd (code, ins->sreg1, ins->sreg2, FP_SCRATCH_REG);
3543 sparc_fmuld (code, ins->sreg2, FP_SCRATCH_REG, FP_SCRATCH_REG);
3544 sparc_fsubd (code, ins->sreg1, FP_SCRATCH_REG, ins->dreg);
3547 sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3554 sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3555 sparc_clr_reg (code, ins->dreg);
3556 switch (ins->opcode) {
3559 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 4);
3561 sparc_set (code, 1, ins->dreg);
3562 sparc_fbranch (code, 1, sparc_fbu, 2);
3564 sparc_set (code, 1, ins->dreg);
3567 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3569 sparc_set (code, 1, ins->dreg);
3575 EMIT_FLOAT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3578 /* clt.un + brfalse */
3580 sparc_fbranch (code, 1, sparc_fbul, 0);
3583 EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3584 sparc_patch (p, (guint8*)code);
3588 /* cgt.un + brfalse */
3590 sparc_fbranch (code, 1, sparc_fbug, 0);
3593 EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3594 sparc_patch (p, (guint8*)code);
3598 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbne, 1, 1);
3599 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3602 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbl, 1, 1);
3603 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3606 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbg, 1, 1);
3607 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3610 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbge, 1, 1);
3611 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3614 EMIT_FLOAT_COND_BRANCH (ins, sparc_fble, 1, 1);
3615 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3618 MonoInst *spill = cfg->arch.float_spill_slot;
3619 gint32 reg = spill->inst_basereg;
3620 gint32 offset = spill->inst_offset;
3622 g_assert (spill->opcode == OP_REGOFFSET);
3624 if (!sparc_is_imm13 (offset)) {
3625 sparc_set (code, offset, sparc_o7);
3626 sparc_stdf (code, ins->sreg1, reg, sparc_o7);
3627 sparc_lduh (code, reg, sparc_o7, sparc_o7);
3629 sparc_stdf_imm (code, ins->sreg1, reg, offset);
3630 sparc_lduh_imm (code, reg, offset, sparc_o7);
3632 sparc_srl_imm (code, sparc_o7, 4, sparc_o7);
3633 sparc_and_imm (code, FALSE, sparc_o7, 2047, sparc_o7);
3634 sparc_cmp_imm (code, sparc_o7, 2047);
3635 EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_be, "ArithmeticException");
3637 sparc_fmovd (code, ins->sreg1, ins->dreg);
3639 sparc_fmovs (code, ins->sreg1, ins->dreg);
3640 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3645 case OP_MEMORY_BARRIER:
3646 sparc_membar (code, sparc_membar_all);
3651 g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
3653 g_warning ("%s:%d: unknown opcode %s\n", __FILE__, __LINE__, mono_inst_name (ins->opcode));
3655 g_assert_not_reached ();
3658 if ((((guint8*)code) - code_start) > max_len) {
3659 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3660 mono_inst_name (ins->opcode), max_len, ((guint8*)code) - code_start);
3661 g_assert_not_reached ();
3669 cfg->code_len = (guint8*)code - cfg->native_code;
3673 mono_arch_register_lowlevel_calls (void)
3675 mono_register_jit_icall (mono_arch_get_lmf_addr, "mono_arch_get_lmf_addr", NULL, TRUE);
3679 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3681 MonoJumpInfo *patch_info;
3683 /* FIXME: Move part of this to arch independent code */
3684 for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3685 unsigned char *ip = patch_info->ip.i + code;
3688 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3690 switch (patch_info->type) {
3691 case MONO_PATCH_INFO_NONE:
3693 case MONO_PATCH_INFO_CLASS_INIT: {
3694 guint32 *ip2 = (guint32*)ip;
3695 /* Might already been changed to a nop */
3697 sparc_set_template (ip2, sparc_o7);
3698 sparc_jmpl (ip2, sparc_o7, sparc_g0, sparc_o7);
3700 sparc_call_simple (ip2, 0);
3704 case MONO_PATCH_INFO_METHOD_JUMP: {
3705 guint32 *ip2 = (guint32*)ip;
3706 /* Might already been patched */
3707 sparc_set_template (ip2, sparc_o7);
3713 sparc_patch ((guint32*)ip, target);
3718 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3721 guint32 *code = (guint32*)p;
3722 MonoMethodSignature *sig = mono_method_signature (cfg->method);
3725 /* Save registers to stack */
3726 for (i = 0; i < 6; ++i)
3727 sparc_sti_imm (code, sparc_i0 + i, sparc_fp, ARGS_OFFSET + (i * sizeof (gpointer)));
3729 cinfo = get_call_info (cfg, sig, FALSE);
3731 /* Save float regs on V9, since they are caller saved */
3732 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3733 ArgInfo *ainfo = cinfo->args + i;
3734 gint32 stack_offset;
3736 stack_offset = ainfo->offset + ARGS_OFFSET;
3738 if (ainfo->storage == ArgInFloatReg) {
3739 if (!sparc_is_imm13 (stack_offset))
3741 sparc_stf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3743 else if (ainfo->storage == ArgInDoubleReg) {
3744 /* The offset is guaranteed to be aligned by the ABI rules */
3745 sparc_stdf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3749 sparc_set (code, cfg->method, sparc_o0);
3750 sparc_add_imm (code, FALSE, sparc_fp, MONO_SPARC_STACK_BIAS, sparc_o1);
3752 mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
3755 /* Restore float regs on V9 */
3756 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3757 ArgInfo *ainfo = cinfo->args + i;
3758 gint32 stack_offset;
3760 stack_offset = ainfo->offset + ARGS_OFFSET;
3762 if (ainfo->storage == ArgInFloatReg) {
3763 if (!sparc_is_imm13 (stack_offset))
3765 sparc_ldf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3767 else if (ainfo->storage == ArgInDoubleReg) {
3768 /* The offset is guaranteed to be aligned by the ABI rules */
3769 sparc_lddf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3787 mono_arch_instrument_epilog_full (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments, gboolean preserve_argument_registers)
3789 guint32 *code = (guint32*)p;
3790 int save_mode = SAVE_NONE;
3791 MonoMethod *method = cfg->method;
3793 switch (mono_type_get_underlying_type (mono_method_signature (method)->ret)->type) {
3794 case MONO_TYPE_VOID:
3795 /* special case string .ctor icall */
3796 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
3797 save_mode = SAVE_ONE;
3799 save_mode = SAVE_NONE;
3804 save_mode = SAVE_ONE;
3806 save_mode = SAVE_TWO;
3811 save_mode = SAVE_FP;
3813 case MONO_TYPE_VALUETYPE:
3814 save_mode = SAVE_STRUCT;
3817 save_mode = SAVE_ONE;
3821 /* Save the result to the stack and also put it into the output registers */
3823 switch (save_mode) {
3826 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
3827 sparc_st_imm (code, sparc_i0, sparc_fp, 72);
3828 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3829 sparc_mov_reg_reg (code, sparc_i1, sparc_o2);
3832 sparc_sti_imm (code, sparc_i0, sparc_fp, ARGS_OFFSET);
3833 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3837 sparc_stdf_imm (code, sparc_f0, sparc_fp, ARGS_OFFSET);
3839 sparc_stdf_imm (code, sparc_f0, sparc_fp, 72);
3840 sparc_ld_imm (code, sparc_fp, 72, sparc_o1);
3841 sparc_ld_imm (code, sparc_fp, 72 + 4, sparc_o2);
3846 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3848 sparc_ld_imm (code, sparc_fp, 64, sparc_o1);
3856 sparc_set (code, cfg->method, sparc_o0);
3858 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, func);
3861 /* Restore result */
3863 switch (save_mode) {
3865 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
3866 sparc_ld_imm (code, sparc_fp, 72, sparc_i0);
3869 sparc_ldi_imm (code, sparc_fp, ARGS_OFFSET, sparc_i0);
3872 sparc_lddf_imm (code, sparc_fp, ARGS_OFFSET, sparc_f0);
3883 mono_arch_emit_prolog (MonoCompile *cfg)
3885 MonoMethod *method = cfg->method;
3886 MonoMethodSignature *sig;
3892 cfg->code_size = 256;
3893 cfg->native_code = g_malloc (cfg->code_size);
3894 code = (guint32*)cfg->native_code;
3896 /* FIXME: Generate intermediate code instead */
3898 offset = cfg->stack_offset;
3899 offset += (16 * sizeof (gpointer)); /* register save area */
3901 offset += 4; /* struct/union return pointer */
3904 /* add parameter area size for called functions */
3905 if (cfg->param_area < (6 * sizeof (gpointer)))
3906 /* Reserve space for the first 6 arguments even if it is unused */
3907 offset += 6 * sizeof (gpointer);
3909 offset += cfg->param_area;
3911 /* align the stack size */
3912 offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3915 * localloc'd memory is stored between the local variables (whose
3916 * size is given by cfg->stack_offset), and between the space reserved
3919 cfg->arch.localloc_offset = offset - cfg->stack_offset;
3921 cfg->stack_offset = offset;
3923 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3924 /* Perform stack touching */
3928 if (!sparc_is_imm13 (- cfg->stack_offset)) {
3929 /* Can't use sparc_o7 here, since we're still in the caller's frame */
3930 sparc_set (code, (- cfg->stack_offset), GP_SCRATCH_REG);
3931 sparc_save (code, sparc_sp, GP_SCRATCH_REG, sparc_sp);
3934 sparc_save_imm (code, sparc_sp, - cfg->stack_offset, sparc_sp);
3937 if (strstr (cfg->method->name, "foo")) {
3938 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
3939 sparc_call_simple (code, 0);
3944 sig = mono_method_signature (method);
3946 cinfo = get_call_info (cfg, sig, FALSE);
3948 /* Keep in sync with emit_load_volatile_arguments */
3949 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3950 ArgInfo *ainfo = cinfo->args + i;
3951 gint32 stack_offset;
3953 inst = cfg->args [i];
3955 if (sig->hasthis && (i == 0))
3956 arg_type = &mono_defaults.object_class->byval_arg;
3958 arg_type = sig->params [i - sig->hasthis];
3960 stack_offset = ainfo->offset + ARGS_OFFSET;
3962 /* Save the split arguments so they will reside entirely on the stack */
3963 if (ainfo->storage == ArgInSplitRegStack) {
3964 /* Save the register to the stack */
3965 g_assert (inst->opcode == OP_REGOFFSET);
3966 if (!sparc_is_imm13 (stack_offset))
3968 sparc_st_imm (code, sparc_i5, inst->inst_basereg, stack_offset);
3971 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
3972 /* Save the argument to a dword aligned stack location */
3974 * stack_offset contains the offset of the argument on the stack.
3975 * inst->inst_offset contains the dword aligned offset where the value
3978 if (ainfo->storage == ArgInIRegPair) {
3979 if (!sparc_is_imm13 (inst->inst_offset + 4))
3981 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3982 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3985 if (ainfo->storage == ArgInSplitRegStack) {
3987 g_assert_not_reached ();
3989 if (stack_offset != inst->inst_offset) {
3990 /* stack_offset is not dword aligned, so we need to make a copy */
3991 sparc_st_imm (code, sparc_i5, inst->inst_basereg, inst->inst_offset);
3992 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3993 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3997 if (ainfo->storage == ArgOnStackPair) {
3999 g_assert_not_reached ();
4001 if (stack_offset != inst->inst_offset) {
4002 /* stack_offset is not dword aligned, so we need to make a copy */
4003 sparc_ld_imm (code, sparc_fp, stack_offset, sparc_o7);
4004 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset);
4005 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
4006 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
4010 g_assert_not_reached ();
4013 if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
4014 /* Argument in register, but need to be saved to stack */
4015 if (!sparc_is_imm13 (stack_offset))
4017 if ((stack_offset - ARGS_OFFSET) & 0x1)
4018 sparc_stb_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4020 if ((stack_offset - ARGS_OFFSET) & 0x2)
4021 sparc_sth_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4023 if ((stack_offset - ARGS_OFFSET) & 0x4)
4024 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4027 sparc_stx_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4029 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4033 if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
4037 /* Argument in regpair, but need to be saved to stack */
4038 if (!sparc_is_imm13 (inst->inst_offset + 4))
4040 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
4041 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
4043 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
4044 if (!sparc_is_imm13 (stack_offset))
4046 sparc_stf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
4048 else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
4049 /* The offset is guaranteed to be aligned by the ABI rules */
4050 sparc_stdf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
4053 if ((ainfo->storage == ArgInFloatReg) && (inst->opcode == OP_REGVAR)) {
4054 /* Need to move into the a double precision register */
4055 sparc_fstod (code, ainfo->reg, ainfo->reg - 1);
4058 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
4059 if (inst->opcode == OP_REGVAR)
4060 /* FIXME: Load the argument into memory */
4066 if (cfg->method->save_lmf) {
4067 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
4070 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
4071 sparc_set_template (code, sparc_o7);
4072 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ip));
4074 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
4076 sparc_sti_imm (code, sparc_fp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebp));
4078 /* FIXME: add a relocation for this */
4079 sparc_set (code, cfg->method, sparc_o7);
4080 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method));
4082 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
4083 (gpointer)"mono_arch_get_lmf_addr");
4086 code = (guint32*)mono_sparc_emit_save_lmf (code, lmf_offset);
4089 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4090 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
4092 cfg->code_len = (guint8*)code - cfg->native_code;
4094 g_assert (cfg->code_len <= cfg->code_size);
4096 return (guint8*)code;
4100 mono_arch_emit_epilog (MonoCompile *cfg)
4102 MonoMethod *method = cfg->method;
4105 int max_epilog_size = 16 + 20 * 4;
4107 if (cfg->method->save_lmf)
4108 max_epilog_size += 128;
4110 if (mono_jit_trace_calls != NULL)
4111 max_epilog_size += 50;
4113 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
4114 max_epilog_size += 50;
4116 while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
4117 cfg->code_size *= 2;
4118 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4119 mono_jit_stats.code_reallocs++;
4122 code = (guint32*)(cfg->native_code + cfg->code_len);
4124 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4125 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
4127 if (cfg->method->save_lmf) {
4128 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
4130 code = mono_sparc_emit_restore_lmf (code, lmf_offset);
4134 * The V8 ABI requires that calls to functions which return a structure
4137 if (!v64 && mono_method_signature (cfg->method)->pinvoke && MONO_TYPE_ISSTRUCT(mono_method_signature (cfg->method)->ret))
4138 sparc_jmpl_imm (code, sparc_i7, 12, sparc_g0);
4142 /* Only fold last instruction into the restore if the exit block has an in count of 1
4143 and the previous block hasn't been optimized away since it may have an in count > 1 */
4144 if (cfg->bb_exit->in_count == 1 && cfg->bb_exit->in_bb[0]->native_offset != cfg->bb_exit->native_offset)
4148 * FIXME: The last instruction might have a branch pointing into it like in
4149 * int_ceq sparc_i0 <-
4153 /* Try folding last instruction into the restore */
4154 if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && sparc_inst_imm (code [-2]) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4155 /* or reg, imm, %i0 */
4156 int reg = sparc_inst_rs1 (code [-2]);
4157 int imm = (((gint32)(sparc_inst_imm13 (code [-2]))) << 19) >> 19;
4158 code [-2] = code [-1];
4160 sparc_restore_imm (code, reg, imm, sparc_o0);
4163 if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && (!sparc_inst_imm (code [-2])) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4164 /* or reg, reg, %i0 */
4165 int reg1 = sparc_inst_rs1 (code [-2]);
4166 int reg2 = sparc_inst_rs2 (code [-2]);
4167 code [-2] = code [-1];
4169 sparc_restore (code, reg1, reg2, sparc_o0);
4172 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
4174 cfg->code_len = (guint8*)code - cfg->native_code;
4176 g_assert (cfg->code_len < cfg->code_size);
4181 mono_arch_emit_exceptions (MonoCompile *cfg)
4183 MonoJumpInfo *patch_info;
4188 MonoClass *exc_classes [16];
4189 guint8 *exc_throw_start [16], *exc_throw_end [16];
4191 /* Compute needed space */
4192 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4193 if (patch_info->type == MONO_PATCH_INFO_EXC)
4198 * make sure we have enough space for exceptions
4201 code_size = exc_count * (20 * 4);
4203 code_size = exc_count * 24;
4206 while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4207 cfg->code_size *= 2;
4208 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4209 mono_jit_stats.code_reallocs++;
4212 code = (guint32*)(cfg->native_code + cfg->code_len);
4214 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4215 switch (patch_info->type) {
4216 case MONO_PATCH_INFO_EXC: {
4217 MonoClass *exc_class;
4218 guint32 *buf, *buf2;
4219 guint32 throw_ip, type_idx;
4222 sparc_patch ((guint32*)(cfg->native_code + patch_info->ip.i), code);
4224 exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4225 g_assert (exc_class);
4226 type_idx = exc_class->type_token - MONO_TOKEN_TYPE_DEF;
4227 throw_ip = patch_info->ip.i;
4229 /* Find a throw sequence for the same exception class */
4230 for (i = 0; i < nthrows; ++i)
4231 if (exc_classes [i] == exc_class)
4235 guint32 throw_offset = (((guint8*)exc_throw_end [i] - cfg->native_code) - throw_ip) >> 2;
4236 if (!sparc_is_imm13 (throw_offset))
4237 sparc_set32 (code, throw_offset, sparc_o1);
4239 disp = (exc_throw_start [i] - (guint8*)code) >> 2;
4240 g_assert (sparc_is_imm22 (disp));
4241 sparc_branch (code, 0, sparc_ba, disp);
4242 if (sparc_is_imm13 (throw_offset))
4243 sparc_set32 (code, throw_offset, sparc_o1);
4246 patch_info->type = MONO_PATCH_INFO_NONE;
4249 /* Emit the template for setting o1 */
4251 if (sparc_is_imm13 (((((guint8*)code - cfg->native_code) - throw_ip) >> 2) - 8))
4252 /* Can use a short form */
4255 sparc_set_template (code, sparc_o1);
4259 exc_classes [nthrows] = exc_class;
4260 exc_throw_start [nthrows] = (guint8*)code;
4264 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
4268 /* first arg = type token */
4269 /* Pass the type index to reduce the size of the sparc_set */
4270 if (!sparc_is_imm13 (type_idx))
4271 sparc_set32 (code, type_idx, sparc_o0);
4273 /* second arg = offset between the throw ip and the current ip */
4274 /* On sparc, the saved ip points to the call instruction */
4275 disp = (((guint8*)code - cfg->native_code) - throw_ip) >> 2;
4276 sparc_set32 (buf, disp, sparc_o1);
4281 exc_throw_end [nthrows] = (guint8*)code;
4285 patch_info->data.name = "mono_arch_throw_corlib_exception";
4286 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4287 patch_info->ip.i = (guint8*)code - cfg->native_code;
4291 if (sparc_is_imm13 (type_idx)) {
4292 /* Put it into the delay slot */
4295 sparc_set32 (code, type_idx, sparc_o0);
4296 g_assert (code - buf == 1);
4307 cfg->code_len = (guint8*)code - cfg->native_code;
4309 g_assert (cfg->code_len < cfg->code_size);
4313 gboolean lmf_addr_key_inited = FALSE;
4315 #ifdef MONO_SPARC_THR_TLS
4316 thread_key_t lmf_addr_key;
4318 pthread_key_t lmf_addr_key;
4322 mono_arch_get_lmf_addr (void)
4324 /* This is perf critical so we bypass the IO layer */
4325 /* The thr_... functions seem to be somewhat faster */
4326 #ifdef MONO_SPARC_THR_TLS
4328 thr_getspecific (lmf_addr_key, &res);
4331 return pthread_getspecific (lmf_addr_key);
4335 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4338 * There seems to be no way to determine stack boundaries under solaris,
4339 * so it's not possible to determine whenever a SIGSEGV is caused by stack
4342 #error "--with-sigaltstack=yes not supported on solaris"
4347 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
4349 if (!lmf_addr_key_inited) {
4352 lmf_addr_key_inited = TRUE;
4354 #ifdef MONO_SPARC_THR_TLS
4355 res = thr_keycreate (&lmf_addr_key, NULL);
4357 res = pthread_key_create (&lmf_addr_key, NULL);
4359 g_assert (res == 0);
4363 #ifdef MONO_SPARC_THR_TLS
4364 thr_setspecific (lmf_addr_key, &tls->lmf);
4366 pthread_setspecific (lmf_addr_key, &tls->lmf);
4371 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4376 mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4378 MonoInst *ins = NULL;
4384 * mono_arch_get_argument_info:
4385 * @csig: a method signature
4386 * @param_count: the number of parameters to consider
4387 * @arg_info: an array to store the result infos
4389 * Gathers information on parameters such as size, alignment and
4390 * padding. arg_info should be large enought to hold param_count + 1 entries.
4392 * Returns the size of the activation frame.
4395 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
4401 cinfo = get_call_info (NULL, csig, FALSE);
4403 if (csig->hasthis) {
4404 ainfo = &cinfo->args [0];
4405 arg_info [0].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4408 for (k = 0; k < param_count; k++) {
4409 ainfo = &cinfo->args [k + csig->hasthis];
4411 arg_info [k + 1].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4412 arg_info [k + 1].size = mono_type_size (csig->params [k], &align);
4421 mono_arch_print_tree (MonoInst *tree, int arity)
4426 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
4432 mono_arch_context_get_int_reg (MonoContext *ctx, int reg)
4434 /* FIXME: implement */
4435 g_assert_not_reached ();