mono/mini/mini-sparc.c

   1 /*
   2  * mini-sparc.c: Sparc backend for the Mono code generator
   3  *
   4  * Authors:
   5  *   Paolo Molaro (lupus@ximian.com)
   6  *   Dietmar Maurer (dietmar@ximian.com)
   7  *
   8  * Modified for SPARC:
   9  *   Christopher Taylor (ct@gentoo.org)
  10  *   Mark Crichton (crichton@gimp.org)
  11  *   Zoltan Varga (vargaz@freemail.hu)
  12  *
  13  * (C) 2003 Ximian, Inc.
  14  */
  15 #include "mini.h"
  16 #include <string.h>
  17 #include <pthread.h>
  18 #include <unistd.h>
  19
  20 #ifndef __linux__
  21 #include <sys/systeminfo.h>
  22 #include <thread.h>
  23 #endif
  24
  25 #include <unistd.h>
  26 #include <sys/mman.h>
  27
  28 #include <mono/metadata/appdomain.h>
  29 #include <mono/metadata/debug-helpers.h>
  30 #include <mono/metadata/tokentype.h>
  31 #include <mono/utils/mono-math.h>
  32
  33 #include "mini-sparc.h"
  34 #include "inssel.h"
  35 #include "trace.h"
  36 #include "cpu-sparc.h"
  37
  38 /*
  39  * Sparc V9 means two things:
  40  * - the instruction set
  41  * - the ABI
  42  *
  43  * V9 instructions are only usable if the underlying processor is 64 bit. Most Sparc
  44  * processors in use are 64 bit processors. The V9 ABI is only usable if the
  45  * mono executable is a 64 bit executable. So it would make sense to use the 64 bit
  46  * instructions without using the 64 bit ABI.
  47  */
  48
  49 /*
  50  * Register usage:
  51  * - %i0..%i<n> hold the incoming arguments, these are never written by JITted
  52  * code. Unused input registers are used for global register allocation.
  53  * - %o0..%o5 and %l7 is used for local register allocation and passing arguments
  54  * - %l0..%l6 is used for global register allocation
  55  * - %o7 and %g1 is used as scratch registers in opcodes
  56  * - all floating point registers are used for local register allocation except %f0.
  57  *   Only double precision registers are used.
  58  * In 64 bit mode:
  59  * - fp registers %d0..%d30 are used for parameter passing, and %d32..%d62 are
  60  *   used for local allocation.
  61  */
  62
  63 /*
  64  * Alignment:
  65  * - doubles and longs must be stored in dword aligned locations
  66  */
  67
  68 /*
  69  * The following things are not implemented or do not work:
  70  *  - some fp arithmetic corner cases
  71  * The following tests in mono/mini are expected to fail:
  72  *  - test_0_simple_double_casts
  73  *      This test casts (guint64)-1 to double and then back to guint64 again.
  74  *    Under x86, it returns 0, while under sparc it returns -1.
  75  *
  76  * In addition to this, the runtime requires the trunc function, or its
  77  * solaris counterpart, aintl, to do some double->int conversions. If this
  78  * function is not available, it is emulated somewhat, but the results can be
  79  * strange.
  80  */
  81
  82 /*
  83  * SPARCV9 FIXME:
  84  * - optimize sparc_set according to the memory model
  85  * - when non-AOT compiling, compute patch targets immediately so we don't
  86  *   have to emit the 6 byte template.
  87  * - varags
  88  * - struct arguments/returns
  89  */
  90
  91 /*
  92  * SPARCV9 ISSUES:
  93  * - sparc_call_simple can't be used in a lot of places since the displacement
  94  *   might not fit into an imm30.
  95  * - g1 can't be used in a lot of places since it is used as a scratch reg in
  96  *   sparc_set.
  97  * - sparc_f0 can't be used as a scratch register on V9
  98  * - the %d34..%d62 fp registers are encoded as: %dx = %f(x - 32 + 1), ie.
  99  *   %d36 = %f5.
 100  * - ldind.i4/u4 needs to sign extend/clear out upper word -> slows things down
 101  * - ins->dreg can't be used as a scatch register in r4 opcodes since it might
 102  *   be a double precision register which has no single precision part.
 103  * - passing/returning structs is hard to implement, because:
 104  *   - the spec is very hard to understand
 105  *   - it requires knowledge about the fields of structure, needs to handle
 106  *     nested structures etc.
 107  */
 108
 109 /*
 110  * Possible optimizations:
 111  * - delay slot scheduling
 112  * - allocate large constants to registers
 113  * - add more mul/div/rem optimizations
 114  */
 115
 116 #ifndef __linux__
 117 #define MONO_SPARC_THR_TLS 1
 118 #endif
 119
 120 /*
 121  * There was a 64 bit bug in glib-2.2: g_bit_nth_msf (0, -1) would return 32,
 122  * causing infinite loops in dominator computation. So glib-2.4 is required.
 123  */
 124 #ifdef SPARCV9
 125 #if GLIB_MAJOR_VERSION == 2 && GLIB_MINOR_VERSION < 4
 126 #error "glib 2.4 or later is required for 64 bit mode."
 127 #endif
 128 #endif
 129
 130 #define NOT_IMPLEMENTED do { g_assert_not_reached (); } while (0)
 131
 132 #define ALIGN_TO(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
 133
 134 #define SIGNAL_STACK_SIZE (64 * 1024)
 135
 136 #define STACK_BIAS MONO_SPARC_STACK_BIAS
 137
 138 #ifdef SPARCV9
 139
 140 /* %g1 is used by sparc_set */
 141 #define GP_SCRATCH_REG sparc_g4
 142 /* %f0 is used for parameter passing */
 143 #define FP_SCRATCH_REG sparc_f30
 144 #define ARGS_OFFSET (STACK_BIAS + 128)
 145
 146 #else
 147
 148 #define FP_SCRATCH_REG sparc_f0
 149 #define ARGS_OFFSET 68
 150 #define GP_SCRATCH_REG sparc_g1
 151
 152 #endif
 153
 154 /* Whenever the CPU supports v9 instructions */
 155 static gboolean sparcv9 = FALSE;
 156
 157 /* Whenever this is a 64bit executable */
 158 #if SPARCV9
 159 static gboolean v64 = TRUE;
 160 #else
 161 static gboolean v64 = FALSE;
 162 #endif
 163
 164 static gpointer mono_arch_get_lmf_addr (void);
 165
 166 static int
 167 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar);
 168
 169 const char*
 170 mono_arch_regname (int reg) {
 171         static const char * rnames[] = {
 172                 "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
 173                 "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
 174                 "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
 175                 "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
 176                 "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
 177                 "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
 178                 "sparc_fp", "sparc_retadr"
 179         };
 180         if (reg >= 0 && reg < 32)
 181                 return rnames [reg];
 182         return "unknown";
 183 }
 184
 185 const char*
 186 mono_arch_fregname (int reg) {
 187         static const char *rnames [] = {
 188                 "sparc_f0", "sparc_f1", "sparc_f2", "sparc_f3", "sparc_f4",
 189                 "sparc_f5", "sparc_f6", "sparc_f7", "sparc_f8", "sparc_f9",
 190                 "sparc_f10", "sparc_f11", "sparc_f12", "sparc_f13", "sparc_f14",
 191                 "sparc_f15", "sparc_f16", "sparc_f17", "sparc_f18", "sparc_f19",
 192                 "sparc_f20", "sparc_f21", "sparc_f22", "sparc_f23", "sparc_f24",
 193                 "sparc_f25", "sparc_f26", "sparc_f27", "sparc_f28", "sparc_f29",
 194                 "sparc_f30", "sparc_f31"
 195         };
 196
 197         if (reg >= 0 && reg < 32)
 198                 return rnames [reg];
 199         else
 200                 return "unknown";
 201 }
 202
 203 /*
 204  * Initialize the cpu to execute managed code.
 205  */
 206 void
 207 mono_arch_cpu_init (void)
 208 {
 209         guint32 dummy;
 210         /* make sure sparcv9 is initialized for embedded use */
 211         mono_arch_cpu_optimizazions(&dummy);
 212 }
 213
 214 /*
 215  * This function returns the optimizations supported on this cpu.
 216  */
 217 guint32
 218 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
 219 {
 220         char buf [1024];
 221         guint32 opts = 0;
 222
 223         *exclude_mask = 0;
 224
 225 #ifndef __linux__
 226         if (!sysinfo (SI_ISALIST, buf, 1024))
 227                 g_assert_not_reached ();
 228 #else
 229         /* From glibc.  If the getpagesize is 8192, we're on sparc64, which
 230          * (in)directly implies that we're a v9 or better.
 231          * Improvements to this are greatly accepted...
 232          * Also, we don't differentiate between v7 and v8.  I sense SIGILL
 233          * sniffing in my future.
 234          */
 235         if (getpagesize() == 8192)
 236                 strcpy (buf, "sparcv9");
 237         else
 238                 strcpy (buf, "sparcv8");
 239 #endif
 240
 241         /*
 242          * On some processors, the cmov instructions are even slower than the
 243          * normal ones...
 244          */
 245         if (strstr (buf, "sparcv9")) {
 246                 opts |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
 247                 sparcv9 = TRUE;
 248         }
 249         else
 250                 *exclude_mask |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
 251
 252         return opts;
 253 }
 254
 255 static void
 256 mono_arch_break (void)
 257 {
 258 }
 259
 260 #ifdef __GNUC__
 261 #define flushi(addr)    __asm__ __volatile__ ("iflush %0"::"r"(addr):"memory")
 262 #else /* assume Sun's compiler */
 263 static void flushi(void *addr)
 264 {
 265     asm("flush %i0");
 266 }
 267 #endif
 268
 269 #ifndef __linux__
 270 void sync_instruction_memory(caddr_t addr, int len);
 271 #endif
 272
 273 void
 274 mono_arch_flush_icache (guint8 *code, gint size)
 275 {
 276 #ifndef __linux__
 277         /* Hopefully this is optimized based on the actual CPU */
 278         sync_instruction_memory (code, size);
 279 #else
 280         guint64 *p = (guint64*)code;
 281         guint64 *end = (guint64*)(code + ((size + 8) /8));
 282
 283         /*
 284          * FIXME: Flushing code in dword chunks in _slow_.
 285          */
 286         while (p < end)
 287 #ifdef __GNUC__
 288                 __asm__ __volatile__ ("iflush %0"::"r"(p++));
 289 #else
 290                         flushi (p ++);
 291 #endif
 292 #endif
 293 }
 294
 295 /*
 296  * mono_sparc_flushw:
 297  *
 298  * Flush all register windows to memory. Every register window is saved to
 299  * a 16 word area on the stack pointed to by its %sp register.
 300  */
 301 void
 302 mono_sparc_flushw (void)
 303 {
 304         static guint32 start [64];
 305         static int inited = 0;
 306         guint32 *code;
 307         static void (*flushw) (void);
 308
 309         if (!inited) {
 310                 code = start;
 311
 312                 sparc_save_imm (code, sparc_sp, -160, sparc_sp);
 313                 sparc_flushw (code);
 314                 sparc_ret (code);
 315                 sparc_restore_simple (code);
 316
 317                 g_assert ((code - start) < 64);
 318
 319                 mono_arch_flush_icache ((guint8*)start, (guint8*)code - (guint8*)start);
 320
 321                 flushw = (gpointer)start;
 322
 323                 inited = 1;
 324         }
 325
 326         flushw ();
 327 }
 328
 329 void
 330 mono_arch_flush_register_windows (void)
 331 {
 332         mono_sparc_flushw ();
 333 }
 334
 335 gboolean
 336 mono_arch_is_inst_imm (gint64 imm)
 337 {
 338         return sparc_is_imm13 (imm);
 339 }
 340
 341 gboolean
 342 mono_sparc_is_v9 (void) {
 343         return sparcv9;
 344 }
 345
 346 gboolean
 347 mono_sparc_is_sparc64 (void) {
 348         return v64;
 349 }
 350
 351 typedef enum {
 352         ArgInIReg,
 353         ArgInIRegPair,
 354         ArgInSplitRegStack,
 355         ArgInFReg,
 356         ArgInFRegPair,
 357         ArgOnStack,
 358         ArgOnStackPair,
 359         ArgInFloatReg,  /* V9 only */
 360         ArgInDoubleReg  /* V9 only */
 361 } ArgStorage;
 362
 363 typedef struct {
 364         gint16 offset;
 365         /* This needs to be offset by %i0 or %o0 depending on caller/callee */
 366         gint8  reg;
 367         ArgStorage storage;
 368         guint32 vt_offset; /* for valuetypes */
 369 } ArgInfo;
 370
 371 typedef struct {
 372         int nargs;
 373         guint32 stack_usage;
 374         guint32 reg_usage;
 375         ArgInfo ret;
 376         ArgInfo sig_cookie;
 377         ArgInfo args [1];
 378 } CallInfo;
 379
 380 #define DEBUG(a)
 381
 382 /* %o0..%o5 */
 383 #define PARAM_REGS 6
 384
 385 static void inline
 386 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean pair)
 387 {
 388         ainfo->offset = *stack_size;
 389
 390         if (!pair) {
 391                 if (*gr >= PARAM_REGS) {
 392                         ainfo->storage = ArgOnStack;
 393                 }
 394                 else {
 395                         ainfo->storage = ArgInIReg;
 396                         ainfo->reg = *gr;
 397                         (*gr) ++;
 398                 }
 399
 400                 /* Allways reserve stack space for parameters passed in registers */
 401                 (*stack_size) += sizeof (gpointer);
 402         }
 403         else {
 404                 if (*gr < PARAM_REGS - 1) {
 405                         /* A pair of registers */
 406                         ainfo->storage = ArgInIRegPair;
 407                         ainfo->reg = *gr;
 408                         (*gr) += 2;
 409                 }
 410                 else if (*gr >= PARAM_REGS) {
 411                         /* A pair of stack locations */
 412                         ainfo->storage = ArgOnStackPair;
 413                 }
 414                 else {
 415                         ainfo->storage = ArgInSplitRegStack;
 416                         ainfo->reg = *gr;
 417                         (*gr) ++;
 418                 }
 419
 420                 (*stack_size) += 2 * sizeof (gpointer);
 421         }
 422 }
 423
 424 #ifdef SPARCV9
 425
 426 #define FLOAT_PARAM_REGS 32
 427
 428 static void inline
 429 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean single)
 430 {
 431         ainfo->offset = *stack_size;
 432
 433         if (single) {
 434                 if (*gr >= FLOAT_PARAM_REGS) {
 435                         ainfo->storage = ArgOnStack;
 436                 }
 437                 else {
 438                         /* A single is passed in an even numbered fp register */
 439                         ainfo->storage = ArgInFloatReg;
 440                         ainfo->reg = *gr + 1;
 441                         (*gr) += 2;
 442                 }
 443         }
 444         else {
 445                 if (*gr < FLOAT_PARAM_REGS) {
 446                         /* A double register */
 447                         ainfo->storage = ArgInDoubleReg;
 448                         ainfo->reg = *gr;
 449                         (*gr) += 2;
 450                 }
 451                 else {
 452                         ainfo->storage = ArgOnStack;
 453                 }
 454         }
 455
 456         (*stack_size) += sizeof (gpointer);
 457 }
 458
 459 #endif
 460
 461 /*
 462  * get_call_info:
 463  *
 464  *  Obtain information about a call according to the calling convention.
 465  * For V8, see the "System V ABI, Sparc Processor Supplement" Sparc V8 version
 466  * document for more information.
 467  * For V9, see the "Low Level System Information (64-bit psABI)" chapter in
 468  * the 'Sparc Compliance Definition 2.4' document.
 469  */
 470 static CallInfo*
 471 get_call_info (MonoMethodSignature *sig, gboolean is_pinvoke)
 472 {
 473         guint32 i, gr, fr;
 474         int n = sig->hasthis + sig->param_count;
 475         guint32 stack_size = 0;
 476         CallInfo *cinfo;
 477
 478         cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
 479
 480         gr = 0;
 481         fr = 0;
 482
 483 #ifdef SPARCV9
 484         if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
 485                 /* The address of the return value is passed in %o0 */
 486                 add_general (&gr, &stack_size, &cinfo->ret, FALSE);
 487                 cinfo->ret.reg += sparc_i0;
 488         }
 489 #endif
 490
 491         /* this */
 492         if (sig->hasthis)
 493                 add_general (&gr, &stack_size, cinfo->args + 0, FALSE);
 494
 495         if ((sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
 496                 gr = PARAM_REGS;
 497
 498                 /* Emit the signature cookie just before the implicit arguments */
 499                 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 500         }
 501
 502         for (i = 0; i < sig->param_count; ++i) {
 503                 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
 504
 505                 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
 506                         gr = PARAM_REGS;
 507
 508                         /* Emit the signature cookie just before the implicit arguments */
 509                         add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 510                 }
 511
 512                 DEBUG(printf("param %d: ", i));
 513                 if (sig->params [i]->byref) {
 514                         DEBUG(printf("byref\n"));
 515
 516                         add_general (&gr, &stack_size, ainfo, FALSE);
 517                         continue;
 518                 }
 519                 switch (mono_type_get_underlying_type (sig->params [i])->type) {
 520                 case MONO_TYPE_BOOLEAN:
 521                 case MONO_TYPE_I1:
 522                 case MONO_TYPE_U1:
 523                         add_general (&gr, &stack_size, ainfo, FALSE);
 524                         /* the value is in the ls byte */
 525                         ainfo->offset += sizeof (gpointer) - 1;
 526                         break;
 527                 case MONO_TYPE_I2:
 528                 case MONO_TYPE_U2:
 529                 case MONO_TYPE_CHAR:
 530                         add_general (&gr, &stack_size, ainfo, FALSE);
 531                         /* the value is in the ls word */
 532                         ainfo->offset += sizeof (gpointer) - 2;
 533                         break;
 534                 case MONO_TYPE_I4:
 535                 case MONO_TYPE_U4:
 536                         add_general (&gr, &stack_size, ainfo, FALSE);
 537                         /* the value is in the ls dword */
 538                         ainfo->offset += sizeof (gpointer) - 4;
 539                         break;
 540                 case MONO_TYPE_I:
 541                 case MONO_TYPE_U:
 542                 case MONO_TYPE_PTR:
 543                 case MONO_TYPE_FNPTR:
 544                 case MONO_TYPE_CLASS:
 545                 case MONO_TYPE_OBJECT:
 546                 case MONO_TYPE_STRING:
 547                 case MONO_TYPE_SZARRAY:
 548                 case MONO_TYPE_ARRAY:
 549                         add_general (&gr, &stack_size, ainfo, FALSE);
 550                         break;
 551                 case MONO_TYPE_GENERICINST:
 552                         if (!mono_type_generic_inst_is_valuetype (sig->params [i])) {
 553                                 add_general (&gr, &stack_size, ainfo, FALSE);
 554                                 break;
 555                         }
 556                         /* Fall through */
 557                 case MONO_TYPE_VALUETYPE:
 558 #ifdef SPARCV9
 559                         if (sig->pinvoke)
 560                                 NOT_IMPLEMENTED;
 561 #endif
 562                         add_general (&gr, &stack_size, ainfo, FALSE);
 563                         break;
 564                 case MONO_TYPE_TYPEDBYREF:
 565                         add_general (&gr, &stack_size, ainfo, FALSE);
 566                         break;
 567                 case MONO_TYPE_U8:
 568                 case MONO_TYPE_I8:
 569 #ifdef SPARCV9
 570                         add_general (&gr, &stack_size, ainfo, FALSE);
 571 #else
 572                         add_general (&gr, &stack_size, ainfo, TRUE);
 573 #endif
 574                         break;
 575                 case MONO_TYPE_R4:
 576 #ifdef SPARCV9
 577                         add_float (&fr, &stack_size, ainfo, TRUE);
 578                         gr ++;
 579 #else
 580                         /* single precision values are passed in integer registers */
 581                         add_general (&gr, &stack_size, ainfo, FALSE);
 582 #endif
 583                         break;
 584                 case MONO_TYPE_R8:
 585 #ifdef SPARCV9
 586                         add_float (&fr, &stack_size, ainfo, FALSE);
 587                         gr ++;
 588 #else
 589                         /* double precision values are passed in a pair of registers */
 590                         add_general (&gr, &stack_size, ainfo, TRUE);
 591 #endif
 592                         break;
 593                 default:
 594                         g_assert_not_reached ();
 595                 }
 596         }
 597
 598         if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
 599                 gr = PARAM_REGS;
 600
 601                 /* Emit the signature cookie just before the implicit arguments */
 602                 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 603         }
 604
 605         /* return value */
 606         {
 607                 switch (mono_type_get_underlying_type (sig->ret)->type) {
 608                 case MONO_TYPE_BOOLEAN:
 609                 case MONO_TYPE_I1:
 610                 case MONO_TYPE_U1:
 611                 case MONO_TYPE_I2:
 612                 case MONO_TYPE_U2:
 613                 case MONO_TYPE_CHAR:
 614                 case MONO_TYPE_I4:
 615                 case MONO_TYPE_U4:
 616                 case MONO_TYPE_I:
 617                 case MONO_TYPE_U:
 618                 case MONO_TYPE_PTR:
 619                 case MONO_TYPE_FNPTR:
 620                 case MONO_TYPE_CLASS:
 621                 case MONO_TYPE_OBJECT:
 622                 case MONO_TYPE_SZARRAY:
 623                 case MONO_TYPE_ARRAY:
 624                 case MONO_TYPE_STRING:
 625                         cinfo->ret.storage = ArgInIReg;
 626                         cinfo->ret.reg = sparc_i0;
 627                         if (gr < 1)
 628                                 gr = 1;
 629                         break;
 630                 case MONO_TYPE_U8:
 631                 case MONO_TYPE_I8:
 632 #ifdef SPARCV9
 633                         cinfo->ret.storage = ArgInIReg;
 634                         cinfo->ret.reg = sparc_i0;
 635                         if (gr < 1)
 636                                 gr = 1;
 637 #else
 638                         cinfo->ret.storage = ArgInIRegPair;
 639                         cinfo->ret.reg = sparc_i0;
 640                         if (gr < 2)
 641                                 gr = 2;
 642 #endif
 643                         break;
 644                 case MONO_TYPE_R4:
 645                 case MONO_TYPE_R8:
 646                         cinfo->ret.storage = ArgInFReg;
 647                         cinfo->ret.reg = sparc_f0;
 648                         break;
 649                 case MONO_TYPE_GENERICINST:
 650                         if (!mono_type_generic_inst_is_valuetype (sig->ret)) {
 651                                 cinfo->ret.storage = ArgInIReg;
 652                                 cinfo->ret.reg = sparc_i0;
 653                                 if (gr < 1)
 654                                         gr = 1;
 655                                 break;
 656                         }
 657                         /* Fall through */
 658                 case MONO_TYPE_VALUETYPE:
 659                         if (v64) {
 660                                 if (sig->pinvoke)
 661                                         NOT_IMPLEMENTED;
 662                                 else
 663                                         /* Already done */
 664                                         ;
 665                         }
 666                         else
 667                                 cinfo->ret.storage = ArgOnStack;
 668                         break;
 669                 case MONO_TYPE_TYPEDBYREF:
 670                         if (v64) {
 671                                 if (sig->pinvoke)
 672                                         /* Same as a valuetype with size 24 */
 673                                         NOT_IMPLEMENTED;
 674                                 else
 675                                         /* Already done */
 676                                         ;
 677                         }
 678                         else
 679                                 cinfo->ret.storage = ArgOnStack;
 680                         break;
 681                 case MONO_TYPE_VOID:
 682                         break;
 683                 default:
 684                         g_error ("Can't handle as return value 0x%x", sig->ret->type);
 685                 }
 686         }
 687
 688         cinfo->stack_usage = stack_size;
 689         cinfo->reg_usage = gr;
 690         return cinfo;
 691 }
 692
 693 GList *
 694 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
 695 {
 696         GList *vars = NULL;
 697         int i;
 698
 699         /*
 700          * FIXME: If an argument is allocated to a register, then load it from the
 701          * stack in the prolog.
 702          */
 703
 704         for (i = 0; i < cfg->num_varinfo; i++) {
 705                 MonoInst *ins = cfg->varinfo [i];
 706                 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
 707
 708                 /* unused vars */
 709                 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
 710                         continue;
 711
 712                 /* FIXME: Make arguments on stack allocateable to registers */
 713                 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode == OP_REGVAR) || (ins->opcode == OP_ARG))
 714                         continue;
 715
 716                 if (mono_is_regsize_var (ins->inst_vtype)) {
 717                         g_assert (MONO_VARINFO (cfg, i)->reg == -1);
 718                         g_assert (i == vmv->idx);
 719
 720                         vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
 721                 }
 722         }
 723
 724         return vars;
 725 }
 726
 727 GList *
 728 mono_arch_get_global_int_regs (MonoCompile *cfg)
 729 {
 730         GList *regs = NULL;
 731         int i;
 732         MonoMethodSignature *sig;
 733         CallInfo *cinfo;
 734
 735         sig = mono_method_signature (cfg->method);
 736
 737         cinfo = get_call_info (sig, FALSE);
 738
 739         /* Use unused input registers */
 740         for (i = cinfo->reg_usage; i < 6; ++i)
 741                 regs = g_list_prepend (regs, GUINT_TO_POINTER (sparc_i0 + i));
 742
 743         /* Use %l0..%l6 as global registers */
 744         for (i = sparc_l0; i < sparc_l7; ++i)
 745                 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
 746
 747         g_free (cinfo);
 748
 749         return regs;
 750 }
 751
 752 /*
 753  * mono_arch_regalloc_cost:
 754  *
 755  *  Return the cost, in number of memory references, of the action of
 756  * allocating the variable VMV into a register during global register
 757  * allocation.
 758  */
 759 guint32
 760 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
 761 {
 762         return 0;
 763 }
 764
 765 /*
 766  * Set var information according to the calling convention. sparc version.
 767  * The locals var stuff should most likely be split in another method.
 768  */
 769 void
 770 mono_arch_allocate_vars (MonoCompile *m)
 771 {
 772         MonoMethodSignature *sig;
 773         MonoMethodHeader *header;
 774         MonoInst *inst;
 775         int i, offset, size, align, curinst;
 776         CallInfo *cinfo;
 777
 778         header = mono_method_get_header (m->method);
 779
 780         sig = mono_method_signature (m->method);
 781
 782         cinfo = get_call_info (sig, FALSE);
 783
 784         if (sig->ret->type != MONO_TYPE_VOID) {
 785                 switch (cinfo->ret.storage) {
 786                 case ArgInIReg:
 787                 case ArgInFReg:
 788                 case ArgInIRegPair:
 789                         m->ret->opcode = OP_REGVAR;
 790                         m->ret->inst_c0 = cinfo->ret.reg;
 791                         break;
 792                 case ArgOnStack:
 793 #ifdef SPARCV9
 794                         g_assert_not_reached ();
 795 #else
 796                         /* valuetypes */
 797                         m->ret->opcode = OP_REGOFFSET;
 798                         m->ret->inst_basereg = sparc_fp;
 799                         m->ret->inst_offset = 64;
 800 #endif
 801                         break;
 802                 default:
 803                         NOT_IMPLEMENTED;
 804                 }
 805                 m->ret->dreg = m->ret->inst_c0;
 806         }
 807
 808         /*
 809          * We use the ABI calling conventions for managed code as well.
 810          * Exception: valuetypes are never returned in registers on V9.
 811          * FIXME: Use something more optimized.
 812          */
 813
 814         /* Locals are allocated backwards from %fp */
 815         m->frame_reg = sparc_fp;
 816         offset = 0;
 817
 818         /*
 819          * Reserve a stack slot for holding information used during exception
 820          * handling.
 821          */
 822         if (header->num_clauses)
 823                 offset += sizeof (gpointer) * 2;
 824
 825         if (m->method->save_lmf) {
 826                 offset += sizeof (MonoLMF);
 827                 m->arch.lmf_offset = offset;
 828         }
 829
 830         curinst = m->locals_start;
 831         for (i = curinst; i < m->num_varinfo; ++i) {
 832                 inst = m->varinfo [i];
 833
 834                 if (inst->opcode == OP_REGVAR) {
 835                         //g_print ("allocating local %d to %s\n", i, mono_arch_regname (inst->dreg));
 836                         continue;
 837                 }
 838
 839                 if (inst->flags & MONO_INST_IS_DEAD)
 840                         continue;
 841
 842                 /* inst->backend.is_pinvoke indicates native sized value types, this is used by the
 843                 * pinvoke wrappers when they call functions returning structure */
 844                 if (inst->backend.is_pinvoke && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
 845                         size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
 846                 else
 847                         size = mono_type_stack_size (inst->inst_vtype, &align);
 848
 849                 /*
 850                  * This is needed since structures containing doubles must be doubleword
 851          * aligned.
 852                  * FIXME: Do this only if needed.
 853                  */
 854                 if (MONO_TYPE_ISSTRUCT (inst->inst_vtype))
 855                         align = 8;
 856
 857                 /*
 858                  * variables are accessed as negative offsets from %fp, so increase
 859                  * the offset before assigning it to a variable
 860                  */
 861                 offset += size;
 862
 863                 offset += align - 1;
 864                 offset &= ~(align - 1);
 865                 inst->opcode = OP_REGOFFSET;
 866                 inst->inst_basereg = sparc_fp;
 867                 inst->inst_offset = STACK_BIAS + -offset;
 868
 869                 //g_print ("allocating local %d to [%s - %d]\n", i, mono_arch_regname (inst->inst_basereg), - inst->inst_offset);
 870         }
 871
 872         if (sig->call_convention == MONO_CALL_VARARG) {
 873                 m->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
 874         }
 875
 876         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
 877                 inst = m->args [i];
 878                 if (inst->opcode != OP_REGVAR) {
 879                         ArgInfo *ainfo = &cinfo->args [i];
 880                         gboolean inreg = TRUE;
 881                         MonoType *arg_type;
 882                         ArgStorage storage;
 883
 884                         if (sig->hasthis && (i == 0))
 885                                 arg_type = &mono_defaults.object_class->byval_arg;
 886                         else
 887                                 arg_type = sig->params [i - sig->hasthis];
 888
 889 #ifndef SPARCV9
 890                         if (!arg_type->byref && ((arg_type->type == MONO_TYPE_R4)
 891                                                                          || (arg_type->type == MONO_TYPE_R8)))
 892                                 /*
 893                                  * Since float arguments are passed in integer registers, we need to
 894                                  * save them to the stack in the prolog.
 895                                  */
 896                                 inreg = FALSE;
 897 #endif
 898
 899                         /* FIXME: Allocate volatile arguments to registers */
 900                         if (inst->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT))
 901                                 inreg = FALSE;
 902
 903                         if (MONO_TYPE_ISSTRUCT (arg_type))
 904                                 /* FIXME: this isn't needed */
 905                                 inreg = FALSE;
 906
 907                         inst->opcode = OP_REGOFFSET;
 908
 909                         if (!inreg)
 910                                 storage = ArgOnStack;
 911                         else
 912                                 storage = ainfo->storage;
 913
 914                         switch (storage) {
 915                         case ArgInIReg:
 916                         case ArgInIRegPair:
 917                                 inst->opcode = OP_REGVAR;
 918                                 inst->dreg = sparc_i0 + ainfo->reg;
 919                                 break;
 920                         case ArgInFloatReg:
 921                         case ArgInDoubleReg:
 922                                 /*
 923                                  * Since float regs are volatile, we save the arguments to
 924                                  * the stack in the prolog.
 925                                  * FIXME: Avoid this if the method contains no calls.
 926                                  */
 927                         case ArgOnStack:
 928                         case ArgOnStackPair:
 929                         case ArgInSplitRegStack:
 930                                 /* Split arguments are saved to the stack in the prolog */
 931                                 inst->opcode = OP_REGOFFSET;
 932                                 /* in parent frame */
 933                                 inst->inst_basereg = sparc_fp;
 934                                 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
 935
 936                                 if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
 937                                         /*
 938                                          * It is very hard to load doubles from non-doubleword aligned
 939                                          * memory locations. So if the offset is misaligned, we copy the
 940                                          * argument to a stack location in the prolog.
 941                                          */
 942                                         if ((inst->inst_offset - STACK_BIAS) % 8) {
 943                                                 inst->inst_basereg = sparc_fp;
 944                                                 offset += 8;
 945                                                 align = 8;
 946                                                 offset += align - 1;
 947                                                 offset &= ~(align - 1);
 948                                                 inst->inst_offset = STACK_BIAS + -offset;
 949
 950                                         }
 951                                 }
 952                                 break;
 953                         default:
 954                                 NOT_IMPLEMENTED;
 955                         }
 956
 957                         if (MONO_TYPE_ISSTRUCT (arg_type)) {
 958                                 /* Add a level of indirection */
 959                                 /*
 960                                  * It would be easier to add OP_LDIND_I here, but ldind_i instructions
 961                                  * are destructively modified in a lot of places in inssel.brg.
 962                                  */
 963                                 MonoInst *indir;
 964                                 MONO_INST_NEW (m, indir, 0);
 965                                 *indir = *inst;
 966                                 inst->opcode = OP_SPARC_INARG_VT;
 967                                 inst->inst_left = indir;
 968                         }
 969                 }
 970         }
 971
 972         /*
 973          * spillvars are stored between the normal locals and the storage reserved
 974          * by the ABI.
 975          */
 976
 977         m->stack_offset = offset;
 978
 979         /* Add a properly aligned dword for use by int<->float conversion opcodes */
 980         m->spill_count ++;
 981         mono_spillvar_offset_float (m, 0);
 982
 983         g_free (cinfo);
 984 }
 985
 986 static MonoInst *
 987 make_group (MonoCompile *cfg, MonoInst *left, int basereg, int offset)
 988 {
 989         MonoInst *group;
 990
 991         MONO_INST_NEW (cfg, group, OP_GROUP);
 992         group->inst_left = left;
 993         group->inst_basereg = basereg;
 994         group->inst_imm = offset;
 995
 996         return group;
 997 }
 998
 999 static void
1000 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo)
1001 {
1002         MonoInst *arg;
1003         MonoMethodSignature *tmp_sig;
1004         MonoInst *sig_arg;
1005
1006         /*
1007          * mono_ArgIterator_Setup assumes the signature cookie is
1008          * passed first and all the arguments which were before it are
1009          * passed on the stack after the signature. So compensate by
1010          * passing a different signature.
1011          */
1012         tmp_sig = mono_metadata_signature_dup (call->signature);
1013         tmp_sig->param_count -= call->signature->sentinelpos;
1014         tmp_sig->sentinelpos = 0;
1015         memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1016
1017         /* FIXME: Add support for signature tokens to AOT */
1018         cfg->disable_aot = TRUE;
1019         /* We allways pass the signature on the stack for simplicity */
1020         MONO_INST_NEW (cfg, arg, OP_SPARC_OUTARG_MEM);
1021         arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + cinfo->sig_cookie.offset);
1022         MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
1023         sig_arg->inst_p0 = tmp_sig;
1024         arg->inst_left = sig_arg;
1025         arg->type = STACK_PTR;
1026         /* prepend, so they get reversed */
1027         arg->next = call->out_args;
1028         call->out_args = arg;
1029 }
1030
1031 /*
1032  * take the arguments and generate the arch-specific
1033  * instructions to properly call the function in call.
1034  * This includes pushing, moving arguments to the right register
1035  * etc.
1036  */
1037 MonoCallInst*
1038 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
1039         MonoInst *arg, *in;
1040         MonoMethodSignature *sig;
1041         int i, n;
1042         CallInfo *cinfo;
1043         ArgInfo *ainfo;
1044         guint32 extra_space = 0;
1045
1046         sig = call->signature;
1047         n = sig->param_count + sig->hasthis;
1048
1049         cinfo = get_call_info (sig, sig->pinvoke);
1050
1051         for (i = 0; i < n; ++i) {
1052                 ainfo = cinfo->args + i;
1053
1054                 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
1055                         /* Emit the signature cookie just before the first implicit argument */
1056                         emit_sig_cookie (cfg, call, cinfo);
1057                 }
1058
1059                 if (is_virtual && i == 0) {
1060                         /* the argument will be attached to the call instruction */
1061                         in = call->args [i];
1062                 } else {
1063                         MONO_INST_NEW (cfg, arg, OP_OUTARG);
1064                         in = call->args [i];
1065                         arg->cil_code = in->cil_code;
1066                         arg->inst_left = in;
1067                         arg->type = in->type;
1068                         /* prepend, we'll need to reverse them later */
1069                         arg->next = call->out_args;
1070                         call->out_args = arg;
1071
1072                         if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(sig->params [i - sig->hasthis]))) {
1073                                 MonoInst *inst;
1074                                 gint align;
1075                                 guint32 offset, pad;
1076                                 guint32 size;
1077
1078 #ifdef SPARCV9
1079                                 if (sig->pinvoke)
1080                                         NOT_IMPLEMENTED;
1081 #endif
1082
1083                                 if (sig->params [i - sig->hasthis]->type == MONO_TYPE_TYPEDBYREF) {
1084                                         size = sizeof (MonoTypedRef);
1085                                         align = sizeof (gpointer);
1086                                 }
1087                                 else
1088                                 if (sig->pinvoke)
1089                                         size = mono_type_native_stack_size (&in->klass->byval_arg, &align);
1090                                 else {
1091                                         /*
1092                                          * Can't use mono_type_stack_size (), but that
1093                                          * aligns the size to sizeof (gpointer), which is larger
1094                                          * than the size of the source, leading to reads of invalid
1095                                          * memory if the source is at the end of address space or
1096                                          * misaligned reads.
1097                                          */
1098                                         size = mono_class_value_size (in->klass, &align);
1099                                 }
1100
1101                                 /*
1102                                  * We use OP_OUTARG_VT to copy the valuetype to a stack location, then
1103                                  * use the normal OUTARG opcodes to pass the address of the location to
1104                                  * the callee.
1105                                  */
1106                                 MONO_INST_NEW (cfg, inst, OP_OUTARG_VT);
1107                                 inst->inst_left = in;
1108
1109                                 /* The first 6 argument locations are reserved */
1110                                 if (cinfo->stack_usage < 6 * sizeof (gpointer))
1111                                         cinfo->stack_usage = 6 * sizeof (gpointer);
1112
1113                                 offset = ALIGN_TO ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage, align);
1114                                 pad = offset - ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage);
1115
1116                                 inst->inst_c1 = STACK_BIAS + offset;
1117                                 inst->backend.size = size;
1118                                 arg->inst_left = inst;
1119
1120                                 cinfo->stack_usage += size;
1121                                 cinfo->stack_usage += pad;
1122                         }
1123
1124                         arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + ainfo->offset);
1125
1126                         switch (ainfo->storage) {
1127                         case ArgInIReg:
1128                         case ArgInFReg:
1129                         case ArgInIRegPair:
1130                                 if (ainfo->storage == ArgInIRegPair)
1131                                         arg->opcode = OP_SPARC_OUTARG_REGPAIR;
1132                                 arg->backend.reg3 = sparc_o0 + ainfo->reg;
1133                                 call->used_iregs |= 1 << ainfo->reg;
1134
1135                                 if ((i >= sig->hasthis) && !sig->params [i - sig->hasthis]->byref && ((sig->params [i - sig->hasthis]->type == MONO_TYPE_R8) || (sig->params [i - sig->hasthis]->type == MONO_TYPE_R4))) {
1136                                         /* An fp value is passed in an ireg */
1137
1138                                         if (arg->opcode == OP_SPARC_OUTARG_REGPAIR)
1139                                                 arg->opcode = OP_SPARC_OUTARG_REGPAIR_FLOAT;
1140                                         else
1141                                                 arg->opcode = OP_SPARC_OUTARG_FLOAT;
1142
1143                                         /*
1144                                          * The OUTARG (freg) implementation needs an extra dword to store
1145                                          * the temporary value.
1146                                          */
1147                                         extra_space += 8;
1148                                 }
1149                                 break;
1150                         case ArgOnStack:
1151                                 arg->opcode = OP_SPARC_OUTARG_MEM;
1152                                 break;
1153                         case ArgOnStackPair:
1154                                 arg->opcode = OP_SPARC_OUTARG_MEMPAIR;
1155                                 break;
1156                         case ArgInSplitRegStack:
1157                                 arg->opcode = OP_SPARC_OUTARG_SPLIT_REG_STACK;
1158                                 arg->backend.reg3 = sparc_o0 + ainfo->reg;
1159                                 call->used_iregs |= 1 << ainfo->reg;
1160                                 break;
1161                         case ArgInFloatReg:
1162                                 arg->opcode = OP_SPARC_OUTARG_FLOAT_REG;
1163                                 arg->backend.reg3 = sparc_f0 + ainfo->reg;
1164                                 break;
1165                         case ArgInDoubleReg:
1166                                 arg->opcode = OP_SPARC_OUTARG_DOUBLE_REG;
1167                                 arg->backend.reg3 = sparc_f0 + ainfo->reg;
1168                                 break;
1169                         default:
1170                                 NOT_IMPLEMENTED;
1171                         }
1172                 }
1173         }
1174
1175         /* Handle the case where there are no implicit arguments */
1176         if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sig->sentinelpos)) {
1177                 emit_sig_cookie (cfg, call, cinfo);
1178         }
1179
1180         /*
1181          * Reverse the call->out_args list.
1182          */
1183         {
1184                 MonoInst *prev = NULL, *list = call->out_args, *next;
1185                 while (list) {
1186                         next = list->next;
1187                         list->next = prev;
1188                         prev = list;
1189                         list = next;
1190                 }
1191                 call->out_args = prev;
1192         }
1193         call->stack_usage = cinfo->stack_usage + extra_space;
1194         call->out_ireg_args = NULL;
1195         call->out_freg_args = NULL;
1196         cfg->param_area = MAX (cfg->param_area, call->stack_usage);
1197         cfg->flags |= MONO_CFG_HAS_CALLS;
1198
1199         g_free (cinfo);
1200         return call;
1201 }
1202
1203 /* Map opcode to the sparc condition codes */
1204 static inline SparcCond
1205 opcode_to_sparc_cond (int opcode)
1206 {
1207         switch (opcode) {
1208         case OP_FBGE:
1209                 return sparc_fbge;
1210         case OP_FBLE:
1211                 return sparc_fble;
1212         case OP_FBEQ:
1213         case OP_FCEQ:
1214                 return sparc_fbe;
1215         case OP_FBLT:
1216         case OP_FCLT:
1217         case OP_FCLT_UN:
1218                 return sparc_fbl;
1219         case OP_FBGT:
1220         case OP_FCGT:
1221         case OP_FCGT_UN:
1222                 return sparc_fbg;
1223         case CEE_BEQ:
1224         case OP_IBEQ:
1225         case OP_CEQ:
1226         case OP_ICEQ:
1227         case OP_COND_EXC_EQ:
1228                 return sparc_be;
1229         case CEE_BNE_UN:
1230         case OP_COND_EXC_NE_UN:
1231         case OP_IBNE_UN:
1232                 return sparc_bne;
1233         case CEE_BLT:
1234         case OP_IBLT:
1235         case OP_CLT:
1236         case OP_ICLT:
1237         case OP_COND_EXC_LT:
1238                 return sparc_bl;
1239         case CEE_BLT_UN:
1240         case OP_IBLT_UN:
1241         case OP_CLT_UN:
1242         case OP_ICLT_UN:
1243         case OP_COND_EXC_LT_UN:
1244                 return sparc_blu;
1245         case CEE_BGT:
1246         case OP_IBGT:
1247         case OP_CGT:
1248         case OP_ICGT:
1249         case OP_COND_EXC_GT:
1250                 return sparc_bg;
1251         case CEE_BGT_UN:
1252         case OP_IBGT_UN:
1253         case OP_CGT_UN:
1254         case OP_ICGT_UN:
1255         case OP_COND_EXC_GT_UN:
1256                 return sparc_bgu;
1257         case CEE_BGE:
1258         case OP_IBGE:
1259         case OP_COND_EXC_GE:
1260                 return sparc_bge;
1261         case CEE_BGE_UN:
1262         case OP_IBGE_UN:
1263         case OP_COND_EXC_GE_UN:
1264                 return sparc_beu;
1265         case CEE_BLE:
1266         case OP_IBLE:
1267         case OP_COND_EXC_LE:
1268                 return sparc_ble;
1269         case CEE_BLE_UN:
1270         case OP_IBLE_UN:
1271         case OP_COND_EXC_LE_UN:
1272                 return sparc_bleu;
1273         case OP_COND_EXC_OV:
1274         case OP_COND_EXC_IOV:
1275                 return sparc_bvs;
1276         case OP_COND_EXC_C:
1277         case OP_COND_EXC_IC:
1278                 return sparc_bcs;
1279         case OP_COND_EXC_NO:
1280         case OP_COND_EXC_NC:
1281                 NOT_IMPLEMENTED;
1282         default:
1283                 g_assert_not_reached ();
1284                 return sparc_be;
1285         }
1286 }
1287
1288 #define COMPUTE_DISP(ins) \
1289 if (ins->flags & MONO_INST_BRLABEL) { \
1290         if (ins->inst_i0->inst_c0) \
1291            disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2; \
1292         else { \
1293             disp = 0; \
1294                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
1295         } \
1296 } else { \
1297         if (ins->inst_true_bb->native_offset) \
1298            disp = (ins->inst_true_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2; \
1299         else { \
1300             disp = 0; \
1301                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1302         } \
1303 }
1304
1305 #ifdef SPARCV9
1306 #define DEFAULT_ICC sparc_xcc_short
1307 #else
1308 #define DEFAULT_ICC sparc_icc_short
1309 #endif
1310
1311 #ifdef SPARCV9
1312 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) \
1313     do { \
1314         gint32 disp; \
1315         guint32 predict; \
1316         COMPUTE_DISP(ins); \
1317         predict = (disp != 0) ? 1 : 0; \
1318         g_assert (sparc_is_imm19 (disp)); \
1319         sparc_branchp (code, (annul), cond, icc, (predict), disp); \
1320         if (filldelay) sparc_nop (code); \
1321     } while (0)
1322 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_ICC ((ins), (cond), (annul), (filldelay), (sparc_xcc_short))
1323 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) \
1324     do { \
1325         gint32 disp; \
1326         guint32 predict; \
1327         COMPUTE_DISP(ins); \
1328         predict = (disp != 0) ? 1 : 0; \
1329         g_assert (sparc_is_imm19 (disp)); \
1330         sparc_fbranch (code, (annul), cond, disp); \
1331         if (filldelay) sparc_nop (code); \
1332     } while (0)
1333 #else
1334 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) g_assert_not_reached ()
1335 #define EMIT_COND_BRANCH_GENERAL(ins,bop,cond,annul,filldelay) \
1336     do { \
1337         gint32 disp; \
1338         COMPUTE_DISP(ins); \
1339         g_assert (sparc_is_imm22 (disp)); \
1340         sparc_ ## bop (code, (annul), cond, disp); \
1341         if (filldelay) sparc_nop (code); \
1342     } while (0)
1343 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),branch,(cond),annul,filldelay)
1344 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),fbranch,(cond),annul,filldelay)
1345 #endif
1346
1347 #define EMIT_COND_BRANCH_PREDICTED(ins,cond,annul,filldelay) \
1348     do { \
1349             gint32 disp; \
1350         guint32 predict; \
1351         COMPUTE_DISP(ins); \
1352         predict = (disp != 0) ? 1 : 0; \
1353         g_assert (sparc_is_imm19 (disp)); \
1354                 sparc_branchp (code, (annul), (cond), DEFAULT_ICC, (predict), disp); \
1355         if (filldelay) sparc_nop (code); \
1356     } while (0)
1357
1358 #define EMIT_COND_BRANCH_BPR(ins,bop,predict,annul,filldelay) \
1359     do { \
1360             gint32 disp; \
1361         COMPUTE_DISP(ins); \
1362                 g_assert (sparc_is_imm22 (disp)); \
1363                 sparc_ ## bop (code, (annul), (predict), ins->sreg1, disp); \
1364         if (filldelay) sparc_nop (code); \
1365     } while (0)
1366
1367 /* emit an exception if condition is fail */
1368 /*
1369  * We put the exception throwing code out-of-line, at the end of the method
1370  */
1371 #define EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,filldelay,icc) do {     \
1372                 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,   \
1373                                     MONO_PATCH_INFO_EXC, sexc_name);  \
1374         if (sparcv9) { \
1375            sparc_branchp (code, 0, (cond), (icc), 0, 0); \
1376         } \
1377         else { \
1378                         sparc_branch (code, 0, cond, 0);     \
1379         } \
1380         if (filldelay) sparc_nop (code);     \
1381         } while (0);
1382
1383 #define EMIT_COND_SYSTEM_EXCEPTION(ins,cond,sexc_name) EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,TRUE,DEFAULT_ICC)
1384
1385 #define EMIT_COND_SYSTEM_EXCEPTION_BPR(ins,bop,sexc_name) do { \
1386                 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,   \
1387                                     MONO_PATCH_INFO_EXC, sexc_name);  \
1388                 sparc_ ## bop (code, FALSE, FALSE, ins->sreg1, 0); \
1389         sparc_nop (code);    \
1390 } while (0);
1391
1392 #define EMIT_ALU_IMM(ins,op,setcc) do { \
1393                         if (sparc_is_imm13 ((ins)->inst_imm)) \
1394                                 sparc_ ## op ## _imm (code, (setcc), (ins)->sreg1, ins->inst_imm, (ins)->dreg); \
1395                         else { \
1396                                 sparc_set (code, ins->inst_imm, sparc_o7); \
1397                                 sparc_ ## op (code, (setcc), (ins)->sreg1, sparc_o7, (ins)->dreg); \
1398                         } \
1399 } while (0);
1400
1401 #define EMIT_LOAD_MEMBASE(ins,op) do { \
1402                         if (sparc_is_imm13 (ins->inst_offset)) \
1403                                 sparc_ ## op ## _imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg); \
1404                         else { \
1405                                 sparc_set (code, ins->inst_offset, sparc_o7); \
1406                                 sparc_ ## op (code, ins->inst_basereg, sparc_o7, ins->dreg); \
1407                         } \
1408 } while (0);
1409
1410 /* max len = 5 */
1411 #define EMIT_STORE_MEMBASE_IMM(ins,op) do { \
1412                         guint32 sreg; \
1413                         if (ins->inst_imm == 0) \
1414                                 sreg = sparc_g0; \
1415                         else { \
1416                                 sparc_set (code, ins->inst_imm, sparc_o7); \
1417                                 sreg = sparc_o7; \
1418                         } \
1419                         if (!sparc_is_imm13 (ins->inst_offset)) { \
1420                                 sparc_set (code, ins->inst_offset, GP_SCRATCH_REG); \
1421                                 sparc_ ## op (code, sreg, ins->inst_destbasereg, GP_SCRATCH_REG); \
1422                         } \
1423                         else \
1424                                 sparc_ ## op ## _imm (code, sreg, ins->inst_destbasereg, ins->inst_offset); \
1425                                                                                                                                                                                  } while (0);
1426
1427 #define EMIT_STORE_MEMBASE_REG(ins,op) do { \
1428                         if (!sparc_is_imm13 (ins->inst_offset)) { \
1429                                 sparc_set (code, ins->inst_offset, sparc_o7); \
1430                                 sparc_ ## op (code, ins->sreg1, ins->inst_destbasereg, sparc_o7); \
1431                         } \
1432                                   else \
1433                                 sparc_ ## op ## _imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset); \
1434                                                                                                                                                                                  } while (0);
1435
1436 #define EMIT_CALL() do { \
1437     if (v64) { \
1438         sparc_set_template (code, sparc_o7); \
1439         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7); \
1440     } \
1441     else { \
1442         sparc_call_simple (code, 0); \
1443     } \
1444     sparc_nop (code); \
1445 } while (0);
1446
1447 /*
1448  * A call template is 7 instructions long, so we want to avoid it if possible.
1449  */
1450 static guint32*
1451 emit_call (MonoCompile *cfg, guint32 *code, guint32 patch_type, gconstpointer data)
1452 {
1453         gpointer target;
1454
1455         /* FIXME: This only works if the target method is already compiled */
1456         if (0 && v64 && !cfg->compile_aot) {
1457                 MonoJumpInfo patch_info;
1458
1459                 patch_info.type = patch_type;
1460                 patch_info.data.target = data;
1461
1462                 target = mono_resolve_patch_target (cfg->method, cfg->domain, NULL, &patch_info, FALSE);
1463
1464                 /* FIXME: Add optimizations if the target is close enough */
1465                 sparc_set (code, target, sparc_o7);
1466                 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7);
1467                 sparc_nop (code);
1468         }
1469         else {
1470                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, patch_type, data);
1471                 EMIT_CALL ();
1472         }
1473
1474         return code;
1475 }
1476
1477 static void
1478 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1479 {
1480         MonoInst *ins, *last_ins = NULL;
1481         ins = bb->code;
1482
1483         while (ins) {
1484
1485                 switch (ins->opcode) {
1486                 case OP_MUL_IMM:
1487                         /* remove unnecessary multiplication with 1 */
1488                         if (ins->inst_imm == 1) {
1489                                 if (ins->dreg != ins->sreg1) {
1490                                         ins->opcode = OP_MOVE;
1491                                 } else {
1492                                         last_ins->next = ins->next;
1493                                         ins = ins->next;
1494                                         continue;
1495                                 }
1496                         }
1497                         break;
1498 #ifndef SPARCV9
1499                 case OP_LOAD_MEMBASE:
1500                 case OP_LOADI4_MEMBASE:
1501                         /*
1502                          * OP_STORE_MEMBASE_REG reg, offset(basereg)
1503                          * OP_LOAD_MEMBASE offset(basereg), reg
1504                          */
1505                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
1506                                          || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1507                             ins->inst_basereg == last_ins->inst_destbasereg &&
1508                             ins->inst_offset == last_ins->inst_offset) {
1509                                 if (ins->dreg == last_ins->sreg1) {
1510                                         last_ins->next = ins->next;
1511                                         ins = ins->next;
1512                                         continue;
1513                                 } else {
1514                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1515                                         ins->opcode = OP_MOVE;
1516                                         ins->sreg1 = last_ins->sreg1;
1517                                 }
1518
1519                         /*
1520                          * Note: reg1 must be different from the basereg in the second load
1521                          * OP_LOAD_MEMBASE offset(basereg), reg1
1522                          * OP_LOAD_MEMBASE offset(basereg), reg2
1523                          * -->
1524                          * OP_LOAD_MEMBASE offset(basereg), reg1
1525                          * OP_MOVE reg1, reg2
1526                          */
1527                         } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1528                                            || last_ins->opcode == OP_LOAD_MEMBASE) &&
1529                               ins->inst_basereg != last_ins->dreg &&
1530                               ins->inst_basereg == last_ins->inst_basereg &&
1531                               ins->inst_offset == last_ins->inst_offset) {
1532
1533                                 if (ins->dreg == last_ins->dreg) {
1534                                         last_ins->next = ins->next;
1535                                         ins = ins->next;
1536                                         continue;
1537                                 } else {
1538                                         ins->opcode = OP_MOVE;
1539                                         ins->sreg1 = last_ins->dreg;
1540                                 }
1541
1542                                 //g_assert_not_reached ();
1543
1544 #if 0
1545                         /*
1546                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1547                          * OP_LOAD_MEMBASE offset(basereg), reg
1548                          * -->
1549                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1550                          * OP_ICONST reg, imm
1551                          */
1552                         } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1553                                                 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1554                                    ins->inst_basereg == last_ins->inst_destbasereg &&
1555                                    ins->inst_offset == last_ins->inst_offset) {
1556                                 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1557                                 ins->opcode = OP_ICONST;
1558                                 ins->inst_c0 = last_ins->inst_imm;
1559                                 g_assert_not_reached (); // check this rule
1560 #endif
1561                         }
1562                         break;
1563 #endif
1564                 case OP_LOADI1_MEMBASE:
1565                         if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1566                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1567                                         ins->inst_offset == last_ins->inst_offset) {
1568                                 if (ins->dreg == last_ins->sreg1) {
1569                                         last_ins->next = ins->next;
1570                                         ins = ins->next;
1571                                         continue;
1572                                 } else {
1573                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1574                                         ins->opcode = OP_MOVE;
1575                                         ins->sreg1 = last_ins->sreg1;
1576                                 }
1577                         }
1578                         break;
1579                 case OP_LOADI2_MEMBASE:
1580                         if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1581                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1582                                         ins->inst_offset == last_ins->inst_offset) {
1583                                 if (ins->dreg == last_ins->sreg1) {
1584                                         last_ins->next = ins->next;
1585                                         ins = ins->next;
1586                                         continue;
1587                                 } else {
1588                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1589                                         ins->opcode = OP_MOVE;
1590                                         ins->sreg1 = last_ins->sreg1;
1591                                 }
1592                         }
1593                         break;
1594                 case OP_STOREI4_MEMBASE_IMM:
1595                         /* Convert pairs of 0 stores to a dword 0 store */
1596                         /* Used when initializing temporaries */
1597                         /* We know sparc_fp is dword aligned */
1598                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM) &&
1599                                 (ins->inst_destbasereg == last_ins->inst_destbasereg) &&
1600                                 (ins->inst_destbasereg == sparc_fp) &&
1601                                 (ins->inst_offset < 0) &&
1602                                 ((ins->inst_offset % 8) == 0) &&
1603                                 ((ins->inst_offset == last_ins->inst_offset - 4)) &&
1604                                 (ins->inst_imm == 0) &&
1605                                 (last_ins->inst_imm == 0)) {
1606                                 if (sparcv9) {
1607                                         last_ins->opcode = OP_STOREI8_MEMBASE_IMM;
1608                                         last_ins->inst_offset = ins->inst_offset;
1609                                         last_ins->next = ins->next;
1610                                         ins = ins->next;
1611                                         continue;
1612                                 }
1613                         }
1614                         break;
1615                 case CEE_BEQ:
1616                 case CEE_BNE_UN:
1617                 case CEE_BLT:
1618                 case CEE_BGT:
1619                 case CEE_BGE:
1620                 case CEE_BLE:
1621                 case OP_COND_EXC_EQ:
1622                 case OP_COND_EXC_GE:
1623                 case OP_COND_EXC_GT:
1624                 case OP_COND_EXC_LE:
1625                 case OP_COND_EXC_LT:
1626                 case OP_COND_EXC_NE_UN:
1627                         /*
1628                          * Convert compare with zero+branch to BRcc
1629                          */
1630                         /*
1631                          * This only works in 64 bit mode, since it examines all 64
1632                          * bits of the register.
1633                          * Only do this if the method is small since BPr only has a 16bit
1634                          * displacement.
1635                          */
1636                         if (v64 && (mono_method_get_header (cfg->method)->code_size < 10000) && last_ins &&
1637                                 (last_ins->opcode == OP_COMPARE_IMM) &&
1638                                 (last_ins->inst_imm == 0)) {
1639                                 MonoInst *next = ins->next;
1640                                 switch (ins->opcode) {
1641                                 case CEE_BEQ:
1642                                         ins->opcode = OP_SPARC_BRZ;
1643                                         break;
1644                                 case CEE_BNE_UN:
1645                                         ins->opcode = OP_SPARC_BRNZ;
1646                                         break;
1647                                 case CEE_BLT:
1648                                         ins->opcode = OP_SPARC_BRLZ;
1649                                         break;
1650                                 case CEE_BGT:
1651                                         ins->opcode = OP_SPARC_BRGZ;
1652                                         break;
1653                                 case CEE_BGE:
1654                                         ins->opcode = OP_SPARC_BRGEZ;
1655                                         break;
1656                                 case CEE_BLE:
1657                                         ins->opcode = OP_SPARC_BRLEZ;
1658                                         break;
1659                                 case OP_COND_EXC_EQ:
1660                                         ins->opcode = OP_SPARC_COND_EXC_EQZ;
1661                                         break;
1662                                 case OP_COND_EXC_GE:
1663                                         ins->opcode = OP_SPARC_COND_EXC_GEZ;
1664                                         break;
1665                                 case OP_COND_EXC_GT:
1666                                         ins->opcode = OP_SPARC_COND_EXC_GTZ;
1667                                         break;
1668                                 case OP_COND_EXC_LE:
1669                                         ins->opcode = OP_SPARC_COND_EXC_LEZ;
1670                                         break;
1671                                 case OP_COND_EXC_LT:
1672                                         ins->opcode = OP_SPARC_COND_EXC_LTZ;
1673                                         break;
1674                                 case OP_COND_EXC_NE_UN:
1675                                         ins->opcode = OP_SPARC_COND_EXC_NEZ;
1676                                         break;
1677                                 default:
1678                                         g_assert_not_reached ();
1679                                 }
1680                                 ins->sreg1 = last_ins->sreg1;
1681                                 *last_ins = *ins;
1682                                 last_ins->next = next;
1683                                 ins = next;
1684                                 continue;
1685                         }
1686                         break;
1687                 case CEE_CONV_I4:
1688                 case CEE_CONV_U4:
1689                 case OP_MOVE:
1690                         /*
1691                          * OP_MOVE reg, reg
1692                          */
1693                         if (ins->dreg == ins->sreg1) {
1694                                 if (last_ins)
1695                                         last_ins->next = ins->next;
1696                                 ins = ins->next;
1697                                 continue;
1698                         }
1699                         /*
1700                          * OP_MOVE sreg, dreg
1701                          * OP_MOVE dreg, sreg
1702                          */
1703                         if (last_ins && last_ins->opcode == OP_MOVE &&
1704                             ins->sreg1 == last_ins->dreg &&
1705                             ins->dreg == last_ins->sreg1) {
1706                                 last_ins->next = ins->next;
1707                                 ins = ins->next;
1708                                 continue;
1709                         }
1710                         break;
1711                 }
1712                 last_ins = ins;
1713                 ins = ins->next;
1714         }
1715         bb->last_ins = last_ins;
1716 }
1717
1718 static int
1719 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
1720 {
1721         MonoSpillInfo **si, *info;
1722
1723         g_assert (spillvar == 0);
1724
1725         si = &cfg->spill_info_float;
1726
1727         if (!*si) {
1728                 *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1729                 cfg->stack_offset += sizeof (double);
1730                 cfg->stack_offset = ALIGN_TO (cfg->stack_offset, 8);
1731                 info->offset = - cfg->stack_offset;
1732         }
1733
1734         return MONO_SPARC_STACK_BIAS + (*si)->offset;
1735 }
1736
1737 /* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
1738
1739 void
1740 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1741 {
1742         mono_local_regalloc (cfg, bb);
1743 }
1744
1745 static void
1746 sparc_patch (guint32 *code, const gpointer target)
1747 {
1748         guint32 *c = code;
1749         guint32 ins = *code;
1750         guint32 op = ins >> 30;
1751         guint32 op2 = (ins >> 22) & 0x7;
1752         guint32 rd = (ins >> 25) & 0x1f;
1753         guint8* target8 = (guint8*)target;
1754         gint64 disp = (target8 - (guint8*)code) >> 2;
1755         int reg;
1756
1757 //      g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
1758
1759         if ((op == 0) && (op2 == 2)) {
1760                 if (!sparc_is_imm22 (disp))
1761                         NOT_IMPLEMENTED;
1762                 /* Bicc */
1763                 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1764         }
1765         else if ((op == 0) && (op2 == 1)) {
1766                 if (!sparc_is_imm19 (disp))
1767                         NOT_IMPLEMENTED;
1768                 /* BPcc */
1769                 *code = ((ins >> 19) << 19) | (disp & 0x7ffff);
1770         }
1771         else if ((op == 0) && (op2 == 3)) {
1772                 if (!sparc_is_imm16 (disp))
1773                         NOT_IMPLEMENTED;
1774                 /* BPr */
1775                 *code &= ~(0x180000 | 0x3fff);
1776                 *code |= ((disp << 21) & (0x180000)) | (disp & 0x3fff);
1777         }
1778         else if ((op == 0) && (op2 == 6)) {
1779                 if (!sparc_is_imm22 (disp))
1780                         NOT_IMPLEMENTED;
1781                 /* FBicc */
1782                 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1783         }
1784         else if ((op == 0) && (op2 == 4)) {
1785                 guint32 ins2 = code [1];
1786
1787                 if (((ins2 >> 30) == 2) && (((ins2 >> 19) & 0x3f) == 2)) {
1788                         /* sethi followed by or */
1789                         guint32 *p = code;
1790                         sparc_set (p, target8, rd);
1791                         while (p <= (code + 1))
1792                                 sparc_nop (p);
1793                 }
1794                 else if (ins2 == 0x01000000) {
1795                         /* sethi followed by nop */
1796                         guint32 *p = code;
1797                         sparc_set (p, target8, rd);
1798                         while (p <= (code + 1))
1799                                 sparc_nop (p);
1800                 }
1801                 else if ((sparc_inst_op (ins2) == 3) && (sparc_inst_imm (ins2))) {
1802                         /* sethi followed by load/store */
1803 #ifndef SPARCV9
1804                         guint32 t = (guint32)target8;
1805                         *code &= ~(0x3fffff);
1806                         *code |= (t >> 10);
1807                         *(code + 1) &= ~(0x3ff);
1808                         *(code + 1) |= (t & 0x3ff);
1809 #endif
1810                 }
1811                 else if (v64 &&
1812                                  (sparc_inst_rd (ins) == sparc_g1) &&
1813                                  (sparc_inst_op (c [1]) == 0) && (sparc_inst_op2 (c [1]) == 4) &&
1814                                  (sparc_inst_op (c [2]) == 2) && (sparc_inst_op3 (c [2]) == 2) &&
1815                                  (sparc_inst_op (c [3]) == 2) && (sparc_inst_op3 (c [3]) == 2))
1816                 {
1817                         /* sparc_set */
1818                         guint32 *p = c;
1819                         reg = sparc_inst_rd (c [1]);
1820                         sparc_set (p, target8, reg);
1821                         while (p < (c + 6))
1822                                 sparc_nop (p);
1823                 }
1824                 else if ((sparc_inst_op (ins2) == 2) && (sparc_inst_op3 (ins2) == 0x38) &&
1825                                  (sparc_inst_imm (ins2))) {
1826                         /* sethi followed by jmpl */
1827 #ifndef SPARCV9
1828                         guint32 t = (guint32)target8;
1829                         *code &= ~(0x3fffff);
1830                         *code |= (t >> 10);
1831                         *(code + 1) &= ~(0x3ff);
1832                         *(code + 1) |= (t & 0x3ff);
1833 #endif
1834                 }
1835                 else
1836                         NOT_IMPLEMENTED;
1837         }
1838         else if (op == 01) {
1839                 gint64 disp = (target8 - (guint8*)code) >> 2;
1840
1841                 if (!sparc_is_imm30 (disp))
1842                         NOT_IMPLEMENTED;
1843                 sparc_call_simple (code, target8 - (guint8*)code);
1844         }
1845         else if ((op == 2) && (sparc_inst_op3 (ins) == 0x2) && sparc_inst_imm (ins)) {
1846                 /* mov imm, reg */
1847                 g_assert (sparc_is_imm13 (target8));
1848                 *code &= ~(0x1fff);
1849                 *code |= (guint32)target8;
1850         }
1851         else if ((sparc_inst_op (ins) == 2) && (sparc_inst_op3 (ins) == 0x7)) {
1852                 /* sparc_set case 5. */
1853                 guint32 *p = c;
1854
1855                 g_assert (v64);
1856                 reg = sparc_inst_rd (c [3]);
1857                 sparc_set (p, target, reg);
1858                 while (p < (c + 6))
1859                         sparc_nop (p);
1860         }
1861         else
1862                 NOT_IMPLEMENTED;
1863
1864 //      g_print ("patched with 0x%08x\n", ins);
1865 }
1866
1867 /*
1868  * mono_sparc_emit_save_lmf:
1869  *
1870  *  Emit the code neccesary to push a new entry onto the lmf stack. Used by
1871  * trampolines as well.
1872  */
1873 guint32*
1874 mono_sparc_emit_save_lmf (guint32 *code, guint32 lmf_offset)
1875 {
1876         /* Save lmf_addr */
1877         sparc_sti_imm (code, sparc_o0, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr));
1878         /* Save previous_lmf */
1879         sparc_ldi (code, sparc_o0, sparc_g0, sparc_o7);
1880         sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf));
1881         /* Set new lmf */
1882         sparc_add_imm (code, FALSE, sparc_fp, lmf_offset, sparc_o7);
1883         sparc_sti (code, sparc_o7, sparc_o0, sparc_g0);
1884
1885         return code;
1886 }
1887
1888 guint32*
1889 mono_sparc_emit_restore_lmf (guint32 *code, guint32 lmf_offset)
1890 {
1891         /* Load previous_lmf */
1892         sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), sparc_l0);
1893         /* Load lmf_addr */
1894         sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), sparc_l1);
1895         /* *(lmf) = previous_lmf */
1896         sparc_sti (code, sparc_l0, sparc_l1, sparc_g0);
1897         return code;
1898 }
1899
1900 static guint32*
1901 emit_save_sp_to_lmf (MonoCompile *cfg, guint32 *code)
1902 {
1903         /*
1904          * Since register windows are saved to the current value of %sp, we need to
1905          * set the sp field in the lmf before the call, not in the prolog.
1906          */
1907         if (cfg->method->save_lmf) {
1908                 gint32 lmf_offset = MONO_SPARC_STACK_BIAS - cfg->arch.lmf_offset;
1909
1910                 /* Save sp */
1911                 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
1912         }
1913
1914         return code;
1915 }
1916
1917 static guint32*
1918 emit_vret_token (MonoInst *ins, guint32 *code)
1919 {
1920         MonoCallInst *call = (MonoCallInst*)ins;
1921         guint32 size;
1922
1923         /*
1924          * The sparc ABI requires that calls to functions which return a structure
1925          * contain an additional unimpl instruction which is checked by the callee.
1926          */
1927         if (call->signature->pinvoke && MONO_TYPE_ISSTRUCT(call->signature->ret)) {
1928                 if (call->signature->ret->type == MONO_TYPE_TYPEDBYREF)
1929                         size = mono_type_stack_size (call->signature->ret, NULL);
1930                 else
1931                         size = mono_class_native_size (call->signature->ret->data.klass, NULL);
1932                 sparc_unimp (code, size & 0xfff);
1933         }
1934
1935         return code;
1936 }
1937
1938 static guint32*
1939 emit_move_return_value (MonoInst *ins, guint32 *code)
1940 {
1941         /* Move return value to the target register */
1942         /* FIXME: do more things in the local reg allocator */
1943         switch (ins->opcode) {
1944         case OP_VOIDCALL:
1945         case OP_VOIDCALL_REG:
1946         case OP_VOIDCALL_MEMBASE:
1947                 break;
1948         case CEE_CALL:
1949         case OP_CALL_REG:
1950         case OP_CALL_MEMBASE:
1951                 g_assert (ins->dreg == sparc_o0);
1952                 break;
1953         case OP_LCALL:
1954         case OP_LCALL_REG:
1955         case OP_LCALL_MEMBASE:
1956                 /*
1957                  * ins->dreg is the least significant reg due to the lreg: LCALL rule
1958                  * in inssel-long32.brg.
1959                  */
1960 #ifdef SPARCV9
1961                 sparc_mov_reg_reg (code, sparc_o0, ins->dreg);
1962 #else
1963                 g_assert (ins->dreg == sparc_o1);
1964 #endif
1965                 break;
1966         case OP_FCALL:
1967         case OP_FCALL_REG:
1968         case OP_FCALL_MEMBASE:
1969 #ifdef SPARCV9
1970                 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4) {
1971                         sparc_fmovs (code, sparc_f0, ins->dreg);
1972                         sparc_fstod (code, ins->dreg, ins->dreg);
1973                 }
1974                 else
1975                         sparc_fmovd (code, sparc_f0, ins->dreg);
1976 #else
1977                 sparc_fmovs (code, sparc_f0, ins->dreg);
1978                 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4)
1979                         sparc_fstod (code, ins->dreg, ins->dreg);
1980                 else
1981                         sparc_fmovs (code, sparc_f1, ins->dreg + 1);
1982 #endif
1983                 break;
1984         case OP_VCALL:
1985         case OP_VCALL_REG:
1986         case OP_VCALL_MEMBASE:
1987                 break;
1988         default:
1989                 NOT_IMPLEMENTED;
1990         }
1991
1992         return code;
1993 }
1994
1995 /*
1996  * emit_load_volatile_arguments:
1997  *
1998  *  Load volatile arguments from the stack to the original input registers.
1999  * Required before a tail call.
2000  */
2001 static guint32*
2002 emit_load_volatile_arguments (MonoCompile *cfg, guint32 *code)
2003 {
2004         MonoMethod *method = cfg->method;
2005         MonoMethodSignature *sig;
2006         MonoInst *inst;
2007         CallInfo *cinfo;
2008         guint32 i, ireg;
2009
2010         /* FIXME: Generate intermediate code instead */
2011
2012         sig = mono_method_signature (method);
2013
2014         cinfo = get_call_info (sig, FALSE);
2015
2016         /* This is the opposite of the code in emit_prolog */
2017
2018         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
2019                 ArgInfo *ainfo = cinfo->args + i;
2020                 gint32 stack_offset;
2021                 MonoType *arg_type;
2022                 inst = cfg->args [i];
2023
2024                 if (sig->hasthis && (i == 0))
2025                         arg_type = &mono_defaults.object_class->byval_arg;
2026                 else
2027                         arg_type = sig->params [i - sig->hasthis];
2028
2029                 stack_offset = ainfo->offset + ARGS_OFFSET;
2030                 ireg = sparc_i0 + ainfo->reg;
2031
2032                 if (ainfo->storage == ArgInSplitRegStack) {
2033                         g_assert (inst->opcode == OP_REGOFFSET);
2034
2035                         if (!sparc_is_imm13 (stack_offset))
2036                                 NOT_IMPLEMENTED;
2037                         sparc_st_imm (code, inst->inst_basereg, stack_offset, sparc_i5);
2038                 }
2039
2040                 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
2041                         if (ainfo->storage == ArgInIRegPair) {
2042                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
2043                                         NOT_IMPLEMENTED;
2044                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2045                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2046                         }
2047                         else
2048                                 if (ainfo->storage == ArgInSplitRegStack) {
2049                                         if (stack_offset != inst->inst_offset) {
2050                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_i5);
2051                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2052                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2053
2054                                         }
2055                                 }
2056                         else
2057                                 if (ainfo->storage == ArgOnStackPair) {
2058                                         if (stack_offset != inst->inst_offset) {
2059                                                 /* stack_offset is not dword aligned, so we need to make a copy */
2060                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_o7);
2061                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset);
2062
2063                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2064                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2065
2066                                         }
2067                                 }
2068                          else
2069                                 g_assert_not_reached ();
2070                 }
2071                 else
2072                         if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
2073                                 /* Argument in register, but need to be saved to stack */
2074                                 if (!sparc_is_imm13 (stack_offset))
2075                                         NOT_IMPLEMENTED;
2076                                 if ((stack_offset - ARGS_OFFSET) & 0x1)
2077                                         /* FIXME: Is this ldsb or ldub ? */
2078                                         sparc_ldsb_imm (code, inst->inst_basereg, stack_offset, ireg);
2079                                 else
2080                                         if ((stack_offset - ARGS_OFFSET) & 0x2)
2081                                                 sparc_ldsh_imm (code, inst->inst_basereg, stack_offset, ireg);
2082                                 else
2083                                         if ((stack_offset - ARGS_OFFSET) & 0x4)
2084                                                 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2085                                         else {
2086                                                 if (v64)
2087                                                         sparc_ldx_imm (code, inst->inst_basereg, stack_offset, ireg);
2088                                                 else
2089                                                         sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2090                                         }
2091                         }
2092                         else if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
2093                                 /* Argument in regpair, but need to be saved to stack */
2094                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
2095                                         NOT_IMPLEMENTED;
2096                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2097                                 sparc_st_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2098                         }
2099                         else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
2100                                 NOT_IMPLEMENTED;
2101                         }
2102                         else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
2103                                 NOT_IMPLEMENTED;
2104                         }
2105
2106                 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
2107                         if (inst->opcode == OP_REGVAR)
2108                                 /* FIXME: Load the argument into memory */
2109                                 NOT_IMPLEMENTED;
2110         }
2111
2112         g_free (cinfo);
2113
2114         return code;
2115 }
2116
2117 /*
2118  * mono_sparc_is_virtual_call:
2119  *
2120  *  Determine whenever the instruction at CODE is a virtual call.
2121  */
2122 gboolean
2123 mono_sparc_is_virtual_call (guint32 *code)
2124 {
2125         guint32 buf[1];
2126         guint32 *p;
2127
2128         p = buf;
2129
2130         if ((sparc_inst_op (*code) == 0x2) && (sparc_inst_op3 (*code) == 0x38)) {
2131                 /*
2132                  * Register indirect call. If it is a virtual call, then the
2133                  * instruction in the delay slot is a special kind of nop.
2134                  */
2135
2136                 /* Construct special nop */
2137                 sparc_or_imm (p, FALSE, sparc_g0, 0xca, sparc_g0);
2138                 p --;
2139
2140                 if (code [1] == p [0])
2141                         return TRUE;
2142         }
2143
2144         return FALSE;
2145 }
2146
2147 /*
2148  * mono_arch_get_vcall_slot_addr:
2149  *
2150  *  Determine the vtable slot used by a virtual call.
2151  */
2152 gpointer*
2153 mono_arch_get_vcall_slot_addr (guint8 *code8, gpointer *regs)
2154 {
2155         guint32 *code = (guint32*)(gpointer)code8;
2156         guint32 ins = code [0];
2157         guint32 prev_ins = code [-1];
2158
2159         mono_sparc_flushw ();
2160
2161         if (!mono_sparc_is_virtual_call (code))
2162                 return NULL;
2163
2164         if ((sparc_inst_op (ins) == 0x2) && (sparc_inst_op3 (ins) == 0x38)) {
2165                 if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_i (prev_ins) == 1) && (sparc_inst_op3 (prev_ins) == 0 || sparc_inst_op3 (prev_ins) == 0xb)) {
2166                         /* ld [r1 + CONST ], r2; call r2 */
2167                         guint32 base = sparc_inst_rs1 (prev_ins);
2168                         guint32 disp = sparc_inst_imm13 (prev_ins);
2169                         gpointer base_val;
2170
2171                         g_assert (sparc_inst_rd (prev_ins) == sparc_inst_rs1 (ins));
2172
2173                         g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2174
2175                         base_val = regs [base - sparc_o0];
2176
2177                         return (gpointer)((guint8*)base_val + disp);
2178                 }
2179                 else if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_i (prev_ins) == 0) && (sparc_inst_op3 (prev_ins) == 0)) {
2180                         /* set r1, ICONST; ld [r1 + r2], r2; call r2 */
2181                         /* Decode a sparc_set32 */
2182                         guint32 base = sparc_inst_rs1 (prev_ins);
2183                         guint32 disp;
2184                         gpointer base_val;
2185                         guint32 s1 = code [-3];
2186                         guint32 s2 = code [-2];
2187
2188 #ifdef SPARCV9
2189                         NOT_IMPLEMENTED;
2190 #endif
2191
2192                         /* sparc_sethi */
2193                         g_assert (sparc_inst_op (s1) == 0);
2194                         g_assert (sparc_inst_op2 (s1) == 4);
2195
2196                         /* sparc_or_imm */
2197                         g_assert (sparc_inst_op (s2) == 2);
2198                         g_assert (sparc_inst_op3 (s2) == 2);
2199                         g_assert (sparc_inst_i (s2) == 1);
2200                         g_assert (sparc_inst_rs1 (s2) == sparc_inst_rd (s2));
2201                         g_assert (sparc_inst_rd (s1) == sparc_inst_rs1 (s2));
2202
2203                         disp = ((s1 & 0x3fffff) << 10) | sparc_inst_imm13 (s2);
2204
2205                         g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2206
2207                         base_val = regs [base - sparc_o0];
2208
2209                         return (gpointer)((guint8*)base_val + disp);
2210                 } else
2211                         g_assert_not_reached ();
2212         }
2213         else
2214                 g_assert_not_reached ();
2215
2216         return NULL;
2217 }
2218
2219 /*
2220  * Some conventions used in the following code.
2221  * 2) The only scratch registers we have are o7 and g1.  We try to
2222  * stick to o7 when we can, and use g1 when necessary.
2223  */
2224
2225 void
2226 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2227 {
2228         MonoInst *ins;
2229         MonoCallInst *call;
2230         guint offset;
2231         guint32 *code = (guint32*)(cfg->native_code + cfg->code_len);
2232         MonoInst *last_ins = NULL;
2233         int max_len, cpos;
2234         const char *spec;
2235
2236         if (cfg->opt & MONO_OPT_PEEPHOLE)
2237                 peephole_pass (cfg, bb);
2238
2239         if (cfg->verbose_level > 2)
2240                 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2241
2242         cpos = bb->max_offset;
2243
2244         if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2245                 NOT_IMPLEMENTED;
2246         }
2247
2248         ins = bb->code;
2249         while (ins) {
2250                 guint8* code_start;
2251
2252                 offset = (guint8*)code - cfg->native_code;
2253
2254                 spec = ins_get_spec (ins->opcode);
2255                 /* I kept this, but this looks a workaround for a bug */
2256                 if (spec == MONO_ARCH_CPU_SPEC)
2257                         spec = ins_get_spec (CEE_ADD);
2258
2259                 max_len = ((guint8 *)spec)[MONO_INST_LEN];
2260
2261                 if (offset > (cfg->code_size - max_len - 16)) {
2262                         cfg->code_size *= 2;
2263                         cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2264                         code = (guint32*)(cfg->native_code + offset);
2265                 }
2266                 code_start = (guint8*)code;
2267                 //      if (ins->cil_code)
2268                 //              g_print ("cil code\n");
2269                 mono_debug_record_line_number (cfg, ins, offset);
2270
2271                 switch (ins->opcode) {
2272                 case OP_STOREI1_MEMBASE_IMM:
2273                         EMIT_STORE_MEMBASE_IMM (ins, stb);
2274                         break;
2275                 case OP_STOREI2_MEMBASE_IMM:
2276                         EMIT_STORE_MEMBASE_IMM (ins, sth);
2277                         break;
2278                 case OP_STORE_MEMBASE_IMM:
2279                         EMIT_STORE_MEMBASE_IMM (ins, sti);
2280                         break;
2281                 case OP_STOREI4_MEMBASE_IMM:
2282                         EMIT_STORE_MEMBASE_IMM (ins, st);
2283                         break;
2284                 case OP_STOREI8_MEMBASE_IMM:
2285 #ifdef SPARCV9
2286                         EMIT_STORE_MEMBASE_IMM (ins, stx);
2287 #else
2288                         /* Only generated by peephole opts */
2289                         g_assert ((ins->inst_offset % 8) == 0);
2290                         g_assert (ins->inst_imm == 0);
2291                         EMIT_STORE_MEMBASE_IMM (ins, stx);
2292 #endif
2293                         break;
2294                 case OP_STOREI1_MEMBASE_REG:
2295                         EMIT_STORE_MEMBASE_REG (ins, stb);
2296                         break;
2297                 case OP_STOREI2_MEMBASE_REG:
2298                         EMIT_STORE_MEMBASE_REG (ins, sth);
2299                         break;
2300                 case OP_STOREI4_MEMBASE_REG:
2301                         EMIT_STORE_MEMBASE_REG (ins, st);
2302                         break;
2303                 case OP_STOREI8_MEMBASE_REG:
2304 #ifdef SPARCV9
2305                         EMIT_STORE_MEMBASE_REG (ins, stx);
2306 #else
2307                         /* Only used by OP_MEMSET */
2308                         EMIT_STORE_MEMBASE_REG (ins, std);
2309 #endif
2310                         break;
2311                 case OP_STORE_MEMBASE_REG:
2312                         EMIT_STORE_MEMBASE_REG (ins, sti);
2313                         break;
2314                 case CEE_LDIND_I:
2315 #ifdef SPARCV9
2316                         sparc_ldx (code, ins->inst_c0, sparc_g0, ins->dreg);
2317 #else
2318                         sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2319 #endif
2320                         break;
2321                 case CEE_LDIND_I4:
2322 #ifdef SPARCV9
2323                         sparc_ldsw (code, ins->inst_c0, sparc_g0, ins->dreg);
2324 #else
2325                         sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2326 #endif
2327                         break;
2328                 case CEE_LDIND_U4:
2329                         sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2330                         break;
2331                 case OP_LOADU4_MEM:
2332                         sparc_set (code, ins->inst_c0, ins->dreg);
2333                         sparc_ld (code, ins->dreg, sparc_g0, ins->dreg);
2334                         break;
2335                 case OP_LOADI4_MEMBASE:
2336 #ifdef SPARCV9
2337                         EMIT_LOAD_MEMBASE (ins, ldsw);
2338 #else
2339                         EMIT_LOAD_MEMBASE (ins, ld);
2340 #endif
2341                         break;
2342                 case OP_LOADU4_MEMBASE:
2343                         EMIT_LOAD_MEMBASE (ins, ld);
2344                         break;
2345                 case OP_LOADU1_MEMBASE:
2346                         EMIT_LOAD_MEMBASE (ins, ldub);
2347                         break;
2348                 case OP_LOADI1_MEMBASE:
2349                         EMIT_LOAD_MEMBASE (ins, ldsb);
2350                         break;
2351                 case OP_LOADU2_MEMBASE:
2352                         EMIT_LOAD_MEMBASE (ins, lduh);
2353                         break;
2354                 case OP_LOADI2_MEMBASE:
2355                         EMIT_LOAD_MEMBASE (ins, ldsh);
2356                         break;
2357                 case OP_LOAD_MEMBASE:
2358 #ifdef SPARCV9
2359                                 EMIT_LOAD_MEMBASE (ins, ldx);
2360 #else
2361                                 EMIT_LOAD_MEMBASE (ins, ld);
2362 #endif
2363                         break;
2364 #ifdef SPARCV9
2365                 case OP_LOADI8_MEMBASE:
2366                         EMIT_LOAD_MEMBASE (ins, ldx);
2367                         break;
2368 #endif
2369                 case CEE_CONV_I1:
2370                         sparc_sll_imm (code, ins->sreg1, 24, sparc_o7);
2371                         sparc_sra_imm (code, sparc_o7, 24, ins->dreg);
2372                         break;
2373                 case CEE_CONV_I2:
2374                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2375                         sparc_sra_imm (code, sparc_o7, 16, ins->dreg);
2376                         break;
2377                 case CEE_CONV_U1:
2378                         sparc_and_imm (code, FALSE, ins->sreg1, 0xff, ins->dreg);
2379                         break;
2380                 case CEE_CONV_U2:
2381                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2382                         sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
2383                         break;
2384                 case CEE_CONV_OVF_U4:
2385                         /* Only used on V9 */
2386                         sparc_cmp_imm (code, ins->sreg1, 0);
2387                         mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2388                                                                  MONO_PATCH_INFO_EXC, "OverflowException");
2389                         sparc_branchp (code, 0, sparc_bl, sparc_xcc_short, 0, 0);
2390                         /* Delay slot */
2391                         sparc_set (code, 1, sparc_o7);
2392                         sparc_sllx_imm (code, sparc_o7, 32, sparc_o7);
2393                         sparc_cmp (code, ins->sreg1, sparc_o7);
2394                         mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2395                                                                  MONO_PATCH_INFO_EXC, "OverflowException");
2396                         sparc_branchp (code, 0, sparc_bge, sparc_xcc_short, 0, 0);
2397                         sparc_nop (code);
2398                         sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2399                         break;
2400                 case CEE_CONV_OVF_I4_UN:
2401                         /* Only used on V9 */
2402                         NOT_IMPLEMENTED;
2403                         break;
2404                 case CEE_CONV_U:
2405                 case CEE_CONV_U8:
2406                         /* Only used on V9 */
2407                         sparc_srl_imm (code, ins->sreg1, 0, ins->dreg);
2408                         break;
2409                 case CEE_CONV_I:
2410                 case CEE_CONV_I8:
2411                         /* Only used on V9 */
2412                         sparc_sra_imm (code, ins->sreg1, 0, ins->dreg);
2413                         break;
2414                 case OP_COMPARE:
2415                 case OP_LCOMPARE:
2416                 case OP_ICOMPARE:
2417                         sparc_cmp (code, ins->sreg1, ins->sreg2);
2418                         break;
2419                 case OP_COMPARE_IMM:
2420                 case OP_ICOMPARE_IMM:
2421                         if (sparc_is_imm13 (ins->inst_imm))
2422                                 sparc_cmp_imm (code, ins->sreg1, ins->inst_imm);
2423                         else {
2424                                 sparc_set (code, ins->inst_imm, sparc_o7);
2425                                 sparc_cmp (code, ins->sreg1, sparc_o7);
2426                         }
2427                         break;
2428                 case OP_BREAK:
2429                         /*
2430                          * gdb does not like encountering 'ta 1' in the debugged code. So
2431                          * instead of emitting a trap, we emit a call a C function and place a
2432                          * breakpoint there.
2433                          */
2434                         //sparc_ta (code, 1);
2435                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, mono_arch_break);
2436                         EMIT_CALL();
2437                         break;
2438                 case OP_ADDCC:
2439                 case OP_IADDCC:
2440                         sparc_add (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2441                         break;
2442                 case CEE_ADD:
2443                 case OP_IADD:
2444                         sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2445                         break;
2446                 case OP_ADDCC_IMM:
2447                 case OP_ADD_IMM:
2448                 case OP_IADD_IMM:
2449                         /* according to inssel-long32.brg, this should set cc */
2450                         EMIT_ALU_IMM (ins, add, TRUE);
2451                         break;
2452                 case OP_ADC:
2453                 case OP_IADC:
2454                         /* according to inssel-long32.brg, this should set cc */
2455                         sparc_addx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2456                         break;
2457                 case OP_ADC_IMM:
2458                 case OP_IADC_IMM:
2459                         EMIT_ALU_IMM (ins, addx, TRUE);
2460                         break;
2461                 case OP_SUBCC:
2462                 case OP_ISUBCC:
2463                         sparc_sub (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2464                         break;
2465                 case CEE_SUB:
2466                 case OP_ISUB:
2467                         sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2468                         break;
2469                 case OP_SUBCC_IMM:
2470                 case OP_SUB_IMM:
2471                 case OP_ISUB_IMM:
2472                         /* according to inssel-long32.brg, this should set cc */
2473                         EMIT_ALU_IMM (ins, sub, TRUE);
2474                         break;
2475                 case OP_SBB:
2476                 case OP_ISBB:
2477                         /* according to inssel-long32.brg, this should set cc */
2478                         sparc_subx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2479                         break;
2480                 case OP_SBB_IMM:
2481                 case OP_ISBB_IMM:
2482                         EMIT_ALU_IMM (ins, subx, TRUE);
2483                         break;
2484                 case CEE_AND:
2485                 case OP_IAND:
2486                         sparc_and (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2487                         break;
2488                 case OP_AND_IMM:
2489                 case OP_IAND_IMM:
2490                         EMIT_ALU_IMM (ins, and, FALSE);
2491                         break;
2492                 case CEE_DIV:
2493                 case OP_IDIV:
2494                         /* Sign extend sreg1 into %y */
2495                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2496                         sparc_wry (code, sparc_o7, sparc_g0);
2497                         sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2498                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2499                         break;
2500                 case CEE_DIV_UN:
2501                 case OP_IDIV_UN:
2502                         sparc_wry (code, sparc_g0, sparc_g0);
2503                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2504                         break;
2505                 case OP_DIV_IMM: {
2506                         int i, imm;
2507
2508                         /* Transform division into a shift */
2509                         for (i = 1; i < 30; ++i) {
2510                                 imm = (1 << i);
2511                                 if (ins->inst_imm == imm)
2512                                         break;
2513                         }
2514                         if (i < 30) {
2515                                 if (i == 1) {
2516                                         /* gcc 2.95.3 */
2517                                         sparc_srl_imm (code, ins->sreg1, 31, sparc_o7);
2518                                         sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2519                                         sparc_sra_imm (code, ins->dreg, 1, ins->dreg);
2520                                 }
2521                                 else {
2522                                         /* http://compilers.iecc.com/comparch/article/93-04-079 */
2523                                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2524                                         sparc_srl_imm (code, sparc_o7, 32 - i, sparc_o7);
2525                                         sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2526                                         sparc_sra_imm (code, ins->dreg, i, ins->dreg);
2527                                 }
2528                         }
2529                         else {
2530                                 /* Sign extend sreg1 into %y */
2531                                 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2532                                 sparc_wry (code, sparc_o7, sparc_g0);
2533                                 EMIT_ALU_IMM (ins, sdiv, TRUE);
2534                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2535                         }
2536                         break;
2537                 }
2538                 case CEE_REM:
2539                 case OP_IREM:
2540                         /* Sign extend sreg1 into %y */
2541                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2542                         sparc_wry (code, sparc_o7, sparc_g0);
2543                         sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, sparc_o7);
2544                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2545                         sparc_smul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2546                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2547                         break;
2548                 case CEE_REM_UN:
2549                 case OP_IREM_UN:
2550                         sparc_wry (code, sparc_g0, sparc_g0);
2551                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2552                         sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2553                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2554                         break;
2555                 case OP_REM_IMM:
2556                 case OP_IREM_IMM:
2557                         /* Sign extend sreg1 into %y */
2558                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2559                         sparc_wry (code, sparc_o7, sparc_g0);
2560                         if (!sparc_is_imm13 (ins->inst_imm)) {
2561                                 sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
2562                                 sparc_sdiv (code, TRUE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
2563                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2564                                 sparc_smul (code, FALSE, sparc_o7, GP_SCRATCH_REG, sparc_o7);
2565                         }
2566                         else {
2567                                 sparc_sdiv_imm (code, TRUE, ins->sreg1, ins->inst_imm, sparc_o7);
2568                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2569                                 sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
2570                         }
2571                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2572                         break;
2573                 case CEE_OR:
2574                 case OP_IOR:
2575                         sparc_or (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2576                         break;
2577                 case OP_OR_IMM:
2578                 case OP_IOR_IMM:
2579                         EMIT_ALU_IMM (ins, or, FALSE);
2580                         break;
2581                 case CEE_XOR:
2582                 case OP_IXOR:
2583                         sparc_xor (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2584                         break;
2585                 case OP_XOR_IMM:
2586                 case OP_IXOR_IMM:
2587                         EMIT_ALU_IMM (ins, xor, FALSE);
2588                         break;
2589                 case CEE_SHL:
2590                 case OP_ISHL:
2591                         sparc_sll (code, ins->sreg1, ins->sreg2, ins->dreg);
2592                         break;
2593                 case OP_SHL_IMM:
2594                 case OP_ISHL_IMM:
2595                         if (ins->inst_imm < (1 << 5))
2596                                 sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2597                         else {
2598                                 sparc_set (code, ins->inst_imm, sparc_o7);
2599                                 sparc_sll (code, ins->sreg1, sparc_o7, ins->dreg);
2600                         }
2601                         break;
2602                 case CEE_SHR:
2603                 case OP_ISHR:
2604                         sparc_sra (code, ins->sreg1, ins->sreg2, ins->dreg);
2605                         break;
2606                 case OP_ISHR_IMM:
2607                 case OP_SHR_IMM:
2608                         if (ins->inst_imm < (1 << 5))
2609                                 sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2610                         else {
2611                                 sparc_set (code, ins->inst_imm, sparc_o7);
2612                                 sparc_sra (code, ins->sreg1, sparc_o7, ins->dreg);
2613                         }
2614                         break;
2615                 case OP_SHR_UN_IMM:
2616                 case OP_ISHR_UN_IMM:
2617                         if (ins->inst_imm < (1 << 5))
2618                                 sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2619                         else {
2620                                 sparc_set (code, ins->inst_imm, sparc_o7);
2621                                 sparc_srl (code, ins->sreg1, sparc_o7, ins->dreg);
2622                         }
2623                         break;
2624                 case CEE_SHR_UN:
2625                 case OP_ISHR_UN:
2626                         sparc_srl (code, ins->sreg1, ins->sreg2, ins->dreg);
2627                         break;
2628                 case OP_LSHL:
2629                         sparc_sllx (code, ins->sreg1, ins->sreg2, ins->dreg);
2630                         break;
2631                 case OP_LSHL_IMM:
2632                         if (ins->inst_imm < (1 << 6))
2633                                 sparc_sllx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2634                         else {
2635                                 sparc_set (code, ins->inst_imm, sparc_o7);
2636                                 sparc_sllx (code, ins->sreg1, sparc_o7, ins->dreg);
2637                         }
2638                         break;
2639                 case OP_LSHR:
2640                         sparc_srax (code, ins->sreg1, ins->sreg2, ins->dreg);
2641                         break;
2642                 case OP_LSHR_IMM:
2643                         if (ins->inst_imm < (1 << 6))
2644                                 sparc_srax_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2645                         else {
2646                                 sparc_set (code, ins->inst_imm, sparc_o7);
2647                                 sparc_srax (code, ins->sreg1, sparc_o7, ins->dreg);
2648                         }
2649                         break;
2650                 case OP_LSHR_UN:
2651                         sparc_srlx (code, ins->sreg1, ins->sreg2, ins->dreg);
2652                         break;
2653                 case OP_LSHR_UN_IMM:
2654                         if (ins->inst_imm < (1 << 6))
2655                                 sparc_srlx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2656                         else {
2657                                 sparc_set (code, ins->inst_imm, sparc_o7);
2658                                 sparc_srlx (code, ins->sreg1, sparc_o7, ins->dreg);
2659                         }
2660                         break;
2661                 case CEE_NOT:
2662                 case OP_INOT:
2663                         /* can't use sparc_not */
2664                         sparc_xnor (code, FALSE, ins->sreg1, sparc_g0, ins->dreg);
2665                         break;
2666                 case CEE_NEG:
2667                 case OP_INEG:
2668                         /* can't use sparc_neg */
2669                         sparc_sub (code, FALSE, sparc_g0, ins->sreg1, ins->dreg);
2670                         break;
2671                 case CEE_MUL:
2672                 case OP_IMUL:
2673                         sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2674                         break;
2675                 case OP_IMUL_IMM:
2676                 case OP_MUL_IMM: {
2677                         int i, imm;
2678
2679                         if ((ins->inst_imm == 1) && (ins->sreg1 == ins->dreg))
2680                                 break;
2681
2682                         /* Transform multiplication into a shift */
2683                         for (i = 0; i < 30; ++i) {
2684                                 imm = (1 << i);
2685                                 if (ins->inst_imm == imm)
2686                                         break;
2687                         }
2688                         if (i < 30)
2689                                 sparc_sll_imm (code, ins->sreg1, i, ins->dreg);
2690                         else
2691                                 EMIT_ALU_IMM (ins, smul, FALSE);
2692                         break;
2693                 }
2694                 case CEE_MUL_OVF:
2695                 case OP_IMUL_OVF:
2696                         sparc_smul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2697                         sparc_rdy (code, sparc_g1);
2698                         sparc_sra_imm (code, ins->dreg, 31, sparc_o7);
2699                         sparc_cmp (code, sparc_g1, sparc_o7);
2700                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2701                         break;
2702                 case CEE_MUL_OVF_UN:
2703                 case OP_IMUL_OVF_UN:
2704                         sparc_umul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2705                         sparc_rdy (code, sparc_o7);
2706                         sparc_cmp (code, sparc_o7, sparc_g0);
2707                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2708                         break;
2709                 case OP_ICONST:
2710                         sparc_set (code, ins->inst_c0, ins->dreg);
2711                         break;
2712                 case OP_I8CONST:
2713                         sparc_set (code, ins->inst_l, ins->dreg);
2714                         break;
2715                 case OP_AOTCONST:
2716                         mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2717                         sparc_set_template (code, ins->dreg);
2718                         break;
2719                 case CEE_CONV_I4:
2720                 case CEE_CONV_U4:
2721                 case OP_MOVE:
2722                         if (ins->sreg1 != ins->dreg)
2723                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2724                         break;
2725                 case OP_SETFREG:
2726                         /* Only used on V9 */
2727                         if (ins->sreg1 != ins->dreg)
2728                                 sparc_fmovd (code, ins->sreg1, ins->dreg);
2729                         break;
2730                 case OP_SPARC_SETFREG_FLOAT:
2731                         /* Only used on V9 */
2732                         sparc_fdtos (code, ins->sreg1, ins->dreg);
2733                         break;
2734                 case OP_JMP:
2735                         if (cfg->method->save_lmf)
2736                                 NOT_IMPLEMENTED;
2737
2738                         code = emit_load_volatile_arguments (cfg, code);
2739                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2740                         sparc_set_template (code, sparc_o7);
2741                         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_g0);
2742                         /* Restore parent frame in delay slot */
2743                         sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
2744                         break;
2745                 case OP_CHECK_THIS:
2746                         /* ensure ins->sreg1 is not NULL */
2747                         sparc_ld_imm (code, ins->sreg1, 0, sparc_g0);
2748                         break;
2749                 case OP_ARGLIST:
2750                         sparc_add_imm (code, FALSE, sparc_fp, cfg->sig_cookie, sparc_o7);
2751                         sparc_sti_imm (code, sparc_o7, ins->sreg1, 0);
2752                         break;
2753                 case OP_FCALL:
2754                 case OP_LCALL:
2755                 case OP_VCALL:
2756                 case OP_VOIDCALL:
2757                 case CEE_CALL:
2758                         call = (MonoCallInst*)ins;
2759                         g_assert (!call->virtual);
2760                         code = emit_save_sp_to_lmf (cfg, code);
2761                         if (ins->flags & MONO_INST_HAS_METHOD)
2762                             code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2763                         else
2764                             code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2765
2766                         code = emit_vret_token (ins, code);
2767                         code = emit_move_return_value (ins, code);
2768                         break;
2769                 case OP_FCALL_REG:
2770                 case OP_LCALL_REG:
2771                 case OP_VCALL_REG:
2772                 case OP_VOIDCALL_REG:
2773                 case OP_CALL_REG:
2774                         call = (MonoCallInst*)ins;
2775                         code = emit_save_sp_to_lmf (cfg, code);
2776                         sparc_jmpl (code, ins->sreg1, sparc_g0, sparc_callsite);
2777                         /*
2778                          * We emit a special kind of nop in the delay slot to tell the
2779                          * trampoline code that this is a virtual call, thus an unbox
2780                          * trampoline might need to be called.
2781                          */
2782                         if (call->virtual)
2783                                 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2784                         else
2785                                 sparc_nop (code);
2786
2787                         code = emit_vret_token (ins, code);
2788                         code = emit_move_return_value (ins, code);
2789                         break;
2790                 case OP_FCALL_MEMBASE:
2791                 case OP_LCALL_MEMBASE:
2792                 case OP_VCALL_MEMBASE:
2793                 case OP_VOIDCALL_MEMBASE:
2794                 case OP_CALL_MEMBASE:
2795                         call = (MonoCallInst*)ins;
2796                         code = emit_save_sp_to_lmf (cfg, code);
2797                         if (sparc_is_imm13 (ins->inst_offset)) {
2798                                 sparc_ldi_imm (code, ins->inst_basereg, ins->inst_offset, sparc_o7);
2799                         } else {
2800                                 sparc_set (code, ins->inst_offset, sparc_o7);
2801                                 sparc_ldi (code, ins->inst_basereg, sparc_o7, sparc_o7);
2802                         }
2803                         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_callsite);
2804                         if (call->virtual)
2805                                 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2806                         else
2807                                 sparc_nop (code);
2808
2809                         code = emit_vret_token (ins, code);
2810                         code = emit_move_return_value (ins, code);
2811                         break;
2812                 case OP_SETFRET:
2813                         if (mono_method_signature (cfg->method)->ret->type == MONO_TYPE_R4)
2814                                 sparc_fdtos (code, ins->sreg1, sparc_f0);
2815                         else {
2816 #ifdef SPARCV9
2817                                 sparc_fmovd (code, ins->sreg1, ins->dreg);
2818 #else
2819                                 /* FIXME: Why not use fmovd ? */
2820                                 sparc_fmovs (code, ins->sreg1, ins->dreg);
2821                                 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2822 #endif
2823                         }
2824                         break;
2825                 case OP_OUTARG:
2826                         g_assert_not_reached ();
2827                         break;
2828                 case OP_LOCALLOC: {
2829                         guint32 size_reg;
2830
2831 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2832                         /* Perform stack touching */
2833                         NOT_IMPLEMENTED;
2834 #endif
2835
2836                         /* Keep alignment */
2837                         sparc_add_imm (code, FALSE, ins->sreg1, MONO_ARCH_LOCALLOC_ALIGNMENT - 1, ins->dreg);
2838                         sparc_set (code, ~(MONO_ARCH_LOCALLOC_ALIGNMENT - 1), sparc_o7);
2839                         sparc_and (code, FALSE, ins->dreg, sparc_o7, ins->dreg);
2840
2841                         if ((ins->flags & MONO_INST_INIT) && (ins->sreg1 == ins->dreg)) {
2842 #ifdef SPARCV9
2843                                 size_reg = sparc_g4;
2844 #else
2845                                 size_reg = sparc_g1;
2846 #endif
2847                                 sparc_mov_reg_reg (code, ins->dreg, size_reg);
2848                         }
2849                         else
2850                                 size_reg = ins->sreg1;
2851
2852                         sparc_sub (code, FALSE, sparc_sp, ins->dreg, ins->dreg);
2853                         /* Keep %sp valid at all times */
2854                         sparc_mov_reg_reg (code, ins->dreg, sparc_sp);
2855                         g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
2856                         sparc_add_imm (code, FALSE, ins->dreg, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
2857
2858                         if (ins->flags & MONO_INST_INIT) {
2859                                 guint32 *br [3];
2860                                 /* Initialize memory region */
2861                                 sparc_cmp_imm (code, size_reg, 0);
2862                                 br [0] = code;
2863                                 sparc_branch (code, 0, sparc_be, 0);
2864                                 /* delay slot */
2865                                 sparc_set (code, 0, sparc_o7);
2866                                 sparc_sub_imm (code, 0, size_reg, sparcv9 ? 8 : 4, size_reg);
2867                                 /* start of loop */
2868                                 br [1] = code;
2869                                 if (sparcv9)
2870                                         sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
2871                                 else
2872                                         sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
2873                                 sparc_cmp (code, sparc_o7, size_reg);
2874                                 br [2] = code;
2875                                 sparc_branch (code, 0, sparc_bl, 0);
2876                                 sparc_patch (br [2], br [1]);
2877                                 /* delay slot */
2878                                 sparc_add_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2879                                 sparc_patch (br [0], code);
2880                         }
2881                         break;
2882                 }
2883                 case OP_SPARC_LOCALLOC_IMM: {
2884                         gint32 offset = ins->inst_c0;
2885
2886 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2887                         /* Perform stack touching */
2888                         NOT_IMPLEMENTED;
2889 #endif
2890
2891                         offset = ALIGN_TO (offset, MONO_ARCH_LOCALLOC_ALIGNMENT);
2892                         if (sparc_is_imm13 (offset))
2893                                 sparc_sub_imm (code, FALSE, sparc_sp, offset, sparc_sp);
2894                         else {
2895                                 sparc_set (code, offset, sparc_o7);
2896                                 sparc_sub (code, FALSE, sparc_sp, sparc_o7, sparc_sp);
2897                         }
2898                         g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
2899                         sparc_add_imm (code, FALSE, sparc_sp, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
2900                         if ((ins->flags & MONO_INST_INIT) && (offset > 0)) {
2901                                 guint32 *br [2];
2902                                 int i;
2903
2904                                 if (offset <= 16) {
2905                                         i = 0;
2906                                         while (i < offset) {
2907                                                 if (sparcv9) {
2908                                                         sparc_stx_imm (code, sparc_g0, ins->dreg, i);
2909                                                         i += 8;
2910                                                 }
2911                                                 else {
2912                                                         sparc_st_imm (code, sparc_g0, ins->dreg, i);
2913                                                         i += 4;
2914                                                 }
2915                                         }
2916                                 }
2917                                 else {
2918                                         sparc_set (code, offset, sparc_o7);
2919                                         sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2920                                         /* beginning of loop */
2921                                         br [0] = code;
2922                                         if (sparcv9)
2923                                                 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
2924                                         else
2925                                                 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
2926                                         sparc_cmp_imm (code, sparc_o7, 0);
2927                                         br [1] = code;
2928                                         sparc_branch (code, 0, sparc_bne, 0);
2929                                         /* delay slot */
2930                                         sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2931                                         sparc_patch (br [1], br [0]);
2932                                 }
2933                         }
2934                         break;
2935                 }
2936                 case CEE_RET:
2937                         /* The return is done in the epilog */
2938                         g_assert_not_reached ();
2939                         break;
2940                 case OP_THROW:
2941                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2942                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2943                                              (gpointer)"mono_arch_throw_exception");
2944                         EMIT_CALL ();
2945                         break;
2946                 case OP_RETHROW:
2947                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2948                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2949                                              (gpointer)"mono_arch_rethrow_exception");
2950                         EMIT_CALL ();
2951                         break;
2952                 case OP_START_HANDLER: {
2953                         /*
2954                          * The START_HANDLER instruction marks the beginning of a handler
2955                          * block. It is called using a call instruction, so %o7 contains
2956                          * the return address. Since the handler executes in the same stack
2957              * frame as the method itself, we can't use save/restore to save
2958                          * the return address. Instead, we save it into a dedicated
2959                          * variable.
2960                          */
2961                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2962                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2963                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
2964                                 sparc_sti (code, sparc_o7, spvar->inst_basereg, GP_SCRATCH_REG);
2965                         }
2966                         else
2967                                 sparc_sti_imm (code, sparc_o7, spvar->inst_basereg, spvar->inst_offset);
2968                         break;
2969                 }
2970                 case OP_ENDFILTER: {
2971                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2972                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2973                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
2974                                 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
2975                         }
2976                         else
2977                                 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
2978                         sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
2979                         /* Delay slot */
2980                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2981                         break;
2982                 }
2983                 case OP_ENDFINALLY: {
2984                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2985                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2986                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
2987                                 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
2988                         }
2989                         else
2990                                 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
2991                         sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
2992                         sparc_nop (code);
2993                         break;
2994                 }
2995                 case OP_CALL_HANDLER:
2996                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2997                         /* This is a jump inside the method, so call_simple works even on V9 */
2998                         sparc_call_simple (code, 0);
2999                         sparc_nop (code);
3000                         break;
3001                 case OP_LABEL:
3002                         ins->inst_c0 = (guint8*)code - cfg->native_code;
3003                         break;
3004                 case OP_BR:
3005                         //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
3006                         if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
3007                                 break;
3008                         if (ins->flags & MONO_INST_BRLABEL) {
3009                                 if (ins->inst_i0->inst_c0) {
3010                                         gint32 disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2;
3011                                         g_assert (sparc_is_imm22 (disp));
3012                                         sparc_branch (code, 1, sparc_ba, disp);
3013                                 } else {
3014                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
3015                                         sparc_branch (code, 1, sparc_ba, 0);
3016                                 }
3017                         } else {
3018                                 if (ins->inst_target_bb->native_offset) {
3019                                         gint32 disp = (ins->inst_target_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2;
3020                                         g_assert (sparc_is_imm22 (disp));
3021                                         sparc_branch (code, 1, sparc_ba, disp);
3022                                 } else {
3023                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3024                                         sparc_branch (code, 1, sparc_ba, 0);
3025                                 }
3026                         }
3027                         sparc_nop (code);
3028                         break;
3029                 case OP_BR_REG:
3030                         sparc_jmp (code, ins->sreg1, sparc_g0);
3031                         sparc_nop (code);
3032                         break;
3033                 case OP_CEQ:
3034                 case OP_CLT:
3035                 case OP_CLT_UN:
3036                 case OP_CGT:
3037                 case OP_CGT_UN:
3038                         if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3039                                 sparc_clr_reg (code, ins->dreg);
3040                                 sparc_movcc_imm (code, sparc_xcc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3041                         }
3042                         else {
3043                                 sparc_clr_reg (code, ins->dreg);
3044 #ifdef SPARCV9
3045                                 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), DEFAULT_ICC, 0, 2);
3046 #else
3047                                 sparc_branch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3048 #endif
3049                                 /* delay slot */
3050                                 sparc_set (code, 1, ins->dreg);
3051                         }
3052                         break;
3053                 case OP_ICEQ:
3054                 case OP_ICLT:
3055                 case OP_ICLT_UN:
3056                 case OP_ICGT:
3057                 case OP_ICGT_UN:
3058                     if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3059                                 sparc_clr_reg (code, ins->dreg);
3060                                 sparc_movcc_imm (code, sparc_icc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3061                     }
3062                     else {
3063                         sparc_clr_reg (code, ins->dreg);
3064                         sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), sparc_icc_short, 0, 2);
3065                         /* delay slot */
3066                         sparc_set (code, 1, ins->dreg);
3067                     }
3068                     break;
3069                 case OP_COND_EXC_EQ:
3070                 case OP_COND_EXC_NE_UN:
3071                 case OP_COND_EXC_LT:
3072                 case OP_COND_EXC_LT_UN:
3073                 case OP_COND_EXC_GT:
3074                 case OP_COND_EXC_GT_UN:
3075                 case OP_COND_EXC_GE:
3076                 case OP_COND_EXC_GE_UN:
3077                 case OP_COND_EXC_LE:
3078                 case OP_COND_EXC_LE_UN:
3079                 case OP_COND_EXC_OV:
3080                 case OP_COND_EXC_NO:
3081                 case OP_COND_EXC_C:
3082                 case OP_COND_EXC_NC:
3083                         EMIT_COND_SYSTEM_EXCEPTION (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1);
3084                         break;
3085                 case OP_SPARC_COND_EXC_EQZ:
3086                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brz, ins->inst_p1);
3087                         break;
3088                 case OP_SPARC_COND_EXC_GEZ:
3089                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgez, ins->inst_p1);
3090                         break;
3091                 case OP_SPARC_COND_EXC_GTZ:
3092                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgz, ins->inst_p1);
3093                         break;
3094                 case OP_SPARC_COND_EXC_LEZ:
3095                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlez, ins->inst_p1);
3096                         break;
3097                 case OP_SPARC_COND_EXC_LTZ:
3098                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlz, ins->inst_p1);
3099                         break;
3100                 case OP_SPARC_COND_EXC_NEZ:
3101                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brnz, ins->inst_p1);
3102                         break;
3103                 case OP_COND_EXC_IOV:
3104                 case OP_COND_EXC_IC:
3105                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1, TRUE, sparc_icc_short);
3106                         break;
3107                 case CEE_BEQ:
3108                 case CEE_BNE_UN:
3109                 case CEE_BLT:
3110                 case CEE_BLT_UN:
3111                 case CEE_BGT:
3112                 case CEE_BGT_UN:
3113                 case CEE_BGE:
3114                 case CEE_BGE_UN:
3115                 case CEE_BLE:
3116                 case CEE_BLE_UN: {
3117                         if (sparcv9)
3118                                 EMIT_COND_BRANCH_PREDICTED (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3119                         else
3120                                 EMIT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3121                         break;
3122                 }
3123
3124                 case OP_IBEQ:
3125                 case OP_IBNE_UN:
3126                 case OP_IBLT:
3127                 case OP_IBLT_UN:
3128                 case OP_IBGT:
3129                 case OP_IBGT_UN:
3130                 case OP_IBGE:
3131                 case OP_IBGE_UN:
3132                 case OP_IBLE:
3133                 case OP_IBLE_UN: {
3134                         /* Only used on V9 */
3135                         EMIT_COND_BRANCH_ICC (ins, opcode_to_sparc_cond (ins->opcode), 1, 1, sparc_icc_short);
3136                         break;
3137                 }
3138
3139                 case OP_SPARC_BRZ:
3140                         EMIT_COND_BRANCH_BPR (ins, brz, 1, 1, 1);
3141                         break;
3142                 case OP_SPARC_BRLEZ:
3143                         EMIT_COND_BRANCH_BPR (ins, brlez, 1, 1, 1);
3144                         break;
3145                 case OP_SPARC_BRLZ:
3146                         EMIT_COND_BRANCH_BPR (ins, brlz, 1, 1, 1);
3147                         break;
3148                 case OP_SPARC_BRNZ:
3149                         EMIT_COND_BRANCH_BPR (ins, brnz, 1, 1, 1);
3150                         break;
3151                 case OP_SPARC_BRGZ:
3152                         EMIT_COND_BRANCH_BPR (ins, brgz, 1, 1, 1);
3153                         break;
3154                 case OP_SPARC_BRGEZ:
3155                         EMIT_COND_BRANCH_BPR (ins, brgez, 1, 1, 1);
3156                         break;
3157
3158                 /* floating point opcodes */
3159                 case OP_R8CONST:
3160                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
3161 #ifdef SPARCV9
3162                         sparc_set_template (code, sparc_o7);
3163 #else
3164                         sparc_sethi (code, 0, sparc_o7);
3165 #endif
3166                         sparc_lddf_imm (code, sparc_o7, 0, ins->dreg);
3167                         break;
3168                 case OP_R4CONST:
3169                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
3170 #ifdef SPARCV9
3171                         sparc_set_template (code, sparc_o7);
3172 #else
3173                         sparc_sethi (code, 0, sparc_o7);
3174 #endif
3175                         sparc_ldf_imm (code, sparc_o7, 0, FP_SCRATCH_REG);
3176
3177                         /* Extend to double */
3178                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3179                         break;
3180                 case OP_STORER8_MEMBASE_REG:
3181                         if (!sparc_is_imm13 (ins->inst_offset + 4)) {
3182                                 sparc_set (code, ins->inst_offset, sparc_o7);
3183                                 /* SPARCV9 handles misaligned fp loads/stores */
3184                                 if (!v64 && (ins->inst_offset % 8)) {
3185                                         /* Misaligned */
3186                                         sparc_add (code, FALSE, ins->inst_destbasereg, sparc_o7, sparc_o7);
3187                                         sparc_stf (code, ins->sreg1, sparc_o7, sparc_g0);
3188                                         sparc_stf_imm (code, ins->sreg1 + 1, sparc_o7, 4);
3189                                 } else
3190                                         sparc_stdf (code, ins->sreg1, ins->inst_destbasereg, sparc_o7);
3191                         }
3192                         else {
3193                                 if (!v64 && (ins->inst_offset % 8)) {
3194                                         /* Misaligned */
3195                                         sparc_stf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3196                                         sparc_stf_imm (code, ins->sreg1 + 1, ins->inst_destbasereg, ins->inst_offset + 4);
3197                                 } else
3198                                         sparc_stdf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3199                         }
3200                         break;
3201                 case OP_LOADR8_MEMBASE:
3202                         EMIT_LOAD_MEMBASE (ins, lddf);
3203                         break;
3204                 case OP_STORER4_MEMBASE_REG:
3205                         /* This requires a double->single conversion */
3206                         sparc_fdtos (code, ins->sreg1, FP_SCRATCH_REG);
3207                         if (!sparc_is_imm13 (ins->inst_offset)) {
3208                                 sparc_set (code, ins->inst_offset, sparc_o7);
3209                                 sparc_stf (code, FP_SCRATCH_REG, ins->inst_destbasereg, sparc_o7);
3210                         }
3211                         else
3212                                 sparc_stf_imm (code, FP_SCRATCH_REG, ins->inst_destbasereg, ins->inst_offset);
3213                         break;
3214                 case OP_LOADR4_MEMBASE: {
3215                         /* ldf needs a single precision register */
3216                         int dreg = ins->dreg;
3217                         ins->dreg = FP_SCRATCH_REG;
3218                         EMIT_LOAD_MEMBASE (ins, ldf);
3219                         ins->dreg = dreg;
3220                         /* Extend to double */
3221                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3222                         break;
3223                 }
3224                 case OP_FMOVE:
3225 #ifdef SPARCV9
3226                         sparc_fmovd (code, ins->sreg1, ins->dreg);
3227 #else
3228                         sparc_fmovs (code, ins->sreg1, ins->dreg);
3229                         sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3230 #endif
3231                         break;
3232                 case CEE_CONV_R4: {
3233                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3234 #ifdef SPARCV9
3235                         if (!sparc_is_imm13 (offset)) {
3236                                 sparc_set (code, offset, sparc_o7);
3237                                 sparc_stx (code, ins->sreg1, sparc_sp, offset);
3238                                 sparc_lddf (code, sparc_sp, offset, FP_SCRATCH_REG);
3239                         } else {
3240                                 sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3241                                 sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3242                         }
3243                         sparc_fxtos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3244 #else
3245                         if (!sparc_is_imm13 (offset)) {
3246                                 sparc_set (code, offset, sparc_o7);
3247                                 sparc_st (code, ins->sreg1, sparc_sp, sparc_o7);
3248                                 sparc_ldf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3249                         } else {
3250                                 sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3251                                 sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3252                         }
3253                         sparc_fitos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3254 #endif
3255                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3256                         break;
3257                 }
3258                 case CEE_CONV_R8: {
3259                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3260 #ifdef SPARCV9
3261                         if (!sparc_is_imm13 (offset)) {
3262                                 sparc_set (code, offset, sparc_o7);
3263                                 sparc_stx (code, ins->sreg1, sparc_sp, sparc_o7);
3264                                 sparc_lddf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3265                         } else {
3266                                 sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3267                                 sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3268                         }
3269                         sparc_fxtod (code, FP_SCRATCH_REG, ins->dreg);
3270 #else
3271                         if (!sparc_is_imm13 (offset)) {
3272                                 sparc_set (code, offset, sparc_o7);
3273                                 sparc_st (code, ins->sreg1, sparc_sp, sparc_o7);
3274                                 sparc_ldf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3275                         } else {
3276                                 sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3277                                 sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3278                         }
3279                         sparc_fitod (code, FP_SCRATCH_REG, ins->dreg);
3280 #endif
3281                         break;
3282                 }
3283                 case OP_FCONV_TO_I1:
3284                 case OP_FCONV_TO_U1:
3285                 case OP_FCONV_TO_I2:
3286                 case OP_FCONV_TO_U2:
3287 #ifndef SPARCV9
3288                 case OP_FCONV_TO_I:
3289                 case OP_FCONV_TO_U:
3290 #endif
3291                 case OP_FCONV_TO_I4:
3292                 case OP_FCONV_TO_U4: {
3293                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3294                         sparc_fdtoi (code, ins->sreg1, FP_SCRATCH_REG);
3295                         if (!sparc_is_imm13 (offset)) {
3296                                 sparc_set (code, offset, sparc_o7);
3297                                 sparc_stdf (code, FP_SCRATCH_REG, sparc_sp, sparc_o7);
3298                                 sparc_ld (code, sparc_sp, sparc_o7, ins->dreg);
3299                         } else {
3300                                 sparc_stdf_imm (code, FP_SCRATCH_REG, sparc_sp, offset);
3301                                 sparc_ld_imm (code, sparc_sp, offset, ins->dreg);
3302                         }
3303
3304                         switch (ins->opcode) {
3305                         case OP_FCONV_TO_I1:
3306                         case OP_FCONV_TO_U1:
3307                                 sparc_and_imm (code, 0, ins->dreg, 0xff, ins->dreg);
3308                                 break;
3309                         case OP_FCONV_TO_I2:
3310                         case OP_FCONV_TO_U2:
3311                                 sparc_set (code, 0xffff, sparc_o7);
3312                                 sparc_and (code, 0, ins->dreg, sparc_o7, ins->dreg);
3313                                 break;
3314                         default:
3315                                 break;
3316                         }
3317                         break;
3318                 }
3319                 case OP_FCONV_TO_I8:
3320                 case OP_FCONV_TO_U8:
3321                         /* Emulated */
3322                         g_assert_not_reached ();
3323                         break;
3324                 case CEE_CONV_R_UN:
3325                         /* Emulated */
3326                         g_assert_not_reached ();
3327                         break;
3328                 case OP_LCONV_TO_R_UN: {
3329                         /* Emulated */
3330                         g_assert_not_reached ();
3331                         break;
3332                 }
3333                 case OP_LCONV_TO_OVF_I: {
3334                         guint32 *br [3], *label [1];
3335
3336                         /*
3337                          * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3338                          */
3339                         sparc_cmp_imm (code, ins->sreg1, 0);
3340                         br [0] = code;
3341                         sparc_branch (code, 1, sparc_bneg, 0);
3342                         sparc_nop (code);
3343
3344                         /* positive */
3345                         /* ms word must be 0 */
3346                         sparc_cmp_imm (code, ins->sreg2, 0);
3347                         br [1] = code;
3348                         sparc_branch (code, 1, sparc_be, 0);
3349                         sparc_nop (code);
3350
3351                         label [0] = code;
3352
3353                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_ba, "OverflowException");
3354
3355                         /* negative */
3356                         sparc_patch (br [0], code);
3357
3358                         /* ms word must 0xfffffff */
3359                         sparc_cmp_imm (code, ins->sreg2, -1);
3360                         br [2] = code;
3361                         sparc_branch (code, 1, sparc_bne, 0);
3362                         sparc_nop (code);
3363                         sparc_patch (br [2], label [0]);
3364
3365                         /* Ok */
3366                         sparc_patch (br [1], code);
3367                         if (ins->sreg1 != ins->dreg)
3368                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
3369                         break;
3370                 }
3371                 case OP_FADD:
3372                         sparc_faddd (code, ins->sreg1, ins->sreg2, ins->dreg);
3373                         break;
3374                 case OP_FSUB:
3375                         sparc_fsubd (code, ins->sreg1, ins->sreg2, ins->dreg);
3376                         break;
3377                 case OP_FMUL:
3378                         sparc_fmuld (code, ins->sreg1, ins->sreg2, ins->dreg);
3379                         break;
3380                 case OP_FDIV:
3381                         sparc_fdivd (code, ins->sreg1, ins->sreg2, ins->dreg);
3382                         break;
3383                 case OP_FNEG:
3384 #ifdef SPARCV9
3385                         sparc_fnegd (code, ins->sreg1, ins->dreg);
3386 #else
3387                         /* FIXME: why don't use fnegd ? */
3388                         sparc_fnegs (code, ins->sreg1, ins->dreg);
3389 #endif
3390                         break;
3391                 case OP_FREM:
3392                         sparc_fdivd (code, ins->sreg1, ins->sreg2, FP_SCRATCH_REG);
3393                         sparc_fmuld (code, ins->sreg2, FP_SCRATCH_REG, FP_SCRATCH_REG);
3394                         sparc_fsubd (code, ins->sreg1, FP_SCRATCH_REG, ins->dreg);
3395                         break;
3396                 case OP_FCOMPARE:
3397                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3398                         break;
3399                 case OP_FCEQ:
3400                 case OP_FCLT:
3401                 case OP_FCLT_UN:
3402                 case OP_FCGT:
3403                 case OP_FCGT_UN:
3404                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3405                         sparc_clr_reg (code, ins->dreg);
3406                         switch (ins->opcode) {
3407                         case OP_FCLT_UN:
3408                         case OP_FCGT_UN:
3409                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 4);
3410                                 /* delay slot */
3411                                 sparc_set (code, 1, ins->dreg);
3412                                 sparc_fbranch (code, 1, sparc_fbu, 2);
3413                                 /* delay slot */
3414                                 sparc_set (code, 1, ins->dreg);
3415                                 break;
3416                         default:
3417                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3418                                 /* delay slot */
3419                                 sparc_set (code, 1, ins->dreg);
3420                         }
3421                         break;
3422                 case OP_FBEQ:
3423                 case OP_FBLT:
3424                 case OP_FBGT:
3425                         EMIT_FLOAT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3426                         break;
3427                 case OP_FBGE: {
3428                         /* clt.un + brfalse */
3429                         guint32 *p = code;
3430                         sparc_fbranch (code, 1, sparc_fbul, 0);
3431                         /* delay slot */
3432                         sparc_nop (code);
3433                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3434                         sparc_patch (p, (guint8*)code);
3435                         break;
3436                 }
3437                 case OP_FBLE: {
3438                         /* cgt.un + brfalse */
3439                         guint32 *p = code;
3440                         sparc_fbranch (code, 1, sparc_fbug, 0);
3441                         /* delay slot */
3442                         sparc_nop (code);
3443                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3444                         sparc_patch (p, (guint8*)code);
3445                         break;
3446                 }
3447                 case OP_FBNE_UN:
3448                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbne, 1, 1);
3449                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3450                         break;
3451                 case OP_FBLT_UN:
3452                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbl, 1, 1);
3453                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3454                         break;
3455                 case OP_FBGT_UN:
3456                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbg, 1, 1);
3457                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3458                         break;
3459                 case OP_FBGE_UN:
3460                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbge, 1, 1);
3461                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3462                         break;
3463                 case OP_FBLE_UN:
3464                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fble, 1, 1);
3465                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3466                         break;
3467                 case OP_CKFINITE: {
3468                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3469                         if (!sparc_is_imm13 (offset)) {
3470                                 sparc_set (code, offset, sparc_o7);
3471                                 sparc_stdf (code, ins->sreg1, sparc_sp, sparc_o7);
3472                                 sparc_lduh (code, sparc_sp, sparc_o7, sparc_o7);
3473                         } else {
3474                                 sparc_stdf_imm (code, ins->sreg1, sparc_sp, offset);
3475                                 sparc_lduh_imm (code, sparc_sp, offset, sparc_o7);
3476                         }
3477                         sparc_srl_imm (code, sparc_o7, 4, sparc_o7);
3478                         sparc_and_imm (code, FALSE, sparc_o7, 2047, sparc_o7);
3479                         sparc_cmp_imm (code, sparc_o7, 2047);
3480                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_be, "ArithmeticException");
3481 #ifdef SPARCV9
3482                         sparc_fmovd (code, ins->sreg1, ins->dreg);
3483 #else
3484                         sparc_fmovs (code, ins->sreg1, ins->dreg);
3485                         sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3486 #endif
3487                         break;
3488                 }
3489
3490                 case OP_MEMORY_BARRIER:
3491                         sparc_membar (code, sparc_membar_all);
3492                         break;
3493
3494                 default:
3495 #ifdef __GNUC__
3496                         g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
3497 #else
3498                         g_warning ("%s:%d: unknown opcode %s\n", __FILE__, __LINE__, mono_inst_name (ins->opcode));
3499 #endif
3500                         g_assert_not_reached ();
3501                 }
3502
3503                 if ((((guint8*)code) - code_start) > max_len) {
3504                         g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3505                                    mono_inst_name (ins->opcode), max_len, ((guint8*)code) - code_start);
3506                         g_assert_not_reached ();
3507                 }
3508
3509                 cpos += max_len;
3510
3511                 last_ins = ins;
3512
3513                 ins = ins->next;
3514         }
3515
3516         cfg->code_len = (guint8*)code - cfg->native_code;
3517 }
3518
3519 void
3520 mono_arch_register_lowlevel_calls (void)
3521 {
3522         mono_register_jit_icall (mono_arch_break, "mono_arch_break", NULL, TRUE);
3523         mono_register_jit_icall (mono_arch_get_lmf_addr, "mono_arch_get_lmf_addr", NULL, TRUE);
3524 }
3525
3526 void
3527 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3528 {
3529         MonoJumpInfo *patch_info;
3530
3531         /* FIXME: Move part of this to arch independent code */
3532         for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3533                 unsigned char *ip = patch_info->ip.i + code;
3534                 gpointer target;
3535
3536                 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3537
3538                 switch (patch_info->type) {
3539                 case MONO_PATCH_INFO_NONE:
3540                         continue;
3541                 case MONO_PATCH_INFO_CLASS_INIT: {
3542                         guint32 *ip2 = (guint32*)ip;
3543                         /* Might already been changed to a nop */
3544 #ifdef SPARCV9
3545                         sparc_set_template (ip2, sparc_o7);
3546                         sparc_jmpl (ip2, sparc_o7, sparc_g0, sparc_o7);
3547 #else
3548                         sparc_call_simple (ip2, 0);
3549 #endif
3550                         break;
3551                 }
3552                 case MONO_PATCH_INFO_METHOD_JUMP: {
3553                         guint32 *ip2 = (guint32*)ip;
3554                         /* Might already been patched */
3555                         sparc_set_template (ip2, sparc_o7);
3556                         break;
3557                 }
3558                 default:
3559                         break;
3560                 }
3561                 sparc_patch ((guint32*)ip, target);
3562         }
3563 }
3564
3565 void*
3566 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3567 {
3568         int i;
3569         guint32 *code = (guint32*)p;
3570         MonoMethodSignature *sig = mono_method_signature (cfg->method);
3571         CallInfo *cinfo;
3572
3573         /* Save registers to stack */
3574         for (i = 0; i < 6; ++i)
3575                 sparc_sti_imm (code, sparc_i0 + i, sparc_fp, ARGS_OFFSET + (i * sizeof (gpointer)));
3576
3577         cinfo = get_call_info (sig, FALSE);
3578
3579         /* Save float regs on V9, since they are caller saved */
3580         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3581                 ArgInfo *ainfo = cinfo->args + i;
3582                 gint32 stack_offset;
3583
3584                 stack_offset = ainfo->offset + ARGS_OFFSET;
3585
3586                 if (ainfo->storage == ArgInFloatReg) {
3587                         if (!sparc_is_imm13 (stack_offset))
3588                                 NOT_IMPLEMENTED;
3589                         sparc_stf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3590                 }
3591                 else if (ainfo->storage == ArgInDoubleReg) {
3592                         /* The offset is guaranteed to be aligned by the ABI rules */
3593                         sparc_stdf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3594                 }
3595         }
3596
3597         sparc_set (code, cfg->method, sparc_o0);
3598         sparc_add_imm (code, FALSE, sparc_fp, MONO_SPARC_STACK_BIAS, sparc_o1);
3599
3600         mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
3601         EMIT_CALL ();
3602
3603         /* Restore float regs on V9 */
3604         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3605                 ArgInfo *ainfo = cinfo->args + i;
3606                 gint32 stack_offset;
3607
3608                 stack_offset = ainfo->offset + ARGS_OFFSET;
3609
3610                 if (ainfo->storage == ArgInFloatReg) {
3611                         if (!sparc_is_imm13 (stack_offset))
3612                                 NOT_IMPLEMENTED;
3613                         sparc_ldf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3614                 }
3615                 else if (ainfo->storage == ArgInDoubleReg) {
3616                         /* The offset is guaranteed to be aligned by the ABI rules */
3617                         sparc_lddf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3618                 }
3619         }
3620
3621         g_free (cinfo);
3622
3623         return code;
3624 }
3625
3626 enum {
3627         SAVE_NONE,
3628         SAVE_STRUCT,
3629         SAVE_ONE,
3630         SAVE_TWO,
3631         SAVE_FP
3632 };
3633
3634 void*
3635 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3636 {
3637         guint32 *code = (guint32*)p;
3638         int save_mode = SAVE_NONE;
3639         MonoMethod *method = cfg->method;
3640
3641         switch (mono_type_get_underlying_type (mono_method_signature (method)->ret)->type) {
3642         case MONO_TYPE_VOID:
3643                 /* special case string .ctor icall */
3644                 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
3645                         save_mode = SAVE_ONE;
3646                 else
3647                         save_mode = SAVE_NONE;
3648                 break;
3649         case MONO_TYPE_I8:
3650         case MONO_TYPE_U8:
3651 #ifdef SPARCV9
3652                 save_mode = SAVE_ONE;
3653 #else
3654                 save_mode = SAVE_TWO;
3655 #endif
3656                 break;
3657         case MONO_TYPE_R4:
3658         case MONO_TYPE_R8:
3659                 save_mode = SAVE_FP;
3660                 break;
3661         case MONO_TYPE_VALUETYPE:
3662                 save_mode = SAVE_STRUCT;
3663                 break;
3664         default:
3665                 save_mode = SAVE_ONE;
3666                 break;
3667         }
3668
3669         /* Save the result to the stack and also put it into the output registers */
3670
3671         switch (save_mode) {
3672         case SAVE_TWO:
3673                 /* V8 only */
3674                 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
3675                 sparc_st_imm (code, sparc_i0, sparc_fp, 72);
3676                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3677                 sparc_mov_reg_reg (code, sparc_i1, sparc_o2);
3678                 break;
3679         case SAVE_ONE:
3680                 sparc_sti_imm (code, sparc_i0, sparc_fp, ARGS_OFFSET);
3681                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3682                 break;
3683         case SAVE_FP:
3684 #ifdef SPARCV9
3685                 sparc_stdf_imm (code, sparc_f0, sparc_fp, ARGS_OFFSET);
3686 #else
3687                 sparc_stdf_imm (code, sparc_f0, sparc_fp, 72);
3688                 sparc_ld_imm (code, sparc_fp, 72, sparc_o1);
3689                 sparc_ld_imm (code, sparc_fp, 72 + 4, sparc_o2);
3690 #endif
3691                 break;
3692         case SAVE_STRUCT:
3693 #ifdef SPARCV9
3694                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3695 #else
3696                 sparc_ld_imm (code, sparc_fp, 64, sparc_o1);
3697 #endif
3698                 break;
3699         case SAVE_NONE:
3700         default:
3701                 break;
3702         }
3703
3704         sparc_set (code, cfg->method, sparc_o0);
3705
3706         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, func);
3707         EMIT_CALL ();
3708
3709         /* Restore result */
3710
3711         switch (save_mode) {
3712         case SAVE_TWO:
3713                 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
3714                 sparc_ld_imm (code, sparc_fp, 72, sparc_i0);
3715                 break;
3716         case SAVE_ONE:
3717                 sparc_ldi_imm (code, sparc_fp, ARGS_OFFSET, sparc_i0);
3718                 break;
3719         case SAVE_FP:
3720                 sparc_lddf_imm (code, sparc_fp, ARGS_OFFSET, sparc_f0);
3721                 break;
3722         case SAVE_NONE:
3723         default:
3724                 break;
3725         }
3726
3727         return code;
3728 }
3729
3730 guint8 *
3731 mono_arch_emit_prolog (MonoCompile *cfg)
3732 {
3733         MonoMethod *method = cfg->method;
3734         MonoMethodSignature *sig;
3735         MonoInst *inst;
3736         guint32 *code;
3737         CallInfo *cinfo;
3738         guint32 i, offset;
3739
3740         cfg->code_size = 256;
3741         cfg->native_code = g_malloc (cfg->code_size);
3742         code = (guint32*)cfg->native_code;
3743
3744         /* FIXME: Generate intermediate code instead */
3745
3746         offset = cfg->stack_offset;
3747         offset += (16 * sizeof (gpointer)); /* register save area */
3748 #ifndef SPARCV9
3749         offset += 4; /* struct/union return pointer */
3750 #endif
3751
3752         /* add parameter area size for called functions */
3753         if (cfg->param_area < (6 * sizeof (gpointer)))
3754                 /* Reserve space for the first 6 arguments even if it is unused */
3755                 offset += 6 * sizeof (gpointer);
3756         else
3757                 offset += cfg->param_area;
3758
3759         /* align the stack size */
3760         offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3761
3762         /*
3763          * localloc'd memory is stored between the local variables (whose
3764          * size is given by cfg->stack_offset), and between the space reserved
3765          * by the ABI.
3766          */
3767         cfg->arch.localloc_offset = offset - cfg->stack_offset;
3768
3769         cfg->stack_offset = offset;
3770
3771 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3772                         /* Perform stack touching */
3773                         NOT_IMPLEMENTED;
3774 #endif
3775
3776         if (!sparc_is_imm13 (- cfg->stack_offset)) {
3777                 /* Can't use sparc_o7 here, since we're still in the caller's frame */
3778                 sparc_set (code, (- cfg->stack_offset), GP_SCRATCH_REG);
3779                 sparc_save (code, sparc_sp, GP_SCRATCH_REG, sparc_sp);
3780         }
3781         else
3782                 sparc_save_imm (code, sparc_sp, - cfg->stack_offset, sparc_sp);
3783
3784 /*
3785         if (strstr (cfg->method->name, "foo")) {
3786                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
3787                 sparc_call_simple (code, 0);
3788                 sparc_nop (code);
3789         }
3790 */
3791
3792         sig = mono_method_signature (method);
3793
3794         cinfo = get_call_info (sig, FALSE);
3795
3796         /* Keep in sync with emit_load_volatile_arguments */
3797         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3798                 ArgInfo *ainfo = cinfo->args + i;
3799                 gint32 stack_offset;
3800                 MonoType *arg_type;
3801                 inst = cfg->args [i];
3802
3803                 if (sig->hasthis && (i == 0))
3804                         arg_type = &mono_defaults.object_class->byval_arg;
3805                 else
3806                         arg_type = sig->params [i - sig->hasthis];
3807
3808                 stack_offset = ainfo->offset + ARGS_OFFSET;
3809
3810                 /* Save the split arguments so they will reside entirely on the stack */
3811                 if (ainfo->storage == ArgInSplitRegStack) {
3812                         /* Save the register to the stack */
3813                         g_assert (inst->opcode == OP_REGOFFSET);
3814                         if (!sparc_is_imm13 (stack_offset))
3815                                 NOT_IMPLEMENTED;
3816                         sparc_st_imm (code, sparc_i5, inst->inst_basereg, stack_offset);
3817                 }
3818
3819                 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
3820                         /* Save the argument to a dword aligned stack location */
3821                         /*
3822                          * stack_offset contains the offset of the argument on the stack.
3823                          * inst->inst_offset contains the dword aligned offset where the value
3824                          * should be stored.
3825                          */
3826                         if (ainfo->storage == ArgInIRegPair) {
3827                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3828                                         NOT_IMPLEMENTED;
3829                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3830                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3831                         }
3832                         else
3833                                 if (ainfo->storage == ArgInSplitRegStack) {
3834 #ifdef SPARCV9
3835                                         g_assert_not_reached ();
3836 #endif
3837                                         if (stack_offset != inst->inst_offset) {
3838                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3839                                                 sparc_st_imm (code, sparc_i5, inst->inst_basereg, inst->inst_offset);
3840                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3841                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3842                                         }
3843                                 }
3844                         else
3845                                 if (ainfo->storage == ArgOnStackPair) {
3846 #ifdef SPARCV9
3847                                         g_assert_not_reached ();
3848 #endif
3849                                         if (stack_offset != inst->inst_offset) {
3850                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3851                                                 sparc_ld_imm (code, sparc_fp, stack_offset, sparc_o7);
3852                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset);
3853                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3854                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3855                                         }
3856                                 }
3857                         else
3858                                 g_assert_not_reached ();
3859                 }
3860                 else
3861                         if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
3862                                 /* Argument in register, but need to be saved to stack */
3863                                 if (!sparc_is_imm13 (stack_offset))
3864                                         NOT_IMPLEMENTED;
3865                                 if ((stack_offset - ARGS_OFFSET) & 0x1)
3866                                         sparc_stb_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3867                                 else
3868                                         if ((stack_offset - ARGS_OFFSET) & 0x2)
3869                                                 sparc_sth_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3870                                 else
3871                                         if ((stack_offset - ARGS_OFFSET) & 0x4)
3872                                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3873                                         else {
3874                                                 if (v64)
3875                                                         sparc_stx_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3876                                                 else
3877                                                         sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3878                                         }
3879                         }
3880                 else
3881                         if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
3882 #ifdef SPARCV9
3883                                 NOT_IMPLEMENTED;
3884 #endif
3885                                 /* Argument in regpair, but need to be saved to stack */
3886                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3887                                         NOT_IMPLEMENTED;
3888                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3889                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3890                         }
3891                 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
3892                                 if (!sparc_is_imm13 (stack_offset))
3893                                         NOT_IMPLEMENTED;
3894                                 sparc_stf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
3895                                 }
3896                         else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
3897                                 /* The offset is guaranteed to be aligned by the ABI rules */
3898                                 sparc_stdf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
3899                         }
3900
3901                 if ((ainfo->storage == ArgInFloatReg) && (inst->opcode == OP_REGVAR)) {
3902                         /* Need to move into the a double precision register */
3903                         sparc_fstod (code, ainfo->reg, ainfo->reg - 1);
3904                 }
3905
3906                 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
3907                         if (inst->opcode == OP_REGVAR)
3908                                 /* FIXME: Load the argument into memory */
3909                                 NOT_IMPLEMENTED;
3910         }
3911
3912         g_free (cinfo);
3913
3914         if (cfg->method->save_lmf) {
3915                 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
3916
3917                 /* Save ip */
3918                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3919                 sparc_set_template (code, sparc_o7);
3920                 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ip));
3921                 /* Save sp */
3922                 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
3923                 /* Save fp */
3924                 sparc_sti_imm (code, sparc_fp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebp));
3925                 /* Save method */
3926                 /* FIXME: add a relocation for this */
3927                 sparc_set (code, cfg->method, sparc_o7);
3928                 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method));
3929
3930                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3931                                                          (gpointer)"mono_arch_get_lmf_addr");
3932                 EMIT_CALL ();
3933
3934                 code = (guint32*)mono_sparc_emit_save_lmf (code, lmf_offset);
3935         }
3936
3937         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3938                 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
3939
3940         cfg->code_len = (guint8*)code - cfg->native_code;
3941
3942         g_assert (cfg->code_len <= cfg->code_size);
3943
3944         return (guint8*)code;
3945 }
3946
3947 void
3948 mono_arch_emit_epilog (MonoCompile *cfg)
3949 {
3950         MonoMethod *method = cfg->method;
3951         guint32 *code;
3952         int can_fold = 0;
3953         int max_epilog_size = 16 + 20 * 4;
3954
3955         if (cfg->method->save_lmf)
3956                 max_epilog_size += 128;
3957
3958         if (mono_jit_trace_calls != NULL)
3959                 max_epilog_size += 50;
3960
3961         if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
3962                 max_epilog_size += 50;
3963
3964         while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
3965                 cfg->code_size *= 2;
3966                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
3967                 mono_jit_stats.code_reallocs++;
3968         }
3969
3970         code = (guint32*)(cfg->native_code + cfg->code_len);
3971
3972         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3973                 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
3974
3975         if (cfg->method->save_lmf) {
3976                 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
3977
3978                 code = mono_sparc_emit_restore_lmf (code, lmf_offset);
3979         }
3980
3981         /*
3982          * The V8 ABI requires that calls to functions which return a structure
3983          * return to %i7+12
3984          */
3985         if (!v64 && mono_method_signature (cfg->method)->pinvoke && MONO_TYPE_ISSTRUCT(mono_method_signature (cfg->method)->ret))
3986                 sparc_jmpl_imm (code, sparc_i7, 12, sparc_g0);
3987         else
3988                 sparc_ret (code);
3989
3990         /* Only fold last instruction into the restore if the exit block has an in count of 1
3991            and the previous block hasn't been optimized away since it may have an in count > 1 */
3992         if (cfg->bb_exit->in_count == 1 && cfg->bb_exit->in_bb[0]->native_offset != cfg->bb_exit->native_offset)
3993                 can_fold = 1;
3994
3995         /* Try folding last instruction into the restore */
3996         if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && sparc_inst_imm (code [-2]) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
3997                 /* or reg, imm, %i0 */
3998                 int reg = sparc_inst_rs1 (code [-2]);
3999                 int imm = sparc_inst_imm13 (code [-2]);
4000                 code [-2] = code [-1];
4001                 code --;
4002                 sparc_restore_imm (code, reg, imm, sparc_o0);
4003         }
4004         else
4005         if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && (!sparc_inst_imm (code [-2])) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4006                 /* or reg, reg, %i0 */
4007                 int reg1 = sparc_inst_rs1 (code [-2]);
4008                 int reg2 = sparc_inst_rs2 (code [-2]);
4009                 code [-2] = code [-1];
4010                 code --;
4011                 sparc_restore (code, reg1, reg2, sparc_o0);
4012         }
4013         else
4014                 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
4015
4016         cfg->code_len = (guint8*)code - cfg->native_code;
4017
4018         g_assert (cfg->code_len < cfg->code_size);
4019
4020 }
4021
4022 void
4023 mono_arch_emit_exceptions (MonoCompile *cfg)
4024 {
4025         MonoJumpInfo *patch_info;
4026         guint32 *code;
4027         int nthrows = 0, i;
4028         int exc_count = 0;
4029         guint32 code_size;
4030         MonoClass *exc_classes [16];
4031         guint8 *exc_throw_start [16], *exc_throw_end [16];
4032
4033         /* Compute needed space */
4034         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4035                 if (patch_info->type == MONO_PATCH_INFO_EXC)
4036                         exc_count++;
4037         }
4038
4039         /*
4040          * make sure we have enough space for exceptions
4041          */
4042 #ifdef SPARCV9
4043         code_size = exc_count * (20 * 4);
4044 #else
4045         code_size = exc_count * 24;
4046 #endif
4047
4048         while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4049                 cfg->code_size *= 2;
4050                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4051                 mono_jit_stats.code_reallocs++;
4052         }
4053
4054         code = (guint32*)(cfg->native_code + cfg->code_len);
4055
4056         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4057                 switch (patch_info->type) {
4058                 case MONO_PATCH_INFO_EXC: {
4059                         MonoClass *exc_class;
4060                         guint32 *buf, *buf2;
4061                         guint32 throw_ip, type_idx;
4062                         gint32 disp;
4063
4064                         sparc_patch ((guint32*)(cfg->native_code + patch_info->ip.i), code);
4065
4066                         exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4067                         type_idx = exc_class->type_token - MONO_TOKEN_TYPE_DEF;
4068                         g_assert (exc_class);
4069                         throw_ip = patch_info->ip.i;
4070
4071                         /* Find a throw sequence for the same exception class */
4072                         for (i = 0; i < nthrows; ++i)
4073                                 if (exc_classes [i] == exc_class)
4074                                         break;
4075
4076                         if (i < nthrows) {
4077                                 guint32 throw_offset = (((guint8*)exc_throw_end [i] - cfg->native_code) - throw_ip) >> 2;
4078                                 if (!sparc_is_imm13 (throw_offset))
4079                                         sparc_set32 (code, throw_offset, sparc_o1);
4080
4081                                 disp = (exc_throw_start [i] - (guint8*)code) >> 2;
4082                                 g_assert (sparc_is_imm22 (disp));
4083                                 sparc_branch (code, 0, sparc_ba, disp);
4084                                 if (sparc_is_imm13 (throw_offset))
4085                                         sparc_set32 (code, throw_offset, sparc_o1);
4086                                 else
4087                                         sparc_nop (code);
4088                                 patch_info->type = MONO_PATCH_INFO_NONE;
4089                         }
4090                         else {
4091                                 /* Emit the template for setting o1 */
4092                                 buf = code;
4093                                 if (sparc_is_imm13 (((((guint8*)code - cfg->native_code) - throw_ip) >> 2) - 8))
4094                                         /* Can use a short form */
4095                                         sparc_nop (code);
4096                                 else
4097                                         sparc_set_template (code, sparc_o1);
4098                                 buf2 = code;
4099
4100                                 if (nthrows < 16) {
4101                                         exc_classes [nthrows] = exc_class;
4102                                         exc_throw_start [nthrows] = (guint8*)code;
4103                                 }
4104
4105                                 /*
4106                                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
4107                                 EMIT_CALL();
4108                                 */
4109
4110                                 /* first arg = type token */
4111                                 /* Pass the type index to reduce the size of the sparc_set */
4112                                 if (!sparc_is_imm13 (type_idx))
4113                                         sparc_set32 (code, type_idx, sparc_o0);
4114
4115                                 /* second arg = offset between the throw ip and the current ip */
4116                                 /* On sparc, the saved ip points to the call instruction */
4117                                 disp = (((guint8*)code - cfg->native_code) - throw_ip) >> 2;
4118                                 sparc_set32 (buf, disp, sparc_o1);
4119                                 while (buf < buf2)
4120                                         sparc_nop (buf);
4121
4122                                 if (nthrows < 16) {
4123                                         exc_throw_end [nthrows] = (guint8*)code;
4124                                         nthrows ++;
4125                                 }
4126
4127                                 patch_info->data.name = "mono_arch_throw_corlib_exception";
4128                                 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4129                                 patch_info->ip.i = (guint8*)code - cfg->native_code;
4130
4131                                 EMIT_CALL ();
4132
4133                                 if (sparc_is_imm13 (type_idx)) {
4134                                         /* Put it into the delay slot */
4135                                         code --;
4136                                         buf = code;
4137                                         sparc_set32 (code, type_idx, sparc_o0);
4138                                         g_assert (code - buf == 1);
4139                                 }
4140                         }
4141                         break;
4142                 }
4143                 default:
4144                         /* do nothing */
4145                         break;
4146                 }
4147         }
4148
4149         cfg->code_len = (guint8*)code - cfg->native_code;
4150
4151         g_assert (cfg->code_len < cfg->code_size);
4152
4153 }
4154
4155 gboolean lmf_addr_key_inited = FALSE;
4156
4157 #ifdef MONO_SPARC_THR_TLS
4158 thread_key_t lmf_addr_key;
4159 #else
4160 pthread_key_t lmf_addr_key;
4161 #endif
4162
4163 gpointer
4164 mono_arch_get_lmf_addr (void)
4165 {
4166         /* This is perf critical so we bypass the IO layer */
4167         /* The thr_... functions seem to be somewhat faster */
4168 #ifdef MONO_SPARC_THR_TLS
4169         gpointer res;
4170         thr_getspecific (lmf_addr_key, &res);
4171         return res;
4172 #else
4173         return pthread_getspecific (lmf_addr_key);
4174 #endif
4175 }
4176
4177 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4178
4179 /*
4180  * There seems to be no way to determine stack boundaries under solaris,
4181  * so it's not possible to determine whenever a SIGSEGV is caused by stack
4182  * overflow or not.
4183  */
4184 #error "--with-sigaltstack=yes not supported on solaris"
4185
4186 #endif
4187
4188 void
4189 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
4190 {
4191         if (!lmf_addr_key_inited) {
4192                 int res;
4193
4194                 lmf_addr_key_inited = TRUE;
4195
4196 #ifdef MONO_SPARC_THR_TLS
4197                 res = thr_keycreate (&lmf_addr_key, NULL);
4198 #else
4199                 res = pthread_key_create (&lmf_addr_key, NULL);
4200 #endif
4201                 g_assert (res == 0);
4202
4203         }
4204
4205 #ifdef MONO_SPARC_THR_TLS
4206         thr_setspecific (lmf_addr_key, &tls->lmf);
4207 #else
4208         pthread_setspecific (lmf_addr_key, &tls->lmf);
4209 #endif
4210 }
4211
4212 void
4213 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4214 {
4215 }
4216
4217 void
4218 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *call, int this_reg, int this_type, int vt_reg)
4219 {
4220         int this_out_reg = sparc_o0;
4221
4222         if (vt_reg != -1) {
4223 #ifdef SPARCV9
4224                 MonoInst *ins;
4225                 MONO_INST_NEW (cfg, ins, OP_MOVE);
4226                 ins->sreg1 = vt_reg;
4227                 ins->dreg = mono_regstate_next_int (cfg->rs);
4228                 mono_bblock_add_inst (cfg->cbb, ins);
4229
4230                 mono_call_inst_add_outarg_reg (cfg, call, ins->dreg, sparc_o0, FALSE);
4231
4232                 this_out_reg = sparc_o1;
4233 #else
4234                 /* Set the 'struct/union return pointer' location on the stack */
4235                 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, 64, vt_reg);
4236 #endif
4237         }
4238
4239         /* add the this argument */
4240         if (this_reg != -1) {
4241                 MonoInst *this;
4242                 MONO_INST_NEW (cfg, this, OP_MOVE);
4243                 this->type = this_type;
4244                 this->sreg1 = this_reg;
4245                 this->dreg = mono_regstate_next_int (cfg->rs);
4246                 mono_bblock_add_inst (cfg->cbb, this);
4247
4248                 mono_call_inst_add_outarg_reg (cfg, call, this->dreg, this_out_reg, FALSE);
4249         }
4250 }
4251
4252
4253 MonoInst*
4254 mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4255 {
4256         MonoInst *ins = NULL;
4257
4258         if (cmethod->klass == mono_defaults.thread_class &&
4259                 strcmp (cmethod->name, "MemoryBarrier") == 0) {
4260                 if (sparcv9)
4261                         MONO_INST_NEW (cfg, ins, OP_MEMORY_BARRIER);
4262         }
4263
4264         return ins;
4265 }
4266
4267 /*
4268  * mono_arch_get_argument_info:
4269  * @csig:  a method signature
4270  * @param_count: the number of parameters to consider
4271  * @arg_info: an array to store the result infos
4272  *
4273  * Gathers information on parameters such as size, alignment and
4274  * padding. arg_info should be large enought to hold param_count + 1 entries.
4275  *
4276  * Returns the size of the activation frame.
4277  */
4278 int
4279 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
4280 {
4281         int k, align;
4282         CallInfo *cinfo;
4283         ArgInfo *ainfo;
4284
4285         cinfo = get_call_info (csig, FALSE);
4286
4287         if (csig->hasthis) {
4288                 ainfo = &cinfo->args [0];
4289                 arg_info [0].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4290         }
4291
4292         for (k = 0; k < param_count; k++) {
4293                 ainfo = &cinfo->args [k + csig->hasthis];
4294
4295                 arg_info [k + 1].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4296                 arg_info [k + 1].size = mono_type_size (csig->params [k], &align);
4297         }
4298
4299         g_free (cinfo);
4300
4301         return 0;
4302 }
4303
4304 gboolean
4305 mono_arch_print_tree (MonoInst *tree, int arity)
4306 {
4307         return 0;
4308 }
4309
4310 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
4311 {
4312         return NULL;
4313 }
4314
4315 MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
4316 {
4317         return NULL;
4318 }