mono/mini/mini-sparc.c

   1 /*
   2  * mini-sparc.c: Sparc backend for the Mono code generator
   3  *
   4  * Authors:
   5  *   Paolo Molaro (lupus@ximian.com)
   6  *   Dietmar Maurer (dietmar@ximian.com)
   7  *
   8  * Modified for SPARC:
   9  *   Christopher Taylor (ct@gentoo.org)
  10  *   Mark Crichton (crichton@gimp.org)
  11  *   Zoltan Varga (vargaz@freemail.hu)
  12  *
  13  * (C) 2003 Ximian, Inc.
  14  */
  15 #include "mini.h"
  16 #include <string.h>
  17
  18 #include <mono/metadata/appdomain.h>
  19 #include <mono/metadata/debug-helpers.h>
  20 #include <mono/utils/mono-math.h>
  21
  22 #include "mini-sparc.h"
  23 #include "inssel.h"
  24 #include "trace.h"
  25 #include "cpu-sparc.h"
  26
  27 /*
  28  * Sparc V9 means two things:
  29  * - the instruction set
  30  * - the ABI
  31  *
  32  * V9 instructions are only usable if the underlying processor is 64 bit. Most Sparc
  33  * processors in use are 64 bit processors. The V9 ABI is only usable if the
  34  * mono executable is a 64 bit executable. So it would make sense to use the 64 bit
  35  * instructions without using the 64 bit ABI.
  36  */
  37
  38 /*
  39  * Register usage:
  40  * - %i0..%i7 hold the incoming arguments, these are never written by JITted code
  41  * - %l0..%l7 is used for local register allocation
  42  * - %o0..%o6 is used for outgoing arguments
  43  * - %o7 and %g1 is used as scratch registers in opcodes
  44  * - all floating point registers are used for local register allocation except %f0.
  45  *   Only double precision registers are used.
  46  */
  47
  48 /*
  49  * Alignment:
  50  * - doubles and longs must be stored in dword aligned locations
  51  */
  52
  53 #if SPARCV9
  54 #error "Sparc V9 support not yet implemented."
  55 #endif
  56
  57 int mono_exc_esp_offset = 0;
  58
  59 #define NOT_IMPLEMENTED g_assert_not_reached ();
  60
  61 #define ALIGN_TO(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
  62
  63 static int
  64 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar);
  65
  66 const char*
  67 mono_arch_regname (int reg) {
  68         static const char * rnames[] = {
  69                 "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
  70                 "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
  71                 "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
  72                 "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
  73                 "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
  74                 "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
  75                 "sparc_fp", "sparc_retadr"
  76         };
  77         if (reg >= 0 && reg < 32)
  78                 return rnames [reg];
  79         return "unknown";
  80 }
  81
  82 /*
  83  * Initialize the cpu to execute managed code.
  84  */
  85 void
  86 mono_arch_cpu_init (void)
  87 {
  88 }
  89
  90 /*
  91  * This function returns the optimizations supported on this cpu.
  92  */
  93 guint32
  94 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
  95 {
  96         guint32 opts = 0;
  97         *exclude_mask = 0;
  98         return opts;
  99 }
 100
 101 static void
 102 mono_sparc_break (void)
 103 {
 104 }
 105
 106 static gboolean
 107 is_regsize_var (MonoType *t) {
 108         if (t->byref)
 109                 return TRUE;
 110         switch (t->type) {
 111         case MONO_TYPE_BOOLEAN:
 112         case MONO_TYPE_CHAR:
 113         case MONO_TYPE_I1:
 114         case MONO_TYPE_U1:
 115         case MONO_TYPE_I2:
 116         case MONO_TYPE_U2:
 117         case MONO_TYPE_I4:
 118         case MONO_TYPE_U4:
 119         case MONO_TYPE_I:
 120         case MONO_TYPE_U:
 121                 return TRUE;
 122         case MONO_TYPE_OBJECT:
 123         case MONO_TYPE_STRING:
 124         case MONO_TYPE_CLASS:
 125         case MONO_TYPE_SZARRAY:
 126         case MONO_TYPE_ARRAY:
 127                 return TRUE;
 128         case MONO_TYPE_VALUETYPE:
 129                 if (t->data.klass->enumtype)
 130                         return is_regsize_var (t->data.klass->enum_basetype);
 131                 return FALSE;
 132         }
 133         return FALSE;
 134 }
 135
 136 GList *
 137 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
 138 {
 139         GList *vars = NULL;
 140         int i;
 141
 142         /*
 143          * FIXME: If an argument is allocated to a register, then load it from the
 144          * stack in the prolog.
 145          */
 146
 147         for (i = 0; i < cfg->num_varinfo; i++) {
 148                 MonoInst *ins = cfg->varinfo [i];
 149                 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
 150
 151                 /* unused vars */
 152                 if (vmv->range.first_use.abs_pos > vmv->range.last_use.abs_pos)
 153                         continue;
 154
 155                 /* FIXME: Make arguments on stack allocateable to registers */
 156                 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode == OP_REGVAR) || (ins->opcode == OP_ARG))
 157                         continue;
 158
 159                 /* we can only allocate 32 bit values */
 160                 if (is_regsize_var (ins->inst_vtype)) {
 161                         g_assert (MONO_VARINFO (cfg, i)->reg == -1);
 162                         g_assert (i == vmv->idx);
 163                         vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
 164                 }
 165         }
 166
 167         return vars;
 168 }
 169
 170 GList *
 171 mono_arch_get_global_int_regs (MonoCompile *cfg)
 172 {
 173         GList *regs = NULL;
 174         int i;
 175
 176         /* FIXME: Use unused input registers for global allocation */
 177
 178         /* Use %l0..%l3 as global registers */
 179
 180         for (i = 16; i < 20; ++i)
 181                 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
 182
 183         return regs;
 184 }
 185
 186 /*
 187  * mono_arch_regalloc_cost:
 188  *
 189  *  Return the cost, in number of memory references, of the action of
 190  * allocating the variable VMV into a register during global register
 191  * allocation.
 192  */
 193 guint32
 194 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
 195 {
 196         return 0;
 197 }
 198
 199 #ifdef __GNUC__
 200 #define flushi(addr)    __asm__ __volatile__ ("flush %0"::"r"(addr):"memory")
 201 #else /* assume Sun's compiler */
 202 static void flushi(void *addr)
 203 {
 204     asm("flush %i0");
 205 }
 206 #endif
 207
 208 void
 209 mono_arch_flush_icache (guint8 *code, gint size)
 210 {
 211         /*
 212          * FIXME: This might not work on older machines, but flushing code in dword
 213          * chunks in _slow_.
 214          */
 215
 216         flushi (code);
 217
 218         /*
 219         for (i = 0; i < (size/8); i++)
 220                 flushi(code + (i*8));
 221         */
 222 }
 223
 224 typedef enum {
 225         ArgInIReg,
 226         ArgInIRegPair,
 227         ArgInSplitRegStack,
 228         ArgInFReg,
 229         ArgInFRegPair,
 230         ArgOnStack,
 231         ArgOnStackPair
 232 } ArgStorage;
 233
 234 typedef struct {
 235         gint16 offset;
 236         /* This needs to be offset by %i0 or %o0 depending on caller/callee */
 237         gint8  reg;
 238         ArgStorage storage;
 239         guint32 vt_offset; /* for valuetypes */
 240 } ArgInfo;
 241
 242 typedef struct {
 243         int nargs;
 244         guint32 stack_usage;
 245         ArgInfo ret;
 246         ArgInfo args [1];
 247 } CallInfo;
 248
 249 #define DEBUG(a)
 250
 251 /* %o0..%o5 */
 252 #define PARAM_REGS 6
 253
 254 static void inline
 255 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean pair)
 256 {
 257         ainfo->offset = *stack_size;
 258
 259         if (!pair) {
 260                 if (*gr >= PARAM_REGS) {
 261                         ainfo->storage = ArgOnStack;
 262                 }
 263                 else {
 264                         ainfo->storage = ArgInIReg;
 265                         ainfo->reg = *gr;
 266                         (*gr) ++;
 267                 }
 268
 269                 /* Allways reserve stack space for parameters passed in registers */
 270                 (*stack_size) += 4;
 271         }
 272         else {
 273                 if (*gr < PARAM_REGS - 1) {
 274                         /* A pair of registers */
 275                         ainfo->storage = ArgInIRegPair;
 276                         ainfo->reg = *gr;
 277                         (*gr) += 2;
 278                 }
 279                 else if (*gr >= PARAM_REGS) {
 280                         /* A pair of stack locations */
 281                         ainfo->storage = ArgOnStackPair;
 282                         ainfo->offset = *stack_size;
 283                 }
 284                 else {
 285                         ainfo->storage = ArgInSplitRegStack;
 286                         ainfo->reg = *gr;
 287                         ainfo->offset = *stack_size;
 288                         (*gr) ++;
 289                 }
 290
 291                 (*stack_size) += 8;
 292         }
 293 }
 294
 295 /*
 296  * get_call_info:
 297  *
 298  *  Obtain information about a call according to the calling convention.
 299  * See the "System V ABI, Sparc Processor Supplement" Sparc V8 version document for
 300  * more information.
 301  */
 302 static CallInfo*
 303 get_call_info (MonoMethodSignature *sig, gboolean is_pinvoke)
 304 {
 305         guint32 i, gr, simpletype;
 306         int n = sig->hasthis + sig->param_count;
 307         guint32 stack_size = 0;
 308         CallInfo *cinfo;
 309
 310         cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
 311
 312         gr = 0;
 313
 314         /* this */
 315         if (sig->hasthis)
 316                 add_general (&gr, &stack_size, cinfo->args + 0, FALSE);
 317
 318         for (i = 0; i < sig->param_count; ++i) {
 319                 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
 320
 321                 DEBUG(printf("param %d: ", i));
 322                 if (sig->params [i]->byref) {
 323                         DEBUG(printf("byref\n"));
 324
 325                         add_general (&gr, &stack_size, ainfo, FALSE);
 326                         continue;
 327                 }
 328                 simpletype = sig->params [i]->type;
 329         enum_calc_size:
 330                 switch (simpletype) {
 331                 case MONO_TYPE_BOOLEAN:
 332                 case MONO_TYPE_CHAR:
 333                 case MONO_TYPE_I1:
 334                 case MONO_TYPE_U1:
 335                         add_general (&gr, &stack_size, ainfo, FALSE);
 336                         /* the value is in the ls byte */
 337                         ainfo->offset += 3;
 338                         break;
 339                 case MONO_TYPE_I2:
 340                 case MONO_TYPE_U2:
 341                         add_general (&gr, &stack_size, ainfo, FALSE);
 342                         /* the value is in the ls word */
 343                         ainfo->offset += 2;
 344                         break;
 345                 case MONO_TYPE_I4:
 346                 case MONO_TYPE_U4:
 347                 case MONO_TYPE_I:
 348                 case MONO_TYPE_U:
 349                 case MONO_TYPE_PTR:
 350                 case MONO_TYPE_CLASS:
 351                 case MONO_TYPE_OBJECT:
 352                 case MONO_TYPE_STRING:
 353                 case MONO_TYPE_SZARRAY:
 354                 case MONO_TYPE_ARRAY:
 355                         add_general (&gr, &stack_size, ainfo, FALSE);
 356                         break;
 357                 case MONO_TYPE_VALUETYPE: {
 358                         if (sig->params [i]->data.klass->enumtype) {
 359                                 simpletype = sig->params [i]->data.klass->enum_basetype->type;
 360                                 goto enum_calc_size;
 361                         }
 362
 363                         add_general (&gr, &stack_size, ainfo, FALSE);
 364                         break;
 365                 }
 366                 case MONO_TYPE_U8:
 367                 case MONO_TYPE_I8:
 368                         add_general (&gr, &stack_size, ainfo, TRUE);
 369                         break;
 370                 case MONO_TYPE_R4:
 371                         /* single precision values are passed in integer registers */
 372                         add_general (&gr, &stack_size, ainfo, FALSE);
 373                         break;
 374                 case MONO_TYPE_R8:
 375                         /* double precision values are passed in a pair of registers */
 376                         add_general (&gr, &stack_size, ainfo, TRUE);
 377                         break;
 378                 default:
 379                         g_assert_not_reached ();
 380                 }
 381         }
 382
 383         /* return value */
 384         {
 385                 simpletype = sig->ret->type;
 386 enum_retvalue:
 387                 switch (simpletype) {
 388                 case MONO_TYPE_BOOLEAN:
 389                 case MONO_TYPE_I1:
 390                 case MONO_TYPE_U1:
 391                 case MONO_TYPE_I2:
 392                 case MONO_TYPE_U2:
 393                 case MONO_TYPE_CHAR:
 394                 case MONO_TYPE_I4:
 395                 case MONO_TYPE_U4:
 396                 case MONO_TYPE_I:
 397                 case MONO_TYPE_U:
 398                 case MONO_TYPE_PTR:
 399                 case MONO_TYPE_CLASS:
 400                 case MONO_TYPE_OBJECT:
 401                 case MONO_TYPE_SZARRAY:
 402                 case MONO_TYPE_ARRAY:
 403                 case MONO_TYPE_STRING:
 404                         cinfo->ret.storage = ArgInIReg;
 405                         cinfo->ret.reg = sparc_i0;
 406                         break;
 407                 case MONO_TYPE_U8:
 408                 case MONO_TYPE_I8:
 409                         cinfo->ret.storage = ArgInIRegPair;
 410                         cinfo->ret.reg = sparc_i0;
 411                         break;
 412                 case MONO_TYPE_R4:
 413                 case MONO_TYPE_R8:
 414                         cinfo->ret.storage = ArgInFReg;
 415                         cinfo->ret.reg = sparc_f0;
 416                         break;
 417                 case MONO_TYPE_VALUETYPE:
 418                         if (sig->ret->data.klass->enumtype) {
 419                                 simpletype = sig->ret->data.klass->enum_basetype->type;
 420                                 goto enum_retvalue;
 421                         }
 422                         cinfo->ret.storage = ArgOnStack;
 423                         break;
 424                 case MONO_TYPE_VOID:
 425                         break;
 426                 default:
 427                         g_error ("Can't handle as return value 0x%x", sig->ret->type);
 428                 }
 429         }
 430
 431         cinfo->stack_usage = stack_size;
 432         return cinfo;
 433 }
 434
 435 /*
 436  * Set var information according to the calling convention. sparc version.
 437  * The locals var stuff should most likely be split in another method.
 438  */
 439 void
 440 mono_arch_allocate_vars (MonoCompile *m)
 441 {
 442         MonoMethodSignature *sig;
 443         MonoMethodHeader *header;
 444         MonoInst *inst;
 445         int i, offset, size, align, curinst;
 446         CallInfo *cinfo;
 447
 448         header = ((MonoMethodNormal *)m->method)->header;
 449
 450         sig = m->method->signature;
 451
 452         cinfo = get_call_info (sig, FALSE);
 453
 454         if (sig->ret->type != MONO_TYPE_VOID) {
 455                 switch (cinfo->ret.storage) {
 456                 case ArgInIReg:
 457                 case ArgInFReg:
 458                 case ArgInIRegPair:
 459                         m->ret->opcode = OP_REGVAR;
 460                         m->ret->inst_c0 = cinfo->ret.reg;
 461                         break;
 462                 case ArgOnStack:
 463                         /* valuetypes */
 464                         m->ret->opcode = OP_REGOFFSET;
 465                         m->ret->inst_basereg = sparc_fp;
 466                         m->ret->inst_offset = 64;
 467                         break;
 468                 default:
 469                         NOT_IMPLEMENTED;
 470                 }
 471         }
 472
 473         /*
 474          * We use the Sparc V8 calling conventions for managed code as well.
 475          * FIXME: Use something more optimized.
 476          */
 477
 478         /* Locals are allocated backwards from %fp */
 479         m->frame_reg = sparc_fp;
 480         offset = 0;
 481
 482         /*
 483          * Reserve a stack slot for holding information used during exception
 484          * handling.
 485          */
 486         if (header->num_clauses)
 487                 offset += 8;
 488
 489         if (m->method->save_lmf) {
 490                 offset += sizeof (MonoLMF);
 491                 m->arch.lmf_offset = offset;
 492         }
 493
 494         curinst = m->locals_start;
 495         for (i = curinst; i < m->num_varinfo; ++i) {
 496                 inst = m->varinfo [i];
 497
 498                 if (inst->opcode == OP_REGVAR)
 499                         continue;
 500
 501                 /* inst->unused indicates native sized value types, this is used by the
 502                 * pinvoke wrappers when they call functions returning structure */
 503                 if (inst->unused && MONO_TYPE_ISSTRUCT (inst->inst_vtype))
 504                         size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
 505                 else
 506                         size = mono_type_stack_size (inst->inst_vtype, &align);
 507
 508                 /*
 509                  * This is needed since structures containing doubles must be doubleword
 510          * aligned.
 511                  * FIXME: Do this only if needed.
 512                  */
 513                 if (MONO_TYPE_ISSTRUCT (inst->inst_vtype))
 514                         align = 8;
 515
 516                 /*
 517                  * variables are accessed as negative offsets from %fp, so increase
 518                  * the offset before assigning it to a variable
 519                  */
 520                 offset += size;
 521
 522                 offset += align - 1;
 523                 offset &= ~(align - 1);
 524                 inst->opcode = OP_REGOFFSET;
 525                 inst->inst_basereg = sparc_fp;
 526                 inst->inst_offset = -offset;
 527
 528                 //g_print ("allocating local %d to %d\n", i, inst->inst_offset);
 529         }
 530
 531         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
 532                 inst = m->varinfo [i];
 533                 if (inst->opcode != OP_REGVAR) {
 534                         ArgInfo *ainfo = &cinfo->args [i];
 535                         gboolean inreg = TRUE;
 536                         MonoType *arg_type;
 537
 538                         if (sig->hasthis && (i == 0))
 539                                 arg_type = &mono_defaults.object_class->byval_arg;
 540                         else
 541                                 arg_type = sig->params [i - sig->hasthis];
 542
 543                         if ((arg_type->type == MONO_TYPE_R4)
 544                                 || (arg_type->type == MONO_TYPE_R8))
 545                                 /*
 546                                  * Since float arguments are passed in integer registers, we need to
 547                                  * save them to the stack in the prolog.
 548                                  */
 549                                 inreg = FALSE;
 550
 551                         /* FIXME: Allocate volatile arguments to registers */
 552                         if (inst->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT))
 553                                 inreg = FALSE;
 554
 555                         if (MONO_TYPE_ISSTRUCT (arg_type))
 556                                 /* FIXME: this isn't needed */
 557                                 inreg = FALSE;
 558
 559                         switch (ainfo->storage) {
 560                         case ArgInIReg:
 561                         case ArgInIRegPair:
 562                                 if (inreg) {
 563                                         inst->opcode = OP_REGVAR;
 564                                         inst->dreg = sparc_i0 + ainfo->reg;
 565                                         break;
 566                                 }
 567                                 else {
 568                                         /* Fall through */
 569                                 }
 570                         case ArgOnStack:
 571                         case ArgOnStackPair:
 572                         case ArgInSplitRegStack:
 573                                 /* Split arguments are saved to the stack in the prolog */
 574                                 inst->opcode = OP_REGOFFSET;
 575                                 /* in parent frame */
 576                                 inst->inst_basereg = sparc_fp;
 577                                 inst->inst_offset = ainfo->offset + 68;
 578
 579                                 if (arg_type->type == MONO_TYPE_R8) {
 580                                         /*
 581                                          * It is very hard to load doubles from non-doubleword aligned
 582                                          * memory locations. So if the offset is misaligned, we copy the
 583                                          * argument to a stack location in the prolog.
 584                                          */
 585                                         if (inst->inst_offset % 8) {
 586                                                 inst->inst_basereg = sparc_fp;
 587                                                 offset += 8;
 588                                                 align = 8;
 589                                                 offset += align - 1;
 590                                                 offset &= ~(align - 1);
 591                                                 inst->inst_offset = -offset;
 592
 593                                         }
 594                                 }
 595                                 break;
 596                         default:
 597                                 NOT_IMPLEMENTED;
 598                         }
 599
 600                         if (MONO_TYPE_ISSTRUCT (arg_type)) {
 601                                 /* Add a level of indirection */
 602                                 /*
 603                                  * It would be easier to add OP_LDIND_I here, but ldind_i instructions
 604                                  * are destructively modified in a lot of places in inssel.brg.
 605                                  */
 606                                 MonoInst *indir;
 607                                 MONO_INST_NEW (m, indir, 0);
 608                                 *indir = *inst;
 609                                 inst->opcode = OP_SPARC_INARG_VT;
 610                                 inst->inst_left = indir;
 611                         }
 612                 }
 613         }
 614
 615         /*
 616          * spillvars are stored between the normal locals and the storage reserved
 617          * by the ABI.
 618          */
 619
 620         m->stack_offset = offset;
 621
 622         /* Add a properly aligned dword for use by int<->float conversion opcodes */
 623         m->spill_count ++;
 624         mono_spillvar_offset_float (m, 0);
 625
 626         g_free (cinfo);
 627 }
 628
 629 /*
 630  * take the arguments and generate the arch-specific
 631  * instructions to properly call the function in call.
 632  * This includes pushing, moving arguments to the right register
 633  * etc.
 634  */
 635 MonoCallInst*
 636 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
 637         MonoInst *arg, *in;
 638         MonoMethodSignature *sig;
 639         int i, n;
 640         CallInfo *cinfo;
 641         ArgInfo *ainfo;
 642         guint32 extra_space = 0;
 643
 644         sig = call->signature;
 645         n = sig->param_count + sig->hasthis;
 646
 647         cinfo = get_call_info (sig, sig->pinvoke);
 648
 649         for (i = 0; i < n; ++i) {
 650                 ainfo = cinfo->args + i;
 651                 if (is_virtual && i == 0) {
 652                         /* the argument will be attached to the call instruction */
 653                         in = call->args [i];
 654                 } else {
 655                         MONO_INST_NEW (cfg, arg, OP_OUTARG);
 656                         in = call->args [i];
 657                         arg->cil_code = in->cil_code;
 658                         arg->inst_left = in;
 659                         arg->type = in->type;
 660                         /* prepend, we'll need to reverse them later */
 661                         arg->next = call->out_args;
 662                         call->out_args = arg;
 663
 664                         if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(sig->params [i - sig->hasthis]))) {
 665                                 MonoInst *inst;
 666                                 gint align;
 667                                 guint32 offset, pad;
 668                                 guint32 size;
 669
 670                                 if (sig->pinvoke)
 671                                         size = mono_type_native_stack_size (&in->klass->byval_arg, &align);
 672                                 else
 673                                         size = mono_type_stack_size (&in->klass->byval_arg, &align);
 674
 675                                 /*
 676                                  * We use OP_OUTARG_VT to copy the valuetype to a stack location, then
 677                                  * use the normal OUTARG opcodes to pass the address of the location to
 678                                  * the callee.
 679                                  */
 680                                 MONO_INST_NEW (cfg, inst, OP_OUTARG_VT);
 681                                 inst->inst_left = in;
 682
 683                                 /* The first 6 argument locations are reserved */
 684                                 if (cinfo->stack_usage < 24)
 685                                         cinfo->stack_usage = 24;
 686
 687                                 offset = ALIGN_TO (68 + cinfo->stack_usage, align);
 688                                 pad = offset - (68 + cinfo->stack_usage);
 689
 690                                 inst->inst_c1 = offset;
 691                                 inst->unused = size;
 692                                 arg->inst_left = inst;
 693
 694                                 cinfo->stack_usage += size;
 695                                 cinfo->stack_usage += pad;
 696                         }
 697
 698                         switch (ainfo->storage) {
 699                         case ArgInIReg:
 700                         case ArgInFReg:
 701                         case ArgInIRegPair:
 702                                 if (ainfo->storage == ArgInIRegPair)
 703                                         arg->opcode = OP_SPARC_OUTARG_REGPAIR;
 704                                 arg->unused = sparc_o0 + ainfo->reg;
 705                                 /* outgoing arguments begin at sp+68 */
 706                                 arg->inst_basereg = sparc_sp;
 707                                 arg->inst_imm = 68 + ainfo->offset;
 708                                 call->used_iregs |= 1 << ainfo->reg;
 709
 710                                 if ((i >= sig->hasthis) && (sig->params [i - sig->hasthis]->type == MONO_TYPE_R8)) {
 711                                         /*
 712                                          * The OUTARG (freg) implementation needs an extra dword to store
 713                                          * the temporary value.
 714                                          */
 715                                         extra_space += 8;
 716                                 }
 717                                 break;
 718                         case ArgOnStack:
 719                                 arg->opcode = OP_SPARC_OUTARG_MEM;
 720                                 arg->inst_basereg = sparc_sp;
 721                                 arg->inst_imm = 68 + ainfo->offset;
 722                                 break;
 723                         case ArgOnStackPair:
 724                                 arg->opcode = OP_SPARC_OUTARG_MEMPAIR;
 725                                 arg->inst_basereg = sparc_sp;
 726                                 arg->inst_imm = 68 + ainfo->offset;
 727                                 break;
 728                         case ArgInSplitRegStack:
 729                                 arg->opcode = OP_SPARC_OUTARG_SPLIT_REG_STACK;
 730                                 arg->unused = sparc_o0 + ainfo->reg;
 731                                 arg->inst_basereg = sparc_sp;
 732                                 arg->inst_imm = 68 + ainfo->offset;
 733                                 call->used_iregs |= 1 << ainfo->reg;
 734                                 break;
 735                         default:
 736                                 NOT_IMPLEMENTED;
 737                         }
 738                 }
 739         }
 740
 741         /*
 742          * Reverse the call->out_args list.
 743          */
 744         {
 745                 MonoInst *prev = NULL, *list = call->out_args, *next;
 746                 while (list) {
 747                         next = list->next;
 748                         list->next = prev;
 749                         prev = list;
 750                         list = next;
 751                 }
 752                 call->out_args = prev;
 753         }
 754         call->stack_usage = cinfo->stack_usage + extra_space;
 755         cfg->param_area = MAX (cfg->param_area, call->stack_usage);
 756         cfg->flags |= MONO_CFG_HAS_CALLS;
 757
 758         g_free (cinfo);
 759         return call;
 760 }
 761
 762 /* Map opcode to the sparc condition codes */
 763 static inline SparcCond
 764 opcode_to_sparc_cond (int opcode)
 765 {
 766         switch (opcode) {
 767         case OP_FBGE:
 768                 return sparc_fbge;
 769         case OP_FBLE:
 770                 return sparc_fble;
 771         case OP_FBEQ:
 772         case OP_FCEQ:
 773                 return sparc_fbe;
 774         case OP_FBLT:
 775         case OP_FCLT:
 776         case OP_FCLT_UN:
 777                 return sparc_fbl;
 778         case OP_FBGT:
 779         case OP_FCGT:
 780         case OP_FCGT_UN:
 781                 return sparc_fbg;
 782         case CEE_BEQ:
 783         case OP_CEQ:
 784         case OP_COND_EXC_EQ:
 785                 return sparc_be;
 786         case CEE_BNE_UN:
 787         case OP_COND_EXC_NE_UN:
 788                 return sparc_bne;
 789         case CEE_BLT:
 790         case OP_CLT:
 791         case OP_COND_EXC_LT:
 792                 return sparc_bl;
 793         case CEE_BLT_UN:
 794         case OP_CLT_UN:
 795         case OP_COND_EXC_LT_UN:
 796                 return sparc_blu;
 797         case CEE_BGT:
 798         case OP_CGT:
 799         case OP_COND_EXC_GT:
 800                 return sparc_bg;
 801         case CEE_BGT_UN:
 802         case OP_CGT_UN:
 803         case OP_COND_EXC_GT_UN:
 804                 return sparc_bgu;
 805         case CEE_BGE:
 806         case OP_COND_EXC_GE:
 807                 return sparc_bge;
 808         case CEE_BGE_UN:
 809         case OP_COND_EXC_GE_UN:
 810                 return sparc_beu;
 811         case CEE_BLE:
 812         case OP_COND_EXC_LE:
 813                 return sparc_ble;
 814         case CEE_BLE_UN:
 815         case OP_COND_EXC_LE_UN:
 816                 return sparc_bleu;
 817         case OP_COND_EXC_OV:
 818                 return sparc_bvs;
 819         case OP_COND_EXC_C:
 820                 return sparc_bcs;
 821
 822         case OP_COND_EXC_NO:
 823         case OP_COND_EXC_NC:
 824                 NOT_IMPLEMENTED;
 825         default:
 826                 g_assert_not_reached ();
 827                 return sparc_be;
 828         }
 829 }
 830
 831 #define EMIT_COND_BRANCH_GENERAL(ins,bop,cond) \
 832 if (ins->flags & MONO_INST_BRLABEL) { \
 833         if (ins->inst_i0->inst_c0) { \
 834            gint32 disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2; \
 835            g_assert (sparc_is_imm22 (disp)); \
 836            sparc_ ## bop (code, 1, cond, disp); \
 837         } else { \
 838                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
 839             sparc_ ## bop (code, 1, cond, 0); \
 840         } \
 841                 sparc_nop (code); \
 842 } else { \
 843         if (ins->inst_true_bb->native_offset) { \
 844            gint32 disp = (ins->inst_true_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2; \
 845            g_assert (sparc_is_imm22 (disp)); \
 846            sparc_ ## bop (code, 1, cond, disp); \
 847         } else { \
 848                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
 849             sparc_ ## bop (code, 1, cond, 0); \
 850         } \
 851                 sparc_nop (code); \
 852 }
 853
 854 #define EMIT_COND_BRANCH(ins,cond) EMIT_COND_BRANCH_GENERAL((ins),branch,(cond))
 855
 856 #define EMIT_FLOAT_COND_BRANCH(ins,cond) EMIT_COND_BRANCH_GENERAL((ins),fbranch,(cond))
 857
 858 /* emit an exception if condition is fail */
 859 /*
 860  * We put the exception throwing code out-of-line, at the end of the method
 861  */
 862 #define EMIT_COND_SYSTEM_EXCEPTION(ins,cond,sexc_name) do {     \
 863                 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,   \
 864                                     MONO_PATCH_INFO_EXC, sexc_name);  \
 865         sparc_branch (code, 1, cond, 0);     \
 866         sparc_nop (code);     \
 867         } while (0);
 868
 869 #define EMIT_ALU_IMM(ins,op,setcc) do { \
 870                         if (sparc_is_imm13 ((ins)->inst_imm)) \
 871                                 sparc_ ## op ## _imm (code, (setcc), (ins)->sreg1, ins->inst_imm, (ins)->dreg); \
 872                         else { \
 873                                 sparc_set (code, ins->inst_imm, sparc_o7); \
 874                                 sparc_ ## op (code, (setcc), (ins)->sreg1, sparc_o7, (ins)->dreg); \
 875                         } \
 876 } while (0);
 877
 878 #define EMIT_LOAD_MEMBASE(ins,op) do { \
 879                         if (sparc_is_imm13 (ins->inst_offset)) \
 880                                 sparc_ ## op ## _imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg); \
 881                         else { \
 882                                 sparc_set (code, ins->inst_offset, sparc_o7); \
 883                                 sparc_ ## op (code, ins->inst_basereg, sparc_o7, ins->dreg); \
 884                         } \
 885 } while (0);
 886
 887 /* max len = 5 */
 888 #define EMIT_STORE_MEMBASE_IMM(ins,op) do { \
 889                         guint32 sreg; \
 890                         if (ins->inst_imm == 0) \
 891                                 sreg = sparc_g0; \
 892                         else { \
 893                                 sparc_set (code, ins->inst_imm, sparc_o7); \
 894                                 sreg = sparc_o7; \
 895                         } \
 896                         if (!sparc_is_imm13 (ins->inst_offset)) { \
 897                                 sparc_set (code, ins->inst_offset, sparc_g1); \
 898                                 sparc_ ## op (code, sreg, ins->inst_destbasereg, sparc_g1); \
 899                         } \
 900                         else \
 901                                 sparc_ ## op ## _imm (code, sreg, ins->inst_destbasereg, ins->inst_offset); \
 902                                                                                                                                                                                  } while (0);
 903
 904 #define EMIT_STORE_MEMBASE_REG(ins,op) do { \
 905                         if (!sparc_is_imm13 (ins->inst_offset)) { \
 906                                 sparc_set (code, ins->inst_offset, sparc_o7); \
 907                                 sparc_ ## op (code, ins->sreg1, ins->inst_destbasereg, sparc_o7); \
 908                         } \
 909                                   else \
 910                                 sparc_ ## op ## _imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset); \
 911                                                                                                                                                                                  } while (0);
 912
 913 static void
 914 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
 915 {
 916         MonoInst *ins, *last_ins = NULL;
 917         ins = bb->code;
 918
 919         /* short circuit this for now */
 920         return;
 921
 922         while (ins) {
 923
 924                 switch (ins->opcode) {
 925                 case OP_MUL_IMM:
 926                         /* remove unnecessary multiplication with 1 */
 927                         if (ins->inst_imm == 1) {
 928                                 if (ins->dreg != ins->sreg1) {
 929                                         ins->opcode = OP_MOVE;
 930                                 } else {
 931                                         last_ins->next = ins->next;
 932                                         ins = ins->next;
 933                                         continue;
 934                                 }
 935                         }
 936                         break;
 937                 case OP_LOAD_MEMBASE:
 938                 case OP_LOADI4_MEMBASE:
 939                         /*
 940                          * OP_STORE_MEMBASE_REG reg, offset(basereg)
 941                          * OP_LOAD_MEMBASE offset(basereg), reg
 942                          */
 943                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
 944                                          || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
 945                             ins->inst_basereg == last_ins->inst_destbasereg &&
 946                             ins->inst_offset == last_ins->inst_offset) {
 947                                 if (ins->dreg == last_ins->sreg1) {
 948                                         last_ins->next = ins->next;
 949                                         ins = ins->next;
 950                                         continue;
 951                                 } else {
 952                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
 953                                         ins->opcode = OP_MOVE;
 954                                         ins->sreg1 = last_ins->sreg1;
 955                                 }
 956
 957                         /*
 958                          * Note: reg1 must be different from the basereg in the second load
 959                          * OP_LOAD_MEMBASE offset(basereg), reg1
 960                          * OP_LOAD_MEMBASE offset(basereg), reg2
 961                          * -->
 962                          * OP_LOAD_MEMBASE offset(basereg), reg1
 963                          * OP_MOVE reg1, reg2
 964                          */
 965                         } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
 966                                            || last_ins->opcode == OP_LOAD_MEMBASE) &&
 967                               ins->inst_basereg != last_ins->dreg &&
 968                               ins->inst_basereg == last_ins->inst_basereg &&
 969                               ins->inst_offset == last_ins->inst_offset) {
 970
 971                                 if (ins->dreg == last_ins->dreg) {
 972                                         last_ins->next = ins->next;
 973                                         ins = ins->next;
 974                                         continue;
 975                                 } else {
 976                                         ins->opcode = OP_MOVE;
 977                                         ins->sreg1 = last_ins->dreg;
 978                                 }
 979
 980                                 //g_assert_not_reached ();
 981
 982 #if 0
 983                         /*
 984                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
 985                          * OP_LOAD_MEMBASE offset(basereg), reg
 986                          * -->
 987                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
 988                          * OP_ICONST reg, imm
 989                          */
 990                         } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
 991                                                 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
 992                                    ins->inst_basereg == last_ins->inst_destbasereg &&
 993                                    ins->inst_offset == last_ins->inst_offset) {
 994                                 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
 995                                 ins->opcode = OP_ICONST;
 996                                 ins->inst_c0 = last_ins->inst_imm;
 997                                 g_assert_not_reached (); // check this rule
 998 #endif
 999                         }
1000                         break;
1001                 case OP_LOADU1_MEMBASE:
1002                 case OP_LOADI1_MEMBASE:
1003                         if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1004                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1005                                         ins->inst_offset == last_ins->inst_offset) {
1006                                 if (ins->dreg == last_ins->sreg1) {
1007                                         last_ins->next = ins->next;
1008                                         ins = ins->next;
1009                                         continue;
1010                                 } else {
1011                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1012                                         ins->opcode = OP_MOVE;
1013                                         ins->sreg1 = last_ins->sreg1;
1014                                 }
1015                         }
1016                         break;
1017                 case OP_LOADU2_MEMBASE:
1018                 case OP_LOADI2_MEMBASE:
1019                         if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1020                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1021                                         ins->inst_offset == last_ins->inst_offset) {
1022                                 if (ins->dreg == last_ins->sreg1) {
1023                                         last_ins->next = ins->next;
1024                                         ins = ins->next;
1025                                         continue;
1026                                 } else {
1027                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1028                                         ins->opcode = OP_MOVE;
1029                                         ins->sreg1 = last_ins->sreg1;
1030                                 }
1031                         }
1032                         break;
1033                 case CEE_CONV_I4:
1034                 case CEE_CONV_U4:
1035                 case OP_MOVE:
1036                         /*
1037                          * OP_MOVE reg, reg
1038                          */
1039                         if (ins->dreg == ins->sreg1) {
1040                                 if (last_ins)
1041                                         last_ins->next = ins->next;
1042                                 ins = ins->next;
1043                                 continue;
1044                         }
1045                         /*
1046                          * OP_MOVE sreg, dreg
1047                          * OP_MOVE dreg, sreg
1048                          */
1049                         if (last_ins && last_ins->opcode == OP_MOVE &&
1050                             ins->sreg1 == last_ins->dreg &&
1051                             ins->dreg == last_ins->sreg1) {
1052                                 last_ins->next = ins->next;
1053                                 ins = ins->next;
1054                                 continue;
1055                         }
1056                         break;
1057                 }
1058                 last_ins = ins;
1059                 ins = ins->next;
1060         }
1061         bb->last_ins = last_ins;
1062 }
1063
1064 /* Parameters used by the register allocator */
1065
1066 /* Use %l4..%l7 as local registers */
1067 #define ARCH_CALLER_REGS (0xf0<<16)
1068 /* Use %f2..%f30 as the double precision floating point local registers */
1069 #define ARCH_CALLER_FREGS (0x55555554)
1070
1071 #undef DEBUG
1072 #define DEBUG(a) if (cfg->verbose_level > 1) a
1073 //#define DEBUG(a)
1074 #define reg_is_freeable(r) ((1 << (r)) & ARCH_CALLER_REGS)
1075 #define freg_is_freeable(r) (((1) << (r)) & ARCH_CALLER_FREGS)
1076
1077 typedef struct {
1078         int born_in;
1079         int killed_in;
1080         int last_use;
1081         int prev_use;
1082 } RegTrack;
1083
1084 static const char*const * ins_spec = sparc_desc;
1085
1086 static void
1087 print_ins (int i, MonoInst *ins)
1088 {
1089         const char *spec = ins_spec [ins->opcode];
1090         g_print ("\t%-2d %s", i, mono_inst_name (ins->opcode));
1091         if (spec [MONO_INST_DEST]) {
1092                 if (ins->dreg >= MONO_MAX_IREGS)
1093                         g_print (" R%d <-", ins->dreg);
1094                 else
1095                         if (spec [MONO_INST_DEST] == 'b')
1096                                 g_print (" [%s + 0x%x] <-", mono_arch_regname (ins->dreg), ins->inst_offset);
1097                 else
1098                         g_print (" %s <-", mono_arch_regname (ins->dreg));
1099         }
1100         if (spec [MONO_INST_SRC1]) {
1101                 if (ins->sreg1 >= MONO_MAX_IREGS)
1102                         g_print (" R%d", ins->sreg1);
1103                 else
1104                         if (spec [MONO_INST_SRC1] == 'b')
1105                                 g_print (" [%s + 0x%x]", mono_arch_regname (ins->sreg1), ins->inst_offset);
1106                 else
1107                         g_print (" %s", mono_arch_regname (ins->sreg1));
1108         }
1109         if (spec [MONO_INST_SRC2]) {
1110                 if (ins->sreg2 >= MONO_MAX_IREGS)
1111                         g_print (" R%d", ins->sreg2);
1112                 else
1113                         g_print (" %s", mono_arch_regname (ins->sreg2));
1114         }
1115         if (spec [MONO_INST_CLOB])
1116                 g_print (" clobbers: %c", spec [MONO_INST_CLOB]);
1117         g_print ("\n");
1118 }
1119
1120 static void
1121 print_regtrack (RegTrack *t, int num)
1122 {
1123         int i;
1124         char buf [32];
1125         const char *r;
1126
1127         for (i = 0; i < num; ++i) {
1128                 if (!t [i].born_in)
1129                         continue;
1130                 if (i >= MONO_MAX_IREGS) {
1131                         g_snprintf (buf, sizeof(buf), "R%d", i);
1132                         r = buf;
1133                 } else
1134                         r = mono_arch_regname (i);
1135                 g_print ("liveness: %s [%d - %d]\n", r, t [i].born_in, t[i].last_use);
1136         }
1137 }
1138
1139 typedef struct InstList InstList;
1140
1141 struct InstList {
1142         InstList *prev;
1143         InstList *next;
1144         MonoInst *data;
1145 };
1146
1147 static inline InstList*
1148 inst_list_prepend (MonoMemPool *pool, InstList *list, MonoInst *data)
1149 {
1150         InstList *item = mono_mempool_alloc (pool, sizeof (InstList));
1151         item->data = data;
1152         item->prev = NULL;
1153         item->next = list;
1154         if (list)
1155                 list->prev = item;
1156         return item;
1157 }
1158
1159 #define STACK_OFFSETS_POSITIVE
1160
1161 /*
1162  * returns the offset used by spillvar. It allocates a new
1163  * spill variable if necessary.
1164  */
1165 static int
1166 mono_spillvar_offset (MonoCompile *cfg, int spillvar)
1167 {
1168         MonoSpillInfo **si, *info;
1169         int i = 0;
1170
1171         si = &cfg->spill_info;
1172
1173         while (i <= spillvar) {
1174
1175                 if (!*si) {
1176                         *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1177                         info->next = NULL;
1178                         cfg->stack_offset += sizeof (gpointer);
1179                         info->offset = - cfg->stack_offset;
1180                 }
1181
1182                 if (i == spillvar)
1183                         return (*si)->offset;
1184
1185                 i++;
1186                 si = &(*si)->next;
1187         }
1188
1189         g_assert_not_reached ();
1190         return 0;
1191 }
1192
1193 static int
1194 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
1195 {
1196         MonoSpillInfo **si, *info;
1197         int i = 0;
1198
1199         si = &cfg->spill_info_float;
1200
1201         while (i <= spillvar) {
1202
1203                 if (!*si) {
1204                         *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1205                         info->next = NULL;
1206                         cfg->stack_offset += sizeof (double);
1207                         cfg->stack_offset = ALIGN_TO (cfg->stack_offset, 8);
1208                         info->offset = - cfg->stack_offset;
1209                 }
1210
1211                 if (i == spillvar)
1212                         return (*si)->offset;
1213
1214                 i++;
1215                 si = &(*si)->next;
1216         }
1217
1218         g_assert_not_reached ();
1219         return 0;
1220 }
1221
1222 /*
1223  * Force the spilling of the variable in the symbolic register 'reg'.
1224  */
1225 static int
1226 get_register_force_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, int reg)
1227 {
1228         MonoInst *load;
1229         int i, sel, spill;
1230
1231         sel = cfg->rs->iassign [reg];
1232         /*i = cfg->rs->isymbolic [sel];
1233         g_assert (i == reg);*/
1234         i = reg;
1235         spill = ++cfg->spill_count;
1236         cfg->rs->iassign [i] = -spill - 1;
1237         mono_regstate_free_int (cfg->rs, sel);
1238         /* we need to create a spill var and insert a load to sel after the current instruction */
1239         MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1240         load->dreg = sel;
1241         load->inst_basereg = cfg->frame_reg;
1242         load->inst_offset = mono_spillvar_offset (cfg, spill);
1243         if (item->prev) {
1244                 while (ins->next != item->prev->data)
1245                         ins = ins->next;
1246         }
1247         load->next = ins->next;
1248         ins->next = load;
1249         DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%sp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1250         i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1251         g_assert (i == sel);
1252
1253         return sel;
1254 }
1255
1256 static int
1257 get_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, guint32 regmask, int reg)
1258 {
1259         MonoInst *load;
1260         int i, sel, spill;
1261
1262         DEBUG (g_print ("start regmask to assign R%d: 0x%08x (R%d <- R%d R%d)\n", reg, regmask, ins->dreg, ins->sreg1, ins->sreg2));
1263         /* exclude the registers in the current instruction */
1264         if (reg != ins->sreg1 && (reg_is_freeable (ins->sreg1) || (ins->sreg1 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg1] >= 0))) {
1265                 if (ins->sreg1 >= MONO_MAX_IREGS)
1266                         regmask &= ~ (1 << cfg->rs->iassign [ins->sreg1]);
1267                 else
1268                         regmask &= ~ (1 << ins->sreg1);
1269                 DEBUG (g_print ("excluding sreg1 %s\n", mono_arch_regname (ins->sreg1)));
1270         }
1271         if (reg != ins->sreg2 && (reg_is_freeable (ins->sreg2) || (ins->sreg2 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg2] >= 0))) {
1272                 if (ins->sreg2 >= MONO_MAX_IREGS)
1273                         regmask &= ~ (1 << cfg->rs->iassign [ins->sreg2]);
1274                 else
1275                         regmask &= ~ (1 << ins->sreg2);
1276                 DEBUG (g_print ("excluding sreg2 %s %d\n", mono_arch_regname (ins->sreg2), ins->sreg2));
1277         }
1278         if (reg != ins->dreg && reg_is_freeable (ins->dreg)) {
1279                 regmask &= ~ (1 << ins->dreg);
1280                 DEBUG (g_print ("excluding dreg %s\n", mono_arch_regname (ins->dreg)));
1281         }
1282
1283         DEBUG (g_print ("available regmask: 0x%08x\n", regmask));
1284         g_assert (regmask); /* need at least a register we can free */
1285         sel = -1;
1286         /* we should track prev_use and spill the register that's farther */
1287         for (i = 0; i < MONO_MAX_IREGS; ++i) {
1288                 if (regmask & (1 << i)) {
1289                         sel = i;
1290                         DEBUG (g_print ("selected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->iassign [sel]));
1291                         break;
1292                 }
1293         }
1294         i = cfg->rs->isymbolic [sel];
1295         spill = ++cfg->spill_count;
1296         cfg->rs->iassign [i] = -spill - 1;
1297         mono_regstate_free_int (cfg->rs, sel);
1298         /* we need to create a spill var and insert a load to sel after the current instruction */
1299         MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1300         load->dreg = sel;
1301         load->inst_basereg = cfg->frame_reg;
1302         load->inst_offset = mono_spillvar_offset (cfg, spill);
1303         if (item->prev) {
1304                 while (ins->next != item->prev->data)
1305                         ins = ins->next;
1306         }
1307         load->next = ins->next;
1308         ins->next = load;
1309         DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%sp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1310         i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1311         g_assert (i == sel);
1312
1313         return sel;
1314 }
1315
1316 static int
1317 get_float_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, guint32 regmask, int reg)
1318 {
1319         MonoInst *load;
1320         int i, sel, spill;
1321
1322         DEBUG (g_print ("start regmask to assign R%d: 0x%08x (R%d <- R%d R%d)\n", reg, regmask, ins->dreg, ins->sreg1, ins->sreg2));
1323         /* exclude the registers in the current instruction */
1324         if (reg != ins->sreg1 && (freg_is_freeable (ins->sreg1) || (ins->sreg1 >= MONO_MAX_FREGS && cfg->rs->fassign [ins->sreg1] >= 0))) {
1325                 if (ins->sreg1 >= MONO_MAX_FREGS)
1326                         regmask &= ~ (1 << cfg->rs->fassign [ins->sreg1]);
1327                 else
1328                         regmask &= ~ (1 << ins->sreg1);
1329                 DEBUG (g_print ("excluding sreg1 %s\n", mono_arch_regname (ins->sreg1)));
1330         }
1331         if (reg != ins->sreg2 && (freg_is_freeable (ins->sreg2) || (ins->sreg2 >= MONO_MAX_FREGS && cfg->rs->fassign [ins->sreg2] >= 0))) {
1332                 if (ins->sreg2 >= MONO_MAX_FREGS)
1333                         regmask &= ~ (1 << cfg->rs->fassign [ins->sreg2]);
1334                 else
1335                         regmask &= ~ (1 << ins->sreg2);
1336                 DEBUG (g_print ("excluding sreg2 %s %d\n", mono_arch_regname (ins->sreg2), ins->sreg2));
1337         }
1338         if (reg != ins->dreg && freg_is_freeable (ins->dreg)) {
1339                 regmask &= ~ (1 << ins->dreg);
1340                 DEBUG (g_print ("excluding dreg %s\n", mono_arch_regname (ins->dreg)));
1341         }
1342
1343         DEBUG (g_print ("available regmask: 0x%08x\n", regmask));
1344         g_assert (regmask); /* need at least a register we can free */
1345         sel = -1;
1346         /* we should track prev_use and spill the register that's farther */
1347         for (i = 0; i < MONO_MAX_FREGS; ++i) {
1348                 if (regmask & (1 << i)) {
1349                         sel = i;
1350                         DEBUG (g_print ("selected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->fassign [sel]));
1351                         break;
1352                 }
1353         }
1354         i = cfg->rs->fsymbolic [sel];
1355         spill = ++cfg->spill_count;
1356         cfg->rs->fassign [i] = -spill - 1;
1357         mono_regstate_free_float(cfg->rs, sel);
1358         /* we need to create a spill var and insert a load to sel after the current instruction */
1359         MONO_INST_NEW (cfg, load, OP_LOADR8_MEMBASE);
1360         load->dreg = sel;
1361         load->inst_basereg = cfg->frame_reg;
1362         load->inst_offset = mono_spillvar_offset_float (cfg, spill);
1363         if (item->prev) {
1364                 while (ins->next != item->prev->data)
1365                         ins = ins->next;
1366         }
1367         load->next = ins->next;
1368         ins->next = load;
1369         DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%sp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1370         i = mono_regstate_alloc_float (cfg->rs, 1 << sel);
1371         g_assert (i == sel);
1372
1373         return sel;
1374 }
1375
1376 static MonoInst*
1377 create_copy_ins (MonoCompile *cfg, int dest, int src, MonoInst *ins)
1378 {
1379         MonoInst *copy;
1380         MONO_INST_NEW (cfg, copy, OP_MOVE);
1381         copy->dreg = dest;
1382         copy->sreg1 = src;
1383         if (ins) {
1384                 copy->next = ins->next;
1385                 ins->next = copy;
1386         }
1387         DEBUG (g_print ("\tforced copy from %s to %s\n", mono_arch_regname (src), mono_arch_regname (dest)));
1388         return copy;
1389 }
1390
1391 static MonoInst*
1392 create_copy_ins_float (MonoCompile *cfg, int dest, int src, MonoInst *ins)
1393 {
1394         MonoInst *copy;
1395         MONO_INST_NEW (cfg, copy, OP_FMOVE);
1396         copy->dreg = dest;
1397         copy->sreg1 = src;
1398         if (ins) {
1399                 copy->next = ins->next;
1400                 ins->next = copy;
1401         }
1402         DEBUG (g_print ("\tforced copy from %s to %s\n", mono_arch_regname (src), mono_arch_regname (dest)));
1403         return copy;
1404 }
1405
1406 static MonoInst*
1407 create_spilled_store (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins)
1408 {
1409         MonoInst *store;
1410         MONO_INST_NEW (cfg, store, OP_STORE_MEMBASE_REG);
1411         store->sreg1 = reg;
1412         store->inst_destbasereg = cfg->frame_reg;
1413         store->inst_offset = mono_spillvar_offset (cfg, spill);
1414         if (ins) {
1415                 store->next = ins->next;
1416                 ins->next = store;
1417         }
1418         DEBUG (g_print ("SPILLED STORE (%d at 0x%08x(%%sp)) R%d (from %s)\n", spill, store->inst_offset, prev_reg, mono_arch_regname (reg)));
1419         return store;
1420 }
1421
1422 static MonoInst*
1423 create_spilled_store_float (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins)
1424 {
1425         MonoInst *store;
1426         MONO_INST_NEW (cfg, store, OP_STORER8_MEMBASE_REG);
1427         store->sreg1 = reg;
1428         store->inst_destbasereg = cfg->frame_reg;
1429         store->inst_offset = mono_spillvar_offset_float (cfg, spill);
1430         if (ins) {
1431                 store->next = ins->next;
1432                 ins->next = store;
1433         }
1434         DEBUG (g_print ("SPILLED STORE (%d at 0x%08x(%%sp)) R%d (from %s)\n", spill, store->inst_offset, prev_reg, mono_arch_regname (reg)));
1435         return store;
1436 }
1437
1438 static void
1439 insert_before_ins (MonoInst *ins, InstList *item, MonoInst* to_insert)
1440 {
1441         MonoInst *prev;
1442         g_assert (item->next);
1443         prev = item->next->data;
1444
1445         while (prev->next != ins)
1446                 prev = prev->next;
1447         to_insert->next = ins;
1448         prev->next = to_insert;
1449         /*
1450          * needed otherwise in the next instruction we can add an ins to the
1451          * end and that would get past this instruction.
1452          */
1453         item->data = to_insert;
1454 }
1455
1456 static int
1457 alloc_int_reg (MonoCompile *cfg, InstList *curinst, MonoInst *ins, int sym_reg, guint32 allow_mask)
1458 {
1459         int val = cfg->rs->iassign [sym_reg];
1460         if (val < 0) {
1461                 int spill = 0;
1462                 if (val < -1) {
1463                         /* the register gets spilled after this inst */
1464                         spill = -val -1;
1465                 }
1466                 val = mono_regstate_alloc_int (cfg->rs, allow_mask);
1467                 if (val < 0)
1468                         val = get_register_spilling (cfg, curinst, ins, allow_mask, sym_reg);
1469                 cfg->rs->iassign [sym_reg] = val;
1470                 /* add option to store before the instruction for src registers */
1471                 if (spill)
1472                         create_spilled_store (cfg, spill, val, sym_reg, ins);
1473         }
1474         cfg->rs->isymbolic [val] = sym_reg;
1475         return val;
1476 }
1477
1478 /* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
1479
1480 /*
1481  * Local register allocation.
1482  * We first scan the list of instructions and we save the liveness info of
1483  * each register (when the register is first used, when it's value is set etc.).
1484  * We also reverse the list of instructions (in the InstList list) because assigning
1485  * registers backwards allows for more tricks to be used.
1486  */
1487 void
1488 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1489 {
1490         MonoInst *ins;
1491         MonoRegState *rs = cfg->rs;
1492         int i, val;
1493         RegTrack *reginfo, *reginfof;
1494         RegTrack *reginfo1, *reginfo2, *reginfod;
1495         InstList *tmp, *reversed = NULL;
1496         const char *spec;
1497         guint32 src1_mask, src2_mask, dest_mask;
1498         guint32 cur_iregs, cur_fregs;
1499
1500         /* FIXME: clobbering */
1501
1502         if (!bb->code)
1503                 return;
1504         rs->next_vireg = bb->max_ireg;
1505         rs->next_vfreg = bb->max_freg;
1506         mono_regstate_assign (rs);
1507         reginfo = mono_mempool_alloc0 (cfg->mempool, sizeof (RegTrack) * rs->next_vireg);
1508         reginfof = mono_mempool_alloc0 (cfg->mempool, sizeof (RegTrack) * rs->next_vfreg);
1509         rs->ifree_mask = ARCH_CALLER_REGS;
1510         rs->ffree_mask = ARCH_CALLER_FREGS;
1511
1512         ins = bb->code;
1513         i = 1;
1514         DEBUG (g_print ("LOCAL regalloc: basic block: %d\n", bb->block_num));
1515         /* forward pass on the instructions to collect register liveness info */
1516         while (ins) {
1517                 spec = ins_spec [ins->opcode];
1518                 g_assert (spec);
1519                 DEBUG (print_ins (i, ins));
1520
1521                 if (spec [MONO_INST_SRC1]) {
1522                         if (spec [MONO_INST_SRC1] == 'f')
1523                                 reginfo1 = reginfof;
1524                         else
1525                                 reginfo1 = reginfo;
1526                         reginfo1 [ins->sreg1].prev_use = reginfo1 [ins->sreg1].last_use;
1527                         reginfo1 [ins->sreg1].last_use = i;
1528                 } else {
1529                         ins->sreg1 = -1;
1530                 }
1531                 if (spec [MONO_INST_SRC2]) {
1532                         if (spec [MONO_INST_SRC2] == 'f')
1533                                 reginfo2 = reginfof;
1534                         else
1535                                 reginfo2 = reginfo;
1536                         reginfo2 [ins->sreg2].prev_use = reginfo2 [ins->sreg2].last_use;
1537                         reginfo2 [ins->sreg2].last_use = i;
1538                 } else {
1539                         ins->sreg2 = -1;
1540                 }
1541                 if (spec [MONO_INST_DEST]) {
1542                         if (spec [MONO_INST_DEST] == 'f')
1543                                 reginfod = reginfof;
1544                         else
1545                                 reginfod = reginfo;
1546                         if (spec [MONO_INST_DEST] != 'b') /* it's not just a base register */
1547                                 reginfod [ins->dreg].killed_in = i;
1548                         reginfod [ins->dreg].prev_use = reginfod [ins->dreg].last_use;
1549                         reginfod [ins->dreg].last_use = i;
1550                         if (reginfod [ins->dreg].born_in == 0 || reginfod [ins->dreg].born_in > i)
1551                                 reginfod [ins->dreg].born_in = i;
1552                         if (spec [MONO_INST_DEST] == 'l') {
1553                                 /* result in eax:edx, the virtual register is allocated sequentially */
1554                                 reginfod [ins->dreg + 1].prev_use = reginfod [ins->dreg + 1].last_use;
1555                                 reginfod [ins->dreg + 1].last_use = i;
1556                                 if (reginfod [ins->dreg + 1].born_in == 0 || reginfod [ins->dreg + 1].born_in > i)
1557                                         reginfod [ins->dreg + 1].born_in = i;
1558                         }
1559                 } else {
1560                         ins->dreg = -1;
1561                 }
1562                 reversed = inst_list_prepend (cfg->mempool, reversed, ins);
1563                 ++i;
1564                 ins = ins->next;
1565         }
1566
1567         cur_iregs = ARCH_CALLER_REGS;
1568         cur_fregs = ARCH_CALLER_FREGS;
1569
1570         DEBUG (print_regtrack (reginfo, rs->next_vireg));
1571         DEBUG (print_regtrack (reginfof, rs->next_vfreg));
1572         tmp = reversed;
1573         while (tmp) {
1574                 int prev_dreg, prev_sreg1, prev_sreg2;
1575                 --i;
1576                 ins = tmp->data;
1577                 spec = ins_spec [ins->opcode];
1578                 DEBUG (g_print ("processing:"));
1579                 DEBUG (print_ins (i, ins));
1580
1581                 /* make the register available for allocation: FIXME add fp reg */
1582                 if (ins->opcode == OP_SETREG || ins->opcode == OP_SETREGIMM) {
1583                         /* Dont free register which can't be allocated */
1584                         if (reg_is_freeable (ins->dreg)) {
1585                                 cur_iregs |= 1 << ins->dreg;
1586                                 if (ins->dreg == sparc_o0)
1587                                         printf ("OOPS.\n");
1588                                 DEBUG (g_print ("adding %d to cur_iregs\n", ins->dreg));
1589                         }
1590                 } else if (ins->opcode == OP_SETFREG) {
1591                         if (freg_is_freeable (ins->dreg)) {
1592                                 cur_fregs |= 1 << ins->dreg;
1593                                 DEBUG (g_print ("adding %d to cur_fregs\n", ins->dreg));
1594                         }
1595                 } else if (spec [MONO_INST_CLOB] == 'c') {
1596                         MonoCallInst *cinst = (MonoCallInst*)ins;
1597                         DEBUG (g_print ("excluding regs 0x%x from cur_iregs (0x%x)\n", cinst->used_iregs, cur_iregs));
1598                         cur_iregs &= ~cinst->used_iregs;
1599                         cur_fregs &= ~cinst->used_fregs;
1600                         DEBUG (g_print ("available cur_iregs: 0x%x\n", cur_iregs));
1601                         /* registers used by the calling convention are excluded from
1602                          * allocation: they will be selectively enabled when they are
1603                          * assigned by the special SETREG opcodes.
1604                          */
1605                 }
1606                 dest_mask = src1_mask = src2_mask = cur_iregs;
1607
1608                 /*
1609                  * DEST
1610                  */
1611                 /* update for use with FP regs... */
1612                 if (spec [MONO_INST_DEST] == 'f') {
1613                         if (ins->dreg >= MONO_MAX_FREGS) {
1614                                 val = rs->fassign [ins->dreg];
1615                                 prev_dreg = ins->dreg;
1616                                 if (val < 0) {
1617                                         int spill = 0;
1618                                         if (val < -1) {
1619                                                 /* the register gets spilled after this inst */
1620                                                 spill = -val -1;
1621                                         }
1622                                         dest_mask = cur_fregs;
1623                                         val = mono_regstate_alloc_float (rs, dest_mask);
1624                                         if (val < 0)
1625                                                 val = get_float_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1626                                         rs->fassign [ins->dreg] = val;
1627                                         if (spill)
1628                                                 create_spilled_store_float (cfg, spill, val, prev_dreg, ins);
1629                                 }
1630                                 DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
1631                                 rs->fsymbolic [val] = prev_dreg;
1632                                 ins->dreg = val;
1633                         } else {
1634                                 prev_dreg = -1;
1635                         }
1636                         if (freg_is_freeable (ins->dreg) && prev_dreg >= 0 && (reginfo [prev_dreg].born_in >= i || !(cur_fregs & (1 << ins->dreg)))) {
1637                                 DEBUG (g_print ("\tfreeable %s (R%d) (born in %d)\n", mono_arch_regname (ins->dreg), prev_dreg, reginfo [prev_dreg].born_in));
1638                                 mono_regstate_free_float (rs, ins->dreg);
1639                         }
1640                 } else if (ins->dreg >= MONO_MAX_IREGS) {
1641                         val = rs->iassign [ins->dreg];
1642                         prev_dreg = ins->dreg;
1643                         if (val < 0) {
1644                                 int spill = 0;
1645                                 if (val < -1) {
1646                                         /* the register gets spilled after this inst */
1647                                         spill = -val -1;
1648                                 }
1649                                 val = mono_regstate_alloc_int (rs, dest_mask);
1650                                 if (val < 0)
1651                                         val = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1652                                 rs->iassign [ins->dreg] = val;
1653                                 if (spill)
1654                                         create_spilled_store (cfg, spill, val, prev_dreg, ins);
1655                         }
1656                         DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
1657                         rs->isymbolic [val] = prev_dreg;
1658                         ins->dreg = val;
1659                         if (spec [MONO_INST_DEST] == 'l') {
1660                                 int hreg = prev_dreg + 1;
1661                                 val = rs->iassign [hreg];
1662                                 if (val < 0) {
1663                                         int spill = 0;
1664                                         if (val < -1) {
1665                                                 /* the register gets spilled after this inst */
1666                                                 spill = -val -1;
1667                                         }
1668                                         /* The second register must be a pair of the first */
1669                                         dest_mask = 1 << (rs->iassign [prev_dreg] + 1);
1670                                         val = mono_regstate_alloc_int (rs, dest_mask);
1671                                         if (val < 0)
1672                                                 val = get_register_spilling (cfg, tmp, ins, dest_mask, hreg);
1673                                         rs->iassign [hreg] = val;
1674                                         if (spill)
1675                                                 create_spilled_store (cfg, spill, val, hreg, ins);
1676                                 }
1677                                 else {
1678                                         /* The second register must be a pair of the first */
1679                                         if (val != rs->iassign [prev_dreg] + 1) {
1680                                                 dest_mask = 1 << (rs->iassign [prev_dreg] + 1);
1681
1682                                                 val = mono_regstate_alloc_int (rs, dest_mask);
1683                                                 if (val < 0)
1684                                                         val = get_register_spilling (cfg, tmp, ins, dest_mask, hreg);
1685
1686                                                 create_copy_ins (cfg, rs->iassign [hreg], val, ins);
1687
1688                                                 rs->iassign [hreg] = val;
1689                                         }
1690                                 }
1691
1692                                 DEBUG (g_print ("\tassigned hreg %s to dest R%d\n", mono_arch_regname (val), hreg));
1693                                 rs->isymbolic [val] = hreg;
1694
1695                                 if (reg_is_freeable (val) && hreg >= 0 && (reginfo [hreg].born_in >= i && !(cur_iregs & (1 << val)))) {
1696                                         DEBUG (g_print ("\tfreeable %s (R%d)\n", mono_arch_regname (val), hreg));
1697                                         mono_regstate_free_int (rs, val);
1698                                 }
1699                         }
1700                 } else {
1701                         prev_dreg = -1;
1702                 }
1703                 if (spec [MONO_INST_DEST] != 'f' && reg_is_freeable (ins->dreg) && prev_dreg >= 0 && (reginfo [prev_dreg].born_in >= i)) {
1704                         DEBUG (g_print ("\tfreeable %s (R%d) (born in %d)\n", mono_arch_regname (ins->dreg), prev_dreg, reginfo [prev_dreg].born_in));
1705                         mono_regstate_free_int (rs, ins->dreg);
1706                 }
1707
1708                 /**
1709                  * SRC1
1710                  */
1711                 if (spec [MONO_INST_SRC1] == 'f') {
1712                         if (ins->sreg1 >= MONO_MAX_FREGS) {
1713                                 val = rs->fassign [ins->sreg1];
1714                                 prev_sreg1 = ins->sreg1;
1715                                 if (val < 0) {
1716                                         int spill = 0;
1717                                         if (val < -1) {
1718                                                 /* the register gets spilled after this inst */
1719                                                 spill = -val -1;
1720                                         }
1721                                         //g_assert (val == -1); /* source cannot be spilled */
1722                                         src1_mask = cur_fregs;
1723                                         val = mono_regstate_alloc_float (rs, src1_mask);
1724                                         if (val < 0)
1725                                                 val = get_float_register_spilling (cfg, tmp, ins, src1_mask, ins->sreg1);
1726                                         rs->fassign [ins->sreg1] = val;
1727                                         DEBUG (g_print ("\tassigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1728                                         if (spill) {
1729                                                 MonoInst *store = create_spilled_store_float (cfg, spill, val, prev_sreg1, NULL);
1730                                                 insert_before_ins (ins, tmp, store);
1731                                         }
1732                                 }
1733                                 rs->fsymbolic [val] = prev_sreg1;
1734                                 ins->sreg1 = val;
1735                         } else {
1736                                 prev_sreg1 = -1;
1737                         }
1738                 } else if (ins->sreg1 >= MONO_MAX_IREGS) {
1739                         val = rs->iassign [ins->sreg1];
1740                         prev_sreg1 = ins->sreg1;
1741                         if (val < 0) {
1742                                 int spill = 0;
1743                                 if (val < -1) {
1744                                         /* the register gets spilled after this inst */
1745                                         spill = -val -1;
1746                                 }
1747                                 if (0 && ins->opcode == OP_MOVE) {
1748                                         /*
1749                                          * small optimization: the dest register is already allocated
1750                                          * but the src one is not: we can simply assign the same register
1751                                          * here and peephole will get rid of the instruction later.
1752                                          * This optimization may interfere with the clobbering handling:
1753                                          * it removes a mov operation that will be added again to handle clobbering.
1754                                          * There are also some other issues that should with make testjit.
1755                                          */
1756                                         mono_regstate_alloc_int (rs, 1 << ins->dreg);
1757                                         val = rs->iassign [ins->sreg1] = ins->dreg;
1758                                         //g_assert (val >= 0);
1759                                         DEBUG (g_print ("\tfast assigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1760                                 } else {
1761                                         //g_assert (val == -1); /* source cannot be spilled */
1762                                         val = mono_regstate_alloc_int (rs, src1_mask);
1763                                         if (val < 0)
1764                                                 val = get_register_spilling (cfg, tmp, ins, src1_mask, ins->sreg1);
1765                                         rs->iassign [ins->sreg1] = val;
1766                                         DEBUG (g_print ("\tassigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1767                                 }
1768                                 if (spill) {
1769                                         MonoInst *store = create_spilled_store (cfg, spill, val, prev_sreg1, NULL);
1770                                         insert_before_ins (ins, tmp, store);
1771                                 }
1772                         }
1773                         rs->isymbolic [val] = prev_sreg1;
1774                         ins->sreg1 = val;
1775                 } else {
1776                         prev_sreg1 = -1;
1777                 }
1778
1779                 /*
1780                  * SRC2
1781                  */
1782                 if (spec [MONO_INST_SRC2] == 'f') {
1783                         if (ins->sreg2 >= MONO_MAX_FREGS) {
1784                                 val = rs->fassign [ins->sreg2];
1785                                 prev_sreg2 = ins->sreg2;
1786                                 if (val < 0) {
1787                                         int spill = 0;
1788                                         if (val < -1) {
1789                                                 /* the register gets spilled after this inst */
1790                                                 spill = -val -1;
1791                                         }
1792                                         src2_mask = cur_fregs;
1793                                         val = mono_regstate_alloc_float (rs, src2_mask);
1794                                         if (val < 0)
1795                                                 val = get_float_register_spilling (cfg, tmp, ins, src2_mask, ins->sreg2);
1796                                         rs->fassign [ins->sreg2] = val;
1797                                         DEBUG (g_print ("\tassigned sreg2 %s to R%d\n", mono_arch_regname (val), ins->sreg2));
1798                                         if (spill)
1799                                                 create_spilled_store_float (cfg, spill, val, prev_sreg2, ins);
1800                                 }
1801                                 rs->fsymbolic [val] = prev_sreg2;
1802                                 ins->sreg2 = val;
1803                         } else {
1804                                 prev_sreg2 = -1;
1805                         }
1806                 } else if (ins->sreg2 >= MONO_MAX_IREGS) {
1807                         val = rs->iassign [ins->sreg2];
1808                         prev_sreg2 = ins->sreg2;
1809                         if (val < 0) {
1810                                 int spill = 0;
1811                                 if (val < -1) {
1812                                         /* the register gets spilled after this inst */
1813                                         spill = -val -1;
1814                                 }
1815                                 val = mono_regstate_alloc_int (rs, src2_mask);
1816                                 if (val < 0)
1817                                         val = get_register_spilling (cfg, tmp, ins, src2_mask, ins->sreg2);
1818                                 rs->iassign [ins->sreg2] = val;
1819                                 DEBUG (g_print ("\tassigned sreg2 %s to R%d\n", mono_arch_regname (val), ins->sreg2));
1820                                 if (spill)
1821                                         create_spilled_store (cfg, spill, val, prev_sreg2, ins);
1822                         }
1823                         rs->isymbolic [val] = prev_sreg2;
1824                         ins->sreg2 = val;
1825                 } else {
1826                         prev_sreg2 = -1;
1827                 }
1828
1829                 if (spec [MONO_INST_CLOB] == 'c') {
1830                         int j, s;
1831                         guint32 clob_mask = ARCH_CALLER_REGS;
1832                         for (j = 0; j < MONO_MAX_IREGS; ++j) {
1833                                 s = 1 << j;
1834                                 if ((clob_mask & s) && !(rs->ifree_mask & s) && j != ins->sreg1) {
1835                                         //g_warning ("register %s busy at call site\n", mono_arch_regname (j));
1836                                 }
1837                         }
1838                 }
1839                 /*if (reg_is_freeable (ins->sreg1) && prev_sreg1 >= 0 && reginfo [prev_sreg1].born_in >= i) {
1840                         DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg1)));
1841                         mono_regstate_free_int (rs, ins->sreg1);
1842                 }
1843                 if (reg_is_freeable (ins->sreg2) && prev_sreg2 >= 0 && reginfo [prev_sreg2].born_in >= i) {
1844                         DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg2)));
1845                         mono_regstate_free_int (rs, ins->sreg2);
1846                 }*/
1847
1848                 //DEBUG (print_ins (i, ins));
1849
1850                 tmp = tmp->next;
1851         }
1852 }
1853
1854 static guchar*
1855 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int size, gboolean is_signed)
1856 {
1857         return code;
1858 }
1859
1860 static unsigned char*
1861 mono_emit_stack_alloc (guchar *code, MonoInst* tree)
1862 {
1863         NOT_IMPLEMENTED;
1864         return code;
1865 }
1866
1867 static void
1868 sparc_patch (guint8 *code, const guint8 *target)
1869 {
1870         guint32 ins = *(guint32*)code;
1871         guint32 op = ins >> 30;
1872         guint32 op2 = (ins >> 22) & 0x7;
1873         guint32 rd = (ins >> 25) & 0x1f;
1874         gint32 disp = (target - code) >> 2;
1875
1876 //      g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
1877
1878         if ((op == 0) && (op2 == 2)) {
1879                 if (!sparc_is_imm22 (disp))
1880                         NOT_IMPLEMENTED;
1881                 /* Bicc */
1882                 *(guint32*)code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1883         }
1884         else if ((op == 0) && (op2 == 6)) {
1885                 if (!sparc_is_imm22 (disp))
1886                         NOT_IMPLEMENTED;
1887                 /* FBicc */
1888                 *(guint32*)code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1889         }
1890         else if ((op == 0) && (op2 == 4)) {
1891                 guint32 ins2 = *(guint32*)(code + 4);
1892
1893                 if (((ins2 >> 30) == 2) && (((ins2 >> 19) & 0x3f) == 2)) {
1894                         /* sethi followed by or */
1895                         guint32 *p = (guint32*)code;
1896                         sparc_set (p, target, rd);
1897                         while (p <= (code + 4))
1898                                 sparc_nop (p);
1899                 }
1900                 else if ((sparc_inst_op (ins2) == 3) && (sparc_inst_imm (ins2))) {
1901                         /* sethi followed by load/store */
1902                         guint32 t = (guint32)target;
1903                         *(guint32*)code = ins | (t >> 10);
1904                         *(guint32*)(code + 4) = ins2 | (t & 0x3ff);
1905                 }
1906                 else if ((sparc_inst_op (ins2) == 2) && (sparc_inst_op3 (ins2) == 0x38) &&
1907                                  (sparc_inst_imm (ins2))) {
1908                         /* sethi followed by jmpl */
1909                         guint32 t = (guint32)target;
1910                         *(guint32*)code = ins | (t >> 10);
1911                         *(guint32*)(code + 4) = ins2 | (t & 0x3ff);
1912                 }
1913                 else
1914                         NOT_IMPLEMENTED;
1915         }
1916         else if (op == 01) {
1917                 sparc_call_simple (code, target - code);
1918         }
1919         else
1920                 NOT_IMPLEMENTED;
1921
1922 //      g_print ("patched with 0x%08x\n", ins);
1923 }
1924
1925 static guint32*
1926 emit_vret_token (MonoInst *ins, guint32 *code)
1927 {
1928         MonoCallInst *call = (MonoCallInst*)ins;
1929         guint32 size;
1930
1931         /*
1932          * The sparc ABI requires that calls to functions which return a structure
1933          * contain an additional unimpl instruction which is checked by the callee.
1934          */
1935         if (call->signature->pinvoke && MONO_TYPE_ISSTRUCT(call->signature->ret)) {
1936                 size = mono_class_native_size (call->signature->ret->data.klass, NULL);
1937                 sparc_unimp (code, size & 0xfff);
1938         }
1939
1940         return code;
1941 }
1942
1943 static guint32*
1944 emit_move_return_value (MonoInst *ins, guint32 *code)
1945 {
1946         /* Move return value to the target register */
1947         /* FIXME: do this in the local reg allocator */
1948         switch (ins->opcode) {
1949         case OP_VOIDCALL:
1950         case OP_VOIDCALL_REG:
1951         case OP_VOIDCALL_MEMBASE:
1952                 break;
1953         case CEE_CALL:
1954         case OP_CALL_REG:
1955         case OP_CALL_MEMBASE:
1956                 sparc_mov_reg_reg (code, sparc_o0, ins->dreg);
1957                 break;
1958         case OP_LCALL:
1959         case OP_LCALL_REG:
1960         case OP_LCALL_MEMBASE:
1961                 /*
1962                  * ins->dreg is the least significant reg due to the lreg: LCALL rule
1963                  * in inssel.brg.
1964                  */
1965                 sparc_mov_reg_reg (code, sparc_o0, ins->dreg + 1);
1966                 sparc_mov_reg_reg (code, sparc_o1, ins->dreg);
1967                 break;
1968         case OP_FCALL:
1969         case OP_FCALL_REG:
1970         case OP_FCALL_MEMBASE:
1971                 sparc_fmovs (code, sparc_f0, ins->dreg);
1972                 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4)
1973                         sparc_fstod (code, ins->dreg, ins->dreg);
1974                 else
1975                         sparc_fmovs (code, sparc_f1, ins->dreg + 1);
1976                 break;
1977         case OP_VCALL:
1978         case OP_VCALL_REG:
1979         case OP_VCALL_MEMBASE:
1980                 break;
1981         default:
1982                 NOT_IMPLEMENTED;
1983         }
1984
1985         return code;
1986 }
1987
1988 /*
1989  * mono_sparc_is_virtual_call:
1990  *
1991  *  Determine whenever the instruction at CODE is a virtual call.
1992  */
1993 gboolean
1994 mono_sparc_is_virtual_call (guint32 *code)
1995 {
1996         guint32 buf[1];
1997         guint32 *p;
1998
1999         p = buf;
2000
2001         if ((sparc_inst_op (*code) == 0x2) && (sparc_inst_op3 (*code) == 0x38)) {
2002                 /*
2003                  * Register indirect call. If it is a virtual call, then the
2004                  * instruction in the delay slot is a special kind of nop.
2005                  */
2006
2007                 /* Construct special nop */
2008                 sparc_or_imm (p, FALSE, sparc_g0, 0xca, sparc_g0);
2009                 p --;
2010
2011                 if (code [1] == p [0])
2012                         return TRUE;
2013         }
2014
2015         return FALSE;
2016 }
2017
2018 /*
2019  * Some conventions used in the following code.
2020  * 2) The only scratch registers we have are o7 and g1.  We try to
2021  * stick to o7 when we can, and use g1 when necessary.
2022  */
2023
2024 void
2025 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2026 {
2027         MonoInst *ins;
2028         MonoCallInst *call;
2029         guint offset;
2030         guint32 *code = (guint32*)(cfg->native_code + cfg->code_len);
2031         MonoInst *last_ins = NULL;
2032         guint last_offset = 0;
2033         int max_len, cpos;
2034
2035         if (cfg->opt & MONO_OPT_PEEPHOLE)
2036                 peephole_pass (cfg, bb);
2037
2038         if (cfg->verbose_level > 2)
2039                 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2040
2041         cpos = bb->max_offset;
2042
2043         if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2044                 NOT_IMPLEMENTED;
2045         }
2046
2047         ins = bb->code;
2048         while (ins) {
2049                 offset = (guint8*)code - cfg->native_code;
2050
2051                 max_len = ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
2052
2053                 if (offset > (cfg->code_size - max_len - 16)) {
2054                         cfg->code_size *= 2;
2055                         cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2056                         code = (guint32*)(cfg->native_code + offset);
2057                 }
2058                 //      if (ins->cil_code)
2059                 //              g_print ("cil code\n");
2060
2061                 switch (ins->opcode) {
2062                 case OP_STOREI1_MEMBASE_IMM:
2063                         EMIT_STORE_MEMBASE_IMM (ins, stb);
2064                         break;
2065                 case OP_STOREI2_MEMBASE_IMM:
2066                         EMIT_STORE_MEMBASE_IMM (ins, sth);
2067                         break;
2068                 case OP_STORE_MEMBASE_IMM:
2069                 case OP_STOREI4_MEMBASE_IMM:
2070                         EMIT_STORE_MEMBASE_IMM (ins, st);
2071                         break;
2072                 case OP_STOREI1_MEMBASE_REG:
2073                         EMIT_STORE_MEMBASE_REG (ins, stb);
2074                         break;
2075                 case OP_STOREI2_MEMBASE_REG:
2076                         EMIT_STORE_MEMBASE_REG (ins, sth);
2077                         break;
2078                 case OP_STORE_MEMBASE_REG:
2079                 case OP_STOREI4_MEMBASE_REG:
2080                         EMIT_STORE_MEMBASE_REG (ins, st);
2081                         break;
2082                 case OP_STOREI8_MEMBASE_REG:
2083                         /* Only used by OP_MEMSET */
2084                         EMIT_STORE_MEMBASE_REG (ins, std);
2085                         break;
2086                 case CEE_LDIND_I:
2087                 case CEE_LDIND_I4:
2088                 case CEE_LDIND_U4:
2089                         sparc_ld (code, ins->inst_p0, sparc_g0, ins->dreg);
2090                         break;
2091                 /* The cast IS BAD (maybe).  But it needs to be done... */
2092                 case OP_LOADU4_MEM:
2093                         sparc_set (code, (guint)ins->inst_p0, ins->dreg);
2094                         sparc_ld (code, ins->dreg, sparc_g0, ins->dreg);
2095                         break;
2096                 case OP_LOAD_MEMBASE:
2097                 case OP_LOADI4_MEMBASE:
2098                 case OP_LOADU4_MEMBASE:
2099                         EMIT_LOAD_MEMBASE (ins, ld);
2100                         break;
2101                 case OP_LOADU1_MEMBASE:
2102                         EMIT_LOAD_MEMBASE (ins, ldub);
2103                         break;
2104                 case OP_LOADI1_MEMBASE:
2105                         EMIT_LOAD_MEMBASE (ins, ldsb);
2106                         break;
2107                 case OP_LOADU2_MEMBASE:
2108                         EMIT_LOAD_MEMBASE (ins, lduh);
2109                         break;
2110                 case OP_LOADI2_MEMBASE:
2111                         EMIT_LOAD_MEMBASE (ins, ldsh);
2112                         break;
2113                 case CEE_CONV_I1:
2114                         sparc_sll_imm (code, ins->sreg1, 24, sparc_o7);
2115                         sparc_sra_imm (code, sparc_o7, 24, ins->dreg);
2116                         break;
2117                 case CEE_CONV_I2:
2118                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2119                         sparc_sra_imm (code, sparc_o7, 16, ins->dreg);
2120                         break;
2121                 /* GCC does this one differently.  Don't ask me WHY. */
2122                 case CEE_CONV_U1:
2123                         sparc_and_imm (code, FALSE, ins->sreg1, 0xff, ins->dreg);
2124                         break;
2125                 case CEE_CONV_U2:
2126                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2127                         sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
2128                         break;
2129                 case OP_COMPARE:
2130                         sparc_cmp (code, ins->sreg1, ins->sreg2);
2131                         break;
2132                 case OP_COMPARE_IMM:
2133                         if (sparc_is_imm13 (ins->inst_imm))
2134                                 sparc_cmp_imm (code, ins->sreg1, ins->inst_imm);
2135                         else {
2136                                 sparc_set (code, ins->inst_imm, sparc_o7);
2137                                 sparc_cmp (code, ins->sreg1, sparc_o7);
2138                         }
2139                         break;
2140                 case OP_X86_TEST_NULL:
2141                         sparc_cmp_imm (code, ins->sreg1, 0);
2142                         break;
2143                 case CEE_BREAK:
2144                         /*
2145                          * gdb does not like encountering 'ta 1' in the debugged code. So
2146                          * instead of emitting a trap, we emit a call a C function and place a
2147                          * breakpoint there.
2148                          */
2149                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, mono_sparc_break);
2150                         sparc_call_simple (code, 0);
2151                         sparc_nop (code);
2152                         break;
2153                 case OP_ADDCC:
2154                         sparc_add (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2155                         break;
2156                 case CEE_ADD:
2157                         sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2158                         break;
2159                 case OP_ADD_IMM:
2160                         EMIT_ALU_IMM (ins, add, FALSE);
2161                         break;
2162                 case OP_ADC:
2163                         /* according to inssel-long32.brg, this should set cc */
2164                         sparc_addx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2165                         break;
2166                 case OP_ADC_IMM:
2167                         EMIT_ALU_IMM (ins, addx, TRUE);
2168                         break;
2169                 case OP_SUBCC:
2170                         sparc_sub (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2171                         break;
2172                 case CEE_SUB:
2173                         sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2174                         break;
2175                 case OP_SUB_IMM:
2176                         // we add the negated value
2177                         if (sparc_is_imm13 (- ins->inst_imm))
2178                                 sparc_add_imm (code, FALSE, ins->sreg1, -ins->inst_imm, ins->dreg);
2179                         else {
2180                                 sparc_set (code, - ins->inst_imm, sparc_o7);
2181                                 sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2182                         }
2183                         break;
2184                 case OP_SBB:
2185                         /* according to inssel-long32.brg, this should set cc */
2186                         sparc_subx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2187                         break;
2188                 case OP_SBB_IMM:
2189                         EMIT_ALU_IMM (ins, subx, TRUE);
2190                         break;
2191                 case CEE_AND:
2192                         sparc_and (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2193                         break;
2194                 case OP_AND_IMM:
2195                         EMIT_ALU_IMM (ins, and, FALSE);
2196                         break;
2197                 case CEE_DIV:
2198                         /* Sign extend sreg1 into %y */
2199                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2200                         sparc_wry (code, sparc_o7, sparc_g0);
2201                         sparc_sdiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2202                         break;
2203                 case CEE_DIV_UN:
2204                         sparc_wry (code, sparc_g0, sparc_g0);
2205                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2206                         break;
2207                 case OP_DIV_IMM:
2208                         /* Sign extend sreg1 into %y */
2209                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2210                         sparc_wry (code, sparc_o7, sparc_g0);
2211                         EMIT_ALU_IMM (ins, sdiv, FALSE);
2212                         break;
2213                 case CEE_REM:
2214                         /* Sign extend sreg1 into %y */
2215                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2216                         sparc_wry (code, sparc_o7, sparc_g0);
2217                         sparc_sdiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2218                         sparc_smul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2219                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2220                         break;
2221                 case CEE_REM_UN:
2222                         sparc_wry (code, sparc_g0, sparc_g0);
2223                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2224                         sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2225                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2226                         break;
2227                 case OP_REM_IMM:
2228                         /* Sign extend sreg1 into %y */
2229                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2230                         sparc_wry (code, sparc_o7, sparc_g0);
2231                         if (!sparc_is_imm13 (ins->inst_imm)) {
2232                                 sparc_set (code, ins->inst_imm, sparc_g1);
2233                                 sparc_sdiv (code, FALSE, ins->sreg1, sparc_g1, sparc_o7);
2234                                 sparc_smul (code, FALSE, sparc_o7, sparc_g1, sparc_o7);
2235                         }
2236                         else {
2237                                 sparc_sdiv_imm (code, FALSE, ins->sreg1, ins->inst_imm, sparc_o7);
2238                                 sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
2239                         }
2240                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2241                         break;
2242                 case CEE_OR:
2243                         sparc_or (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2244                         break;
2245                 case OP_OR_IMM:
2246                         EMIT_ALU_IMM (ins, or, FALSE);
2247                         break;
2248                 case CEE_XOR:
2249                         sparc_xor (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2250                         break;
2251                 case OP_XOR_IMM:
2252                         EMIT_ALU_IMM (ins, xor, FALSE);
2253                         break;
2254                 case CEE_SHL:
2255                         sparc_sll (code, ins->sreg1, ins->sreg2, ins->dreg);
2256                         break;
2257                 case OP_SHL_IMM:
2258                         if (sparc_is_imm13 (ins->inst_imm))
2259                                 sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2260                         else {
2261                                 sparc_set (code, ins->inst_imm, sparc_o7);
2262                                 sparc_sll (code, ins->sreg1, sparc_o7, ins->dreg);
2263                         }
2264                         break;
2265                 case CEE_SHR:
2266                         sparc_sra (code, ins->sreg1, ins->sreg2, ins->dreg);
2267                         break;
2268                 case OP_SHR_IMM:
2269                         if (sparc_is_imm13 (ins->inst_imm))
2270                                 sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2271                         else {
2272                                 sparc_set (code, ins->inst_imm, sparc_o7);
2273                                 sparc_sra (code, ins->sreg1, sparc_o7, ins->dreg);
2274                         }
2275                         break;
2276                 case OP_SHR_UN_IMM:
2277                         if (sparc_is_imm13 (ins->inst_imm))
2278                                 sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2279                         else {
2280                                 sparc_set (code, ins->inst_imm, sparc_o7);
2281                                 sparc_srl (code, ins->sreg1, sparc_o7, ins->dreg);
2282                         }
2283                         break;
2284                 case CEE_SHR_UN:
2285                         sparc_srl (code, ins->sreg1, ins->sreg2, ins->dreg);
2286                         break;
2287                 case CEE_NOT:
2288                         /* can't use sparc_not */
2289                         sparc_xnor (code, FALSE, ins->sreg1, sparc_g0, ins->dreg);
2290                         break;
2291                 case CEE_NEG:
2292                         /* can't use sparc_neg */
2293                         sparc_sub (code, FALSE, sparc_g0, ins->sreg1, ins->dreg);
2294                         break;
2295                 case CEE_MUL:
2296                         sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2297                         break;
2298                 case OP_MUL_IMM:
2299                         EMIT_ALU_IMM (ins, smul, FALSE);
2300                         break;
2301                 case CEE_MUL_OVF:
2302                         sparc_smul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2303                         sparc_rdy (code, sparc_g1);
2304                         sparc_sra_imm (code, ins->dreg, 31, sparc_o7);
2305                         sparc_cmp (code, sparc_g1, sparc_o7);
2306                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_bne, "OverflowException");
2307                         break;
2308                 case CEE_MUL_OVF_UN:
2309                         sparc_umul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2310                         sparc_rdy (code, sparc_o7);
2311                         sparc_cmp (code, sparc_o7, sparc_g0);
2312                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_bne, "OverflowException");
2313                         break;
2314                 case OP_ICONST:
2315                 case OP_SETREGIMM:
2316                         sparc_set (code, ins->inst_c0, ins->dreg);
2317                         break;
2318                 case CEE_CONV_I4:
2319                 case CEE_CONV_U4:
2320                 case OP_MOVE:
2321                 case OP_SETREG:
2322                         if (ins->sreg1 != ins->dreg)
2323                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2324                         break;
2325                 case CEE_JMP:
2326                         g_assert_not_reached ();
2327                         break;
2328                 case OP_CHECK_THIS:
2329                         /* ensure ins->sreg1 is not NULL */
2330                         sparc_ld_imm (code, ins->sreg1, 0, sparc_g0);
2331                         break;
2332                 case OP_FCALL:
2333                 case OP_LCALL:
2334                 case OP_VCALL:
2335                 case OP_VOIDCALL:
2336                 case CEE_CALL:
2337                         call = (MonoCallInst*)ins;
2338                         g_assert (!call->virtual);
2339                         if (ins->flags & MONO_INST_HAS_METHOD)
2340                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD, call->method);
2341                         else
2342                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, call->fptr);
2343                         sparc_call_simple (code, 0);
2344                         sparc_nop (code);
2345
2346                         code = emit_vret_token (ins, code);
2347                         code = emit_move_return_value (ins, code);
2348                         break;
2349                 case OP_FCALL_REG:
2350                 case OP_LCALL_REG:
2351                 case OP_VCALL_REG:
2352                 case OP_VOIDCALL_REG:
2353                 case OP_CALL_REG:
2354                         call = (MonoCallInst*)ins;
2355                         sparc_jmpl (code, ins->sreg1, sparc_g0, sparc_callsite);
2356                         /*
2357                          * We emit a special kind of nop in the delay slot to tell the
2358                          * trampoline code that this is a virtual call, thus an unbox
2359                          * trampoline might need to be called.
2360                          */
2361                         if (call->virtual)
2362                                 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2363                         else
2364                                 sparc_nop (code);
2365
2366                         code = emit_vret_token (ins, code);
2367                         code = emit_move_return_value (ins, code);
2368                         break;
2369                 case OP_FCALL_MEMBASE:
2370                 case OP_LCALL_MEMBASE:
2371                 case OP_VCALL_MEMBASE:
2372                 case OP_VOIDCALL_MEMBASE:
2373                 case OP_CALL_MEMBASE:
2374                         call = (MonoCallInst*)ins;
2375                         g_assert (sparc_is_imm13 (ins->inst_offset));
2376
2377                         sparc_ld_imm (code, ins->inst_basereg, ins->inst_offset, sparc_o7);
2378                         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_callsite);
2379                         if (call->virtual)
2380                                 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2381                         else
2382                                 sparc_nop (code);
2383
2384                         code = emit_vret_token (ins, code);
2385                         code = emit_move_return_value (ins, code);
2386                         break;
2387                 case OP_SETFRET:
2388                         if (cfg->method->signature->ret->type == MONO_TYPE_R4)
2389                                 sparc_fdtos (code, ins->sreg1, sparc_f0);
2390                         else {
2391                                 sparc_fmovs (code, ins->sreg1, ins->dreg);
2392                                 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2393                         }
2394                         break;
2395                 case OP_OUTARG:
2396                         g_assert_not_reached ();
2397                         break;
2398                 case OP_LOCALLOC:
2399                         /* Keep alignment */
2400                         sparc_add_imm (code, FALSE, ins->sreg1, MONO_ARCH_FRAME_ALIGNMENT - 1, ins->dreg);
2401                         sparc_set (code, ~(MONO_ARCH_FRAME_ALIGNMENT - 1), sparc_o7);
2402                         sparc_and (code, FALSE, ins->dreg, sparc_o7, ins->dreg);
2403                         sparc_sub (code, FALSE, sparc_sp, ins->dreg, ins->dreg);
2404                         /* Keep %sp valid at all times */
2405                         sparc_mov_reg_reg (code, ins->dreg, sparc_sp);
2406                         g_assert (sparc_is_imm13 (cfg->arch.localloc_offset));
2407                         sparc_add_imm (code, FALSE, ins->dreg, cfg->arch.localloc_offset, ins->dreg);
2408                         break;
2409                 case OP_SPARC_LOCALLOC_IMM: {
2410                         guint32 offset = ins->inst_c0;
2411                         offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
2412                         if (sparc_is_imm13 (offset))
2413                                 sparc_sub_imm (code, FALSE, sparc_sp, offset, sparc_sp);
2414                         else {
2415                                 sparc_set (code, offset, sparc_o7);
2416                                 sparc_sub (code, FALSE, sparc_sp, sparc_o7, sparc_sp);
2417                         }
2418                         sparc_mov_reg_reg (code, sparc_sp, ins->dreg);
2419                         g_assert (sparc_is_imm13 (cfg->arch.localloc_offset));
2420                         sparc_add_imm (code, FALSE, ins->dreg, cfg->arch.localloc_offset, ins->dreg);
2421                         break;
2422                 }
2423                 case CEE_RET:
2424                         /* The return is done in the epilog */
2425                         g_assert_not_reached ();
2426                         break;
2427                 case CEE_THROW:
2428                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_INTERNAL_METHOD,
2429                                              (gpointer)"mono_arch_throw_exception");
2430                         sparc_call_simple (code, 0);
2431                         /* Delay slot */
2432                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2433                         break;
2434                 case OP_START_HANDLER: {
2435                         /*
2436                          * The START_HANDLER instruction marks the beginning of a handler
2437                          * block. It is called using a call instruction, so %o7 contains
2438                          * the return address. Since the handler executes in the same stack
2439              * frame as the method itself, we can't use save/restore to save
2440                          * the return address. Instead, we save it into a dedicated
2441                          * variable.
2442                          */
2443                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2444                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2445                                 sparc_set (code, spvar->inst_offset, sparc_g0);
2446                                 sparc_st (code, sparc_o7, spvar->inst_basereg, sparc_g0);
2447                         }
2448                         else
2449                                 sparc_st_imm (code, sparc_o7, spvar->inst_basereg, spvar->inst_offset);
2450                         break;
2451                 }
2452                 case OP_ENDFILTER: {
2453                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2454                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2455                                 sparc_set (code, spvar->inst_offset, sparc_g0);
2456                                 sparc_ld (code, spvar->inst_basereg, sparc_g0, sparc_o7);
2457                         }
2458                         else
2459                                 sparc_ld_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
2460                         sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
2461                         /* Delay slot */
2462                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2463                         break;
2464                 }
2465                 case CEE_ENDFINALLY: {
2466                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2467                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2468                                 sparc_set (code, spvar->inst_offset, sparc_g0);
2469                                 sparc_ld (code, spvar->inst_basereg, sparc_g0, sparc_o7);
2470                         }
2471                         else
2472                                 sparc_ld_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
2473                         sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
2474                         sparc_nop (code);
2475                         break;
2476                 }
2477                 case OP_CALL_HANDLER:
2478                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2479                         sparc_call_simple (code, 0);
2480                         sparc_nop (code);
2481                         break;
2482                 case OP_LABEL:
2483                         ins->inst_c0 = (guint8*)code - cfg->native_code;
2484                         break;
2485                 case CEE_BR:
2486                         //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
2487                         if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
2488                                 break;
2489                         if (ins->flags & MONO_INST_BRLABEL) {
2490                                 if (ins->inst_i0->inst_c0) {
2491                                         gint32 disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2;
2492                                         g_assert (sparc_is_imm22 (disp));
2493                                         sparc_branch (code, 1, sparc_ba, disp);
2494                                 } else {
2495                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
2496                                         sparc_branch (code, 1, sparc_ba, 0);
2497                                 }
2498                         } else {
2499                                 if (ins->inst_target_bb->native_offset) {
2500                                         gint32 disp = (ins->inst_target_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2;
2501                                         g_assert (sparc_is_imm22 (disp));
2502                                         sparc_branch (code, 1, sparc_ba, disp);
2503                                 } else {
2504                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2505                                         sparc_branch (code, 1, sparc_ba, 0);
2506                                 }
2507                         }
2508                         sparc_nop (code);
2509                         break;
2510                 case OP_BR_REG:
2511                         sparc_jmp (code, ins->sreg1, sparc_g0);
2512                         sparc_nop (code);
2513                         break;
2514                 case OP_CEQ:
2515                 case OP_CLT:
2516                 case OP_CLT_UN:
2517                 case OP_CGT:
2518                 case OP_CGT_UN:
2519                         sparc_clr_reg (code, ins->dreg);
2520                         sparc_branch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
2521                         /* delay slot */
2522                         sparc_set (code, 1, ins->dreg);
2523                         break;
2524                 case OP_COND_EXC_EQ:
2525                 case OP_COND_EXC_NE_UN:
2526                 case OP_COND_EXC_LT:
2527                 case OP_COND_EXC_LT_UN:
2528                 case OP_COND_EXC_GT:
2529                 case OP_COND_EXC_GT_UN:
2530                 case OP_COND_EXC_GE:
2531                 case OP_COND_EXC_GE_UN:
2532                 case OP_COND_EXC_LE:
2533                 case OP_COND_EXC_LE_UN:
2534                 case OP_COND_EXC_OV:
2535                 case OP_COND_EXC_NO:
2536                 case OP_COND_EXC_C:
2537                 case OP_COND_EXC_NC:
2538                         EMIT_COND_SYSTEM_EXCEPTION (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1);
2539                         break;
2540                 case CEE_BEQ:
2541                 case CEE_BNE_UN:
2542                 case CEE_BLT:
2543                 case CEE_BLT_UN:
2544                 case CEE_BGT:
2545                 case CEE_BGT_UN:
2546                 case CEE_BGE:
2547                 case CEE_BGE_UN:
2548                 case CEE_BLE:
2549                 case CEE_BLE_UN:
2550                         EMIT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode));
2551                         break;
2552
2553                 /* floating point opcodes */
2554                 case OP_R8CONST:
2555                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
2556                         sparc_sethi (code, 0, sparc_o7);
2557                         sparc_lddf_imm (code, sparc_o7, 0, ins->dreg);
2558                         break;
2559                 case OP_R4CONST:
2560                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
2561                         sparc_sethi (code, 0, sparc_o7);
2562                         sparc_ldf_imm (code, sparc_o7, 0, ins->dreg);
2563
2564                         /* Extend to double */
2565                         sparc_fstod (code, ins->dreg, ins->dreg);
2566                         break;
2567                 case OP_STORER8_MEMBASE_REG:
2568                         if (!sparc_is_imm13 (ins->inst_offset + 4)) {
2569                                 sparc_set (code, ins->inst_offset, sparc_o7);
2570                                 if (ins->inst_offset % 8) {
2571                                         /* Misaligned */
2572                                         sparc_add (code, FALSE, ins->inst_destbasereg, sparc_o7, sparc_o7);
2573                                         sparc_stf (code, ins->sreg1, sparc_o7, sparc_g0);
2574                                         sparc_stf_imm (code, ins->sreg1 + 1, sparc_o7, 4);
2575                                 } else
2576                                         sparc_stdf (code, ins->sreg1, ins->inst_destbasereg, sparc_o7);
2577                         }
2578                         else {
2579                                 if (ins->inst_offset % 8) {
2580                                         /* Misaligned */
2581                                         sparc_stf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
2582                                         sparc_stf_imm (code, ins->sreg1 + 1, ins->inst_destbasereg, ins->inst_offset + 4);
2583                                 } else
2584                                         sparc_stdf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
2585                         }
2586                         break;
2587                 case OP_LOADR8_MEMBASE:
2588                         g_assert ((ins->inst_offset % 8) == 0);
2589                         EMIT_LOAD_MEMBASE (ins, lddf);
2590                         break;
2591                 case OP_STORER4_MEMBASE_REG:
2592                         /* This requires a double->single conversion */
2593                         sparc_fdtos (code, ins->sreg1, sparc_f0);
2594                         if (!sparc_is_imm13 (ins->inst_offset)) {
2595                                 sparc_set (code, ins->inst_offset, sparc_o7);
2596                                 sparc_stf (code, sparc_f0, ins->inst_destbasereg, sparc_o7);
2597                         }
2598                         else
2599                                 sparc_stf_imm (code, sparc_f0, ins->inst_destbasereg, ins->inst_offset);
2600                         break;
2601                 case OP_LOADR4_MEMBASE:
2602                         EMIT_LOAD_MEMBASE (ins, ldf);
2603                         /* Extend to double */
2604                         sparc_fstod (code, ins->dreg, ins->dreg);
2605                         break;
2606                 case OP_FMOVE:
2607                         sparc_fmovs (code, ins->sreg1, ins->dreg);
2608                         sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2609                         break;
2610                 case CEE_CONV_R4: {
2611                         guint32 offset = mono_spillvar_offset_float (cfg, 0);
2612                         if (!sparc_is_imm13 (offset))
2613                                 NOT_IMPLEMENTED;
2614                         sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
2615                         sparc_ldf_imm (code, sparc_sp, offset, sparc_f0);
2616                         sparc_fitos (code, sparc_f0, sparc_f0);
2617                         sparc_fstod (code, sparc_f0, ins->dreg);
2618                         break;
2619                 }
2620                 case CEE_CONV_R8: {
2621                         guint32 offset = mono_spillvar_offset_float (cfg, 0);
2622                         if (!sparc_is_imm13 (offset))
2623                                 NOT_IMPLEMENTED;
2624                         sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
2625                         sparc_ldf_imm (code, sparc_sp, offset, sparc_f0);
2626                         sparc_fitod (code, sparc_f0, ins->dreg);
2627                         break;
2628                 }
2629                 case OP_FCONV_TO_I1:
2630                 case OP_FCONV_TO_U1:
2631                 case OP_FCONV_TO_I2:
2632                 case OP_FCONV_TO_U2:
2633                 case OP_FCONV_TO_I4:
2634                 case OP_FCONV_TO_I:
2635                 case OP_FCONV_TO_U4:
2636                 case OP_FCONV_TO_U: {
2637                         guint32 offset = mono_spillvar_offset_float (cfg, 0);
2638                         if (!sparc_is_imm13 (offset))
2639                                 NOT_IMPLEMENTED;
2640                         /* FIXME: Is having the same code for all of these ok ? */
2641                         sparc_fdtoi (code, ins->sreg1, sparc_f0);
2642                         sparc_stdf_imm (code, sparc_f0, sparc_sp, offset);
2643                         sparc_ld_imm (code, sparc_sp, offset, ins->dreg);
2644                         break;
2645                 }
2646                 case OP_FCONV_TO_I8:
2647                 case OP_FCONV_TO_U8:
2648                         NOT_IMPLEMENTED;
2649                         break;
2650                 case CEE_CONV_R_UN:
2651                         NOT_IMPLEMENTED;
2652                         break;
2653                 case OP_LCONV_TO_R_UN: {
2654                         NOT_IMPLEMENTED;
2655                         break;
2656                 }
2657                 case OP_LCONV_TO_OVF_I: {
2658                         guint32 *br [3], *label [1];
2659
2660                         /*
2661                          * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
2662                          */
2663                         sparc_cmp_imm (code, ins->sreg1, 0);
2664                         br [0] = code;
2665                         sparc_branch (code, 1, sparc_bneg, 0);
2666                         sparc_nop (code);
2667
2668                         /* positive */
2669                         /* ms word must be 0 */
2670                         sparc_cmp_imm (code, ins->sreg2, 0);
2671                         br [1] = code;
2672                         sparc_branch (code, 1, sparc_be, 0);
2673                         sparc_nop (code);
2674
2675                         label [0] = code;
2676
2677                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_ba, "OverflowException");
2678
2679                         /* negative */
2680                         sparc_patch (br [0], code);
2681
2682                         /* ms word must 0xfffffff */
2683                         sparc_cmp_imm (code, ins->sreg2, -1);
2684                         br [2] = code;
2685                         sparc_branch (code, 1, sparc_bne, 0);
2686                         sparc_patch (br [2], label [0]);
2687
2688                         /* Ok */
2689                         sparc_patch (br [1], code);
2690                         if (ins->sreg1 != ins->dreg)
2691                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2692                         break;
2693                 }
2694                 case OP_FADD:
2695                         sparc_faddd (code, ins->sreg1, ins->sreg2, ins->dreg);
2696                         break;
2697                 case OP_FSUB:
2698                         sparc_fsubd (code, ins->sreg1, ins->sreg2, ins->dreg);
2699                         break;
2700                 case OP_FMUL:
2701                         sparc_fmuld (code, ins->sreg1, ins->sreg2, ins->dreg);
2702                         break;
2703                 case OP_FDIV:
2704                         sparc_fdivd (code, ins->sreg1, ins->sreg2, ins->dreg);
2705                         break;
2706                 case OP_FNEG:
2707                         sparc_fnegs (code, ins->sreg1, ins->dreg);
2708                         break;
2709                 case OP_FREM:
2710                         sparc_fdivd (code, ins->sreg1, ins->sreg2, sparc_f0);
2711                         sparc_fmuld (code, ins->sreg2, sparc_f0, sparc_f0);
2712                         sparc_fsubd (code, ins->sreg1, sparc_f0, ins->dreg);
2713                         break;
2714                 case OP_FCOMPARE:
2715                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
2716                         break;
2717                 case OP_FCEQ:
2718                 case OP_FCLT:
2719                 case OP_FCLT_UN:
2720                 case OP_FCGT:
2721                 case OP_FCGT_UN:
2722                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
2723                         sparc_clr_reg (code, ins->dreg);
2724                         switch (ins->opcode) {
2725                         case OP_FCLT_UN:
2726                         case OP_FCGT_UN:
2727                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 4);
2728                                 /* delay slot */
2729                                 sparc_set (code, 1, ins->dreg);
2730                                 sparc_fbranch (code, 1, sparc_fbu, 2);
2731                                 /* delay slot */
2732                                 sparc_set (code, 1, ins->dreg);
2733                                 break;
2734                         default:
2735                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
2736                                 /* delay slot */
2737                                 sparc_set (code, 1, ins->dreg);
2738                         }
2739                         break;
2740                 case OP_FBEQ:
2741                 case OP_FBLT:
2742                 case OP_FBGT:
2743                         EMIT_FLOAT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode));
2744                         break;
2745                 case OP_FBGE: {
2746                         /* clt.un + brfalse */
2747                         guint32 *p = code;
2748                         sparc_fbranch (code, 1, sparc_fbul, 0);
2749                         /* delay slot */
2750                         sparc_nop (code);
2751                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba);
2752                         sparc_patch ((guint8*)p, (guint8*)code);
2753                         break;
2754                 }
2755                 case OP_FBLE: {
2756                         /* cgt.un + brfalse */
2757                         guint32 *p = code;
2758                         sparc_fbranch (code, 1, sparc_fbug, 0);
2759                         /* delay slot */
2760                         sparc_nop (code);
2761                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba);
2762                         sparc_patch ((guint8*)p, (guint8*)code);
2763                         break;
2764                 }
2765                 case OP_FBNE_UN:
2766                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbne);
2767                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu);
2768                         break;
2769                 case OP_FBLT_UN:
2770                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbl);
2771                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu);
2772                         break;
2773                 case OP_FBGT_UN:
2774                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbg);
2775                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu);
2776                         break;
2777                 case OP_FBGE_UN:
2778                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbge);
2779                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu);
2780                         break;
2781                 case OP_FBLE_UN:
2782                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fble);
2783                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu);
2784                         break;
2785                 case CEE_CKFINITE: {
2786                         NOT_IMPLEMENTED;
2787                         break;
2788                 }
2789                 default:
2790 #ifdef __GNUC__
2791                         g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
2792 #else
2793                         g_warning ("%s:%d: unknown opcode %s\n", __FILE__, __LINE__, mono_inst_name (ins->opcode));
2794 #endif
2795                         g_assert_not_reached ();
2796                 }
2797
2798                 if (((guint8*)code - cfg->native_code - offset) > max_len) {
2799                         g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
2800                                    mono_inst_name (ins->opcode), max_len, (guint8*)code - cfg->native_code - offset);
2801                         g_assert_not_reached ();
2802                 }
2803
2804                 cpos += max_len;
2805
2806                 last_ins = ins;
2807                 last_offset = offset;
2808
2809                 ins = ins->next;
2810         }
2811
2812         cfg->code_len = (guint8*)code - cfg->native_code;
2813 }
2814
2815 void
2816 mono_arch_register_lowlevel_calls (void)
2817 {
2818         mono_register_jit_icall (mono_sparc_break, "mono_sparc_break", NULL, TRUE);
2819 }
2820
2821 void
2822 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
2823 {
2824         MonoJumpInfo *patch_info;
2825
2826         /* FIXME: Move part of this to arch independent code */
2827         for (patch_info = ji; patch_info; patch_info = patch_info->next) {
2828                 unsigned char *ip = patch_info->ip.i + code;
2829                 const unsigned char *target = NULL;
2830
2831                 switch (patch_info->type) {
2832                 case MONO_PATCH_INFO_BB:
2833                         target = patch_info->data.bb->native_offset + code;
2834                         break;
2835                 case MONO_PATCH_INFO_ABS:
2836                         target = patch_info->data.target;
2837                         break;
2838                 case MONO_PATCH_INFO_LABEL:
2839                         target = patch_info->data.inst->inst_c0 + code;
2840                         break;
2841                 case MONO_PATCH_INFO_IP:
2842                         target = ip;
2843                         break;
2844                 case MONO_PATCH_INFO_METHOD_REL:
2845                         target = code + patch_info->data.offset;
2846                         if (ip == 0xfdec419c)
2847                                 printf ("X: %p %p.\n", ip, target);
2848                         break;
2849                 case MONO_PATCH_INFO_INTERNAL_METHOD: {
2850                         MonoJitICallInfo *mi = mono_find_jit_icall_by_name (patch_info->data.name);
2851                         if (!mi) {
2852                                 g_warning ("unknown MONO_PATCH_INFO_INTERNAL_METHOD %s", patch_info->data.name);
2853                                 g_assert_not_reached ();
2854                         }
2855                         target = mono_icall_get_wrapper (mi);
2856                         break;
2857                 }
2858                 case MONO_PATCH_INFO_METHOD_JUMP: {
2859                         GSList *list;
2860
2861                         /* get the trampoline to the method from the domain */
2862                         target = mono_arch_create_jump_trampoline (patch_info->data.method);
2863                         if (!domain->jump_target_hash)
2864                                 domain->jump_target_hash = g_hash_table_new (NULL, NULL);
2865                         list = g_hash_table_lookup (domain->jump_target_hash, patch_info->data.method);
2866                         list = g_slist_prepend (list, ip);
2867                         g_hash_table_insert (domain->jump_target_hash, patch_info->data.method, list);
2868                         break;
2869                 }
2870                 case MONO_PATCH_INFO_METHOD:
2871                         if (patch_info->data.method == method) {
2872                                 target = code;
2873                         } else
2874                                 /* get the trampoline to the method from the domain */
2875                                 target = mono_arch_create_jit_trampoline (patch_info->data.method);
2876                         break;
2877                 case MONO_PATCH_INFO_SWITCH: {
2878                         guint32 *p = (guint32*)ip;
2879                         gpointer *jump_table = mono_code_manager_reserve (domain->code_mp, sizeof (gpointer) * patch_info->table_size);
2880                         int i;
2881
2882                         target = jump_table;
2883
2884                         for (i = 0; i < patch_info->table_size; i++) {
2885                                 jump_table [i] = code + (int)patch_info->data.table [i];
2886                         }
2887                         break;
2888                 }
2889                 case MONO_PATCH_INFO_METHODCONST:
2890                 case MONO_PATCH_INFO_CLASS:
2891                 case MONO_PATCH_INFO_IMAGE:
2892                 case MONO_PATCH_INFO_FIELD:
2893                         NOT_IMPLEMENTED;
2894                         *((gconstpointer *)(ip + 1)) = patch_info->data.target;
2895                         continue;
2896                 case MONO_PATCH_INFO_IID:
2897                         NOT_IMPLEMENTED;
2898                         mono_class_init (patch_info->data.klass);
2899                         *((guint32 *)(ip + 1)) = patch_info->data.klass->interface_id;
2900                         continue;
2901                 case MONO_PATCH_INFO_VTABLE:
2902                         NOT_IMPLEMENTED;
2903                         *((gconstpointer *)(ip + 1)) = mono_class_vtable (domain, patch_info->data.klass);
2904                         continue;
2905                 case MONO_PATCH_INFO_CLASS_INIT: {
2906                         /* Might already been changed to a nop */
2907                         target = mono_create_class_init_trampoline (mono_class_vtable (domain, patch_info->data.klass));
2908                         break;
2909                 }
2910                 case MONO_PATCH_INFO_SFLDA: {
2911                         MonoVTable *vtable = mono_class_vtable (domain, patch_info->data.field->parent);
2912                         if (!vtable->initialized && !(vtable->klass->flags & TYPE_ATTRIBUTE_BEFORE_FIELD_INIT) && mono_class_needs_cctor_run (vtable->klass, method))
2913                                 /* Done by the generated code */
2914                                 ;
2915                         else {
2916                                 if (run_cctors)
2917                                         mono_runtime_class_init (vtable);
2918                         }
2919                         NOT_IMPLEMENTED;
2920                         *((gconstpointer *)(ip + 1)) =
2921                                 (char*)vtable->data + patch_info->data.field->offset;
2922                         continue;
2923                 }
2924                 case MONO_PATCH_INFO_R4: {
2925                         float *f = g_new0 (float, 1);
2926                         *f = *(float*)patch_info->data.target;
2927                         target = f;
2928                         break;
2929                 }
2930                 case MONO_PATCH_INFO_R8: {
2931                         double *d = g_new0 (double, 1);
2932                         *d = *(double*)patch_info->data.target;
2933                         target = d;
2934                         break;
2935                 }
2936                 case MONO_PATCH_INFO_EXC_NAME:
2937                         target = patch_info->data.name;
2938                         break;
2939                 case MONO_PATCH_INFO_LDSTR:
2940                         NOT_IMPLEMENTED;
2941                         *((gconstpointer *)(ip + 1)) =
2942                                 mono_ldstr (domain, patch_info->data.token->image,
2943                                                         mono_metadata_token_index (patch_info->data.token->token));
2944                         continue;
2945                 case MONO_PATCH_INFO_TYPE_FROM_HANDLE: {
2946                         gpointer handle;
2947                         MonoClass *handle_class;
2948
2949                         handle = mono_ldtoken (patch_info->data.token->image,
2950                                                                    patch_info->data.token->token, &handle_class);
2951                         mono_class_init (handle_class);
2952                         mono_class_init (mono_class_from_mono_type (handle));
2953
2954                         NOT_IMPLEMENTED;
2955                         *((gconstpointer *)(ip + 1)) =
2956                                 mono_type_get_object (domain, handle);
2957                         continue;
2958                 }
2959                 case MONO_PATCH_INFO_LDTOKEN: {
2960                         gpointer handle;
2961                         MonoClass *handle_class;
2962
2963                         handle = mono_ldtoken (patch_info->data.token->image,
2964                                                                    patch_info->data.token->token, &handle_class);
2965                         mono_class_init (handle_class);
2966
2967                         NOT_IMPLEMENTED;
2968                         *((gconstpointer *)(ip + 1)) = handle;
2969                         continue;
2970                 }
2971                 default:
2972                         g_assert_not_reached ();
2973                 }
2974                 sparc_patch (ip, target);
2975         }
2976 }
2977
2978 /*
2979  * Allow tracing to work with this interface (with an optional argument)
2980  */
2981
2982 /*
2983  * This may be needed on some archs or for debugging support.
2984  */
2985 void
2986 mono_arch_instrument_mem_needs (MonoMethod *method, int *stack, int *code)
2987 {
2988         /* no stack room needed now (may be needed for FASTCALL-trace support) */
2989         *stack = 0;
2990         /* split prolog-epilog requirements? */
2991         *code = 256; /* max bytes needed: check this number */
2992 }
2993
2994 void*
2995 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
2996 {
2997         int stack, code_size;
2998         guint32 *code = (guint32*)p;
2999
3000         /* Save registers to stack */
3001         sparc_st_imm (code, sparc_i0, sparc_fp, 68);
3002         sparc_st_imm (code, sparc_i1, sparc_fp, 72);
3003         sparc_st_imm (code, sparc_i2, sparc_fp, 76);
3004         sparc_st_imm (code, sparc_i3, sparc_fp, 80);
3005         sparc_st_imm (code, sparc_i4, sparc_fp, 84);
3006
3007         sparc_set (code, cfg->method, sparc_o0);
3008         sparc_mov_reg_reg (code, sparc_fp, sparc_o1);
3009
3010         mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
3011         sparc_sethi (code, 0, sparc_o7);
3012         sparc_jmpl_imm (code, sparc_o7, 0, sparc_callsite);
3013         sparc_nop (code);
3014
3015         mono_arch_instrument_mem_needs (cfg->method, &stack, &code_size);
3016
3017         g_assert ((code - (guint32*)p) <= (code_size * 4));
3018
3019         return code;
3020 }
3021
3022 enum {
3023         SAVE_NONE,
3024         SAVE_STRUCT,
3025         SAVE_ONE,
3026         SAVE_TWO,
3027         SAVE_FP
3028 };
3029
3030 void*
3031 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3032 {
3033         guchar *code = p;
3034         int arg_size = 0, save_mode = SAVE_NONE;
3035         MonoMethod *method = cfg->method;
3036         int rtype = method->signature->ret->type;
3037
3038 handle_enum:
3039         switch (rtype) {
3040         case MONO_TYPE_VOID:
3041                 /* special case string .ctor icall */
3042                 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
3043                         save_mode = SAVE_ONE;
3044                 else
3045                         save_mode = SAVE_NONE;
3046                 break;
3047         case MONO_TYPE_I8:
3048         case MONO_TYPE_U8:
3049                 save_mode = SAVE_TWO;
3050                 break;
3051         case MONO_TYPE_R4:
3052         case MONO_TYPE_R8:
3053                 save_mode = SAVE_FP;
3054                 break;
3055         case MONO_TYPE_VALUETYPE:
3056                 if (method->signature->ret->data.klass->enumtype) {
3057                         rtype = method->signature->ret->data.klass->enum_basetype->type;
3058                         goto handle_enum;
3059                 }
3060                 save_mode = SAVE_STRUCT;
3061                 break;
3062         default:
3063                 save_mode = SAVE_ONE;
3064                 break;
3065         }
3066
3067         /* Save the result to the stack and also put it into the output registers */
3068
3069         switch (save_mode) {
3070         case SAVE_TWO:
3071                 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
3072                 sparc_st_imm (code, sparc_i0, sparc_fp, 72);
3073                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3074                 sparc_mov_reg_reg (code, sparc_i1, sparc_o2);
3075                 break;
3076         case SAVE_ONE:
3077                 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
3078                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3079                 break;
3080         case SAVE_FP:
3081                 sparc_stdf (code, sparc_f0, sparc_fp, 72);
3082                 sparc_ld_imm (code, sparc_fp, 72, sparc_o1);
3083                 sparc_ld_imm (code, sparc_fp, 72, sparc_o2);
3084                 break;
3085         case SAVE_STRUCT:
3086                 sparc_ld_imm (code, sparc_fp, 64, sparc_o1);
3087                 break;
3088         case SAVE_NONE:
3089         default:
3090                 break;
3091         }
3092
3093         sparc_set (code, cfg->method, sparc_o0);
3094
3095         mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
3096         sparc_sethi (code, 0, sparc_o7);
3097         sparc_jmpl_imm (code, sparc_o7, 0, sparc_callsite);
3098         sparc_nop (code);
3099
3100         /* Restore result */
3101
3102         switch (save_mode) {
3103         case SAVE_TWO:
3104                 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
3105                 sparc_ld_imm (code, sparc_fp, 72, sparc_i0);
3106                 break;
3107         case SAVE_ONE:
3108                 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
3109                 break;
3110         case SAVE_FP:
3111                 sparc_lddf_imm (code, sparc_fp, 72, sparc_f0);
3112                 break;
3113         case SAVE_NONE:
3114         default:
3115                 break;
3116         }
3117
3118         return code;
3119 }
3120
3121 int
3122 mono_arch_max_epilog_size (MonoCompile *cfg)
3123 {
3124         int exc_count = 0, max_epilog_size = 16 + 20*4;
3125         MonoJumpInfo *patch_info;
3126
3127         if (cfg->method->save_lmf)
3128                 max_epilog_size += 128;
3129
3130         if (mono_jit_trace_calls != NULL)
3131                 max_epilog_size += 50;
3132
3133         if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
3134                 max_epilog_size += 50;
3135
3136         /* count the number of exception infos */
3137
3138         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3139                 if (patch_info->type == MONO_PATCH_INFO_EXC)
3140                         exc_count++;
3141         }
3142
3143         /*
3144          * make sure we have enough space for exceptions
3145          */
3146         max_epilog_size += exc_count * 24;
3147
3148         return max_epilog_size;
3149 }
3150
3151 guint8 *
3152 mono_arch_emit_prolog (MonoCompile *cfg)
3153 {
3154         MonoMethod *method = cfg->method;
3155         MonoBasicBlock *bb;
3156         MonoMethodSignature *sig;
3157         MonoInst *inst;
3158         int alloc_size, max_offset, i;
3159         guint8 *code;
3160         CallInfo *cinfo;
3161         guint32 offset;
3162
3163         cfg->code_size = 256;
3164         code = cfg->native_code = g_malloc (cfg->code_size);
3165
3166         /* FIXME: Generate intermediate code instead */
3167
3168         offset = cfg->stack_offset;
3169         offset += 64; /* register save area */
3170         offset += 4; /* struct/union return pointer */
3171
3172         /* add parameter area size for called functions */
3173         if (cfg->param_area < 24)
3174                 /* Reserve space for the first 6 arguments even if it is unused */
3175                 offset += 24;
3176         else
3177                 offset += cfg->param_area;
3178
3179         /* align the stack size to 8 bytes */
3180         offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3181
3182         /*
3183          * localloc'd memory is stored between the local variables (whose
3184          * size is given by cfg->stack_offset), and between the space reserved
3185          * by the ABI.
3186          */
3187         cfg->arch.localloc_offset = offset - cfg->stack_offset;
3188
3189         cfg->stack_offset = offset;
3190
3191         if (!sparc_is_imm13 (- cfg->stack_offset)) {
3192                 /* Can't use sparc_o7 here, since we're still in the caller's frame */
3193                 sparc_set (code, (- cfg->stack_offset), sparc_g1);
3194                 sparc_save (code, sparc_sp, sparc_g1, sparc_sp);
3195         }
3196         else
3197                 sparc_save_imm (code, sparc_sp, - cfg->stack_offset, sparc_sp);
3198
3199         if (strstr (cfg->method->name, "test_marshal_struct")) {
3200                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
3201                 sparc_call_simple (code, 0);
3202                 sparc_nop (code);
3203         }
3204
3205         sig = method->signature;
3206
3207         cinfo = get_call_info (sig, FALSE);
3208
3209         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3210                 ArgInfo *ainfo = cinfo->args + i;
3211                 guint32 stack_offset;
3212                 MonoType *arg_type;
3213                 inst = cfg->varinfo [i];
3214
3215                 if (sig->hasthis && (i == 0))
3216                         arg_type = mono_defaults.object_class;
3217                 else
3218                         arg_type = sig->params [i - sig->hasthis];
3219
3220                 stack_offset = ainfo->offset + 68;
3221
3222                 /* Save the split arguments so they will reside entirely on the stack */
3223                 if (ainfo->storage == ArgInSplitRegStack) {
3224                         /* Save the register to the stack */
3225                         g_assert (inst->opcode == OP_REGOFFSET);
3226                         if (!sparc_is_imm13 (stack_offset))
3227                                 NOT_IMPLEMENTED;
3228                         sparc_st_imm (code, sparc_i5, inst->inst_basereg, stack_offset);
3229                 }
3230
3231                 if (arg_type->type == MONO_TYPE_R8) {
3232                         /* Save the argument to a dword aligned stack location */
3233                         /*
3234                          * stack_offset contains the offset of the argument on the stack.
3235                          * inst->inst_offset contains the dword aligned offset where the value
3236                          * should be stored.
3237                          */
3238                         if (ainfo->storage == ArgInIRegPair) {
3239                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3240                                         NOT_IMPLEMENTED;
3241                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3242                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3243                         }
3244                         else
3245                                 if (ainfo->storage == ArgInSplitRegStack) {
3246                                         if (stack_offset != inst->inst_offset) {
3247                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3248                                                 sparc_st_imm (code, sparc_i5, inst->inst_basereg, inst->inst_offset);
3249                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3250                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3251                                         }
3252                                 }
3253                         else
3254                                 if (ainfo->storage == ArgOnStackPair) {
3255                                         if (stack_offset != inst->inst_offset) {
3256                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3257                                                 sparc_ld_imm (code, sparc_fp, stack_offset, sparc_o7);
3258                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset);
3259                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3260                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3261                                         }
3262                                 }
3263                         else
3264                                 g_assert_not_reached ();
3265                 }
3266                 else
3267                         if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
3268                                 /* Argument in register, but need to be saved to stack */
3269                                 if (!sparc_is_imm13 (stack_offset))
3270                                         NOT_IMPLEMENTED;
3271                                 if (stack_offset & 0x1)
3272                                         sparc_stb_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3273                                 else
3274                                         if (stack_offset & 0x2)
3275                                                 sparc_sth_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3276                                 else
3277                                         sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3278                         }
3279                 else
3280                         if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
3281                                 /* Argument in regpair, but need to be saved to stack */
3282                                 g_assert (((inst->inst_offset) % 8) == 0);
3283                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3284                                         NOT_IMPLEMENTED;
3285                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3286                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3287                         }
3288
3289                 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
3290                         if (inst->opcode == OP_REGVAR)
3291                                 /* FIXME: Load the argument into memory */
3292                                 NOT_IMPLEMENTED;
3293         }
3294
3295         g_free (cinfo);
3296
3297         if (cfg->method->save_lmf) {
3298                 gint32 lmf_offset = - cfg->arch.lmf_offset;
3299
3300                 /* Save ip */
3301                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3302                 sparc_set (code, 0xfffffff, sparc_o7);
3303                 sparc_st_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ip));
3304                 /* Save sp */
3305                 sparc_st_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
3306                 /* Save fp */
3307                 sparc_st_imm (code, sparc_fp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebp));
3308                 /* Save method */
3309                 /* FIXME: add a relocation for this */
3310                 sparc_set (code, cfg->method, sparc_o7);
3311                 sparc_st_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method));
3312                 /* Get the address of lmf for the current thread */
3313                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3314                                                          (gpointer)"mono_get_lmf_addr");
3315                 sparc_call_simple (code, 0);
3316                 sparc_nop (code);
3317
3318                 /* Save lmf_addr */
3319                 sparc_st_imm (code, sparc_o0, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr));
3320                 /* Save previous_lmf */
3321                 sparc_ld (code, sparc_o0, sparc_g0, sparc_o7);
3322                 sparc_st_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf));
3323                 /* Set new lmf */
3324                 sparc_add_imm (code, FALSE, sparc_fp, lmf_offset, sparc_o7);
3325                 sparc_st (code, sparc_o7, sparc_o0, sparc_g0);
3326         }
3327
3328         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3329                 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
3330
3331         cfg->code_len = code - cfg->native_code;
3332
3333         g_assert (cfg->code_len <= cfg->code_size);
3334
3335         return code;
3336 }
3337
3338 void
3339 mono_arch_emit_epilog (MonoCompile *cfg)
3340 {
3341         MonoJumpInfo *patch_info;
3342         MonoMethod *method = cfg->method;
3343         int pos, i;
3344         guint8 *code;
3345
3346         code = cfg->native_code + cfg->code_len;
3347
3348         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3349                 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
3350
3351         if (cfg->method->save_lmf) {
3352                 gint32 lmf_offset = - cfg->arch.lmf_offset;
3353
3354                 /* Load previous_lmf */
3355                 sparc_ld_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), sparc_l0);
3356                 /* Load lmf_addr */
3357                 sparc_ld_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), sparc_l1);
3358                 /* *(lmf) = previous_lmf */
3359                 sparc_st (code, sparc_l0, sparc_l1, sparc_g0);
3360         }
3361
3362         sparc_ret (code);
3363         sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
3364
3365         /* add code to raise exceptions */
3366         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3367                 switch (patch_info->type) {
3368                 case MONO_PATCH_INFO_EXC:
3369                         sparc_patch (cfg->native_code + patch_info->ip.i, code);
3370                         mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC_NAME, patch_info->data.target);
3371                         sparc_set (code, 0xffffff, sparc_o0);
3372                         mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_METHOD_REL, (gpointer)patch_info->ip.i);
3373                         sparc_set (code, 0xffffff, sparc_o1);
3374                         patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
3375                         patch_info->data.name = "mono_arch_throw_exception_by_name";
3376                         patch_info->ip.i = code - cfg->native_code;
3377                         sparc_call_simple (code, 0);
3378                         sparc_nop (code);
3379                         break;
3380                 default:
3381                         /* do nothing */
3382                         break;
3383                 }
3384         }
3385
3386         cfg->code_len = code - cfg->native_code;
3387
3388         g_assert (cfg->code_len < cfg->code_size);
3389
3390 }
3391
3392 void
3393 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
3394 {
3395 }
3396
3397 void
3398 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
3399 {
3400 }
3401
3402 void
3403 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, int this_reg, int this_type, int vt_reg)
3404 {
3405         /* add the this argument */
3406         if (this_reg != -1) {
3407                 MonoInst *this;
3408                 MONO_INST_NEW (cfg, this, OP_SETREG);
3409                 this->type = this_type;
3410                 this->sreg1 = this_reg;
3411                 this->dreg = sparc_o0;
3412                 mono_bblock_add_inst (cfg->cbb, this);
3413         }
3414
3415         if (vt_reg != -1) {
3416                 /* Set the 'struct/union return pointer' location on the stack */
3417                 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, 64, vt_reg);
3418         }
3419 }
3420
3421
3422 gint
3423 mono_arch_get_opcode_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
3424 {
3425         return -1;
3426 }
3427
3428 /*
3429  * mono_arch_get_argument_info:
3430  * @csig:  a method signature
3431  * @param_count: the number of parameters to consider
3432  * @arg_info: an array to store the result infos
3433  *
3434  * Gathers information on parameters such as size, alignment and
3435  * padding. arg_info should be large enought to hold param_count + 1 entries.
3436  *
3437  * Returns the size of the activation frame.
3438  */
3439 int
3440 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
3441 {
3442         int k, frame_size = 0;
3443         int size, align, pad;
3444         int offset = 8;
3445         CallInfo *cinfo;
3446         ArgInfo *ainfo;
3447
3448         cinfo = get_call_info (csig, FALSE);
3449
3450         if (csig->hasthis) {
3451                 ainfo = &cinfo->args [0];
3452                 arg_info [0].offset = 68 + ainfo->offset;
3453         }
3454
3455         for (k = 0; k < param_count; k++) {
3456                 ainfo = &cinfo->args [k + csig->hasthis];
3457
3458                 arg_info [k + 1].offset = 68 + ainfo->offset;
3459                 arg_info [k + 1].size = mono_type_size (csig->params [k], &align);
3460         }
3461
3462         g_free (cinfo);
3463
3464         /* FIXME: */
3465         return 0;
3466 }