2 * mini-sparc.c: Sparc backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
9 * Christopher Taylor (ct@gentoo.org)
10 * Mark Crichton (crichton@gimp.org)
11 * Zoltan Varga (vargaz@freemail.hu)
13 * (C) 2003 Ximian, Inc.
27 #include <mono/metadata/appdomain.h>
28 #include <mono/metadata/debug-helpers.h>
29 #include <mono/metadata/tokentype.h>
30 #include <mono/utils/mono-math.h>
31 #include <mono/utils/mono-hwcap-sparc.h>
33 #include "mini-sparc.h"
35 #include "cpu-sparc.h"
36 #include "jit-icalls.h"
40 * Sparc V9 means two things:
41 * - the instruction set
44 * V9 instructions are only usable if the underlying processor is 64 bit. Most Sparc
45 * processors in use are 64 bit processors. The V9 ABI is only usable if the
46 * mono executable is a 64 bit executable. So it would make sense to use the 64 bit
47 * instructions without using the 64 bit ABI.
52 * - %i0..%i<n> hold the incoming arguments, these are never written by JITted
53 * code. Unused input registers are used for global register allocation.
54 * - %o0..%o5 and %l7 is used for local register allocation and passing arguments
55 * - %l0..%l6 is used for global register allocation
56 * - %o7 and %g1 is used as scratch registers in opcodes
57 * - all floating point registers are used for local register allocation except %f0.
58 * Only double precision registers are used.
60 * - fp registers %d0..%d30 are used for parameter passing, and %d32..%d62 are
61 * used for local allocation.
66 * - doubles and longs must be stored in dword aligned locations
70 * The following things are not implemented or do not work:
71 * - some fp arithmetic corner cases
72 * The following tests in mono/mini are expected to fail:
73 * - test_0_simple_double_casts
74 * This test casts (guint64)-1 to double and then back to guint64 again.
75 * Under x86, it returns 0, while under sparc it returns -1.
77 * In addition to this, the runtime requires the trunc function, or its
78 * solaris counterpart, aintl, to do some double->int conversions. If this
79 * function is not available, it is emulated somewhat, but the results can be
85 * - optimize sparc_set according to the memory model
86 * - when non-AOT compiling, compute patch targets immediately so we don't
87 * have to emit the 6 byte template.
89 * - struct arguments/returns
94 * - sparc_call_simple can't be used in a lot of places since the displacement
95 * might not fit into an imm30.
96 * - g1 can't be used in a lot of places since it is used as a scratch reg in
98 * - sparc_f0 can't be used as a scratch register on V9
99 * - the %d34..%d62 fp registers are encoded as: %dx = %f(x - 32 + 1), ie.
101 * - ldind.i4/u4 needs to sign extend/clear out upper word -> slows things down
102 * - ins->dreg can't be used as a scatch register in r4 opcodes since it might
103 * be a double precision register which has no single precision part.
104 * - passing/returning structs is hard to implement, because:
105 * - the spec is very hard to understand
106 * - it requires knowledge about the fields of structure, needs to handle
107 * nested structures etc.
111 * Possible optimizations:
112 * - delay slot scheduling
113 * - allocate large constants to registers
114 * - add more mul/div/rem optimizations
118 #define MONO_SPARC_THR_TLS 1
122 * There was a 64 bit bug in glib-2.2: g_bit_nth_msf (0, -1) would return 32,
123 * causing infinite loops in dominator computation. So glib-2.4 is required.
126 #if GLIB_MAJOR_VERSION == 2 && GLIB_MINOR_VERSION < 4
127 #error "glib 2.4 or later is required for 64 bit mode."
131 #define ALIGN_TO(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
133 #define SIGNAL_STACK_SIZE (64 * 1024)
135 #define STACK_BIAS MONO_SPARC_STACK_BIAS
139 /* %g1 is used by sparc_set */
140 #define GP_SCRATCH_REG sparc_g4
141 /* %f0 is used for parameter passing */
142 #define FP_SCRATCH_REG sparc_f30
143 #define ARGS_OFFSET (STACK_BIAS + 128)
147 #define FP_SCRATCH_REG sparc_f0
148 #define ARGS_OFFSET 68
149 #define GP_SCRATCH_REG sparc_g1
153 /* Whenever this is a 64bit executable */
155 static gboolean v64 = TRUE;
157 static gboolean v64 = FALSE;
160 static gpointer mono_arch_get_lmf_addr (void);
163 mono_arch_regname (int reg) {
164 static const char * rnames[] = {
165 "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
166 "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
167 "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
168 "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
169 "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
170 "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
171 "sparc_fp", "sparc_retadr"
173 if (reg >= 0 && reg < 32)
179 mono_arch_fregname (int reg) {
180 static const char *rnames [] = {
181 "sparc_f0", "sparc_f1", "sparc_f2", "sparc_f3", "sparc_f4",
182 "sparc_f5", "sparc_f6", "sparc_f7", "sparc_f8", "sparc_f9",
183 "sparc_f10", "sparc_f11", "sparc_f12", "sparc_f13", "sparc_f14",
184 "sparc_f15", "sparc_f16", "sparc_f17", "sparc_f18", "sparc_f19",
185 "sparc_f20", "sparc_f21", "sparc_f22", "sparc_f23", "sparc_f24",
186 "sparc_f25", "sparc_f26", "sparc_f27", "sparc_f28", "sparc_f29",
187 "sparc_f30", "sparc_f31"
190 if (reg >= 0 && reg < 32)
197 * Initialize the cpu to execute managed code.
200 mono_arch_cpu_init (void)
205 * Initialize architecture specific code.
208 mono_arch_init (void)
213 * Cleanup architecture specific code.
216 mono_arch_cleanup (void)
221 * This function returns the optimizations supported on this cpu.
224 mono_arch_cpu_optimizations (guint32 *exclude_mask)
231 * On some processors, the cmov instructions are even slower than the
234 if (mono_hwcap_sparc_is_v9)
235 opts |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
237 *exclude_mask |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
243 * This function test for all SIMD functions supported.
245 * Returns a bitmask corresponding to all supported versions.
249 mono_arch_cpu_enumerate_simd_versions (void)
251 /* SIMD is currently unimplemented */
256 #define flushi(addr) __asm__ __volatile__ ("iflush %0"::"r"(addr):"memory")
257 #else /* assume Sun's compiler */
258 static void flushi(void *addr)
265 void sync_instruction_memory(caddr_t addr, int len);
269 mono_arch_flush_icache (guint8 *code, gint size)
272 /* Hopefully this is optimized based on the actual CPU */
273 sync_instruction_memory (code, size);
275 gulong start = (gulong) code;
276 gulong end = start + size;
279 /* Sparcv9 chips only need flushes on 32 byte
280 * cacheline boundaries.
282 * Sparcv8 needs a flush every 8 bytes.
284 align = (mono_hwcap_sparc_is_v9 ? 32 : 8);
286 start &= ~(align - 1);
287 end = (end + (align - 1)) & ~(align - 1);
289 while (start < end) {
291 __asm__ __volatile__ ("iflush %0"::"r"(start));
303 * Flush all register windows to memory. Every register window is saved to
304 * a 16 word area on the stack pointed to by its %sp register.
307 mono_sparc_flushw (void)
309 static guint32 start [64];
310 static int inited = 0;
312 static void (*flushw) (void);
317 sparc_save_imm (code, sparc_sp, -160, sparc_sp);
320 sparc_restore_simple (code);
322 g_assert ((code - start) < 64);
324 mono_arch_flush_icache ((guint8*)start, (guint8*)code - (guint8*)start);
326 flushw = (gpointer)start;
335 mono_arch_flush_register_windows (void)
337 mono_sparc_flushw ();
341 mono_arch_is_inst_imm (gint64 imm)
343 return sparc_is_imm13 (imm);
347 mono_sparc_is_v9 (void) {
348 return mono_hwcap_sparc_is_v9;
352 mono_sparc_is_sparc64 (void) {
364 ArgInFloatReg, /* V9 only */
365 ArgInDoubleReg /* V9 only */
370 /* This needs to be offset by %i0 or %o0 depending on caller/callee */
373 guint32 vt_offset; /* for valuetypes */
391 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean pair)
393 ainfo->offset = *stack_size;
396 if (*gr >= PARAM_REGS) {
397 ainfo->storage = ArgOnStack;
400 ainfo->storage = ArgInIReg;
405 /* Allways reserve stack space for parameters passed in registers */
406 (*stack_size) += sizeof (gpointer);
409 if (*gr < PARAM_REGS - 1) {
410 /* A pair of registers */
411 ainfo->storage = ArgInIRegPair;
415 else if (*gr >= PARAM_REGS) {
416 /* A pair of stack locations */
417 ainfo->storage = ArgOnStackPair;
420 ainfo->storage = ArgInSplitRegStack;
425 (*stack_size) += 2 * sizeof (gpointer);
431 #define FLOAT_PARAM_REGS 32
434 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean single)
436 ainfo->offset = *stack_size;
439 if (*gr >= FLOAT_PARAM_REGS) {
440 ainfo->storage = ArgOnStack;
443 /* A single is passed in an even numbered fp register */
444 ainfo->storage = ArgInFloatReg;
445 ainfo->reg = *gr + 1;
450 if (*gr < FLOAT_PARAM_REGS) {
451 /* A double register */
452 ainfo->storage = ArgInDoubleReg;
457 ainfo->storage = ArgOnStack;
461 (*stack_size) += sizeof (gpointer);
469 * Obtain information about a call according to the calling convention.
470 * For V8, see the "System V ABI, Sparc Processor Supplement" Sparc V8 version
471 * document for more information.
472 * For V9, see the "Low Level System Information (64-bit psABI)" chapter in
473 * the 'Sparc Compliance Definition 2.4' document.
476 get_call_info (MonoCompile *cfg, MonoMethodSignature *sig, gboolean is_pinvoke)
479 int n = sig->hasthis + sig->param_count;
480 guint32 stack_size = 0;
484 cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
490 if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
491 /* The address of the return value is passed in %o0 */
492 add_general (&gr, &stack_size, &cinfo->ret, FALSE);
493 cinfo->ret.reg += sparc_i0;
494 /* FIXME: Pass this after this as on other platforms */
501 add_general (&gr, &stack_size, cinfo->args + 0, FALSE);
503 if ((sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
506 /* Emit the signature cookie just before the implicit arguments */
507 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
510 for (i = 0; i < sig->param_count; ++i) {
511 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
514 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
517 /* Emit the signature cookie just before the implicit arguments */
518 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
521 DEBUG(printf("param %d: ", i));
522 if (sig->params [i]->byref) {
523 DEBUG(printf("byref\n"));
525 add_general (&gr, &stack_size, ainfo, FALSE);
528 ptype = mini_get_underlying_type (sig->params [i]);
529 switch (ptype->type) {
530 case MONO_TYPE_BOOLEAN:
533 add_general (&gr, &stack_size, ainfo, FALSE);
534 /* the value is in the ls byte */
535 ainfo->offset += sizeof (gpointer) - 1;
540 add_general (&gr, &stack_size, ainfo, FALSE);
541 /* the value is in the ls word */
542 ainfo->offset += sizeof (gpointer) - 2;
546 add_general (&gr, &stack_size, ainfo, FALSE);
547 /* the value is in the ls dword */
548 ainfo->offset += sizeof (gpointer) - 4;
553 case MONO_TYPE_FNPTR:
554 case MONO_TYPE_CLASS:
555 case MONO_TYPE_OBJECT:
556 case MONO_TYPE_STRING:
557 case MONO_TYPE_SZARRAY:
558 case MONO_TYPE_ARRAY:
559 add_general (&gr, &stack_size, ainfo, FALSE);
561 case MONO_TYPE_GENERICINST:
562 if (!mono_type_generic_inst_is_valuetype (ptype)) {
563 add_general (&gr, &stack_size, ainfo, FALSE);
567 case MONO_TYPE_VALUETYPE:
572 add_general (&gr, &stack_size, ainfo, FALSE);
574 case MONO_TYPE_TYPEDBYREF:
575 add_general (&gr, &stack_size, ainfo, FALSE);
580 add_general (&gr, &stack_size, ainfo, FALSE);
582 add_general (&gr, &stack_size, ainfo, TRUE);
587 add_float (&fr, &stack_size, ainfo, TRUE);
590 /* single precision values are passed in integer registers */
591 add_general (&gr, &stack_size, ainfo, FALSE);
596 add_float (&fr, &stack_size, ainfo, FALSE);
599 /* double precision values are passed in a pair of registers */
600 add_general (&gr, &stack_size, ainfo, TRUE);
604 g_assert_not_reached ();
608 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
611 /* Emit the signature cookie just before the implicit arguments */
612 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
616 ret_type = mini_get_underlying_type (sig->ret);
617 switch (ret_type->type) {
618 case MONO_TYPE_BOOLEAN:
629 case MONO_TYPE_FNPTR:
630 case MONO_TYPE_CLASS:
631 case MONO_TYPE_OBJECT:
632 case MONO_TYPE_SZARRAY:
633 case MONO_TYPE_ARRAY:
634 case MONO_TYPE_STRING:
635 cinfo->ret.storage = ArgInIReg;
636 cinfo->ret.reg = sparc_i0;
643 cinfo->ret.storage = ArgInIReg;
644 cinfo->ret.reg = sparc_i0;
648 cinfo->ret.storage = ArgInIRegPair;
649 cinfo->ret.reg = sparc_i0;
656 cinfo->ret.storage = ArgInFReg;
657 cinfo->ret.reg = sparc_f0;
659 case MONO_TYPE_GENERICINST:
660 if (!mono_type_generic_inst_is_valuetype (ret_type)) {
661 cinfo->ret.storage = ArgInIReg;
662 cinfo->ret.reg = sparc_i0;
668 case MONO_TYPE_VALUETYPE:
677 cinfo->ret.storage = ArgOnStack;
679 case MONO_TYPE_TYPEDBYREF:
682 /* Same as a valuetype with size 24 */
689 cinfo->ret.storage = ArgOnStack;
694 g_error ("Can't handle as return value 0x%x", sig->ret->type);
697 cinfo->stack_usage = stack_size;
698 cinfo->reg_usage = gr;
703 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
709 * FIXME: If an argument is allocated to a register, then load it from the
710 * stack in the prolog.
713 for (i = 0; i < cfg->num_varinfo; i++) {
714 MonoInst *ins = cfg->varinfo [i];
715 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
718 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
721 /* FIXME: Make arguments on stack allocateable to registers */
722 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode == OP_REGVAR) || (ins->opcode == OP_ARG))
725 if (mono_is_regsize_var (ins->inst_vtype)) {
726 g_assert (MONO_VARINFO (cfg, i)->reg == -1);
727 g_assert (i == vmv->idx);
729 vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
737 mono_arch_get_global_int_regs (MonoCompile *cfg)
741 MonoMethodSignature *sig;
744 sig = mono_method_signature (cfg->method);
746 cinfo = get_call_info (cfg, sig, FALSE);
748 /* Use unused input registers */
749 for (i = cinfo->reg_usage; i < 6; ++i)
750 regs = g_list_prepend (regs, GUINT_TO_POINTER (sparc_i0 + i));
752 /* Use %l0..%l6 as global registers */
753 for (i = sparc_l0; i < sparc_l7; ++i)
754 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
762 * mono_arch_regalloc_cost:
764 * Return the cost, in number of memory references, of the action of
765 * allocating the variable VMV into a register during global register
769 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
775 * Set var information according to the calling convention. sparc version.
776 * The locals var stuff should most likely be split in another method.
780 mono_arch_allocate_vars (MonoCompile *cfg)
782 MonoMethodSignature *sig;
783 MonoMethodHeader *header;
785 int i, offset, size, align, curinst;
788 header = cfg->header;
790 sig = mono_method_signature (cfg->method);
792 cinfo = get_call_info (cfg, sig, FALSE);
794 if (sig->ret->type != MONO_TYPE_VOID) {
795 switch (cinfo->ret.storage) {
798 cfg->ret->opcode = OP_REGVAR;
799 cfg->ret->inst_c0 = cinfo->ret.reg;
801 case ArgInIRegPair: {
802 MonoType *t = mini_get_underlying_type (sig->ret);
803 if (((t->type == MONO_TYPE_I8) || (t->type == MONO_TYPE_U8))) {
804 MonoInst *low = get_vreg_to_inst (cfg, cfg->ret->dreg + 1);
805 MonoInst *high = get_vreg_to_inst (cfg, cfg->ret->dreg + 2);
807 low->opcode = OP_REGVAR;
808 low->dreg = cinfo->ret.reg + 1;
809 high->opcode = OP_REGVAR;
810 high->dreg = cinfo->ret.reg;
812 cfg->ret->opcode = OP_REGVAR;
813 cfg->ret->inst_c0 = cinfo->ret.reg;
818 g_assert_not_reached ();
821 cfg->vret_addr->opcode = OP_REGOFFSET;
822 cfg->vret_addr->inst_basereg = sparc_fp;
823 cfg->vret_addr->inst_offset = 64;
829 cfg->ret->dreg = cfg->ret->inst_c0;
833 * We use the ABI calling conventions for managed code as well.
834 * Exception: valuetypes are never returned in registers on V9.
835 * FIXME: Use something more optimized.
838 /* Locals are allocated backwards from %fp */
839 cfg->frame_reg = sparc_fp;
843 * Reserve a stack slot for holding information used during exception
846 if (header->num_clauses)
847 offset += sizeof (gpointer) * 2;
849 if (cfg->method->save_lmf) {
850 offset += sizeof (MonoLMF);
851 cfg->arch.lmf_offset = offset;
854 curinst = cfg->locals_start;
855 for (i = curinst; i < cfg->num_varinfo; ++i) {
856 inst = cfg->varinfo [i];
858 if ((inst->opcode == OP_REGVAR) || (inst->opcode == OP_REGOFFSET)) {
859 //g_print ("allocating local %d to %s\n", i, mono_arch_regname (inst->dreg));
863 if (inst->flags & MONO_INST_IS_DEAD)
866 /* inst->backend.is_pinvoke indicates native sized value types, this is used by the
867 * pinvoke wrappers when they call functions returning structure */
868 if (inst->backend.is_pinvoke && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
869 size = mono_class_native_size (mono_class_from_mono_type (inst->inst_vtype), &align);
871 size = mini_type_stack_size (inst->inst_vtype, &align);
874 * This is needed since structures containing doubles must be doubleword
876 * FIXME: Do this only if needed.
878 if (MONO_TYPE_ISSTRUCT (inst->inst_vtype))
882 * variables are accessed as negative offsets from %fp, so increase
883 * the offset before assigning it to a variable
888 offset &= ~(align - 1);
889 inst->opcode = OP_REGOFFSET;
890 inst->inst_basereg = sparc_fp;
891 inst->inst_offset = STACK_BIAS + -offset;
893 //g_print ("allocating local %d to [%s - %d]\n", i, mono_arch_regname (inst->inst_basereg), - inst->inst_offset);
896 if (sig->call_convention == MONO_CALL_VARARG) {
897 cfg->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
900 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
901 inst = cfg->args [i];
902 if (inst->opcode != OP_REGVAR) {
903 ArgInfo *ainfo = &cinfo->args [i];
904 gboolean inreg = TRUE;
908 if (sig->hasthis && (i == 0))
909 arg_type = &mono_defaults.object_class->byval_arg;
911 arg_type = sig->params [i - sig->hasthis];
914 if (!arg_type->byref && ((arg_type->type == MONO_TYPE_R4)
915 || (arg_type->type == MONO_TYPE_R8)))
917 * Since float arguments are passed in integer registers, we need to
918 * save them to the stack in the prolog.
923 /* FIXME: Allocate volatile arguments to registers */
924 /* FIXME: This makes the argument holding a vtype address into volatile */
925 if (inst->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT))
928 if (MONO_TYPE_ISSTRUCT (arg_type))
929 /* FIXME: this isn't needed */
932 inst->opcode = OP_REGOFFSET;
935 storage = ArgOnStack;
937 storage = ainfo->storage;
941 inst->opcode = OP_REGVAR;
942 inst->dreg = sparc_i0 + ainfo->reg;
945 if (inst->type == STACK_I8) {
946 MonoInst *low = get_vreg_to_inst (cfg, inst->dreg + 1);
947 MonoInst *high = get_vreg_to_inst (cfg, inst->dreg + 2);
949 low->opcode = OP_REGVAR;
950 low->dreg = sparc_i0 + ainfo->reg + 1;
951 high->opcode = OP_REGVAR;
952 high->dreg = sparc_i0 + ainfo->reg;
954 inst->opcode = OP_REGVAR;
955 inst->dreg = sparc_i0 + ainfo->reg;
960 * Since float regs are volatile, we save the arguments to
961 * the stack in the prolog.
962 * FIXME: Avoid this if the method contains no calls.
966 case ArgInSplitRegStack:
967 /* Split arguments are saved to the stack in the prolog */
968 inst->opcode = OP_REGOFFSET;
969 /* in parent frame */
970 inst->inst_basereg = sparc_fp;
971 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
973 if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
975 * It is very hard to load doubles from non-doubleword aligned
976 * memory locations. So if the offset is misaligned, we copy the
977 * argument to a stack location in the prolog.
979 if ((inst->inst_offset - STACK_BIAS) % 8) {
980 inst->inst_basereg = sparc_fp;
984 offset &= ~(align - 1);
985 inst->inst_offset = STACK_BIAS + -offset;
994 if (MONO_TYPE_ISSTRUCT (arg_type)) {
995 /* Add a level of indirection */
997 * It would be easier to add OP_LDIND_I here, but ldind_i instructions
998 * are destructively modified in a lot of places in inssel.brg.
1001 MONO_INST_NEW (cfg, indir, 0);
1003 inst->opcode = OP_VTARG_ADDR;
1004 inst->inst_left = indir;
1010 * spillvars are stored between the normal locals and the storage reserved
1014 cfg->stack_offset = offset;
1020 mono_arch_create_vars (MonoCompile *cfg)
1022 MonoMethodSignature *sig;
1024 sig = mono_method_signature (cfg->method);
1026 if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
1027 cfg->vret_addr = mono_compile_create_var (cfg, &mono_defaults.int_class->byval_arg, OP_ARG);
1028 if (G_UNLIKELY (cfg->verbose_level > 1)) {
1029 printf ("vret_addr = ");
1030 mono_print_ins (cfg->vret_addr);
1034 if (!sig->ret->byref && (sig->ret->type == MONO_TYPE_I8 || sig->ret->type == MONO_TYPE_U8)) {
1035 MonoInst *low = get_vreg_to_inst (cfg, cfg->ret->dreg + 1);
1036 MonoInst *high = get_vreg_to_inst (cfg, cfg->ret->dreg + 2);
1038 low->flags |= MONO_INST_VOLATILE;
1039 high->flags |= MONO_INST_VOLATILE;
1042 /* Add a properly aligned dword for use by int<->float conversion opcodes */
1043 cfg->arch.float_spill_slot = mono_compile_create_var (cfg, &mono_defaults.double_class->byval_arg, OP_ARG);
1044 ((MonoInst*)cfg->arch.float_spill_slot)->flags |= MONO_INST_VOLATILE;
1048 add_outarg_reg (MonoCompile *cfg, MonoCallInst *call, ArgStorage storage, int reg, guint32 sreg)
1052 MONO_INST_NEW (cfg, arg, 0);
1058 arg->opcode = OP_MOVE;
1059 arg->dreg = mono_alloc_ireg (cfg);
1061 mono_call_inst_add_outarg_reg (cfg, call, arg->dreg, reg, FALSE);
1064 arg->opcode = OP_FMOVE;
1065 arg->dreg = mono_alloc_freg (cfg);
1067 mono_call_inst_add_outarg_reg (cfg, call, arg->dreg, reg, TRUE);
1070 g_assert_not_reached ();
1073 MONO_ADD_INS (cfg->cbb, arg);
1077 add_outarg_load (MonoCompile *cfg, MonoCallInst *call, int opcode, int basereg, int offset, int reg)
1079 int dreg = mono_alloc_ireg (cfg);
1081 MONO_EMIT_NEW_LOAD_MEMBASE (cfg, dreg, sparc_sp, offset);
1083 mono_call_inst_add_outarg_reg (cfg, call, dreg, reg, FALSE);
1087 emit_pass_long (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoInst *in)
1089 int offset = ARGS_OFFSET + ainfo->offset;
1091 switch (ainfo->storage) {
1093 add_outarg_reg (cfg, call, ArgInIReg, sparc_o0 + ainfo->reg + 1, in->dreg + 1);
1094 add_outarg_reg (cfg, call, ArgInIReg, sparc_o0 + ainfo->reg, in->dreg + 2);
1096 case ArgOnStackPair:
1097 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, offset, in->dreg + 2);
1098 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, offset + 4, in->dreg + 1);
1100 case ArgInSplitRegStack:
1101 add_outarg_reg (cfg, call, ArgInIReg, sparc_o0 + ainfo->reg, in->dreg + 2);
1102 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, offset + 4, in->dreg + 1);
1105 g_assert_not_reached ();
1110 emit_pass_double (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoInst *in)
1112 int offset = ARGS_OFFSET + ainfo->offset;
1114 switch (ainfo->storage) {
1116 /* floating-point <-> integer transfer must go through memory */
1117 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER8_MEMBASE_REG, sparc_sp, offset, in->dreg);
1119 /* Load into a register pair */
1120 add_outarg_load (cfg, call, OP_LOADI4_MEMBASE, sparc_sp, offset, sparc_o0 + ainfo->reg);
1121 add_outarg_load (cfg, call, OP_LOADI4_MEMBASE, sparc_sp, offset + 4, sparc_o0 + ainfo->reg + 1);
1123 case ArgOnStackPair:
1124 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER8_MEMBASE_REG, sparc_sp, offset, in->dreg);
1126 case ArgInSplitRegStack:
1127 /* floating-point <-> integer transfer must go through memory */
1128 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER8_MEMBASE_REG, sparc_sp, offset, in->dreg);
1129 /* Load most significant word into register */
1130 add_outarg_load (cfg, call, OP_LOADI4_MEMBASE, sparc_sp, offset, sparc_o0 + ainfo->reg);
1133 g_assert_not_reached ();
1138 emit_pass_float (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoInst *in)
1140 int offset = ARGS_OFFSET + ainfo->offset;
1142 switch (ainfo->storage) {
1144 /* floating-point <-> integer transfer must go through memory */
1145 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER4_MEMBASE_REG, sparc_sp, offset, in->dreg);
1146 add_outarg_load (cfg, call, OP_LOADI4_MEMBASE, sparc_sp, offset, sparc_o0 + ainfo->reg);
1149 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER4_MEMBASE_REG, sparc_sp, offset, in->dreg);
1152 g_assert_not_reached ();
1157 emit_pass_other (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoType *arg_type, MonoInst *in);
1160 emit_pass_vtype (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo, ArgInfo *ainfo, MonoType *arg_type, MonoInst *in, gboolean pinvoke)
1163 guint32 align, offset, pad, size;
1165 if (arg_type->type == MONO_TYPE_TYPEDBYREF) {
1166 size = sizeof (MonoTypedRef);
1167 align = sizeof (gpointer);
1170 size = mono_type_native_stack_size (&in->klass->byval_arg, &align);
1173 * Other backends use mono_type_stack_size (), but that
1174 * aligns the size to 8, which is larger than the size of
1175 * the source, leading to reads of invalid memory if the
1176 * source is at the end of address space.
1178 size = mono_class_value_size (in->klass, &align);
1181 /* The first 6 argument locations are reserved */
1182 if (cinfo->stack_usage < 6 * sizeof (gpointer))
1183 cinfo->stack_usage = 6 * sizeof (gpointer);
1185 offset = ALIGN_TO ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage, align);
1186 pad = offset - ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage);
1188 cinfo->stack_usage += size;
1189 cinfo->stack_usage += pad;
1192 * We use OP_OUTARG_VT to copy the valuetype to a stack location, then
1193 * use the normal OUTARG opcodes to pass the address of the location to
1197 MONO_INST_NEW (cfg, arg, OP_OUTARG_VT);
1198 arg->sreg1 = in->dreg;
1199 arg->klass = in->klass;
1200 arg->backend.size = size;
1201 arg->inst_p0 = call;
1202 arg->inst_p1 = mono_mempool_alloc (cfg->mempool, sizeof (ArgInfo));
1203 memcpy (arg->inst_p1, ainfo, sizeof (ArgInfo));
1204 ((ArgInfo*)(arg->inst_p1))->offset = STACK_BIAS + offset;
1205 MONO_ADD_INS (cfg->cbb, arg);
1207 MONO_INST_NEW (cfg, arg, OP_ADD_IMM);
1208 arg->dreg = mono_alloc_preg (cfg);
1209 arg->sreg1 = sparc_sp;
1210 arg->inst_imm = STACK_BIAS + offset;
1211 MONO_ADD_INS (cfg->cbb, arg);
1213 emit_pass_other (cfg, call, ainfo, NULL, arg);
1218 emit_pass_other (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoType *arg_type, MonoInst *in)
1220 int offset = ARGS_OFFSET + ainfo->offset;
1223 switch (ainfo->storage) {
1225 add_outarg_reg (cfg, call, ArgInIReg, sparc_o0 + ainfo->reg, in->dreg);
1232 opcode = OP_STOREI1_MEMBASE_REG;
1233 else if (offset & 0x2)
1234 opcode = OP_STOREI2_MEMBASE_REG;
1236 opcode = OP_STOREI4_MEMBASE_REG;
1237 MONO_EMIT_NEW_STORE_MEMBASE (cfg, opcode, sparc_sp, offset, in->dreg);
1241 g_assert_not_reached ();
1246 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo)
1248 MonoMethodSignature *tmp_sig;
1251 * mono_ArgIterator_Setup assumes the signature cookie is
1252 * passed first and all the arguments which were before it are
1253 * passed on the stack after the signature. So compensate by
1254 * passing a different signature.
1256 tmp_sig = mono_metadata_signature_dup (call->signature);
1257 tmp_sig->param_count -= call->signature->sentinelpos;
1258 tmp_sig->sentinelpos = 0;
1259 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1261 /* FIXME: Add support for signature tokens to AOT */
1262 cfg->disable_aot = TRUE;
1263 /* We allways pass the signature on the stack for simplicity */
1264 MONO_EMIT_NEW_STORE_MEMBASE_IMM (cfg, OP_STORE_MEMBASE_IMM, sparc_sp, ARGS_OFFSET + cinfo->sig_cookie.offset, tmp_sig);
1268 mono_arch_emit_call (MonoCompile *cfg, MonoCallInst *call)
1271 MonoMethodSignature *sig;
1275 guint32 extra_space = 0;
1277 sig = call->signature;
1278 n = sig->param_count + sig->hasthis;
1280 cinfo = get_call_info (cfg, sig, sig->pinvoke);
1282 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1283 /* Set the 'struct/union return pointer' location on the stack */
1284 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, 64, call->vret_var->dreg);
1287 for (i = 0; i < n; ++i) {
1290 ainfo = cinfo->args + i;
1292 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
1293 /* Emit the signature cookie just before the first implicit argument */
1294 emit_sig_cookie (cfg, call, cinfo);
1297 in = call->args [i];
1299 if (sig->hasthis && (i == 0))
1300 arg_type = &mono_defaults.object_class->byval_arg;
1302 arg_type = sig->params [i - sig->hasthis];
1304 arg_type = mini_get_underlying_type (arg_type);
1305 if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(sig->params [i - sig->hasthis])))
1306 emit_pass_vtype (cfg, call, cinfo, ainfo, arg_type, in, sig->pinvoke);
1307 else if (!arg_type->byref && ((arg_type->type == MONO_TYPE_I8) || (arg_type->type == MONO_TYPE_U8)))
1308 emit_pass_long (cfg, call, ainfo, in);
1309 else if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8))
1310 emit_pass_double (cfg, call, ainfo, in);
1311 else if (!arg_type->byref && (arg_type->type == MONO_TYPE_R4))
1312 emit_pass_float (cfg, call, ainfo, in);
1314 emit_pass_other (cfg, call, ainfo, arg_type, in);
1317 /* Handle the case where there are no implicit arguments */
1318 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sig->sentinelpos)) {
1319 emit_sig_cookie (cfg, call, cinfo);
1322 call->stack_usage = cinfo->stack_usage + extra_space;
1328 mono_arch_emit_outarg_vt (MonoCompile *cfg, MonoInst *ins, MonoInst *src)
1330 ArgInfo *ainfo = (ArgInfo*)ins->inst_p1;
1331 int size = ins->backend.size;
1333 mini_emit_memcpy (cfg, sparc_sp, ainfo->offset, src->dreg, 0, size, 0);
1337 mono_arch_emit_setret (MonoCompile *cfg, MonoMethod *method, MonoInst *val)
1339 CallInfo *cinfo = get_call_info (cfg, mono_method_signature (method), FALSE);
1340 MonoType *ret = mini_get_underlying_type (mono_method_signature (method)->ret);
1342 switch (cinfo->ret.storage) {
1344 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg, val->dreg);
1347 if (ret->type == MONO_TYPE_I8 || ret->type == MONO_TYPE_U8) {
1348 MONO_EMIT_NEW_UNALU (cfg, OP_LMOVE, cfg->ret->dreg, val->dreg);
1350 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg + 2, val->dreg + 2);
1351 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg + 1, val->dreg + 1);
1355 if (ret->type == MONO_TYPE_R4)
1356 MONO_EMIT_NEW_UNALU (cfg, OP_SETFRET, cfg->ret->dreg, val->dreg);
1358 MONO_EMIT_NEW_UNALU (cfg, OP_FMOVE, cfg->ret->dreg, val->dreg);
1361 g_assert_not_reached ();
1367 int cond_to_sparc_cond [][3] = {
1368 {sparc_be, sparc_be, sparc_fbe},
1369 {sparc_bne, sparc_bne, 0},
1370 {sparc_ble, sparc_ble, sparc_fble},
1371 {sparc_bge, sparc_bge, sparc_fbge},
1372 {sparc_bl, sparc_bl, sparc_fbl},
1373 {sparc_bg, sparc_bg, sparc_fbg},
1374 {sparc_bleu, sparc_bleu, 0},
1375 {sparc_beu, sparc_beu, 0},
1376 {sparc_blu, sparc_blu, sparc_fbl},
1377 {sparc_bgu, sparc_bgu, sparc_fbg}
1380 /* Map opcode to the sparc condition codes */
1381 static inline SparcCond
1382 opcode_to_sparc_cond (int opcode)
1388 case OP_COND_EXC_OV:
1389 case OP_COND_EXC_IOV:
1392 case OP_COND_EXC_IC:
1394 case OP_COND_EXC_NO:
1395 case OP_COND_EXC_NC:
1398 rel = mono_opcode_to_cond (opcode);
1399 t = mono_opcode_to_type (opcode, -1);
1401 return cond_to_sparc_cond [rel][t];
1408 #define COMPUTE_DISP(ins) \
1409 if (ins->inst_true_bb->native_offset) \
1410 disp = (ins->inst_true_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2; \
1413 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1417 #define DEFAULT_ICC sparc_xcc_short
1419 #define DEFAULT_ICC sparc_icc_short
1423 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) \
1427 COMPUTE_DISP(ins); \
1428 predict = (disp != 0) ? 1 : 0; \
1429 g_assert (sparc_is_imm19 (disp)); \
1430 sparc_branchp (code, (annul), cond, icc, (predict), disp); \
1431 if (filldelay) sparc_nop (code); \
1433 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_ICC ((ins), (cond), (annul), (filldelay), (sparc_xcc_short))
1434 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) \
1438 COMPUTE_DISP(ins); \
1439 predict = (disp != 0) ? 1 : 0; \
1440 g_assert (sparc_is_imm19 (disp)); \
1441 sparc_fbranch (code, (annul), cond, disp); \
1442 if (filldelay) sparc_nop (code); \
1445 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) g_assert_not_reached ()
1446 #define EMIT_COND_BRANCH_GENERAL(ins,bop,cond,annul,filldelay) \
1449 COMPUTE_DISP(ins); \
1450 g_assert (sparc_is_imm22 (disp)); \
1451 sparc_ ## bop (code, (annul), cond, disp); \
1452 if (filldelay) sparc_nop (code); \
1454 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),branch,(cond),annul,filldelay)
1455 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),fbranch,(cond),annul,filldelay)
1458 #define EMIT_COND_BRANCH_PREDICTED(ins,cond,annul,filldelay) \
1462 COMPUTE_DISP(ins); \
1463 predict = (disp != 0) ? 1 : 0; \
1464 g_assert (sparc_is_imm19 (disp)); \
1465 sparc_branchp (code, (annul), (cond), DEFAULT_ICC, (predict), disp); \
1466 if (filldelay) sparc_nop (code); \
1469 #define EMIT_COND_BRANCH_BPR(ins,bop,predict,annul,filldelay) \
1472 COMPUTE_DISP(ins); \
1473 g_assert (sparc_is_imm22 (disp)); \
1474 sparc_ ## bop (code, (annul), (predict), ins->sreg1, disp); \
1475 if (filldelay) sparc_nop (code); \
1478 /* emit an exception if condition is fail */
1480 * We put the exception throwing code out-of-line, at the end of the method
1482 #define EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,filldelay,icc) do { \
1483 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code, \
1484 MONO_PATCH_INFO_EXC, sexc_name); \
1485 if (mono_hwcap_sparc_is_v9 && ((icc) != sparc_icc_short)) { \
1486 sparc_branchp (code, 0, (cond), (icc), 0, 0); \
1489 sparc_branch (code, 0, cond, 0); \
1491 if (filldelay) sparc_nop (code); \
1494 #define EMIT_COND_SYSTEM_EXCEPTION(ins,cond,sexc_name) EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,TRUE,DEFAULT_ICC)
1496 #define EMIT_COND_SYSTEM_EXCEPTION_BPR(ins,bop,sexc_name) do { \
1497 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code, \
1498 MONO_PATCH_INFO_EXC, sexc_name); \
1499 sparc_ ## bop (code, FALSE, FALSE, ins->sreg1, 0); \
1503 #define EMIT_ALU_IMM(ins,op,setcc) do { \
1504 if (sparc_is_imm13 ((ins)->inst_imm)) \
1505 sparc_ ## op ## _imm (code, (setcc), (ins)->sreg1, ins->inst_imm, (ins)->dreg); \
1507 sparc_set (code, ins->inst_imm, sparc_o7); \
1508 sparc_ ## op (code, (setcc), (ins)->sreg1, sparc_o7, (ins)->dreg); \
1512 #define EMIT_LOAD_MEMBASE(ins,op) do { \
1513 if (sparc_is_imm13 (ins->inst_offset)) \
1514 sparc_ ## op ## _imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg); \
1516 sparc_set (code, ins->inst_offset, sparc_o7); \
1517 sparc_ ## op (code, ins->inst_basereg, sparc_o7, ins->dreg); \
1522 #define EMIT_STORE_MEMBASE_IMM(ins,op) do { \
1524 if (ins->inst_imm == 0) \
1527 sparc_set (code, ins->inst_imm, sparc_o7); \
1530 if (!sparc_is_imm13 (ins->inst_offset)) { \
1531 sparc_set (code, ins->inst_offset, GP_SCRATCH_REG); \
1532 sparc_ ## op (code, sreg, ins->inst_destbasereg, GP_SCRATCH_REG); \
1535 sparc_ ## op ## _imm (code, sreg, ins->inst_destbasereg, ins->inst_offset); \
1538 #define EMIT_STORE_MEMBASE_REG(ins,op) do { \
1539 if (!sparc_is_imm13 (ins->inst_offset)) { \
1540 sparc_set (code, ins->inst_offset, sparc_o7); \
1541 sparc_ ## op (code, ins->sreg1, ins->inst_destbasereg, sparc_o7); \
1544 sparc_ ## op ## _imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset); \
1547 #define EMIT_CALL() do { \
1549 sparc_set_template (code, sparc_o7); \
1550 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7); \
1553 sparc_call_simple (code, 0); \
1559 * A call template is 7 instructions long, so we want to avoid it if possible.
1562 emit_call (MonoCompile *cfg, guint32 *code, guint32 patch_type, gconstpointer data)
1566 /* FIXME: This only works if the target method is already compiled */
1567 if (0 && v64 && !cfg->compile_aot) {
1568 MonoJumpInfo patch_info;
1570 patch_info.type = patch_type;
1571 patch_info.data.target = data;
1573 target = mono_resolve_patch_target (cfg->method, cfg->domain, NULL, &patch_info, FALSE);
1575 /* FIXME: Add optimizations if the target is close enough */
1576 sparc_set (code, target, sparc_o7);
1577 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7);
1581 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, patch_type, data);
1589 mono_arch_peephole_pass_1 (MonoCompile *cfg, MonoBasicBlock *bb)
1594 mono_arch_peephole_pass_2 (MonoCompile *cfg, MonoBasicBlock *bb)
1596 MonoInst *ins, *n, *last_ins = NULL;
1599 MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
1600 switch (ins->opcode) {
1602 /* remove unnecessary multiplication with 1 */
1603 if (ins->inst_imm == 1) {
1604 if (ins->dreg != ins->sreg1) {
1605 ins->opcode = OP_MOVE;
1607 MONO_DELETE_INS (bb, ins);
1613 case OP_LOAD_MEMBASE:
1614 case OP_LOADI4_MEMBASE:
1616 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1617 * OP_LOAD_MEMBASE offset(basereg), reg
1619 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
1620 || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1621 ins->inst_basereg == last_ins->inst_destbasereg &&
1622 ins->inst_offset == last_ins->inst_offset) {
1623 if (ins->dreg == last_ins->sreg1) {
1624 MONO_DELETE_INS (bb, ins);
1627 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1628 ins->opcode = OP_MOVE;
1629 ins->sreg1 = last_ins->sreg1;
1633 * Note: reg1 must be different from the basereg in the second load
1634 * OP_LOAD_MEMBASE offset(basereg), reg1
1635 * OP_LOAD_MEMBASE offset(basereg), reg2
1637 * OP_LOAD_MEMBASE offset(basereg), reg1
1638 * OP_MOVE reg1, reg2
1640 } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1641 || last_ins->opcode == OP_LOAD_MEMBASE) &&
1642 ins->inst_basereg != last_ins->dreg &&
1643 ins->inst_basereg == last_ins->inst_basereg &&
1644 ins->inst_offset == last_ins->inst_offset) {
1646 if (ins->dreg == last_ins->dreg) {
1647 MONO_DELETE_INS (bb, ins);
1650 ins->opcode = OP_MOVE;
1651 ins->sreg1 = last_ins->dreg;
1654 //g_assert_not_reached ();
1658 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1659 * OP_LOAD_MEMBASE offset(basereg), reg
1661 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1662 * OP_ICONST reg, imm
1664 } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1665 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1666 ins->inst_basereg == last_ins->inst_destbasereg &&
1667 ins->inst_offset == last_ins->inst_offset) {
1668 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1669 ins->opcode = OP_ICONST;
1670 ins->inst_c0 = last_ins->inst_imm;
1671 g_assert_not_reached (); // check this rule
1676 case OP_LOADI1_MEMBASE:
1677 if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1678 ins->inst_basereg == last_ins->inst_destbasereg &&
1679 ins->inst_offset == last_ins->inst_offset) {
1680 if (ins->dreg == last_ins->sreg1) {
1681 MONO_DELETE_INS (bb, ins);
1684 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1685 ins->opcode = OP_MOVE;
1686 ins->sreg1 = last_ins->sreg1;
1690 case OP_LOADI2_MEMBASE:
1691 if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1692 ins->inst_basereg == last_ins->inst_destbasereg &&
1693 ins->inst_offset == last_ins->inst_offset) {
1694 if (ins->dreg == last_ins->sreg1) {
1695 MONO_DELETE_INS (bb, ins);
1698 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1699 ins->opcode = OP_MOVE;
1700 ins->sreg1 = last_ins->sreg1;
1704 case OP_STOREI4_MEMBASE_IMM:
1705 /* Convert pairs of 0 stores to a dword 0 store */
1706 /* Used when initializing temporaries */
1707 /* We know sparc_fp is dword aligned */
1708 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM) &&
1709 (ins->inst_destbasereg == last_ins->inst_destbasereg) &&
1710 (ins->inst_destbasereg == sparc_fp) &&
1711 (ins->inst_offset < 0) &&
1712 ((ins->inst_offset % 8) == 0) &&
1713 ((ins->inst_offset == last_ins->inst_offset - 4)) &&
1714 (ins->inst_imm == 0) &&
1715 (last_ins->inst_imm == 0)) {
1716 if (mono_hwcap_sparc_is_v9) {
1717 last_ins->opcode = OP_STOREI8_MEMBASE_IMM;
1718 last_ins->inst_offset = ins->inst_offset;
1719 MONO_DELETE_INS (bb, ins);
1730 case OP_COND_EXC_EQ:
1731 case OP_COND_EXC_GE:
1732 case OP_COND_EXC_GT:
1733 case OP_COND_EXC_LE:
1734 case OP_COND_EXC_LT:
1735 case OP_COND_EXC_NE_UN:
1737 * Convert compare with zero+branch to BRcc
1740 * This only works in 64 bit mode, since it examines all 64
1741 * bits of the register.
1742 * Only do this if the method is small since BPr only has a 16bit
1745 if (v64 && (cfg->header->code_size < 10000) && last_ins &&
1746 (last_ins->opcode == OP_COMPARE_IMM) &&
1747 (last_ins->inst_imm == 0)) {
1748 switch (ins->opcode) {
1750 ins->opcode = OP_SPARC_BRZ;
1753 ins->opcode = OP_SPARC_BRNZ;
1756 ins->opcode = OP_SPARC_BRLZ;
1759 ins->opcode = OP_SPARC_BRGZ;
1762 ins->opcode = OP_SPARC_BRGEZ;
1765 ins->opcode = OP_SPARC_BRLEZ;
1767 case OP_COND_EXC_EQ:
1768 ins->opcode = OP_SPARC_COND_EXC_EQZ;
1770 case OP_COND_EXC_GE:
1771 ins->opcode = OP_SPARC_COND_EXC_GEZ;
1773 case OP_COND_EXC_GT:
1774 ins->opcode = OP_SPARC_COND_EXC_GTZ;
1776 case OP_COND_EXC_LE:
1777 ins->opcode = OP_SPARC_COND_EXC_LEZ;
1779 case OP_COND_EXC_LT:
1780 ins->opcode = OP_SPARC_COND_EXC_LTZ;
1782 case OP_COND_EXC_NE_UN:
1783 ins->opcode = OP_SPARC_COND_EXC_NEZ;
1786 g_assert_not_reached ();
1788 ins->sreg1 = last_ins->sreg1;
1790 MONO_DELETE_INS (bb, ins);
1798 if (ins->dreg == ins->sreg1) {
1799 MONO_DELETE_INS (bb, ins);
1803 * OP_MOVE sreg, dreg
1804 * OP_MOVE dreg, sreg
1806 if (last_ins && last_ins->opcode == OP_MOVE &&
1807 ins->sreg1 == last_ins->dreg &&
1808 ins->dreg == last_ins->sreg1) {
1809 MONO_DELETE_INS (bb, ins);
1817 bb->last_ins = last_ins;
1821 mono_arch_decompose_long_opts (MonoCompile *cfg, MonoInst *ins)
1823 switch (ins->opcode) {
1825 MONO_EMIT_NEW_BIALU (cfg, OP_SUBCC, ins->dreg + 1, 0, ins->sreg1 + 1);
1826 MONO_EMIT_NEW_BIALU (cfg, OP_SBB, ins->dreg + 2, 0, ins->sreg1 + 2);
1835 mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1839 /* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
1842 sparc_patch (guint32 *code, const gpointer target)
1845 guint32 ins = *code;
1846 guint32 op = ins >> 30;
1847 guint32 op2 = (ins >> 22) & 0x7;
1848 guint32 rd = (ins >> 25) & 0x1f;
1849 guint8* target8 = (guint8*)target;
1850 gint64 disp = (target8 - (guint8*)code) >> 2;
1853 // g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
1855 if ((op == 0) && (op2 == 2)) {
1856 if (!sparc_is_imm22 (disp))
1859 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1861 else if ((op == 0) && (op2 == 1)) {
1862 if (!sparc_is_imm19 (disp))
1865 *code = ((ins >> 19) << 19) | (disp & 0x7ffff);
1867 else if ((op == 0) && (op2 == 3)) {
1868 if (!sparc_is_imm16 (disp))
1871 *code &= ~(0x180000 | 0x3fff);
1872 *code |= ((disp << 21) & (0x180000)) | (disp & 0x3fff);
1874 else if ((op == 0) && (op2 == 6)) {
1875 if (!sparc_is_imm22 (disp))
1878 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1880 else if ((op == 0) && (op2 == 4)) {
1881 guint32 ins2 = code [1];
1883 if (((ins2 >> 30) == 2) && (((ins2 >> 19) & 0x3f) == 2)) {
1884 /* sethi followed by or */
1886 sparc_set (p, target8, rd);
1887 while (p <= (code + 1))
1890 else if (ins2 == 0x01000000) {
1891 /* sethi followed by nop */
1893 sparc_set (p, target8, rd);
1894 while (p <= (code + 1))
1897 else if ((sparc_inst_op (ins2) == 3) && (sparc_inst_imm (ins2))) {
1898 /* sethi followed by load/store */
1900 guint32 t = (guint32)target8;
1901 *code &= ~(0x3fffff);
1903 *(code + 1) &= ~(0x3ff);
1904 *(code + 1) |= (t & 0x3ff);
1908 (sparc_inst_rd (ins) == sparc_g1) &&
1909 (sparc_inst_op (c [1]) == 0) && (sparc_inst_op2 (c [1]) == 4) &&
1910 (sparc_inst_op (c [2]) == 2) && (sparc_inst_op3 (c [2]) == 2) &&
1911 (sparc_inst_op (c [3]) == 2) && (sparc_inst_op3 (c [3]) == 2))
1915 reg = sparc_inst_rd (c [1]);
1916 sparc_set (p, target8, reg);
1920 else if ((sparc_inst_op (ins2) == 2) && (sparc_inst_op3 (ins2) == 0x38) &&
1921 (sparc_inst_imm (ins2))) {
1922 /* sethi followed by jmpl */
1924 guint32 t = (guint32)target8;
1925 *code &= ~(0x3fffff);
1927 *(code + 1) &= ~(0x3ff);
1928 *(code + 1) |= (t & 0x3ff);
1934 else if (op == 01) {
1935 gint64 disp = (target8 - (guint8*)code) >> 2;
1937 if (!sparc_is_imm30 (disp))
1939 sparc_call_simple (code, target8 - (guint8*)code);
1941 else if ((op == 2) && (sparc_inst_op3 (ins) == 0x2) && sparc_inst_imm (ins)) {
1943 g_assert (sparc_is_imm13 (target8));
1945 *code |= (guint32)target8;
1947 else if ((sparc_inst_op (ins) == 2) && (sparc_inst_op3 (ins) == 0x7)) {
1948 /* sparc_set case 5. */
1952 reg = sparc_inst_rd (c [3]);
1953 sparc_set (p, target, reg);
1960 // g_print ("patched with 0x%08x\n", ins);
1964 * mono_sparc_emit_save_lmf:
1966 * Emit the code neccesary to push a new entry onto the lmf stack. Used by
1967 * trampolines as well.
1970 mono_sparc_emit_save_lmf (guint32 *code, guint32 lmf_offset)
1973 sparc_sti_imm (code, sparc_o0, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr));
1974 /* Save previous_lmf */
1975 sparc_ldi (code, sparc_o0, sparc_g0, sparc_o7);
1976 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf));
1978 sparc_add_imm (code, FALSE, sparc_fp, lmf_offset, sparc_o7);
1979 sparc_sti (code, sparc_o7, sparc_o0, sparc_g0);
1985 mono_sparc_emit_restore_lmf (guint32 *code, guint32 lmf_offset)
1987 /* Load previous_lmf */
1988 sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), sparc_l0);
1990 sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), sparc_l1);
1991 /* *(lmf) = previous_lmf */
1992 sparc_sti (code, sparc_l0, sparc_l1, sparc_g0);
1997 emit_save_sp_to_lmf (MonoCompile *cfg, guint32 *code)
2000 * Since register windows are saved to the current value of %sp, we need to
2001 * set the sp field in the lmf before the call, not in the prolog.
2003 if (cfg->method->save_lmf) {
2004 gint32 lmf_offset = MONO_SPARC_STACK_BIAS - cfg->arch.lmf_offset;
2007 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
2014 emit_vret_token (MonoInst *ins, guint32 *code)
2016 MonoCallInst *call = (MonoCallInst*)ins;
2020 * The sparc ABI requires that calls to functions which return a structure
2021 * contain an additional unimpl instruction which is checked by the callee.
2023 if (call->signature->pinvoke && MONO_TYPE_ISSTRUCT(call->signature->ret)) {
2024 if (call->signature->ret->type == MONO_TYPE_TYPEDBYREF)
2025 size = mini_type_stack_size (call->signature->ret, NULL);
2027 size = mono_class_native_size (call->signature->ret->data.klass, NULL);
2028 sparc_unimp (code, size & 0xfff);
2035 emit_move_return_value (MonoInst *ins, guint32 *code)
2037 /* Move return value to the target register */
2038 /* FIXME: do more things in the local reg allocator */
2039 switch (ins->opcode) {
2041 case OP_VOIDCALL_REG:
2042 case OP_VOIDCALL_MEMBASE:
2046 case OP_CALL_MEMBASE:
2047 g_assert (ins->dreg == sparc_o0);
2051 case OP_LCALL_MEMBASE:
2053 * ins->dreg is the least significant reg due to the lreg: LCALL rule
2054 * in inssel-long32.brg.
2057 sparc_mov_reg_reg (code, sparc_o0, ins->dreg);
2059 g_assert (ins->dreg == sparc_o1);
2064 case OP_FCALL_MEMBASE:
2066 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4) {
2067 sparc_fmovs (code, sparc_f0, ins->dreg);
2068 sparc_fstod (code, ins->dreg, ins->dreg);
2071 sparc_fmovd (code, sparc_f0, ins->dreg);
2073 sparc_fmovs (code, sparc_f0, ins->dreg);
2074 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4)
2075 sparc_fstod (code, ins->dreg, ins->dreg);
2077 sparc_fmovs (code, sparc_f1, ins->dreg + 1);
2082 case OP_VCALL_MEMBASE:
2085 case OP_VCALL2_MEMBASE:
2095 * emit_load_volatile_arguments:
2097 * Load volatile arguments from the stack to the original input registers.
2098 * Required before a tail call.
2101 emit_load_volatile_arguments (MonoCompile *cfg, guint32 *code)
2103 MonoMethod *method = cfg->method;
2104 MonoMethodSignature *sig;
2109 /* FIXME: Generate intermediate code instead */
2111 sig = mono_method_signature (method);
2113 cinfo = get_call_info (cfg, sig, FALSE);
2115 /* This is the opposite of the code in emit_prolog */
2117 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
2118 ArgInfo *ainfo = cinfo->args + i;
2119 gint32 stack_offset;
2122 inst = cfg->args [i];
2124 if (sig->hasthis && (i == 0))
2125 arg_type = &mono_defaults.object_class->byval_arg;
2127 arg_type = sig->params [i - sig->hasthis];
2129 stack_offset = ainfo->offset + ARGS_OFFSET;
2130 ireg = sparc_i0 + ainfo->reg;
2132 if (ainfo->storage == ArgInSplitRegStack) {
2133 g_assert (inst->opcode == OP_REGOFFSET);
2135 if (!sparc_is_imm13 (stack_offset))
2137 sparc_st_imm (code, inst->inst_basereg, stack_offset, sparc_i5);
2140 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
2141 if (ainfo->storage == ArgInIRegPair) {
2142 if (!sparc_is_imm13 (inst->inst_offset + 4))
2144 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2145 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2148 if (ainfo->storage == ArgInSplitRegStack) {
2149 if (stack_offset != inst->inst_offset) {
2150 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_i5);
2151 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2152 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2157 if (ainfo->storage == ArgOnStackPair) {
2158 if (stack_offset != inst->inst_offset) {
2159 /* stack_offset is not dword aligned, so we need to make a copy */
2160 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_o7);
2161 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset);
2163 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2164 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2169 g_assert_not_reached ();
2172 if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
2173 /* Argument in register, but need to be saved to stack */
2174 if (!sparc_is_imm13 (stack_offset))
2176 if ((stack_offset - ARGS_OFFSET) & 0x1)
2177 /* FIXME: Is this ldsb or ldub ? */
2178 sparc_ldsb_imm (code, inst->inst_basereg, stack_offset, ireg);
2180 if ((stack_offset - ARGS_OFFSET) & 0x2)
2181 sparc_ldsh_imm (code, inst->inst_basereg, stack_offset, ireg);
2183 if ((stack_offset - ARGS_OFFSET) & 0x4)
2184 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2187 sparc_ldx_imm (code, inst->inst_basereg, stack_offset, ireg);
2189 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2192 else if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
2193 /* Argument in regpair, but need to be saved to stack */
2194 if (!sparc_is_imm13 (inst->inst_offset + 4))
2196 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2197 sparc_st_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2199 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
2202 else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
2206 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
2207 if (inst->opcode == OP_REGVAR)
2208 /* FIXME: Load the argument into memory */
2218 * mono_sparc_is_virtual_call:
2220 * Determine whenever the instruction at CODE is a virtual call.
2223 mono_sparc_is_virtual_call (guint32 *code)
2230 if ((sparc_inst_op (*code) == 0x2) && (sparc_inst_op3 (*code) == 0x38)) {
2232 * Register indirect call. If it is a virtual call, then the
2233 * instruction in the delay slot is a special kind of nop.
2236 /* Construct special nop */
2237 sparc_or_imm (p, FALSE, sparc_g0, 0xca, sparc_g0);
2240 if (code [1] == p [0])
2248 #define BR_SMALL_SIZE 2
2249 #define BR_LARGE_SIZE 2
2250 #define JUMP_IMM_SIZE 5
2251 #define ENABLE_WRONG_METHOD_CHECK 0
2254 * LOCKING: called with the domain lock held
2257 mono_arch_build_imt_thunk (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count,
2258 gpointer fail_tramp)
2262 guint32 *code, *start;
2264 for (i = 0; i < count; ++i) {
2265 MonoIMTCheckItem *item = imt_entries [i];
2266 if (item->is_equals) {
2267 if (item->check_target_idx) {
2268 if (!item->compare_done)
2269 item->chunk_size += CMP_SIZE;
2270 item->chunk_size += BR_SMALL_SIZE + JUMP_IMM_SIZE;
2273 item->chunk_size += 16;
2274 item->chunk_size += JUMP_IMM_SIZE;
2275 #if ENABLE_WRONG_METHOD_CHECK
2276 item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
2280 item->chunk_size += CMP_SIZE + BR_LARGE_SIZE;
2281 imt_entries [item->check_target_idx]->compare_done = TRUE;
2283 size += item->chunk_size;
2286 code = mono_method_alloc_generic_virtual_thunk (domain, size * 4);
2288 code = mono_domain_code_reserve (domain, size * 4);
2290 for (i = 0; i < count; ++i) {
2291 MonoIMTCheckItem *item = imt_entries [i];
2292 item->code_target = (guint8*)code;
2293 if (item->is_equals) {
2294 gboolean fail_case = !item->check_target_idx && fail_tramp;
2296 if (item->check_target_idx || fail_case) {
2297 if (!item->compare_done || fail_case) {
2298 sparc_set (code, (guint32)item->key, sparc_g5);
2299 sparc_cmp (code, MONO_ARCH_IMT_REG, sparc_g5);
2301 item->jmp_code = (guint8*)code;
2302 sparc_branch (code, 0, sparc_bne, 0);
2304 if (item->has_target_code) {
2305 sparc_set (code, item->value.target_code, sparc_f5);
2307 sparc_set (code, ((guint32)(&(vtable->vtable [item->value.vtable_slot]))), sparc_g5);
2308 sparc_ld (code, sparc_g5, 0, sparc_g5);
2310 sparc_jmpl (code, sparc_g5, sparc_g0, sparc_g0);
2314 sparc_patch (item->jmp_code, code);
2315 sparc_set (code, fail_tramp, sparc_g5);
2316 sparc_jmpl (code, sparc_g5, sparc_g0, sparc_g0);
2318 item->jmp_code = NULL;
2321 /* enable the commented code to assert on wrong method */
2322 #if ENABLE_WRONG_METHOD_CHECK
2323 g_assert_not_reached ();
2325 sparc_set (code, ((guint32)(&(vtable->vtable [item->value.vtable_slot]))), sparc_g5);
2326 sparc_ld (code, sparc_g5, 0, sparc_g5);
2327 sparc_jmpl (code, sparc_g5, sparc_g0, sparc_g0);
2329 #if ENABLE_WRONG_METHOD_CHECK
2330 g_assert_not_reached ();
2334 sparc_set (code, (guint32)item->key, sparc_g5);
2335 sparc_cmp (code, MONO_ARCH_IMT_REG, sparc_g5);
2336 item->jmp_code = (guint8*)code;
2337 sparc_branch (code, 0, sparc_beu, 0);
2341 /* patch the branches to get to the target items */
2342 for (i = 0; i < count; ++i) {
2343 MonoIMTCheckItem *item = imt_entries [i];
2344 if (item->jmp_code) {
2345 if (item->check_target_idx) {
2346 sparc_patch ((guint32*)item->jmp_code, imt_entries [item->check_target_idx]->code_target);
2351 mono_arch_flush_icache ((guint8*)start, (code - start) * 4);
2353 mono_stats.imt_thunks_size += (code - start) * 4;
2354 g_assert (code - start <= size);
2356 mono_tramp_info_register (mono_tramp_info_create (NULL, start, code - start, NULL, NULL), domain);
2362 mono_arch_find_imt_method (mgreg_t *regs, guint8 *code)
2365 g_assert_not_reached ();
2368 return (MonoMethod*)regs [sparc_g1];
2372 mono_arch_get_this_arg_from_call (mgreg_t *regs, guint8 *code)
2374 mono_sparc_flushw ();
2376 return (gpointer)regs [sparc_o0];
2380 * Some conventions used in the following code.
2381 * 2) The only scratch registers we have are o7 and g1. We try to
2382 * stick to o7 when we can, and use g1 when necessary.
2386 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2391 guint32 *code = (guint32*)(cfg->native_code + cfg->code_len);
2392 MonoInst *last_ins = NULL;
2396 if (cfg->verbose_level > 2)
2397 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2399 cpos = bb->max_offset;
2401 if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2405 MONO_BB_FOR_EACH_INS (bb, ins) {
2408 offset = (guint8*)code - cfg->native_code;
2410 spec = ins_get_spec (ins->opcode);
2412 max_len = ((guint8 *)spec)[MONO_INST_LEN];
2414 if (offset > (cfg->code_size - max_len - 16)) {
2415 cfg->code_size *= 2;
2416 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2417 code = (guint32*)(cfg->native_code + offset);
2419 code_start = (guint8*)code;
2420 // if (ins->cil_code)
2421 // g_print ("cil code\n");
2422 mono_debug_record_line_number (cfg, ins, offset);
2424 switch (ins->opcode) {
2425 case OP_STOREI1_MEMBASE_IMM:
2426 EMIT_STORE_MEMBASE_IMM (ins, stb);
2428 case OP_STOREI2_MEMBASE_IMM:
2429 EMIT_STORE_MEMBASE_IMM (ins, sth);
2431 case OP_STORE_MEMBASE_IMM:
2432 EMIT_STORE_MEMBASE_IMM (ins, sti);
2434 case OP_STOREI4_MEMBASE_IMM:
2435 EMIT_STORE_MEMBASE_IMM (ins, st);
2437 case OP_STOREI8_MEMBASE_IMM:
2439 EMIT_STORE_MEMBASE_IMM (ins, stx);
2441 /* Only generated by peephole opts */
2442 g_assert ((ins->inst_offset % 8) == 0);
2443 g_assert (ins->inst_imm == 0);
2444 EMIT_STORE_MEMBASE_IMM (ins, stx);
2447 case OP_STOREI1_MEMBASE_REG:
2448 EMIT_STORE_MEMBASE_REG (ins, stb);
2450 case OP_STOREI2_MEMBASE_REG:
2451 EMIT_STORE_MEMBASE_REG (ins, sth);
2453 case OP_STOREI4_MEMBASE_REG:
2454 EMIT_STORE_MEMBASE_REG (ins, st);
2456 case OP_STOREI8_MEMBASE_REG:
2458 EMIT_STORE_MEMBASE_REG (ins, stx);
2460 /* Only used by OP_MEMSET */
2461 EMIT_STORE_MEMBASE_REG (ins, std);
2464 case OP_STORE_MEMBASE_REG:
2465 EMIT_STORE_MEMBASE_REG (ins, sti);
2468 sparc_set (code, ins->inst_c0, ins->dreg);
2469 sparc_ld (code, ins->dreg, sparc_g0, ins->dreg);
2471 case OP_LOADI4_MEMBASE:
2473 EMIT_LOAD_MEMBASE (ins, ldsw);
2475 EMIT_LOAD_MEMBASE (ins, ld);
2478 case OP_LOADU4_MEMBASE:
2479 EMIT_LOAD_MEMBASE (ins, ld);
2481 case OP_LOADU1_MEMBASE:
2482 EMIT_LOAD_MEMBASE (ins, ldub);
2484 case OP_LOADI1_MEMBASE:
2485 EMIT_LOAD_MEMBASE (ins, ldsb);
2487 case OP_LOADU2_MEMBASE:
2488 EMIT_LOAD_MEMBASE (ins, lduh);
2490 case OP_LOADI2_MEMBASE:
2491 EMIT_LOAD_MEMBASE (ins, ldsh);
2493 case OP_LOAD_MEMBASE:
2495 EMIT_LOAD_MEMBASE (ins, ldx);
2497 EMIT_LOAD_MEMBASE (ins, ld);
2501 case OP_LOADI8_MEMBASE:
2502 EMIT_LOAD_MEMBASE (ins, ldx);
2505 case OP_ICONV_TO_I1:
2506 sparc_sll_imm (code, ins->sreg1, 24, sparc_o7);
2507 sparc_sra_imm (code, sparc_o7, 24, ins->dreg);
2509 case OP_ICONV_TO_I2:
2510 sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2511 sparc_sra_imm (code, sparc_o7, 16, ins->dreg);
2513 case OP_ICONV_TO_U1:
2514 sparc_and_imm (code, FALSE, ins->sreg1, 0xff, ins->dreg);
2516 case OP_ICONV_TO_U2:
2517 sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2518 sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
2520 case OP_LCONV_TO_OVF_U4:
2521 case OP_ICONV_TO_OVF_U4:
2522 /* Only used on V9 */
2523 sparc_cmp_imm (code, ins->sreg1, 0);
2524 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2525 MONO_PATCH_INFO_EXC, "OverflowException");
2526 sparc_branchp (code, 0, sparc_bl, sparc_xcc_short, 0, 0);
2528 sparc_set (code, 1, sparc_o7);
2529 sparc_sllx_imm (code, sparc_o7, 32, sparc_o7);
2530 sparc_cmp (code, ins->sreg1, sparc_o7);
2531 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2532 MONO_PATCH_INFO_EXC, "OverflowException");
2533 sparc_branchp (code, 0, sparc_bge, sparc_xcc_short, 0, 0);
2535 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2537 case OP_LCONV_TO_OVF_I4_UN:
2538 case OP_ICONV_TO_OVF_I4_UN:
2539 /* Only used on V9 */
2545 sparc_cmp (code, ins->sreg1, ins->sreg2);
2547 case OP_COMPARE_IMM:
2548 case OP_ICOMPARE_IMM:
2549 if (sparc_is_imm13 (ins->inst_imm))
2550 sparc_cmp_imm (code, ins->sreg1, ins->inst_imm);
2552 sparc_set (code, ins->inst_imm, sparc_o7);
2553 sparc_cmp (code, ins->sreg1, sparc_o7);
2558 * gdb does not like encountering 'ta 1' in the debugged code. So
2559 * instead of emitting a trap, we emit a call a C function and place a
2562 //sparc_ta (code, 1);
2563 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, mono_break);
2568 sparc_add (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2571 sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2576 /* according to inssel-long32.brg, this should set cc */
2577 EMIT_ALU_IMM (ins, add, TRUE);
2581 /* according to inssel-long32.brg, this should set cc */
2582 sparc_addx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2586 EMIT_ALU_IMM (ins, addx, TRUE);
2590 sparc_sub (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2593 sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2598 /* according to inssel-long32.brg, this should set cc */
2599 EMIT_ALU_IMM (ins, sub, TRUE);
2603 /* according to inssel-long32.brg, this should set cc */
2604 sparc_subx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2608 EMIT_ALU_IMM (ins, subx, TRUE);
2611 sparc_and (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2615 EMIT_ALU_IMM (ins, and, FALSE);
2618 /* Sign extend sreg1 into %y */
2619 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2620 sparc_wry (code, sparc_o7, sparc_g0);
2621 sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2622 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2625 sparc_wry (code, sparc_g0, sparc_g0);
2626 sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2632 /* Transform division into a shift */
2633 for (i = 1; i < 30; ++i) {
2635 if (ins->inst_imm == imm)
2641 sparc_srl_imm (code, ins->sreg1, 31, sparc_o7);
2642 sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2643 sparc_sra_imm (code, ins->dreg, 1, ins->dreg);
2646 /* http://compilers.iecc.com/comparch/article/93-04-079 */
2647 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2648 sparc_srl_imm (code, sparc_o7, 32 - i, sparc_o7);
2649 sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2650 sparc_sra_imm (code, ins->dreg, i, ins->dreg);
2654 /* Sign extend sreg1 into %y */
2655 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2656 sparc_wry (code, sparc_o7, sparc_g0);
2657 EMIT_ALU_IMM (ins, sdiv, TRUE);
2658 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2662 case OP_IDIV_UN_IMM:
2663 sparc_wry (code, sparc_g0, sparc_g0);
2664 EMIT_ALU_IMM (ins, udiv, FALSE);
2667 /* Sign extend sreg1 into %y */
2668 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2669 sparc_wry (code, sparc_o7, sparc_g0);
2670 sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, sparc_o7);
2671 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2672 sparc_smul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2673 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2676 sparc_wry (code, sparc_g0, sparc_g0);
2677 sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2678 sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2679 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2683 /* Sign extend sreg1 into %y */
2684 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2685 sparc_wry (code, sparc_o7, sparc_g0);
2686 if (!sparc_is_imm13 (ins->inst_imm)) {
2687 sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
2688 sparc_sdiv (code, TRUE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
2689 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2690 sparc_smul (code, FALSE, sparc_o7, GP_SCRATCH_REG, sparc_o7);
2693 sparc_sdiv_imm (code, TRUE, ins->sreg1, ins->inst_imm, sparc_o7);
2694 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2695 sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
2697 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2699 case OP_IREM_UN_IMM:
2700 sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
2701 sparc_wry (code, sparc_g0, sparc_g0);
2702 sparc_udiv (code, FALSE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
2703 sparc_umul (code, FALSE, GP_SCRATCH_REG, sparc_o7, sparc_o7);
2704 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2707 sparc_or (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2711 EMIT_ALU_IMM (ins, or, FALSE);
2714 sparc_xor (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2718 EMIT_ALU_IMM (ins, xor, FALSE);
2721 sparc_sll (code, ins->sreg1, ins->sreg2, ins->dreg);
2725 if (ins->inst_imm < (1 << 5))
2726 sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2728 sparc_set (code, ins->inst_imm, sparc_o7);
2729 sparc_sll (code, ins->sreg1, sparc_o7, ins->dreg);
2733 sparc_sra (code, ins->sreg1, ins->sreg2, ins->dreg);
2737 if (ins->inst_imm < (1 << 5))
2738 sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2740 sparc_set (code, ins->inst_imm, sparc_o7);
2741 sparc_sra (code, ins->sreg1, sparc_o7, ins->dreg);
2745 case OP_ISHR_UN_IMM:
2746 if (ins->inst_imm < (1 << 5))
2747 sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2749 sparc_set (code, ins->inst_imm, sparc_o7);
2750 sparc_srl (code, ins->sreg1, sparc_o7, ins->dreg);
2754 sparc_srl (code, ins->sreg1, ins->sreg2, ins->dreg);
2757 sparc_sllx (code, ins->sreg1, ins->sreg2, ins->dreg);
2760 if (ins->inst_imm < (1 << 6))
2761 sparc_sllx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2763 sparc_set (code, ins->inst_imm, sparc_o7);
2764 sparc_sllx (code, ins->sreg1, sparc_o7, ins->dreg);
2768 sparc_srax (code, ins->sreg1, ins->sreg2, ins->dreg);
2771 if (ins->inst_imm < (1 << 6))
2772 sparc_srax_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2774 sparc_set (code, ins->inst_imm, sparc_o7);
2775 sparc_srax (code, ins->sreg1, sparc_o7, ins->dreg);
2779 sparc_srlx (code, ins->sreg1, ins->sreg2, ins->dreg);
2781 case OP_LSHR_UN_IMM:
2782 if (ins->inst_imm < (1 << 6))
2783 sparc_srlx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2785 sparc_set (code, ins->inst_imm, sparc_o7);
2786 sparc_srlx (code, ins->sreg1, sparc_o7, ins->dreg);
2790 /* can't use sparc_not */
2791 sparc_xnor (code, FALSE, ins->sreg1, sparc_g0, ins->dreg);
2794 /* can't use sparc_neg */
2795 sparc_sub (code, FALSE, sparc_g0, ins->sreg1, ins->dreg);
2798 sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2804 if ((ins->inst_imm == 1) && (ins->sreg1 == ins->dreg))
2807 /* Transform multiplication into a shift */
2808 for (i = 0; i < 30; ++i) {
2810 if (ins->inst_imm == imm)
2814 sparc_sll_imm (code, ins->sreg1, i, ins->dreg);
2816 EMIT_ALU_IMM (ins, smul, FALSE);
2820 sparc_smul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2821 sparc_rdy (code, sparc_g1);
2822 sparc_sra_imm (code, ins->dreg, 31, sparc_o7);
2823 sparc_cmp (code, sparc_g1, sparc_o7);
2824 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2826 case OP_IMUL_OVF_UN:
2827 sparc_umul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2828 sparc_rdy (code, sparc_o7);
2829 sparc_cmp (code, sparc_o7, sparc_g0);
2830 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2833 sparc_set (code, ins->inst_c0, ins->dreg);
2836 sparc_set (code, ins->inst_l, ins->dreg);
2839 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2840 sparc_set_template (code, ins->dreg);
2843 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2844 sparc_set_template (code, ins->dreg);
2846 case OP_ICONV_TO_I4:
2847 case OP_ICONV_TO_U4:
2849 if (ins->sreg1 != ins->dreg)
2850 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2854 if (ins->sreg1 != ins->dreg)
2855 sparc_fmovd (code, ins->sreg1, ins->dreg);
2857 sparc_fmovs (code, ins->sreg1, ins->dreg);
2858 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2862 if (cfg->method->save_lmf)
2865 code = emit_load_volatile_arguments (cfg, code);
2866 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2867 sparc_set_template (code, sparc_o7);
2868 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_g0);
2869 /* Restore parent frame in delay slot */
2870 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
2873 /* ensure ins->sreg1 is not NULL */
2874 /* Might be misaligned in case of vtypes so use a byte load */
2875 sparc_ldsb_imm (code, ins->sreg1, 0, sparc_g0);
2878 sparc_add_imm (code, FALSE, sparc_fp, cfg->sig_cookie, sparc_o7);
2879 sparc_sti_imm (code, sparc_o7, ins->sreg1, 0);
2887 call = (MonoCallInst*)ins;
2888 g_assert (!call->virtual);
2889 code = emit_save_sp_to_lmf (cfg, code);
2890 if (ins->flags & MONO_INST_HAS_METHOD)
2891 code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2893 code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2895 code = emit_vret_token (ins, code);
2896 code = emit_move_return_value (ins, code);
2902 case OP_VOIDCALL_REG:
2904 call = (MonoCallInst*)ins;
2905 code = emit_save_sp_to_lmf (cfg, code);
2906 sparc_jmpl (code, ins->sreg1, sparc_g0, sparc_callsite);
2908 * We emit a special kind of nop in the delay slot to tell the
2909 * trampoline code that this is a virtual call, thus an unbox
2910 * trampoline might need to be called.
2913 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2917 code = emit_vret_token (ins, code);
2918 code = emit_move_return_value (ins, code);
2920 case OP_FCALL_MEMBASE:
2921 case OP_LCALL_MEMBASE:
2922 case OP_VCALL_MEMBASE:
2923 case OP_VCALL2_MEMBASE:
2924 case OP_VOIDCALL_MEMBASE:
2925 case OP_CALL_MEMBASE:
2926 call = (MonoCallInst*)ins;
2927 code = emit_save_sp_to_lmf (cfg, code);
2928 if (sparc_is_imm13 (ins->inst_offset)) {
2929 sparc_ldi_imm (code, ins->inst_basereg, ins->inst_offset, sparc_o7);
2931 sparc_set (code, ins->inst_offset, sparc_o7);
2932 sparc_ldi (code, ins->inst_basereg, sparc_o7, sparc_o7);
2934 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_callsite);
2936 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2940 code = emit_vret_token (ins, code);
2941 code = emit_move_return_value (ins, code);
2944 if (mono_method_signature (cfg->method)->ret->type == MONO_TYPE_R4)
2945 sparc_fdtos (code, ins->sreg1, sparc_f0);
2948 sparc_fmovd (code, ins->sreg1, ins->dreg);
2950 /* FIXME: Why not use fmovd ? */
2951 sparc_fmovs (code, ins->sreg1, ins->dreg);
2952 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2960 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2961 /* Perform stack touching */
2965 /* Keep alignment */
2966 /* Add 4 to compensate for the rounding of localloc_offset */
2967 sparc_add_imm (code, FALSE, ins->sreg1, 4 + MONO_ARCH_LOCALLOC_ALIGNMENT - 1, ins->dreg);
2968 sparc_set (code, ~(MONO_ARCH_LOCALLOC_ALIGNMENT - 1), sparc_o7);
2969 sparc_and (code, FALSE, ins->dreg, sparc_o7, ins->dreg);
2971 if ((ins->flags & MONO_INST_INIT) && (ins->sreg1 == ins->dreg)) {
2973 size_reg = sparc_g4;
2975 size_reg = sparc_g1;
2977 sparc_mov_reg_reg (code, ins->dreg, size_reg);
2980 size_reg = ins->sreg1;
2982 sparc_sub (code, FALSE, sparc_sp, ins->dreg, ins->dreg);
2983 /* Keep %sp valid at all times */
2984 sparc_mov_reg_reg (code, ins->dreg, sparc_sp);
2985 /* Round localloc_offset too so the result is at least 8 aligned */
2986 offset2 = ALIGN_TO (cfg->arch.localloc_offset, 8);
2987 g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + offset2));
2988 sparc_add_imm (code, FALSE, ins->dreg, MONO_SPARC_STACK_BIAS + offset2, ins->dreg);
2990 if (ins->flags & MONO_INST_INIT) {
2992 /* Initialize memory region */
2993 sparc_cmp_imm (code, size_reg, 0);
2995 sparc_branch (code, 0, sparc_be, 0);
2997 sparc_set (code, 0, sparc_o7);
2998 sparc_sub_imm (code, 0, size_reg, mono_hwcap_sparc_is_v9 ? 8 : 4, size_reg);
3001 if (mono_hwcap_sparc_is_v9)
3002 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
3004 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
3005 sparc_cmp (code, sparc_o7, size_reg);
3007 sparc_branch (code, 0, sparc_bl, 0);
3008 sparc_patch (br [2], br [1]);
3010 sparc_add_imm (code, 0, sparc_o7, mono_hwcap_sparc_is_v9 ? 8 : 4, sparc_o7);
3011 sparc_patch (br [0], code);
3015 case OP_LOCALLOC_IMM: {
3016 gint32 offset = ins->inst_imm;
3019 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3020 /* Perform stack touching */
3024 /* To compensate for the rounding of localloc_offset */
3025 offset += sizeof (gpointer);
3026 offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3027 if (sparc_is_imm13 (offset))
3028 sparc_sub_imm (code, FALSE, sparc_sp, offset, sparc_sp);
3030 sparc_set (code, offset, sparc_o7);
3031 sparc_sub (code, FALSE, sparc_sp, sparc_o7, sparc_sp);
3033 /* Round localloc_offset too so the result is at least 8 aligned */
3034 offset2 = ALIGN_TO (cfg->arch.localloc_offset, 8);
3035 g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + offset2));
3036 sparc_add_imm (code, FALSE, sparc_sp, MONO_SPARC_STACK_BIAS + offset2, ins->dreg);
3037 if ((ins->flags & MONO_INST_INIT) && (offset > 0)) {
3043 while (i < offset) {
3044 if (mono_hwcap_sparc_is_v9) {
3045 sparc_stx_imm (code, sparc_g0, ins->dreg, i);
3049 sparc_st_imm (code, sparc_g0, ins->dreg, i);
3055 sparc_set (code, offset, sparc_o7);
3056 sparc_sub_imm (code, 0, sparc_o7, mono_hwcap_sparc_is_v9 ? 8 : 4, sparc_o7);
3057 /* beginning of loop */
3059 if (mono_hwcap_sparc_is_v9)
3060 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
3062 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
3063 sparc_cmp_imm (code, sparc_o7, 0);
3065 sparc_branch (code, 0, sparc_bne, 0);
3067 sparc_sub_imm (code, 0, sparc_o7, mono_hwcap_sparc_is_v9 ? 8 : 4, sparc_o7);
3068 sparc_patch (br [1], br [0]);
3074 sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3075 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3076 (gpointer)"mono_arch_throw_exception");
3080 sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3081 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3082 (gpointer)"mono_arch_rethrow_exception");
3085 case OP_START_HANDLER: {
3087 * The START_HANDLER instruction marks the beginning of a handler
3088 * block. It is called using a call instruction, so %o7 contains
3089 * the return address. Since the handler executes in the same stack
3090 * frame as the method itself, we can't use save/restore to save
3091 * the return address. Instead, we save it into a dedicated
3094 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3095 if (!sparc_is_imm13 (spvar->inst_offset)) {
3096 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3097 sparc_sti (code, sparc_o7, spvar->inst_basereg, GP_SCRATCH_REG);
3100 sparc_sti_imm (code, sparc_o7, spvar->inst_basereg, spvar->inst_offset);
3103 case OP_ENDFILTER: {
3104 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3105 if (!sparc_is_imm13 (spvar->inst_offset)) {
3106 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3107 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
3110 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3111 sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3113 sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3116 case OP_ENDFINALLY: {
3117 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3118 if (!sparc_is_imm13 (spvar->inst_offset)) {
3119 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3120 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
3123 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3124 sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3128 case OP_CALL_HANDLER:
3129 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3130 /* This is a jump inside the method, so call_simple works even on V9 */
3131 sparc_call_simple (code, 0);
3133 mono_cfg_add_try_hole (cfg, ins->inst_eh_block, code, bb);
3136 ins->inst_c0 = (guint8*)code - cfg->native_code;
3138 case OP_RELAXED_NOP:
3141 case OP_DUMMY_STORE:
3142 case OP_NOT_REACHED:
3146 //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
3147 if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
3149 if (ins->inst_target_bb->native_offset) {
3150 gint32 disp = (ins->inst_target_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2;
3151 g_assert (sparc_is_imm22 (disp));
3152 sparc_branch (code, 1, sparc_ba, disp);
3154 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3155 sparc_branch (code, 1, sparc_ba, 0);
3160 sparc_jmp (code, ins->sreg1, sparc_g0);
3168 if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3169 sparc_clr_reg (code, ins->dreg);
3170 sparc_movcc_imm (code, sparc_xcc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3173 sparc_clr_reg (code, ins->dreg);
3175 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), DEFAULT_ICC, 0, 2);
3177 sparc_branch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3180 sparc_set (code, 1, ins->dreg);
3188 if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3189 sparc_clr_reg (code, ins->dreg);
3190 sparc_movcc_imm (code, sparc_icc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3193 sparc_clr_reg (code, ins->dreg);
3194 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), sparc_icc_short, 0, 2);
3196 sparc_set (code, 1, ins->dreg);
3199 case OP_COND_EXC_EQ:
3200 case OP_COND_EXC_NE_UN:
3201 case OP_COND_EXC_LT:
3202 case OP_COND_EXC_LT_UN:
3203 case OP_COND_EXC_GT:
3204 case OP_COND_EXC_GT_UN:
3205 case OP_COND_EXC_GE:
3206 case OP_COND_EXC_GE_UN:
3207 case OP_COND_EXC_LE:
3208 case OP_COND_EXC_LE_UN:
3209 case OP_COND_EXC_OV:
3210 case OP_COND_EXC_NO:
3212 case OP_COND_EXC_NC:
3213 case OP_COND_EXC_IEQ:
3214 case OP_COND_EXC_INE_UN:
3215 case OP_COND_EXC_ILT:
3216 case OP_COND_EXC_ILT_UN:
3217 case OP_COND_EXC_IGT:
3218 case OP_COND_EXC_IGT_UN:
3219 case OP_COND_EXC_IGE:
3220 case OP_COND_EXC_IGE_UN:
3221 case OP_COND_EXC_ILE:
3222 case OP_COND_EXC_ILE_UN:
3223 case OP_COND_EXC_IOV:
3224 case OP_COND_EXC_INO:
3225 case OP_COND_EXC_IC:
3226 case OP_COND_EXC_INC:
3230 EMIT_COND_SYSTEM_EXCEPTION (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1);
3233 case OP_SPARC_COND_EXC_EQZ:
3234 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brz, ins->inst_p1);
3236 case OP_SPARC_COND_EXC_GEZ:
3237 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgez, ins->inst_p1);
3239 case OP_SPARC_COND_EXC_GTZ:
3240 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgz, ins->inst_p1);
3242 case OP_SPARC_COND_EXC_LEZ:
3243 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlez, ins->inst_p1);
3245 case OP_SPARC_COND_EXC_LTZ:
3246 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlz, ins->inst_p1);
3248 case OP_SPARC_COND_EXC_NEZ:
3249 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brnz, ins->inst_p1);
3262 if (mono_hwcap_sparc_is_v9)
3263 EMIT_COND_BRANCH_PREDICTED (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3265 EMIT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3270 EMIT_COND_BRANCH_BPR (ins, brz, 1, 1, 1);
3272 case OP_SPARC_BRLEZ:
3273 EMIT_COND_BRANCH_BPR (ins, brlez, 1, 1, 1);
3276 EMIT_COND_BRANCH_BPR (ins, brlz, 1, 1, 1);
3279 EMIT_COND_BRANCH_BPR (ins, brnz, 1, 1, 1);
3282 EMIT_COND_BRANCH_BPR (ins, brgz, 1, 1, 1);
3284 case OP_SPARC_BRGEZ:
3285 EMIT_COND_BRANCH_BPR (ins, brgez, 1, 1, 1);
3288 /* floating point opcodes */
3290 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
3292 sparc_set_template (code, sparc_o7);
3294 sparc_sethi (code, 0, sparc_o7);
3296 sparc_lddf_imm (code, sparc_o7, 0, ins->dreg);
3299 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
3301 sparc_set_template (code, sparc_o7);
3303 sparc_sethi (code, 0, sparc_o7);
3305 sparc_ldf_imm (code, sparc_o7, 0, FP_SCRATCH_REG);
3307 /* Extend to double */
3308 sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3310 case OP_STORER8_MEMBASE_REG:
3311 if (!sparc_is_imm13 (ins->inst_offset + 4)) {
3312 sparc_set (code, ins->inst_offset, sparc_o7);
3313 /* SPARCV9 handles misaligned fp loads/stores */
3314 if (!v64 && (ins->inst_offset % 8)) {
3316 sparc_add (code, FALSE, ins->inst_destbasereg, sparc_o7, sparc_o7);
3317 sparc_stf (code, ins->sreg1, sparc_o7, sparc_g0);
3318 sparc_stf_imm (code, ins->sreg1 + 1, sparc_o7, 4);
3320 sparc_stdf (code, ins->sreg1, ins->inst_destbasereg, sparc_o7);
3323 if (!v64 && (ins->inst_offset % 8)) {
3325 sparc_stf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3326 sparc_stf_imm (code, ins->sreg1 + 1, ins->inst_destbasereg, ins->inst_offset + 4);
3328 sparc_stdf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3331 case OP_LOADR8_MEMBASE:
3332 EMIT_LOAD_MEMBASE (ins, lddf);
3334 case OP_STORER4_MEMBASE_REG:
3335 /* This requires a double->single conversion */
3336 sparc_fdtos (code, ins->sreg1, FP_SCRATCH_REG);
3337 if (!sparc_is_imm13 (ins->inst_offset)) {
3338 sparc_set (code, ins->inst_offset, sparc_o7);
3339 sparc_stf (code, FP_SCRATCH_REG, ins->inst_destbasereg, sparc_o7);
3342 sparc_stf_imm (code, FP_SCRATCH_REG, ins->inst_destbasereg, ins->inst_offset);
3344 case OP_LOADR4_MEMBASE: {
3345 /* ldf needs a single precision register */
3346 int dreg = ins->dreg;
3347 ins->dreg = FP_SCRATCH_REG;
3348 EMIT_LOAD_MEMBASE (ins, ldf);
3350 /* Extend to double */
3351 sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3354 case OP_ICONV_TO_R4: {
3355 MonoInst *spill = cfg->arch.float_spill_slot;
3356 gint32 reg = spill->inst_basereg;
3357 gint32 offset = spill->inst_offset;
3359 g_assert (spill->opcode == OP_REGOFFSET);
3361 if (!sparc_is_imm13 (offset)) {
3362 sparc_set (code, offset, sparc_o7);
3363 sparc_stx (code, ins->sreg1, reg, offset);
3364 sparc_lddf (code, reg, offset, FP_SCRATCH_REG);
3366 sparc_stx_imm (code, ins->sreg1, reg, offset);
3367 sparc_lddf_imm (code, reg, offset, FP_SCRATCH_REG);
3369 sparc_fxtos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3371 if (!sparc_is_imm13 (offset)) {
3372 sparc_set (code, offset, sparc_o7);
3373 sparc_st (code, ins->sreg1, reg, sparc_o7);
3374 sparc_ldf (code, reg, sparc_o7, FP_SCRATCH_REG);
3376 sparc_st_imm (code, ins->sreg1, reg, offset);
3377 sparc_ldf_imm (code, reg, offset, FP_SCRATCH_REG);
3379 sparc_fitos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3381 sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3384 case OP_ICONV_TO_R8: {
3385 MonoInst *spill = cfg->arch.float_spill_slot;
3386 gint32 reg = spill->inst_basereg;
3387 gint32 offset = spill->inst_offset;
3389 g_assert (spill->opcode == OP_REGOFFSET);
3392 if (!sparc_is_imm13 (offset)) {
3393 sparc_set (code, offset, sparc_o7);
3394 sparc_stx (code, ins->sreg1, reg, sparc_o7);
3395 sparc_lddf (code, reg, sparc_o7, FP_SCRATCH_REG);
3397 sparc_stx_imm (code, ins->sreg1, reg, offset);
3398 sparc_lddf_imm (code, reg, offset, FP_SCRATCH_REG);
3400 sparc_fxtod (code, FP_SCRATCH_REG, ins->dreg);
3402 if (!sparc_is_imm13 (offset)) {
3403 sparc_set (code, offset, sparc_o7);
3404 sparc_st (code, ins->sreg1, reg, sparc_o7);
3405 sparc_ldf (code, reg, sparc_o7, FP_SCRATCH_REG);
3407 sparc_st_imm (code, ins->sreg1, reg, offset);
3408 sparc_ldf_imm (code, reg, offset, FP_SCRATCH_REG);
3410 sparc_fitod (code, FP_SCRATCH_REG, ins->dreg);
3414 case OP_FCONV_TO_I1:
3415 case OP_FCONV_TO_U1:
3416 case OP_FCONV_TO_I2:
3417 case OP_FCONV_TO_U2:
3422 case OP_FCONV_TO_I4:
3423 case OP_FCONV_TO_U4: {
3424 MonoInst *spill = cfg->arch.float_spill_slot;
3425 gint32 reg = spill->inst_basereg;
3426 gint32 offset = spill->inst_offset;
3428 g_assert (spill->opcode == OP_REGOFFSET);
3430 sparc_fdtoi (code, ins->sreg1, FP_SCRATCH_REG);
3431 if (!sparc_is_imm13 (offset)) {
3432 sparc_set (code, offset, sparc_o7);
3433 sparc_stdf (code, FP_SCRATCH_REG, reg, sparc_o7);
3434 sparc_ld (code, reg, sparc_o7, ins->dreg);
3436 sparc_stdf_imm (code, FP_SCRATCH_REG, reg, offset);
3437 sparc_ld_imm (code, reg, offset, ins->dreg);
3440 switch (ins->opcode) {
3441 case OP_FCONV_TO_I1:
3442 case OP_FCONV_TO_U1:
3443 sparc_and_imm (code, 0, ins->dreg, 0xff, ins->dreg);
3445 case OP_FCONV_TO_I2:
3446 case OP_FCONV_TO_U2:
3447 sparc_set (code, 0xffff, sparc_o7);
3448 sparc_and (code, 0, ins->dreg, sparc_o7, ins->dreg);
3455 case OP_FCONV_TO_I8:
3456 case OP_FCONV_TO_U8:
3458 g_assert_not_reached ();
3460 case OP_FCONV_TO_R4:
3461 /* FIXME: Change precision ? */
3463 sparc_fmovd (code, ins->sreg1, ins->dreg);
3465 sparc_fmovs (code, ins->sreg1, ins->dreg);
3466 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3469 case OP_LCONV_TO_R_UN: {
3471 g_assert_not_reached ();
3474 case OP_LCONV_TO_OVF_I:
3475 case OP_LCONV_TO_OVF_I4_2: {
3476 guint32 *br [3], *label [1];
3479 * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3481 sparc_cmp_imm (code, ins->sreg1, 0);
3483 sparc_branch (code, 1, sparc_bneg, 0);
3487 /* ms word must be 0 */
3488 sparc_cmp_imm (code, ins->sreg2, 0);
3490 sparc_branch (code, 1, sparc_be, 0);
3495 EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_ba, "OverflowException");
3498 sparc_patch (br [0], code);
3500 /* ms word must 0xfffffff */
3501 sparc_cmp_imm (code, ins->sreg2, -1);
3503 sparc_branch (code, 1, sparc_bne, 0);
3505 sparc_patch (br [2], label [0]);
3508 sparc_patch (br [1], code);
3509 if (ins->sreg1 != ins->dreg)
3510 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
3514 sparc_faddd (code, ins->sreg1, ins->sreg2, ins->dreg);
3517 sparc_fsubd (code, ins->sreg1, ins->sreg2, ins->dreg);
3520 sparc_fmuld (code, ins->sreg1, ins->sreg2, ins->dreg);
3523 sparc_fdivd (code, ins->sreg1, ins->sreg2, ins->dreg);
3527 sparc_fnegd (code, ins->sreg1, ins->dreg);
3529 /* FIXME: why don't use fnegd ? */
3530 sparc_fnegs (code, ins->sreg1, ins->dreg);
3534 sparc_fdivd (code, ins->sreg1, ins->sreg2, FP_SCRATCH_REG);
3535 sparc_fmuld (code, ins->sreg2, FP_SCRATCH_REG, FP_SCRATCH_REG);
3536 sparc_fsubd (code, ins->sreg1, FP_SCRATCH_REG, ins->dreg);
3539 sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3546 sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3547 sparc_clr_reg (code, ins->dreg);
3548 switch (ins->opcode) {
3551 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 4);
3553 sparc_set (code, 1, ins->dreg);
3554 sparc_fbranch (code, 1, sparc_fbu, 2);
3556 sparc_set (code, 1, ins->dreg);
3559 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3561 sparc_set (code, 1, ins->dreg);
3567 EMIT_FLOAT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3570 /* clt.un + brfalse */
3572 sparc_fbranch (code, 1, sparc_fbul, 0);
3575 EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3576 sparc_patch (p, (guint8*)code);
3580 /* cgt.un + brfalse */
3582 sparc_fbranch (code, 1, sparc_fbug, 0);
3585 EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3586 sparc_patch (p, (guint8*)code);
3590 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbne, 1, 1);
3591 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3594 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbl, 1, 1);
3595 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3598 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbg, 1, 1);
3599 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3602 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbge, 1, 1);
3603 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3606 EMIT_FLOAT_COND_BRANCH (ins, sparc_fble, 1, 1);
3607 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3610 MonoInst *spill = cfg->arch.float_spill_slot;
3611 gint32 reg = spill->inst_basereg;
3612 gint32 offset = spill->inst_offset;
3614 g_assert (spill->opcode == OP_REGOFFSET);
3616 if (!sparc_is_imm13 (offset)) {
3617 sparc_set (code, offset, sparc_o7);
3618 sparc_stdf (code, ins->sreg1, reg, sparc_o7);
3619 sparc_lduh (code, reg, sparc_o7, sparc_o7);
3621 sparc_stdf_imm (code, ins->sreg1, reg, offset);
3622 sparc_lduh_imm (code, reg, offset, sparc_o7);
3624 sparc_srl_imm (code, sparc_o7, 4, sparc_o7);
3625 sparc_and_imm (code, FALSE, sparc_o7, 2047, sparc_o7);
3626 sparc_cmp_imm (code, sparc_o7, 2047);
3627 EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_be, "ArithmeticException");
3629 sparc_fmovd (code, ins->sreg1, ins->dreg);
3631 sparc_fmovs (code, ins->sreg1, ins->dreg);
3632 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3637 case OP_MEMORY_BARRIER:
3638 sparc_membar (code, sparc_membar_all);
3643 g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
3645 g_warning ("%s:%d: unknown opcode %s\n", __FILE__, __LINE__, mono_inst_name (ins->opcode));
3647 g_assert_not_reached ();
3650 if ((((guint8*)code) - code_start) > max_len) {
3651 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3652 mono_inst_name (ins->opcode), max_len, ((guint8*)code) - code_start);
3653 g_assert_not_reached ();
3661 cfg->code_len = (guint8*)code - cfg->native_code;
3665 mono_arch_register_lowlevel_calls (void)
3667 mono_register_jit_icall (mono_arch_get_lmf_addr, "mono_arch_get_lmf_addr", NULL, TRUE);
3671 mono_arch_patch_code (MonoCompile *cfg, MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3673 MonoJumpInfo *patch_info;
3675 /* FIXME: Move part of this to arch independent code */
3676 for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3677 unsigned char *ip = patch_info->ip.i + code;
3680 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3682 switch (patch_info->type) {
3683 case MONO_PATCH_INFO_NONE:
3685 case MONO_PATCH_INFO_METHOD_JUMP: {
3686 guint32 *ip2 = (guint32*)ip;
3687 /* Might already been patched */
3688 sparc_set_template (ip2, sparc_o7);
3694 sparc_patch ((guint32*)ip, target);
3699 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3702 guint32 *code = (guint32*)p;
3703 MonoMethodSignature *sig = mono_method_signature (cfg->method);
3706 /* Save registers to stack */
3707 for (i = 0; i < 6; ++i)
3708 sparc_sti_imm (code, sparc_i0 + i, sparc_fp, ARGS_OFFSET + (i * sizeof (gpointer)));
3710 cinfo = get_call_info (cfg, sig, FALSE);
3712 /* Save float regs on V9, since they are caller saved */
3713 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3714 ArgInfo *ainfo = cinfo->args + i;
3715 gint32 stack_offset;
3717 stack_offset = ainfo->offset + ARGS_OFFSET;
3719 if (ainfo->storage == ArgInFloatReg) {
3720 if (!sparc_is_imm13 (stack_offset))
3722 sparc_stf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3724 else if (ainfo->storage == ArgInDoubleReg) {
3725 /* The offset is guaranteed to be aligned by the ABI rules */
3726 sparc_stdf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3730 sparc_set (code, cfg->method, sparc_o0);
3731 sparc_add_imm (code, FALSE, sparc_fp, MONO_SPARC_STACK_BIAS, sparc_o1);
3733 mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
3736 /* Restore float regs on V9 */
3737 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3738 ArgInfo *ainfo = cinfo->args + i;
3739 gint32 stack_offset;
3741 stack_offset = ainfo->offset + ARGS_OFFSET;
3743 if (ainfo->storage == ArgInFloatReg) {
3744 if (!sparc_is_imm13 (stack_offset))
3746 sparc_ldf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3748 else if (ainfo->storage == ArgInDoubleReg) {
3749 /* The offset is guaranteed to be aligned by the ABI rules */
3750 sparc_lddf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3768 mono_arch_instrument_epilog_full (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments, gboolean preserve_argument_registers)
3770 guint32 *code = (guint32*)p;
3771 int save_mode = SAVE_NONE;
3772 MonoMethod *method = cfg->method;
3774 switch (mini_get_underlying_type (mono_method_signature (method)->ret)->type) {
3775 case MONO_TYPE_VOID:
3776 /* special case string .ctor icall */
3777 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
3778 save_mode = SAVE_ONE;
3780 save_mode = SAVE_NONE;
3785 save_mode = SAVE_ONE;
3787 save_mode = SAVE_TWO;
3792 save_mode = SAVE_FP;
3794 case MONO_TYPE_VALUETYPE:
3795 save_mode = SAVE_STRUCT;
3798 save_mode = SAVE_ONE;
3802 /* Save the result to the stack and also put it into the output registers */
3804 switch (save_mode) {
3807 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
3808 sparc_st_imm (code, sparc_i0, sparc_fp, 72);
3809 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3810 sparc_mov_reg_reg (code, sparc_i1, sparc_o2);
3813 sparc_sti_imm (code, sparc_i0, sparc_fp, ARGS_OFFSET);
3814 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3818 sparc_stdf_imm (code, sparc_f0, sparc_fp, ARGS_OFFSET);
3820 sparc_stdf_imm (code, sparc_f0, sparc_fp, 72);
3821 sparc_ld_imm (code, sparc_fp, 72, sparc_o1);
3822 sparc_ld_imm (code, sparc_fp, 72 + 4, sparc_o2);
3827 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3829 sparc_ld_imm (code, sparc_fp, 64, sparc_o1);
3837 sparc_set (code, cfg->method, sparc_o0);
3839 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, func);
3842 /* Restore result */
3844 switch (save_mode) {
3846 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
3847 sparc_ld_imm (code, sparc_fp, 72, sparc_i0);
3850 sparc_ldi_imm (code, sparc_fp, ARGS_OFFSET, sparc_i0);
3853 sparc_lddf_imm (code, sparc_fp, ARGS_OFFSET, sparc_f0);
3864 mono_arch_emit_prolog (MonoCompile *cfg)
3866 MonoMethod *method = cfg->method;
3867 MonoMethodSignature *sig;
3873 cfg->code_size = 256;
3874 cfg->native_code = g_malloc (cfg->code_size);
3875 code = (guint32*)cfg->native_code;
3877 /* FIXME: Generate intermediate code instead */
3879 offset = cfg->stack_offset;
3880 offset += (16 * sizeof (gpointer)); /* register save area */
3882 offset += 4; /* struct/union return pointer */
3885 /* add parameter area size for called functions */
3886 if (cfg->param_area < (6 * sizeof (gpointer)))
3887 /* Reserve space for the first 6 arguments even if it is unused */
3888 offset += 6 * sizeof (gpointer);
3890 offset += cfg->param_area;
3892 /* align the stack size */
3893 offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3896 * localloc'd memory is stored between the local variables (whose
3897 * size is given by cfg->stack_offset), and between the space reserved
3900 cfg->arch.localloc_offset = offset - cfg->stack_offset;
3902 cfg->stack_offset = offset;
3904 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3905 /* Perform stack touching */
3909 if (!sparc_is_imm13 (- cfg->stack_offset)) {
3910 /* Can't use sparc_o7 here, since we're still in the caller's frame */
3911 sparc_set (code, (- cfg->stack_offset), GP_SCRATCH_REG);
3912 sparc_save (code, sparc_sp, GP_SCRATCH_REG, sparc_sp);
3915 sparc_save_imm (code, sparc_sp, - cfg->stack_offset, sparc_sp);
3918 if (strstr (cfg->method->name, "foo")) {
3919 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
3920 sparc_call_simple (code, 0);
3925 sig = mono_method_signature (method);
3927 cinfo = get_call_info (cfg, sig, FALSE);
3929 /* Keep in sync with emit_load_volatile_arguments */
3930 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3931 ArgInfo *ainfo = cinfo->args + i;
3932 gint32 stack_offset;
3934 inst = cfg->args [i];
3936 if (sig->hasthis && (i == 0))
3937 arg_type = &mono_defaults.object_class->byval_arg;
3939 arg_type = sig->params [i - sig->hasthis];
3941 stack_offset = ainfo->offset + ARGS_OFFSET;
3943 /* Save the split arguments so they will reside entirely on the stack */
3944 if (ainfo->storage == ArgInSplitRegStack) {
3945 /* Save the register to the stack */
3946 g_assert (inst->opcode == OP_REGOFFSET);
3947 if (!sparc_is_imm13 (stack_offset))
3949 sparc_st_imm (code, sparc_i5, inst->inst_basereg, stack_offset);
3952 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
3953 /* Save the argument to a dword aligned stack location */
3955 * stack_offset contains the offset of the argument on the stack.
3956 * inst->inst_offset contains the dword aligned offset where the value
3959 if (ainfo->storage == ArgInIRegPair) {
3960 if (!sparc_is_imm13 (inst->inst_offset + 4))
3962 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3963 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3966 if (ainfo->storage == ArgInSplitRegStack) {
3968 g_assert_not_reached ();
3970 if (stack_offset != inst->inst_offset) {
3971 /* stack_offset is not dword aligned, so we need to make a copy */
3972 sparc_st_imm (code, sparc_i5, inst->inst_basereg, inst->inst_offset);
3973 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3974 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3978 if (ainfo->storage == ArgOnStackPair) {
3980 g_assert_not_reached ();
3982 if (stack_offset != inst->inst_offset) {
3983 /* stack_offset is not dword aligned, so we need to make a copy */
3984 sparc_ld_imm (code, sparc_fp, stack_offset, sparc_o7);
3985 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset);
3986 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3987 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3991 g_assert_not_reached ();
3994 if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
3995 /* Argument in register, but need to be saved to stack */
3996 if (!sparc_is_imm13 (stack_offset))
3998 if ((stack_offset - ARGS_OFFSET) & 0x1)
3999 sparc_stb_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4001 if ((stack_offset - ARGS_OFFSET) & 0x2)
4002 sparc_sth_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4004 if ((stack_offset - ARGS_OFFSET) & 0x4)
4005 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4008 sparc_stx_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4010 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4014 if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
4018 /* Argument in regpair, but need to be saved to stack */
4019 if (!sparc_is_imm13 (inst->inst_offset + 4))
4021 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
4022 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
4024 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
4025 if (!sparc_is_imm13 (stack_offset))
4027 sparc_stf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
4029 else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
4030 /* The offset is guaranteed to be aligned by the ABI rules */
4031 sparc_stdf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
4034 if ((ainfo->storage == ArgInFloatReg) && (inst->opcode == OP_REGVAR)) {
4035 /* Need to move into the a double precision register */
4036 sparc_fstod (code, ainfo->reg, ainfo->reg - 1);
4039 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
4040 if (inst->opcode == OP_REGVAR)
4041 /* FIXME: Load the argument into memory */
4047 if (cfg->method->save_lmf) {
4048 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
4051 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
4052 sparc_set_template (code, sparc_o7);
4053 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ip));
4055 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
4057 sparc_sti_imm (code, sparc_fp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebp));
4059 /* FIXME: add a relocation for this */
4060 sparc_set (code, cfg->method, sparc_o7);
4061 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method));
4063 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
4064 (gpointer)"mono_arch_get_lmf_addr");
4067 code = (guint32*)mono_sparc_emit_save_lmf (code, lmf_offset);
4070 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4071 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
4073 cfg->code_len = (guint8*)code - cfg->native_code;
4075 g_assert (cfg->code_len <= cfg->code_size);
4077 return (guint8*)code;
4081 mono_arch_emit_epilog (MonoCompile *cfg)
4083 MonoMethod *method = cfg->method;
4086 int max_epilog_size = 16 + 20 * 4;
4088 if (cfg->method->save_lmf)
4089 max_epilog_size += 128;
4091 if (mono_jit_trace_calls != NULL)
4092 max_epilog_size += 50;
4094 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
4095 max_epilog_size += 50;
4097 while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
4098 cfg->code_size *= 2;
4099 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4100 cfg->stat_code_reallocs++;
4103 code = (guint32*)(cfg->native_code + cfg->code_len);
4105 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4106 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
4108 if (cfg->method->save_lmf) {
4109 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
4111 code = mono_sparc_emit_restore_lmf (code, lmf_offset);
4115 * The V8 ABI requires that calls to functions which return a structure
4118 if (!v64 && mono_method_signature (cfg->method)->pinvoke && MONO_TYPE_ISSTRUCT(mono_method_signature (cfg->method)->ret))
4119 sparc_jmpl_imm (code, sparc_i7, 12, sparc_g0);
4123 /* Only fold last instruction into the restore if the exit block has an in count of 1
4124 and the previous block hasn't been optimized away since it may have an in count > 1 */
4125 if (cfg->bb_exit->in_count == 1 && cfg->bb_exit->in_bb[0]->native_offset != cfg->bb_exit->native_offset)
4129 * FIXME: The last instruction might have a branch pointing into it like in
4130 * int_ceq sparc_i0 <-
4134 /* Try folding last instruction into the restore */
4135 if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && sparc_inst_imm (code [-2]) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4136 /* or reg, imm, %i0 */
4137 int reg = sparc_inst_rs1 (code [-2]);
4138 int imm = (((gint32)(sparc_inst_imm13 (code [-2]))) << 19) >> 19;
4139 code [-2] = code [-1];
4141 sparc_restore_imm (code, reg, imm, sparc_o0);
4144 if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && (!sparc_inst_imm (code [-2])) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4145 /* or reg, reg, %i0 */
4146 int reg1 = sparc_inst_rs1 (code [-2]);
4147 int reg2 = sparc_inst_rs2 (code [-2]);
4148 code [-2] = code [-1];
4150 sparc_restore (code, reg1, reg2, sparc_o0);
4153 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
4155 cfg->code_len = (guint8*)code - cfg->native_code;
4157 g_assert (cfg->code_len < cfg->code_size);
4162 mono_arch_emit_exceptions (MonoCompile *cfg)
4164 MonoJumpInfo *patch_info;
4169 MonoClass *exc_classes [16];
4170 guint8 *exc_throw_start [16], *exc_throw_end [16];
4172 /* Compute needed space */
4173 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4174 if (patch_info->type == MONO_PATCH_INFO_EXC)
4179 * make sure we have enough space for exceptions
4182 code_size = exc_count * (20 * 4);
4184 code_size = exc_count * 24;
4187 while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4188 cfg->code_size *= 2;
4189 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4190 cfg->stat_code_reallocs++;
4193 code = (guint32*)(cfg->native_code + cfg->code_len);
4195 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4196 switch (patch_info->type) {
4197 case MONO_PATCH_INFO_EXC: {
4198 MonoClass *exc_class;
4199 guint32 *buf, *buf2;
4200 guint32 throw_ip, type_idx;
4203 sparc_patch ((guint32*)(cfg->native_code + patch_info->ip.i), code);
4205 exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4206 g_assert (exc_class);
4207 type_idx = exc_class->type_token - MONO_TOKEN_TYPE_DEF;
4208 throw_ip = patch_info->ip.i;
4210 /* Find a throw sequence for the same exception class */
4211 for (i = 0; i < nthrows; ++i)
4212 if (exc_classes [i] == exc_class)
4216 guint32 throw_offset = (((guint8*)exc_throw_end [i] - cfg->native_code) - throw_ip) >> 2;
4217 if (!sparc_is_imm13 (throw_offset))
4218 sparc_set32 (code, throw_offset, sparc_o1);
4220 disp = (exc_throw_start [i] - (guint8*)code) >> 2;
4221 g_assert (sparc_is_imm22 (disp));
4222 sparc_branch (code, 0, sparc_ba, disp);
4223 if (sparc_is_imm13 (throw_offset))
4224 sparc_set32 (code, throw_offset, sparc_o1);
4227 patch_info->type = MONO_PATCH_INFO_NONE;
4230 /* Emit the template for setting o1 */
4232 if (sparc_is_imm13 (((((guint8*)code - cfg->native_code) - throw_ip) >> 2) - 8))
4233 /* Can use a short form */
4236 sparc_set_template (code, sparc_o1);
4240 exc_classes [nthrows] = exc_class;
4241 exc_throw_start [nthrows] = (guint8*)code;
4245 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
4249 /* first arg = type token */
4250 /* Pass the type index to reduce the size of the sparc_set */
4251 if (!sparc_is_imm13 (type_idx))
4252 sparc_set32 (code, type_idx, sparc_o0);
4254 /* second arg = offset between the throw ip and the current ip */
4255 /* On sparc, the saved ip points to the call instruction */
4256 disp = (((guint8*)code - cfg->native_code) - throw_ip) >> 2;
4257 sparc_set32 (buf, disp, sparc_o1);
4262 exc_throw_end [nthrows] = (guint8*)code;
4266 patch_info->data.name = "mono_arch_throw_corlib_exception";
4267 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4268 patch_info->ip.i = (guint8*)code - cfg->native_code;
4272 if (sparc_is_imm13 (type_idx)) {
4273 /* Put it into the delay slot */
4276 sparc_set32 (code, type_idx, sparc_o0);
4277 g_assert (code - buf == 1);
4288 cfg->code_len = (guint8*)code - cfg->native_code;
4290 g_assert (cfg->code_len < cfg->code_size);
4294 gboolean lmf_addr_key_inited = FALSE;
4296 #ifdef MONO_SPARC_THR_TLS
4297 thread_key_t lmf_addr_key;
4299 pthread_key_t lmf_addr_key;
4303 mono_arch_get_lmf_addr (void)
4305 /* This is perf critical so we bypass the IO layer */
4306 /* The thr_... functions seem to be somewhat faster */
4307 #ifdef MONO_SPARC_THR_TLS
4309 thr_getspecific (lmf_addr_key, &res);
4312 return pthread_getspecific (lmf_addr_key);
4316 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4319 * There seems to be no way to determine stack boundaries under solaris,
4320 * so it's not possible to determine whenever a SIGSEGV is caused by stack
4323 #error "--with-sigaltstack=yes not supported on solaris"
4328 mono_arch_tls_init (void)
4330 MonoJitTlsData *jit_tls;
4332 if (!lmf_addr_key_inited) {
4335 lmf_addr_key_inited = TRUE;
4337 #ifdef MONO_SPARC_THR_TLS
4338 res = thr_keycreate (&lmf_addr_key, NULL);
4340 res = pthread_key_create (&lmf_addr_key, NULL);
4342 g_assert (res == 0);
4346 jit_tls = mono_get_jit_tls ();
4348 #ifdef MONO_SPARC_THR_TLS
4349 thr_setspecific (lmf_addr_key, &jit_tls->lmf);
4351 pthread_setspecific (lmf_addr_key, &jit_tls->lmf);
4356 mono_arch_finish_init (void)
4361 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4366 mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4368 MonoInst *ins = NULL;
4374 * mono_arch_get_argument_info:
4375 * @csig: a method signature
4376 * @param_count: the number of parameters to consider
4377 * @arg_info: an array to store the result infos
4379 * Gathers information on parameters such as size, alignment and
4380 * padding. arg_info should be large enought to hold param_count + 1 entries.
4382 * Returns the size of the activation frame.
4385 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
4391 cinfo = get_call_info (NULL, csig, FALSE);
4393 if (csig->hasthis) {
4394 ainfo = &cinfo->args [0];
4395 arg_info [0].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4398 for (k = 0; k < param_count; k++) {
4399 ainfo = &cinfo->args [k + csig->hasthis];
4401 arg_info [k + 1].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4402 arg_info [k + 1].size = mono_type_size (csig->params [k], &align);
4411 mono_arch_print_tree (MonoInst *tree, int arity)
4417 mono_arch_context_get_int_reg (MonoContext *ctx, int reg)
4419 /* FIXME: implement */
4420 g_assert_not_reached ();
4424 mono_arch_opcode_supported (int opcode)