mono/mini/mini-sparc.c

   1 /*
   2  * mini-sparc.c: Sparc backend for the Mono code generator
   3  *
   4  * Authors:
   5  *   Paolo Molaro (lupus@ximian.com)
   6  *   Dietmar Maurer (dietmar@ximian.com)
   7  *
   8  * Modified for SPARC:
   9  *   Christopher Taylor (ct@gentoo.org)
  10  *   Mark Crichton (crichton@gimp.org)
  11  *   Zoltan Varga (vargaz@freemail.hu)
  12  *
  13  * (C) 2003 Ximian, Inc.
  14  */
  15 #include "mini.h"
  16 #include <string.h>
  17 #include <pthread.h>
  18 #include <unistd.h>
  19
  20 #ifndef __linux__
  21 #include <sys/systeminfo.h>
  22 #include <thread.h>
  23 #endif
  24
  25 #include <unistd.h>
  26 #include <sys/mman.h>
  27
  28 #include <mono/metadata/appdomain.h>
  29 #include <mono/metadata/debug-helpers.h>
  30 #include <mono/metadata/tokentype.h>
  31 #include <mono/utils/mono-math.h>
  32
  33 #include "mini-sparc.h"
  34 #include "inssel.h"
  35 #include "trace.h"
  36 #include "cpu-sparc.h"
  37
  38 /*
  39  * Sparc V9 means two things:
  40  * - the instruction set
  41  * - the ABI
  42  *
  43  * V9 instructions are only usable if the underlying processor is 64 bit. Most Sparc
  44  * processors in use are 64 bit processors. The V9 ABI is only usable if the
  45  * mono executable is a 64 bit executable. So it would make sense to use the 64 bit
  46  * instructions without using the 64 bit ABI.
  47  */
  48
  49 /*
  50  * Register usage:
  51  * - %i0..%i<n> hold the incoming arguments, these are never written by JITted
  52  * code. Unused input registers are used for global register allocation.
  53  * - %o0..%o5 and %l7 is used for local register allocation and passing arguments
  54  * - %l0..%l6 is used for global register allocation
  55  * - %o7 and %g1 is used as scratch registers in opcodes
  56  * - all floating point registers are used for local register allocation except %f0.
  57  *   Only double precision registers are used.
  58  * In 64 bit mode:
  59  * - fp registers %d0..%d30 are used for parameter passing, and %d32..%d62 are
  60  *   used for local allocation.
  61  */
  62
  63 /*
  64  * Alignment:
  65  * - doubles and longs must be stored in dword aligned locations
  66  */
  67
  68 /*
  69  * The following things are not implemented or do not work:
  70  *  - some fp arithmetic corner cases
  71  * The following tests in mono/mini are expected to fail:
  72  *  - test_0_simple_double_casts
  73  *      This test casts (guint64)-1 to double and then back to guint64 again.
  74  *    Under x86, it returns 0, while under sparc it returns -1.
  75  *
  76  * In addition to this, the runtime requires the trunc function, or its
  77  * solaris counterpart, aintl, to do some double->int conversions. If this
  78  * function is not available, it is emulated somewhat, but the results can be
  79  * strange.
  80  */
  81
  82 /*
  83  * SPARCV9 FIXME:
  84  * - optimize sparc_set according to the memory model
  85  * - when non-AOT compiling, compute patch targets immediately so we don't
  86  *   have to emit the 6 byte template.
  87  * - varags
  88  * - struct arguments/returns
  89  */
  90
  91 /*
  92  * SPARCV9 ISSUES:
  93  * - sparc_call_simple can't be used in a lot of places since the displacement
  94  *   might not fit into an imm30.
  95  * - g1 can't be used in a lot of places since it is used as a scratch reg in
  96  *   sparc_set.
  97  * - sparc_f0 can't be used as a scratch register on V9
  98  * - the %d34..%d62 fp registers are encoded as: %dx = %f(x - 32 + 1), ie.
  99  *   %d36 = %f5.
 100  * - ldind.i4/u4 needs to sign extend/clear out upper word -> slows things down
 101  * - ins->dreg can't be used as a scatch register in r4 opcodes since it might
 102  *   be a double precision register which has no single precision part.
 103  * - passing/returning structs is hard to implement, because:
 104  *   - the spec is very hard to understand
 105  *   - it requires knowledge about the fields of structure, needs to handle
 106  *     nested structures etc.
 107  */
 108
 109 /*
 110  * Possible optimizations:
 111  * - delay slot scheduling
 112  * - allocate large constants to registers
 113  * - add more mul/div/rem optimizations
 114  */
 115
 116 #ifndef __linux__
 117 #define MONO_SPARC_THR_TLS 1
 118 #endif
 119
 120 /*
 121  * There was a 64 bit bug in glib-2.2: g_bit_nth_msf (0, -1) would return 32,
 122  * causing infinite loops in dominator computation. So glib-2.4 is required.
 123  */
 124 #ifdef SPARCV9
 125 #if GLIB_MAJOR_VERSION == 2 && GLIB_MINOR_VERSION < 4
 126 #error "glib 2.4 or later is required for 64 bit mode."
 127 #endif
 128 #endif
 129
 130 #define NOT_IMPLEMENTED do { g_assert_not_reached (); } while (0)
 131
 132 #define ALIGN_TO(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
 133
 134 #define SIGNAL_STACK_SIZE (64 * 1024)
 135
 136 #define STACK_BIAS MONO_SPARC_STACK_BIAS
 137
 138 #ifdef SPARCV9
 139
 140 /* %g1 is used by sparc_set */
 141 #define GP_SCRATCH_REG sparc_g4
 142 /* %f0 is used for parameter passing */
 143 #define FP_SCRATCH_REG sparc_f30
 144 #define ARGS_OFFSET (STACK_BIAS + 128)
 145
 146 #else
 147
 148 #define FP_SCRATCH_REG sparc_f0
 149 #define ARGS_OFFSET 68
 150 #define GP_SCRATCH_REG sparc_g1
 151
 152 #endif
 153
 154 /* Whenever the CPU supports v9 instructions */
 155 static gboolean sparcv9 = FALSE;
 156
 157 /* Whenever this is a 64bit executable */
 158 #if SPARCV9
 159 static gboolean v64 = TRUE;
 160 #else
 161 static gboolean v64 = FALSE;
 162 #endif
 163
 164 static gpointer mono_arch_get_lmf_addr (void);
 165
 166 static int
 167 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar);
 168
 169 const char*
 170 mono_arch_regname (int reg) {
 171         static const char * rnames[] = {
 172                 "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
 173                 "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
 174                 "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
 175                 "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
 176                 "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
 177                 "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
 178                 "sparc_fp", "sparc_retadr"
 179         };
 180         if (reg >= 0 && reg < 32)
 181                 return rnames [reg];
 182         return "unknown";
 183 }
 184
 185 const char*
 186 mono_arch_fregname (int reg) {
 187         static const char *rnames [] = {
 188                 "sparc_f0", "sparc_f1", "sparc_f2", "sparc_f3", "sparc_f4",
 189                 "sparc_f5", "sparc_f6", "sparc_f7", "sparc_f8", "sparc_f9",
 190                 "sparc_f10", "sparc_f11", "sparc_f12", "sparc_f13", "sparc_f14",
 191                 "sparc_f15", "sparc_f16", "sparc_f17", "sparc_f18", "sparc_f19",
 192                 "sparc_f20", "sparc_f21", "sparc_f22", "sparc_f23", "sparc_f24",
 193                 "sparc_f25", "sparc_f26", "sparc_f27", "sparc_f28", "sparc_f29",
 194                 "sparc_f30", "sparc_f31"
 195         };
 196
 197         if (reg >= 0 && reg < 32)
 198                 return rnames [reg];
 199         else
 200                 return "unknown";
 201 }
 202
 203 /*
 204  * Initialize the cpu to execute managed code.
 205  */
 206 void
 207 mono_arch_cpu_init (void)
 208 {
 209         guint32 dummy;
 210         /* make sure sparcv9 is initialized for embedded use */
 211         mono_arch_cpu_optimizazions(&dummy);
 212 }
 213
 214 /*
 215  * This function returns the optimizations supported on this cpu.
 216  */
 217 guint32
 218 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
 219 {
 220         char buf [1024];
 221         guint32 opts = 0;
 222
 223         *exclude_mask = 0;
 224
 225 #ifndef __linux__
 226         if (!sysinfo (SI_ISALIST, buf, 1024))
 227                 g_assert_not_reached ();
 228 #else
 229         /* From glibc.  If the getpagesize is 8192, we're on sparc64, which
 230          * (in)directly implies that we're a v9 or better.
 231          * Improvements to this are greatly accepted...
 232          * Also, we don't differentiate between v7 and v8.  I sense SIGILL
 233          * sniffing in my future.
 234          */
 235         if (getpagesize() == 8192)
 236                 strcpy (buf, "sparcv9");
 237         else
 238                 strcpy (buf, "sparcv8");
 239 #endif
 240
 241         /*
 242          * On some processors, the cmov instructions are even slower than the
 243          * normal ones...
 244          */
 245         if (strstr (buf, "sparcv9")) {
 246                 opts |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
 247                 sparcv9 = TRUE;
 248         }
 249         else
 250                 *exclude_mask |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
 251
 252         return opts;
 253 }
 254
 255 static void
 256 mono_sparc_break (void)
 257 {
 258 }
 259
 260 #ifdef __GNUC__
 261 #define flushi(addr)    __asm__ __volatile__ ("iflush %0"::"r"(addr):"memory")
 262 #else /* assume Sun's compiler */
 263 static void flushi(void *addr)
 264 {
 265     asm("flush %i0");
 266 }
 267 #endif
 268
 269 #ifndef __linux__
 270 void sync_instruction_memory(caddr_t addr, int len);
 271 #endif
 272
 273 void
 274 mono_arch_flush_icache (guint8 *code, gint size)
 275 {
 276 #ifndef __linux__
 277         /* Hopefully this is optimized based on the actual CPU */
 278         sync_instruction_memory (code, size);
 279 #else
 280         guint64 *p = (guint64*)code;
 281         guint64 *end = (guint64*)(code + ((size + 8) /8));
 282
 283         /*
 284          * FIXME: Flushing code in dword chunks in _slow_.
 285          */
 286         while (p < end)
 287 #ifdef __GNUC__
 288                 __asm__ __volatile__ ("iflush %0"::"r"(p++));
 289 #else
 290                         flushi (p ++);
 291 #endif
 292 #endif
 293 }
 294
 295 /*
 296  * mono_sparc_flushw:
 297  *
 298  * Flush all register windows to memory. Every register window is saved to
 299  * a 16 word area on the stack pointed to by its %sp register.
 300  */
 301 void
 302 mono_sparc_flushw (void)
 303 {
 304         static guint32 start [64];
 305         static int inited = 0;
 306         guint32 *code;
 307         static void (*flushw) (void);
 308
 309         if (!inited) {
 310                 code = start;
 311
 312                 sparc_save_imm (code, sparc_sp, -160, sparc_sp);
 313                 sparc_flushw (code);
 314                 sparc_ret (code);
 315                 sparc_restore_simple (code);
 316
 317                 g_assert ((code - start) < 64);
 318
 319                 flushw = (gpointer)start;
 320
 321                 inited = 1;
 322         }
 323
 324         flushw ();
 325 }
 326
 327 void
 328 mono_arch_flush_register_windows (void)
 329 {
 330         mono_sparc_flushw ();
 331 }
 332
 333 gboolean
 334 mono_arch_is_inst_imm (gint64 imm)
 335 {
 336         return sparc_is_imm13 (imm);
 337 }
 338
 339 gboolean
 340 mono_sparc_is_v9 (void) {
 341         return sparcv9;
 342 }
 343
 344 gboolean
 345 mono_sparc_is_sparc64 (void) {
 346         return v64;
 347 }
 348
 349 typedef enum {
 350         ArgInIReg,
 351         ArgInIRegPair,
 352         ArgInSplitRegStack,
 353         ArgInFReg,
 354         ArgInFRegPair,
 355         ArgOnStack,
 356         ArgOnStackPair,
 357         ArgInFloatReg,  /* V9 only */
 358         ArgInDoubleReg  /* V9 only */
 359 } ArgStorage;
 360
 361 typedef struct {
 362         gint16 offset;
 363         /* This needs to be offset by %i0 or %o0 depending on caller/callee */
 364         gint8  reg;
 365         ArgStorage storage;
 366         guint32 vt_offset; /* for valuetypes */
 367 } ArgInfo;
 368
 369 typedef struct {
 370         int nargs;
 371         guint32 stack_usage;
 372         guint32 reg_usage;
 373         ArgInfo ret;
 374         ArgInfo sig_cookie;
 375         ArgInfo args [1];
 376 } CallInfo;
 377
 378 #define DEBUG(a)
 379
 380 /* %o0..%o5 */
 381 #define PARAM_REGS 6
 382
 383 static void inline
 384 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean pair)
 385 {
 386         ainfo->offset = *stack_size;
 387
 388         if (!pair) {
 389                 if (*gr >= PARAM_REGS) {
 390                         ainfo->storage = ArgOnStack;
 391                 }
 392                 else {
 393                         ainfo->storage = ArgInIReg;
 394                         ainfo->reg = *gr;
 395                         (*gr) ++;
 396                 }
 397
 398                 /* Allways reserve stack space for parameters passed in registers */
 399                 (*stack_size) += sizeof (gpointer);
 400         }
 401         else {
 402                 if (*gr < PARAM_REGS - 1) {
 403                         /* A pair of registers */
 404                         ainfo->storage = ArgInIRegPair;
 405                         ainfo->reg = *gr;
 406                         (*gr) += 2;
 407                 }
 408                 else if (*gr >= PARAM_REGS) {
 409                         /* A pair of stack locations */
 410                         ainfo->storage = ArgOnStackPair;
 411                 }
 412                 else {
 413                         ainfo->storage = ArgInSplitRegStack;
 414                         ainfo->reg = *gr;
 415                         (*gr) ++;
 416                 }
 417
 418                 (*stack_size) += 2 * sizeof (gpointer);
 419         }
 420 }
 421
 422 #ifdef SPARCV9
 423
 424 #define FLOAT_PARAM_REGS 32
 425
 426 static void inline
 427 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean single)
 428 {
 429         ainfo->offset = *stack_size;
 430
 431         if (single) {
 432                 if (*gr >= FLOAT_PARAM_REGS) {
 433                         ainfo->storage = ArgOnStack;
 434                 }
 435                 else {
 436                         /* A single is passed in an even numbered fp register */
 437                         ainfo->storage = ArgInFloatReg;
 438                         ainfo->reg = *gr + 1;
 439                         (*gr) += 2;
 440                 }
 441         }
 442         else {
 443                 if (*gr < FLOAT_PARAM_REGS) {
 444                         /* A double register */
 445                         ainfo->storage = ArgInDoubleReg;
 446                         ainfo->reg = *gr;
 447                         (*gr) += 2;
 448                 }
 449                 else {
 450                         ainfo->storage = ArgOnStack;
 451                 }
 452         }
 453
 454         (*stack_size) += sizeof (gpointer);
 455 }
 456
 457 #endif
 458
 459 /*
 460  * get_call_info:
 461  *
 462  *  Obtain information about a call according to the calling convention.
 463  * For V8, see the "System V ABI, Sparc Processor Supplement" Sparc V8 version
 464  * document for more information.
 465  * For V9, see the "Low Level System Information (64-bit psABI)" chapter in
 466  * the 'Sparc Compliance Definition 2.4' document.
 467  */
 468 static CallInfo*
 469 get_call_info (MonoMethodSignature *sig, gboolean is_pinvoke)
 470 {
 471         guint32 i, gr, fr;
 472         int n = sig->hasthis + sig->param_count;
 473         guint32 stack_size = 0;
 474         CallInfo *cinfo;
 475
 476         cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
 477
 478         gr = 0;
 479         fr = 0;
 480
 481 #ifdef SPARCV9
 482         if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
 483                 /* The address of the return value is passed in %o0 */
 484                 add_general (&gr, &stack_size, &cinfo->ret, FALSE);
 485                 cinfo->ret.reg += sparc_i0;
 486         }
 487 #endif
 488
 489         /* this */
 490         if (sig->hasthis)
 491                 add_general (&gr, &stack_size, cinfo->args + 0, FALSE);
 492
 493         if ((sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
 494                 gr = PARAM_REGS;
 495
 496                 /* Emit the signature cookie just before the implicit arguments */
 497                 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 498         }
 499
 500         for (i = 0; i < sig->param_count; ++i) {
 501                 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
 502
 503                 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
 504                         gr = PARAM_REGS;
 505
 506                         /* Emit the signature cookie just before the implicit arguments */
 507                         add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 508                 }
 509
 510                 DEBUG(printf("param %d: ", i));
 511                 if (sig->params [i]->byref) {
 512                         DEBUG(printf("byref\n"));
 513
 514                         add_general (&gr, &stack_size, ainfo, FALSE);
 515                         continue;
 516                 }
 517                 switch (mono_type_get_underlying_type (sig->params [i])->type) {
 518                 case MONO_TYPE_BOOLEAN:
 519                 case MONO_TYPE_I1:
 520                 case MONO_TYPE_U1:
 521                         add_general (&gr, &stack_size, ainfo, FALSE);
 522                         /* the value is in the ls byte */
 523                         ainfo->offset += sizeof (gpointer) - 1;
 524                         break;
 525                 case MONO_TYPE_I2:
 526                 case MONO_TYPE_U2:
 527                 case MONO_TYPE_CHAR:
 528                         add_general (&gr, &stack_size, ainfo, FALSE);
 529                         /* the value is in the ls word */
 530                         ainfo->offset += sizeof (gpointer) - 2;
 531                         break;
 532                 case MONO_TYPE_I4:
 533                 case MONO_TYPE_U4:
 534                         add_general (&gr, &stack_size, ainfo, FALSE);
 535                         /* the value is in the ls dword */
 536                         ainfo->offset += sizeof (gpointer) - 4;
 537                         break;
 538                 case MONO_TYPE_I:
 539                 case MONO_TYPE_U:
 540                 case MONO_TYPE_PTR:
 541                 case MONO_TYPE_FNPTR:
 542                 case MONO_TYPE_CLASS:
 543                 case MONO_TYPE_OBJECT:
 544                 case MONO_TYPE_STRING:
 545                 case MONO_TYPE_SZARRAY:
 546                 case MONO_TYPE_ARRAY:
 547                         add_general (&gr, &stack_size, ainfo, FALSE);
 548                         break;
 549                 case MONO_TYPE_VALUETYPE:
 550 #ifdef SPARCV9
 551                         if (sig->pinvoke)
 552                                 NOT_IMPLEMENTED;
 553 #endif
 554                         add_general (&gr, &stack_size, ainfo, FALSE);
 555                         break;
 556                 case MONO_TYPE_TYPEDBYREF:
 557                         add_general (&gr, &stack_size, ainfo, FALSE);
 558                         break;
 559                 case MONO_TYPE_U8:
 560                 case MONO_TYPE_I8:
 561 #ifdef SPARCV9
 562                         add_general (&gr, &stack_size, ainfo, FALSE);
 563 #else
 564                         add_general (&gr, &stack_size, ainfo, TRUE);
 565 #endif
 566                         break;
 567                 case MONO_TYPE_R4:
 568 #ifdef SPARCV9
 569                         add_float (&fr, &stack_size, ainfo, TRUE);
 570                         gr ++;
 571 #else
 572                         /* single precision values are passed in integer registers */
 573                         add_general (&gr, &stack_size, ainfo, FALSE);
 574 #endif
 575                         break;
 576                 case MONO_TYPE_R8:
 577 #ifdef SPARCV9
 578                         add_float (&fr, &stack_size, ainfo, FALSE);
 579                         gr ++;
 580 #else
 581                         /* double precision values are passed in a pair of registers */
 582                         add_general (&gr, &stack_size, ainfo, TRUE);
 583 #endif
 584                         break;
 585                 default:
 586                         g_assert_not_reached ();
 587                 }
 588         }
 589
 590         if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
 591                 gr = PARAM_REGS;
 592
 593                 /* Emit the signature cookie just before the implicit arguments */
 594                 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 595         }
 596
 597         /* return value */
 598         {
 599                 switch (mono_type_get_underlying_type (sig->ret)->type) {
 600                 case MONO_TYPE_BOOLEAN:
 601                 case MONO_TYPE_I1:
 602                 case MONO_TYPE_U1:
 603                 case MONO_TYPE_I2:
 604                 case MONO_TYPE_U2:
 605                 case MONO_TYPE_CHAR:
 606                 case MONO_TYPE_I4:
 607                 case MONO_TYPE_U4:
 608                 case MONO_TYPE_I:
 609                 case MONO_TYPE_U:
 610                 case MONO_TYPE_PTR:
 611                 case MONO_TYPE_FNPTR:
 612                 case MONO_TYPE_CLASS:
 613                 case MONO_TYPE_OBJECT:
 614                 case MONO_TYPE_SZARRAY:
 615                 case MONO_TYPE_ARRAY:
 616                 case MONO_TYPE_STRING:
 617                         cinfo->ret.storage = ArgInIReg;
 618                         cinfo->ret.reg = sparc_i0;
 619                         if (gr < 1)
 620                                 gr = 1;
 621                         break;
 622                 case MONO_TYPE_U8:
 623                 case MONO_TYPE_I8:
 624 #ifdef SPARCV9
 625                         cinfo->ret.storage = ArgInIReg;
 626                         cinfo->ret.reg = sparc_i0;
 627                         if (gr < 1)
 628                                 gr = 1;
 629 #else
 630                         cinfo->ret.storage = ArgInIRegPair;
 631                         cinfo->ret.reg = sparc_i0;
 632                         if (gr < 2)
 633                                 gr = 2;
 634 #endif
 635                         break;
 636                 case MONO_TYPE_R4:
 637                 case MONO_TYPE_R8:
 638                         cinfo->ret.storage = ArgInFReg;
 639                         cinfo->ret.reg = sparc_f0;
 640                         break;
 641                 case MONO_TYPE_VALUETYPE:
 642                         if (v64) {
 643                                 if (sig->pinvoke)
 644                                         NOT_IMPLEMENTED;
 645                                 else
 646                                         /* Already done */
 647                                         ;
 648                         }
 649                         else
 650                                 cinfo->ret.storage = ArgOnStack;
 651                         break;
 652                 case MONO_TYPE_TYPEDBYREF:
 653                         if (v64) {
 654                                 if (sig->pinvoke)
 655                                         /* Same as a valuetype with size 24 */
 656                                         NOT_IMPLEMENTED;
 657                                 else
 658                                         /* Already done */
 659                                         ;
 660                         }
 661                         else
 662                                 cinfo->ret.storage = ArgOnStack;
 663                         break;
 664                 case MONO_TYPE_VOID:
 665                         break;
 666                 default:
 667                         g_error ("Can't handle as return value 0x%x", sig->ret->type);
 668                 }
 669         }
 670
 671         cinfo->stack_usage = stack_size;
 672         cinfo->reg_usage = gr;
 673         return cinfo;
 674 }
 675
 676 static gboolean
 677 is_regsize_var (MonoType *t) {
 678         if (t->byref)
 679                 return TRUE;
 680         switch (mono_type_get_underlying_type (t)->type) {
 681         case MONO_TYPE_BOOLEAN:
 682         case MONO_TYPE_CHAR:
 683         case MONO_TYPE_I1:
 684         case MONO_TYPE_U1:
 685         case MONO_TYPE_I2:
 686         case MONO_TYPE_U2:
 687         case MONO_TYPE_I4:
 688         case MONO_TYPE_U4:
 689         case MONO_TYPE_I:
 690         case MONO_TYPE_U:
 691                 return TRUE;
 692         case MONO_TYPE_OBJECT:
 693         case MONO_TYPE_STRING:
 694         case MONO_TYPE_CLASS:
 695         case MONO_TYPE_SZARRAY:
 696         case MONO_TYPE_ARRAY:
 697                 return TRUE;
 698         case MONO_TYPE_VALUETYPE:
 699                 return FALSE;
 700 #ifdef SPARCV9
 701         case MONO_TYPE_I8:
 702         case MONO_TYPE_U8:
 703                 return TRUE;
 704 #endif
 705         }
 706         return FALSE;
 707 }
 708
 709 GList *
 710 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
 711 {
 712         GList *vars = NULL;
 713         int i;
 714
 715         /*
 716          * FIXME: If an argument is allocated to a register, then load it from the
 717          * stack in the prolog.
 718          */
 719
 720         for (i = 0; i < cfg->num_varinfo; i++) {
 721                 MonoInst *ins = cfg->varinfo [i];
 722                 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
 723
 724                 /* unused vars */
 725                 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
 726                         continue;
 727
 728                 /* FIXME: Make arguments on stack allocateable to registers */
 729                 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode == OP_REGVAR) || (ins->opcode == OP_ARG))
 730                         continue;
 731
 732                 if (is_regsize_var (ins->inst_vtype)) {
 733                         g_assert (MONO_VARINFO (cfg, i)->reg == -1);
 734                         g_assert (i == vmv->idx);
 735
 736                         vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
 737                 }
 738         }
 739
 740         return vars;
 741 }
 742
 743 GList *
 744 mono_arch_get_global_int_regs (MonoCompile *cfg)
 745 {
 746         GList *regs = NULL;
 747         int i;
 748         MonoMethodSignature *sig;
 749         CallInfo *cinfo;
 750
 751         sig = mono_method_signature (cfg->method);
 752
 753         cinfo = get_call_info (sig, FALSE);
 754
 755         /* Use unused input registers */
 756         for (i = cinfo->reg_usage; i < 6; ++i)
 757                 regs = g_list_prepend (regs, GUINT_TO_POINTER (sparc_i0 + i));
 758
 759         /* Use %l0..%l6 as global registers */
 760         for (i = sparc_l0; i < sparc_l7; ++i)
 761                 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
 762
 763         g_free (cinfo);
 764
 765         return regs;
 766 }
 767
 768 /*
 769  * mono_arch_regalloc_cost:
 770  *
 771  *  Return the cost, in number of memory references, of the action of
 772  * allocating the variable VMV into a register during global register
 773  * allocation.
 774  */
 775 guint32
 776 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
 777 {
 778         return 0;
 779 }
 780
 781 /*
 782  * Set var information according to the calling convention. sparc version.
 783  * The locals var stuff should most likely be split in another method.
 784  */
 785 void
 786 mono_arch_allocate_vars (MonoCompile *m)
 787 {
 788         MonoMethodSignature *sig;
 789         MonoMethodHeader *header;
 790         MonoInst *inst;
 791         int i, offset, size, align, curinst;
 792         CallInfo *cinfo;
 793
 794         header = mono_method_get_header (m->method);
 795
 796         sig = mono_method_signature (m->method);
 797
 798         cinfo = get_call_info (sig, FALSE);
 799
 800         if (sig->ret->type != MONO_TYPE_VOID) {
 801                 switch (cinfo->ret.storage) {
 802                 case ArgInIReg:
 803                 case ArgInFReg:
 804                 case ArgInIRegPair:
 805                         m->ret->opcode = OP_REGVAR;
 806                         m->ret->inst_c0 = cinfo->ret.reg;
 807                         break;
 808                 case ArgOnStack:
 809 #ifdef SPARCV9
 810                         g_assert_not_reached ();
 811 #else
 812                         /* valuetypes */
 813                         m->ret->opcode = OP_REGOFFSET;
 814                         m->ret->inst_basereg = sparc_fp;
 815                         m->ret->inst_offset = 64;
 816 #endif
 817                         break;
 818                 default:
 819                         NOT_IMPLEMENTED;
 820                 }
 821                 m->ret->dreg = m->ret->inst_c0;
 822         }
 823
 824         /*
 825          * We use the ABI calling conventions for managed code as well.
 826          * Exception: valuetypes are never returned in registers on V9.
 827          * FIXME: Use something more optimized.
 828          */
 829
 830         /* Locals are allocated backwards from %fp */
 831         m->frame_reg = sparc_fp;
 832         offset = 0;
 833
 834         /*
 835          * Reserve a stack slot for holding information used during exception
 836          * handling.
 837          */
 838         if (header->num_clauses)
 839                 offset += sizeof (gpointer) * 2;
 840
 841         if (m->method->save_lmf) {
 842                 offset += sizeof (MonoLMF);
 843                 m->arch.lmf_offset = offset;
 844         }
 845
 846         curinst = m->locals_start;
 847         for (i = curinst; i < m->num_varinfo; ++i) {
 848                 inst = m->varinfo [i];
 849
 850                 if (inst->opcode == OP_REGVAR) {
 851                         //g_print ("allocating local %d to %s\n", i, mono_arch_regname (inst->dreg));
 852                         continue;
 853                 }
 854
 855                 if (inst->flags & MONO_INST_IS_DEAD)
 856                         continue;
 857
 858                 /* inst->unused indicates native sized value types, this is used by the
 859                 * pinvoke wrappers when they call functions returning structure */
 860                 if (inst->unused && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
 861                         size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
 862                 else
 863                         size = mono_type_stack_size (inst->inst_vtype, &align);
 864
 865                 /*
 866                  * This is needed since structures containing doubles must be doubleword
 867          * aligned.
 868                  * FIXME: Do this only if needed.
 869                  */
 870                 if (MONO_TYPE_ISSTRUCT (inst->inst_vtype))
 871                         align = 8;
 872
 873                 /*
 874                  * variables are accessed as negative offsets from %fp, so increase
 875                  * the offset before assigning it to a variable
 876                  */
 877                 offset += size;
 878
 879                 offset += align - 1;
 880                 offset &= ~(align - 1);
 881                 inst->opcode = OP_REGOFFSET;
 882                 inst->inst_basereg = sparc_fp;
 883                 inst->inst_offset = STACK_BIAS + -offset;
 884
 885                 //g_print ("allocating local %d to [%s - %d]\n", i, mono_arch_regname (inst->inst_basereg), - inst->inst_offset);
 886         }
 887
 888         if (sig->call_convention == MONO_CALL_VARARG) {
 889                 m->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
 890         }
 891
 892         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
 893                 inst = m->varinfo [i];
 894                 if (inst->opcode != OP_REGVAR) {
 895                         ArgInfo *ainfo = &cinfo->args [i];
 896                         gboolean inreg = TRUE;
 897                         MonoType *arg_type;
 898                         ArgStorage storage;
 899
 900                         if (sig->hasthis && (i == 0))
 901                                 arg_type = &mono_defaults.object_class->byval_arg;
 902                         else
 903                                 arg_type = sig->params [i - sig->hasthis];
 904
 905 #ifndef SPARCV9
 906                         if (!arg_type->byref && ((arg_type->type == MONO_TYPE_R4)
 907                                                                          || (arg_type->type == MONO_TYPE_R8)))
 908                                 /*
 909                                  * Since float arguments are passed in integer registers, we need to
 910                                  * save them to the stack in the prolog.
 911                                  */
 912                                 inreg = FALSE;
 913 #endif
 914
 915                         /* FIXME: Allocate volatile arguments to registers */
 916                         if (inst->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT))
 917                                 inreg = FALSE;
 918
 919                         if (MONO_TYPE_ISSTRUCT (arg_type))
 920                                 /* FIXME: this isn't needed */
 921                                 inreg = FALSE;
 922
 923                         inst->opcode = OP_REGOFFSET;
 924
 925                         if (!inreg)
 926                                 storage = ArgOnStack;
 927                         else
 928                                 storage = ainfo->storage;
 929
 930                         switch (storage) {
 931                         case ArgInIReg:
 932                         case ArgInIRegPair:
 933                                 inst->opcode = OP_REGVAR;
 934                                 inst->dreg = sparc_i0 + ainfo->reg;
 935                                 break;
 936                         case ArgInFloatReg:
 937                         case ArgInDoubleReg:
 938                                 /*
 939                                  * Since float regs are volatile, we save the arguments to
 940                                  * the stack in the prolog.
 941                                  * FIXME: Avoid this if the method contains no calls.
 942                                  */
 943                         case ArgOnStack:
 944                         case ArgOnStackPair:
 945                         case ArgInSplitRegStack:
 946                                 /* Split arguments are saved to the stack in the prolog */
 947                                 inst->opcode = OP_REGOFFSET;
 948                                 /* in parent frame */
 949                                 inst->inst_basereg = sparc_fp;
 950                                 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
 951
 952                                 if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
 953                                         /*
 954                                          * It is very hard to load doubles from non-doubleword aligned
 955                                          * memory locations. So if the offset is misaligned, we copy the
 956                                          * argument to a stack location in the prolog.
 957                                          */
 958                                         if ((inst->inst_offset - STACK_BIAS) % 8) {
 959                                                 inst->inst_basereg = sparc_fp;
 960                                                 offset += 8;
 961                                                 align = 8;
 962                                                 offset += align - 1;
 963                                                 offset &= ~(align - 1);
 964                                                 inst->inst_offset = STACK_BIAS + -offset;
 965
 966                                         }
 967                                 }
 968                                 break;
 969                         default:
 970                                 NOT_IMPLEMENTED;
 971                         }
 972
 973                         if (MONO_TYPE_ISSTRUCT (arg_type)) {
 974                                 /* Add a level of indirection */
 975                                 /*
 976                                  * It would be easier to add OP_LDIND_I here, but ldind_i instructions
 977                                  * are destructively modified in a lot of places in inssel.brg.
 978                                  */
 979                                 MonoInst *indir;
 980                                 MONO_INST_NEW (m, indir, 0);
 981                                 *indir = *inst;
 982                                 inst->opcode = OP_SPARC_INARG_VT;
 983                                 inst->inst_left = indir;
 984                         }
 985                 }
 986         }
 987
 988         /*
 989          * spillvars are stored between the normal locals and the storage reserved
 990          * by the ABI.
 991          */
 992
 993         m->stack_offset = offset;
 994
 995         /* Add a properly aligned dword for use by int<->float conversion opcodes */
 996         m->spill_count ++;
 997         mono_spillvar_offset_float (m, 0);
 998
 999         g_free (cinfo);
1000 }
1001
1002 static MonoInst *
1003 make_group (MonoCompile *cfg, MonoInst *left, int basereg, int offset)
1004 {
1005         MonoInst *group;
1006
1007         MONO_INST_NEW (cfg, group, OP_GROUP);
1008         group->inst_left = left;
1009         group->inst_basereg = basereg;
1010         group->inst_imm = offset;
1011
1012         return group;
1013 }
1014
1015 /*
1016  * take the arguments and generate the arch-specific
1017  * instructions to properly call the function in call.
1018  * This includes pushing, moving arguments to the right register
1019  * etc.
1020  */
1021 MonoCallInst*
1022 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
1023         MonoInst *arg, *in;
1024         MonoMethodSignature *sig;
1025         int i, n;
1026         CallInfo *cinfo;
1027         ArgInfo *ainfo;
1028         guint32 extra_space = 0;
1029
1030         sig = call->signature;
1031         n = sig->param_count + sig->hasthis;
1032
1033         cinfo = get_call_info (sig, sig->pinvoke);
1034
1035         for (i = 0; i < n; ++i) {
1036                 ainfo = cinfo->args + i;
1037
1038                 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
1039                         /* Emit the signature cookie just before the first implicit argument */
1040                         MonoInst *sig_arg;
1041                         MonoMethodSignature *tmp_sig;
1042
1043                         /*
1044                          * mono_ArgIterator_Setup assumes the signature cookie is
1045                          * passed first and all the arguments which were before it are
1046                          * passed on the stack after the signature. So compensate by
1047                          * passing a different signature.
1048                          */
1049                         tmp_sig = mono_metadata_signature_dup (call->signature);
1050                         tmp_sig->param_count -= call->signature->sentinelpos;
1051                         tmp_sig->sentinelpos = 0;
1052                         memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1053
1054                         /* FIXME: Add support for signature tokens to AOT */
1055                         cfg->disable_aot = TRUE;
1056                         /* We allways pass the signature on the stack for simplicity */
1057                         MONO_INST_NEW (cfg, arg, OP_SPARC_OUTARG_MEM);
1058                         arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + cinfo->sig_cookie.offset);
1059                         MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
1060                         sig_arg->inst_p0 = tmp_sig;
1061                         arg->inst_left = sig_arg;
1062                         arg->type = STACK_PTR;
1063                         /* prepend, so they get reversed */
1064                         arg->next = call->out_args;
1065                         call->out_args = arg;
1066                 }
1067
1068                 if (is_virtual && i == 0) {
1069                         /* the argument will be attached to the call instruction */
1070                         in = call->args [i];
1071                 } else {
1072                         MONO_INST_NEW (cfg, arg, OP_OUTARG);
1073                         in = call->args [i];
1074                         arg->cil_code = in->cil_code;
1075                         arg->inst_left = in;
1076                         arg->type = in->type;
1077                         /* prepend, we'll need to reverse them later */
1078                         arg->next = call->out_args;
1079                         call->out_args = arg;
1080
1081                         if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(sig->params [i - sig->hasthis]))) {
1082                                 MonoInst *inst;
1083                                 gint align;
1084                                 guint32 offset, pad;
1085                                 guint32 size;
1086
1087 #ifdef SPARCV9
1088                                 if (sig->pinvoke)
1089                                         NOT_IMPLEMENTED;
1090 #endif
1091
1092                                 if (sig->params [i - sig->hasthis]->type == MONO_TYPE_TYPEDBYREF) {
1093                                         size = sizeof (MonoTypedRef);
1094                                         align = sizeof (gpointer);
1095                                 }
1096                                 else
1097                                 if (sig->pinvoke)
1098                                         size = mono_type_native_stack_size (&in->klass->byval_arg, &align);
1099                                 else
1100                                         size = mono_type_stack_size (&in->klass->byval_arg, &align);
1101
1102                                 /*
1103                                  * We use OP_OUTARG_VT to copy the valuetype to a stack location, then
1104                                  * use the normal OUTARG opcodes to pass the address of the location to
1105                                  * the callee.
1106                                  */
1107                                 MONO_INST_NEW (cfg, inst, OP_OUTARG_VT);
1108                                 inst->inst_left = in;
1109
1110                                 /* The first 6 argument locations are reserved */
1111                                 if (cinfo->stack_usage < 6 * sizeof (gpointer))
1112                                         cinfo->stack_usage = 6 * sizeof (gpointer);
1113
1114                                 offset = ALIGN_TO ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage, align);
1115                                 pad = offset - ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage);
1116
1117                                 inst->inst_c1 = STACK_BIAS + offset;
1118                                 inst->unused = size;
1119                                 arg->inst_left = inst;
1120
1121                                 cinfo->stack_usage += size;
1122                                 cinfo->stack_usage += pad;
1123                         }
1124
1125                         arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + ainfo->offset);
1126
1127                         switch (ainfo->storage) {
1128                         case ArgInIReg:
1129                         case ArgInFReg:
1130                         case ArgInIRegPair:
1131                                 if (ainfo->storage == ArgInIRegPair)
1132                                         arg->opcode = OP_SPARC_OUTARG_REGPAIR;
1133                                 arg->unused = sparc_o0 + ainfo->reg;
1134                                 call->used_iregs |= 1 << ainfo->reg;
1135
1136                                 if ((i >= sig->hasthis) && !sig->params [i - sig->hasthis]->byref && ((sig->params [i - sig->hasthis]->type == MONO_TYPE_R8) || (sig->params [i - sig->hasthis]->type == MONO_TYPE_R4))) {
1137                                         /* An fp value is passed in an ireg */
1138
1139                                         if (arg->opcode == OP_SPARC_OUTARG_REGPAIR)
1140                                                 arg->opcode = OP_SPARC_OUTARG_REGPAIR_FLOAT;
1141                                         else
1142                                                 arg->opcode = OP_SPARC_OUTARG_FLOAT;
1143
1144                                         /*
1145                                          * The OUTARG (freg) implementation needs an extra dword to store
1146                                          * the temporary value.
1147                                          */
1148                                         extra_space += 8;
1149                                 }
1150                                 break;
1151                         case ArgOnStack:
1152                                 arg->opcode = OP_SPARC_OUTARG_MEM;
1153                                 break;
1154                         case ArgOnStackPair:
1155                                 arg->opcode = OP_SPARC_OUTARG_MEMPAIR;
1156                                 break;
1157                         case ArgInSplitRegStack:
1158                                 arg->opcode = OP_SPARC_OUTARG_SPLIT_REG_STACK;
1159                                 arg->unused = sparc_o0 + ainfo->reg;
1160                                 call->used_iregs |= 1 << ainfo->reg;
1161                                 break;
1162                         case ArgInFloatReg:
1163                                 arg->opcode = OP_SPARC_OUTARG_FLOAT_REG;
1164                                 arg->unused = sparc_f0 + ainfo->reg;
1165                                 break;
1166                         case ArgInDoubleReg:
1167                                 arg->opcode = OP_SPARC_OUTARG_DOUBLE_REG;
1168                                 arg->unused = sparc_f0 + ainfo->reg;
1169                                 break;
1170                         default:
1171                                 NOT_IMPLEMENTED;
1172                         }
1173                 }
1174         }
1175
1176         /*
1177          * Reverse the call->out_args list.
1178          */
1179         {
1180                 MonoInst *prev = NULL, *list = call->out_args, *next;
1181                 while (list) {
1182                         next = list->next;
1183                         list->next = prev;
1184                         prev = list;
1185                         list = next;
1186                 }
1187                 call->out_args = prev;
1188         }
1189         call->stack_usage = cinfo->stack_usage + extra_space;
1190         call->out_ireg_args = NULL;
1191         call->out_freg_args = NULL;
1192         cfg->param_area = MAX (cfg->param_area, call->stack_usage);
1193         cfg->flags |= MONO_CFG_HAS_CALLS;
1194
1195         g_free (cinfo);
1196         return call;
1197 }
1198
1199 /* Map opcode to the sparc condition codes */
1200 static inline SparcCond
1201 opcode_to_sparc_cond (int opcode)
1202 {
1203         switch (opcode) {
1204         case OP_FBGE:
1205                 return sparc_fbge;
1206         case OP_FBLE:
1207                 return sparc_fble;
1208         case OP_FBEQ:
1209         case OP_FCEQ:
1210                 return sparc_fbe;
1211         case OP_FBLT:
1212         case OP_FCLT:
1213         case OP_FCLT_UN:
1214                 return sparc_fbl;
1215         case OP_FBGT:
1216         case OP_FCGT:
1217         case OP_FCGT_UN:
1218                 return sparc_fbg;
1219         case CEE_BEQ:
1220         case OP_IBEQ:
1221         case OP_CEQ:
1222         case OP_ICEQ:
1223         case OP_COND_EXC_EQ:
1224                 return sparc_be;
1225         case CEE_BNE_UN:
1226         case OP_COND_EXC_NE_UN:
1227         case OP_IBNE_UN:
1228                 return sparc_bne;
1229         case CEE_BLT:
1230         case OP_IBLT:
1231         case OP_CLT:
1232         case OP_ICLT:
1233         case OP_COND_EXC_LT:
1234                 return sparc_bl;
1235         case CEE_BLT_UN:
1236         case OP_IBLT_UN:
1237         case OP_CLT_UN:
1238         case OP_ICLT_UN:
1239         case OP_COND_EXC_LT_UN:
1240                 return sparc_blu;
1241         case CEE_BGT:
1242         case OP_IBGT:
1243         case OP_CGT:
1244         case OP_ICGT:
1245         case OP_COND_EXC_GT:
1246                 return sparc_bg;
1247         case CEE_BGT_UN:
1248         case OP_IBGT_UN:
1249         case OP_CGT_UN:
1250         case OP_ICGT_UN:
1251         case OP_COND_EXC_GT_UN:
1252                 return sparc_bgu;
1253         case CEE_BGE:
1254         case OP_IBGE:
1255         case OP_COND_EXC_GE:
1256                 return sparc_bge;
1257         case CEE_BGE_UN:
1258         case OP_IBGE_UN:
1259         case OP_COND_EXC_GE_UN:
1260                 return sparc_beu;
1261         case CEE_BLE:
1262         case OP_IBLE:
1263         case OP_COND_EXC_LE:
1264                 return sparc_ble;
1265         case CEE_BLE_UN:
1266         case OP_IBLE_UN:
1267         case OP_COND_EXC_LE_UN:
1268                 return sparc_bleu;
1269         case OP_COND_EXC_OV:
1270         case OP_COND_EXC_IOV:
1271                 return sparc_bvs;
1272         case OP_COND_EXC_C:
1273         case OP_COND_EXC_IC:
1274                 return sparc_bcs;
1275         case OP_COND_EXC_NO:
1276         case OP_COND_EXC_NC:
1277                 NOT_IMPLEMENTED;
1278         default:
1279                 g_assert_not_reached ();
1280                 return sparc_be;
1281         }
1282 }
1283
1284 #define COMPUTE_DISP(ins) \
1285 if (ins->flags & MONO_INST_BRLABEL) { \
1286         if (ins->inst_i0->inst_c0) \
1287            disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2; \
1288         else { \
1289             disp = 0; \
1290                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
1291         } \
1292 } else { \
1293         if (ins->inst_true_bb->native_offset) \
1294            disp = (ins->inst_true_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2; \
1295         else { \
1296             disp = 0; \
1297                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1298         } \
1299 }
1300
1301 #ifdef SPARCV9
1302 #define DEFAULT_ICC sparc_xcc_short
1303 #else
1304 #define DEFAULT_ICC sparc_icc_short
1305 #endif
1306
1307 #ifdef SPARCV9
1308 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) \
1309     do { \
1310         gint32 disp; \
1311         guint32 predict; \
1312         COMPUTE_DISP(ins); \
1313         predict = (disp != 0) ? 1 : 0; \
1314         g_assert (sparc_is_imm19 (disp)); \
1315         sparc_branchp (code, (annul), cond, icc, (predict), disp); \
1316         if (filldelay) sparc_nop (code); \
1317     } while (0)
1318 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_ICC ((ins), (cond), (annul), (filldelay), (sparc_xcc_short))
1319 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) \
1320     do { \
1321         gint32 disp; \
1322         guint32 predict; \
1323         COMPUTE_DISP(ins); \
1324         predict = (disp != 0) ? 1 : 0; \
1325         g_assert (sparc_is_imm19 (disp)); \
1326         sparc_fbranch (code, (annul), cond, disp); \
1327         if (filldelay) sparc_nop (code); \
1328     } while (0)
1329 #else
1330 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) g_assert_not_reached ()
1331 #define EMIT_COND_BRANCH_GENERAL(ins,bop,cond,annul,filldelay) \
1332     do { \
1333         gint32 disp; \
1334         COMPUTE_DISP(ins); \
1335         g_assert (sparc_is_imm22 (disp)); \
1336         sparc_ ## bop (code, (annul), cond, disp); \
1337         if (filldelay) sparc_nop (code); \
1338     } while (0)
1339 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),branch,(cond),annul,filldelay)
1340 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),fbranch,(cond),annul,filldelay)
1341 #endif
1342
1343 #define EMIT_COND_BRANCH_PREDICTED(ins,cond,annul,filldelay) \
1344     do { \
1345             gint32 disp; \
1346         guint32 predict; \
1347         COMPUTE_DISP(ins); \
1348         predict = (disp != 0) ? 1 : 0; \
1349         g_assert (sparc_is_imm19 (disp)); \
1350                 sparc_branchp (code, (annul), (cond), DEFAULT_ICC, (predict), disp); \
1351         if (filldelay) sparc_nop (code); \
1352     } while (0)
1353
1354 #define EMIT_COND_BRANCH_BPR(ins,bop,predict,annul,filldelay) \
1355     do { \
1356             gint32 disp; \
1357         COMPUTE_DISP(ins); \
1358                 g_assert (sparc_is_imm22 (disp)); \
1359                 sparc_ ## bop (code, (annul), (predict), ins->sreg1, disp); \
1360         if (filldelay) sparc_nop (code); \
1361     } while (0)
1362
1363 /* emit an exception if condition is fail */
1364 /*
1365  * We put the exception throwing code out-of-line, at the end of the method
1366  */
1367 #define EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,filldelay,icc) do {     \
1368                 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,   \
1369                                     MONO_PATCH_INFO_EXC, sexc_name);  \
1370         if (sparcv9) { \
1371            sparc_branchp (code, 0, (cond), (icc), 0, 0); \
1372         } \
1373         else { \
1374                         sparc_branch (code, 0, cond, 0);     \
1375         } \
1376         if (filldelay) sparc_nop (code);     \
1377         } while (0);
1378
1379 #define EMIT_COND_SYSTEM_EXCEPTION(ins,cond,sexc_name) EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,TRUE,DEFAULT_ICC)
1380
1381 #define EMIT_COND_SYSTEM_EXCEPTION_BPR(ins,bop,sexc_name) do { \
1382                 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,   \
1383                                     MONO_PATCH_INFO_EXC, sexc_name);  \
1384                 sparc_ ## bop (code, FALSE, FALSE, ins->sreg1, 0); \
1385         sparc_nop (code);    \
1386 } while (0);
1387
1388 #define EMIT_ALU_IMM(ins,op,setcc) do { \
1389                         if (sparc_is_imm13 ((ins)->inst_imm)) \
1390                                 sparc_ ## op ## _imm (code, (setcc), (ins)->sreg1, ins->inst_imm, (ins)->dreg); \
1391                         else { \
1392                                 sparc_set (code, ins->inst_imm, sparc_o7); \
1393                                 sparc_ ## op (code, (setcc), (ins)->sreg1, sparc_o7, (ins)->dreg); \
1394                         } \
1395 } while (0);
1396
1397 #define EMIT_LOAD_MEMBASE(ins,op) do { \
1398                         if (sparc_is_imm13 (ins->inst_offset)) \
1399                                 sparc_ ## op ## _imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg); \
1400                         else { \
1401                                 sparc_set (code, ins->inst_offset, sparc_o7); \
1402                                 sparc_ ## op (code, ins->inst_basereg, sparc_o7, ins->dreg); \
1403                         } \
1404 } while (0);
1405
1406 /* max len = 5 */
1407 #define EMIT_STORE_MEMBASE_IMM(ins,op) do { \
1408                         guint32 sreg; \
1409                         if (ins->inst_imm == 0) \
1410                                 sreg = sparc_g0; \
1411                         else { \
1412                                 sparc_set (code, ins->inst_imm, sparc_o7); \
1413                                 sreg = sparc_o7; \
1414                         } \
1415                         if (!sparc_is_imm13 (ins->inst_offset)) { \
1416                                 sparc_set (code, ins->inst_offset, GP_SCRATCH_REG); \
1417                                 sparc_ ## op (code, sreg, ins->inst_destbasereg, GP_SCRATCH_REG); \
1418                         } \
1419                         else \
1420                                 sparc_ ## op ## _imm (code, sreg, ins->inst_destbasereg, ins->inst_offset); \
1421                                                                                                                                                                                  } while (0);
1422
1423 #define EMIT_STORE_MEMBASE_REG(ins,op) do { \
1424                         if (!sparc_is_imm13 (ins->inst_offset)) { \
1425                                 sparc_set (code, ins->inst_offset, sparc_o7); \
1426                                 sparc_ ## op (code, ins->sreg1, ins->inst_destbasereg, sparc_o7); \
1427                         } \
1428                                   else \
1429                                 sparc_ ## op ## _imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset); \
1430                                                                                                                                                                                  } while (0);
1431
1432 #define EMIT_CALL() do { \
1433     if (v64) { \
1434         sparc_set_template (code, sparc_o7); \
1435         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7); \
1436     } \
1437     else { \
1438         sparc_call_simple (code, 0); \
1439     } \
1440     sparc_nop (code); \
1441 } while (0);
1442
1443 /*
1444  * A call template is 7 instructions long, so we want to avoid it if possible.
1445  */
1446 static guint32*
1447 emit_call (MonoCompile *cfg, guint32 *code, guint32 patch_type, gconstpointer data)
1448 {
1449         gpointer target;
1450
1451         /* FIXME: This only works if the target method is already compiled */
1452         if (0 && v64 && !cfg->compile_aot) {
1453                 MonoJumpInfo patch_info;
1454
1455                 patch_info.type = patch_type;
1456                 patch_info.data.target = data;
1457
1458                 target = mono_resolve_patch_target (cfg->method, cfg->domain, NULL, &patch_info, FALSE);
1459
1460                 /* FIXME: Add optimizations if the target is close enough */
1461                 sparc_set (code, target, sparc_o7);
1462                 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7);
1463                 sparc_nop (code);
1464         }
1465         else {
1466                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, patch_type, data);
1467                 EMIT_CALL ();
1468         }
1469
1470         return code;
1471 }
1472
1473 static void
1474 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1475 {
1476         MonoInst *ins, *last_ins = NULL;
1477         ins = bb->code;
1478
1479         while (ins) {
1480
1481                 switch (ins->opcode) {
1482                 case OP_MUL_IMM:
1483                         /* remove unnecessary multiplication with 1 */
1484                         if (ins->inst_imm == 1) {
1485                                 if (ins->dreg != ins->sreg1) {
1486                                         ins->opcode = OP_MOVE;
1487                                 } else {
1488                                         last_ins->next = ins->next;
1489                                         ins = ins->next;
1490                                         continue;
1491                                 }
1492                         }
1493                         break;
1494 #ifndef SPARCV9
1495                 case OP_LOAD_MEMBASE:
1496                 case OP_LOADI4_MEMBASE:
1497                         /*
1498                          * OP_STORE_MEMBASE_REG reg, offset(basereg)
1499                          * OP_LOAD_MEMBASE offset(basereg), reg
1500                          */
1501                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
1502                                          || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1503                             ins->inst_basereg == last_ins->inst_destbasereg &&
1504                             ins->inst_offset == last_ins->inst_offset) {
1505                                 if (ins->dreg == last_ins->sreg1) {
1506                                         last_ins->next = ins->next;
1507                                         ins = ins->next;
1508                                         continue;
1509                                 } else {
1510                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1511                                         ins->opcode = OP_MOVE;
1512                                         ins->sreg1 = last_ins->sreg1;
1513                                 }
1514
1515                         /*
1516                          * Note: reg1 must be different from the basereg in the second load
1517                          * OP_LOAD_MEMBASE offset(basereg), reg1
1518                          * OP_LOAD_MEMBASE offset(basereg), reg2
1519                          * -->
1520                          * OP_LOAD_MEMBASE offset(basereg), reg1
1521                          * OP_MOVE reg1, reg2
1522                          */
1523                         } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1524                                            || last_ins->opcode == OP_LOAD_MEMBASE) &&
1525                               ins->inst_basereg != last_ins->dreg &&
1526                               ins->inst_basereg == last_ins->inst_basereg &&
1527                               ins->inst_offset == last_ins->inst_offset) {
1528
1529                                 if (ins->dreg == last_ins->dreg) {
1530                                         last_ins->next = ins->next;
1531                                         ins = ins->next;
1532                                         continue;
1533                                 } else {
1534                                         ins->opcode = OP_MOVE;
1535                                         ins->sreg1 = last_ins->dreg;
1536                                 }
1537
1538                                 //g_assert_not_reached ();
1539
1540 #if 0
1541                         /*
1542                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1543                          * OP_LOAD_MEMBASE offset(basereg), reg
1544                          * -->
1545                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1546                          * OP_ICONST reg, imm
1547                          */
1548                         } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1549                                                 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1550                                    ins->inst_basereg == last_ins->inst_destbasereg &&
1551                                    ins->inst_offset == last_ins->inst_offset) {
1552                                 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1553                                 ins->opcode = OP_ICONST;
1554                                 ins->inst_c0 = last_ins->inst_imm;
1555                                 g_assert_not_reached (); // check this rule
1556 #endif
1557                         }
1558                         break;
1559 #endif
1560                 case OP_LOADU1_MEMBASE:
1561                 case OP_LOADI1_MEMBASE:
1562                         if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1563                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1564                                         ins->inst_offset == last_ins->inst_offset) {
1565                                 if (ins->dreg == last_ins->sreg1) {
1566                                         last_ins->next = ins->next;
1567                                         ins = ins->next;
1568                                         continue;
1569                                 } else {
1570                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1571                                         ins->opcode = OP_MOVE;
1572                                         ins->sreg1 = last_ins->sreg1;
1573                                 }
1574                         }
1575                         break;
1576                 case OP_LOADU2_MEMBASE:
1577                 case OP_LOADI2_MEMBASE:
1578                         if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1579                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1580                                         ins->inst_offset == last_ins->inst_offset) {
1581                                 if (ins->dreg == last_ins->sreg1) {
1582                                         last_ins->next = ins->next;
1583                                         ins = ins->next;
1584                                         continue;
1585                                 } else {
1586                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1587                                         ins->opcode = OP_MOVE;
1588                                         ins->sreg1 = last_ins->sreg1;
1589                                 }
1590                         }
1591                         break;
1592                 case OP_STOREI4_MEMBASE_IMM:
1593                         /* Convert pairs of 0 stores to a dword 0 store */
1594                         /* Used when initializing temporaries */
1595                         /* We know sparc_fp is dword aligned */
1596                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM) &&
1597                                 (ins->inst_destbasereg == last_ins->inst_destbasereg) &&
1598                                 (ins->inst_destbasereg == sparc_fp) &&
1599                                 (ins->inst_offset < 0) &&
1600                                 ((ins->inst_offset % 8) == 0) &&
1601                                 ((ins->inst_offset == last_ins->inst_offset - 4)) &&
1602                                 (ins->inst_imm == 0) &&
1603                                 (last_ins->inst_imm == 0)) {
1604                                 if (sparcv9) {
1605                                         last_ins->opcode = OP_STOREI8_MEMBASE_IMM;
1606                                         last_ins->inst_offset = ins->inst_offset;
1607                                         last_ins->next = ins->next;
1608                                         ins = ins->next;
1609                                         continue;
1610                                 }
1611                         }
1612                         break;
1613                 case CEE_BEQ:
1614                 case CEE_BNE_UN:
1615                 case CEE_BLT:
1616                 case CEE_BGT:
1617                 case CEE_BGE:
1618                 case CEE_BLE:
1619                 case OP_COND_EXC_EQ:
1620                 case OP_COND_EXC_GE:
1621                 case OP_COND_EXC_GT:
1622                 case OP_COND_EXC_LE:
1623                 case OP_COND_EXC_LT:
1624                 case OP_COND_EXC_NE_UN:
1625                         /*
1626                          * Convert compare with zero+branch to BRcc
1627                          */
1628                         /*
1629                          * This only works in 64 bit mode, since it examines all 64
1630                          * bits of the register.
1631                          * Only do this if the method is small since BPr only has a 16bit
1632                          * displacement.
1633                          */
1634                         if (v64 && (mono_method_get_header (cfg->method)->code_size < 10000) && last_ins &&
1635                                 (last_ins->opcode == OP_COMPARE_IMM) &&
1636                                 (last_ins->inst_imm == 0)) {
1637                                 MonoInst *next = ins->next;
1638                                 switch (ins->opcode) {
1639                                 case CEE_BEQ:
1640                                         ins->opcode = OP_SPARC_BRZ;
1641                                         break;
1642                                 case CEE_BNE_UN:
1643                                         ins->opcode = OP_SPARC_BRNZ;
1644                                         break;
1645                                 case CEE_BLT:
1646                                         ins->opcode = OP_SPARC_BRLZ;
1647                                         break;
1648                                 case CEE_BGT:
1649                                         ins->opcode = OP_SPARC_BRGZ;
1650                                         break;
1651                                 case CEE_BGE:
1652                                         ins->opcode = OP_SPARC_BRGEZ;
1653                                         break;
1654                                 case CEE_BLE:
1655                                         ins->opcode = OP_SPARC_BRLEZ;
1656                                         break;
1657                                 case OP_COND_EXC_EQ:
1658                                         ins->opcode = OP_SPARC_COND_EXC_EQZ;
1659                                         break;
1660                                 case OP_COND_EXC_GE:
1661                                         ins->opcode = OP_SPARC_COND_EXC_GEZ;
1662                                         break;
1663                                 case OP_COND_EXC_GT:
1664                                         ins->opcode = OP_SPARC_COND_EXC_GTZ;
1665                                         break;
1666                                 case OP_COND_EXC_LE:
1667                                         ins->opcode = OP_SPARC_COND_EXC_LEZ;
1668                                         break;
1669                                 case OP_COND_EXC_LT:
1670                                         ins->opcode = OP_SPARC_COND_EXC_LTZ;
1671                                         break;
1672                                 case OP_COND_EXC_NE_UN:
1673                                         ins->opcode = OP_SPARC_COND_EXC_NEZ;
1674                                         break;
1675                                 default:
1676                                         g_assert_not_reached ();
1677                                 }
1678                                 ins->sreg1 = last_ins->sreg1;
1679                                 *last_ins = *ins;
1680                                 last_ins->next = next;
1681                                 ins = next;
1682                                 continue;
1683                         }
1684                         break;
1685                 case CEE_CONV_I4:
1686                 case CEE_CONV_U4:
1687                 case OP_MOVE:
1688                         /*
1689                          * OP_MOVE reg, reg
1690                          */
1691                         if (ins->dreg == ins->sreg1) {
1692                                 if (last_ins)
1693                                         last_ins->next = ins->next;
1694                                 ins = ins->next;
1695                                 continue;
1696                         }
1697                         /*
1698                          * OP_MOVE sreg, dreg
1699                          * OP_MOVE dreg, sreg
1700                          */
1701                         if (last_ins && last_ins->opcode == OP_MOVE &&
1702                             ins->sreg1 == last_ins->dreg &&
1703                             ins->dreg == last_ins->sreg1) {
1704                                 last_ins->next = ins->next;
1705                                 ins = ins->next;
1706                                 continue;
1707                         }
1708                         break;
1709                 }
1710                 last_ins = ins;
1711                 ins = ins->next;
1712         }
1713         bb->last_ins = last_ins;
1714 }
1715
1716 static const char*const * ins_spec = sparc_desc;
1717
1718 static inline const char*
1719 get_ins_spec (int opcode)
1720 {
1721         if (ins_spec [opcode])
1722                 return ins_spec [opcode];
1723         else
1724                 return ins_spec [CEE_ADD];
1725 }
1726
1727 static int
1728 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
1729 {
1730         MonoSpillInfo **si, *info;
1731         int i = 0;
1732
1733         si = &cfg->spill_info_float;
1734
1735         while (i <= spillvar) {
1736
1737                 if (!*si) {
1738                         *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1739                         info->next = NULL;
1740                         cfg->stack_offset += sizeof (double);
1741                         cfg->stack_offset = ALIGN_TO (cfg->stack_offset, 8);
1742                         info->offset = - cfg->stack_offset;
1743                 }
1744
1745                 if (i == spillvar)
1746                         return MONO_SPARC_STACK_BIAS + (*si)->offset;
1747
1748                 i++;
1749                 si = &(*si)->next;
1750         }
1751
1752         g_assert_not_reached ();
1753         return 0;
1754 }
1755
1756 /* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
1757
1758 void
1759 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1760 {
1761         mono_local_regalloc (cfg, bb);
1762 }
1763
1764 static void
1765 sparc_patch (guint32 *code, const gpointer target)
1766 {
1767         guint32 *c = code;
1768         guint32 ins = *code;
1769         guint32 op = ins >> 30;
1770         guint32 op2 = (ins >> 22) & 0x7;
1771         guint32 rd = (ins >> 25) & 0x1f;
1772         guint8* target8 = (guint8*)target;
1773         gint64 disp = (target8 - (guint8*)code) >> 2;
1774         int reg;
1775
1776 //      g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
1777
1778         if ((op == 0) && (op2 == 2)) {
1779                 if (!sparc_is_imm22 (disp))
1780                         NOT_IMPLEMENTED;
1781                 /* Bicc */
1782                 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1783         }
1784         else if ((op == 0) && (op2 == 1)) {
1785                 if (!sparc_is_imm19 (disp))
1786                         NOT_IMPLEMENTED;
1787                 /* BPcc */
1788                 *code = ((ins >> 19) << 19) | (disp & 0x7ffff);
1789         }
1790         else if ((op == 0) && (op2 == 3)) {
1791                 if (!sparc_is_imm16 (disp))
1792                         NOT_IMPLEMENTED;
1793                 /* BPr */
1794                 *code &= ~(0x180000 | 0x3fff);
1795                 *code |= ((disp << 21) & (0x180000)) | (disp & 0x3fff);
1796         }
1797         else if ((op == 0) && (op2 == 6)) {
1798                 if (!sparc_is_imm22 (disp))
1799                         NOT_IMPLEMENTED;
1800                 /* FBicc */
1801                 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1802         }
1803         else if ((op == 0) && (op2 == 4)) {
1804                 guint32 ins2 = code [1];
1805
1806                 if (((ins2 >> 30) == 2) && (((ins2 >> 19) & 0x3f) == 2)) {
1807                         /* sethi followed by or */
1808                         guint32 *p = code;
1809                         sparc_set (p, target8, rd);
1810                         while (p <= (code + 1))
1811                                 sparc_nop (p);
1812                 }
1813                 else if (ins2 == 0x01000000) {
1814                         /* sethi followed by nop */
1815                         guint32 *p = code;
1816                         sparc_set (p, target8, rd);
1817                         while (p <= (code + 1))
1818                                 sparc_nop (p);
1819                 }
1820                 else if ((sparc_inst_op (ins2) == 3) && (sparc_inst_imm (ins2))) {
1821                         /* sethi followed by load/store */
1822 #ifndef SPARCV9
1823                         guint32 t = (guint32)target8;
1824                         *code &= ~(0x3fffff);
1825                         *code |= (t >> 10);
1826                         *(code + 1) &= ~(0x3ff);
1827                         *(code + 1) |= (t & 0x3ff);
1828 #endif
1829                 }
1830                 else if (v64 &&
1831                                  (sparc_inst_rd (ins) == sparc_g1) &&
1832                                  (sparc_inst_op (c [1]) == 0) && (sparc_inst_op2 (c [1]) == 4) &&
1833                                  (sparc_inst_op (c [2]) == 2) && (sparc_inst_op3 (c [2]) == 2) &&
1834                                  (sparc_inst_op (c [3]) == 2) && (sparc_inst_op3 (c [3]) == 2))
1835                 {
1836                         /* sparc_set */
1837                         guint32 *p = c;
1838                         reg = sparc_inst_rd (c [1]);
1839                         sparc_set (p, target8, reg);
1840                         while (p < (c + 6))
1841                                 sparc_nop (p);
1842                 }
1843                 else if ((sparc_inst_op (ins2) == 2) && (sparc_inst_op3 (ins2) == 0x38) &&
1844                                  (sparc_inst_imm (ins2))) {
1845                         /* sethi followed by jmpl */
1846 #ifndef SPARCV9
1847                         guint32 t = (guint32)target8;
1848                         *code &= ~(0x3fffff);
1849                         *code |= (t >> 10);
1850                         *(code + 1) &= ~(0x3ff);
1851                         *(code + 1) |= (t & 0x3ff);
1852 #endif
1853                 }
1854                 else
1855                         NOT_IMPLEMENTED;
1856         }
1857         else if (op == 01) {
1858                 gint64 disp = (target8 - (guint8*)code) >> 2;
1859
1860                 if (!sparc_is_imm30 (disp))
1861                         NOT_IMPLEMENTED;
1862                 sparc_call_simple (code, target8 - (guint8*)code);
1863         }
1864         else if ((op == 2) && (sparc_inst_op3 (ins) == 0x2) && sparc_inst_imm (ins)) {
1865                 /* mov imm, reg */
1866                 g_assert (sparc_is_imm13 (target8));
1867                 *code &= ~(0x1fff);
1868                 *code |= (guint32)target8;
1869         }
1870         else if ((sparc_inst_op (ins) == 2) && (sparc_inst_op3 (ins) == 0x7)) {
1871                 /* sparc_set case 5. */
1872                 guint32 *p = c;
1873
1874                 g_assert (v64);
1875                 reg = sparc_inst_rd (c [3]);
1876                 sparc_set (p, target, reg);
1877                 while (p < (c + 6))
1878                         sparc_nop (p);
1879         }
1880         else
1881                 NOT_IMPLEMENTED;
1882
1883 //      g_print ("patched with 0x%08x\n", ins);
1884 }
1885
1886 /*
1887  * mono_sparc_emit_save_lmf:
1888  *
1889  *  Emit the code neccesary to push a new entry onto the lmf stack. Used by
1890  * trampolines as well.
1891  */
1892 guint32*
1893 mono_sparc_emit_save_lmf (guint32 *code, guint32 lmf_offset)
1894 {
1895         /* Save lmf_addr */
1896         sparc_sti_imm (code, sparc_o0, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr));
1897         /* Save previous_lmf */
1898         sparc_ldi (code, sparc_o0, sparc_g0, sparc_o7);
1899         sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf));
1900         /* Set new lmf */
1901         sparc_add_imm (code, FALSE, sparc_fp, lmf_offset, sparc_o7);
1902         sparc_sti (code, sparc_o7, sparc_o0, sparc_g0);
1903
1904         return code;
1905 }
1906
1907 guint32*
1908 mono_sparc_emit_restore_lmf (guint32 *code, guint32 lmf_offset)
1909 {
1910         /* Load previous_lmf */
1911         sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), sparc_l0);
1912         /* Load lmf_addr */
1913         sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), sparc_l1);
1914         /* *(lmf) = previous_lmf */
1915         sparc_sti (code, sparc_l0, sparc_l1, sparc_g0);
1916         return code;
1917 }
1918
1919 static guint32*
1920 emit_save_sp_to_lmf (MonoCompile *cfg, guint32 *code)
1921 {
1922         /*
1923          * Since register windows are saved to the current value of %sp, we need to
1924          * set the sp field in the lmf before the call, not in the prolog.
1925          */
1926         if (cfg->method->save_lmf) {
1927                 gint32 lmf_offset = MONO_SPARC_STACK_BIAS - cfg->arch.lmf_offset;
1928
1929                 /* Save sp */
1930                 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
1931         }
1932
1933         return code;
1934 }
1935
1936 static guint32*
1937 emit_vret_token (MonoInst *ins, guint32 *code)
1938 {
1939         MonoCallInst *call = (MonoCallInst*)ins;
1940         guint32 size;
1941
1942         /*
1943          * The sparc ABI requires that calls to functions which return a structure
1944          * contain an additional unimpl instruction which is checked by the callee.
1945          */
1946         if (call->signature->pinvoke && MONO_TYPE_ISSTRUCT(call->signature->ret)) {
1947                 if (call->signature->ret->type == MONO_TYPE_TYPEDBYREF)
1948                         size = mono_type_stack_size (call->signature->ret, NULL);
1949                 else
1950                         size = mono_class_native_size (call->signature->ret->data.klass, NULL);
1951                 sparc_unimp (code, size & 0xfff);
1952         }
1953
1954         return code;
1955 }
1956
1957 static guint32*
1958 emit_move_return_value (MonoInst *ins, guint32 *code)
1959 {
1960         /* Move return value to the target register */
1961         /* FIXME: do more things in the local reg allocator */
1962         switch (ins->opcode) {
1963         case OP_VOIDCALL:
1964         case OP_VOIDCALL_REG:
1965         case OP_VOIDCALL_MEMBASE:
1966                 break;
1967         case CEE_CALL:
1968         case OP_CALL_REG:
1969         case OP_CALL_MEMBASE:
1970                 g_assert (ins->dreg == sparc_o0);
1971                 break;
1972         case OP_LCALL:
1973         case OP_LCALL_REG:
1974         case OP_LCALL_MEMBASE:
1975                 /*
1976                  * ins->dreg is the least significant reg due to the lreg: LCALL rule
1977                  * in inssel-long32.brg.
1978                  */
1979 #ifdef SPARCV9
1980                 sparc_mov_reg_reg (code, sparc_o0, ins->dreg);
1981 #else
1982                 g_assert (ins->dreg == sparc_o1);
1983 #endif
1984                 break;
1985         case OP_FCALL:
1986         case OP_FCALL_REG:
1987         case OP_FCALL_MEMBASE:
1988 #ifdef SPARCV9
1989                 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4) {
1990                         sparc_fmovs (code, sparc_f0, ins->dreg);
1991                         sparc_fstod (code, ins->dreg, ins->dreg);
1992                 }
1993                 else
1994                         sparc_fmovd (code, sparc_f0, ins->dreg);
1995 #else
1996                 sparc_fmovs (code, sparc_f0, ins->dreg);
1997                 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4)
1998                         sparc_fstod (code, ins->dreg, ins->dreg);
1999                 else
2000                         sparc_fmovs (code, sparc_f1, ins->dreg + 1);
2001 #endif
2002                 break;
2003         case OP_VCALL:
2004         case OP_VCALL_REG:
2005         case OP_VCALL_MEMBASE:
2006                 break;
2007         default:
2008                 NOT_IMPLEMENTED;
2009         }
2010
2011         return code;
2012 }
2013
2014 /*
2015  * emit_load_volatile_arguments:
2016  *
2017  *  Load volatile arguments from the stack to the original input registers.
2018  * Required before a tail call.
2019  */
2020 static guint32*
2021 emit_load_volatile_arguments (MonoCompile *cfg, guint32 *code)
2022 {
2023         MonoMethod *method = cfg->method;
2024         MonoMethodSignature *sig;
2025         MonoInst *inst;
2026         CallInfo *cinfo;
2027         guint32 i, ireg;
2028
2029         /* FIXME: Generate intermediate code instead */
2030
2031         sig = mono_method_signature (method);
2032
2033         cinfo = get_call_info (sig, FALSE);
2034
2035         /* This is the opposite of the code in emit_prolog */
2036
2037         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
2038                 ArgInfo *ainfo = cinfo->args + i;
2039                 gint32 stack_offset;
2040                 MonoType *arg_type;
2041                 inst = cfg->varinfo [i];
2042
2043                 if (sig->hasthis && (i == 0))
2044                         arg_type = &mono_defaults.object_class->byval_arg;
2045                 else
2046                         arg_type = sig->params [i - sig->hasthis];
2047
2048                 stack_offset = ainfo->offset + ARGS_OFFSET;
2049                 ireg = sparc_i0 + ainfo->reg;
2050
2051                 if (ainfo->storage == ArgInSplitRegStack) {
2052                         g_assert (inst->opcode == OP_REGOFFSET);
2053
2054                         if (!sparc_is_imm13 (stack_offset))
2055                                 NOT_IMPLEMENTED;
2056                         sparc_st_imm (code, inst->inst_basereg, stack_offset, sparc_i5);
2057                 }
2058
2059                 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
2060                         if (ainfo->storage == ArgInIRegPair) {
2061                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
2062                                         NOT_IMPLEMENTED;
2063                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2064                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2065                         }
2066                         else
2067                                 if (ainfo->storage == ArgInSplitRegStack) {
2068                                         if (stack_offset != inst->inst_offset) {
2069                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_i5);
2070                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2071                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2072
2073                                         }
2074                                 }
2075                         else
2076                                 if (ainfo->storage == ArgOnStackPair) {
2077                                         if (stack_offset != inst->inst_offset) {
2078                                                 /* stack_offset is not dword aligned, so we need to make a copy */
2079                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_o7);
2080                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset);
2081
2082                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2083                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2084
2085                                         }
2086                                 }
2087                          else
2088                                 g_assert_not_reached ();
2089                 }
2090                 else
2091                         if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
2092                                 /* Argument in register, but need to be saved to stack */
2093                                 if (!sparc_is_imm13 (stack_offset))
2094                                         NOT_IMPLEMENTED;
2095                                 if ((stack_offset - ARGS_OFFSET) & 0x1)
2096                                         /* FIXME: Is this ldsb or ldub ? */
2097                                         sparc_ldsb_imm (code, inst->inst_basereg, stack_offset, ireg);
2098                                 else
2099                                         if ((stack_offset - ARGS_OFFSET) & 0x2)
2100                                                 sparc_ldsh_imm (code, inst->inst_basereg, stack_offset, ireg);
2101                                 else
2102                                         if ((stack_offset - ARGS_OFFSET) & 0x4)
2103                                                 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2104                                         else {
2105                                                 if (v64)
2106                                                         sparc_ldx_imm (code, inst->inst_basereg, stack_offset, ireg);
2107                                                 else
2108                                                         sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2109                                         }
2110                         }
2111                         else if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
2112                                 /* Argument in regpair, but need to be saved to stack */
2113                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
2114                                         NOT_IMPLEMENTED;
2115                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2116                                 sparc_st_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2117                         }
2118                         else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
2119                                 NOT_IMPLEMENTED;
2120                         }
2121                         else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
2122                                 NOT_IMPLEMENTED;
2123                         }
2124
2125                 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
2126                         if (inst->opcode == OP_REGVAR)
2127                                 /* FIXME: Load the argument into memory */
2128                                 NOT_IMPLEMENTED;
2129         }
2130
2131         g_free (cinfo);
2132
2133         return code;
2134 }
2135
2136 /*
2137  * mono_sparc_is_virtual_call:
2138  *
2139  *  Determine whenever the instruction at CODE is a virtual call.
2140  */
2141 gboolean
2142 mono_sparc_is_virtual_call (guint32 *code)
2143 {
2144         guint32 buf[1];
2145         guint32 *p;
2146
2147         p = buf;
2148
2149         if ((sparc_inst_op (*code) == 0x2) && (sparc_inst_op3 (*code) == 0x38)) {
2150                 /*
2151                  * Register indirect call. If it is a virtual call, then the
2152                  * instruction in the delay slot is a special kind of nop.
2153                  */
2154
2155                 /* Construct special nop */
2156                 sparc_or_imm (p, FALSE, sparc_g0, 0xca, sparc_g0);
2157                 p --;
2158
2159                 if (code [1] == p [0])
2160                         return TRUE;
2161         }
2162
2163         return FALSE;
2164 }
2165
2166 /*
2167  * mono_arch_get_vcall_slot_addr:
2168  *
2169  *  Determine the vtable slot used by a virtual call.
2170  */
2171 gpointer*
2172 mono_arch_get_vcall_slot_addr (guint8 *code8, gpointer *regs)
2173 {
2174         guint32 *code = (guint32*)(gpointer)code8;
2175         guint32 ins = code [0];
2176         guint32 prev_ins = code [-1];
2177
2178         mono_sparc_flushw ();
2179
2180         if (!mono_sparc_is_virtual_call (code))
2181                 return NULL;
2182
2183         if ((sparc_inst_op (ins) == 0x2) && (sparc_inst_op3 (ins) == 0x38)) {
2184                 if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_op3 (prev_ins) == 0 || sparc_inst_op3 (prev_ins) == 0xb)) {
2185                         /* ld [r1 + CONST ], r2; call r2 */
2186                         guint32 base = sparc_inst_rs1 (prev_ins);
2187                         guint32 disp = sparc_inst_imm13 (prev_ins);
2188                         gpointer base_val;
2189
2190                         g_assert (sparc_inst_rd (prev_ins) == sparc_inst_rs1 (ins));
2191
2192                         g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2193
2194                         base_val = regs [base - sparc_o0];
2195
2196                         return (gpointer)((guint8*)base_val + disp);
2197                 }
2198                 else
2199                         g_assert_not_reached ();
2200         }
2201         else
2202                 g_assert_not_reached ();
2203
2204         return NULL;
2205 }
2206
2207 /*
2208  * Some conventions used in the following code.
2209  * 2) The only scratch registers we have are o7 and g1.  We try to
2210  * stick to o7 when we can, and use g1 when necessary.
2211  */
2212
2213 void
2214 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2215 {
2216         MonoInst *ins;
2217         MonoCallInst *call;
2218         guint offset;
2219         guint32 *code = (guint32*)(cfg->native_code + cfg->code_len);
2220         MonoInst *last_ins = NULL;
2221         int max_len, cpos;
2222         const char *spec;
2223
2224         if (cfg->opt & MONO_OPT_PEEPHOLE)
2225                 peephole_pass (cfg, bb);
2226
2227         if (cfg->verbose_level > 2)
2228                 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2229
2230         cpos = bb->max_offset;
2231
2232         if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2233                 NOT_IMPLEMENTED;
2234         }
2235
2236         ins = bb->code;
2237         while (ins) {
2238                 guint8* code_start;
2239
2240                 offset = (guint8*)code - cfg->native_code;
2241
2242                 spec = ins_spec [ins->opcode];
2243                 if (!spec)
2244                         spec = ins_spec [CEE_ADD];
2245
2246                 max_len = ((guint8 *)spec)[MONO_INST_LEN];
2247
2248                 if (offset > (cfg->code_size - max_len - 16)) {
2249                         cfg->code_size *= 2;
2250                         cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2251                         code = (guint32*)(cfg->native_code + offset);
2252                 }
2253                 code_start = (guint8*)code;
2254                 //      if (ins->cil_code)
2255                 //              g_print ("cil code\n");
2256                 mono_debug_record_line_number (cfg, ins, offset);
2257
2258                 switch (ins->opcode) {
2259                 case OP_STOREI1_MEMBASE_IMM:
2260                         EMIT_STORE_MEMBASE_IMM (ins, stb);
2261                         break;
2262                 case OP_STOREI2_MEMBASE_IMM:
2263                         EMIT_STORE_MEMBASE_IMM (ins, sth);
2264                         break;
2265                 case OP_STORE_MEMBASE_IMM:
2266                         EMIT_STORE_MEMBASE_IMM (ins, sti);
2267                         break;
2268                 case OP_STOREI4_MEMBASE_IMM:
2269                         EMIT_STORE_MEMBASE_IMM (ins, st);
2270                         break;
2271                 case OP_STOREI8_MEMBASE_IMM:
2272 #ifdef SPARCV9
2273                         EMIT_STORE_MEMBASE_IMM (ins, stx);
2274 #else
2275                         /* Only generated by peephole opts */
2276                         g_assert ((ins->inst_offset % 8) == 0);
2277                         g_assert (ins->inst_imm == 0);
2278                         EMIT_STORE_MEMBASE_IMM (ins, stx);
2279 #endif
2280                         break;
2281                 case OP_STOREI1_MEMBASE_REG:
2282                         EMIT_STORE_MEMBASE_REG (ins, stb);
2283                         break;
2284                 case OP_STOREI2_MEMBASE_REG:
2285                         EMIT_STORE_MEMBASE_REG (ins, sth);
2286                         break;
2287                 case OP_STOREI4_MEMBASE_REG:
2288                         EMIT_STORE_MEMBASE_REG (ins, st);
2289                         break;
2290                 case OP_STOREI8_MEMBASE_REG:
2291 #ifdef SPARCV9
2292                         EMIT_STORE_MEMBASE_REG (ins, stx);
2293 #else
2294                         /* Only used by OP_MEMSET */
2295                         EMIT_STORE_MEMBASE_REG (ins, std);
2296 #endif
2297                         break;
2298                 case OP_STORE_MEMBASE_REG:
2299                         EMIT_STORE_MEMBASE_REG (ins, sti);
2300                         break;
2301                 case CEE_LDIND_I:
2302 #ifdef SPARCV9
2303                         sparc_ldx (code, ins->inst_c0, sparc_g0, ins->dreg);
2304 #else
2305                         sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2306 #endif
2307                         break;
2308                 case CEE_LDIND_I4:
2309 #ifdef SPARCV9
2310                         sparc_ldsw (code, ins->inst_c0, sparc_g0, ins->dreg);
2311 #else
2312                         sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2313 #endif
2314                         break;
2315                 case CEE_LDIND_U4:
2316                         sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
2317                         break;
2318                 case OP_LOADU4_MEM:
2319                         sparc_set (code, ins->inst_c0, ins->dreg);
2320                         sparc_ld (code, ins->dreg, sparc_g0, ins->dreg);
2321                         break;
2322                 case OP_LOADI4_MEMBASE:
2323 #ifdef SPARCV9
2324                         EMIT_LOAD_MEMBASE (ins, ldsw);
2325 #else
2326                         EMIT_LOAD_MEMBASE (ins, ld);
2327 #endif
2328                         break;
2329                 case OP_LOADU4_MEMBASE:
2330                         EMIT_LOAD_MEMBASE (ins, ld);
2331                         break;
2332                 case OP_LOADU1_MEMBASE:
2333                         EMIT_LOAD_MEMBASE (ins, ldub);
2334                         break;
2335                 case OP_LOADI1_MEMBASE:
2336                         EMIT_LOAD_MEMBASE (ins, ldsb);
2337                         break;
2338                 case OP_LOADU2_MEMBASE:
2339                         EMIT_LOAD_MEMBASE (ins, lduh);
2340                         break;
2341                 case OP_LOADI2_MEMBASE:
2342                         EMIT_LOAD_MEMBASE (ins, ldsh);
2343                         break;
2344                 case OP_LOAD_MEMBASE:
2345 #ifdef SPARCV9
2346                                 EMIT_LOAD_MEMBASE (ins, ldx);
2347 #else
2348                                 EMIT_LOAD_MEMBASE (ins, ld);
2349 #endif
2350                         break;
2351 #ifdef SPARCV9
2352                 case OP_LOADI8_MEMBASE:
2353                         EMIT_LOAD_MEMBASE (ins, ldx);
2354                         break;
2355 #endif
2356                 case CEE_CONV_I1:
2357                         sparc_sll_imm (code, ins->sreg1, 24, sparc_o7);
2358                         sparc_sra_imm (code, sparc_o7, 24, ins->dreg);
2359                         break;
2360                 case CEE_CONV_I2:
2361                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2362                         sparc_sra_imm (code, sparc_o7, 16, ins->dreg);
2363                         break;
2364                 case CEE_CONV_U1:
2365                         sparc_and_imm (code, FALSE, ins->sreg1, 0xff, ins->dreg);
2366                         break;
2367                 case CEE_CONV_U2:
2368                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2369                         sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
2370                         break;
2371                 case CEE_CONV_OVF_U4:
2372                         /* Only used on V9 */
2373                         sparc_cmp_imm (code, ins->sreg1, 0);
2374                         mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2375                                                                  MONO_PATCH_INFO_EXC, "OverflowException");
2376                         sparc_branchp (code, 0, sparc_bl, sparc_xcc_short, 0, 0);
2377                         /* Delay slot */
2378                         sparc_set (code, 1, sparc_o7);
2379                         sparc_sllx_imm (code, sparc_o7, 32, sparc_o7);
2380                         sparc_cmp (code, ins->sreg1, sparc_o7);
2381                         mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2382                                                                  MONO_PATCH_INFO_EXC, "OverflowException");
2383                         sparc_branchp (code, 0, sparc_bge, sparc_xcc_short, 0, 0);
2384                         sparc_nop (code);
2385                         sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2386                         break;
2387                 case CEE_CONV_OVF_I4_UN:
2388                         /* Only used on V9 */
2389                         NOT_IMPLEMENTED;
2390                         break;
2391                 case CEE_CONV_U:
2392                 case CEE_CONV_U8:
2393                         /* Only used on V9 */
2394                         sparc_srl_imm (code, ins->sreg1, 0, ins->dreg);
2395                         break;
2396                 case CEE_CONV_I:
2397                 case CEE_CONV_I8:
2398                         /* Only used on V9 */
2399                         sparc_sra_imm (code, ins->sreg1, 0, ins->dreg);
2400                         break;
2401                 case OP_COMPARE:
2402                 case OP_LCOMPARE:
2403                 case OP_ICOMPARE:
2404                         sparc_cmp (code, ins->sreg1, ins->sreg2);
2405                         break;
2406                 case OP_COMPARE_IMM:
2407                 case OP_ICOMPARE_IMM:
2408                         if (sparc_is_imm13 (ins->inst_imm))
2409                                 sparc_cmp_imm (code, ins->sreg1, ins->inst_imm);
2410                         else {
2411                                 sparc_set (code, ins->inst_imm, sparc_o7);
2412                                 sparc_cmp (code, ins->sreg1, sparc_o7);
2413                         }
2414                         break;
2415                 case OP_X86_TEST_NULL:
2416                         sparc_cmp_imm (code, ins->sreg1, 0);
2417                         break;
2418                 case CEE_BREAK:
2419                         /*
2420                          * gdb does not like encountering 'ta 1' in the debugged code. So
2421                          * instead of emitting a trap, we emit a call a C function and place a
2422                          * breakpoint there.
2423                          */
2424                         //sparc_ta (code, 1);
2425                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, mono_sparc_break);
2426                         EMIT_CALL();
2427                         break;
2428                 case OP_ADDCC:
2429                 case OP_IADDCC:
2430                         sparc_add (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2431                         break;
2432                 case CEE_ADD:
2433                 case OP_IADD:
2434                         sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2435                         break;
2436                 case OP_ADDCC_IMM:
2437                 case OP_ADD_IMM:
2438                 case OP_IADD_IMM:
2439                         /* according to inssel-long32.brg, this should set cc */
2440                         EMIT_ALU_IMM (ins, add, TRUE);
2441                         break;
2442                 case OP_ADC:
2443                 case OP_IADC:
2444                         /* according to inssel-long32.brg, this should set cc */
2445                         sparc_addx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2446                         break;
2447                 case OP_ADC_IMM:
2448                 case OP_IADC_IMM:
2449                         EMIT_ALU_IMM (ins, addx, TRUE);
2450                         break;
2451                 case OP_SUBCC:
2452                 case OP_ISUBCC:
2453                         sparc_sub (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2454                         break;
2455                 case CEE_SUB:
2456                 case OP_ISUB:
2457                         sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2458                         break;
2459                 case OP_SUBCC_IMM:
2460                 case OP_SUB_IMM:
2461                 case OP_ISUB_IMM:
2462                         /* according to inssel-long32.brg, this should set cc */
2463                         EMIT_ALU_IMM (ins, sub, TRUE);
2464                         break;
2465                 case OP_SBB:
2466                 case OP_ISBB:
2467                         /* according to inssel-long32.brg, this should set cc */
2468                         sparc_subx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2469                         break;
2470                 case OP_SBB_IMM:
2471                 case OP_ISBB_IMM:
2472                         EMIT_ALU_IMM (ins, subx, TRUE);
2473                         break;
2474                 case CEE_AND:
2475                 case OP_IAND:
2476                         sparc_and (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2477                         break;
2478                 case OP_AND_IMM:
2479                 case OP_IAND_IMM:
2480                         EMIT_ALU_IMM (ins, and, FALSE);
2481                         break;
2482                 case CEE_DIV:
2483                 case OP_IDIV:
2484                         /* Sign extend sreg1 into %y */
2485                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2486                         sparc_wry (code, sparc_o7, sparc_g0);
2487                         sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2488                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2489                         break;
2490                 case CEE_DIV_UN:
2491                 case OP_IDIV_UN:
2492                         sparc_wry (code, sparc_g0, sparc_g0);
2493                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2494                         break;
2495                 case OP_DIV_IMM: {
2496                         int i, imm;
2497
2498                         /* Transform division into a shift */
2499                         for (i = 1; i < 30; ++i) {
2500                                 imm = (1 << i);
2501                                 if (ins->inst_imm == imm)
2502                                         break;
2503                         }
2504                         if (i < 30) {
2505                                 if (i == 1) {
2506                                         /* gcc 2.95.3 */
2507                                         sparc_srl_imm (code, ins->sreg1, 31, sparc_o7);
2508                                         sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2509                                         sparc_sra_imm (code, ins->dreg, 1, ins->dreg);
2510                                 }
2511                                 else {
2512                                         /* http://compilers.iecc.com/comparch/article/93-04-079 */
2513                                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2514                                         sparc_srl_imm (code, sparc_o7, 32 - i, sparc_o7);
2515                                         sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2516                                         sparc_sra_imm (code, ins->dreg, i, ins->dreg);
2517                                 }
2518                         }
2519                         else {
2520                                 /* Sign extend sreg1 into %y */
2521                                 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2522                                 sparc_wry (code, sparc_o7, sparc_g0);
2523                                 EMIT_ALU_IMM (ins, sdiv, TRUE);
2524                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2525                         }
2526                         break;
2527                 }
2528                 case CEE_REM:
2529                 case OP_IREM:
2530                         /* Sign extend sreg1 into %y */
2531                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2532                         sparc_wry (code, sparc_o7, sparc_g0);
2533                         sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, sparc_o7);
2534                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2535                         sparc_smul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2536                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2537                         break;
2538                 case CEE_REM_UN:
2539                 case OP_IREM_UN:
2540                         sparc_wry (code, sparc_g0, sparc_g0);
2541                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2542                         sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2543                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2544                         break;
2545                 case OP_REM_IMM:
2546                 case OP_IREM_IMM:
2547                         /* Sign extend sreg1 into %y */
2548                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2549                         sparc_wry (code, sparc_o7, sparc_g0);
2550                         if (!sparc_is_imm13 (ins->inst_imm)) {
2551                                 sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
2552                                 sparc_sdiv (code, TRUE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
2553                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2554                                 sparc_smul (code, FALSE, sparc_o7, GP_SCRATCH_REG, sparc_o7);
2555                         }
2556                         else {
2557                                 sparc_sdiv_imm (code, TRUE, ins->sreg1, ins->inst_imm, sparc_o7);
2558                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2559                                 sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
2560                         }
2561                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2562                         break;
2563                 case CEE_OR:
2564                 case OP_IOR:
2565                         sparc_or (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2566                         break;
2567                 case OP_OR_IMM:
2568                 case OP_IOR_IMM:
2569                         EMIT_ALU_IMM (ins, or, FALSE);
2570                         break;
2571                 case CEE_XOR:
2572                 case OP_IXOR:
2573                         sparc_xor (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2574                         break;
2575                 case OP_XOR_IMM:
2576                 case OP_IXOR_IMM:
2577                         EMIT_ALU_IMM (ins, xor, FALSE);
2578                         break;
2579                 case CEE_SHL:
2580                 case OP_ISHL:
2581                         sparc_sll (code, ins->sreg1, ins->sreg2, ins->dreg);
2582                         break;
2583                 case OP_SHL_IMM:
2584                 case OP_ISHL_IMM:
2585                         if (ins->inst_imm < (1 << 5))
2586                                 sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2587                         else {
2588                                 sparc_set (code, ins->inst_imm, sparc_o7);
2589                                 sparc_sll (code, ins->sreg1, sparc_o7, ins->dreg);
2590                         }
2591                         break;
2592                 case CEE_SHR:
2593                 case OP_ISHR:
2594                         sparc_sra (code, ins->sreg1, ins->sreg2, ins->dreg);
2595                         break;
2596                 case OP_ISHR_IMM:
2597                 case OP_SHR_IMM:
2598                         if (ins->inst_imm < (1 << 5))
2599                                 sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2600                         else {
2601                                 sparc_set (code, ins->inst_imm, sparc_o7);
2602                                 sparc_sra (code, ins->sreg1, sparc_o7, ins->dreg);
2603                         }
2604                         break;
2605                 case OP_SHR_UN_IMM:
2606                 case OP_ISHR_UN_IMM:
2607                         if (ins->inst_imm < (1 << 5))
2608                                 sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2609                         else {
2610                                 sparc_set (code, ins->inst_imm, sparc_o7);
2611                                 sparc_srl (code, ins->sreg1, sparc_o7, ins->dreg);
2612                         }
2613                         break;
2614                 case CEE_SHR_UN:
2615                 case OP_ISHR_UN:
2616                         sparc_srl (code, ins->sreg1, ins->sreg2, ins->dreg);
2617                         break;
2618                 case OP_LSHL:
2619                         sparc_sllx (code, ins->sreg1, ins->sreg2, ins->dreg);
2620                         break;
2621                 case OP_LSHL_IMM:
2622                         if (ins->inst_imm < (1 << 6))
2623                                 sparc_sllx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2624                         else {
2625                                 sparc_set (code, ins->inst_imm, sparc_o7);
2626                                 sparc_sllx (code, ins->sreg1, sparc_o7, ins->dreg);
2627                         }
2628                         break;
2629                 case OP_LSHR:
2630                         sparc_srax (code, ins->sreg1, ins->sreg2, ins->dreg);
2631                         break;
2632                 case OP_LSHR_IMM:
2633                         if (ins->inst_imm < (1 << 6))
2634                                 sparc_srax_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2635                         else {
2636                                 sparc_set (code, ins->inst_imm, sparc_o7);
2637                                 sparc_srax (code, ins->sreg1, sparc_o7, ins->dreg);
2638                         }
2639                         break;
2640                 case OP_LSHR_UN:
2641                         sparc_srlx (code, ins->sreg1, ins->sreg2, ins->dreg);
2642                         break;
2643                 case OP_LSHR_UN_IMM:
2644                         if (ins->inst_imm < (1 << 6))
2645                                 sparc_srlx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2646                         else {
2647                                 sparc_set (code, ins->inst_imm, sparc_o7);
2648                                 sparc_srlx (code, ins->sreg1, sparc_o7, ins->dreg);
2649                         }
2650                         break;
2651                 case CEE_NOT:
2652                 case OP_INOT:
2653                         /* can't use sparc_not */
2654                         sparc_xnor (code, FALSE, ins->sreg1, sparc_g0, ins->dreg);
2655                         break;
2656                 case CEE_NEG:
2657                 case OP_INEG:
2658                         /* can't use sparc_neg */
2659                         sparc_sub (code, FALSE, sparc_g0, ins->sreg1, ins->dreg);
2660                         break;
2661                 case CEE_MUL:
2662                 case OP_IMUL:
2663                         sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2664                         break;
2665                 case OP_IMUL_IMM:
2666                 case OP_MUL_IMM: {
2667                         int i, imm;
2668
2669                         if ((ins->inst_imm == 1) && (ins->sreg1 == ins->dreg))
2670                                 break;
2671
2672                         /* Transform multiplication into a shift */
2673                         for (i = 0; i < 30; ++i) {
2674                                 imm = (1 << i);
2675                                 if (ins->inst_imm == imm)
2676                                         break;
2677                         }
2678                         if (i < 30)
2679                                 sparc_sll_imm (code, ins->sreg1, i, ins->dreg);
2680                         else
2681                                 EMIT_ALU_IMM (ins, smul, FALSE);
2682                         break;
2683                 }
2684                 case CEE_MUL_OVF:
2685                 case OP_IMUL_OVF:
2686                         sparc_smul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2687                         sparc_rdy (code, sparc_g1);
2688                         sparc_sra_imm (code, ins->dreg, 31, sparc_o7);
2689                         sparc_cmp (code, sparc_g1, sparc_o7);
2690                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2691                         break;
2692                 case CEE_MUL_OVF_UN:
2693                 case OP_IMUL_OVF_UN:
2694                         sparc_umul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2695                         sparc_rdy (code, sparc_o7);
2696                         sparc_cmp (code, sparc_o7, sparc_g0);
2697                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2698                         break;
2699                 case OP_ICONST:
2700                 case OP_SETREGIMM:
2701                         sparc_set (code, ins->inst_c0, ins->dreg);
2702                         break;
2703                 case OP_I8CONST:
2704                         sparc_set (code, ins->inst_l, ins->dreg);
2705                         break;
2706                 case OP_AOTCONST:
2707                         mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2708                         sparc_set_template (code, ins->dreg);
2709                         break;
2710                 case CEE_CONV_I4:
2711                 case CEE_CONV_U4:
2712                 case OP_MOVE:
2713                 case OP_SETREG:
2714                         if (ins->sreg1 != ins->dreg)
2715                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2716                         break;
2717                 case OP_SETFREG:
2718                         /* Only used on V9 */
2719                         if (ins->sreg1 != ins->dreg)
2720                                 sparc_fmovd (code, ins->sreg1, ins->dreg);
2721                         break;
2722                 case OP_SPARC_SETFREG_FLOAT:
2723                         /* Only used on V9 */
2724                         sparc_fdtos (code, ins->sreg1, ins->dreg);
2725                         break;
2726                 case CEE_JMP:
2727                         if (cfg->method->save_lmf)
2728                                 NOT_IMPLEMENTED;
2729
2730                         code = emit_load_volatile_arguments (cfg, code);
2731                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2732                         sparc_set_template (code, sparc_o7);
2733                         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_g0);
2734                         /* Restore parent frame in delay slot */
2735                         sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
2736                         break;
2737                 case OP_CHECK_THIS:
2738                         /* ensure ins->sreg1 is not NULL */
2739                         sparc_ld_imm (code, ins->sreg1, 0, sparc_g0);
2740                         break;
2741                 case OP_ARGLIST:
2742                         sparc_add_imm (code, FALSE, sparc_fp, cfg->sig_cookie, sparc_o7);
2743                         sparc_sti_imm (code, sparc_o7, ins->sreg1, 0);
2744                         break;
2745                 case OP_FCALL:
2746                 case OP_LCALL:
2747                 case OP_VCALL:
2748                 case OP_VOIDCALL:
2749                 case CEE_CALL:
2750                         call = (MonoCallInst*)ins;
2751                         g_assert (!call->virtual);
2752                         code = emit_save_sp_to_lmf (cfg, code);
2753                         if (ins->flags & MONO_INST_HAS_METHOD)
2754                             code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2755                         else
2756                             code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2757
2758                         code = emit_vret_token (ins, code);
2759                         code = emit_move_return_value (ins, code);
2760                         break;
2761                 case OP_FCALL_REG:
2762                 case OP_LCALL_REG:
2763                 case OP_VCALL_REG:
2764                 case OP_VOIDCALL_REG:
2765                 case OP_CALL_REG:
2766                         call = (MonoCallInst*)ins;
2767                         code = emit_save_sp_to_lmf (cfg, code);
2768                         sparc_jmpl (code, ins->sreg1, sparc_g0, sparc_callsite);
2769                         /*
2770                          * We emit a special kind of nop in the delay slot to tell the
2771                          * trampoline code that this is a virtual call, thus an unbox
2772                          * trampoline might need to be called.
2773                          */
2774                         if (call->virtual)
2775                                 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2776                         else
2777                                 sparc_nop (code);
2778
2779                         code = emit_vret_token (ins, code);
2780                         code = emit_move_return_value (ins, code);
2781                         break;
2782                 case OP_FCALL_MEMBASE:
2783                 case OP_LCALL_MEMBASE:
2784                 case OP_VCALL_MEMBASE:
2785                 case OP_VOIDCALL_MEMBASE:
2786                 case OP_CALL_MEMBASE:
2787                         call = (MonoCallInst*)ins;
2788                         g_assert (sparc_is_imm13 (ins->inst_offset));
2789                         code = emit_save_sp_to_lmf (cfg, code);
2790                         sparc_ldi_imm (code, ins->inst_basereg, ins->inst_offset, sparc_o7);
2791                         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_callsite);
2792                         if (call->virtual)
2793                                 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2794                         else
2795                                 sparc_nop (code);
2796
2797                         code = emit_vret_token (ins, code);
2798                         code = emit_move_return_value (ins, code);
2799                         break;
2800                 case OP_SETFRET:
2801                         if (mono_method_signature (cfg->method)->ret->type == MONO_TYPE_R4)
2802                                 sparc_fdtos (code, ins->sreg1, sparc_f0);
2803                         else {
2804 #ifdef SPARCV9
2805                                 sparc_fmovd (code, ins->sreg1, ins->dreg);
2806 #else
2807                                 /* FIXME: Why not use fmovd ? */
2808                                 sparc_fmovs (code, ins->sreg1, ins->dreg);
2809                                 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2810 #endif
2811                         }
2812                         break;
2813                 case OP_OUTARG:
2814                         g_assert_not_reached ();
2815                         break;
2816                 case OP_LOCALLOC: {
2817                         guint32 size_reg;
2818
2819 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2820                         /* Perform stack touching */
2821                         NOT_IMPLEMENTED;
2822 #endif
2823
2824                         /* Keep alignment */
2825                         sparc_add_imm (code, FALSE, ins->sreg1, MONO_ARCH_FRAME_ALIGNMENT - 1, ins->dreg);
2826                         sparc_set (code, ~(MONO_ARCH_FRAME_ALIGNMENT - 1), sparc_o7);
2827                         sparc_and (code, FALSE, ins->dreg, sparc_o7, ins->dreg);
2828
2829                         if ((ins->flags & MONO_INST_INIT) && (ins->sreg1 == ins->dreg)) {
2830 #ifdef SPARCV9
2831                                 size_reg = sparc_g4;
2832 #else
2833                                 size_reg = sparc_g1;
2834 #endif
2835                                 sparc_mov_reg_reg (code, ins->dreg, size_reg);
2836                         }
2837                         else
2838                                 size_reg = ins->sreg1;
2839
2840                         sparc_sub (code, FALSE, sparc_sp, ins->dreg, ins->dreg);
2841                         /* Keep %sp valid at all times */
2842                         sparc_mov_reg_reg (code, ins->dreg, sparc_sp);
2843                         g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
2844                         sparc_add_imm (code, FALSE, ins->dreg, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
2845
2846                         if (ins->flags & MONO_INST_INIT) {
2847                                 guint32 *br [3];
2848                                 /* Initialize memory region */
2849                                 sparc_cmp_imm (code, size_reg, 0);
2850                                 br [0] = code;
2851                                 sparc_branch (code, 0, sparc_be, 0);
2852                                 /* delay slot */
2853                                 sparc_set (code, 0, sparc_o7);
2854                                 sparc_sub_imm (code, 0, size_reg, sparcv9 ? 8 : 4, size_reg);
2855                                 /* start of loop */
2856                                 br [1] = code;
2857                                 if (sparcv9)
2858                                         sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
2859                                 else
2860                                         sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
2861                                 sparc_cmp (code, sparc_o7, size_reg);
2862                                 br [2] = code;
2863                                 sparc_branch (code, 0, sparc_bl, 0);
2864                                 sparc_patch (br [2], br [1]);
2865                                 /* delay slot */
2866                                 sparc_add_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2867                                 sparc_patch (br [0], code);
2868                         }
2869                         break;
2870                 }
2871                 case OP_SPARC_LOCALLOC_IMM: {
2872                         gint32 offset = ins->inst_c0;
2873
2874 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2875                         /* Perform stack touching */
2876                         NOT_IMPLEMENTED;
2877 #endif
2878
2879                         offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
2880                         if (sparc_is_imm13 (offset))
2881                                 sparc_sub_imm (code, FALSE, sparc_sp, offset, sparc_sp);
2882                         else {
2883                                 sparc_set (code, offset, sparc_o7);
2884                                 sparc_sub (code, FALSE, sparc_sp, sparc_o7, sparc_sp);
2885                         }
2886                         g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
2887                         sparc_add_imm (code, FALSE, sparc_sp, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
2888                         if ((ins->flags & MONO_INST_INIT) && (offset > 0)) {
2889                                 guint32 *br [2];
2890                                 int i;
2891
2892                                 if (offset <= 16) {
2893                                         i = 0;
2894                                         while (i < offset) {
2895                                                 if (sparcv9) {
2896                                                         sparc_stx_imm (code, sparc_g0, ins->dreg, i);
2897                                                         i += 8;
2898                                                 }
2899                                                 else {
2900                                                         sparc_st_imm (code, sparc_g0, ins->dreg, i);
2901                                                         i += 4;
2902                                                 }
2903                                         }
2904                                 }
2905                                 else {
2906                                         sparc_set (code, offset, sparc_o7);
2907                                         sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2908                                         /* beginning of loop */
2909                                         br [0] = code;
2910                                         if (sparcv9)
2911                                                 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
2912                                         else
2913                                                 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
2914                                         sparc_cmp_imm (code, sparc_o7, 0);
2915                                         br [1] = code;
2916                                         sparc_branch (code, 0, sparc_bne, 0);
2917                                         /* delay slot */
2918                                         sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2919                                         sparc_patch (br [1], br [0]);
2920                                 }
2921                         }
2922                         break;
2923                 }
2924                 case CEE_RET:
2925                         /* The return is done in the epilog */
2926                         g_assert_not_reached ();
2927                         break;
2928                 case CEE_THROW:
2929                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2930                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2931                                              (gpointer)"mono_arch_throw_exception");
2932                         EMIT_CALL ();
2933                         break;
2934                 case OP_RETHROW:
2935                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2936                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2937                                              (gpointer)"mono_arch_rethrow_exception");
2938                         EMIT_CALL ();
2939                         break;
2940                 case OP_START_HANDLER: {
2941                         /*
2942                          * The START_HANDLER instruction marks the beginning of a handler
2943                          * block. It is called using a call instruction, so %o7 contains
2944                          * the return address. Since the handler executes in the same stack
2945              * frame as the method itself, we can't use save/restore to save
2946                          * the return address. Instead, we save it into a dedicated
2947                          * variable.
2948                          */
2949                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2950                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2951                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
2952                                 sparc_sti (code, sparc_o7, spvar->inst_basereg, GP_SCRATCH_REG);
2953                         }
2954                         else
2955                                 sparc_sti_imm (code, sparc_o7, spvar->inst_basereg, spvar->inst_offset);
2956                         break;
2957                 }
2958                 case OP_ENDFILTER: {
2959                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2960                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2961                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
2962                                 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
2963                         }
2964                         else
2965                                 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
2966                         sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
2967                         /* Delay slot */
2968                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2969                         break;
2970                 }
2971                 case CEE_ENDFINALLY: {
2972                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2973                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2974                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
2975                                 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
2976                         }
2977                         else
2978                                 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
2979                         sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
2980                         sparc_nop (code);
2981                         break;
2982                 }
2983                 case OP_CALL_HANDLER:
2984                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2985                         /* This is a jump inside the method, so call_simple works even on V9 */
2986                         sparc_call_simple (code, 0);
2987                         sparc_nop (code);
2988                         break;
2989                 case OP_LABEL:
2990                         ins->inst_c0 = (guint8*)code - cfg->native_code;
2991                         break;
2992                 case CEE_BR:
2993                         //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
2994                         if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
2995                                 break;
2996                         if (ins->flags & MONO_INST_BRLABEL) {
2997                                 if (ins->inst_i0->inst_c0) {
2998                                         gint32 disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2;
2999                                         g_assert (sparc_is_imm22 (disp));
3000                                         sparc_branch (code, 1, sparc_ba, disp);
3001                                 } else {
3002                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
3003                                         sparc_branch (code, 1, sparc_ba, 0);
3004                                 }
3005                         } else {
3006                                 if (ins->inst_target_bb->native_offset) {
3007                                         gint32 disp = (ins->inst_target_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2;
3008                                         g_assert (sparc_is_imm22 (disp));
3009                                         sparc_branch (code, 1, sparc_ba, disp);
3010                                 } else {
3011                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3012                                         sparc_branch (code, 1, sparc_ba, 0);
3013                                 }
3014                         }
3015                         sparc_nop (code);
3016                         break;
3017                 case OP_BR_REG:
3018                         sparc_jmp (code, ins->sreg1, sparc_g0);
3019                         sparc_nop (code);
3020                         break;
3021                 case OP_CEQ:
3022                 case OP_CLT:
3023                 case OP_CLT_UN:
3024                 case OP_CGT:
3025                 case OP_CGT_UN:
3026                         if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3027                                 sparc_clr_reg (code, ins->dreg);
3028                                 sparc_movcc_imm (code, sparc_xcc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3029                         }
3030                         else {
3031                                 sparc_clr_reg (code, ins->dreg);
3032 #ifdef SPARCV9
3033                                 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), DEFAULT_ICC, 0, 2);
3034 #else
3035                                 sparc_branch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3036 #endif
3037                                 /* delay slot */
3038                                 sparc_set (code, 1, ins->dreg);
3039                         }
3040                         break;
3041                 case OP_ICEQ:
3042                 case OP_ICLT:
3043                 case OP_ICLT_UN:
3044                 case OP_ICGT:
3045                 case OP_ICGT_UN:
3046                     if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3047                                 sparc_clr_reg (code, ins->dreg);
3048                                 sparc_movcc_imm (code, sparc_icc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3049                     }
3050                     else {
3051                         sparc_clr_reg (code, ins->dreg);
3052                         sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), sparc_icc_short, 0, 2);
3053                         /* delay slot */
3054                         sparc_set (code, 1, ins->dreg);
3055                     }
3056                     break;
3057                 case OP_COND_EXC_EQ:
3058                 case OP_COND_EXC_NE_UN:
3059                 case OP_COND_EXC_LT:
3060                 case OP_COND_EXC_LT_UN:
3061                 case OP_COND_EXC_GT:
3062                 case OP_COND_EXC_GT_UN:
3063                 case OP_COND_EXC_GE:
3064                 case OP_COND_EXC_GE_UN:
3065                 case OP_COND_EXC_LE:
3066                 case OP_COND_EXC_LE_UN:
3067                 case OP_COND_EXC_OV:
3068                 case OP_COND_EXC_NO:
3069                 case OP_COND_EXC_C:
3070                 case OP_COND_EXC_NC:
3071                         EMIT_COND_SYSTEM_EXCEPTION (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1);
3072                         break;
3073                 case OP_SPARC_COND_EXC_EQZ:
3074                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brz, ins->inst_p1);
3075                         break;
3076                 case OP_SPARC_COND_EXC_GEZ:
3077                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgez, ins->inst_p1);
3078                         break;
3079                 case OP_SPARC_COND_EXC_GTZ:
3080                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgz, ins->inst_p1);
3081                         break;
3082                 case OP_SPARC_COND_EXC_LEZ:
3083                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlez, ins->inst_p1);
3084                         break;
3085                 case OP_SPARC_COND_EXC_LTZ:
3086                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlz, ins->inst_p1);
3087                         break;
3088                 case OP_SPARC_COND_EXC_NEZ:
3089                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brnz, ins->inst_p1);
3090                         break;
3091                 case OP_COND_EXC_IOV:
3092                 case OP_COND_EXC_IC:
3093                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1, TRUE, sparc_icc_short);
3094                         break;
3095                 case CEE_BEQ:
3096                 case CEE_BNE_UN:
3097                 case CEE_BLT:
3098                 case CEE_BLT_UN:
3099                 case CEE_BGT:
3100                 case CEE_BGT_UN:
3101                 case CEE_BGE:
3102                 case CEE_BGE_UN:
3103                 case CEE_BLE:
3104                 case CEE_BLE_UN: {
3105                         if (sparcv9)
3106                                 EMIT_COND_BRANCH_PREDICTED (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3107                         else
3108                                 EMIT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3109                         break;
3110                 }
3111
3112                 case OP_IBEQ:
3113                 case OP_IBNE_UN:
3114                 case OP_IBLT:
3115                 case OP_IBLT_UN:
3116                 case OP_IBGT:
3117                 case OP_IBGT_UN:
3118                 case OP_IBGE:
3119                 case OP_IBGE_UN:
3120                 case OP_IBLE:
3121                 case OP_IBLE_UN: {
3122                         /* Only used on V9 */
3123                         EMIT_COND_BRANCH_ICC (ins, opcode_to_sparc_cond (ins->opcode), 1, 1, sparc_icc_short);
3124                         break;
3125                 }
3126
3127                 case OP_SPARC_BRZ:
3128                         EMIT_COND_BRANCH_BPR (ins, brz, 1, 1, 1);
3129                         break;
3130                 case OP_SPARC_BRLEZ:
3131                         EMIT_COND_BRANCH_BPR (ins, brlez, 1, 1, 1);
3132                         break;
3133                 case OP_SPARC_BRLZ:
3134                         EMIT_COND_BRANCH_BPR (ins, brlz, 1, 1, 1);
3135                         break;
3136                 case OP_SPARC_BRNZ:
3137                         EMIT_COND_BRANCH_BPR (ins, brnz, 1, 1, 1);
3138                         break;
3139                 case OP_SPARC_BRGZ:
3140                         EMIT_COND_BRANCH_BPR (ins, brgz, 1, 1, 1);
3141                         break;
3142                 case OP_SPARC_BRGEZ:
3143                         EMIT_COND_BRANCH_BPR (ins, brgez, 1, 1, 1);
3144                         break;
3145
3146                 /* floating point opcodes */
3147                 case OP_R8CONST:
3148                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
3149 #ifdef SPARCV9
3150                         sparc_set_template (code, sparc_o7);
3151 #else
3152                         sparc_sethi (code, 0, sparc_o7);
3153 #endif
3154                         sparc_lddf_imm (code, sparc_o7, 0, ins->dreg);
3155                         break;
3156                 case OP_R4CONST:
3157                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
3158 #ifdef SPARCV9
3159                         sparc_set_template (code, sparc_o7);
3160 #else
3161                         sparc_sethi (code, 0, sparc_o7);
3162 #endif
3163                         sparc_ldf_imm (code, sparc_o7, 0, FP_SCRATCH_REG);
3164
3165                         /* Extend to double */
3166                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3167                         break;
3168                 case OP_STORER8_MEMBASE_REG:
3169                         if (!sparc_is_imm13 (ins->inst_offset + 4)) {
3170                                 sparc_set (code, ins->inst_offset, sparc_o7);
3171                                 /* SPARCV9 handles misaligned fp loads/stores */
3172                                 if (!v64 && (ins->inst_offset % 8)) {
3173                                         /* Misaligned */
3174                                         sparc_add (code, FALSE, ins->inst_destbasereg, sparc_o7, sparc_o7);
3175                                         sparc_stf (code, ins->sreg1, sparc_o7, sparc_g0);
3176                                         sparc_stf_imm (code, ins->sreg1 + 1, sparc_o7, 4);
3177                                 } else
3178                                         sparc_stdf (code, ins->sreg1, ins->inst_destbasereg, sparc_o7);
3179                         }
3180                         else {
3181                                 if (!v64 && (ins->inst_offset % 8)) {
3182                                         /* Misaligned */
3183                                         sparc_stf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3184                                         sparc_stf_imm (code, ins->sreg1 + 1, ins->inst_destbasereg, ins->inst_offset + 4);
3185                                 } else
3186                                         sparc_stdf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3187                         }
3188                         break;
3189                 case OP_LOADR8_MEMBASE:
3190                         EMIT_LOAD_MEMBASE (ins, lddf);
3191                         break;
3192                 case OP_STORER4_MEMBASE_REG:
3193                         /* This requires a double->single conversion */
3194                         sparc_fdtos (code, ins->sreg1, FP_SCRATCH_REG);
3195                         if (!sparc_is_imm13 (ins->inst_offset)) {
3196                                 sparc_set (code, ins->inst_offset, sparc_o7);
3197                                 sparc_stf (code, FP_SCRATCH_REG, ins->inst_destbasereg, sparc_o7);
3198                         }
3199                         else
3200                                 sparc_stf_imm (code, FP_SCRATCH_REG, ins->inst_destbasereg, ins->inst_offset);
3201                         break;
3202                 case OP_LOADR4_MEMBASE: {
3203                         /* ldf needs a single precision register */
3204                         int dreg = ins->dreg;
3205                         ins->dreg = FP_SCRATCH_REG;
3206                         EMIT_LOAD_MEMBASE (ins, ldf);
3207                         ins->dreg = dreg;
3208                         /* Extend to double */
3209                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3210                         break;
3211                 }
3212                 case OP_FMOVE:
3213 #ifdef SPARCV9
3214                         sparc_fmovd (code, ins->sreg1, ins->dreg);
3215 #else
3216                         sparc_fmovs (code, ins->sreg1, ins->dreg);
3217                         sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3218 #endif
3219                         break;
3220                 case CEE_CONV_R4: {
3221                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3222                         if (!sparc_is_imm13 (offset))
3223                                 NOT_IMPLEMENTED;
3224 #ifdef SPARCV9
3225                         sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3226                         sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3227                         sparc_fxtos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3228 #else
3229                         sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3230                         sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3231                         sparc_fitos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3232 #endif
3233                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3234                         break;
3235                 }
3236                 case CEE_CONV_R8: {
3237                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3238                         if (!sparc_is_imm13 (offset))
3239                                 NOT_IMPLEMENTED;
3240 #ifdef SPARCV9
3241                         sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3242                         sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3243                         sparc_fxtod (code, FP_SCRATCH_REG, ins->dreg);
3244 #else
3245                         sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3246                         sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3247                         sparc_fitod (code, FP_SCRATCH_REG, ins->dreg);
3248 #endif
3249                         break;
3250                 }
3251                 case OP_FCONV_TO_I1:
3252                 case OP_FCONV_TO_U1:
3253                 case OP_FCONV_TO_I2:
3254                 case OP_FCONV_TO_U2:
3255 #ifndef SPARCV9
3256                 case OP_FCONV_TO_I:
3257                 case OP_FCONV_TO_U:
3258 #endif
3259                 case OP_FCONV_TO_I4:
3260                 case OP_FCONV_TO_U4: {
3261                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3262                         if (!sparc_is_imm13 (offset))
3263                                 NOT_IMPLEMENTED;
3264                         sparc_fdtoi (code, ins->sreg1, FP_SCRATCH_REG);
3265                         sparc_stdf_imm (code, FP_SCRATCH_REG, sparc_sp, offset);
3266                         sparc_ld_imm (code, sparc_sp, offset, ins->dreg);
3267
3268                         switch (ins->opcode) {
3269                         case OP_FCONV_TO_I1:
3270                         case OP_FCONV_TO_U1:
3271                                 sparc_and_imm (code, 0, ins->dreg, 0xff, ins->dreg);
3272                                 break;
3273                         case OP_FCONV_TO_I2:
3274                         case OP_FCONV_TO_U2:
3275                                 sparc_set (code, 0xffff, sparc_o7);
3276                                 sparc_and (code, 0, ins->dreg, sparc_o7, ins->dreg);
3277                                 break;
3278                         default:
3279                                 break;
3280                         }
3281                         break;
3282                 }
3283                 case OP_FCONV_TO_I8:
3284                 case OP_FCONV_TO_U8:
3285                         /* Emulated */
3286                         g_assert_not_reached ();
3287                         break;
3288                 case CEE_CONV_R_UN:
3289                         /* Emulated */
3290                         g_assert_not_reached ();
3291                         break;
3292                 case OP_LCONV_TO_R_UN: {
3293                         /* Emulated */
3294                         g_assert_not_reached ();
3295                         break;
3296                 }
3297                 case OP_LCONV_TO_OVF_I: {
3298                         guint32 *br [3], *label [1];
3299
3300                         /*
3301                          * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3302                          */
3303                         sparc_cmp_imm (code, ins->sreg1, 0);
3304                         br [0] = code;
3305                         sparc_branch (code, 1, sparc_bneg, 0);
3306                         sparc_nop (code);
3307
3308                         /* positive */
3309                         /* ms word must be 0 */
3310                         sparc_cmp_imm (code, ins->sreg2, 0);
3311                         br [1] = code;
3312                         sparc_branch (code, 1, sparc_be, 0);
3313                         sparc_nop (code);
3314
3315                         label [0] = code;
3316
3317                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_ba, "OverflowException");
3318
3319                         /* negative */
3320                         sparc_patch (br [0], code);
3321
3322                         /* ms word must 0xfffffff */
3323                         sparc_cmp_imm (code, ins->sreg2, -1);
3324                         br [2] = code;
3325                         sparc_branch (code, 1, sparc_bne, 0);
3326                         sparc_nop (code);
3327                         sparc_patch (br [2], label [0]);
3328
3329                         /* Ok */
3330                         sparc_patch (br [1], code);
3331                         if (ins->sreg1 != ins->dreg)
3332                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
3333                         break;
3334                 }
3335                 case OP_FADD:
3336                         sparc_faddd (code, ins->sreg1, ins->sreg2, ins->dreg);
3337                         break;
3338                 case OP_FSUB:
3339                         sparc_fsubd (code, ins->sreg1, ins->sreg2, ins->dreg);
3340                         break;
3341                 case OP_FMUL:
3342                         sparc_fmuld (code, ins->sreg1, ins->sreg2, ins->dreg);
3343                         break;
3344                 case OP_FDIV:
3345                         sparc_fdivd (code, ins->sreg1, ins->sreg2, ins->dreg);
3346                         break;
3347                 case OP_FNEG:
3348 #ifdef SPARCV9
3349                         sparc_fnegd (code, ins->sreg1, ins->dreg);
3350 #else
3351                         /* FIXME: why don't use fnegd ? */
3352                         sparc_fnegs (code, ins->sreg1, ins->dreg);
3353 #endif
3354                         break;
3355                 case OP_FREM:
3356                         sparc_fdivd (code, ins->sreg1, ins->sreg2, FP_SCRATCH_REG);
3357                         sparc_fmuld (code, ins->sreg2, FP_SCRATCH_REG, FP_SCRATCH_REG);
3358                         sparc_fsubd (code, ins->sreg1, FP_SCRATCH_REG, ins->dreg);
3359                         break;
3360                 case OP_FCOMPARE:
3361                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3362                         break;
3363                 case OP_FCEQ:
3364                 case OP_FCLT:
3365                 case OP_FCLT_UN:
3366                 case OP_FCGT:
3367                 case OP_FCGT_UN:
3368                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3369                         sparc_clr_reg (code, ins->dreg);
3370                         switch (ins->opcode) {
3371                         case OP_FCLT_UN:
3372                         case OP_FCGT_UN:
3373                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 4);
3374                                 /* delay slot */
3375                                 sparc_set (code, 1, ins->dreg);
3376                                 sparc_fbranch (code, 1, sparc_fbu, 2);
3377                                 /* delay slot */
3378                                 sparc_set (code, 1, ins->dreg);
3379                                 break;
3380                         default:
3381                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3382                                 /* delay slot */
3383                                 sparc_set (code, 1, ins->dreg);
3384                         }
3385                         break;
3386                 case OP_FBEQ:
3387                 case OP_FBLT:
3388                 case OP_FBGT:
3389                         EMIT_FLOAT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3390                         break;
3391                 case OP_FBGE: {
3392                         /* clt.un + brfalse */
3393                         guint32 *p = code;
3394                         sparc_fbranch (code, 1, sparc_fbul, 0);
3395                         /* delay slot */
3396                         sparc_nop (code);
3397                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3398                         sparc_patch (p, (guint8*)code);
3399                         break;
3400                 }
3401                 case OP_FBLE: {
3402                         /* cgt.un + brfalse */
3403                         guint32 *p = code;
3404                         sparc_fbranch (code, 1, sparc_fbug, 0);
3405                         /* delay slot */
3406                         sparc_nop (code);
3407                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3408                         sparc_patch (p, (guint8*)code);
3409                         break;
3410                 }
3411                 case OP_FBNE_UN:
3412                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbne, 1, 1);
3413                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3414                         break;
3415                 case OP_FBLT_UN:
3416                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbl, 1, 1);
3417                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3418                         break;
3419                 case OP_FBGT_UN:
3420                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbg, 1, 1);
3421                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3422                         break;
3423                 case OP_FBGE_UN:
3424                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbge, 1, 1);
3425                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3426                         break;
3427                 case OP_FBLE_UN:
3428                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fble, 1, 1);
3429                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3430                         break;
3431                 case CEE_CKFINITE: {
3432                         gint32 offset = mono_spillvar_offset_float (cfg, 0);
3433                         if (!sparc_is_imm13 (offset))
3434                                 NOT_IMPLEMENTED;
3435                         sparc_stdf_imm (code, ins->sreg1, sparc_sp, offset);
3436                         sparc_lduh_imm (code, sparc_sp, offset, sparc_o7);
3437                         sparc_srl_imm (code, sparc_o7, 4, sparc_o7);
3438                         sparc_and_imm (code, FALSE, sparc_o7, 2047, sparc_o7);
3439                         sparc_cmp_imm (code, sparc_o7, 2047);
3440                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_be, "ArithmeticException");
3441 #ifdef SPARCV9
3442                         sparc_fmovd (code, ins->sreg1, ins->dreg);
3443 #else
3444                         sparc_fmovs (code, ins->sreg1, ins->dreg);
3445                         sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3446 #endif
3447                         break;
3448                 }
3449                 default:
3450 #ifdef __GNUC__
3451                         g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
3452 #else
3453                         g_warning ("%s:%d: unknown opcode %s\n", __FILE__, __LINE__, mono_inst_name (ins->opcode));
3454 #endif
3455                         g_assert_not_reached ();
3456                 }
3457
3458                 if ((((guint8*)code) - code_start) > max_len) {
3459                         g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3460                                    mono_inst_name (ins->opcode), max_len, ((guint8*)code) - code_start);
3461                         g_assert_not_reached ();
3462                 }
3463
3464                 cpos += max_len;
3465
3466                 last_ins = ins;
3467
3468                 ins = ins->next;
3469         }
3470
3471         cfg->code_len = (guint8*)code - cfg->native_code;
3472 }
3473
3474 void
3475 mono_arch_register_lowlevel_calls (void)
3476 {
3477         mono_register_jit_icall (mono_sparc_break, "mono_sparc_break", NULL, TRUE);
3478         mono_register_jit_icall (mono_arch_get_lmf_addr, "mono_arch_get_lmf_addr", NULL, TRUE);
3479 }
3480
3481 void
3482 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3483 {
3484         MonoJumpInfo *patch_info;
3485
3486         /* FIXME: Move part of this to arch independent code */
3487         for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3488                 unsigned char *ip = patch_info->ip.i + code;
3489                 gpointer target;
3490
3491                 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3492
3493                 switch (patch_info->type) {
3494                 case MONO_PATCH_INFO_NONE:
3495                         continue;
3496                 case MONO_PATCH_INFO_CLASS_INIT: {
3497                         guint32 *ip2 = (guint32*)ip;
3498                         /* Might already been changed to a nop */
3499 #ifdef SPARCV9
3500                         sparc_set_template (ip2, sparc_o7);
3501                         sparc_jmpl (ip2, sparc_o7, sparc_g0, sparc_o7);
3502 #else
3503                         sparc_call_simple (ip2, 0);
3504 #endif
3505                         break;
3506                 }
3507                 case MONO_PATCH_INFO_METHOD_JUMP: {
3508                         guint32 *ip2 = (guint32*)ip;
3509                         /* Might already been patched */
3510                         sparc_set_template (ip2, sparc_o7);
3511                         break;
3512                 }
3513                 default:
3514                         break;
3515                 }
3516                 sparc_patch ((guint32*)ip, target);
3517         }
3518 }
3519
3520 void*
3521 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3522 {
3523         int i;
3524         guint32 *code = (guint32*)p;
3525         MonoMethodSignature *sig = mono_method_signature (cfg->method);
3526         CallInfo *cinfo;
3527
3528         /* Save registers to stack */
3529         for (i = 0; i < 6; ++i)
3530                 sparc_sti_imm (code, sparc_i0 + i, sparc_fp, ARGS_OFFSET + (i * sizeof (gpointer)));
3531
3532         cinfo = get_call_info (sig, FALSE);
3533
3534         /* Save float regs on V9, since they are caller saved */
3535         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3536                 ArgInfo *ainfo = cinfo->args + i;
3537                 gint32 stack_offset;
3538
3539                 stack_offset = ainfo->offset + ARGS_OFFSET;
3540
3541                 if (ainfo->storage == ArgInFloatReg) {
3542                         if (!sparc_is_imm13 (stack_offset))
3543                                 NOT_IMPLEMENTED;
3544                         sparc_stf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3545                 }
3546                 else if (ainfo->storage == ArgInDoubleReg) {
3547                         /* The offset is guaranteed to be aligned by the ABI rules */
3548                         sparc_stdf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3549                 }
3550         }
3551
3552         sparc_set (code, cfg->method, sparc_o0);
3553         sparc_add_imm (code, FALSE, sparc_fp, MONO_SPARC_STACK_BIAS, sparc_o1);
3554
3555         mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
3556         EMIT_CALL ();
3557
3558         /* Restore float regs on V9 */
3559         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3560                 ArgInfo *ainfo = cinfo->args + i;
3561                 gint32 stack_offset;
3562
3563                 stack_offset = ainfo->offset + ARGS_OFFSET;
3564
3565                 if (ainfo->storage == ArgInFloatReg) {
3566                         if (!sparc_is_imm13 (stack_offset))
3567                                 NOT_IMPLEMENTED;
3568                         sparc_ldf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3569                 }
3570                 else if (ainfo->storage == ArgInDoubleReg) {
3571                         /* The offset is guaranteed to be aligned by the ABI rules */
3572                         sparc_lddf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3573                 }
3574         }
3575
3576         g_free (cinfo);
3577
3578         return code;
3579 }
3580
3581 enum {
3582         SAVE_NONE,
3583         SAVE_STRUCT,
3584         SAVE_ONE,
3585         SAVE_TWO,
3586         SAVE_FP
3587 };
3588
3589 void*
3590 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3591 {
3592         guint32 *code = (guint32*)p;
3593         int save_mode = SAVE_NONE;
3594         MonoMethod *method = cfg->method;
3595
3596         switch (mono_type_get_underlying_type (mono_method_signature (method)->ret)->type) {
3597         case MONO_TYPE_VOID:
3598                 /* special case string .ctor icall */
3599                 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
3600                         save_mode = SAVE_ONE;
3601                 else
3602                         save_mode = SAVE_NONE;
3603                 break;
3604         case MONO_TYPE_I8:
3605         case MONO_TYPE_U8:
3606 #ifdef SPARCV9
3607                 save_mode = SAVE_ONE;
3608 #else
3609                 save_mode = SAVE_TWO;
3610 #endif
3611                 break;
3612         case MONO_TYPE_R4:
3613         case MONO_TYPE_R8:
3614                 save_mode = SAVE_FP;
3615                 break;
3616         case MONO_TYPE_VALUETYPE:
3617                 save_mode = SAVE_STRUCT;
3618                 break;
3619         default:
3620                 save_mode = SAVE_ONE;
3621                 break;
3622         }
3623
3624         /* Save the result to the stack and also put it into the output registers */
3625
3626         switch (save_mode) {
3627         case SAVE_TWO:
3628                 /* V8 only */
3629                 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
3630                 sparc_st_imm (code, sparc_i0, sparc_fp, 72);
3631                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3632                 sparc_mov_reg_reg (code, sparc_i1, sparc_o2);
3633                 break;
3634         case SAVE_ONE:
3635                 sparc_sti_imm (code, sparc_i0, sparc_fp, ARGS_OFFSET);
3636                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3637                 break;
3638         case SAVE_FP:
3639 #ifdef SPARCV9
3640                 sparc_stdf_imm (code, sparc_f0, sparc_fp, ARGS_OFFSET);
3641 #else
3642                 sparc_stdf_imm (code, sparc_f0, sparc_fp, 72);
3643                 sparc_ld_imm (code, sparc_fp, 72, sparc_o1);
3644                 sparc_ld_imm (code, sparc_fp, 72 + 4, sparc_o2);
3645 #endif
3646                 break;
3647         case SAVE_STRUCT:
3648 #ifdef SPARCV9
3649                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3650 #else
3651                 sparc_ld_imm (code, sparc_fp, 64, sparc_o1);
3652 #endif
3653                 break;
3654         case SAVE_NONE:
3655         default:
3656                 break;
3657         }
3658
3659         sparc_set (code, cfg->method, sparc_o0);
3660
3661         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, func);
3662         EMIT_CALL ();
3663
3664         /* Restore result */
3665
3666         switch (save_mode) {
3667         case SAVE_TWO:
3668                 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
3669                 sparc_ld_imm (code, sparc_fp, 72, sparc_i0);
3670                 break;
3671         case SAVE_ONE:
3672                 sparc_ldi_imm (code, sparc_fp, ARGS_OFFSET, sparc_i0);
3673                 break;
3674         case SAVE_FP:
3675                 sparc_lddf_imm (code, sparc_fp, ARGS_OFFSET, sparc_f0);
3676                 break;
3677         case SAVE_NONE:
3678         default:
3679                 break;
3680         }
3681
3682         return code;
3683 }
3684
3685 guint8 *
3686 mono_arch_emit_prolog (MonoCompile *cfg)
3687 {
3688         MonoMethod *method = cfg->method;
3689         MonoMethodSignature *sig;
3690         MonoInst *inst;
3691         guint32 *code;
3692         CallInfo *cinfo;
3693         guint32 i, offset;
3694
3695         cfg->code_size = 256;
3696         cfg->native_code = g_malloc (cfg->code_size);
3697         code = (guint32*)cfg->native_code;
3698
3699         /* FIXME: Generate intermediate code instead */
3700
3701         offset = cfg->stack_offset;
3702         offset += (16 * sizeof (gpointer)); /* register save area */
3703 #ifndef SPARCV9
3704         offset += 4; /* struct/union return pointer */
3705 #endif
3706
3707         /* add parameter area size for called functions */
3708         if (cfg->param_area < (6 * sizeof (gpointer)))
3709                 /* Reserve space for the first 6 arguments even if it is unused */
3710                 offset += 6 * sizeof (gpointer);
3711         else
3712                 offset += cfg->param_area;
3713
3714         /* align the stack size */
3715         offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3716
3717         /*
3718          * localloc'd memory is stored between the local variables (whose
3719          * size is given by cfg->stack_offset), and between the space reserved
3720          * by the ABI.
3721          */
3722         cfg->arch.localloc_offset = offset - cfg->stack_offset;
3723
3724         cfg->stack_offset = offset;
3725
3726 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3727                         /* Perform stack touching */
3728                         NOT_IMPLEMENTED;
3729 #endif
3730
3731         if (!sparc_is_imm13 (- cfg->stack_offset)) {
3732                 /* Can't use sparc_o7 here, since we're still in the caller's frame */
3733                 sparc_set (code, (- cfg->stack_offset), GP_SCRATCH_REG);
3734                 sparc_save (code, sparc_sp, GP_SCRATCH_REG, sparc_sp);
3735         }
3736         else
3737                 sparc_save_imm (code, sparc_sp, - cfg->stack_offset, sparc_sp);
3738
3739 /*
3740         if (strstr (cfg->method->name, "foo")) {
3741                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
3742                 sparc_call_simple (code, 0);
3743                 sparc_nop (code);
3744         }
3745 */
3746
3747         sig = mono_method_signature (method);
3748
3749         cinfo = get_call_info (sig, FALSE);
3750
3751         /* Keep in sync with emit_load_volatile_arguments */
3752         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3753                 ArgInfo *ainfo = cinfo->args + i;
3754                 gint32 stack_offset;
3755                 MonoType *arg_type;
3756                 inst = cfg->varinfo [i];
3757
3758                 if (sig->hasthis && (i == 0))
3759                         arg_type = &mono_defaults.object_class->byval_arg;
3760                 else
3761                         arg_type = sig->params [i - sig->hasthis];
3762
3763                 stack_offset = ainfo->offset + ARGS_OFFSET;
3764
3765                 /* Save the split arguments so they will reside entirely on the stack */
3766                 if (ainfo->storage == ArgInSplitRegStack) {
3767                         /* Save the register to the stack */
3768                         g_assert (inst->opcode == OP_REGOFFSET);
3769                         if (!sparc_is_imm13 (stack_offset))
3770                                 NOT_IMPLEMENTED;
3771                         sparc_st_imm (code, sparc_i5, inst->inst_basereg, stack_offset);
3772                 }
3773
3774                 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
3775                         /* Save the argument to a dword aligned stack location */
3776                         /*
3777                          * stack_offset contains the offset of the argument on the stack.
3778                          * inst->inst_offset contains the dword aligned offset where the value
3779                          * should be stored.
3780                          */
3781                         if (ainfo->storage == ArgInIRegPair) {
3782                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3783                                         NOT_IMPLEMENTED;
3784                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3785                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3786                         }
3787                         else
3788                                 if (ainfo->storage == ArgInSplitRegStack) {
3789 #ifdef SPARCV9
3790                                         g_assert_not_reached ();
3791 #endif
3792                                         if (stack_offset != inst->inst_offset) {
3793                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3794                                                 sparc_st_imm (code, sparc_i5, inst->inst_basereg, inst->inst_offset);
3795                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3796                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3797                                         }
3798                                 }
3799                         else
3800                                 if (ainfo->storage == ArgOnStackPair) {
3801 #ifdef SPARCV9
3802                                         g_assert_not_reached ();
3803 #endif
3804                                         if (stack_offset != inst->inst_offset) {
3805                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3806                                                 sparc_ld_imm (code, sparc_fp, stack_offset, sparc_o7);
3807                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset);
3808                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3809                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3810                                         }
3811                                 }
3812                         else
3813                                 g_assert_not_reached ();
3814                 }
3815                 else
3816                         if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
3817                                 /* Argument in register, but need to be saved to stack */
3818                                 if (!sparc_is_imm13 (stack_offset))
3819                                         NOT_IMPLEMENTED;
3820                                 if ((stack_offset - ARGS_OFFSET) & 0x1)
3821                                         sparc_stb_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3822                                 else
3823                                         if ((stack_offset - ARGS_OFFSET) & 0x2)
3824                                                 sparc_sth_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3825                                 else
3826                                         if ((stack_offset - ARGS_OFFSET) & 0x4)
3827                                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3828                                         else {
3829                                                 if (v64)
3830                                                         sparc_stx_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3831                                                 else
3832                                                         sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3833                                         }
3834                         }
3835                 else
3836                         if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
3837 #ifdef SPARCV9
3838                                 NOT_IMPLEMENTED;
3839 #endif
3840                                 /* Argument in regpair, but need to be saved to stack */
3841                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3842                                         NOT_IMPLEMENTED;
3843                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3844                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3845                         }
3846                 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
3847                                 if (!sparc_is_imm13 (stack_offset))
3848                                         NOT_IMPLEMENTED;
3849                                 sparc_stf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
3850                                 }
3851                         else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
3852                                 /* The offset is guaranteed to be aligned by the ABI rules */
3853                                 sparc_stdf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
3854                         }
3855
3856                 if ((ainfo->storage == ArgInFloatReg) && (inst->opcode == OP_REGVAR)) {
3857                         /* Need to move into the a double precision register */
3858                         sparc_fstod (code, ainfo->reg, ainfo->reg - 1);
3859                 }
3860
3861                 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
3862                         if (inst->opcode == OP_REGVAR)
3863                                 /* FIXME: Load the argument into memory */
3864                                 NOT_IMPLEMENTED;
3865         }
3866
3867         g_free (cinfo);
3868
3869         if (cfg->method->save_lmf) {
3870                 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
3871
3872                 /* Save ip */
3873                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3874                 sparc_set_template (code, sparc_o7);
3875                 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ip));
3876                 /* Save sp */
3877                 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
3878                 /* Save fp */
3879                 sparc_sti_imm (code, sparc_fp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebp));
3880                 /* Save method */
3881                 /* FIXME: add a relocation for this */
3882                 sparc_set (code, cfg->method, sparc_o7);
3883                 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method));
3884
3885                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3886                                                          (gpointer)"mono_arch_get_lmf_addr");
3887                 EMIT_CALL ();
3888
3889                 code = (guint32*)mono_sparc_emit_save_lmf (code, lmf_offset);
3890         }
3891
3892         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3893                 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
3894
3895         cfg->code_len = (guint8*)code - cfg->native_code;
3896
3897         g_assert (cfg->code_len <= cfg->code_size);
3898
3899         return (guint8*)code;
3900 }
3901
3902 void
3903 mono_arch_emit_epilog (MonoCompile *cfg)
3904 {
3905         MonoMethod *method = cfg->method;
3906         guint32 *code;
3907         int can_fold = 0;
3908         int max_epilog_size = 16 + 20 * 4;
3909
3910         if (cfg->method->save_lmf)
3911                 max_epilog_size += 128;
3912
3913         if (mono_jit_trace_calls != NULL)
3914                 max_epilog_size += 50;
3915
3916         if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
3917                 max_epilog_size += 50;
3918
3919         while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
3920                 cfg->code_size *= 2;
3921                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
3922                 mono_jit_stats.code_reallocs++;
3923         }
3924
3925         code = (guint32*)(cfg->native_code + cfg->code_len);
3926
3927         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3928                 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
3929
3930         if (cfg->method->save_lmf) {
3931                 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
3932
3933                 code = mono_sparc_emit_restore_lmf (code, lmf_offset);
3934         }
3935
3936         /*
3937          * The V8 ABI requires that calls to functions which return a structure
3938          * return to %i7+12
3939          */
3940         if (!v64 && mono_method_signature (cfg->method)->pinvoke && MONO_TYPE_ISSTRUCT(mono_method_signature (cfg->method)->ret))
3941                 sparc_jmpl_imm (code, sparc_i7, 12, sparc_g0);
3942         else
3943                 sparc_ret (code);
3944
3945         /* Only fold last instruction into the restore if the exit block has an in count of 1
3946            and the previous block hasn't been optimized away since it may have an in count > 1 */
3947         if (cfg->bb_exit->in_count == 1 && cfg->bb_exit->in_bb[0]->native_offset != cfg->bb_exit->native_offset)
3948                 can_fold = 1;
3949
3950         /* Try folding last instruction into the restore */
3951         if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && sparc_inst_imm (code [-2]) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
3952                 /* or reg, imm, %i0 */
3953                 int reg = sparc_inst_rs1 (code [-2]);
3954                 int imm = sparc_inst_imm13 (code [-2]);
3955                 code [-2] = code [-1];
3956                 code --;
3957                 sparc_restore_imm (code, reg, imm, sparc_o0);
3958         }
3959         else
3960         if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && (!sparc_inst_imm (code [-2])) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
3961                 /* or reg, reg, %i0 */
3962                 int reg1 = sparc_inst_rs1 (code [-2]);
3963                 int reg2 = sparc_inst_rs2 (code [-2]);
3964                 code [-2] = code [-1];
3965                 code --;
3966                 sparc_restore (code, reg1, reg2, sparc_o0);
3967         }
3968         else
3969                 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
3970
3971         cfg->code_len = (guint8*)code - cfg->native_code;
3972
3973         g_assert (cfg->code_len < cfg->code_size);
3974
3975 }
3976
3977 void
3978 mono_arch_emit_exceptions (MonoCompile *cfg)
3979 {
3980         MonoJumpInfo *patch_info;
3981         guint32 *code;
3982         int nthrows = 0, i;
3983         int exc_count = 0;
3984         guint32 code_size;
3985         MonoClass *exc_classes [16];
3986         guint8 *exc_throw_start [16], *exc_throw_end [16];
3987
3988         /* Compute needed space */
3989         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3990                 if (patch_info->type == MONO_PATCH_INFO_EXC)
3991                         exc_count++;
3992         }
3993
3994         /*
3995          * make sure we have enough space for exceptions
3996          */
3997 #ifdef SPARCV9
3998         code_size = exc_count * (20 * 4);
3999 #else
4000         code_size = exc_count * 24;
4001 #endif
4002
4003         while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4004                 cfg->code_size *= 2;
4005                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4006                 mono_jit_stats.code_reallocs++;
4007         }
4008
4009         code = (guint32*)(cfg->native_code + cfg->code_len);
4010
4011         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4012                 switch (patch_info->type) {
4013                 case MONO_PATCH_INFO_EXC: {
4014                         MonoClass *exc_class;
4015                         guint32 *buf, *buf2;
4016                         guint32 throw_ip, type_idx;
4017                         gint32 disp;
4018
4019                         sparc_patch ((guint32*)(cfg->native_code + patch_info->ip.i), code);
4020
4021                         exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4022                         type_idx = exc_class->type_token - MONO_TOKEN_TYPE_DEF;
4023                         g_assert (exc_class);
4024                         throw_ip = patch_info->ip.i;
4025
4026                         /* Find a throw sequence for the same exception class */
4027                         for (i = 0; i < nthrows; ++i)
4028                                 if (exc_classes [i] == exc_class)
4029                                         break;
4030
4031                         if (i < nthrows) {
4032                                 guint32 throw_offset = (((guint8*)exc_throw_end [i] - cfg->native_code) - throw_ip) >> 2;
4033                                 if (!sparc_is_imm13 (throw_offset))
4034                                         sparc_set32 (code, throw_offset, sparc_o1);
4035
4036                                 disp = (exc_throw_start [i] - (guint8*)code) >> 2;
4037                                 g_assert (sparc_is_imm22 (disp));
4038                                 sparc_branch (code, 0, sparc_ba, disp);
4039                                 if (sparc_is_imm13 (throw_offset))
4040                                         sparc_set32 (code, throw_offset, sparc_o1);
4041                                 else
4042                                         sparc_nop (code);
4043                                 patch_info->type = MONO_PATCH_INFO_NONE;
4044                         }
4045                         else {
4046                                 /* Emit the template for setting o1 */
4047                                 buf = code;
4048                                 if (sparc_is_imm13 (((((guint8*)code - cfg->native_code) - throw_ip) >> 2) - 8))
4049                                         /* Can use a short form */
4050                                         sparc_nop (code);
4051                                 else
4052                                         sparc_set_template (code, sparc_o1);
4053                                 buf2 = code;
4054
4055                                 if (nthrows < 16) {
4056                                         exc_classes [nthrows] = exc_class;
4057                                         exc_throw_start [nthrows] = (guint8*)code;
4058                                 }
4059
4060                                 /*
4061                                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
4062                                 EMIT_CALL();
4063                                 */
4064
4065                                 /* first arg = type token */
4066                                 /* Pass the type index to reduce the size of the sparc_set */
4067                                 if (!sparc_is_imm13 (type_idx))
4068                                         sparc_set32 (code, type_idx, sparc_o0);
4069
4070                                 /* second arg = offset between the throw ip and the current ip */
4071                                 /* On sparc, the saved ip points to the call instruction */
4072                                 disp = (((guint8*)code - cfg->native_code) - throw_ip) >> 2;
4073                                 sparc_set32 (buf, disp, sparc_o1);
4074                                 while (buf < buf2)
4075                                         sparc_nop (buf);
4076
4077                                 if (nthrows < 16) {
4078                                         exc_throw_end [nthrows] = (guint8*)code;
4079                                         nthrows ++;
4080                                 }
4081
4082                                 patch_info->data.name = "mono_arch_throw_corlib_exception";
4083                                 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4084                                 patch_info->ip.i = (guint8*)code - cfg->native_code;
4085
4086                                 EMIT_CALL ();
4087
4088                                 if (sparc_is_imm13 (type_idx)) {
4089                                         /* Put it into the delay slot */
4090                                         code --;
4091                                         buf = code;
4092                                         sparc_set32 (code, type_idx, sparc_o0);
4093                                         g_assert (code - buf == 1);
4094                                 }
4095                         }
4096                         break;
4097                 }
4098                 default:
4099                         /* do nothing */
4100                         break;
4101                 }
4102         }
4103
4104         cfg->code_len = (guint8*)code - cfg->native_code;
4105
4106         g_assert (cfg->code_len < cfg->code_size);
4107
4108 }
4109
4110 gboolean lmf_addr_key_inited = FALSE;
4111
4112 #ifdef MONO_SPARC_THR_TLS
4113 thread_key_t lmf_addr_key;
4114 #else
4115 pthread_key_t lmf_addr_key;
4116 #endif
4117
4118 gpointer
4119 mono_arch_get_lmf_addr (void)
4120 {
4121         /* This is perf critical so we bypass the IO layer */
4122         /* The thr_... functions seem to be somewhat faster */
4123 #ifdef MONO_SPARC_THR_TLS
4124         gpointer res;
4125         thr_getspecific (lmf_addr_key, &res);
4126         return res;
4127 #else
4128         return pthread_getspecific (lmf_addr_key);
4129 #endif
4130 }
4131
4132 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4133
4134 /*
4135  * There seems to be no way to determine stack boundaries under solaris,
4136  * so it's not possible to determine whenever a SIGSEGV is caused by stack
4137  * overflow or not.
4138  */
4139 #error "--with-sigaltstack=yes not supported on solaris"
4140
4141 static void
4142 setup_stack (MonoJitTlsData *tls)
4143 {
4144 #ifdef __linux__
4145         struct sigaltstack sa;
4146 #else
4147         stack_t         sigstk;
4148 #endif
4149
4150         /* Setup an alternate signal stack */
4151         tls->signal_stack = mmap (0, SIGNAL_STACK_SIZE, PROT_READ|PROT_WRITE|PROT_EXEC, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0);
4152         tls->signal_stack_size = SIGNAL_STACK_SIZE;
4153
4154 #ifdef __linux__
4155         sa.ss_sp = tls->signal_stack;
4156         sa.ss_size = SIGNAL_STACK_SIZE;
4157         sa.ss_flags = 0;
4158         g_assert (sigaltstack (&sa, NULL) == 0);
4159 #else
4160         sigstk.ss_sp = tls->signal_stack;
4161         sigstk.ss_size = SIGNAL_STACK_SIZE;
4162         sigstk.ss_flags = 0;
4163         g_assert (sigaltstack (&sigstk, NULL) == 0);
4164 #endif
4165 }
4166
4167 #endif
4168
4169 void
4170 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
4171 {
4172         if (!lmf_addr_key_inited) {
4173                 int res;
4174
4175                 lmf_addr_key_inited = TRUE;
4176
4177 #ifdef MONO_SPARC_THR_TLS
4178                 res = thr_keycreate (&lmf_addr_key, NULL);
4179 #else
4180                 res = pthread_key_create (&lmf_addr_key, NULL);
4181 #endif
4182                 g_assert (res == 0);
4183
4184         }
4185
4186 #ifdef MONO_SPARC_THR_TLS
4187         thr_setspecific (lmf_addr_key, &tls->lmf);
4188 #else
4189         pthread_setspecific (lmf_addr_key, &tls->lmf);
4190 #endif
4191
4192 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4193         setup_stack (tls);
4194 #endif
4195 }
4196
4197 void
4198 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4199 {
4200 }
4201
4202 void
4203 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *call, int this_reg, int this_type, int vt_reg)
4204 {
4205         int this_out_reg = sparc_o0;
4206
4207         if (vt_reg != -1) {
4208 #ifdef SPARCV9
4209                 MonoInst *ins;
4210                 MONO_INST_NEW (cfg, ins, OP_SETREG);
4211                 ins->sreg1 = vt_reg;
4212                 ins->dreg = mono_regstate_next_int (cfg->rs);
4213                 mono_bblock_add_inst (cfg->cbb, ins);
4214
4215                 mono_call_inst_add_outarg_reg (call, ins->dreg, sparc_o0, FALSE);
4216
4217                 this_out_reg = sparc_o1;
4218 #else
4219                 /* Set the 'struct/union return pointer' location on the stack */
4220                 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, 64, vt_reg);
4221 #endif
4222         }
4223
4224         /* add the this argument */
4225         if (this_reg != -1) {
4226                 MonoInst *this;
4227                 MONO_INST_NEW (cfg, this, OP_SETREG);
4228                 this->type = this_type;
4229                 this->sreg1 = this_reg;
4230                 this->dreg = mono_regstate_next_int (cfg->rs);
4231                 mono_bblock_add_inst (cfg->cbb, this);
4232
4233                 mono_call_inst_add_outarg_reg (call, this->dreg, this_out_reg, FALSE);
4234         }
4235 }
4236
4237
4238 MonoInst*
4239 mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4240 {
4241         return NULL;
4242 }
4243
4244 /*
4245  * mono_arch_get_argument_info:
4246  * @csig:  a method signature
4247  * @param_count: the number of parameters to consider
4248  * @arg_info: an array to store the result infos
4249  *
4250  * Gathers information on parameters such as size, alignment and
4251  * padding. arg_info should be large enought to hold param_count + 1 entries.
4252  *
4253  * Returns the size of the activation frame.
4254  */
4255 int
4256 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
4257 {
4258         int k, align;
4259         CallInfo *cinfo;
4260         ArgInfo *ainfo;
4261
4262         cinfo = get_call_info (csig, FALSE);
4263
4264         if (csig->hasthis) {
4265                 ainfo = &cinfo->args [0];
4266                 arg_info [0].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4267         }
4268
4269         for (k = 0; k < param_count; k++) {
4270                 ainfo = &cinfo->args [k + csig->hasthis];
4271
4272                 arg_info [k + 1].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4273                 arg_info [k + 1].size = mono_type_size (csig->params [k], &align);
4274         }
4275
4276         g_free (cinfo);
4277
4278         return 0;
4279 }
4280
4281 gboolean
4282 mono_arch_print_tree (MonoInst *tree, int arity)
4283 {
4284         return 0;
4285 }
4286
4287 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
4288 {
4289         return NULL;
4290 }
4291
4292 MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
4293 {
4294         return NULL;
4295 }