mono/mini/mini-sparc.c

   1 /*
   2  * mini-sparc.c: Sparc backend for the Mono code generator
   3  *
   4  * Authors:
   5  *   Paolo Molaro (lupus@ximian.com)
   6  *   Dietmar Maurer (dietmar@ximian.com)
   7  *
   8  * Modified for SPARC:
   9  *   Christopher Taylor (ct@gentoo.org)
  10  *   Mark Crichton (crichton@gimp.org)
  11  *   Zoltan Varga (vargaz@freemail.hu)
  12  *
  13  * (C) 2003 Ximian, Inc.
  14  */
  15 #include "mini.h"
  16 #include <string.h>
  17 #include <pthread.h>
  18 #include <unistd.h>
  19
  20 #ifndef __linux__
  21 #include <sys/systeminfo.h>
  22 #include <thread.h>
  23 #endif
  24
  25 #include <unistd.h>
  26 #include <sys/mman.h>
  27
  28 #include <mono/metadata/appdomain.h>
  29 #include <mono/metadata/debug-helpers.h>
  30 #include <mono/metadata/tokentype.h>
  31 #include <mono/utils/mono-math.h>
  32
  33 #include "mini-sparc.h"
  34 #include "inssel.h"
  35 #include "trace.h"
  36 #include "cpu-sparc.h"
  37 #include "jit-icalls.h"
  38
  39 /*
  40  * Sparc V9 means two things:
  41  * - the instruction set
  42  * - the ABI
  43  *
  44  * V9 instructions are only usable if the underlying processor is 64 bit. Most Sparc
  45  * processors in use are 64 bit processors. The V9 ABI is only usable if the
  46  * mono executable is a 64 bit executable. So it would make sense to use the 64 bit
  47  * instructions without using the 64 bit ABI.
  48  */
  49
  50 /*
  51  * Register usage:
  52  * - %i0..%i<n> hold the incoming arguments, these are never written by JITted
  53  * code. Unused input registers are used for global register allocation.
  54  * - %o0..%o5 and %l7 is used for local register allocation and passing arguments
  55  * - %l0..%l6 is used for global register allocation
  56  * - %o7 and %g1 is used as scratch registers in opcodes
  57  * - all floating point registers are used for local register allocation except %f0.
  58  *   Only double precision registers are used.
  59  * In 64 bit mode:
  60  * - fp registers %d0..%d30 are used for parameter passing, and %d32..%d62 are
  61  *   used for local allocation.
  62  */
  63
  64 /*
  65  * Alignment:
  66  * - doubles and longs must be stored in dword aligned locations
  67  */
  68
  69 /*
  70  * The following things are not implemented or do not work:
  71  *  - some fp arithmetic corner cases
  72  * The following tests in mono/mini are expected to fail:
  73  *  - test_0_simple_double_casts
  74  *      This test casts (guint64)-1 to double and then back to guint64 again.
  75  *    Under x86, it returns 0, while under sparc it returns -1.
  76  *
  77  * In addition to this, the runtime requires the trunc function, or its
  78  * solaris counterpart, aintl, to do some double->int conversions. If this
  79  * function is not available, it is emulated somewhat, but the results can be
  80  * strange.
  81  */
  82
  83 /*
  84  * SPARCV9 FIXME:
  85  * - optimize sparc_set according to the memory model
  86  * - when non-AOT compiling, compute patch targets immediately so we don't
  87  *   have to emit the 6 byte template.
  88  * - varags
  89  * - struct arguments/returns
  90  */
  91
  92 /*
  93  * SPARCV9 ISSUES:
  94  * - sparc_call_simple can't be used in a lot of places since the displacement
  95  *   might not fit into an imm30.
  96  * - g1 can't be used in a lot of places since it is used as a scratch reg in
  97  *   sparc_set.
  98  * - sparc_f0 can't be used as a scratch register on V9
  99  * - the %d34..%d62 fp registers are encoded as: %dx = %f(x - 32 + 1), ie.
 100  *   %d36 = %f5.
 101  * - ldind.i4/u4 needs to sign extend/clear out upper word -> slows things down
 102  * - ins->dreg can't be used as a scatch register in r4 opcodes since it might
 103  *   be a double precision register which has no single precision part.
 104  * - passing/returning structs is hard to implement, because:
 105  *   - the spec is very hard to understand
 106  *   - it requires knowledge about the fields of structure, needs to handle
 107  *     nested structures etc.
 108  */
 109
 110 /*
 111  * Possible optimizations:
 112  * - delay slot scheduling
 113  * - allocate large constants to registers
 114  * - add more mul/div/rem optimizations
 115  */
 116
 117 #ifndef __linux__
 118 #define MONO_SPARC_THR_TLS 1
 119 #endif
 120
 121 /*
 122  * There was a 64 bit bug in glib-2.2: g_bit_nth_msf (0, -1) would return 32,
 123  * causing infinite loops in dominator computation. So glib-2.4 is required.
 124  */
 125 #ifdef SPARCV9
 126 #if GLIB_MAJOR_VERSION == 2 && GLIB_MINOR_VERSION < 4
 127 #error "glib 2.4 or later is required for 64 bit mode."
 128 #endif
 129 #endif
 130
 131 #define ALIGN_TO(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
 132
 133 #define SIGNAL_STACK_SIZE (64 * 1024)
 134
 135 #define STACK_BIAS MONO_SPARC_STACK_BIAS
 136
 137 #ifdef SPARCV9
 138
 139 /* %g1 is used by sparc_set */
 140 #define GP_SCRATCH_REG sparc_g4
 141 /* %f0 is used for parameter passing */
 142 #define FP_SCRATCH_REG sparc_f30
 143 #define ARGS_OFFSET (STACK_BIAS + 128)
 144
 145 #else
 146
 147 #define FP_SCRATCH_REG sparc_f0
 148 #define ARGS_OFFSET 68
 149 #define GP_SCRATCH_REG sparc_g1
 150
 151 #endif
 152
 153 /* Whenever the CPU supports v9 instructions */
 154 static gboolean sparcv9 = FALSE;
 155
 156 /* Whenever this is a 64bit executable */
 157 #if SPARCV9
 158 static gboolean v64 = TRUE;
 159 #else
 160 static gboolean v64 = FALSE;
 161 #endif
 162
 163 static gpointer mono_arch_get_lmf_addr (void);
 164
 165 const char*
 166 mono_arch_regname (int reg) {
 167         static const char * rnames[] = {
 168                 "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
 169                 "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
 170                 "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
 171                 "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
 172                 "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
 173                 "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
 174                 "sparc_fp", "sparc_retadr"
 175         };
 176         if (reg >= 0 && reg < 32)
 177                 return rnames [reg];
 178         return "unknown";
 179 }
 180
 181 const char*
 182 mono_arch_fregname (int reg) {
 183         static const char *rnames [] = {
 184                 "sparc_f0", "sparc_f1", "sparc_f2", "sparc_f3", "sparc_f4",
 185                 "sparc_f5", "sparc_f6", "sparc_f7", "sparc_f8", "sparc_f9",
 186                 "sparc_f10", "sparc_f11", "sparc_f12", "sparc_f13", "sparc_f14",
 187                 "sparc_f15", "sparc_f16", "sparc_f17", "sparc_f18", "sparc_f19",
 188                 "sparc_f20", "sparc_f21", "sparc_f22", "sparc_f23", "sparc_f24",
 189                 "sparc_f25", "sparc_f26", "sparc_f27", "sparc_f28", "sparc_f29",
 190                 "sparc_f30", "sparc_f31"
 191         };
 192
 193         if (reg >= 0 && reg < 32)
 194                 return rnames [reg];
 195         else
 196                 return "unknown";
 197 }
 198
 199 /*
 200  * Initialize the cpu to execute managed code.
 201  */
 202 void
 203 mono_arch_cpu_init (void)
 204 {
 205         guint32 dummy;
 206         /* make sure sparcv9 is initialized for embedded use */
 207         mono_arch_cpu_optimizazions(&dummy);
 208 }
 209
 210 /*
 211  * Initialize architecture specific code.
 212  */
 213 void
 214 mono_arch_init (void)
 215 {
 216 }
 217
 218 /*
 219  * Cleanup architecture specific code.
 220  */
 221 void
 222 mono_arch_cleanup (void)
 223 {
 224 }
 225
 226 /*
 227  * This function returns the optimizations supported on this cpu.
 228  */
 229 guint32
 230 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
 231 {
 232         char buf [1024];
 233         guint32 opts = 0;
 234
 235         *exclude_mask = 0;
 236
 237 #ifndef __linux__
 238         if (!sysinfo (SI_ISALIST, buf, 1024))
 239                 g_assert_not_reached ();
 240 #else
 241         /* From glibc.  If the getpagesize is 8192, we're on sparc64, which
 242          * (in)directly implies that we're a v9 or better.
 243          * Improvements to this are greatly accepted...
 244          * Also, we don't differentiate between v7 and v8.  I sense SIGILL
 245          * sniffing in my future.
 246          */
 247         if (getpagesize() == 8192)
 248                 strcpy (buf, "sparcv9");
 249         else
 250                 strcpy (buf, "sparcv8");
 251 #endif
 252
 253         /*
 254          * On some processors, the cmov instructions are even slower than the
 255          * normal ones...
 256          */
 257         if (strstr (buf, "sparcv9")) {
 258                 opts |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
 259                 sparcv9 = TRUE;
 260         }
 261         else
 262                 *exclude_mask |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
 263
 264         return opts;
 265 }
 266
 267 #ifdef __GNUC__
 268 #define flushi(addr)    __asm__ __volatile__ ("iflush %0"::"r"(addr):"memory")
 269 #else /* assume Sun's compiler */
 270 static void flushi(void *addr)
 271 {
 272     asm("flush %i0");
 273 }
 274 #endif
 275
 276 #ifndef __linux__
 277 void sync_instruction_memory(caddr_t addr, int len);
 278 #endif
 279
 280 void
 281 mono_arch_flush_icache (guint8 *code, gint size)
 282 {
 283 #ifndef __linux__
 284         /* Hopefully this is optimized based on the actual CPU */
 285         sync_instruction_memory (code, size);
 286 #else
 287         gulong start = (gulong) code;
 288         gulong end = start + size;
 289         gulong align;
 290
 291         /* Sparcv9 chips only need flushes on 32 byte
 292          * cacheline boundaries.
 293          *
 294          * Sparcv8 needs a flush every 8 bytes.
 295          */
 296         align = (sparcv9 ? 32 : 8);
 297
 298         start &= ~(align - 1);
 299         end = (end + (align - 1)) & ~(align - 1);
 300
 301         while (start < end) {
 302 #ifdef __GNUC__
 303                 __asm__ __volatile__ ("iflush %0"::"r"(start));
 304 #else
 305                 flushi (start);
 306 #endif
 307                 start += align;
 308         }
 309 #endif
 310 }
 311
 312 /*
 313  * mono_sparc_flushw:
 314  *
 315  * Flush all register windows to memory. Every register window is saved to
 316  * a 16 word area on the stack pointed to by its %sp register.
 317  */
 318 void
 319 mono_sparc_flushw (void)
 320 {
 321         static guint32 start [64];
 322         static int inited = 0;
 323         guint32 *code;
 324         static void (*flushw) (void);
 325
 326         if (!inited) {
 327                 code = start;
 328
 329                 sparc_save_imm (code, sparc_sp, -160, sparc_sp);
 330                 sparc_flushw (code);
 331                 sparc_ret (code);
 332                 sparc_restore_simple (code);
 333
 334                 g_assert ((code - start) < 64);
 335
 336                 mono_arch_flush_icache ((guint8*)start, (guint8*)code - (guint8*)start);
 337
 338                 flushw = (gpointer)start;
 339
 340                 inited = 1;
 341         }
 342
 343         flushw ();
 344 }
 345
 346 void
 347 mono_arch_flush_register_windows (void)
 348 {
 349         mono_sparc_flushw ();
 350 }
 351
 352 gboolean
 353 mono_arch_is_inst_imm (gint64 imm)
 354 {
 355         return sparc_is_imm13 (imm);
 356 }
 357
 358 gboolean
 359 mono_sparc_is_v9 (void) {
 360         return sparcv9;
 361 }
 362
 363 gboolean
 364 mono_sparc_is_sparc64 (void) {
 365         return v64;
 366 }
 367
 368 typedef enum {
 369         ArgInIReg,
 370         ArgInIRegPair,
 371         ArgInSplitRegStack,
 372         ArgInFReg,
 373         ArgInFRegPair,
 374         ArgOnStack,
 375         ArgOnStackPair,
 376         ArgInFloatReg,  /* V9 only */
 377         ArgInDoubleReg  /* V9 only */
 378 } ArgStorage;
 379
 380 typedef struct {
 381         gint16 offset;
 382         /* This needs to be offset by %i0 or %o0 depending on caller/callee */
 383         gint8  reg;
 384         ArgStorage storage;
 385         guint32 vt_offset; /* for valuetypes */
 386 } ArgInfo;
 387
 388 typedef struct {
 389         int nargs;
 390         guint32 stack_usage;
 391         guint32 reg_usage;
 392         ArgInfo ret;
 393         ArgInfo sig_cookie;
 394         ArgInfo args [1];
 395 } CallInfo;
 396
 397 #define DEBUG(a)
 398
 399 /* %o0..%o5 */
 400 #define PARAM_REGS 6
 401
 402 static void inline
 403 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean pair)
 404 {
 405         ainfo->offset = *stack_size;
 406
 407         if (!pair) {
 408                 if (*gr >= PARAM_REGS) {
 409                         ainfo->storage = ArgOnStack;
 410                 }
 411                 else {
 412                         ainfo->storage = ArgInIReg;
 413                         ainfo->reg = *gr;
 414                         (*gr) ++;
 415                 }
 416
 417                 /* Allways reserve stack space for parameters passed in registers */
 418                 (*stack_size) += sizeof (gpointer);
 419         }
 420         else {
 421                 if (*gr < PARAM_REGS - 1) {
 422                         /* A pair of registers */
 423                         ainfo->storage = ArgInIRegPair;
 424                         ainfo->reg = *gr;
 425                         (*gr) += 2;
 426                 }
 427                 else if (*gr >= PARAM_REGS) {
 428                         /* A pair of stack locations */
 429                         ainfo->storage = ArgOnStackPair;
 430                 }
 431                 else {
 432                         ainfo->storage = ArgInSplitRegStack;
 433                         ainfo->reg = *gr;
 434                         (*gr) ++;
 435                 }
 436
 437                 (*stack_size) += 2 * sizeof (gpointer);
 438         }
 439 }
 440
 441 #ifdef SPARCV9
 442
 443 #define FLOAT_PARAM_REGS 32
 444
 445 static void inline
 446 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean single)
 447 {
 448         ainfo->offset = *stack_size;
 449
 450         if (single) {
 451                 if (*gr >= FLOAT_PARAM_REGS) {
 452                         ainfo->storage = ArgOnStack;
 453                 }
 454                 else {
 455                         /* A single is passed in an even numbered fp register */
 456                         ainfo->storage = ArgInFloatReg;
 457                         ainfo->reg = *gr + 1;
 458                         (*gr) += 2;
 459                 }
 460         }
 461         else {
 462                 if (*gr < FLOAT_PARAM_REGS) {
 463                         /* A double register */
 464                         ainfo->storage = ArgInDoubleReg;
 465                         ainfo->reg = *gr;
 466                         (*gr) += 2;
 467                 }
 468                 else {
 469                         ainfo->storage = ArgOnStack;
 470                 }
 471         }
 472
 473         (*stack_size) += sizeof (gpointer);
 474 }
 475
 476 #endif
 477
 478 /*
 479  * get_call_info:
 480  *
 481  *  Obtain information about a call according to the calling convention.
 482  * For V8, see the "System V ABI, Sparc Processor Supplement" Sparc V8 version
 483  * document for more information.
 484  * For V9, see the "Low Level System Information (64-bit psABI)" chapter in
 485  * the 'Sparc Compliance Definition 2.4' document.
 486  */
 487 static CallInfo*
 488 get_call_info (MonoCompile *cfg, MonoMethodSignature *sig, gboolean is_pinvoke)
 489 {
 490         guint32 i, gr, fr;
 491         int n = sig->hasthis + sig->param_count;
 492         guint32 stack_size = 0;
 493         CallInfo *cinfo;
 494         MonoType *ret_type;
 495         MonoGenericSharingContext *gsctx = cfg ? cfg->generic_sharing_context : NULL;
 496
 497         cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
 498
 499         gr = 0;
 500         fr = 0;
 501
 502 #ifdef SPARCV9
 503         if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
 504                 /* The address of the return value is passed in %o0 */
 505                 add_general (&gr, &stack_size, &cinfo->ret, FALSE);
 506                 cinfo->ret.reg += sparc_i0;
 507         }
 508 #endif
 509
 510         /* this */
 511         if (sig->hasthis)
 512                 add_general (&gr, &stack_size, cinfo->args + 0, FALSE);
 513
 514         if ((sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
 515                 gr = PARAM_REGS;
 516
 517                 /* Emit the signature cookie just before the implicit arguments */
 518                 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 519         }
 520
 521         for (i = 0; i < sig->param_count; ++i) {
 522                 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
 523                 MonoType *ptype;
 524
 525                 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
 526                         gr = PARAM_REGS;
 527
 528                         /* Emit the signature cookie just before the implicit arguments */
 529                         add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 530                 }
 531
 532                 DEBUG(printf("param %d: ", i));
 533                 if (sig->params [i]->byref) {
 534                         DEBUG(printf("byref\n"));
 535
 536                         add_general (&gr, &stack_size, ainfo, FALSE);
 537                         continue;
 538                 }
 539                 ptype = mono_type_get_underlying_type (sig->params [i]);
 540                 ptype = mini_get_basic_type_from_generic (gsctx, ptype);
 541                 switch (ptype->type) {
 542                 case MONO_TYPE_BOOLEAN:
 543                 case MONO_TYPE_I1:
 544                 case MONO_TYPE_U1:
 545                         add_general (&gr, &stack_size, ainfo, FALSE);
 546                         /* the value is in the ls byte */
 547                         ainfo->offset += sizeof (gpointer) - 1;
 548                         break;
 549                 case MONO_TYPE_I2:
 550                 case MONO_TYPE_U2:
 551                 case MONO_TYPE_CHAR:
 552                         add_general (&gr, &stack_size, ainfo, FALSE);
 553                         /* the value is in the ls word */
 554                         ainfo->offset += sizeof (gpointer) - 2;
 555                         break;
 556                 case MONO_TYPE_I4:
 557                 case MONO_TYPE_U4:
 558                         add_general (&gr, &stack_size, ainfo, FALSE);
 559                         /* the value is in the ls dword */
 560                         ainfo->offset += sizeof (gpointer) - 4;
 561                         break;
 562                 case MONO_TYPE_I:
 563                 case MONO_TYPE_U:
 564                 case MONO_TYPE_PTR:
 565                 case MONO_TYPE_FNPTR:
 566                 case MONO_TYPE_CLASS:
 567                 case MONO_TYPE_OBJECT:
 568                 case MONO_TYPE_STRING:
 569                 case MONO_TYPE_SZARRAY:
 570                 case MONO_TYPE_ARRAY:
 571                         add_general (&gr, &stack_size, ainfo, FALSE);
 572                         break;
 573                 case MONO_TYPE_GENERICINST:
 574                         if (!mono_type_generic_inst_is_valuetype (sig->params [i])) {
 575                                 add_general (&gr, &stack_size, ainfo, FALSE);
 576                                 break;
 577                         }
 578                         /* Fall through */
 579                 case MONO_TYPE_VALUETYPE:
 580 #ifdef SPARCV9
 581                         if (sig->pinvoke)
 582                                 NOT_IMPLEMENTED;
 583 #endif
 584                         add_general (&gr, &stack_size, ainfo, FALSE);
 585                         break;
 586                 case MONO_TYPE_TYPEDBYREF:
 587                         add_general (&gr, &stack_size, ainfo, FALSE);
 588                         break;
 589                 case MONO_TYPE_U8:
 590                 case MONO_TYPE_I8:
 591 #ifdef SPARCV9
 592                         add_general (&gr, &stack_size, ainfo, FALSE);
 593 #else
 594                         add_general (&gr, &stack_size, ainfo, TRUE);
 595 #endif
 596                         break;
 597                 case MONO_TYPE_R4:
 598 #ifdef SPARCV9
 599                         add_float (&fr, &stack_size, ainfo, TRUE);
 600                         gr ++;
 601 #else
 602                         /* single precision values are passed in integer registers */
 603                         add_general (&gr, &stack_size, ainfo, FALSE);
 604 #endif
 605                         break;
 606                 case MONO_TYPE_R8:
 607 #ifdef SPARCV9
 608                         add_float (&fr, &stack_size, ainfo, FALSE);
 609                         gr ++;
 610 #else
 611                         /* double precision values are passed in a pair of registers */
 612                         add_general (&gr, &stack_size, ainfo, TRUE);
 613 #endif
 614                         break;
 615                 default:
 616                         g_assert_not_reached ();
 617                 }
 618         }
 619
 620         if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
 621                 gr = PARAM_REGS;
 622
 623                 /* Emit the signature cookie just before the implicit arguments */
 624                 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
 625         }
 626
 627         /* return value */
 628         ret_type = mono_type_get_underlying_type (sig->ret);
 629         ret_type = mini_get_basic_type_from_generic (gsctx, ret_type);
 630         switch (ret_type->type) {
 631         case MONO_TYPE_BOOLEAN:
 632         case MONO_TYPE_I1:
 633         case MONO_TYPE_U1:
 634         case MONO_TYPE_I2:
 635         case MONO_TYPE_U2:
 636         case MONO_TYPE_CHAR:
 637         case MONO_TYPE_I4:
 638         case MONO_TYPE_U4:
 639         case MONO_TYPE_I:
 640         case MONO_TYPE_U:
 641         case MONO_TYPE_PTR:
 642         case MONO_TYPE_FNPTR:
 643         case MONO_TYPE_CLASS:
 644         case MONO_TYPE_OBJECT:
 645         case MONO_TYPE_SZARRAY:
 646         case MONO_TYPE_ARRAY:
 647         case MONO_TYPE_STRING:
 648                 cinfo->ret.storage = ArgInIReg;
 649                 cinfo->ret.reg = sparc_i0;
 650                 if (gr < 1)
 651                         gr = 1;
 652                 break;
 653         case MONO_TYPE_U8:
 654         case MONO_TYPE_I8:
 655 #ifdef SPARCV9
 656                 cinfo->ret.storage = ArgInIReg;
 657                 cinfo->ret.reg = sparc_i0;
 658                 if (gr < 1)
 659                         gr = 1;
 660 #else
 661                 cinfo->ret.storage = ArgInIRegPair;
 662                 cinfo->ret.reg = sparc_i0;
 663                 if (gr < 2)
 664                         gr = 2;
 665 #endif
 666                 break;
 667         case MONO_TYPE_R4:
 668         case MONO_TYPE_R8:
 669                 cinfo->ret.storage = ArgInFReg;
 670                 cinfo->ret.reg = sparc_f0;
 671                 break;
 672         case MONO_TYPE_GENERICINST:
 673                 if (!mono_type_generic_inst_is_valuetype (sig->ret)) {
 674                         cinfo->ret.storage = ArgInIReg;
 675                         cinfo->ret.reg = sparc_i0;
 676                         if (gr < 1)
 677                                 gr = 1;
 678                         break;
 679                 }
 680                 /* Fall through */
 681         case MONO_TYPE_VALUETYPE:
 682                 if (v64) {
 683                         if (sig->pinvoke)
 684                                 NOT_IMPLEMENTED;
 685                         else
 686                                 /* Already done */
 687                                 ;
 688                 }
 689                 else
 690                         cinfo->ret.storage = ArgOnStack;
 691                 break;
 692         case MONO_TYPE_TYPEDBYREF:
 693                 if (v64) {
 694                         if (sig->pinvoke)
 695                                 /* Same as a valuetype with size 24 */
 696                                 NOT_IMPLEMENTED;
 697                         else
 698                                 /* Already done */
 699                                 ;
 700                 }
 701                 else
 702                         cinfo->ret.storage = ArgOnStack;
 703                 break;
 704         case MONO_TYPE_VOID:
 705                 break;
 706         default:
 707                 g_error ("Can't handle as return value 0x%x", sig->ret->type);
 708         }
 709
 710         cinfo->stack_usage = stack_size;
 711         cinfo->reg_usage = gr;
 712         return cinfo;
 713 }
 714
 715 GList *
 716 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
 717 {
 718         GList *vars = NULL;
 719         int i;
 720
 721         /*
 722          * FIXME: If an argument is allocated to a register, then load it from the
 723          * stack in the prolog.
 724          */
 725
 726         for (i = 0; i < cfg->num_varinfo; i++) {
 727                 MonoInst *ins = cfg->varinfo [i];
 728                 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
 729
 730                 /* unused vars */
 731                 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
 732                         continue;
 733
 734                 /* FIXME: Make arguments on stack allocateable to registers */
 735                 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode == OP_REGVAR) || (ins->opcode == OP_ARG))
 736                         continue;
 737
 738                 if (mono_is_regsize_var (ins->inst_vtype)) {
 739                         g_assert (MONO_VARINFO (cfg, i)->reg == -1);
 740                         g_assert (i == vmv->idx);
 741
 742                         vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
 743                 }
 744         }
 745
 746         return vars;
 747 }
 748
 749 GList *
 750 mono_arch_get_global_int_regs (MonoCompile *cfg)
 751 {
 752         GList *regs = NULL;
 753         int i;
 754         MonoMethodSignature *sig;
 755         CallInfo *cinfo;
 756
 757         sig = mono_method_signature (cfg->method);
 758
 759         cinfo = get_call_info (cfg, sig, FALSE);
 760
 761         /* Use unused input registers */
 762         for (i = cinfo->reg_usage; i < 6; ++i)
 763                 regs = g_list_prepend (regs, GUINT_TO_POINTER (sparc_i0 + i));
 764
 765         /* Use %l0..%l6 as global registers */
 766         for (i = sparc_l0; i < sparc_l7; ++i)
 767                 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
 768
 769         g_free (cinfo);
 770
 771         return regs;
 772 }
 773
 774 /*
 775  * mono_arch_regalloc_cost:
 776  *
 777  *  Return the cost, in number of memory references, of the action of
 778  * allocating the variable VMV into a register during global register
 779  * allocation.
 780  */
 781 guint32
 782 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
 783 {
 784         return 0;
 785 }
 786
 787 /*
 788  * Set var information according to the calling convention. sparc version.
 789  * The locals var stuff should most likely be split in another method.
 790  */
 791 void
 792 mono_arch_allocate_vars (MonoCompile *cfg)
 793 {
 794         MonoMethodSignature *sig;
 795         MonoMethodHeader *header;
 796         MonoInst *inst;
 797         int i, offset, size, align, curinst;
 798         CallInfo *cinfo;
 799
 800         header = mono_method_get_header (cfg->method);
 801
 802         sig = mono_method_signature (cfg->method);
 803
 804         cinfo = get_call_info (cfg, sig, FALSE);
 805
 806         if (sig->ret->type != MONO_TYPE_VOID) {
 807                 switch (cinfo->ret.storage) {
 808                 case ArgInIReg:
 809                 case ArgInFReg:
 810                 case ArgInIRegPair:
 811                         cfg->ret->opcode = OP_REGVAR;
 812                         cfg->ret->inst_c0 = cinfo->ret.reg;
 813                         break;
 814                 case ArgOnStack:
 815 #ifdef SPARCV9
 816                         g_assert_not_reached ();
 817 #else
 818                         /* valuetypes */
 819                         cfg->vret_addr->opcode = OP_REGOFFSET;
 820                         cfg->vret_addr->inst_basereg = sparc_fp;
 821                         cfg->vret_addr->inst_offset = 64;
 822 #endif
 823                         break;
 824                 default:
 825                         NOT_IMPLEMENTED;
 826                 }
 827                 cfg->ret->dreg = cfg->ret->inst_c0;
 828         }
 829
 830         /*
 831          * We use the ABI calling conventions for managed code as well.
 832          * Exception: valuetypes are never returned in registers on V9.
 833          * FIXME: Use something more optimized.
 834          */
 835
 836         /* Locals are allocated backwards from %fp */
 837         cfg->frame_reg = sparc_fp;
 838         offset = 0;
 839
 840         /*
 841          * Reserve a stack slot for holding information used during exception
 842          * handling.
 843          */
 844         if (header->num_clauses)
 845                 offset += sizeof (gpointer) * 2;
 846
 847         if (cfg->method->save_lmf) {
 848                 offset += sizeof (MonoLMF);
 849                 cfg->arch.lmf_offset = offset;
 850         }
 851
 852         curinst = cfg->locals_start;
 853         for (i = curinst; i < cfg->num_varinfo; ++i) {
 854                 inst = cfg->varinfo [i];
 855
 856                 if ((inst->opcode == OP_REGVAR) || (inst->opcode == OP_REGOFFSET)) {
 857                         //g_print ("allocating local %d to %s\n", i, mono_arch_regname (inst->dreg));
 858                         continue;
 859                 }
 860
 861                 if (inst->flags & MONO_INST_IS_DEAD)
 862                         continue;
 863
 864                 /* inst->backend.is_pinvoke indicates native sized value types, this is used by the
 865                 * pinvoke wrappers when they call functions returning structure */
 866                 if (inst->backend.is_pinvoke && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
 867                         size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
 868                 else
 869                         size = mini_type_stack_size (cfg->generic_sharing_context, inst->inst_vtype, &align);
 870
 871                 /*
 872                  * This is needed since structures containing doubles must be doubleword
 873          * aligned.
 874                  * FIXME: Do this only if needed.
 875                  */
 876                 if (MONO_TYPE_ISSTRUCT (inst->inst_vtype))
 877                         align = 8;
 878
 879                 /*
 880                  * variables are accessed as negative offsets from %fp, so increase
 881                  * the offset before assigning it to a variable
 882                  */
 883                 offset += size;
 884
 885                 offset += align - 1;
 886                 offset &= ~(align - 1);
 887                 inst->opcode = OP_REGOFFSET;
 888                 inst->inst_basereg = sparc_fp;
 889                 inst->inst_offset = STACK_BIAS + -offset;
 890
 891                 //g_print ("allocating local %d to [%s - %d]\n", i, mono_arch_regname (inst->inst_basereg), - inst->inst_offset);
 892         }
 893
 894         if (sig->call_convention == MONO_CALL_VARARG) {
 895                 cfg->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
 896         }
 897
 898         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
 899                 inst = cfg->args [i];
 900                 if (inst->opcode != OP_REGVAR) {
 901                         ArgInfo *ainfo = &cinfo->args [i];
 902                         gboolean inreg = TRUE;
 903                         MonoType *arg_type;
 904                         ArgStorage storage;
 905
 906                         if (sig->hasthis && (i == 0))
 907                                 arg_type = &mono_defaults.object_class->byval_arg;
 908                         else
 909                                 arg_type = sig->params [i - sig->hasthis];
 910
 911 #ifndef SPARCV9
 912                         if (!arg_type->byref && ((arg_type->type == MONO_TYPE_R4)
 913                                                                          || (arg_type->type == MONO_TYPE_R8)))
 914                                 /*
 915                                  * Since float arguments are passed in integer registers, we need to
 916                                  * save them to the stack in the prolog.
 917                                  */
 918                                 inreg = FALSE;
 919 #endif
 920
 921                         /* FIXME: Allocate volatile arguments to registers */
 922                         if (inst->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT))
 923                                 inreg = FALSE;
 924
 925                         if (MONO_TYPE_ISSTRUCT (arg_type))
 926                                 /* FIXME: this isn't needed */
 927                                 inreg = FALSE;
 928
 929                         inst->opcode = OP_REGOFFSET;
 930
 931                         if (!inreg)
 932                                 storage = ArgOnStack;
 933                         else
 934                                 storage = ainfo->storage;
 935
 936                         switch (storage) {
 937                         case ArgInIReg:
 938                         case ArgInIRegPair:
 939                                 inst->opcode = OP_REGVAR;
 940                                 inst->dreg = sparc_i0 + ainfo->reg;
 941                                 break;
 942                         case ArgInFloatReg:
 943                         case ArgInDoubleReg:
 944                                 /*
 945                                  * Since float regs are volatile, we save the arguments to
 946                                  * the stack in the prolog.
 947                                  * FIXME: Avoid this if the method contains no calls.
 948                                  */
 949                         case ArgOnStack:
 950                         case ArgOnStackPair:
 951                         case ArgInSplitRegStack:
 952                                 /* Split arguments are saved to the stack in the prolog */
 953                                 inst->opcode = OP_REGOFFSET;
 954                                 /* in parent frame */
 955                                 inst->inst_basereg = sparc_fp;
 956                                 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
 957
 958                                 if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
 959                                         /*
 960                                          * It is very hard to load doubles from non-doubleword aligned
 961                                          * memory locations. So if the offset is misaligned, we copy the
 962                                          * argument to a stack location in the prolog.
 963                                          */
 964                                         if ((inst->inst_offset - STACK_BIAS) % 8) {
 965                                                 inst->inst_basereg = sparc_fp;
 966                                                 offset += 8;
 967                                                 align = 8;
 968                                                 offset += align - 1;
 969                                                 offset &= ~(align - 1);
 970                                                 inst->inst_offset = STACK_BIAS + -offset;
 971
 972                                         }
 973                                 }
 974                                 break;
 975                         default:
 976                                 NOT_IMPLEMENTED;
 977                         }
 978
 979                         if (MONO_TYPE_ISSTRUCT (arg_type)) {
 980                                 /* Add a level of indirection */
 981                                 /*
 982                                  * It would be easier to add OP_LDIND_I here, but ldind_i instructions
 983                                  * are destructively modified in a lot of places in inssel.brg.
 984                                  */
 985                                 MonoInst *indir;
 986                                 MONO_INST_NEW (cfg, indir, 0);
 987                                 *indir = *inst;
 988                                 inst->opcode = OP_VTARG_ADDR;
 989                                 inst->inst_left = indir;
 990                         }
 991                 }
 992         }
 993
 994         /* Add a properly aligned dword for use by int<->float conversion opcodes */
 995         offset += 8;
 996         offset = ALIGN_TO (offset, 8);
 997         cfg->arch.float_spill_slot_offset = offset;
 998
 999         /*
1000          * spillvars are stored between the normal locals and the storage reserved
1001          * by the ABI.
1002          */
1003
1004         cfg->stack_offset = offset;
1005
1006         g_free (cinfo);
1007 }
1008
1009 void
1010 mono_arch_create_vars (MonoCompile *cfg)
1011 {
1012         MonoMethodSignature *sig;
1013
1014         sig = mono_method_signature (cfg->method);
1015
1016         if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
1017                 cfg->vret_addr = mono_compile_create_var (cfg, &mono_defaults.int_class->byval_arg, OP_ARG);
1018                 if (G_UNLIKELY (cfg->verbose_level > 1)) {
1019                         printf ("vret_addr = ");
1020                         mono_print_ins (cfg->vret_addr);
1021                 }
1022         }
1023 }
1024
1025 static MonoInst *
1026 make_group (MonoCompile *cfg, MonoInst *left, int basereg, int offset)
1027 {
1028         MonoInst *group;
1029
1030         MONO_INST_NEW (cfg, group, OP_GROUP);
1031         group->inst_left = left;
1032         group->inst_basereg = basereg;
1033         group->inst_imm = offset;
1034
1035         return group;
1036 }
1037
1038 static void
1039 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo)
1040 {
1041         MonoInst *arg;
1042         MonoMethodSignature *tmp_sig;
1043         MonoInst *sig_arg;
1044
1045         /*
1046          * mono_ArgIterator_Setup assumes the signature cookie is
1047          * passed first and all the arguments which were before it are
1048          * passed on the stack after the signature. So compensate by
1049          * passing a different signature.
1050          */
1051         tmp_sig = mono_metadata_signature_dup (call->signature);
1052         tmp_sig->param_count -= call->signature->sentinelpos;
1053         tmp_sig->sentinelpos = 0;
1054         memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1055
1056         /* FIXME: Add support for signature tokens to AOT */
1057         cfg->disable_aot = TRUE;
1058         /* We allways pass the signature on the stack for simplicity */
1059         MONO_INST_NEW (cfg, arg, OP_SPARC_OUTARG_MEM);
1060         arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + cinfo->sig_cookie.offset);
1061         MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
1062         sig_arg->inst_p0 = tmp_sig;
1063         arg->inst_left = sig_arg;
1064         arg->type = STACK_PTR;
1065         MONO_INST_LIST_ADD_TAIL (&arg->node, &call->out_args);
1066 }
1067
1068 /*
1069  * take the arguments and generate the arch-specific
1070  * instructions to properly call the function in call.
1071  * This includes pushing, moving arguments to the right register
1072  * etc.
1073  */
1074 MonoCallInst*
1075 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
1076         MonoInst *arg, *in;
1077         MonoMethodSignature *sig;
1078         int i, n;
1079         CallInfo *cinfo;
1080         ArgInfo *ainfo;
1081         guint32 extra_space = 0;
1082
1083         sig = call->signature;
1084         n = sig->param_count + sig->hasthis;
1085
1086         cinfo = get_call_info (cfg, sig, sig->pinvoke);
1087
1088         for (i = 0; i < n; ++i) {
1089                 ainfo = cinfo->args + i;
1090
1091                 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
1092                         /* Emit the signature cookie just before the first implicit argument */
1093                         emit_sig_cookie (cfg, call, cinfo);
1094                 }
1095
1096                 if (is_virtual && i == 0) {
1097                         /* the argument will be attached to the call instruction */
1098                         in = call->args [i];
1099                 } else {
1100                         MONO_INST_NEW (cfg, arg, OP_OUTARG);
1101                         in = call->args [i];
1102                         arg->cil_code = in->cil_code;
1103                         arg->inst_left = in;
1104                         arg->type = in->type;
1105                         MONO_INST_LIST_ADD_TAIL (&arg->node, &call->out_args);
1106
1107                         if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(sig->params [i - sig->hasthis]))) {
1108                                 MonoInst *inst;
1109                                 gint align;
1110                                 guint32 offset, pad;
1111                                 guint32 size;
1112
1113 #ifdef SPARCV9
1114                                 if (sig->pinvoke)
1115                                         NOT_IMPLEMENTED;
1116 #endif
1117
1118                                 if (sig->params [i - sig->hasthis]->type == MONO_TYPE_TYPEDBYREF) {
1119                                         size = sizeof (MonoTypedRef);
1120                                         align = sizeof (gpointer);
1121                                 }
1122                                 else
1123                                 if (sig->pinvoke)
1124                                         size = mono_type_native_stack_size (&in->klass->byval_arg, &align);
1125                                 else {
1126                                         /*
1127                                          * Can't use mini_type_stack_size (), but that
1128                                          * aligns the size to sizeof (gpointer), which is larger
1129                                          * than the size of the source, leading to reads of invalid
1130                                          * memory if the source is at the end of address space or
1131                                          * misaligned reads.
1132                                          */
1133                                         size = mono_class_value_size (in->klass, &align);
1134                                 }
1135
1136                                 /*
1137                                  * We use OP_OUTARG_VT to copy the valuetype to a stack location, then
1138                                  * use the normal OUTARG opcodes to pass the address of the location to
1139                                  * the callee.
1140                                  */
1141                                 MONO_INST_NEW (cfg, inst, OP_OUTARG_VT);
1142                                 inst->inst_left = in;
1143
1144                                 /* The first 6 argument locations are reserved */
1145                                 if (cinfo->stack_usage < 6 * sizeof (gpointer))
1146                                         cinfo->stack_usage = 6 * sizeof (gpointer);
1147
1148                                 offset = ALIGN_TO ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage, align);
1149                                 pad = offset - ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage);
1150
1151                                 inst->inst_c1 = STACK_BIAS + offset;
1152                                 inst->backend.size = size;
1153                                 arg->inst_left = inst;
1154
1155                                 cinfo->stack_usage += size;
1156                                 cinfo->stack_usage += pad;
1157                         }
1158
1159                         arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + ainfo->offset);
1160
1161                         switch (ainfo->storage) {
1162                         case ArgInIReg:
1163                         case ArgInFReg:
1164                         case ArgInIRegPair:
1165                                 if (ainfo->storage == ArgInIRegPair)
1166                                         arg->opcode = OP_SPARC_OUTARG_REGPAIR;
1167                                 arg->backend.reg3 = sparc_o0 + ainfo->reg;
1168                                 call->used_iregs |= 1 << ainfo->reg;
1169
1170                                 if ((i >= sig->hasthis) && !sig->params [i - sig->hasthis]->byref && ((sig->params [i - sig->hasthis]->type == MONO_TYPE_R8) || (sig->params [i - sig->hasthis]->type == MONO_TYPE_R4))) {
1171                                         /* An fp value is passed in an ireg */
1172
1173                                         if (arg->opcode == OP_SPARC_OUTARG_REGPAIR)
1174                                                 arg->opcode = OP_SPARC_OUTARG_REGPAIR_FLOAT;
1175                                         else
1176                                                 arg->opcode = OP_SPARC_OUTARG_FLOAT;
1177
1178                                         /*
1179                                          * The OUTARG (freg) implementation needs an extra dword to store
1180                                          * the temporary value.
1181                                          */
1182                                         extra_space += 8;
1183                                 }
1184                                 break;
1185                         case ArgOnStack:
1186                                 arg->opcode = OP_SPARC_OUTARG_MEM;
1187                                 break;
1188                         case ArgOnStackPair:
1189                                 arg->opcode = OP_SPARC_OUTARG_MEMPAIR;
1190                                 break;
1191                         case ArgInSplitRegStack:
1192                                 arg->opcode = OP_SPARC_OUTARG_SPLIT_REG_STACK;
1193                                 arg->backend.reg3 = sparc_o0 + ainfo->reg;
1194                                 call->used_iregs |= 1 << ainfo->reg;
1195                                 break;
1196                         case ArgInFloatReg:
1197                                 arg->opcode = OP_SPARC_OUTARG_FLOAT_REG;
1198                                 arg->backend.reg3 = sparc_f0 + ainfo->reg;
1199                                 break;
1200                         case ArgInDoubleReg:
1201                                 arg->opcode = OP_SPARC_OUTARG_DOUBLE_REG;
1202                                 arg->backend.reg3 = sparc_f0 + ainfo->reg;
1203                                 break;
1204                         default:
1205                                 NOT_IMPLEMENTED;
1206                         }
1207                 }
1208         }
1209
1210         /* Handle the case where there are no implicit arguments */
1211         if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sig->sentinelpos)) {
1212                 emit_sig_cookie (cfg, call, cinfo);
1213         }
1214
1215         call->stack_usage = cinfo->stack_usage + extra_space;
1216         call->out_ireg_args = NULL;
1217         call->out_freg_args = NULL;
1218         cfg->param_area = MAX (cfg->param_area, call->stack_usage);
1219         cfg->flags |= MONO_CFG_HAS_CALLS;
1220
1221         g_free (cinfo);
1222         return call;
1223 }
1224
1225 int cond_to_sparc_cond [][3] = {
1226         {sparc_be,   sparc_be,   sparc_fbe},
1227         {sparc_bne,  sparc_bne,  0},
1228         {sparc_ble,  sparc_ble,  sparc_fble},
1229         {sparc_bge,  sparc_bge,  sparc_fbge},
1230         {sparc_bl,   sparc_bl,   sparc_fbl},
1231         {sparc_bg,   sparc_bg,   sparc_fbg},
1232         {sparc_bleu, sparc_bleu, 0},
1233         {sparc_beu,  sparc_beu,  0},
1234         {sparc_blu,  sparc_blu,  sparc_fbl},
1235         {sparc_bgu,  sparc_bgu,  sparc_fbg}
1236 };
1237
1238 /* Map opcode to the sparc condition codes */
1239 static inline SparcCond
1240 opcode_to_sparc_cond (int opcode)
1241 {
1242         CompRelation rel;
1243         CompType t;
1244
1245         switch (opcode) {
1246         case OP_COND_EXC_OV:
1247         case OP_COND_EXC_IOV:
1248                 return sparc_bvs;
1249         case OP_COND_EXC_C:
1250         case OP_COND_EXC_IC:
1251                 return sparc_bcs;
1252         case OP_COND_EXC_NO:
1253         case OP_COND_EXC_NC:
1254                 NOT_IMPLEMENTED;
1255         default:
1256                 rel = mono_opcode_to_cond (opcode);
1257                 t = mono_opcode_to_type (opcode, -1);
1258
1259                 return cond_to_sparc_cond [rel][t];
1260                 break;
1261         }
1262
1263         return -1;
1264 }
1265
1266 #define COMPUTE_DISP(ins) \
1267 if (ins->flags & MONO_INST_BRLABEL) { \
1268         if (ins->inst_i0->inst_c0) \
1269            disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2; \
1270         else { \
1271             disp = 0; \
1272                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
1273         } \
1274 } else { \
1275         if (ins->inst_true_bb->native_offset) \
1276            disp = (ins->inst_true_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2; \
1277         else { \
1278             disp = 0; \
1279                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1280         } \
1281 }
1282
1283 #ifdef SPARCV9
1284 #define DEFAULT_ICC sparc_xcc_short
1285 #else
1286 #define DEFAULT_ICC sparc_icc_short
1287 #endif
1288
1289 #ifdef SPARCV9
1290 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) \
1291     do { \
1292         gint32 disp; \
1293         guint32 predict; \
1294         COMPUTE_DISP(ins); \
1295         predict = (disp != 0) ? 1 : 0; \
1296         g_assert (sparc_is_imm19 (disp)); \
1297         sparc_branchp (code, (annul), cond, icc, (predict), disp); \
1298         if (filldelay) sparc_nop (code); \
1299     } while (0)
1300 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_ICC ((ins), (cond), (annul), (filldelay), (sparc_xcc_short))
1301 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) \
1302     do { \
1303         gint32 disp; \
1304         guint32 predict; \
1305         COMPUTE_DISP(ins); \
1306         predict = (disp != 0) ? 1 : 0; \
1307         g_assert (sparc_is_imm19 (disp)); \
1308         sparc_fbranch (code, (annul), cond, disp); \
1309         if (filldelay) sparc_nop (code); \
1310     } while (0)
1311 #else
1312 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) g_assert_not_reached ()
1313 #define EMIT_COND_BRANCH_GENERAL(ins,bop,cond,annul,filldelay) \
1314     do { \
1315         gint32 disp; \
1316         COMPUTE_DISP(ins); \
1317         g_assert (sparc_is_imm22 (disp)); \
1318         sparc_ ## bop (code, (annul), cond, disp); \
1319         if (filldelay) sparc_nop (code); \
1320     } while (0)
1321 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),branch,(cond),annul,filldelay)
1322 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),fbranch,(cond),annul,filldelay)
1323 #endif
1324
1325 #define EMIT_COND_BRANCH_PREDICTED(ins,cond,annul,filldelay) \
1326     do { \
1327             gint32 disp; \
1328         guint32 predict; \
1329         COMPUTE_DISP(ins); \
1330         predict = (disp != 0) ? 1 : 0; \
1331         g_assert (sparc_is_imm19 (disp)); \
1332                 sparc_branchp (code, (annul), (cond), DEFAULT_ICC, (predict), disp); \
1333         if (filldelay) sparc_nop (code); \
1334     } while (0)
1335
1336 #define EMIT_COND_BRANCH_BPR(ins,bop,predict,annul,filldelay) \
1337     do { \
1338             gint32 disp; \
1339         COMPUTE_DISP(ins); \
1340                 g_assert (sparc_is_imm22 (disp)); \
1341                 sparc_ ## bop (code, (annul), (predict), ins->sreg1, disp); \
1342         if (filldelay) sparc_nop (code); \
1343     } while (0)
1344
1345 /* emit an exception if condition is fail */
1346 /*
1347  * We put the exception throwing code out-of-line, at the end of the method
1348  */
1349 #define EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,filldelay,icc) do {     \
1350                 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,   \
1351                                     MONO_PATCH_INFO_EXC, sexc_name);  \
1352         if (sparcv9 && ((icc) != sparc_icc_short)) {          \
1353            sparc_branchp (code, 0, (cond), (icc), 0, 0); \
1354         } \
1355         else { \
1356                         sparc_branch (code, 0, cond, 0);     \
1357         } \
1358         if (filldelay) sparc_nop (code);     \
1359         } while (0);
1360
1361 #define EMIT_COND_SYSTEM_EXCEPTION(ins,cond,sexc_name) EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,TRUE,DEFAULT_ICC)
1362
1363 #define EMIT_COND_SYSTEM_EXCEPTION_BPR(ins,bop,sexc_name) do { \
1364                 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,   \
1365                                     MONO_PATCH_INFO_EXC, sexc_name);  \
1366                 sparc_ ## bop (code, FALSE, FALSE, ins->sreg1, 0); \
1367         sparc_nop (code);    \
1368 } while (0);
1369
1370 #define EMIT_ALU_IMM(ins,op,setcc) do { \
1371                         if (sparc_is_imm13 ((ins)->inst_imm)) \
1372                                 sparc_ ## op ## _imm (code, (setcc), (ins)->sreg1, ins->inst_imm, (ins)->dreg); \
1373                         else { \
1374                                 sparc_set (code, ins->inst_imm, sparc_o7); \
1375                                 sparc_ ## op (code, (setcc), (ins)->sreg1, sparc_o7, (ins)->dreg); \
1376                         } \
1377 } while (0);
1378
1379 #define EMIT_LOAD_MEMBASE(ins,op) do { \
1380                         if (sparc_is_imm13 (ins->inst_offset)) \
1381                                 sparc_ ## op ## _imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg); \
1382                         else { \
1383                                 sparc_set (code, ins->inst_offset, sparc_o7); \
1384                                 sparc_ ## op (code, ins->inst_basereg, sparc_o7, ins->dreg); \
1385                         } \
1386 } while (0);
1387
1388 /* max len = 5 */
1389 #define EMIT_STORE_MEMBASE_IMM(ins,op) do { \
1390                         guint32 sreg; \
1391                         if (ins->inst_imm == 0) \
1392                                 sreg = sparc_g0; \
1393                         else { \
1394                                 sparc_set (code, ins->inst_imm, sparc_o7); \
1395                                 sreg = sparc_o7; \
1396                         } \
1397                         if (!sparc_is_imm13 (ins->inst_offset)) { \
1398                                 sparc_set (code, ins->inst_offset, GP_SCRATCH_REG); \
1399                                 sparc_ ## op (code, sreg, ins->inst_destbasereg, GP_SCRATCH_REG); \
1400                         } \
1401                         else \
1402                                 sparc_ ## op ## _imm (code, sreg, ins->inst_destbasereg, ins->inst_offset); \
1403                                                                                                                                                                                  } while (0);
1404
1405 #define EMIT_STORE_MEMBASE_REG(ins,op) do { \
1406                         if (!sparc_is_imm13 (ins->inst_offset)) { \
1407                                 sparc_set (code, ins->inst_offset, sparc_o7); \
1408                                 sparc_ ## op (code, ins->sreg1, ins->inst_destbasereg, sparc_o7); \
1409                         } \
1410                                   else \
1411                                 sparc_ ## op ## _imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset); \
1412                                                                                                                                                                                  } while (0);
1413
1414 #define EMIT_CALL() do { \
1415     if (v64) { \
1416         sparc_set_template (code, sparc_o7); \
1417         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7); \
1418     } \
1419     else { \
1420         sparc_call_simple (code, 0); \
1421     } \
1422     sparc_nop (code); \
1423 } while (0);
1424
1425 /*
1426  * A call template is 7 instructions long, so we want to avoid it if possible.
1427  */
1428 static guint32*
1429 emit_call (MonoCompile *cfg, guint32 *code, guint32 patch_type, gconstpointer data)
1430 {
1431         gpointer target;
1432
1433         /* FIXME: This only works if the target method is already compiled */
1434         if (0 && v64 && !cfg->compile_aot) {
1435                 MonoJumpInfo patch_info;
1436
1437                 patch_info.type = patch_type;
1438                 patch_info.data.target = data;
1439
1440                 target = mono_resolve_patch_target (cfg->method, cfg->domain, NULL, &patch_info, FALSE);
1441
1442                 /* FIXME: Add optimizations if the target is close enough */
1443                 sparc_set (code, target, sparc_o7);
1444                 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7);
1445                 sparc_nop (code);
1446         }
1447         else {
1448                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, patch_type, data);
1449                 EMIT_CALL ();
1450         }
1451
1452         return code;
1453 }
1454
1455 void
1456 mono_arch_peephole_pass_1 (MonoCompile *cfg, MonoBasicBlock *bb)
1457 {
1458 }
1459
1460 void
1461 mono_arch_peephole_pass_2 (MonoCompile *cfg, MonoBasicBlock *bb)
1462 {
1463         MonoInst *ins, *n;
1464
1465         MONO_INST_LIST_FOR_EACH_ENTRY_SAFE (ins, n, &bb->ins_list, node) {
1466                 MonoInst *last_ins = mono_inst_list_prev (&ins->node, &bb->ins_list);
1467
1468                 switch (ins->opcode) {
1469                 case OP_MUL_IMM:
1470                         /* remove unnecessary multiplication with 1 */
1471                         if (ins->inst_imm == 1) {
1472                                 if (ins->dreg != ins->sreg1) {
1473                                         ins->opcode = OP_MOVE;
1474                                 } else {
1475                                         MONO_DEL_INS (ins);
1476                                         continue;
1477                                 }
1478                         }
1479                         break;
1480 #ifndef SPARCV9
1481                 case OP_LOAD_MEMBASE:
1482                 case OP_LOADI4_MEMBASE:
1483                         /*
1484                          * OP_STORE_MEMBASE_REG reg, offset(basereg)
1485                          * OP_LOAD_MEMBASE offset(basereg), reg
1486                          */
1487                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
1488                                          || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1489                             ins->inst_basereg == last_ins->inst_destbasereg &&
1490                             ins->inst_offset == last_ins->inst_offset) {
1491                                 if (ins->dreg == last_ins->sreg1) {
1492                                         MONO_DEL_INS (ins);
1493                                         continue;
1494                                 } else {
1495                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1496                                         ins->opcode = OP_MOVE;
1497                                         ins->sreg1 = last_ins->sreg1;
1498                                 }
1499
1500                         /*
1501                          * Note: reg1 must be different from the basereg in the second load
1502                          * OP_LOAD_MEMBASE offset(basereg), reg1
1503                          * OP_LOAD_MEMBASE offset(basereg), reg2
1504                          * -->
1505                          * OP_LOAD_MEMBASE offset(basereg), reg1
1506                          * OP_MOVE reg1, reg2
1507                          */
1508                         } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1509                                            || last_ins->opcode == OP_LOAD_MEMBASE) &&
1510                               ins->inst_basereg != last_ins->dreg &&
1511                               ins->inst_basereg == last_ins->inst_basereg &&
1512                               ins->inst_offset == last_ins->inst_offset) {
1513
1514                                 if (ins->dreg == last_ins->dreg) {
1515                                         MONO_DEL_INS (ins);
1516                                         continue;
1517                                 } else {
1518                                         ins->opcode = OP_MOVE;
1519                                         ins->sreg1 = last_ins->dreg;
1520                                 }
1521
1522                                 //g_assert_not_reached ();
1523
1524 #if 0
1525                         /*
1526                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1527                          * OP_LOAD_MEMBASE offset(basereg), reg
1528                          * -->
1529                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1530                          * OP_ICONST reg, imm
1531                          */
1532                         } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1533                                                 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1534                                    ins->inst_basereg == last_ins->inst_destbasereg &&
1535                                    ins->inst_offset == last_ins->inst_offset) {
1536                                 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1537                                 ins->opcode = OP_ICONST;
1538                                 ins->inst_c0 = last_ins->inst_imm;
1539                                 g_assert_not_reached (); // check this rule
1540 #endif
1541                         }
1542                         break;
1543 #endif
1544                 case OP_LOADI1_MEMBASE:
1545                         if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1546                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1547                                         ins->inst_offset == last_ins->inst_offset) {
1548                                 if (ins->dreg == last_ins->sreg1) {
1549                                         MONO_DEL_INS (ins);
1550                                         continue;
1551                                 } else {
1552                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1553                                         ins->opcode = OP_MOVE;
1554                                         ins->sreg1 = last_ins->sreg1;
1555                                 }
1556                         }
1557                         break;
1558                 case OP_LOADI2_MEMBASE:
1559                         if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1560                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1561                                         ins->inst_offset == last_ins->inst_offset) {
1562                                 if (ins->dreg == last_ins->sreg1) {
1563                                         MONO_DEL_INS (ins);
1564                                         continue;
1565                                 } else {
1566                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1567                                         ins->opcode = OP_MOVE;
1568                                         ins->sreg1 = last_ins->sreg1;
1569                                 }
1570                         }
1571                         break;
1572                 case OP_STOREI4_MEMBASE_IMM:
1573                         /* Convert pairs of 0 stores to a dword 0 store */
1574                         /* Used when initializing temporaries */
1575                         /* We know sparc_fp is dword aligned */
1576                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM) &&
1577                                 (ins->inst_destbasereg == last_ins->inst_destbasereg) &&
1578                                 (ins->inst_destbasereg == sparc_fp) &&
1579                                 (ins->inst_offset < 0) &&
1580                                 ((ins->inst_offset % 8) == 0) &&
1581                                 ((ins->inst_offset == last_ins->inst_offset - 4)) &&
1582                                 (ins->inst_imm == 0) &&
1583                                 (last_ins->inst_imm == 0)) {
1584                                 if (sparcv9) {
1585                                         last_ins->opcode = OP_STOREI8_MEMBASE_IMM;
1586                                         last_ins->inst_offset = ins->inst_offset;
1587                                         MONO_DEL_INS (ins);
1588                                         continue;
1589                                 }
1590                         }
1591                         break;
1592                 case OP_IBEQ:
1593                 case OP_IBNE_UN:
1594                 case OP_IBLT:
1595                 case OP_IBGT:
1596                 case OP_IBGE:
1597                 case OP_IBLE:
1598                 case OP_COND_EXC_EQ:
1599                 case OP_COND_EXC_GE:
1600                 case OP_COND_EXC_GT:
1601                 case OP_COND_EXC_LE:
1602                 case OP_COND_EXC_LT:
1603                 case OP_COND_EXC_NE_UN:
1604                         /*
1605                          * Convert compare with zero+branch to BRcc
1606                          */
1607                         /*
1608                          * This only works in 64 bit mode, since it examines all 64
1609                          * bits of the register.
1610                          * Only do this if the method is small since BPr only has a 16bit
1611                          * displacement.
1612                          */
1613                         if (v64 && (mono_method_get_header (cfg->method)->code_size < 10000) && last_ins &&
1614                                 (last_ins->opcode == OP_COMPARE_IMM) &&
1615                                 (last_ins->inst_imm == 0)) {
1616                                 switch (ins->opcode) {
1617                                 case OP_IBEQ:
1618                                         ins->opcode = OP_SPARC_BRZ;
1619                                         break;
1620                                 case OP_IBNE_UN:
1621                                         ins->opcode = OP_SPARC_BRNZ;
1622                                         break;
1623                                 case OP_IBLT:
1624                                         ins->opcode = OP_SPARC_BRLZ;
1625                                         break;
1626                                 case OP_IBGT:
1627                                         ins->opcode = OP_SPARC_BRGZ;
1628                                         break;
1629                                 case OP_IBGE:
1630                                         ins->opcode = OP_SPARC_BRGEZ;
1631                                         break;
1632                                 case OP_IBLE:
1633                                         ins->opcode = OP_SPARC_BRLEZ;
1634                                         break;
1635                                 case OP_COND_EXC_EQ:
1636                                         ins->opcode = OP_SPARC_COND_EXC_EQZ;
1637                                         break;
1638                                 case OP_COND_EXC_GE:
1639                                         ins->opcode = OP_SPARC_COND_EXC_GEZ;
1640                                         break;
1641                                 case OP_COND_EXC_GT:
1642                                         ins->opcode = OP_SPARC_COND_EXC_GTZ;
1643                                         break;
1644                                 case OP_COND_EXC_LE:
1645                                         ins->opcode = OP_SPARC_COND_EXC_LEZ;
1646                                         break;
1647                                 case OP_COND_EXC_LT:
1648                                         ins->opcode = OP_SPARC_COND_EXC_LTZ;
1649                                         break;
1650                                 case OP_COND_EXC_NE_UN:
1651                                         ins->opcode = OP_SPARC_COND_EXC_NEZ;
1652                                         break;
1653                                 default:
1654                                         g_assert_not_reached ();
1655                                 }
1656                                 last_ins->data = ins->data;
1657                                 last_ins->opcode = ins->opcode;
1658                                 last_ins->type = ins->type;
1659                                 last_ins->ssa_op = ins->ssa_op;
1660                                 last_ins->flags = ins->flags;
1661                                 last_ins->dreg = ins->dreg;
1662                                 last_ins->sreg2 = ins->sreg2;
1663                                 last_ins->backend = ins->backend;
1664                                 last_ins->klass = ins->klass;
1665                                 last_ins->cil_code = ins->cil_code;
1666                                 MONO_DEL_INS (ins);
1667                                 continue;
1668                         }
1669                         break;
1670                 case OP_MOVE:
1671                         /*
1672                          * OP_MOVE reg, reg
1673                          */
1674                         if (ins->dreg == ins->sreg1) {
1675                                 MONO_DEL_INS (ins);
1676                                 continue;
1677                         }
1678                         /*
1679                          * OP_MOVE sreg, dreg
1680                          * OP_MOVE dreg, sreg
1681                          */
1682                         if (last_ins && last_ins->opcode == OP_MOVE &&
1683                             ins->sreg1 == last_ins->dreg &&
1684                             ins->dreg == last_ins->sreg1) {
1685                                 MONO_DEL_INS (ins);
1686                                 continue;
1687                         }
1688                         break;
1689                 }
1690         }
1691 }
1692
1693 void
1694 mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1695 {
1696 }
1697
1698 /* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
1699
1700 static void
1701 sparc_patch (guint32 *code, const gpointer target)
1702 {
1703         guint32 *c = code;
1704         guint32 ins = *code;
1705         guint32 op = ins >> 30;
1706         guint32 op2 = (ins >> 22) & 0x7;
1707         guint32 rd = (ins >> 25) & 0x1f;
1708         guint8* target8 = (guint8*)target;
1709         gint64 disp = (target8 - (guint8*)code) >> 2;
1710         int reg;
1711
1712 //      g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
1713
1714         if ((op == 0) && (op2 == 2)) {
1715                 if (!sparc_is_imm22 (disp))
1716                         NOT_IMPLEMENTED;
1717                 /* Bicc */
1718                 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1719         }
1720         else if ((op == 0) && (op2 == 1)) {
1721                 if (!sparc_is_imm19 (disp))
1722                         NOT_IMPLEMENTED;
1723                 /* BPcc */
1724                 *code = ((ins >> 19) << 19) | (disp & 0x7ffff);
1725         }
1726         else if ((op == 0) && (op2 == 3)) {
1727                 if (!sparc_is_imm16 (disp))
1728                         NOT_IMPLEMENTED;
1729                 /* BPr */
1730                 *code &= ~(0x180000 | 0x3fff);
1731                 *code |= ((disp << 21) & (0x180000)) | (disp & 0x3fff);
1732         }
1733         else if ((op == 0) && (op2 == 6)) {
1734                 if (!sparc_is_imm22 (disp))
1735                         NOT_IMPLEMENTED;
1736                 /* FBicc */
1737                 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1738         }
1739         else if ((op == 0) && (op2 == 4)) {
1740                 guint32 ins2 = code [1];
1741
1742                 if (((ins2 >> 30) == 2) && (((ins2 >> 19) & 0x3f) == 2)) {
1743                         /* sethi followed by or */
1744                         guint32 *p = code;
1745                         sparc_set (p, target8, rd);
1746                         while (p <= (code + 1))
1747                                 sparc_nop (p);
1748                 }
1749                 else if (ins2 == 0x01000000) {
1750                         /* sethi followed by nop */
1751                         guint32 *p = code;
1752                         sparc_set (p, target8, rd);
1753                         while (p <= (code + 1))
1754                                 sparc_nop (p);
1755                 }
1756                 else if ((sparc_inst_op (ins2) == 3) && (sparc_inst_imm (ins2))) {
1757                         /* sethi followed by load/store */
1758 #ifndef SPARCV9
1759                         guint32 t = (guint32)target8;
1760                         *code &= ~(0x3fffff);
1761                         *code |= (t >> 10);
1762                         *(code + 1) &= ~(0x3ff);
1763                         *(code + 1) |= (t & 0x3ff);
1764 #endif
1765                 }
1766                 else if (v64 &&
1767                                  (sparc_inst_rd (ins) == sparc_g1) &&
1768                                  (sparc_inst_op (c [1]) == 0) && (sparc_inst_op2 (c [1]) == 4) &&
1769                                  (sparc_inst_op (c [2]) == 2) && (sparc_inst_op3 (c [2]) == 2) &&
1770                                  (sparc_inst_op (c [3]) == 2) && (sparc_inst_op3 (c [3]) == 2))
1771                 {
1772                         /* sparc_set */
1773                         guint32 *p = c;
1774                         reg = sparc_inst_rd (c [1]);
1775                         sparc_set (p, target8, reg);
1776                         while (p < (c + 6))
1777                                 sparc_nop (p);
1778                 }
1779                 else if ((sparc_inst_op (ins2) == 2) && (sparc_inst_op3 (ins2) == 0x38) &&
1780                                  (sparc_inst_imm (ins2))) {
1781                         /* sethi followed by jmpl */
1782 #ifndef SPARCV9
1783                         guint32 t = (guint32)target8;
1784                         *code &= ~(0x3fffff);
1785                         *code |= (t >> 10);
1786                         *(code + 1) &= ~(0x3ff);
1787                         *(code + 1) |= (t & 0x3ff);
1788 #endif
1789                 }
1790                 else
1791                         NOT_IMPLEMENTED;
1792         }
1793         else if (op == 01) {
1794                 gint64 disp = (target8 - (guint8*)code) >> 2;
1795
1796                 if (!sparc_is_imm30 (disp))
1797                         NOT_IMPLEMENTED;
1798                 sparc_call_simple (code, target8 - (guint8*)code);
1799         }
1800         else if ((op == 2) && (sparc_inst_op3 (ins) == 0x2) && sparc_inst_imm (ins)) {
1801                 /* mov imm, reg */
1802                 g_assert (sparc_is_imm13 (target8));
1803                 *code &= ~(0x1fff);
1804                 *code |= (guint32)target8;
1805         }
1806         else if ((sparc_inst_op (ins) == 2) && (sparc_inst_op3 (ins) == 0x7)) {
1807                 /* sparc_set case 5. */
1808                 guint32 *p = c;
1809
1810                 g_assert (v64);
1811                 reg = sparc_inst_rd (c [3]);
1812                 sparc_set (p, target, reg);
1813                 while (p < (c + 6))
1814                         sparc_nop (p);
1815         }
1816         else
1817                 NOT_IMPLEMENTED;
1818
1819 //      g_print ("patched with 0x%08x\n", ins);
1820 }
1821
1822 /*
1823  * mono_sparc_emit_save_lmf:
1824  *
1825  *  Emit the code neccesary to push a new entry onto the lmf stack. Used by
1826  * trampolines as well.
1827  */
1828 guint32*
1829 mono_sparc_emit_save_lmf (guint32 *code, guint32 lmf_offset)
1830 {
1831         /* Save lmf_addr */
1832         sparc_sti_imm (code, sparc_o0, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr));
1833         /* Save previous_lmf */
1834         sparc_ldi (code, sparc_o0, sparc_g0, sparc_o7);
1835         sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf));
1836         /* Set new lmf */
1837         sparc_add_imm (code, FALSE, sparc_fp, lmf_offset, sparc_o7);
1838         sparc_sti (code, sparc_o7, sparc_o0, sparc_g0);
1839
1840         return code;
1841 }
1842
1843 guint32*
1844 mono_sparc_emit_restore_lmf (guint32 *code, guint32 lmf_offset)
1845 {
1846         /* Load previous_lmf */
1847         sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), sparc_l0);
1848         /* Load lmf_addr */
1849         sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), sparc_l1);
1850         /* *(lmf) = previous_lmf */
1851         sparc_sti (code, sparc_l0, sparc_l1, sparc_g0);
1852         return code;
1853 }
1854
1855 static guint32*
1856 emit_save_sp_to_lmf (MonoCompile *cfg, guint32 *code)
1857 {
1858         /*
1859          * Since register windows are saved to the current value of %sp, we need to
1860          * set the sp field in the lmf before the call, not in the prolog.
1861          */
1862         if (cfg->method->save_lmf) {
1863                 gint32 lmf_offset = MONO_SPARC_STACK_BIAS - cfg->arch.lmf_offset;
1864
1865                 /* Save sp */
1866                 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
1867         }
1868
1869         return code;
1870 }
1871
1872 static guint32*
1873 emit_vret_token (MonoGenericSharingContext *gsctx, MonoInst *ins, guint32 *code)
1874 {
1875         MonoCallInst *call = (MonoCallInst*)ins;
1876         guint32 size;
1877
1878         /*
1879          * The sparc ABI requires that calls to functions which return a structure
1880          * contain an additional unimpl instruction which is checked by the callee.
1881          */
1882         if (call->signature->pinvoke && MONO_TYPE_ISSTRUCT(call->signature->ret)) {
1883                 if (call->signature->ret->type == MONO_TYPE_TYPEDBYREF)
1884                         size = mini_type_stack_size (gsctx, call->signature->ret, NULL);
1885                 else
1886                         size = mono_class_native_size (call->signature->ret->data.klass, NULL);
1887                 sparc_unimp (code, size & 0xfff);
1888         }
1889
1890         return code;
1891 }
1892
1893 static guint32*
1894 emit_move_return_value (MonoInst *ins, guint32 *code)
1895 {
1896         /* Move return value to the target register */
1897         /* FIXME: do more things in the local reg allocator */
1898         switch (ins->opcode) {
1899         case OP_VOIDCALL:
1900         case OP_VOIDCALL_REG:
1901         case OP_VOIDCALL_MEMBASE:
1902                 break;
1903         case OP_CALL:
1904         case OP_CALL_REG:
1905         case OP_CALL_MEMBASE:
1906                 g_assert (ins->dreg == sparc_o0);
1907                 break;
1908         case OP_LCALL:
1909         case OP_LCALL_REG:
1910         case OP_LCALL_MEMBASE:
1911                 /*
1912                  * ins->dreg is the least significant reg due to the lreg: LCALL rule
1913                  * in inssel-long32.brg.
1914                  */
1915 #ifdef SPARCV9
1916                 sparc_mov_reg_reg (code, sparc_o0, ins->dreg);
1917 #else
1918                 g_assert (ins->dreg == sparc_o1);
1919 #endif
1920                 break;
1921         case OP_FCALL:
1922         case OP_FCALL_REG:
1923         case OP_FCALL_MEMBASE:
1924 #ifdef SPARCV9
1925                 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4) {
1926                         sparc_fmovs (code, sparc_f0, ins->dreg);
1927                         sparc_fstod (code, ins->dreg, ins->dreg);
1928                 }
1929                 else
1930                         sparc_fmovd (code, sparc_f0, ins->dreg);
1931 #else
1932                 sparc_fmovs (code, sparc_f0, ins->dreg);
1933                 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4)
1934                         sparc_fstod (code, ins->dreg, ins->dreg);
1935                 else
1936                         sparc_fmovs (code, sparc_f1, ins->dreg + 1);
1937 #endif
1938                 break;
1939         case OP_VCALL:
1940         case OP_VCALL_REG:
1941         case OP_VCALL_MEMBASE:
1942                 break;
1943         default:
1944                 NOT_IMPLEMENTED;
1945         }
1946
1947         return code;
1948 }
1949
1950 /*
1951  * emit_load_volatile_arguments:
1952  *
1953  *  Load volatile arguments from the stack to the original input registers.
1954  * Required before a tail call.
1955  */
1956 static guint32*
1957 emit_load_volatile_arguments (MonoCompile *cfg, guint32 *code)
1958 {
1959         MonoMethod *method = cfg->method;
1960         MonoMethodSignature *sig;
1961         MonoInst *inst;
1962         CallInfo *cinfo;
1963         guint32 i, ireg;
1964
1965         /* FIXME: Generate intermediate code instead */
1966
1967         sig = mono_method_signature (method);
1968
1969         cinfo = get_call_info (cfg, sig, FALSE);
1970
1971         /* This is the opposite of the code in emit_prolog */
1972
1973         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
1974                 ArgInfo *ainfo = cinfo->args + i;
1975                 gint32 stack_offset;
1976                 MonoType *arg_type;
1977                 inst = cfg->args [i];
1978
1979                 if (sig->hasthis && (i == 0))
1980                         arg_type = &mono_defaults.object_class->byval_arg;
1981                 else
1982                         arg_type = sig->params [i - sig->hasthis];
1983
1984                 stack_offset = ainfo->offset + ARGS_OFFSET;
1985                 ireg = sparc_i0 + ainfo->reg;
1986
1987                 if (ainfo->storage == ArgInSplitRegStack) {
1988                         g_assert (inst->opcode == OP_REGOFFSET);
1989
1990                         if (!sparc_is_imm13 (stack_offset))
1991                                 NOT_IMPLEMENTED;
1992                         sparc_st_imm (code, inst->inst_basereg, stack_offset, sparc_i5);
1993                 }
1994
1995                 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
1996                         if (ainfo->storage == ArgInIRegPair) {
1997                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
1998                                         NOT_IMPLEMENTED;
1999                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2000                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2001                         }
2002                         else
2003                                 if (ainfo->storage == ArgInSplitRegStack) {
2004                                         if (stack_offset != inst->inst_offset) {
2005                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_i5);
2006                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2007                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2008
2009                                         }
2010                                 }
2011                         else
2012                                 if (ainfo->storage == ArgOnStackPair) {
2013                                         if (stack_offset != inst->inst_offset) {
2014                                                 /* stack_offset is not dword aligned, so we need to make a copy */
2015                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_o7);
2016                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset);
2017
2018                                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2019                                                 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2020
2021                                         }
2022                                 }
2023                          else
2024                                 g_assert_not_reached ();
2025                 }
2026                 else
2027                         if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
2028                                 /* Argument in register, but need to be saved to stack */
2029                                 if (!sparc_is_imm13 (stack_offset))
2030                                         NOT_IMPLEMENTED;
2031                                 if ((stack_offset - ARGS_OFFSET) & 0x1)
2032                                         /* FIXME: Is this ldsb or ldub ? */
2033                                         sparc_ldsb_imm (code, inst->inst_basereg, stack_offset, ireg);
2034                                 else
2035                                         if ((stack_offset - ARGS_OFFSET) & 0x2)
2036                                                 sparc_ldsh_imm (code, inst->inst_basereg, stack_offset, ireg);
2037                                 else
2038                                         if ((stack_offset - ARGS_OFFSET) & 0x4)
2039                                                 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2040                                         else {
2041                                                 if (v64)
2042                                                         sparc_ldx_imm (code, inst->inst_basereg, stack_offset, ireg);
2043                                                 else
2044                                                         sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2045                                         }
2046                         }
2047                         else if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
2048                                 /* Argument in regpair, but need to be saved to stack */
2049                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
2050                                         NOT_IMPLEMENTED;
2051                                 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2052                                 sparc_st_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2053                         }
2054                         else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
2055                                 NOT_IMPLEMENTED;
2056                         }
2057                         else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
2058                                 NOT_IMPLEMENTED;
2059                         }
2060
2061                 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
2062                         if (inst->opcode == OP_REGVAR)
2063                                 /* FIXME: Load the argument into memory */
2064                                 NOT_IMPLEMENTED;
2065         }
2066
2067         g_free (cinfo);
2068
2069         return code;
2070 }
2071
2072 /*
2073  * mono_sparc_is_virtual_call:
2074  *
2075  *  Determine whenever the instruction at CODE is a virtual call.
2076  */
2077 gboolean
2078 mono_sparc_is_virtual_call (guint32 *code)
2079 {
2080         guint32 buf[1];
2081         guint32 *p;
2082
2083         p = buf;
2084
2085         if ((sparc_inst_op (*code) == 0x2) && (sparc_inst_op3 (*code) == 0x38)) {
2086                 /*
2087                  * Register indirect call. If it is a virtual call, then the
2088                  * instruction in the delay slot is a special kind of nop.
2089                  */
2090
2091                 /* Construct special nop */
2092                 sparc_or_imm (p, FALSE, sparc_g0, 0xca, sparc_g0);
2093                 p --;
2094
2095                 if (code [1] == p [0])
2096                         return TRUE;
2097         }
2098
2099         return FALSE;
2100 }
2101
2102 /*
2103  * mono_arch_get_vcall_slot:
2104  *
2105  *  Determine the vtable slot used by a virtual call.
2106  */
2107 gpointer
2108 mono_arch_get_vcall_slot (guint8 *code8, gpointer *regs, int *displacement)
2109 {
2110         guint32 *code = (guint32*)(gpointer)code8;
2111         guint32 ins = code [0];
2112         guint32 prev_ins = code [-1];
2113
2114         mono_sparc_flushw ();
2115
2116         *displacement = 0;
2117
2118         if (!mono_sparc_is_virtual_call (code))
2119                 return NULL;
2120
2121         if ((sparc_inst_op (ins) == 0x2) && (sparc_inst_op3 (ins) == 0x38)) {
2122                 if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_i (prev_ins) == 1) && (sparc_inst_op3 (prev_ins) == 0 || sparc_inst_op3 (prev_ins) == 0xb)) {
2123                         /* ld [r1 + CONST ], r2; call r2 */
2124                         guint32 base = sparc_inst_rs1 (prev_ins);
2125                         gint32 disp = (((gint32)(sparc_inst_imm13 (prev_ins))) << 19) >> 19;
2126                         gpointer base_val;
2127
2128                         g_assert (sparc_inst_rd (prev_ins) == sparc_inst_rs1 (ins));
2129
2130                         g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2131
2132                         base_val = regs [base];
2133
2134                         *displacement = disp;
2135
2136                         return (gpointer)base_val;
2137                 }
2138                 else if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_i (prev_ins) == 0) && (sparc_inst_op3 (prev_ins) == 0)) {
2139                         /* set r1, ICONST; ld [r1 + r2], r2; call r2 */
2140                         /* Decode a sparc_set32 */
2141                         guint32 base = sparc_inst_rs1 (prev_ins);
2142                         guint32 disp;
2143                         gpointer base_val;
2144                         guint32 s1 = code [-3];
2145                         guint32 s2 = code [-2];
2146
2147 #ifdef SPARCV9
2148                         NOT_IMPLEMENTED;
2149 #endif
2150
2151                         /* sparc_sethi */
2152                         g_assert (sparc_inst_op (s1) == 0);
2153                         g_assert (sparc_inst_op2 (s1) == 4);
2154
2155                         /* sparc_or_imm */
2156                         g_assert (sparc_inst_op (s2) == 2);
2157                         g_assert (sparc_inst_op3 (s2) == 2);
2158                         g_assert (sparc_inst_i (s2) == 1);
2159                         g_assert (sparc_inst_rs1 (s2) == sparc_inst_rd (s2));
2160                         g_assert (sparc_inst_rd (s1) == sparc_inst_rs1 (s2));
2161
2162                         disp = ((s1 & 0x3fffff) << 10) | sparc_inst_imm13 (s2);
2163
2164                         g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2165
2166                         base_val = regs [base];
2167
2168                         *displacement = disp;
2169
2170                         return (gpointer)base_val;
2171                 } else
2172                         g_assert_not_reached ();
2173         }
2174         else
2175                 g_assert_not_reached ();
2176
2177         return NULL;
2178 }
2179
2180 gpointer*
2181 mono_arch_get_vcall_slot_addr (guint8 *code, gpointer *regs)
2182 {
2183         gpointer vt;
2184         int displacement;
2185         vt = mono_arch_get_vcall_slot (code, regs, &displacement);
2186         if (!vt)
2187                 return NULL;
2188         return (gpointer*)((char*)vt + displacement);
2189 }
2190
2191 #define CMP_SIZE 3
2192 #define BR_SMALL_SIZE 2
2193 #define BR_LARGE_SIZE 2
2194 #define JUMP_IMM_SIZE 5
2195 #define ENABLE_WRONG_METHOD_CHECK 0
2196
2197 /*
2198  * LOCKING: called with the domain lock held
2199  */
2200 gpointer
2201 mono_arch_build_imt_thunk (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count)
2202 {
2203         int i;
2204         int size = 0;
2205         guint32 *code, *start;
2206
2207         for (i = 0; i < count; ++i) {
2208                 MonoIMTCheckItem *item = imt_entries [i];
2209                 if (item->is_equals) {
2210                         if (item->check_target_idx) {
2211                                 if (!item->compare_done)
2212                                         item->chunk_size += CMP_SIZE;
2213                                 item->chunk_size += BR_SMALL_SIZE + JUMP_IMM_SIZE;
2214                         } else {
2215                                 item->chunk_size += JUMP_IMM_SIZE;
2216 #if ENABLE_WRONG_METHOD_CHECK
2217                                 item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
2218 #endif
2219                         }
2220                 } else {
2221                         item->chunk_size += CMP_SIZE + BR_LARGE_SIZE;
2222                         imt_entries [item->check_target_idx]->compare_done = TRUE;
2223                 }
2224                 size += item->chunk_size;
2225         }
2226         code = mono_code_manager_reserve (domain->code_mp, size * 4);
2227         start = code;
2228
2229         for (i = 0; i < count; ++i) {
2230                 MonoIMTCheckItem *item = imt_entries [i];
2231                 item->code_target = (guint8*)code;
2232                 if (item->is_equals) {
2233                         if (item->check_target_idx) {
2234                                 if (!item->compare_done) {
2235                                         sparc_set (code, (guint32)item->method, sparc_g5);
2236                                         sparc_cmp (code, MONO_ARCH_IMT_REG, sparc_g5);
2237                                 }
2238                                 item->jmp_code = (guint8*)code;
2239                                 sparc_branch (code, 0, sparc_bne, 0);
2240                                 sparc_nop (code);
2241                                 sparc_set (code, ((guint32)(&(vtable->vtable [item->vtable_slot]))), sparc_g5);
2242                                 sparc_ld (code, sparc_g5, 0, sparc_g5);
2243                                 sparc_jmpl (code, sparc_g5, sparc_g0, sparc_g0);
2244                                 sparc_nop (code);
2245                         } else {
2246                                 /* enable the commented code to assert on wrong method */
2247 #if ENABLE_WRONG_METHOD_CHECK
2248                                 g_assert_not_reached ();
2249 #endif
2250                                 sparc_set (code, ((guint32)(&(vtable->vtable [item->vtable_slot]))), sparc_g5);
2251                                 sparc_ld (code, sparc_g5, 0, sparc_g5);
2252                                 sparc_jmpl (code, sparc_g5, sparc_g0, sparc_g0);
2253                                 sparc_nop (code);
2254 #if ENABLE_WRONG_METHOD_CHECK
2255                                 g_assert_not_reached ();
2256 #endif
2257                         }
2258                 } else {
2259                         sparc_set (code, (guint32)item->method, sparc_g5);
2260                         sparc_cmp (code, MONO_ARCH_IMT_REG, sparc_g5);
2261                         item->jmp_code = (guint8*)code;
2262                         sparc_branch (code, 0, sparc_beu, 0);
2263                         sparc_nop (code);
2264                 }
2265         }
2266         /* patch the branches to get to the target items */
2267         for (i = 0; i < count; ++i) {
2268                 MonoIMTCheckItem *item = imt_entries [i];
2269                 if (item->jmp_code) {
2270                         if (item->check_target_idx) {
2271                                 sparc_patch ((guint32*)item->jmp_code, imt_entries [item->check_target_idx]->code_target);
2272                         }
2273                 }
2274         }
2275
2276         mono_arch_flush_icache ((guint8*)start, (code - start) * 4);
2277
2278         mono_stats.imt_thunks_size += (code - start) * 4;
2279         g_assert (code - start <= size);
2280         return start;
2281 }
2282
2283 MonoMethod*
2284 mono_arch_find_imt_method (gpointer *regs, guint8 *code)
2285 {
2286 #ifdef SPARCV9
2287         g_assert_not_reached ();
2288 #endif
2289
2290         return (MonoMethod*)regs [sparc_g1];
2291 }
2292
2293 MonoObject*
2294 mono_arch_find_this_argument (gpointer *regs, MonoMethod *method, MonoGenericSharingContext *gsctx)
2295 {
2296         mono_sparc_flushw ();
2297
2298         return (gpointer)regs [sparc_o0];
2299 }
2300
2301 /*
2302  * Some conventions used in the following code.
2303  * 2) The only scratch registers we have are o7 and g1.  We try to
2304  * stick to o7 when we can, and use g1 when necessary.
2305  */
2306
2307 void
2308 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2309 {
2310         MonoInst *ins;
2311         MonoCallInst *call;
2312         guint offset;
2313         guint32 *code = (guint32*)(cfg->native_code + cfg->code_len);
2314         int max_len, cpos;
2315         const char *spec;
2316
2317         if (cfg->verbose_level > 2)
2318                 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2319
2320         cpos = bb->max_offset;
2321
2322         if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2323                 NOT_IMPLEMENTED;
2324         }
2325
2326         MONO_BB_FOR_EACH_INS (bb, ins) {
2327                 guint8* code_start;
2328
2329                 offset = (guint8*)code - cfg->native_code;
2330
2331                 spec = ins_get_spec (ins->opcode);
2332
2333                 max_len = ((guint8 *)spec)[MONO_INST_LEN];
2334
2335                 if (offset > (cfg->code_size - max_len - 16)) {
2336                         cfg->code_size *= 2;
2337                         cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2338                         code = (guint32*)(cfg->native_code + offset);
2339                 }
2340                 code_start = (guint8*)code;
2341                 //      if (ins->cil_code)
2342                 //              g_print ("cil code\n");
2343                 mono_debug_record_line_number (cfg, ins, offset);
2344
2345                 switch (ins->opcode) {
2346                 case OP_STOREI1_MEMBASE_IMM:
2347                         EMIT_STORE_MEMBASE_IMM (ins, stb);
2348                         break;
2349                 case OP_STOREI2_MEMBASE_IMM:
2350                         EMIT_STORE_MEMBASE_IMM (ins, sth);
2351                         break;
2352                 case OP_STORE_MEMBASE_IMM:
2353                         EMIT_STORE_MEMBASE_IMM (ins, sti);
2354                         break;
2355                 case OP_STOREI4_MEMBASE_IMM:
2356                         EMIT_STORE_MEMBASE_IMM (ins, st);
2357                         break;
2358                 case OP_STOREI8_MEMBASE_IMM:
2359 #ifdef SPARCV9
2360                         EMIT_STORE_MEMBASE_IMM (ins, stx);
2361 #else
2362                         /* Only generated by peephole opts */
2363                         g_assert ((ins->inst_offset % 8) == 0);
2364                         g_assert (ins->inst_imm == 0);
2365                         EMIT_STORE_MEMBASE_IMM (ins, stx);
2366 #endif
2367                         break;
2368                 case OP_STOREI1_MEMBASE_REG:
2369                         EMIT_STORE_MEMBASE_REG (ins, stb);
2370                         break;
2371                 case OP_STOREI2_MEMBASE_REG:
2372                         EMIT_STORE_MEMBASE_REG (ins, sth);
2373                         break;
2374                 case OP_STOREI4_MEMBASE_REG:
2375                         EMIT_STORE_MEMBASE_REG (ins, st);
2376                         break;
2377                 case OP_STOREI8_MEMBASE_REG:
2378 #ifdef SPARCV9
2379                         EMIT_STORE_MEMBASE_REG (ins, stx);
2380 #else
2381                         /* Only used by OP_MEMSET */
2382                         EMIT_STORE_MEMBASE_REG (ins, std);
2383 #endif
2384                         break;
2385                 case OP_STORE_MEMBASE_REG:
2386                         EMIT_STORE_MEMBASE_REG (ins, sti);
2387                         break;
2388                 case OP_LOADU4_MEM:
2389                         sparc_set (code, ins->inst_c0, ins->dreg);
2390                         sparc_ld (code, ins->dreg, sparc_g0, ins->dreg);
2391                         break;
2392                 case OP_LOADI4_MEMBASE:
2393 #ifdef SPARCV9
2394                         EMIT_LOAD_MEMBASE (ins, ldsw);
2395 #else
2396                         EMIT_LOAD_MEMBASE (ins, ld);
2397 #endif
2398                         break;
2399                 case OP_LOADU4_MEMBASE:
2400                         EMIT_LOAD_MEMBASE (ins, ld);
2401                         break;
2402                 case OP_LOADU1_MEMBASE:
2403                         EMIT_LOAD_MEMBASE (ins, ldub);
2404                         break;
2405                 case OP_LOADI1_MEMBASE:
2406                         EMIT_LOAD_MEMBASE (ins, ldsb);
2407                         break;
2408                 case OP_LOADU2_MEMBASE:
2409                         EMIT_LOAD_MEMBASE (ins, lduh);
2410                         break;
2411                 case OP_LOADI2_MEMBASE:
2412                         EMIT_LOAD_MEMBASE (ins, ldsh);
2413                         break;
2414                 case OP_LOAD_MEMBASE:
2415 #ifdef SPARCV9
2416                                 EMIT_LOAD_MEMBASE (ins, ldx);
2417 #else
2418                                 EMIT_LOAD_MEMBASE (ins, ld);
2419 #endif
2420                         break;
2421 #ifdef SPARCV9
2422                 case OP_LOADI8_MEMBASE:
2423                         EMIT_LOAD_MEMBASE (ins, ldx);
2424                         break;
2425 #endif
2426                 case OP_ICONV_TO_I1:
2427                         sparc_sll_imm (code, ins->sreg1, 24, sparc_o7);
2428                         sparc_sra_imm (code, sparc_o7, 24, ins->dreg);
2429                         break;
2430                 case OP_ICONV_TO_I2:
2431                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2432                         sparc_sra_imm (code, sparc_o7, 16, ins->dreg);
2433                         break;
2434                 case OP_ICONV_TO_U1:
2435                         sparc_and_imm (code, FALSE, ins->sreg1, 0xff, ins->dreg);
2436                         break;
2437                 case OP_ICONV_TO_U2:
2438                         sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2439                         sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
2440                         break;
2441                 case OP_ICONV_TO_OVF_U4:
2442                         /* Only used on V9 */
2443                         sparc_cmp_imm (code, ins->sreg1, 0);
2444                         mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2445                                                                  MONO_PATCH_INFO_EXC, "OverflowException");
2446                         sparc_branchp (code, 0, sparc_bl, sparc_xcc_short, 0, 0);
2447                         /* Delay slot */
2448                         sparc_set (code, 1, sparc_o7);
2449                         sparc_sllx_imm (code, sparc_o7, 32, sparc_o7);
2450                         sparc_cmp (code, ins->sreg1, sparc_o7);
2451                         mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2452                                                                  MONO_PATCH_INFO_EXC, "OverflowException");
2453                         sparc_branchp (code, 0, sparc_bge, sparc_xcc_short, 0, 0);
2454                         sparc_nop (code);
2455                         sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2456                         break;
2457                 case OP_ICONV_TO_OVF_I4_UN:
2458                         /* Only used on V9 */
2459                         NOT_IMPLEMENTED;
2460                         break;
2461                 case OP_COMPARE:
2462                 case OP_LCOMPARE:
2463                 case OP_ICOMPARE:
2464                         sparc_cmp (code, ins->sreg1, ins->sreg2);
2465                         break;
2466                 case OP_COMPARE_IMM:
2467                 case OP_ICOMPARE_IMM:
2468                         if (sparc_is_imm13 (ins->inst_imm))
2469                                 sparc_cmp_imm (code, ins->sreg1, ins->inst_imm);
2470                         else {
2471                                 sparc_set (code, ins->inst_imm, sparc_o7);
2472                                 sparc_cmp (code, ins->sreg1, sparc_o7);
2473                         }
2474                         break;
2475                 case OP_BREAK:
2476                         /*
2477                          * gdb does not like encountering 'ta 1' in the debugged code. So
2478                          * instead of emitting a trap, we emit a call a C function and place a
2479                          * breakpoint there.
2480                          */
2481                         //sparc_ta (code, 1);
2482                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, mono_break);
2483                         EMIT_CALL();
2484                         break;
2485                 case OP_ADDCC:
2486                 case OP_IADDCC:
2487                         sparc_add (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2488                         break;
2489                 case OP_IADD:
2490                         sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2491                         break;
2492                 case OP_ADDCC_IMM:
2493                 case OP_ADD_IMM:
2494                 case OP_IADD_IMM:
2495                         /* according to inssel-long32.brg, this should set cc */
2496                         EMIT_ALU_IMM (ins, add, TRUE);
2497                         break;
2498                 case OP_ADC:
2499                 case OP_IADC:
2500                         /* according to inssel-long32.brg, this should set cc */
2501                         sparc_addx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2502                         break;
2503                 case OP_ADC_IMM:
2504                 case OP_IADC_IMM:
2505                         EMIT_ALU_IMM (ins, addx, TRUE);
2506                         break;
2507                 case OP_SUBCC:
2508                 case OP_ISUBCC:
2509                         sparc_sub (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2510                         break;
2511                 case OP_ISUB:
2512                         sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2513                         break;
2514                 case OP_SUBCC_IMM:
2515                 case OP_SUB_IMM:
2516                 case OP_ISUB_IMM:
2517                         /* according to inssel-long32.brg, this should set cc */
2518                         EMIT_ALU_IMM (ins, sub, TRUE);
2519                         break;
2520                 case OP_SBB:
2521                 case OP_ISBB:
2522                         /* according to inssel-long32.brg, this should set cc */
2523                         sparc_subx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2524                         break;
2525                 case OP_SBB_IMM:
2526                 case OP_ISBB_IMM:
2527                         EMIT_ALU_IMM (ins, subx, TRUE);
2528                         break;
2529                 case OP_IAND:
2530                         sparc_and (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2531                         break;
2532                 case OP_AND_IMM:
2533                 case OP_IAND_IMM:
2534                         EMIT_ALU_IMM (ins, and, FALSE);
2535                         break;
2536                 case OP_IDIV:
2537                         /* Sign extend sreg1 into %y */
2538                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2539                         sparc_wry (code, sparc_o7, sparc_g0);
2540                         sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2541                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2542                         break;
2543                 case OP_IDIV_UN:
2544                         sparc_wry (code, sparc_g0, sparc_g0);
2545                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2546                         break;
2547                 case OP_DIV_IMM: {
2548                         int i, imm;
2549
2550                         /* Transform division into a shift */
2551                         for (i = 1; i < 30; ++i) {
2552                                 imm = (1 << i);
2553                                 if (ins->inst_imm == imm)
2554                                         break;
2555                         }
2556                         if (i < 30) {
2557                                 if (i == 1) {
2558                                         /* gcc 2.95.3 */
2559                                         sparc_srl_imm (code, ins->sreg1, 31, sparc_o7);
2560                                         sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2561                                         sparc_sra_imm (code, ins->dreg, 1, ins->dreg);
2562                                 }
2563                                 else {
2564                                         /* http://compilers.iecc.com/comparch/article/93-04-079 */
2565                                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2566                                         sparc_srl_imm (code, sparc_o7, 32 - i, sparc_o7);
2567                                         sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2568                                         sparc_sra_imm (code, ins->dreg, i, ins->dreg);
2569                                 }
2570                         }
2571                         else {
2572                                 /* Sign extend sreg1 into %y */
2573                                 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2574                                 sparc_wry (code, sparc_o7, sparc_g0);
2575                                 EMIT_ALU_IMM (ins, sdiv, TRUE);
2576                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2577                         }
2578                         break;
2579                 }
2580                 case OP_IREM:
2581                         /* Sign extend sreg1 into %y */
2582                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2583                         sparc_wry (code, sparc_o7, sparc_g0);
2584                         sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, sparc_o7);
2585                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2586                         sparc_smul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2587                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2588                         break;
2589                 case OP_IREM_UN:
2590                         sparc_wry (code, sparc_g0, sparc_g0);
2591                         sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2592                         sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2593                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2594                         break;
2595                 case OP_REM_IMM:
2596                 case OP_IREM_IMM:
2597                         /* Sign extend sreg1 into %y */
2598                         sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2599                         sparc_wry (code, sparc_o7, sparc_g0);
2600                         if (!sparc_is_imm13 (ins->inst_imm)) {
2601                                 sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
2602                                 sparc_sdiv (code, TRUE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
2603                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2604                                 sparc_smul (code, FALSE, sparc_o7, GP_SCRATCH_REG, sparc_o7);
2605                         }
2606                         else {
2607                                 sparc_sdiv_imm (code, TRUE, ins->sreg1, ins->inst_imm, sparc_o7);
2608                                 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2609                                 sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
2610                         }
2611                         sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2612                         break;
2613                 case OP_IOR:
2614                         sparc_or (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2615                         break;
2616                 case OP_OR_IMM:
2617                 case OP_IOR_IMM:
2618                         EMIT_ALU_IMM (ins, or, FALSE);
2619                         break;
2620                 case OP_IXOR:
2621                         sparc_xor (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2622                         break;
2623                 case OP_XOR_IMM:
2624                 case OP_IXOR_IMM:
2625                         EMIT_ALU_IMM (ins, xor, FALSE);
2626                         break;
2627                 case OP_ISHL:
2628                         sparc_sll (code, ins->sreg1, ins->sreg2, ins->dreg);
2629                         break;
2630                 case OP_SHL_IMM:
2631                 case OP_ISHL_IMM:
2632                         if (ins->inst_imm < (1 << 5))
2633                                 sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2634                         else {
2635                                 sparc_set (code, ins->inst_imm, sparc_o7);
2636                                 sparc_sll (code, ins->sreg1, sparc_o7, ins->dreg);
2637                         }
2638                         break;
2639                 case OP_ISHR:
2640                         sparc_sra (code, ins->sreg1, ins->sreg2, ins->dreg);
2641                         break;
2642                 case OP_ISHR_IMM:
2643                 case OP_SHR_IMM:
2644                         if (ins->inst_imm < (1 << 5))
2645                                 sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2646                         else {
2647                                 sparc_set (code, ins->inst_imm, sparc_o7);
2648                                 sparc_sra (code, ins->sreg1, sparc_o7, ins->dreg);
2649                         }
2650                         break;
2651                 case OP_SHR_UN_IMM:
2652                 case OP_ISHR_UN_IMM:
2653                         if (ins->inst_imm < (1 << 5))
2654                                 sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2655                         else {
2656                                 sparc_set (code, ins->inst_imm, sparc_o7);
2657                                 sparc_srl (code, ins->sreg1, sparc_o7, ins->dreg);
2658                         }
2659                         break;
2660                 case OP_ISHR_UN:
2661                         sparc_srl (code, ins->sreg1, ins->sreg2, ins->dreg);
2662                         break;
2663                 case OP_LSHL:
2664                         sparc_sllx (code, ins->sreg1, ins->sreg2, ins->dreg);
2665                         break;
2666                 case OP_LSHL_IMM:
2667                         if (ins->inst_imm < (1 << 6))
2668                                 sparc_sllx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2669                         else {
2670                                 sparc_set (code, ins->inst_imm, sparc_o7);
2671                                 sparc_sllx (code, ins->sreg1, sparc_o7, ins->dreg);
2672                         }
2673                         break;
2674                 case OP_LSHR:
2675                         sparc_srax (code, ins->sreg1, ins->sreg2, ins->dreg);
2676                         break;
2677                 case OP_LSHR_IMM:
2678                         if (ins->inst_imm < (1 << 6))
2679                                 sparc_srax_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2680                         else {
2681                                 sparc_set (code, ins->inst_imm, sparc_o7);
2682                                 sparc_srax (code, ins->sreg1, sparc_o7, ins->dreg);
2683                         }
2684                         break;
2685                 case OP_LSHR_UN:
2686                         sparc_srlx (code, ins->sreg1, ins->sreg2, ins->dreg);
2687                         break;
2688                 case OP_LSHR_UN_IMM:
2689                         if (ins->inst_imm < (1 << 6))
2690                                 sparc_srlx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2691                         else {
2692                                 sparc_set (code, ins->inst_imm, sparc_o7);
2693                                 sparc_srlx (code, ins->sreg1, sparc_o7, ins->dreg);
2694                         }
2695                         break;
2696                 case OP_INOT:
2697                         /* can't use sparc_not */
2698                         sparc_xnor (code, FALSE, ins->sreg1, sparc_g0, ins->dreg);
2699                         break;
2700                 case OP_INEG:
2701                         /* can't use sparc_neg */
2702                         sparc_sub (code, FALSE, sparc_g0, ins->sreg1, ins->dreg);
2703                         break;
2704                 case OP_IMUL:
2705                         sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2706                         break;
2707                 case OP_IMUL_IMM:
2708                 case OP_MUL_IMM: {
2709                         int i, imm;
2710
2711                         if ((ins->inst_imm == 1) && (ins->sreg1 == ins->dreg))
2712                                 break;
2713
2714                         /* Transform multiplication into a shift */
2715                         for (i = 0; i < 30; ++i) {
2716                                 imm = (1 << i);
2717                                 if (ins->inst_imm == imm)
2718                                         break;
2719                         }
2720                         if (i < 30)
2721                                 sparc_sll_imm (code, ins->sreg1, i, ins->dreg);
2722                         else
2723                                 EMIT_ALU_IMM (ins, smul, FALSE);
2724                         break;
2725                 }
2726                 case OP_IMUL_OVF:
2727                         sparc_smul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2728                         sparc_rdy (code, sparc_g1);
2729                         sparc_sra_imm (code, ins->dreg, 31, sparc_o7);
2730                         sparc_cmp (code, sparc_g1, sparc_o7);
2731                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2732                         break;
2733                 case OP_IMUL_OVF_UN:
2734                         sparc_umul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2735                         sparc_rdy (code, sparc_o7);
2736                         sparc_cmp (code, sparc_o7, sparc_g0);
2737                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2738                         break;
2739                 case OP_ICONST:
2740                         sparc_set (code, ins->inst_c0, ins->dreg);
2741                         break;
2742                 case OP_I8CONST:
2743                         sparc_set (code, ins->inst_l, ins->dreg);
2744                         break;
2745                 case OP_AOTCONST:
2746                         mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2747                         sparc_set_template (code, ins->dreg);
2748                         break;
2749                 case OP_ICONV_TO_I4:
2750                 case OP_ICONV_TO_U4:
2751                 case OP_MOVE:
2752                         if (ins->sreg1 != ins->dreg)
2753                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2754                         break;
2755                 case OP_FMOVE:
2756 #ifdef SPARCV9
2757                         if (ins->sreg1 != ins->dreg)
2758                                 sparc_fmovd (code, ins->sreg1, ins->dreg);
2759 #else
2760                         sparc_fmovs (code, ins->sreg1, ins->dreg);
2761                         sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2762 #endif
2763                         break;
2764                 case OP_SPARC_SETFREG_FLOAT:
2765                         /* Only used on V9 */
2766                         sparc_fdtos (code, ins->sreg1, ins->dreg);
2767                         break;
2768                 case OP_JMP:
2769                         if (cfg->method->save_lmf)
2770                                 NOT_IMPLEMENTED;
2771
2772                         code = emit_load_volatile_arguments (cfg, code);
2773                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2774                         sparc_set_template (code, sparc_o7);
2775                         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_g0);
2776                         /* Restore parent frame in delay slot */
2777                         sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
2778                         break;
2779                 case OP_CHECK_THIS:
2780                         /* ensure ins->sreg1 is not NULL */
2781                         /* Might be misaligned in case of vtypes so use a byte load */
2782                         sparc_ldsb_imm (code, ins->sreg1, 0, sparc_g0);
2783                         break;
2784                 case OP_ARGLIST:
2785                         sparc_add_imm (code, FALSE, sparc_fp, cfg->sig_cookie, sparc_o7);
2786                         sparc_sti_imm (code, sparc_o7, ins->sreg1, 0);
2787                         break;
2788                 case OP_FCALL:
2789                 case OP_LCALL:
2790                 case OP_VCALL:
2791                 case OP_VOIDCALL:
2792                 case OP_CALL:
2793                         call = (MonoCallInst*)ins;
2794                         g_assert (!call->virtual);
2795                         code = emit_save_sp_to_lmf (cfg, code);
2796                         if (ins->flags & MONO_INST_HAS_METHOD)
2797                             code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2798                         else
2799                             code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2800
2801                         code = emit_vret_token (cfg->generic_sharing_context, ins, code);
2802                         code = emit_move_return_value (ins, code);
2803                         break;
2804                 case OP_FCALL_REG:
2805                 case OP_LCALL_REG:
2806                 case OP_VCALL_REG:
2807                 case OP_VOIDCALL_REG:
2808                 case OP_CALL_REG:
2809                         call = (MonoCallInst*)ins;
2810                         code = emit_save_sp_to_lmf (cfg, code);
2811                         sparc_jmpl (code, ins->sreg1, sparc_g0, sparc_callsite);
2812                         /*
2813                          * We emit a special kind of nop in the delay slot to tell the
2814                          * trampoline code that this is a virtual call, thus an unbox
2815                          * trampoline might need to be called.
2816                          */
2817                         if (call->virtual)
2818                                 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2819                         else
2820                                 sparc_nop (code);
2821
2822                         code = emit_vret_token (cfg->generic_sharing_context, ins, code);
2823                         code = emit_move_return_value (ins, code);
2824                         break;
2825                 case OP_FCALL_MEMBASE:
2826                 case OP_LCALL_MEMBASE:
2827                 case OP_VCALL_MEMBASE:
2828                 case OP_VOIDCALL_MEMBASE:
2829                 case OP_CALL_MEMBASE:
2830                         call = (MonoCallInst*)ins;
2831                         code = emit_save_sp_to_lmf (cfg, code);
2832                         if (sparc_is_imm13 (ins->inst_offset)) {
2833                                 sparc_ldi_imm (code, ins->inst_basereg, ins->inst_offset, sparc_o7);
2834                         } else {
2835                                 sparc_set (code, ins->inst_offset, sparc_o7);
2836                                 sparc_ldi (code, ins->inst_basereg, sparc_o7, sparc_o7);
2837                         }
2838                         sparc_jmpl (code, sparc_o7, sparc_g0, sparc_callsite);
2839                         if (call->virtual)
2840                                 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2841                         else
2842                                 sparc_nop (code);
2843
2844                         code = emit_vret_token (cfg->generic_sharing_context, ins, code);
2845                         code = emit_move_return_value (ins, code);
2846                         break;
2847                 case OP_SETFRET:
2848                         if (mono_method_signature (cfg->method)->ret->type == MONO_TYPE_R4)
2849                                 sparc_fdtos (code, ins->sreg1, sparc_f0);
2850                         else {
2851 #ifdef SPARCV9
2852                                 sparc_fmovd (code, ins->sreg1, ins->dreg);
2853 #else
2854                                 /* FIXME: Why not use fmovd ? */
2855                                 sparc_fmovs (code, ins->sreg1, ins->dreg);
2856                                 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2857 #endif
2858                         }
2859                         break;
2860                 case OP_OUTARG:
2861                         g_assert_not_reached ();
2862                         break;
2863                 case OP_LOCALLOC: {
2864                         guint32 size_reg;
2865
2866 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2867                         /* Perform stack touching */
2868                         NOT_IMPLEMENTED;
2869 #endif
2870
2871                         /* Keep alignment */
2872                         sparc_add_imm (code, FALSE, ins->sreg1, MONO_ARCH_LOCALLOC_ALIGNMENT - 1, ins->dreg);
2873                         sparc_set (code, ~(MONO_ARCH_LOCALLOC_ALIGNMENT - 1), sparc_o7);
2874                         sparc_and (code, FALSE, ins->dreg, sparc_o7, ins->dreg);
2875
2876                         if ((ins->flags & MONO_INST_INIT) && (ins->sreg1 == ins->dreg)) {
2877 #ifdef SPARCV9
2878                                 size_reg = sparc_g4;
2879 #else
2880                                 size_reg = sparc_g1;
2881 #endif
2882                                 sparc_mov_reg_reg (code, ins->dreg, size_reg);
2883                         }
2884                         else
2885                                 size_reg = ins->sreg1;
2886
2887                         sparc_sub (code, FALSE, sparc_sp, ins->dreg, ins->dreg);
2888                         /* Keep %sp valid at all times */
2889                         sparc_mov_reg_reg (code, ins->dreg, sparc_sp);
2890                         g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
2891                         sparc_add_imm (code, FALSE, ins->dreg, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
2892
2893                         if (ins->flags & MONO_INST_INIT) {
2894                                 guint32 *br [3];
2895                                 /* Initialize memory region */
2896                                 sparc_cmp_imm (code, size_reg, 0);
2897                                 br [0] = code;
2898                                 sparc_branch (code, 0, sparc_be, 0);
2899                                 /* delay slot */
2900                                 sparc_set (code, 0, sparc_o7);
2901                                 sparc_sub_imm (code, 0, size_reg, sparcv9 ? 8 : 4, size_reg);
2902                                 /* start of loop */
2903                                 br [1] = code;
2904                                 if (sparcv9)
2905                                         sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
2906                                 else
2907                                         sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
2908                                 sparc_cmp (code, sparc_o7, size_reg);
2909                                 br [2] = code;
2910                                 sparc_branch (code, 0, sparc_bl, 0);
2911                                 sparc_patch (br [2], br [1]);
2912                                 /* delay slot */
2913                                 sparc_add_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2914                                 sparc_patch (br [0], code);
2915                         }
2916                         break;
2917                 }
2918                 case OP_LOCALLOC_IMM: {
2919                         gint32 offset = ins->inst_imm;
2920
2921 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
2922                         /* Perform stack touching */
2923                         NOT_IMPLEMENTED;
2924 #endif
2925
2926                         offset = ALIGN_TO (offset, MONO_ARCH_LOCALLOC_ALIGNMENT);
2927                         if (sparc_is_imm13 (offset))
2928                                 sparc_sub_imm (code, FALSE, sparc_sp, offset, sparc_sp);
2929                         else {
2930                                 sparc_set (code, offset, sparc_o7);
2931                                 sparc_sub (code, FALSE, sparc_sp, sparc_o7, sparc_sp);
2932                         }
2933                         g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
2934                         sparc_add_imm (code, FALSE, sparc_sp, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
2935                         if ((ins->flags & MONO_INST_INIT) && (offset > 0)) {
2936                                 guint32 *br [2];
2937                                 int i;
2938
2939                                 if (offset <= 16) {
2940                                         i = 0;
2941                                         while (i < offset) {
2942                                                 if (sparcv9) {
2943                                                         sparc_stx_imm (code, sparc_g0, ins->dreg, i);
2944                                                         i += 8;
2945                                                 }
2946                                                 else {
2947                                                         sparc_st_imm (code, sparc_g0, ins->dreg, i);
2948                                                         i += 4;
2949                                                 }
2950                                         }
2951                                 }
2952                                 else {
2953                                         sparc_set (code, offset, sparc_o7);
2954                                         sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2955                                         /* beginning of loop */
2956                                         br [0] = code;
2957                                         if (sparcv9)
2958                                                 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
2959                                         else
2960                                                 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
2961                                         sparc_cmp_imm (code, sparc_o7, 0);
2962                                         br [1] = code;
2963                                         sparc_branch (code, 0, sparc_bne, 0);
2964                                         /* delay slot */
2965                                         sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
2966                                         sparc_patch (br [1], br [0]);
2967                                 }
2968                         }
2969                         break;
2970                 }
2971                 case OP_THROW:
2972                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2973                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2974                                              (gpointer)"mono_arch_throw_exception");
2975                         EMIT_CALL ();
2976                         break;
2977                 case OP_RETHROW:
2978                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
2979                         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2980                                              (gpointer)"mono_arch_rethrow_exception");
2981                         EMIT_CALL ();
2982                         break;
2983                 case OP_START_HANDLER: {
2984                         /*
2985                          * The START_HANDLER instruction marks the beginning of a handler
2986                          * block. It is called using a call instruction, so %o7 contains
2987                          * the return address. Since the handler executes in the same stack
2988              * frame as the method itself, we can't use save/restore to save
2989                          * the return address. Instead, we save it into a dedicated
2990                          * variable.
2991                          */
2992                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
2993                         if (!sparc_is_imm13 (spvar->inst_offset)) {
2994                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
2995                                 sparc_sti (code, sparc_o7, spvar->inst_basereg, GP_SCRATCH_REG);
2996                         }
2997                         else
2998                                 sparc_sti_imm (code, sparc_o7, spvar->inst_basereg, spvar->inst_offset);
2999                         break;
3000                 }
3001                 case OP_ENDFILTER: {
3002                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3003                         if (!sparc_is_imm13 (spvar->inst_offset)) {
3004                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3005                                 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
3006                         }
3007                         else
3008                                 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3009                         sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3010                         /* Delay slot */
3011                         sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3012                         break;
3013                 }
3014                 case OP_ENDFINALLY: {
3015                         MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3016                         if (!sparc_is_imm13 (spvar->inst_offset)) {
3017                                 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3018                                 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
3019                         }
3020                         else
3021                                 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3022                         sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3023                         sparc_nop (code);
3024                         break;
3025                 }
3026                 case OP_CALL_HANDLER:
3027                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3028                         /* This is a jump inside the method, so call_simple works even on V9 */
3029                         sparc_call_simple (code, 0);
3030                         sparc_nop (code);
3031                         break;
3032                 case OP_LABEL:
3033                         ins->inst_c0 = (guint8*)code - cfg->native_code;
3034                         break;
3035                 case OP_BR:
3036                         if ((ins->inst_target_bb == bb->next_bb) &&
3037                             ins->node.next == &bb->ins_list)
3038                                 break;
3039                         if (ins->flags & MONO_INST_BRLABEL) {
3040                                 if (ins->inst_i0->inst_c0) {
3041                                         gint32 disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2;
3042                                         g_assert (sparc_is_imm22 (disp));
3043                                         sparc_branch (code, 1, sparc_ba, disp);
3044                                 } else {
3045                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
3046                                         sparc_branch (code, 1, sparc_ba, 0);
3047                                 }
3048                         } else {
3049                                 if (ins->inst_target_bb->native_offset) {
3050                                         gint32 disp = (ins->inst_target_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2;
3051                                         g_assert (sparc_is_imm22 (disp));
3052                                         sparc_branch (code, 1, sparc_ba, disp);
3053                                 } else {
3054                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3055                                         sparc_branch (code, 1, sparc_ba, 0);
3056                                 }
3057                         }
3058                         sparc_nop (code);
3059                         break;
3060                 case OP_BR_REG:
3061                         sparc_jmp (code, ins->sreg1, sparc_g0);
3062                         sparc_nop (code);
3063                         break;
3064                 case OP_CEQ:
3065                 case OP_CLT:
3066                 case OP_CLT_UN:
3067                 case OP_CGT:
3068                 case OP_CGT_UN:
3069                         if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3070                                 sparc_clr_reg (code, ins->dreg);
3071                                 sparc_movcc_imm (code, sparc_xcc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3072                         }
3073                         else {
3074                                 sparc_clr_reg (code, ins->dreg);
3075 #ifdef SPARCV9
3076                                 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), DEFAULT_ICC, 0, 2);
3077 #else
3078                                 sparc_branch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3079 #endif
3080                                 /* delay slot */
3081                                 sparc_set (code, 1, ins->dreg);
3082                         }
3083                         break;
3084                 case OP_ICEQ:
3085                 case OP_ICLT:
3086                 case OP_ICLT_UN:
3087                 case OP_ICGT:
3088                 case OP_ICGT_UN:
3089                     if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3090                                 sparc_clr_reg (code, ins->dreg);
3091                                 sparc_movcc_imm (code, sparc_icc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3092                     }
3093                     else {
3094                         sparc_clr_reg (code, ins->dreg);
3095                         sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), sparc_icc_short, 0, 2);
3096                         /* delay slot */
3097                         sparc_set (code, 1, ins->dreg);
3098                     }
3099                     break;
3100                 case OP_COND_EXC_EQ:
3101                 case OP_COND_EXC_NE_UN:
3102                 case OP_COND_EXC_LT:
3103                 case OP_COND_EXC_LT_UN:
3104                 case OP_COND_EXC_GT:
3105                 case OP_COND_EXC_GT_UN:
3106                 case OP_COND_EXC_GE:
3107                 case OP_COND_EXC_GE_UN:
3108                 case OP_COND_EXC_LE:
3109                 case OP_COND_EXC_LE_UN:
3110                 case OP_COND_EXC_OV:
3111                 case OP_COND_EXC_NO:
3112                 case OP_COND_EXC_C:
3113                 case OP_COND_EXC_NC:
3114                         EMIT_COND_SYSTEM_EXCEPTION (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1);
3115                         break;
3116                 case OP_SPARC_COND_EXC_EQZ:
3117                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brz, ins->inst_p1);
3118                         break;
3119                 case OP_SPARC_COND_EXC_GEZ:
3120                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgez, ins->inst_p1);
3121                         break;
3122                 case OP_SPARC_COND_EXC_GTZ:
3123                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgz, ins->inst_p1);
3124                         break;
3125                 case OP_SPARC_COND_EXC_LEZ:
3126                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlez, ins->inst_p1);
3127                         break;
3128                 case OP_SPARC_COND_EXC_LTZ:
3129                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlz, ins->inst_p1);
3130                         break;
3131                 case OP_SPARC_COND_EXC_NEZ:
3132                         EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brnz, ins->inst_p1);
3133                         break;
3134                 case OP_COND_EXC_IOV:
3135                 case OP_COND_EXC_IC:
3136                         EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1, TRUE, sparc_icc_short);
3137                         break;
3138                 case OP_IBEQ:
3139                 case OP_IBNE_UN:
3140                 case OP_IBLT:
3141                 case OP_IBLT_UN:
3142                 case OP_IBGT:
3143                 case OP_IBGT_UN:
3144                 case OP_IBGE:
3145                 case OP_IBGE_UN:
3146                 case OP_IBLE:
3147                 case OP_IBLE_UN: {
3148                         if (sparcv9)
3149                                 EMIT_COND_BRANCH_PREDICTED (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3150                         else
3151                                 EMIT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3152                         break;
3153                 }
3154
3155                 case OP_SPARC_BRZ:
3156                         EMIT_COND_BRANCH_BPR (ins, brz, 1, 1, 1);
3157                         break;
3158                 case OP_SPARC_BRLEZ:
3159                         EMIT_COND_BRANCH_BPR (ins, brlez, 1, 1, 1);
3160                         break;
3161                 case OP_SPARC_BRLZ:
3162                         EMIT_COND_BRANCH_BPR (ins, brlz, 1, 1, 1);
3163                         break;
3164                 case OP_SPARC_BRNZ:
3165                         EMIT_COND_BRANCH_BPR (ins, brnz, 1, 1, 1);
3166                         break;
3167                 case OP_SPARC_BRGZ:
3168                         EMIT_COND_BRANCH_BPR (ins, brgz, 1, 1, 1);
3169                         break;
3170                 case OP_SPARC_BRGEZ:
3171                         EMIT_COND_BRANCH_BPR (ins, brgez, 1, 1, 1);
3172                         break;
3173
3174                 /* floating point opcodes */
3175                 case OP_R8CONST:
3176                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
3177 #ifdef SPARCV9
3178                         sparc_set_template (code, sparc_o7);
3179 #else
3180                         sparc_sethi (code, 0, sparc_o7);
3181 #endif
3182                         sparc_lddf_imm (code, sparc_o7, 0, ins->dreg);
3183                         break;
3184                 case OP_R4CONST:
3185                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
3186 #ifdef SPARCV9
3187                         sparc_set_template (code, sparc_o7);
3188 #else
3189                         sparc_sethi (code, 0, sparc_o7);
3190 #endif
3191                         sparc_ldf_imm (code, sparc_o7, 0, FP_SCRATCH_REG);
3192
3193                         /* Extend to double */
3194                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3195                         break;
3196                 case OP_STORER8_MEMBASE_REG:
3197                         if (!sparc_is_imm13 (ins->inst_offset + 4)) {
3198                                 sparc_set (code, ins->inst_offset, sparc_o7);
3199                                 /* SPARCV9 handles misaligned fp loads/stores */
3200                                 if (!v64 && (ins->inst_offset % 8)) {
3201                                         /* Misaligned */
3202                                         sparc_add (code, FALSE, ins->inst_destbasereg, sparc_o7, sparc_o7);
3203                                         sparc_stf (code, ins->sreg1, sparc_o7, sparc_g0);
3204                                         sparc_stf_imm (code, ins->sreg1 + 1, sparc_o7, 4);
3205                                 } else
3206                                         sparc_stdf (code, ins->sreg1, ins->inst_destbasereg, sparc_o7);
3207                         }
3208                         else {
3209                                 if (!v64 && (ins->inst_offset % 8)) {
3210                                         /* Misaligned */
3211                                         sparc_stf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3212                                         sparc_stf_imm (code, ins->sreg1 + 1, ins->inst_destbasereg, ins->inst_offset + 4);
3213                                 } else
3214                                         sparc_stdf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3215                         }
3216                         break;
3217                 case OP_LOADR8_MEMBASE:
3218                         EMIT_LOAD_MEMBASE (ins, lddf);
3219                         break;
3220                 case OP_STORER4_MEMBASE_REG:
3221                         /* This requires a double->single conversion */
3222                         sparc_fdtos (code, ins->sreg1, FP_SCRATCH_REG);
3223                         if (!sparc_is_imm13 (ins->inst_offset)) {
3224                                 sparc_set (code, ins->inst_offset, sparc_o7);
3225                                 sparc_stf (code, FP_SCRATCH_REG, ins->inst_destbasereg, sparc_o7);
3226                         }
3227                         else
3228                                 sparc_stf_imm (code, FP_SCRATCH_REG, ins->inst_destbasereg, ins->inst_offset);
3229                         break;
3230                 case OP_LOADR4_MEMBASE: {
3231                         /* ldf needs a single precision register */
3232                         int dreg = ins->dreg;
3233                         ins->dreg = FP_SCRATCH_REG;
3234                         EMIT_LOAD_MEMBASE (ins, ldf);
3235                         ins->dreg = dreg;
3236                         /* Extend to double */
3237                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3238                         break;
3239                 }
3240                 case OP_ICONV_TO_R4: {
3241                         gint32 offset = cfg->arch.float_spill_slot_offset;
3242 #ifdef SPARCV9
3243                         if (!sparc_is_imm13 (offset)) {
3244                                 sparc_set (code, offset, sparc_o7);
3245                                 sparc_stx (code, ins->sreg1, sparc_sp, offset);
3246                                 sparc_lddf (code, sparc_sp, offset, FP_SCRATCH_REG);
3247                         } else {
3248                                 sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3249                                 sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3250                         }
3251                         sparc_fxtos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3252 #else
3253                         if (!sparc_is_imm13 (offset)) {
3254                                 sparc_set (code, offset, sparc_o7);
3255                                 sparc_st (code, ins->sreg1, sparc_sp, sparc_o7);
3256                                 sparc_ldf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3257                         } else {
3258                                 sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3259                                 sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3260                         }
3261                         sparc_fitos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3262 #endif
3263                         sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3264                         break;
3265                 }
3266                 case OP_ICONV_TO_R8: {
3267                         gint32 offset = cfg->arch.float_spill_slot_offset;
3268 #ifdef SPARCV9
3269                         if (!sparc_is_imm13 (offset)) {
3270                                 sparc_set (code, offset, sparc_o7);
3271                                 sparc_stx (code, ins->sreg1, sparc_sp, sparc_o7);
3272                                 sparc_lddf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3273                         } else {
3274                                 sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3275                                 sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3276                         }
3277                         sparc_fxtod (code, FP_SCRATCH_REG, ins->dreg);
3278 #else
3279                         if (!sparc_is_imm13 (offset)) {
3280                                 sparc_set (code, offset, sparc_o7);
3281                                 sparc_st (code, ins->sreg1, sparc_sp, sparc_o7);
3282                                 sparc_ldf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3283                         } else {
3284                                 sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3285                                 sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3286                         }
3287                         sparc_fitod (code, FP_SCRATCH_REG, ins->dreg);
3288 #endif
3289                         break;
3290                 }
3291                 case OP_FCONV_TO_I1:
3292                 case OP_FCONV_TO_U1:
3293                 case OP_FCONV_TO_I2:
3294                 case OP_FCONV_TO_U2:
3295 #ifndef SPARCV9
3296                 case OP_FCONV_TO_I:
3297                 case OP_FCONV_TO_U:
3298 #endif
3299                 case OP_FCONV_TO_I4:
3300                 case OP_FCONV_TO_U4: {
3301                         gint32 offset = cfg->arch.float_spill_slot_offset;
3302                         sparc_fdtoi (code, ins->sreg1, FP_SCRATCH_REG);
3303                         if (!sparc_is_imm13 (offset)) {
3304                                 sparc_set (code, offset, sparc_o7);
3305                                 sparc_stdf (code, FP_SCRATCH_REG, sparc_sp, sparc_o7);
3306                                 sparc_ld (code, sparc_sp, sparc_o7, ins->dreg);
3307                         } else {
3308                                 sparc_stdf_imm (code, FP_SCRATCH_REG, sparc_sp, offset);
3309                                 sparc_ld_imm (code, sparc_sp, offset, ins->dreg);
3310                         }
3311
3312                         switch (ins->opcode) {
3313                         case OP_FCONV_TO_I1:
3314                         case OP_FCONV_TO_U1:
3315                                 sparc_and_imm (code, 0, ins->dreg, 0xff, ins->dreg);
3316                                 break;
3317                         case OP_FCONV_TO_I2:
3318                         case OP_FCONV_TO_U2:
3319                                 sparc_set (code, 0xffff, sparc_o7);
3320                                 sparc_and (code, 0, ins->dreg, sparc_o7, ins->dreg);
3321                                 break;
3322                         default:
3323                                 break;
3324                         }
3325                         break;
3326                 }
3327                 case OP_LCONV_TO_OVF_I: {
3328                         guint32 *br [3], *label [1];
3329
3330                         /*
3331                          * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3332                          */
3333                         sparc_cmp_imm (code, ins->sreg1, 0);
3334                         br [0] = code;
3335                         sparc_branch (code, 1, sparc_bneg, 0);
3336                         sparc_nop (code);
3337
3338                         /* positive */
3339                         /* ms word must be 0 */
3340                         sparc_cmp_imm (code, ins->sreg2, 0);
3341                         br [1] = code;
3342                         sparc_branch (code, 1, sparc_be, 0);
3343                         sparc_nop (code);
3344
3345                         label [0] = code;
3346
3347                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_ba, "OverflowException");
3348
3349                         /* negative */
3350                         sparc_patch (br [0], code);
3351
3352                         /* ms word must 0xfffffff */
3353                         sparc_cmp_imm (code, ins->sreg2, -1);
3354                         br [2] = code;
3355                         sparc_branch (code, 1, sparc_bne, 0);
3356                         sparc_nop (code);
3357                         sparc_patch (br [2], label [0]);
3358
3359                         /* Ok */
3360                         sparc_patch (br [1], code);
3361                         if (ins->sreg1 != ins->dreg)
3362                                 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
3363                         break;
3364                 }
3365                 case OP_FADD:
3366                         sparc_faddd (code, ins->sreg1, ins->sreg2, ins->dreg);
3367                         break;
3368                 case OP_FSUB:
3369                         sparc_fsubd (code, ins->sreg1, ins->sreg2, ins->dreg);
3370                         break;
3371                 case OP_FMUL:
3372                         sparc_fmuld (code, ins->sreg1, ins->sreg2, ins->dreg);
3373                         break;
3374                 case OP_FDIV:
3375                         sparc_fdivd (code, ins->sreg1, ins->sreg2, ins->dreg);
3376                         break;
3377                 case OP_FNEG:
3378 #ifdef SPARCV9
3379                         sparc_fnegd (code, ins->sreg1, ins->dreg);
3380 #else
3381                         /* FIXME: why don't use fnegd ? */
3382                         sparc_fnegs (code, ins->sreg1, ins->dreg);
3383 #endif
3384                         break;
3385                 case OP_FREM:
3386                         sparc_fdivd (code, ins->sreg1, ins->sreg2, FP_SCRATCH_REG);
3387                         sparc_fmuld (code, ins->sreg2, FP_SCRATCH_REG, FP_SCRATCH_REG);
3388                         sparc_fsubd (code, ins->sreg1, FP_SCRATCH_REG, ins->dreg);
3389                         break;
3390                 case OP_FCOMPARE:
3391                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3392                         break;
3393                 case OP_FCEQ:
3394                 case OP_FCLT:
3395                 case OP_FCLT_UN:
3396                 case OP_FCGT:
3397                 case OP_FCGT_UN:
3398                         sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3399                         sparc_clr_reg (code, ins->dreg);
3400                         switch (ins->opcode) {
3401                         case OP_FCLT_UN:
3402                         case OP_FCGT_UN:
3403                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 4);
3404                                 /* delay slot */
3405                                 sparc_set (code, 1, ins->dreg);
3406                                 sparc_fbranch (code, 1, sparc_fbu, 2);
3407                                 /* delay slot */
3408                                 sparc_set (code, 1, ins->dreg);
3409                                 break;
3410                         default:
3411                                 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3412                                 /* delay slot */
3413                                 sparc_set (code, 1, ins->dreg);
3414                         }
3415                         break;
3416                 case OP_FBEQ:
3417                 case OP_FBLT:
3418                 case OP_FBGT:
3419                         EMIT_FLOAT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3420                         break;
3421                 case OP_FBGE: {
3422                         /* clt.un + brfalse */
3423                         guint32 *p = code;
3424                         sparc_fbranch (code, 1, sparc_fbul, 0);
3425                         /* delay slot */
3426                         sparc_nop (code);
3427                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3428                         sparc_patch (p, (guint8*)code);
3429                         break;
3430                 }
3431                 case OP_FBLE: {
3432                         /* cgt.un + brfalse */
3433                         guint32 *p = code;
3434                         sparc_fbranch (code, 1, sparc_fbug, 0);
3435                         /* delay slot */
3436                         sparc_nop (code);
3437                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3438                         sparc_patch (p, (guint8*)code);
3439                         break;
3440                 }
3441                 case OP_FBNE_UN:
3442                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbne, 1, 1);
3443                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3444                         break;
3445                 case OP_FBLT_UN:
3446                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbl, 1, 1);
3447                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3448                         break;
3449                 case OP_FBGT_UN:
3450                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbg, 1, 1);
3451                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3452                         break;
3453                 case OP_FBGE_UN:
3454                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbge, 1, 1);
3455                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3456                         break;
3457                 case OP_FBLE_UN:
3458                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fble, 1, 1);
3459                         EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3460                         break;
3461                 case OP_CKFINITE: {
3462                         gint32 offset = cfg->arch.float_spill_slot_offset;
3463                         if (!sparc_is_imm13 (offset)) {
3464                                 sparc_set (code, offset, sparc_o7);
3465                                 sparc_stdf (code, ins->sreg1, sparc_sp, sparc_o7);
3466                                 sparc_lduh (code, sparc_sp, sparc_o7, sparc_o7);
3467                         } else {
3468                                 sparc_stdf_imm (code, ins->sreg1, sparc_sp, offset);
3469                                 sparc_lduh_imm (code, sparc_sp, offset, sparc_o7);
3470                         }
3471                         sparc_srl_imm (code, sparc_o7, 4, sparc_o7);
3472                         sparc_and_imm (code, FALSE, sparc_o7, 2047, sparc_o7);
3473                         sparc_cmp_imm (code, sparc_o7, 2047);
3474                         EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_be, "ArithmeticException");
3475 #ifdef SPARCV9
3476                         sparc_fmovd (code, ins->sreg1, ins->dreg);
3477 #else
3478                         sparc_fmovs (code, ins->sreg1, ins->dreg);
3479                         sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3480 #endif
3481                         break;
3482                 }
3483
3484                 case OP_MEMORY_BARRIER:
3485                         sparc_membar (code, sparc_membar_all);
3486                         break;
3487
3488                 default:
3489 #ifdef __GNUC__
3490                         g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
3491 #else
3492                         g_warning ("%s:%d: unknown opcode %s\n", __FILE__, __LINE__, mono_inst_name (ins->opcode));
3493 #endif
3494                         g_assert_not_reached ();
3495                 }
3496
3497                 if ((((guint8*)code) - code_start) > max_len) {
3498                         g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3499                                    mono_inst_name (ins->opcode), max_len, ((guint8*)code) - code_start);
3500                         g_assert_not_reached ();
3501                 }
3502
3503                 cpos += max_len;
3504         }
3505
3506         cfg->code_len = (guint8*)code - cfg->native_code;
3507 }
3508
3509 void
3510 mono_arch_register_lowlevel_calls (void)
3511 {
3512         mono_register_jit_icall (mono_arch_get_lmf_addr, "mono_arch_get_lmf_addr", NULL, TRUE);
3513 }
3514
3515 void
3516 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3517 {
3518         MonoJumpInfo *patch_info;
3519
3520         /* FIXME: Move part of this to arch independent code */
3521         for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3522                 unsigned char *ip = patch_info->ip.i + code;
3523                 gpointer target;
3524
3525                 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3526
3527                 switch (patch_info->type) {
3528                 case MONO_PATCH_INFO_NONE:
3529                         continue;
3530                 case MONO_PATCH_INFO_CLASS_INIT: {
3531                         guint32 *ip2 = (guint32*)ip;
3532                         /* Might already been changed to a nop */
3533 #ifdef SPARCV9
3534                         sparc_set_template (ip2, sparc_o7);
3535                         sparc_jmpl (ip2, sparc_o7, sparc_g0, sparc_o7);
3536 #else
3537                         sparc_call_simple (ip2, 0);
3538 #endif
3539                         break;
3540                 }
3541                 case MONO_PATCH_INFO_METHOD_JUMP: {
3542                         guint32 *ip2 = (guint32*)ip;
3543                         /* Might already been patched */
3544                         sparc_set_template (ip2, sparc_o7);
3545                         break;
3546                 }
3547                 default:
3548                         break;
3549                 }
3550                 sparc_patch ((guint32*)ip, target);
3551         }
3552 }
3553
3554 void*
3555 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3556 {
3557         int i;
3558         guint32 *code = (guint32*)p;
3559         MonoMethodSignature *sig = mono_method_signature (cfg->method);
3560         CallInfo *cinfo;
3561
3562         /* Save registers to stack */
3563         for (i = 0; i < 6; ++i)
3564                 sparc_sti_imm (code, sparc_i0 + i, sparc_fp, ARGS_OFFSET + (i * sizeof (gpointer)));
3565
3566         cinfo = get_call_info (cfg, sig, FALSE);
3567
3568         /* Save float regs on V9, since they are caller saved */
3569         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3570                 ArgInfo *ainfo = cinfo->args + i;
3571                 gint32 stack_offset;
3572
3573                 stack_offset = ainfo->offset + ARGS_OFFSET;
3574
3575                 if (ainfo->storage == ArgInFloatReg) {
3576                         if (!sparc_is_imm13 (stack_offset))
3577                                 NOT_IMPLEMENTED;
3578                         sparc_stf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3579                 }
3580                 else if (ainfo->storage == ArgInDoubleReg) {
3581                         /* The offset is guaranteed to be aligned by the ABI rules */
3582                         sparc_stdf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3583                 }
3584         }
3585
3586         sparc_set (code, cfg->method, sparc_o0);
3587         sparc_add_imm (code, FALSE, sparc_fp, MONO_SPARC_STACK_BIAS, sparc_o1);
3588
3589         mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
3590         EMIT_CALL ();
3591
3592         /* Restore float regs on V9 */
3593         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3594                 ArgInfo *ainfo = cinfo->args + i;
3595                 gint32 stack_offset;
3596
3597                 stack_offset = ainfo->offset + ARGS_OFFSET;
3598
3599                 if (ainfo->storage == ArgInFloatReg) {
3600                         if (!sparc_is_imm13 (stack_offset))
3601                                 NOT_IMPLEMENTED;
3602                         sparc_ldf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3603                 }
3604                 else if (ainfo->storage == ArgInDoubleReg) {
3605                         /* The offset is guaranteed to be aligned by the ABI rules */
3606                         sparc_lddf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3607                 }
3608         }
3609
3610         g_free (cinfo);
3611
3612         return code;
3613 }
3614
3615 enum {
3616         SAVE_NONE,
3617         SAVE_STRUCT,
3618         SAVE_ONE,
3619         SAVE_TWO,
3620         SAVE_FP
3621 };
3622
3623 void*
3624 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3625 {
3626         guint32 *code = (guint32*)p;
3627         int save_mode = SAVE_NONE;
3628         MonoMethod *method = cfg->method;
3629
3630         switch (mono_type_get_underlying_type (mono_method_signature (method)->ret)->type) {
3631         case MONO_TYPE_VOID:
3632                 /* special case string .ctor icall */
3633                 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
3634                         save_mode = SAVE_ONE;
3635                 else
3636                         save_mode = SAVE_NONE;
3637                 break;
3638         case MONO_TYPE_I8:
3639         case MONO_TYPE_U8:
3640 #ifdef SPARCV9
3641                 save_mode = SAVE_ONE;
3642 #else
3643                 save_mode = SAVE_TWO;
3644 #endif
3645                 break;
3646         case MONO_TYPE_R4:
3647         case MONO_TYPE_R8:
3648                 save_mode = SAVE_FP;
3649                 break;
3650         case MONO_TYPE_VALUETYPE:
3651                 save_mode = SAVE_STRUCT;
3652                 break;
3653         default:
3654                 save_mode = SAVE_ONE;
3655                 break;
3656         }
3657
3658         /* Save the result to the stack and also put it into the output registers */
3659
3660         switch (save_mode) {
3661         case SAVE_TWO:
3662                 /* V8 only */
3663                 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
3664                 sparc_st_imm (code, sparc_i0, sparc_fp, 72);
3665                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3666                 sparc_mov_reg_reg (code, sparc_i1, sparc_o2);
3667                 break;
3668         case SAVE_ONE:
3669                 sparc_sti_imm (code, sparc_i0, sparc_fp, ARGS_OFFSET);
3670                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3671                 break;
3672         case SAVE_FP:
3673 #ifdef SPARCV9
3674                 sparc_stdf_imm (code, sparc_f0, sparc_fp, ARGS_OFFSET);
3675 #else
3676                 sparc_stdf_imm (code, sparc_f0, sparc_fp, 72);
3677                 sparc_ld_imm (code, sparc_fp, 72, sparc_o1);
3678                 sparc_ld_imm (code, sparc_fp, 72 + 4, sparc_o2);
3679 #endif
3680                 break;
3681         case SAVE_STRUCT:
3682 #ifdef SPARCV9
3683                 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3684 #else
3685                 sparc_ld_imm (code, sparc_fp, 64, sparc_o1);
3686 #endif
3687                 break;
3688         case SAVE_NONE:
3689         default:
3690                 break;
3691         }
3692
3693         sparc_set (code, cfg->method, sparc_o0);
3694
3695         mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, func);
3696         EMIT_CALL ();
3697
3698         /* Restore result */
3699
3700         switch (save_mode) {
3701         case SAVE_TWO:
3702                 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
3703                 sparc_ld_imm (code, sparc_fp, 72, sparc_i0);
3704                 break;
3705         case SAVE_ONE:
3706                 sparc_ldi_imm (code, sparc_fp, ARGS_OFFSET, sparc_i0);
3707                 break;
3708         case SAVE_FP:
3709                 sparc_lddf_imm (code, sparc_fp, ARGS_OFFSET, sparc_f0);
3710                 break;
3711         case SAVE_NONE:
3712         default:
3713                 break;
3714         }
3715
3716         return code;
3717 }
3718
3719 guint8 *
3720 mono_arch_emit_prolog (MonoCompile *cfg)
3721 {
3722         MonoMethod *method = cfg->method;
3723         MonoMethodSignature *sig;
3724         MonoInst *inst;
3725         guint32 *code;
3726         CallInfo *cinfo;
3727         guint32 i, offset;
3728
3729         cfg->code_size = 256;
3730         cfg->native_code = g_malloc (cfg->code_size);
3731         code = (guint32*)cfg->native_code;
3732
3733         /* FIXME: Generate intermediate code instead */
3734
3735         offset = cfg->stack_offset;
3736         offset += (16 * sizeof (gpointer)); /* register save area */
3737 #ifndef SPARCV9
3738         offset += 4; /* struct/union return pointer */
3739 #endif
3740
3741         /* add parameter area size for called functions */
3742         if (cfg->param_area < (6 * sizeof (gpointer)))
3743                 /* Reserve space for the first 6 arguments even if it is unused */
3744                 offset += 6 * sizeof (gpointer);
3745         else
3746                 offset += cfg->param_area;
3747
3748         /* align the stack size */
3749         offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3750
3751         /*
3752          * localloc'd memory is stored between the local variables (whose
3753          * size is given by cfg->stack_offset), and between the space reserved
3754          * by the ABI.
3755          */
3756         cfg->arch.localloc_offset = offset - cfg->stack_offset;
3757
3758         cfg->stack_offset = offset;
3759
3760 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3761                         /* Perform stack touching */
3762                         NOT_IMPLEMENTED;
3763 #endif
3764
3765         if (!sparc_is_imm13 (- cfg->stack_offset)) {
3766                 /* Can't use sparc_o7 here, since we're still in the caller's frame */
3767                 sparc_set (code, (- cfg->stack_offset), GP_SCRATCH_REG);
3768                 sparc_save (code, sparc_sp, GP_SCRATCH_REG, sparc_sp);
3769         }
3770         else
3771                 sparc_save_imm (code, sparc_sp, - cfg->stack_offset, sparc_sp);
3772
3773 /*
3774         if (strstr (cfg->method->name, "foo")) {
3775                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
3776                 sparc_call_simple (code, 0);
3777                 sparc_nop (code);
3778         }
3779 */
3780
3781         sig = mono_method_signature (method);
3782
3783         cinfo = get_call_info (cfg, sig, FALSE);
3784
3785         /* Keep in sync with emit_load_volatile_arguments */
3786         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3787                 ArgInfo *ainfo = cinfo->args + i;
3788                 gint32 stack_offset;
3789                 MonoType *arg_type;
3790                 inst = cfg->args [i];
3791
3792                 if (sig->hasthis && (i == 0))
3793                         arg_type = &mono_defaults.object_class->byval_arg;
3794                 else
3795                         arg_type = sig->params [i - sig->hasthis];
3796
3797                 stack_offset = ainfo->offset + ARGS_OFFSET;
3798
3799                 /* Save the split arguments so they will reside entirely on the stack */
3800                 if (ainfo->storage == ArgInSplitRegStack) {
3801                         /* Save the register to the stack */
3802                         g_assert (inst->opcode == OP_REGOFFSET);
3803                         if (!sparc_is_imm13 (stack_offset))
3804                                 NOT_IMPLEMENTED;
3805                         sparc_st_imm (code, sparc_i5, inst->inst_basereg, stack_offset);
3806                 }
3807
3808                 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
3809                         /* Save the argument to a dword aligned stack location */
3810                         /*
3811                          * stack_offset contains the offset of the argument on the stack.
3812                          * inst->inst_offset contains the dword aligned offset where the value
3813                          * should be stored.
3814                          */
3815                         if (ainfo->storage == ArgInIRegPair) {
3816                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3817                                         NOT_IMPLEMENTED;
3818                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3819                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3820                         }
3821                         else
3822                                 if (ainfo->storage == ArgInSplitRegStack) {
3823 #ifdef SPARCV9
3824                                         g_assert_not_reached ();
3825 #endif
3826                                         if (stack_offset != inst->inst_offset) {
3827                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3828                                                 sparc_st_imm (code, sparc_i5, inst->inst_basereg, inst->inst_offset);
3829                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3830                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3831                                         }
3832                                 }
3833                         else
3834                                 if (ainfo->storage == ArgOnStackPair) {
3835 #ifdef SPARCV9
3836                                         g_assert_not_reached ();
3837 #endif
3838                                         if (stack_offset != inst->inst_offset) {
3839                                                 /* stack_offset is not dword aligned, so we need to make a copy */
3840                                                 sparc_ld_imm (code, sparc_fp, stack_offset, sparc_o7);
3841                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset);
3842                                                 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
3843                                                 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
3844                                         }
3845                                 }
3846                         else
3847                                 g_assert_not_reached ();
3848                 }
3849                 else
3850                         if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
3851                                 /* Argument in register, but need to be saved to stack */
3852                                 if (!sparc_is_imm13 (stack_offset))
3853                                         NOT_IMPLEMENTED;
3854                                 if ((stack_offset - ARGS_OFFSET) & 0x1)
3855                                         sparc_stb_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3856                                 else
3857                                         if ((stack_offset - ARGS_OFFSET) & 0x2)
3858                                                 sparc_sth_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3859                                 else
3860                                         if ((stack_offset - ARGS_OFFSET) & 0x4)
3861                                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3862                                         else {
3863                                                 if (v64)
3864                                                         sparc_stx_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3865                                                 else
3866                                                         sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
3867                                         }
3868                         }
3869                 else
3870                         if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
3871 #ifdef SPARCV9
3872                                 NOT_IMPLEMENTED;
3873 #endif
3874                                 /* Argument in regpair, but need to be saved to stack */
3875                                 if (!sparc_is_imm13 (inst->inst_offset + 4))
3876                                         NOT_IMPLEMENTED;
3877                                 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
3878                                 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
3879                         }
3880                 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
3881                                 if (!sparc_is_imm13 (stack_offset))
3882                                         NOT_IMPLEMENTED;
3883                                 sparc_stf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
3884                                 }
3885                         else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
3886                                 /* The offset is guaranteed to be aligned by the ABI rules */
3887                                 sparc_stdf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
3888                         }
3889
3890                 if ((ainfo->storage == ArgInFloatReg) && (inst->opcode == OP_REGVAR)) {
3891                         /* Need to move into the a double precision register */
3892                         sparc_fstod (code, ainfo->reg, ainfo->reg - 1);
3893                 }
3894
3895                 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
3896                         if (inst->opcode == OP_REGVAR)
3897                                 /* FIXME: Load the argument into memory */
3898                                 NOT_IMPLEMENTED;
3899         }
3900
3901         g_free (cinfo);
3902
3903         if (cfg->method->save_lmf) {
3904                 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
3905
3906                 /* Save ip */
3907                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3908                 sparc_set_template (code, sparc_o7);
3909                 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ip));
3910                 /* Save sp */
3911                 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
3912                 /* Save fp */
3913                 sparc_sti_imm (code, sparc_fp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebp));
3914                 /* Save method */
3915                 /* FIXME: add a relocation for this */
3916                 sparc_set (code, cfg->method, sparc_o7);
3917                 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method));
3918
3919                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3920                                                          (gpointer)"mono_arch_get_lmf_addr");
3921                 EMIT_CALL ();
3922
3923                 code = (guint32*)mono_sparc_emit_save_lmf (code, lmf_offset);
3924         }
3925
3926         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3927                 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
3928
3929         cfg->code_len = (guint8*)code - cfg->native_code;
3930
3931         g_assert (cfg->code_len <= cfg->code_size);
3932
3933         return (guint8*)code;
3934 }
3935
3936 void
3937 mono_arch_emit_epilog (MonoCompile *cfg)
3938 {
3939         MonoMethod *method = cfg->method;
3940         guint32 *code;
3941         int can_fold = 0;
3942         int max_epilog_size = 16 + 20 * 4;
3943
3944         if (cfg->method->save_lmf)
3945                 max_epilog_size += 128;
3946
3947         if (mono_jit_trace_calls != NULL)
3948                 max_epilog_size += 50;
3949
3950         if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
3951                 max_epilog_size += 50;
3952
3953         while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
3954                 cfg->code_size *= 2;
3955                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
3956                 mono_jit_stats.code_reallocs++;
3957         }
3958
3959         code = (guint32*)(cfg->native_code + cfg->code_len);
3960
3961         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3962                 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
3963
3964         if (cfg->method->save_lmf) {
3965                 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
3966
3967                 code = mono_sparc_emit_restore_lmf (code, lmf_offset);
3968         }
3969
3970         /*
3971          * The V8 ABI requires that calls to functions which return a structure
3972          * return to %i7+12
3973          */
3974         if (!v64 && mono_method_signature (cfg->method)->pinvoke && MONO_TYPE_ISSTRUCT(mono_method_signature (cfg->method)->ret))
3975                 sparc_jmpl_imm (code, sparc_i7, 12, sparc_g0);
3976         else
3977                 sparc_ret (code);
3978
3979         /* Only fold last instruction into the restore if the exit block has an in count of 1
3980            and the previous block hasn't been optimized away since it may have an in count > 1 */
3981         if (cfg->bb_exit->in_count == 1 && cfg->bb_exit->in_bb[0]->native_offset != cfg->bb_exit->native_offset)
3982                 can_fold = 1;
3983
3984         /* Try folding last instruction into the restore */
3985         if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && sparc_inst_imm (code [-2]) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
3986                 /* or reg, imm, %i0 */
3987                 int reg = sparc_inst_rs1 (code [-2]);
3988                 int imm = (((gint32)(sparc_inst_imm13 (code [-2]))) << 19) >> 19;
3989                 code [-2] = code [-1];
3990                 code --;
3991                 sparc_restore_imm (code, reg, imm, sparc_o0);
3992         }
3993         else
3994         if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && (!sparc_inst_imm (code [-2])) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
3995                 /* or reg, reg, %i0 */
3996                 int reg1 = sparc_inst_rs1 (code [-2]);
3997                 int reg2 = sparc_inst_rs2 (code [-2]);
3998                 code [-2] = code [-1];
3999                 code --;
4000                 sparc_restore (code, reg1, reg2, sparc_o0);
4001         }
4002         else
4003                 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
4004
4005         cfg->code_len = (guint8*)code - cfg->native_code;
4006
4007         g_assert (cfg->code_len < cfg->code_size);
4008
4009 }
4010
4011 void
4012 mono_arch_emit_exceptions (MonoCompile *cfg)
4013 {
4014         MonoJumpInfo *patch_info;
4015         guint32 *code;
4016         int nthrows = 0, i;
4017         int exc_count = 0;
4018         guint32 code_size;
4019         MonoClass *exc_classes [16];
4020         guint8 *exc_throw_start [16], *exc_throw_end [16];
4021
4022         /* Compute needed space */
4023         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4024                 if (patch_info->type == MONO_PATCH_INFO_EXC)
4025                         exc_count++;
4026         }
4027
4028         /*
4029          * make sure we have enough space for exceptions
4030          */
4031 #ifdef SPARCV9
4032         code_size = exc_count * (20 * 4);
4033 #else
4034         code_size = exc_count * 24;
4035 #endif
4036
4037         while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4038                 cfg->code_size *= 2;
4039                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4040                 mono_jit_stats.code_reallocs++;
4041         }
4042
4043         code = (guint32*)(cfg->native_code + cfg->code_len);
4044
4045         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4046                 switch (patch_info->type) {
4047                 case MONO_PATCH_INFO_EXC: {
4048                         MonoClass *exc_class;
4049                         guint32 *buf, *buf2;
4050                         guint32 throw_ip, type_idx;
4051                         gint32 disp;
4052
4053                         sparc_patch ((guint32*)(cfg->native_code + patch_info->ip.i), code);
4054
4055                         exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4056                         g_assert (exc_class);
4057                         type_idx = exc_class->type_token - MONO_TOKEN_TYPE_DEF;
4058                         throw_ip = patch_info->ip.i;
4059
4060                         /* Find a throw sequence for the same exception class */
4061                         for (i = 0; i < nthrows; ++i)
4062                                 if (exc_classes [i] == exc_class)
4063                                         break;
4064
4065                         if (i < nthrows) {
4066                                 guint32 throw_offset = (((guint8*)exc_throw_end [i] - cfg->native_code) - throw_ip) >> 2;
4067                                 if (!sparc_is_imm13 (throw_offset))
4068                                         sparc_set32 (code, throw_offset, sparc_o1);
4069
4070                                 disp = (exc_throw_start [i] - (guint8*)code) >> 2;
4071                                 g_assert (sparc_is_imm22 (disp));
4072                                 sparc_branch (code, 0, sparc_ba, disp);
4073                                 if (sparc_is_imm13 (throw_offset))
4074                                         sparc_set32 (code, throw_offset, sparc_o1);
4075                                 else
4076                                         sparc_nop (code);
4077                                 patch_info->type = MONO_PATCH_INFO_NONE;
4078                         }
4079                         else {
4080                                 /* Emit the template for setting o1 */
4081                                 buf = code;
4082                                 if (sparc_is_imm13 (((((guint8*)code - cfg->native_code) - throw_ip) >> 2) - 8))
4083                                         /* Can use a short form */
4084                                         sparc_nop (code);
4085                                 else
4086                                         sparc_set_template (code, sparc_o1);
4087                                 buf2 = code;
4088
4089                                 if (nthrows < 16) {
4090                                         exc_classes [nthrows] = exc_class;
4091                                         exc_throw_start [nthrows] = (guint8*)code;
4092                                 }
4093
4094                                 /*
4095                                 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
4096                                 EMIT_CALL();
4097                                 */
4098
4099                                 /* first arg = type token */
4100                                 /* Pass the type index to reduce the size of the sparc_set */
4101                                 if (!sparc_is_imm13 (type_idx))
4102                                         sparc_set32 (code, type_idx, sparc_o0);
4103
4104                                 /* second arg = offset between the throw ip and the current ip */
4105                                 /* On sparc, the saved ip points to the call instruction */
4106                                 disp = (((guint8*)code - cfg->native_code) - throw_ip) >> 2;
4107                                 sparc_set32 (buf, disp, sparc_o1);
4108                                 while (buf < buf2)
4109                                         sparc_nop (buf);
4110
4111                                 if (nthrows < 16) {
4112                                         exc_throw_end [nthrows] = (guint8*)code;
4113                                         nthrows ++;
4114                                 }
4115
4116                                 patch_info->data.name = "mono_arch_throw_corlib_exception";
4117                                 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4118                                 patch_info->ip.i = (guint8*)code - cfg->native_code;
4119
4120                                 EMIT_CALL ();
4121
4122                                 if (sparc_is_imm13 (type_idx)) {
4123                                         /* Put it into the delay slot */
4124                                         code --;
4125                                         buf = code;
4126                                         sparc_set32 (code, type_idx, sparc_o0);
4127                                         g_assert (code - buf == 1);
4128                                 }
4129                         }
4130                         break;
4131                 }
4132                 default:
4133                         /* do nothing */
4134                         break;
4135                 }
4136         }
4137
4138         cfg->code_len = (guint8*)code - cfg->native_code;
4139
4140         g_assert (cfg->code_len < cfg->code_size);
4141
4142 }
4143
4144 gboolean lmf_addr_key_inited = FALSE;
4145
4146 #ifdef MONO_SPARC_THR_TLS
4147 thread_key_t lmf_addr_key;
4148 #else
4149 pthread_key_t lmf_addr_key;
4150 #endif
4151
4152 gpointer
4153 mono_arch_get_lmf_addr (void)
4154 {
4155         /* This is perf critical so we bypass the IO layer */
4156         /* The thr_... functions seem to be somewhat faster */
4157 #ifdef MONO_SPARC_THR_TLS
4158         gpointer res;
4159         thr_getspecific (lmf_addr_key, &res);
4160         return res;
4161 #else
4162         return pthread_getspecific (lmf_addr_key);
4163 #endif
4164 }
4165
4166 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4167
4168 /*
4169  * There seems to be no way to determine stack boundaries under solaris,
4170  * so it's not possible to determine whenever a SIGSEGV is caused by stack
4171  * overflow or not.
4172  */
4173 #error "--with-sigaltstack=yes not supported on solaris"
4174
4175 #endif
4176
4177 void
4178 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
4179 {
4180         if (!lmf_addr_key_inited) {
4181                 int res;
4182
4183                 lmf_addr_key_inited = TRUE;
4184
4185 #ifdef MONO_SPARC_THR_TLS
4186                 res = thr_keycreate (&lmf_addr_key, NULL);
4187 #else
4188                 res = pthread_key_create (&lmf_addr_key, NULL);
4189 #endif
4190                 g_assert (res == 0);
4191
4192         }
4193
4194 #ifdef MONO_SPARC_THR_TLS
4195         thr_setspecific (lmf_addr_key, &tls->lmf);
4196 #else
4197         pthread_setspecific (lmf_addr_key, &tls->lmf);
4198 #endif
4199 }
4200
4201 void
4202 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4203 {
4204 }
4205
4206 void
4207 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *call, int this_reg, int this_type, int vt_reg)
4208 {
4209         int this_out_reg = sparc_o0;
4210
4211         if (vt_reg != -1) {
4212 #ifdef SPARCV9
4213                 MonoInst *ins;
4214                 MONO_INST_NEW (cfg, ins, OP_MOVE);
4215                 ins->sreg1 = vt_reg;
4216                 ins->dreg = mono_regstate_next_int (cfg->rs);
4217                 mono_bblock_add_inst (cfg->cbb, ins);
4218
4219                 mono_call_inst_add_outarg_reg (cfg, call, ins->dreg, sparc_o0, FALSE);
4220
4221                 this_out_reg = sparc_o1;
4222 #else
4223                 /* Set the 'struct/union return pointer' location on the stack */
4224                 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, 64, vt_reg);
4225 #endif
4226         }
4227
4228         /* add the this argument */
4229         if (this_reg != -1) {
4230                 MonoInst *this;
4231                 MONO_INST_NEW (cfg, this, OP_MOVE);
4232                 this->type = this_type;
4233                 this->sreg1 = this_reg;
4234                 this->dreg = mono_regstate_next_int (cfg->rs);
4235                 mono_bblock_add_inst (cfg->cbb, this);
4236
4237                 mono_call_inst_add_outarg_reg (cfg, call, this->dreg, this_out_reg, FALSE);
4238         }
4239 }
4240
4241
4242 MonoInst*
4243 mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4244 {
4245         MonoInst *ins = NULL;
4246
4247         return ins;
4248 }
4249
4250 /*
4251  * mono_arch_get_argument_info:
4252  * @csig:  a method signature
4253  * @param_count: the number of parameters to consider
4254  * @arg_info: an array to store the result infos
4255  *
4256  * Gathers information on parameters such as size, alignment and
4257  * padding. arg_info should be large enought to hold param_count + 1 entries.
4258  *
4259  * Returns the size of the activation frame.
4260  */
4261 int
4262 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
4263 {
4264         int k, align;
4265         CallInfo *cinfo;
4266         ArgInfo *ainfo;
4267
4268         cinfo = get_call_info (NULL, csig, FALSE);
4269
4270         if (csig->hasthis) {
4271                 ainfo = &cinfo->args [0];
4272                 arg_info [0].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4273         }
4274
4275         for (k = 0; k < param_count; k++) {
4276                 ainfo = &cinfo->args [k + csig->hasthis];
4277
4278                 arg_info [k + 1].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4279                 arg_info [k + 1].size = mono_type_size (csig->params [k], &align);
4280         }
4281
4282         g_free (cinfo);
4283
4284         return 0;
4285 }
4286
4287 gboolean
4288 mono_arch_print_tree (MonoInst *tree, int arity)
4289 {
4290         return 0;
4291 }
4292
4293 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
4294 {
4295         return NULL;
4296 }
4297
4298 MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
4299 {
4300         return NULL;
4301 }
4302
4303 gpointer
4304 mono_arch_context_get_int_reg (MonoContext *ctx, int reg)
4305 {
4306         /* FIXME: implement */
4307         g_assert_not_reached ();
4308 }