2 * mini-sparc.c: Sparc backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
9 * Christopher Taylor (ct@gentoo.org)
10 * Mark Crichton (crichton@gimp.org)
11 * Zoltan Varga (vargaz@freemail.hu)
13 * (C) 2003 Ximian, Inc.
21 #include <sys/systeminfo.h>
28 #include <mono/metadata/appdomain.h>
29 #include <mono/metadata/debug-helpers.h>
30 #include <mono/metadata/tokentype.h>
31 #include <mono/utils/mono-math.h>
33 #include "mini-sparc.h"
35 #include "cpu-sparc.h"
36 #include "jit-icalls.h"
40 * Sparc V9 means two things:
41 * - the instruction set
44 * V9 instructions are only usable if the underlying processor is 64 bit. Most Sparc
45 * processors in use are 64 bit processors. The V9 ABI is only usable if the
46 * mono executable is a 64 bit executable. So it would make sense to use the 64 bit
47 * instructions without using the 64 bit ABI.
52 * - %i0..%i<n> hold the incoming arguments, these are never written by JITted
53 * code. Unused input registers are used for global register allocation.
54 * - %o0..%o5 and %l7 is used for local register allocation and passing arguments
55 * - %l0..%l6 is used for global register allocation
56 * - %o7 and %g1 is used as scratch registers in opcodes
57 * - all floating point registers are used for local register allocation except %f0.
58 * Only double precision registers are used.
60 * - fp registers %d0..%d30 are used for parameter passing, and %d32..%d62 are
61 * used for local allocation.
66 * - doubles and longs must be stored in dword aligned locations
70 * The following things are not implemented or do not work:
71 * - some fp arithmetic corner cases
72 * The following tests in mono/mini are expected to fail:
73 * - test_0_simple_double_casts
74 * This test casts (guint64)-1 to double and then back to guint64 again.
75 * Under x86, it returns 0, while under sparc it returns -1.
77 * In addition to this, the runtime requires the trunc function, or its
78 * solaris counterpart, aintl, to do some double->int conversions. If this
79 * function is not available, it is emulated somewhat, but the results can be
85 * - optimize sparc_set according to the memory model
86 * - when non-AOT compiling, compute patch targets immediately so we don't
87 * have to emit the 6 byte template.
89 * - struct arguments/returns
94 * - sparc_call_simple can't be used in a lot of places since the displacement
95 * might not fit into an imm30.
96 * - g1 can't be used in a lot of places since it is used as a scratch reg in
98 * - sparc_f0 can't be used as a scratch register on V9
99 * - the %d34..%d62 fp registers are encoded as: %dx = %f(x - 32 + 1), ie.
101 * - ldind.i4/u4 needs to sign extend/clear out upper word -> slows things down
102 * - ins->dreg can't be used as a scatch register in r4 opcodes since it might
103 * be a double precision register which has no single precision part.
104 * - passing/returning structs is hard to implement, because:
105 * - the spec is very hard to understand
106 * - it requires knowledge about the fields of structure, needs to handle
107 * nested structures etc.
111 * Possible optimizations:
112 * - delay slot scheduling
113 * - allocate large constants to registers
114 * - add more mul/div/rem optimizations
118 #define MONO_SPARC_THR_TLS 1
122 * There was a 64 bit bug in glib-2.2: g_bit_nth_msf (0, -1) would return 32,
123 * causing infinite loops in dominator computation. So glib-2.4 is required.
126 #if GLIB_MAJOR_VERSION == 2 && GLIB_MINOR_VERSION < 4
127 #error "glib 2.4 or later is required for 64 bit mode."
131 #define ALIGN_TO(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
133 #define SIGNAL_STACK_SIZE (64 * 1024)
135 #define STACK_BIAS MONO_SPARC_STACK_BIAS
139 /* %g1 is used by sparc_set */
140 #define GP_SCRATCH_REG sparc_g4
141 /* %f0 is used for parameter passing */
142 #define FP_SCRATCH_REG sparc_f30
143 #define ARGS_OFFSET (STACK_BIAS + 128)
147 #define FP_SCRATCH_REG sparc_f0
148 #define ARGS_OFFSET 68
149 #define GP_SCRATCH_REG sparc_g1
153 /* Whenever the CPU supports v9 instructions */
154 static gboolean sparcv9 = FALSE;
156 /* Whenever this is a 64bit executable */
158 static gboolean v64 = TRUE;
160 static gboolean v64 = FALSE;
163 static gpointer mono_arch_get_lmf_addr (void);
166 mono_arch_regname (int reg) {
167 static const char * rnames[] = {
168 "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
169 "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
170 "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
171 "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
172 "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
173 "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
174 "sparc_fp", "sparc_retadr"
176 if (reg >= 0 && reg < 32)
182 mono_arch_fregname (int reg) {
183 static const char *rnames [] = {
184 "sparc_f0", "sparc_f1", "sparc_f2", "sparc_f3", "sparc_f4",
185 "sparc_f5", "sparc_f6", "sparc_f7", "sparc_f8", "sparc_f9",
186 "sparc_f10", "sparc_f11", "sparc_f12", "sparc_f13", "sparc_f14",
187 "sparc_f15", "sparc_f16", "sparc_f17", "sparc_f18", "sparc_f19",
188 "sparc_f20", "sparc_f21", "sparc_f22", "sparc_f23", "sparc_f24",
189 "sparc_f25", "sparc_f26", "sparc_f27", "sparc_f28", "sparc_f29",
190 "sparc_f30", "sparc_f31"
193 if (reg >= 0 && reg < 32)
200 * Initialize the cpu to execute managed code.
203 mono_arch_cpu_init (void)
206 /* make sure sparcv9 is initialized for embedded use */
207 mono_arch_cpu_optimizazions(&dummy);
211 * Initialize architecture specific code.
214 mono_arch_init (void)
219 * Cleanup architecture specific code.
222 mono_arch_cleanup (void)
227 * This function returns the optimizations supported on this cpu.
230 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
238 if (!sysinfo (SI_ISALIST, buf, 1024))
239 g_assert_not_reached ();
241 /* From glibc. If the getpagesize is 8192, we're on sparc64, which
242 * (in)directly implies that we're a v9 or better.
243 * Improvements to this are greatly accepted...
244 * Also, we don't differentiate between v7 and v8. I sense SIGILL
245 * sniffing in my future.
247 if (getpagesize() == 8192)
248 strcpy (buf, "sparcv9");
250 strcpy (buf, "sparcv8");
254 * On some processors, the cmov instructions are even slower than the
257 if (strstr (buf, "sparcv9")) {
258 opts |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
262 *exclude_mask |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
268 #define flushi(addr) __asm__ __volatile__ ("iflush %0"::"r"(addr):"memory")
269 #else /* assume Sun's compiler */
270 static void flushi(void *addr)
277 void sync_instruction_memory(caddr_t addr, int len);
281 mono_arch_flush_icache (guint8 *code, gint size)
284 /* Hopefully this is optimized based on the actual CPU */
285 sync_instruction_memory (code, size);
287 gulong start = (gulong) code;
288 gulong end = start + size;
291 /* Sparcv9 chips only need flushes on 32 byte
292 * cacheline boundaries.
294 * Sparcv8 needs a flush every 8 bytes.
296 align = (sparcv9 ? 32 : 8);
298 start &= ~(align - 1);
299 end = (end + (align - 1)) & ~(align - 1);
301 while (start < end) {
303 __asm__ __volatile__ ("iflush %0"::"r"(start));
315 * Flush all register windows to memory. Every register window is saved to
316 * a 16 word area on the stack pointed to by its %sp register.
319 mono_sparc_flushw (void)
321 static guint32 start [64];
322 static int inited = 0;
324 static void (*flushw) (void);
329 sparc_save_imm (code, sparc_sp, -160, sparc_sp);
332 sparc_restore_simple (code);
334 g_assert ((code - start) < 64);
336 mono_arch_flush_icache ((guint8*)start, (guint8*)code - (guint8*)start);
338 flushw = (gpointer)start;
347 mono_arch_flush_register_windows (void)
349 mono_sparc_flushw ();
353 mono_arch_is_inst_imm (gint64 imm)
355 return sparc_is_imm13 (imm);
359 mono_sparc_is_v9 (void) {
364 mono_sparc_is_sparc64 (void) {
376 ArgInFloatReg, /* V9 only */
377 ArgInDoubleReg /* V9 only */
382 /* This needs to be offset by %i0 or %o0 depending on caller/callee */
385 guint32 vt_offset; /* for valuetypes */
403 add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean pair)
405 ainfo->offset = *stack_size;
408 if (*gr >= PARAM_REGS) {
409 ainfo->storage = ArgOnStack;
412 ainfo->storage = ArgInIReg;
417 /* Allways reserve stack space for parameters passed in registers */
418 (*stack_size) += sizeof (gpointer);
421 if (*gr < PARAM_REGS - 1) {
422 /* A pair of registers */
423 ainfo->storage = ArgInIRegPair;
427 else if (*gr >= PARAM_REGS) {
428 /* A pair of stack locations */
429 ainfo->storage = ArgOnStackPair;
432 ainfo->storage = ArgInSplitRegStack;
437 (*stack_size) += 2 * sizeof (gpointer);
443 #define FLOAT_PARAM_REGS 32
446 add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean single)
448 ainfo->offset = *stack_size;
451 if (*gr >= FLOAT_PARAM_REGS) {
452 ainfo->storage = ArgOnStack;
455 /* A single is passed in an even numbered fp register */
456 ainfo->storage = ArgInFloatReg;
457 ainfo->reg = *gr + 1;
462 if (*gr < FLOAT_PARAM_REGS) {
463 /* A double register */
464 ainfo->storage = ArgInDoubleReg;
469 ainfo->storage = ArgOnStack;
473 (*stack_size) += sizeof (gpointer);
481 * Obtain information about a call according to the calling convention.
482 * For V8, see the "System V ABI, Sparc Processor Supplement" Sparc V8 version
483 * document for more information.
484 * For V9, see the "Low Level System Information (64-bit psABI)" chapter in
485 * the 'Sparc Compliance Definition 2.4' document.
488 get_call_info (MonoCompile *cfg, MonoMethodSignature *sig, gboolean is_pinvoke)
491 int n = sig->hasthis + sig->param_count;
492 guint32 stack_size = 0;
495 MonoGenericSharingContext *gsctx = cfg ? cfg->generic_sharing_context : NULL;
497 cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
503 if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
504 /* The address of the return value is passed in %o0 */
505 add_general (&gr, &stack_size, &cinfo->ret, FALSE);
506 cinfo->ret.reg += sparc_i0;
512 add_general (&gr, &stack_size, cinfo->args + 0, FALSE);
514 if ((sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
517 /* Emit the signature cookie just before the implicit arguments */
518 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
521 for (i = 0; i < sig->param_count; ++i) {
522 ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
525 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
528 /* Emit the signature cookie just before the implicit arguments */
529 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
532 DEBUG(printf("param %d: ", i));
533 if (sig->params [i]->byref) {
534 DEBUG(printf("byref\n"));
536 add_general (&gr, &stack_size, ainfo, FALSE);
539 ptype = mono_type_get_underlying_type (sig->params [i]);
540 ptype = mini_get_basic_type_from_generic (gsctx, ptype);
541 switch (ptype->type) {
542 case MONO_TYPE_BOOLEAN:
545 add_general (&gr, &stack_size, ainfo, FALSE);
546 /* the value is in the ls byte */
547 ainfo->offset += sizeof (gpointer) - 1;
552 add_general (&gr, &stack_size, ainfo, FALSE);
553 /* the value is in the ls word */
554 ainfo->offset += sizeof (gpointer) - 2;
558 add_general (&gr, &stack_size, ainfo, FALSE);
559 /* the value is in the ls dword */
560 ainfo->offset += sizeof (gpointer) - 4;
565 case MONO_TYPE_FNPTR:
566 case MONO_TYPE_CLASS:
567 case MONO_TYPE_OBJECT:
568 case MONO_TYPE_STRING:
569 case MONO_TYPE_SZARRAY:
570 case MONO_TYPE_ARRAY:
571 add_general (&gr, &stack_size, ainfo, FALSE);
573 case MONO_TYPE_GENERICINST:
574 if (!mono_type_generic_inst_is_valuetype (sig->params [i])) {
575 add_general (&gr, &stack_size, ainfo, FALSE);
579 case MONO_TYPE_VALUETYPE:
584 add_general (&gr, &stack_size, ainfo, FALSE);
586 case MONO_TYPE_TYPEDBYREF:
587 add_general (&gr, &stack_size, ainfo, FALSE);
592 add_general (&gr, &stack_size, ainfo, FALSE);
594 add_general (&gr, &stack_size, ainfo, TRUE);
599 add_float (&fr, &stack_size, ainfo, TRUE);
602 /* single precision values are passed in integer registers */
603 add_general (&gr, &stack_size, ainfo, FALSE);
608 add_float (&fr, &stack_size, ainfo, FALSE);
611 /* double precision values are passed in a pair of registers */
612 add_general (&gr, &stack_size, ainfo, TRUE);
616 g_assert_not_reached ();
620 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
623 /* Emit the signature cookie just before the implicit arguments */
624 add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
628 ret_type = mono_type_get_underlying_type (sig->ret);
629 ret_type = mini_get_basic_type_from_generic (gsctx, ret_type);
630 switch (ret_type->type) {
631 case MONO_TYPE_BOOLEAN:
642 case MONO_TYPE_FNPTR:
643 case MONO_TYPE_CLASS:
644 case MONO_TYPE_OBJECT:
645 case MONO_TYPE_SZARRAY:
646 case MONO_TYPE_ARRAY:
647 case MONO_TYPE_STRING:
648 cinfo->ret.storage = ArgInIReg;
649 cinfo->ret.reg = sparc_i0;
656 cinfo->ret.storage = ArgInIReg;
657 cinfo->ret.reg = sparc_i0;
661 cinfo->ret.storage = ArgInIRegPair;
662 cinfo->ret.reg = sparc_i0;
669 cinfo->ret.storage = ArgInFReg;
670 cinfo->ret.reg = sparc_f0;
672 case MONO_TYPE_GENERICINST:
673 if (!mono_type_generic_inst_is_valuetype (sig->ret)) {
674 cinfo->ret.storage = ArgInIReg;
675 cinfo->ret.reg = sparc_i0;
681 case MONO_TYPE_VALUETYPE:
690 cinfo->ret.storage = ArgOnStack;
692 case MONO_TYPE_TYPEDBYREF:
695 /* Same as a valuetype with size 24 */
702 cinfo->ret.storage = ArgOnStack;
707 g_error ("Can't handle as return value 0x%x", sig->ret->type);
710 cinfo->stack_usage = stack_size;
711 cinfo->reg_usage = gr;
716 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
722 * FIXME: If an argument is allocated to a register, then load it from the
723 * stack in the prolog.
726 for (i = 0; i < cfg->num_varinfo; i++) {
727 MonoInst *ins = cfg->varinfo [i];
728 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
731 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
734 /* FIXME: Make arguments on stack allocateable to registers */
735 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode == OP_REGVAR) || (ins->opcode == OP_ARG))
738 if (mono_is_regsize_var (ins->inst_vtype)) {
739 g_assert (MONO_VARINFO (cfg, i)->reg == -1);
740 g_assert (i == vmv->idx);
742 vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
750 mono_arch_get_global_int_regs (MonoCompile *cfg)
754 MonoMethodSignature *sig;
757 sig = mono_method_signature (cfg->method);
759 cinfo = get_call_info (cfg, sig, FALSE);
761 /* Use unused input registers */
762 for (i = cinfo->reg_usage; i < 6; ++i)
763 regs = g_list_prepend (regs, GUINT_TO_POINTER (sparc_i0 + i));
765 /* Use %l0..%l6 as global registers */
766 for (i = sparc_l0; i < sparc_l7; ++i)
767 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
775 * mono_arch_regalloc_cost:
777 * Return the cost, in number of memory references, of the action of
778 * allocating the variable VMV into a register during global register
782 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
788 * Set var information according to the calling convention. sparc version.
789 * The locals var stuff should most likely be split in another method.
793 mono_arch_allocate_vars (MonoCompile *cfg)
795 MonoMethodSignature *sig;
796 MonoMethodHeader *header;
798 int i, offset, size, align, curinst;
801 header = mono_method_get_header (cfg->method);
803 sig = mono_method_signature (cfg->method);
805 cinfo = get_call_info (cfg, sig, FALSE);
807 if (sig->ret->type != MONO_TYPE_VOID) {
808 switch (cinfo->ret.storage) {
811 cfg->ret->opcode = OP_REGVAR;
812 cfg->ret->inst_c0 = cinfo->ret.reg;
815 if (((sig->ret->type == MONO_TYPE_I8) || (sig->ret->type == MONO_TYPE_U8))) {
816 MonoInst *low = get_vreg_to_inst (cfg, cfg->ret->dreg + 1);
817 MonoInst *high = get_vreg_to_inst (cfg, cfg->ret->dreg + 2);
819 low->opcode = OP_REGVAR;
820 low->dreg = cinfo->ret.reg + 1;
821 high->opcode = OP_REGVAR;
822 high->dreg = cinfo->ret.reg;
824 cfg->ret->opcode = OP_REGVAR;
825 cfg->ret->inst_c0 = cinfo->ret.reg;
829 g_assert_not_reached ();
832 cfg->vret_addr->opcode = OP_REGOFFSET;
833 cfg->vret_addr->inst_basereg = sparc_fp;
834 cfg->vret_addr->inst_offset = 64;
840 cfg->ret->dreg = cfg->ret->inst_c0;
844 * We use the ABI calling conventions for managed code as well.
845 * Exception: valuetypes are never returned in registers on V9.
846 * FIXME: Use something more optimized.
849 /* Locals are allocated backwards from %fp */
850 cfg->frame_reg = sparc_fp;
854 * Reserve a stack slot for holding information used during exception
857 if (header->num_clauses)
858 offset += sizeof (gpointer) * 2;
860 if (cfg->method->save_lmf) {
861 offset += sizeof (MonoLMF);
862 cfg->arch.lmf_offset = offset;
865 curinst = cfg->locals_start;
866 for (i = curinst; i < cfg->num_varinfo; ++i) {
867 inst = cfg->varinfo [i];
869 if ((inst->opcode == OP_REGVAR) || (inst->opcode == OP_REGOFFSET)) {
870 //g_print ("allocating local %d to %s\n", i, mono_arch_regname (inst->dreg));
874 if (inst->flags & MONO_INST_IS_DEAD)
877 /* inst->backend.is_pinvoke indicates native sized value types, this is used by the
878 * pinvoke wrappers when they call functions returning structure */
879 if (inst->backend.is_pinvoke && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
880 size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
882 size = mini_type_stack_size (cfg->generic_sharing_context, inst->inst_vtype, &align);
885 * This is needed since structures containing doubles must be doubleword
887 * FIXME: Do this only if needed.
889 if (MONO_TYPE_ISSTRUCT (inst->inst_vtype))
893 * variables are accessed as negative offsets from %fp, so increase
894 * the offset before assigning it to a variable
899 offset &= ~(align - 1);
900 inst->opcode = OP_REGOFFSET;
901 inst->inst_basereg = sparc_fp;
902 inst->inst_offset = STACK_BIAS + -offset;
904 //g_print ("allocating local %d to [%s - %d]\n", i, mono_arch_regname (inst->inst_basereg), - inst->inst_offset);
907 if (sig->call_convention == MONO_CALL_VARARG) {
908 cfg->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
911 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
912 inst = cfg->args [i];
913 if (inst->opcode != OP_REGVAR) {
914 ArgInfo *ainfo = &cinfo->args [i];
915 gboolean inreg = TRUE;
919 if (sig->hasthis && (i == 0))
920 arg_type = &mono_defaults.object_class->byval_arg;
922 arg_type = sig->params [i - sig->hasthis];
925 if (!arg_type->byref && ((arg_type->type == MONO_TYPE_R4)
926 || (arg_type->type == MONO_TYPE_R8)))
928 * Since float arguments are passed in integer registers, we need to
929 * save them to the stack in the prolog.
934 /* FIXME: Allocate volatile arguments to registers */
935 /* FIXME: This makes the argument holding a vtype address into volatile */
936 if (inst->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT))
939 if (MONO_TYPE_ISSTRUCT (arg_type))
940 /* FIXME: this isn't needed */
943 inst->opcode = OP_REGOFFSET;
946 storage = ArgOnStack;
948 storage = ainfo->storage;
952 inst->opcode = OP_REGVAR;
953 inst->dreg = sparc_i0 + ainfo->reg;
956 if (inst->type == STACK_I8) {
957 MonoInst *low = get_vreg_to_inst (cfg, inst->dreg + 1);
958 MonoInst *high = get_vreg_to_inst (cfg, inst->dreg + 2);
960 low->opcode = OP_REGVAR;
961 low->dreg = sparc_i0 + ainfo->reg + 1;
962 high->opcode = OP_REGVAR;
963 high->dreg = sparc_i0 + ainfo->reg;
965 inst->opcode = OP_REGVAR;
966 inst->dreg = sparc_i0 + ainfo->reg;
971 * Since float regs are volatile, we save the arguments to
972 * the stack in the prolog.
973 * FIXME: Avoid this if the method contains no calls.
977 case ArgInSplitRegStack:
978 /* Split arguments are saved to the stack in the prolog */
979 inst->opcode = OP_REGOFFSET;
980 /* in parent frame */
981 inst->inst_basereg = sparc_fp;
982 inst->inst_offset = ainfo->offset + ARGS_OFFSET;
984 if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
986 * It is very hard to load doubles from non-doubleword aligned
987 * memory locations. So if the offset is misaligned, we copy the
988 * argument to a stack location in the prolog.
990 if ((inst->inst_offset - STACK_BIAS) % 8) {
991 inst->inst_basereg = sparc_fp;
995 offset &= ~(align - 1);
996 inst->inst_offset = STACK_BIAS + -offset;
1005 if (MONO_TYPE_ISSTRUCT (arg_type)) {
1006 /* Add a level of indirection */
1008 * It would be easier to add OP_LDIND_I here, but ldind_i instructions
1009 * are destructively modified in a lot of places in inssel.brg.
1012 MONO_INST_NEW (cfg, indir, 0);
1014 inst->opcode = OP_VTARG_ADDR;
1015 inst->inst_left = indir;
1020 /* Add a properly aligned dword for use by int<->float conversion opcodes */
1022 offset = ALIGN_TO (offset, 8);
1023 cfg->arch.float_spill_slot_offset = offset;
1026 * spillvars are stored between the normal locals and the storage reserved
1030 cfg->stack_offset = offset;
1036 mono_arch_create_vars (MonoCompile *cfg)
1038 MonoMethodSignature *sig;
1040 sig = mono_method_signature (cfg->method);
1042 if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
1043 cfg->vret_addr = mono_compile_create_var (cfg, &mono_defaults.int_class->byval_arg, OP_ARG);
1044 if (G_UNLIKELY (cfg->verbose_level > 1)) {
1045 printf ("vret_addr = ");
1046 mono_print_ins (cfg->vret_addr);
1052 add_outarg_reg (MonoCompile *cfg, MonoCallInst *call, ArgStorage storage, int reg, guint32 sreg)
1056 MONO_INST_NEW (cfg, arg, 0);
1062 arg->opcode = OP_MOVE;
1063 arg->dreg = mono_alloc_ireg (cfg);
1065 mono_call_inst_add_outarg_reg (cfg, call, arg->dreg, reg, FALSE);
1068 arg->opcode = OP_FMOVE;
1069 arg->dreg = mono_alloc_freg (cfg);
1071 mono_call_inst_add_outarg_reg (cfg, call, arg->dreg, reg, TRUE);
1074 g_assert_not_reached ();
1077 MONO_ADD_INS (cfg->cbb, arg);
1081 add_outarg_load (MonoCompile *cfg, MonoCallInst *call, int opcode, int basereg, int offset, int reg)
1083 int dreg = mono_alloc_ireg (cfg);
1085 MONO_EMIT_NEW_LOAD_MEMBASE (cfg, dreg, sparc_sp, offset);
1087 mono_call_inst_add_outarg_reg (cfg, call, dreg, reg, FALSE);
1091 emit_pass_long (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoInst *in)
1093 int offset = ARGS_OFFSET + ainfo->offset;
1095 switch (ainfo->storage) {
1097 add_outarg_reg (cfg, call, ArgInIReg, sparc_o0 + ainfo->reg + 1, in->dreg + 1);
1098 add_outarg_reg (cfg, call, ArgInIReg, sparc_o0 + ainfo->reg, in->dreg + 2);
1100 case ArgOnStackPair:
1101 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, offset, in->dreg + 2);
1102 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, offset + 4, in->dreg + 1);
1104 case ArgInSplitRegStack:
1105 add_outarg_reg (cfg, call, ArgInIReg, sparc_o0 + ainfo->reg, in->dreg + 2);
1106 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, offset + 4, in->dreg + 1);
1109 g_assert_not_reached ();
1114 emit_pass_double (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoInst *in)
1116 int offset = ARGS_OFFSET + ainfo->offset;
1118 switch (ainfo->storage) {
1120 /* floating-point <-> integer transfer must go through memory */
1121 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER8_MEMBASE_REG, sparc_sp, offset, in->dreg);
1123 /* Load into a register pair */
1124 add_outarg_load (cfg, call, OP_LOADI4_MEMBASE, sparc_sp, offset, sparc_o0 + ainfo->reg);
1125 add_outarg_load (cfg, call, OP_LOADI4_MEMBASE, sparc_sp, offset + 4, sparc_o0 + ainfo->reg + 1);
1127 case ArgOnStackPair:
1128 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER8_MEMBASE_REG, sparc_sp, offset, in->dreg);
1130 case ArgInSplitRegStack:
1131 /* floating-point <-> integer transfer must go through memory */
1132 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER8_MEMBASE_REG, sparc_sp, offset, in->dreg);
1133 /* Load most significant word into register */
1134 add_outarg_load (cfg, call, OP_LOADI4_MEMBASE, sparc_sp, offset, sparc_o0 + ainfo->reg);
1137 g_assert_not_reached ();
1142 emit_pass_float (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoInst *in)
1144 int offset = ARGS_OFFSET + ainfo->offset;
1146 switch (ainfo->storage) {
1148 /* floating-point <-> integer transfer must go through memory */
1149 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER4_MEMBASE_REG, sparc_sp, offset, in->dreg);
1150 add_outarg_load (cfg, call, OP_LOADI4_MEMBASE, sparc_sp, offset, sparc_o0 + ainfo->reg);
1153 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER4_MEMBASE_REG, sparc_sp, offset, in->dreg);
1156 g_assert_not_reached ();
1161 emit_pass_other (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoType *arg_type, MonoInst *in);
1164 emit_pass_vtype (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo, ArgInfo *ainfo, MonoType *arg_type, MonoInst *in, gboolean pinvoke)
1167 guint32 align, offset, pad, size;
1169 if (arg_type->type == MONO_TYPE_TYPEDBYREF) {
1170 size = sizeof (MonoTypedRef);
1171 align = sizeof (gpointer);
1174 size = mono_type_native_stack_size (&in->klass->byval_arg, &align);
1177 * Other backends use mono_type_stack_size (), but that
1178 * aligns the size to 8, which is larger than the size of
1179 * the source, leading to reads of invalid memory if the
1180 * source is at the end of address space.
1182 size = mono_class_value_size (in->klass, &align);
1185 /* The first 6 argument locations are reserved */
1186 if (cinfo->stack_usage < 6 * sizeof (gpointer))
1187 cinfo->stack_usage = 6 * sizeof (gpointer);
1189 offset = ALIGN_TO ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage, align);
1190 pad = offset - ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage);
1192 cinfo->stack_usage += size;
1193 cinfo->stack_usage += pad;
1196 * We use OP_OUTARG_VT to copy the valuetype to a stack location, then
1197 * use the normal OUTARG opcodes to pass the address of the location to
1201 MONO_INST_NEW (cfg, arg, OP_OUTARG_VT);
1202 arg->sreg1 = in->dreg;
1203 arg->klass = in->klass;
1204 arg->backend.size = size;
1205 arg->inst_p0 = call;
1206 arg->inst_p1 = mono_mempool_alloc (cfg->mempool, sizeof (ArgInfo));
1207 memcpy (arg->inst_p1, ainfo, sizeof (ArgInfo));
1208 ((ArgInfo*)(arg->inst_p1))->offset = STACK_BIAS + offset;
1209 MONO_ADD_INS (cfg->cbb, arg);
1211 MONO_INST_NEW (cfg, arg, OP_ADD_IMM);
1212 arg->dreg = mono_alloc_preg (cfg);
1213 arg->sreg1 = sparc_sp;
1214 arg->inst_imm = STACK_BIAS + offset;
1215 MONO_ADD_INS (cfg->cbb, arg);
1217 emit_pass_other (cfg, call, ainfo, NULL, arg);
1222 emit_pass_other (MonoCompile *cfg, MonoCallInst *call, ArgInfo *ainfo, MonoType *arg_type, MonoInst *in)
1224 int offset = ARGS_OFFSET + ainfo->offset;
1227 switch (ainfo->storage) {
1229 add_outarg_reg (cfg, call, ArgInIReg, sparc_o0 + ainfo->reg, in->dreg);
1236 opcode = OP_STOREI1_MEMBASE_REG;
1237 else if (offset & 0x2)
1238 opcode = OP_STOREI2_MEMBASE_REG;
1240 opcode = OP_STOREI4_MEMBASE_REG;
1241 MONO_EMIT_NEW_STORE_MEMBASE (cfg, opcode, sparc_sp, offset, in->dreg);
1245 g_assert_not_reached ();
1250 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo)
1252 MonoMethodSignature *tmp_sig;
1255 * mono_ArgIterator_Setup assumes the signature cookie is
1256 * passed first and all the arguments which were before it are
1257 * passed on the stack after the signature. So compensate by
1258 * passing a different signature.
1260 tmp_sig = mono_metadata_signature_dup (call->signature);
1261 tmp_sig->param_count -= call->signature->sentinelpos;
1262 tmp_sig->sentinelpos = 0;
1263 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1265 /* FIXME: Add support for signature tokens to AOT */
1266 cfg->disable_aot = TRUE;
1267 /* We allways pass the signature on the stack for simplicity */
1268 MONO_EMIT_NEW_STORE_MEMBASE_IMM (cfg, OP_STORE_MEMBASE_IMM, sparc_sp, ARGS_OFFSET + cinfo->sig_cookie.offset, tmp_sig);
1272 mono_arch_emit_call (MonoCompile *cfg, MonoCallInst *call)
1275 MonoMethodSignature *sig;
1279 guint32 extra_space = 0;
1281 sig = call->signature;
1282 n = sig->param_count + sig->hasthis;
1284 cinfo = get_call_info (cfg, sig, sig->pinvoke);
1286 if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
1287 /* Set the 'struct/union return pointer' location on the stack */
1288 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, 64, call->vret_var->dreg);
1291 for (i = 0; i < n; ++i) {
1294 ainfo = cinfo->args + i;
1296 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
1297 /* Emit the signature cookie just before the first implicit argument */
1298 emit_sig_cookie (cfg, call, cinfo);
1301 in = call->args [i];
1303 if (sig->hasthis && (i == 0))
1304 arg_type = &mono_defaults.object_class->byval_arg;
1306 arg_type = sig->params [i - sig->hasthis];
1308 if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(sig->params [i - sig->hasthis])))
1309 emit_pass_vtype (cfg, call, cinfo, ainfo, arg_type, in, sig->pinvoke);
1310 else if (!arg_type->byref && ((arg_type->type == MONO_TYPE_I8) || (arg_type->type == MONO_TYPE_U8)))
1311 emit_pass_long (cfg, call, ainfo, in);
1312 else if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8))
1313 emit_pass_double (cfg, call, ainfo, in);
1314 else if (!arg_type->byref && (arg_type->type == MONO_TYPE_R4))
1315 emit_pass_float (cfg, call, ainfo, in);
1317 emit_pass_other (cfg, call, ainfo, arg_type, in);
1320 /* Handle the case where there are no implicit arguments */
1321 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sig->sentinelpos)) {
1322 emit_sig_cookie (cfg, call, cinfo);
1325 call->stack_usage = cinfo->stack_usage + extra_space;
1331 mono_arch_emit_outarg_vt (MonoCompile *cfg, MonoInst *ins, MonoInst *src)
1333 ArgInfo *ainfo = (ArgInfo*)ins->inst_p1;
1334 int size = ins->backend.size;
1336 mini_emit_memcpy (cfg, sparc_sp, ainfo->offset, src->dreg, 0, size, 0);
1340 mono_arch_emit_setret (MonoCompile *cfg, MonoMethod *method, MonoInst *val)
1342 CallInfo *cinfo = get_call_info (cfg, mono_method_signature (method), FALSE);
1344 switch (cinfo->ret.storage) {
1346 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg, val->dreg);
1349 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg, val->dreg + 2);
1350 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg + 1, val->dreg + 1);
1353 if (mono_method_signature (method)->ret->type == MONO_TYPE_R4)
1354 MONO_EMIT_NEW_UNALU (cfg, OP_SETFRET, cfg->ret->dreg, val->dreg);
1356 MONO_EMIT_NEW_UNALU (cfg, OP_FMOVE, cfg->ret->dreg, val->dreg);
1359 g_assert_not_reached ();
1365 int cond_to_sparc_cond [][3] = {
1366 {sparc_be, sparc_be, sparc_fbe},
1367 {sparc_bne, sparc_bne, 0},
1368 {sparc_ble, sparc_ble, sparc_fble},
1369 {sparc_bge, sparc_bge, sparc_fbge},
1370 {sparc_bl, sparc_bl, sparc_fbl},
1371 {sparc_bg, sparc_bg, sparc_fbg},
1372 {sparc_bleu, sparc_bleu, 0},
1373 {sparc_beu, sparc_beu, 0},
1374 {sparc_blu, sparc_blu, sparc_fbl},
1375 {sparc_bgu, sparc_bgu, sparc_fbg}
1378 /* Map opcode to the sparc condition codes */
1379 static inline SparcCond
1380 opcode_to_sparc_cond (int opcode)
1386 case OP_COND_EXC_OV:
1387 case OP_COND_EXC_IOV:
1390 case OP_COND_EXC_IC:
1392 case OP_COND_EXC_NO:
1393 case OP_COND_EXC_NC:
1396 rel = mono_opcode_to_cond (opcode);
1397 t = mono_opcode_to_type (opcode, -1);
1399 return cond_to_sparc_cond [rel][t];
1406 #define COMPUTE_DISP(ins) \
1407 if (ins->inst_true_bb->native_offset) \
1408 disp = (ins->inst_true_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2; \
1411 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1415 #define DEFAULT_ICC sparc_xcc_short
1417 #define DEFAULT_ICC sparc_icc_short
1421 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) \
1425 COMPUTE_DISP(ins); \
1426 predict = (disp != 0) ? 1 : 0; \
1427 g_assert (sparc_is_imm19 (disp)); \
1428 sparc_branchp (code, (annul), cond, icc, (predict), disp); \
1429 if (filldelay) sparc_nop (code); \
1431 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_ICC ((ins), (cond), (annul), (filldelay), (sparc_xcc_short))
1432 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) \
1436 COMPUTE_DISP(ins); \
1437 predict = (disp != 0) ? 1 : 0; \
1438 g_assert (sparc_is_imm19 (disp)); \
1439 sparc_fbranch (code, (annul), cond, disp); \
1440 if (filldelay) sparc_nop (code); \
1443 #define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) g_assert_not_reached ()
1444 #define EMIT_COND_BRANCH_GENERAL(ins,bop,cond,annul,filldelay) \
1447 COMPUTE_DISP(ins); \
1448 g_assert (sparc_is_imm22 (disp)); \
1449 sparc_ ## bop (code, (annul), cond, disp); \
1450 if (filldelay) sparc_nop (code); \
1452 #define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),branch,(cond),annul,filldelay)
1453 #define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),fbranch,(cond),annul,filldelay)
1456 #define EMIT_COND_BRANCH_PREDICTED(ins,cond,annul,filldelay) \
1460 COMPUTE_DISP(ins); \
1461 predict = (disp != 0) ? 1 : 0; \
1462 g_assert (sparc_is_imm19 (disp)); \
1463 sparc_branchp (code, (annul), (cond), DEFAULT_ICC, (predict), disp); \
1464 if (filldelay) sparc_nop (code); \
1467 #define EMIT_COND_BRANCH_BPR(ins,bop,predict,annul,filldelay) \
1470 COMPUTE_DISP(ins); \
1471 g_assert (sparc_is_imm22 (disp)); \
1472 sparc_ ## bop (code, (annul), (predict), ins->sreg1, disp); \
1473 if (filldelay) sparc_nop (code); \
1476 /* emit an exception if condition is fail */
1478 * We put the exception throwing code out-of-line, at the end of the method
1480 #define EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,filldelay,icc) do { \
1481 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code, \
1482 MONO_PATCH_INFO_EXC, sexc_name); \
1483 if (sparcv9 && ((icc) != sparc_icc_short)) { \
1484 sparc_branchp (code, 0, (cond), (icc), 0, 0); \
1487 sparc_branch (code, 0, cond, 0); \
1489 if (filldelay) sparc_nop (code); \
1492 #define EMIT_COND_SYSTEM_EXCEPTION(ins,cond,sexc_name) EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,TRUE,DEFAULT_ICC)
1494 #define EMIT_COND_SYSTEM_EXCEPTION_BPR(ins,bop,sexc_name) do { \
1495 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code, \
1496 MONO_PATCH_INFO_EXC, sexc_name); \
1497 sparc_ ## bop (code, FALSE, FALSE, ins->sreg1, 0); \
1501 #define EMIT_ALU_IMM(ins,op,setcc) do { \
1502 if (sparc_is_imm13 ((ins)->inst_imm)) \
1503 sparc_ ## op ## _imm (code, (setcc), (ins)->sreg1, ins->inst_imm, (ins)->dreg); \
1505 sparc_set (code, ins->inst_imm, sparc_o7); \
1506 sparc_ ## op (code, (setcc), (ins)->sreg1, sparc_o7, (ins)->dreg); \
1510 #define EMIT_LOAD_MEMBASE(ins,op) do { \
1511 if (sparc_is_imm13 (ins->inst_offset)) \
1512 sparc_ ## op ## _imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg); \
1514 sparc_set (code, ins->inst_offset, sparc_o7); \
1515 sparc_ ## op (code, ins->inst_basereg, sparc_o7, ins->dreg); \
1520 #define EMIT_STORE_MEMBASE_IMM(ins,op) do { \
1522 if (ins->inst_imm == 0) \
1525 sparc_set (code, ins->inst_imm, sparc_o7); \
1528 if (!sparc_is_imm13 (ins->inst_offset)) { \
1529 sparc_set (code, ins->inst_offset, GP_SCRATCH_REG); \
1530 sparc_ ## op (code, sreg, ins->inst_destbasereg, GP_SCRATCH_REG); \
1533 sparc_ ## op ## _imm (code, sreg, ins->inst_destbasereg, ins->inst_offset); \
1536 #define EMIT_STORE_MEMBASE_REG(ins,op) do { \
1537 if (!sparc_is_imm13 (ins->inst_offset)) { \
1538 sparc_set (code, ins->inst_offset, sparc_o7); \
1539 sparc_ ## op (code, ins->sreg1, ins->inst_destbasereg, sparc_o7); \
1542 sparc_ ## op ## _imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset); \
1545 #define EMIT_CALL() do { \
1547 sparc_set_template (code, sparc_o7); \
1548 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7); \
1551 sparc_call_simple (code, 0); \
1557 * A call template is 7 instructions long, so we want to avoid it if possible.
1560 emit_call (MonoCompile *cfg, guint32 *code, guint32 patch_type, gconstpointer data)
1564 /* FIXME: This only works if the target method is already compiled */
1565 if (0 && v64 && !cfg->compile_aot) {
1566 MonoJumpInfo patch_info;
1568 patch_info.type = patch_type;
1569 patch_info.data.target = data;
1571 target = mono_resolve_patch_target (cfg->method, cfg->domain, NULL, &patch_info, FALSE);
1573 /* FIXME: Add optimizations if the target is close enough */
1574 sparc_set (code, target, sparc_o7);
1575 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7);
1579 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, patch_type, data);
1587 mono_arch_peephole_pass_1 (MonoCompile *cfg, MonoBasicBlock *bb)
1592 mono_arch_peephole_pass_2 (MonoCompile *cfg, MonoBasicBlock *bb)
1594 MonoInst *ins, *n, *last_ins = NULL;
1597 MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
1598 switch (ins->opcode) {
1600 /* remove unnecessary multiplication with 1 */
1601 if (ins->inst_imm == 1) {
1602 if (ins->dreg != ins->sreg1) {
1603 ins->opcode = OP_MOVE;
1605 MONO_DELETE_INS (bb, ins);
1611 case OP_LOAD_MEMBASE:
1612 case OP_LOADI4_MEMBASE:
1614 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1615 * OP_LOAD_MEMBASE offset(basereg), reg
1617 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
1618 || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1619 ins->inst_basereg == last_ins->inst_destbasereg &&
1620 ins->inst_offset == last_ins->inst_offset) {
1621 if (ins->dreg == last_ins->sreg1) {
1622 MONO_DELETE_INS (bb, ins);
1625 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1626 ins->opcode = OP_MOVE;
1627 ins->sreg1 = last_ins->sreg1;
1631 * Note: reg1 must be different from the basereg in the second load
1632 * OP_LOAD_MEMBASE offset(basereg), reg1
1633 * OP_LOAD_MEMBASE offset(basereg), reg2
1635 * OP_LOAD_MEMBASE offset(basereg), reg1
1636 * OP_MOVE reg1, reg2
1638 } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1639 || last_ins->opcode == OP_LOAD_MEMBASE) &&
1640 ins->inst_basereg != last_ins->dreg &&
1641 ins->inst_basereg == last_ins->inst_basereg &&
1642 ins->inst_offset == last_ins->inst_offset) {
1644 if (ins->dreg == last_ins->dreg) {
1645 MONO_DELETE_INS (bb, ins);
1648 ins->opcode = OP_MOVE;
1649 ins->sreg1 = last_ins->dreg;
1652 //g_assert_not_reached ();
1656 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1657 * OP_LOAD_MEMBASE offset(basereg), reg
1659 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1660 * OP_ICONST reg, imm
1662 } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1663 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1664 ins->inst_basereg == last_ins->inst_destbasereg &&
1665 ins->inst_offset == last_ins->inst_offset) {
1666 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1667 ins->opcode = OP_ICONST;
1668 ins->inst_c0 = last_ins->inst_imm;
1669 g_assert_not_reached (); // check this rule
1674 case OP_LOADI1_MEMBASE:
1675 if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1676 ins->inst_basereg == last_ins->inst_destbasereg &&
1677 ins->inst_offset == last_ins->inst_offset) {
1678 if (ins->dreg == last_ins->sreg1) {
1679 MONO_DELETE_INS (bb, ins);
1682 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1683 ins->opcode = OP_MOVE;
1684 ins->sreg1 = last_ins->sreg1;
1688 case OP_LOADI2_MEMBASE:
1689 if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1690 ins->inst_basereg == last_ins->inst_destbasereg &&
1691 ins->inst_offset == last_ins->inst_offset) {
1692 if (ins->dreg == last_ins->sreg1) {
1693 MONO_DELETE_INS (bb, ins);
1696 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1697 ins->opcode = OP_MOVE;
1698 ins->sreg1 = last_ins->sreg1;
1702 case OP_STOREI4_MEMBASE_IMM:
1703 /* Convert pairs of 0 stores to a dword 0 store */
1704 /* Used when initializing temporaries */
1705 /* We know sparc_fp is dword aligned */
1706 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM) &&
1707 (ins->inst_destbasereg == last_ins->inst_destbasereg) &&
1708 (ins->inst_destbasereg == sparc_fp) &&
1709 (ins->inst_offset < 0) &&
1710 ((ins->inst_offset % 8) == 0) &&
1711 ((ins->inst_offset == last_ins->inst_offset - 4)) &&
1712 (ins->inst_imm == 0) &&
1713 (last_ins->inst_imm == 0)) {
1715 last_ins->opcode = OP_STOREI8_MEMBASE_IMM;
1716 last_ins->inst_offset = ins->inst_offset;
1717 MONO_DELETE_INS (bb, ins);
1728 case OP_COND_EXC_EQ:
1729 case OP_COND_EXC_GE:
1730 case OP_COND_EXC_GT:
1731 case OP_COND_EXC_LE:
1732 case OP_COND_EXC_LT:
1733 case OP_COND_EXC_NE_UN:
1735 * Convert compare with zero+branch to BRcc
1738 * This only works in 64 bit mode, since it examines all 64
1739 * bits of the register.
1740 * Only do this if the method is small since BPr only has a 16bit
1743 if (v64 && (mono_method_get_header (cfg->method)->code_size < 10000) && last_ins &&
1744 (last_ins->opcode == OP_COMPARE_IMM) &&
1745 (last_ins->inst_imm == 0)) {
1746 switch (ins->opcode) {
1748 ins->opcode = OP_SPARC_BRZ;
1751 ins->opcode = OP_SPARC_BRNZ;
1754 ins->opcode = OP_SPARC_BRLZ;
1757 ins->opcode = OP_SPARC_BRGZ;
1760 ins->opcode = OP_SPARC_BRGEZ;
1763 ins->opcode = OP_SPARC_BRLEZ;
1765 case OP_COND_EXC_EQ:
1766 ins->opcode = OP_SPARC_COND_EXC_EQZ;
1768 case OP_COND_EXC_GE:
1769 ins->opcode = OP_SPARC_COND_EXC_GEZ;
1771 case OP_COND_EXC_GT:
1772 ins->opcode = OP_SPARC_COND_EXC_GTZ;
1774 case OP_COND_EXC_LE:
1775 ins->opcode = OP_SPARC_COND_EXC_LEZ;
1777 case OP_COND_EXC_LT:
1778 ins->opcode = OP_SPARC_COND_EXC_LTZ;
1780 case OP_COND_EXC_NE_UN:
1781 ins->opcode = OP_SPARC_COND_EXC_NEZ;
1784 g_assert_not_reached ();
1786 ins->sreg1 = last_ins->sreg1;
1788 MONO_DELETE_INS (bb, ins);
1796 if (ins->dreg == ins->sreg1) {
1797 MONO_DELETE_INS (bb, ins);
1801 * OP_MOVE sreg, dreg
1802 * OP_MOVE dreg, sreg
1804 if (last_ins && last_ins->opcode == OP_MOVE &&
1805 ins->sreg1 == last_ins->dreg &&
1806 ins->dreg == last_ins->sreg1) {
1807 MONO_DELETE_INS (bb, ins);
1815 bb->last_ins = last_ins;
1819 mono_arch_decompose_long_opts (MonoCompile *cfg, MonoInst *ins)
1821 switch (ins->opcode) {
1823 MONO_EMIT_NEW_BIALU (cfg, OP_SUBCC, ins->dreg + 1, 0, ins->sreg1 + 1);
1824 MONO_EMIT_NEW_BIALU (cfg, OP_SBB, ins->dreg + 2, 0, ins->sreg1 + 2);
1833 mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1837 /* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
1840 sparc_patch (guint32 *code, const gpointer target)
1843 guint32 ins = *code;
1844 guint32 op = ins >> 30;
1845 guint32 op2 = (ins >> 22) & 0x7;
1846 guint32 rd = (ins >> 25) & 0x1f;
1847 guint8* target8 = (guint8*)target;
1848 gint64 disp = (target8 - (guint8*)code) >> 2;
1851 // g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
1853 if ((op == 0) && (op2 == 2)) {
1854 if (!sparc_is_imm22 (disp))
1857 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1859 else if ((op == 0) && (op2 == 1)) {
1860 if (!sparc_is_imm19 (disp))
1863 *code = ((ins >> 19) << 19) | (disp & 0x7ffff);
1865 else if ((op == 0) && (op2 == 3)) {
1866 if (!sparc_is_imm16 (disp))
1869 *code &= ~(0x180000 | 0x3fff);
1870 *code |= ((disp << 21) & (0x180000)) | (disp & 0x3fff);
1872 else if ((op == 0) && (op2 == 6)) {
1873 if (!sparc_is_imm22 (disp))
1876 *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
1878 else if ((op == 0) && (op2 == 4)) {
1879 guint32 ins2 = code [1];
1881 if (((ins2 >> 30) == 2) && (((ins2 >> 19) & 0x3f) == 2)) {
1882 /* sethi followed by or */
1884 sparc_set (p, target8, rd);
1885 while (p <= (code + 1))
1888 else if (ins2 == 0x01000000) {
1889 /* sethi followed by nop */
1891 sparc_set (p, target8, rd);
1892 while (p <= (code + 1))
1895 else if ((sparc_inst_op (ins2) == 3) && (sparc_inst_imm (ins2))) {
1896 /* sethi followed by load/store */
1898 guint32 t = (guint32)target8;
1899 *code &= ~(0x3fffff);
1901 *(code + 1) &= ~(0x3ff);
1902 *(code + 1) |= (t & 0x3ff);
1906 (sparc_inst_rd (ins) == sparc_g1) &&
1907 (sparc_inst_op (c [1]) == 0) && (sparc_inst_op2 (c [1]) == 4) &&
1908 (sparc_inst_op (c [2]) == 2) && (sparc_inst_op3 (c [2]) == 2) &&
1909 (sparc_inst_op (c [3]) == 2) && (sparc_inst_op3 (c [3]) == 2))
1913 reg = sparc_inst_rd (c [1]);
1914 sparc_set (p, target8, reg);
1918 else if ((sparc_inst_op (ins2) == 2) && (sparc_inst_op3 (ins2) == 0x38) &&
1919 (sparc_inst_imm (ins2))) {
1920 /* sethi followed by jmpl */
1922 guint32 t = (guint32)target8;
1923 *code &= ~(0x3fffff);
1925 *(code + 1) &= ~(0x3ff);
1926 *(code + 1) |= (t & 0x3ff);
1932 else if (op == 01) {
1933 gint64 disp = (target8 - (guint8*)code) >> 2;
1935 if (!sparc_is_imm30 (disp))
1937 sparc_call_simple (code, target8 - (guint8*)code);
1939 else if ((op == 2) && (sparc_inst_op3 (ins) == 0x2) && sparc_inst_imm (ins)) {
1941 g_assert (sparc_is_imm13 (target8));
1943 *code |= (guint32)target8;
1945 else if ((sparc_inst_op (ins) == 2) && (sparc_inst_op3 (ins) == 0x7)) {
1946 /* sparc_set case 5. */
1950 reg = sparc_inst_rd (c [3]);
1951 sparc_set (p, target, reg);
1958 // g_print ("patched with 0x%08x\n", ins);
1962 * mono_sparc_emit_save_lmf:
1964 * Emit the code neccesary to push a new entry onto the lmf stack. Used by
1965 * trampolines as well.
1968 mono_sparc_emit_save_lmf (guint32 *code, guint32 lmf_offset)
1971 sparc_sti_imm (code, sparc_o0, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr));
1972 /* Save previous_lmf */
1973 sparc_ldi (code, sparc_o0, sparc_g0, sparc_o7);
1974 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf));
1976 sparc_add_imm (code, FALSE, sparc_fp, lmf_offset, sparc_o7);
1977 sparc_sti (code, sparc_o7, sparc_o0, sparc_g0);
1983 mono_sparc_emit_restore_lmf (guint32 *code, guint32 lmf_offset)
1985 /* Load previous_lmf */
1986 sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), sparc_l0);
1988 sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), sparc_l1);
1989 /* *(lmf) = previous_lmf */
1990 sparc_sti (code, sparc_l0, sparc_l1, sparc_g0);
1995 emit_save_sp_to_lmf (MonoCompile *cfg, guint32 *code)
1998 * Since register windows are saved to the current value of %sp, we need to
1999 * set the sp field in the lmf before the call, not in the prolog.
2001 if (cfg->method->save_lmf) {
2002 gint32 lmf_offset = MONO_SPARC_STACK_BIAS - cfg->arch.lmf_offset;
2005 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
2012 emit_vret_token (MonoGenericSharingContext *gsctx, MonoInst *ins, guint32 *code)
2014 MonoCallInst *call = (MonoCallInst*)ins;
2018 * The sparc ABI requires that calls to functions which return a structure
2019 * contain an additional unimpl instruction which is checked by the callee.
2021 if (call->signature->pinvoke && MONO_TYPE_ISSTRUCT(call->signature->ret)) {
2022 if (call->signature->ret->type == MONO_TYPE_TYPEDBYREF)
2023 size = mini_type_stack_size (gsctx, call->signature->ret, NULL);
2025 size = mono_class_native_size (call->signature->ret->data.klass, NULL);
2026 sparc_unimp (code, size & 0xfff);
2033 emit_move_return_value (MonoInst *ins, guint32 *code)
2035 /* Move return value to the target register */
2036 /* FIXME: do more things in the local reg allocator */
2037 switch (ins->opcode) {
2039 case OP_VOIDCALL_REG:
2040 case OP_VOIDCALL_MEMBASE:
2044 case OP_CALL_MEMBASE:
2045 g_assert (ins->dreg == sparc_o0);
2049 case OP_LCALL_MEMBASE:
2051 * ins->dreg is the least significant reg due to the lreg: LCALL rule
2052 * in inssel-long32.brg.
2055 sparc_mov_reg_reg (code, sparc_o0, ins->dreg);
2057 g_assert (ins->dreg == sparc_o1);
2062 case OP_FCALL_MEMBASE:
2064 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4) {
2065 sparc_fmovs (code, sparc_f0, ins->dreg);
2066 sparc_fstod (code, ins->dreg, ins->dreg);
2069 sparc_fmovd (code, sparc_f0, ins->dreg);
2071 sparc_fmovs (code, sparc_f0, ins->dreg);
2072 if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4)
2073 sparc_fstod (code, ins->dreg, ins->dreg);
2075 sparc_fmovs (code, sparc_f1, ins->dreg + 1);
2080 case OP_VCALL_MEMBASE:
2083 case OP_VCALL2_MEMBASE:
2093 * emit_load_volatile_arguments:
2095 * Load volatile arguments from the stack to the original input registers.
2096 * Required before a tail call.
2099 emit_load_volatile_arguments (MonoCompile *cfg, guint32 *code)
2101 MonoMethod *method = cfg->method;
2102 MonoMethodSignature *sig;
2107 /* FIXME: Generate intermediate code instead */
2109 sig = mono_method_signature (method);
2111 cinfo = get_call_info (cfg, sig, FALSE);
2113 /* This is the opposite of the code in emit_prolog */
2115 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
2116 ArgInfo *ainfo = cinfo->args + i;
2117 gint32 stack_offset;
2120 inst = cfg->args [i];
2122 if (sig->hasthis && (i == 0))
2123 arg_type = &mono_defaults.object_class->byval_arg;
2125 arg_type = sig->params [i - sig->hasthis];
2127 stack_offset = ainfo->offset + ARGS_OFFSET;
2128 ireg = sparc_i0 + ainfo->reg;
2130 if (ainfo->storage == ArgInSplitRegStack) {
2131 g_assert (inst->opcode == OP_REGOFFSET);
2133 if (!sparc_is_imm13 (stack_offset))
2135 sparc_st_imm (code, inst->inst_basereg, stack_offset, sparc_i5);
2138 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
2139 if (ainfo->storage == ArgInIRegPair) {
2140 if (!sparc_is_imm13 (inst->inst_offset + 4))
2142 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2143 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2146 if (ainfo->storage == ArgInSplitRegStack) {
2147 if (stack_offset != inst->inst_offset) {
2148 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_i5);
2149 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2150 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2155 if (ainfo->storage == ArgOnStackPair) {
2156 if (stack_offset != inst->inst_offset) {
2157 /* stack_offset is not dword aligned, so we need to make a copy */
2158 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_o7);
2159 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset);
2161 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
2162 sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
2167 g_assert_not_reached ();
2170 if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
2171 /* Argument in register, but need to be saved to stack */
2172 if (!sparc_is_imm13 (stack_offset))
2174 if ((stack_offset - ARGS_OFFSET) & 0x1)
2175 /* FIXME: Is this ldsb or ldub ? */
2176 sparc_ldsb_imm (code, inst->inst_basereg, stack_offset, ireg);
2178 if ((stack_offset - ARGS_OFFSET) & 0x2)
2179 sparc_ldsh_imm (code, inst->inst_basereg, stack_offset, ireg);
2181 if ((stack_offset - ARGS_OFFSET) & 0x4)
2182 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2185 sparc_ldx_imm (code, inst->inst_basereg, stack_offset, ireg);
2187 sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
2190 else if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
2191 /* Argument in regpair, but need to be saved to stack */
2192 if (!sparc_is_imm13 (inst->inst_offset + 4))
2194 sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
2195 sparc_st_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
2197 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
2200 else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
2204 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
2205 if (inst->opcode == OP_REGVAR)
2206 /* FIXME: Load the argument into memory */
2216 * mono_sparc_is_virtual_call:
2218 * Determine whenever the instruction at CODE is a virtual call.
2221 mono_sparc_is_virtual_call (guint32 *code)
2228 if ((sparc_inst_op (*code) == 0x2) && (sparc_inst_op3 (*code) == 0x38)) {
2230 * Register indirect call. If it is a virtual call, then the
2231 * instruction in the delay slot is a special kind of nop.
2234 /* Construct special nop */
2235 sparc_or_imm (p, FALSE, sparc_g0, 0xca, sparc_g0);
2238 if (code [1] == p [0])
2246 * mono_arch_get_vcall_slot:
2248 * Determine the vtable slot used by a virtual call.
2251 mono_arch_get_vcall_slot (guint8 *code8, mgreg_t *regs, int *displacement)
2253 guint32 *code = (guint32*)(gpointer)code8;
2254 guint32 ins = code [0];
2255 guint32 prev_ins = code [-1];
2257 mono_sparc_flushw ();
2261 if (!mono_sparc_is_virtual_call (code))
2264 if ((sparc_inst_op (ins) == 0x2) && (sparc_inst_op3 (ins) == 0x38)) {
2265 if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_i (prev_ins) == 1) && (sparc_inst_op3 (prev_ins) == 0 || sparc_inst_op3 (prev_ins) == 0xb)) {
2266 /* ld [r1 + CONST ], r2; call r2 */
2267 guint32 base = sparc_inst_rs1 (prev_ins);
2268 gint32 disp = (((gint32)(sparc_inst_imm13 (prev_ins))) << 19) >> 19;
2271 g_assert (sparc_inst_rd (prev_ins) == sparc_inst_rs1 (ins));
2273 g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2275 base_val = regs [base];
2277 *displacement = disp;
2279 return (gpointer)base_val;
2281 else if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_i (prev_ins) == 0) && (sparc_inst_op3 (prev_ins) == 0)) {
2282 /* set r1, ICONST; ld [r1 + r2], r2; call r2 */
2283 /* Decode a sparc_set32 */
2284 guint32 base = sparc_inst_rs1 (prev_ins);
2287 guint32 s1 = code [-3];
2288 guint32 s2 = code [-2];
2295 g_assert (sparc_inst_op (s1) == 0);
2296 g_assert (sparc_inst_op2 (s1) == 4);
2299 g_assert (sparc_inst_op (s2) == 2);
2300 g_assert (sparc_inst_op3 (s2) == 2);
2301 g_assert (sparc_inst_i (s2) == 1);
2302 g_assert (sparc_inst_rs1 (s2) == sparc_inst_rd (s2));
2303 g_assert (sparc_inst_rd (s1) == sparc_inst_rs1 (s2));
2305 disp = ((s1 & 0x3fffff) << 10) | sparc_inst_imm13 (s2);
2307 g_assert ((base >= sparc_o0) && (base <= sparc_i7));
2309 base_val = regs [base];
2311 *displacement = disp;
2313 return (gpointer)base_val;
2315 g_assert_not_reached ();
2318 g_assert_not_reached ();
2324 #define BR_SMALL_SIZE 2
2325 #define BR_LARGE_SIZE 2
2326 #define JUMP_IMM_SIZE 5
2327 #define ENABLE_WRONG_METHOD_CHECK 0
2330 * LOCKING: called with the domain lock held
2333 mono_arch_build_imt_thunk (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count,
2334 gpointer fail_tramp)
2338 guint32 *code, *start;
2340 g_assert (!fail_tramp);
2342 for (i = 0; i < count; ++i) {
2343 MonoIMTCheckItem *item = imt_entries [i];
2344 if (item->is_equals) {
2345 if (item->check_target_idx) {
2346 if (!item->compare_done)
2347 item->chunk_size += CMP_SIZE;
2348 item->chunk_size += BR_SMALL_SIZE + JUMP_IMM_SIZE;
2350 item->chunk_size += JUMP_IMM_SIZE;
2351 #if ENABLE_WRONG_METHOD_CHECK
2352 item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
2356 item->chunk_size += CMP_SIZE + BR_LARGE_SIZE;
2357 imt_entries [item->check_target_idx]->compare_done = TRUE;
2359 size += item->chunk_size;
2361 code = mono_domain_code_reserve (domain, size * 4);
2364 for (i = 0; i < count; ++i) {
2365 MonoIMTCheckItem *item = imt_entries [i];
2366 item->code_target = (guint8*)code;
2367 if (item->is_equals) {
2368 if (item->check_target_idx) {
2369 if (!item->compare_done) {
2370 sparc_set (code, (guint32)item->key, sparc_g5);
2371 sparc_cmp (code, MONO_ARCH_IMT_REG, sparc_g5);
2373 item->jmp_code = (guint8*)code;
2374 sparc_branch (code, 0, sparc_bne, 0);
2376 sparc_set (code, ((guint32)(&(vtable->vtable [item->value.vtable_slot]))), sparc_g5);
2377 sparc_ld (code, sparc_g5, 0, sparc_g5);
2378 sparc_jmpl (code, sparc_g5, sparc_g0, sparc_g0);
2381 /* enable the commented code to assert on wrong method */
2382 #if ENABLE_WRONG_METHOD_CHECK
2383 g_assert_not_reached ();
2385 sparc_set (code, ((guint32)(&(vtable->vtable [item->value.vtable_slot]))), sparc_g5);
2386 sparc_ld (code, sparc_g5, 0, sparc_g5);
2387 sparc_jmpl (code, sparc_g5, sparc_g0, sparc_g0);
2389 #if ENABLE_WRONG_METHOD_CHECK
2390 g_assert_not_reached ();
2394 sparc_set (code, (guint32)item->key, sparc_g5);
2395 sparc_cmp (code, MONO_ARCH_IMT_REG, sparc_g5);
2396 item->jmp_code = (guint8*)code;
2397 sparc_branch (code, 0, sparc_beu, 0);
2401 /* patch the branches to get to the target items */
2402 for (i = 0; i < count; ++i) {
2403 MonoIMTCheckItem *item = imt_entries [i];
2404 if (item->jmp_code) {
2405 if (item->check_target_idx) {
2406 sparc_patch ((guint32*)item->jmp_code, imt_entries [item->check_target_idx]->code_target);
2411 mono_arch_flush_icache ((guint8*)start, (code - start) * 4);
2413 mono_stats.imt_thunks_size += (code - start) * 4;
2414 g_assert (code - start <= size);
2419 mono_arch_find_imt_method (mgreg_t *regs, guint8 *code)
2422 g_assert_not_reached ();
2425 return (MonoMethod*)regs [sparc_g1];
2429 mono_arch_find_this_argument (mgreg_t *regs, MonoMethod *method, MonoGenericSharingContext *gsctx)
2431 mono_sparc_flushw ();
2433 return (gpointer)regs [sparc_o0];
2437 * Some conventions used in the following code.
2438 * 2) The only scratch registers we have are o7 and g1. We try to
2439 * stick to o7 when we can, and use g1 when necessary.
2443 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2448 guint32 *code = (guint32*)(cfg->native_code + cfg->code_len);
2449 MonoInst *last_ins = NULL;
2453 if (cfg->verbose_level > 2)
2454 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2456 cpos = bb->max_offset;
2458 if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2462 MONO_BB_FOR_EACH_INS (bb, ins) {
2465 offset = (guint8*)code - cfg->native_code;
2467 spec = ins_get_spec (ins->opcode);
2469 max_len = ((guint8 *)spec)[MONO_INST_LEN];
2471 if (offset > (cfg->code_size - max_len - 16)) {
2472 cfg->code_size *= 2;
2473 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2474 code = (guint32*)(cfg->native_code + offset);
2476 code_start = (guint8*)code;
2477 // if (ins->cil_code)
2478 // g_print ("cil code\n");
2479 mono_debug_record_line_number (cfg, ins, offset);
2481 switch (ins->opcode) {
2482 case OP_STOREI1_MEMBASE_IMM:
2483 EMIT_STORE_MEMBASE_IMM (ins, stb);
2485 case OP_STOREI2_MEMBASE_IMM:
2486 EMIT_STORE_MEMBASE_IMM (ins, sth);
2488 case OP_STORE_MEMBASE_IMM:
2489 EMIT_STORE_MEMBASE_IMM (ins, sti);
2491 case OP_STOREI4_MEMBASE_IMM:
2492 EMIT_STORE_MEMBASE_IMM (ins, st);
2494 case OP_STOREI8_MEMBASE_IMM:
2496 EMIT_STORE_MEMBASE_IMM (ins, stx);
2498 /* Only generated by peephole opts */
2499 g_assert ((ins->inst_offset % 8) == 0);
2500 g_assert (ins->inst_imm == 0);
2501 EMIT_STORE_MEMBASE_IMM (ins, stx);
2504 case OP_STOREI1_MEMBASE_REG:
2505 EMIT_STORE_MEMBASE_REG (ins, stb);
2507 case OP_STOREI2_MEMBASE_REG:
2508 EMIT_STORE_MEMBASE_REG (ins, sth);
2510 case OP_STOREI4_MEMBASE_REG:
2511 EMIT_STORE_MEMBASE_REG (ins, st);
2513 case OP_STOREI8_MEMBASE_REG:
2515 EMIT_STORE_MEMBASE_REG (ins, stx);
2517 /* Only used by OP_MEMSET */
2518 EMIT_STORE_MEMBASE_REG (ins, std);
2521 case OP_STORE_MEMBASE_REG:
2522 EMIT_STORE_MEMBASE_REG (ins, sti);
2525 sparc_set (code, ins->inst_c0, ins->dreg);
2526 sparc_ld (code, ins->dreg, sparc_g0, ins->dreg);
2528 case OP_LOADI4_MEMBASE:
2530 EMIT_LOAD_MEMBASE (ins, ldsw);
2532 EMIT_LOAD_MEMBASE (ins, ld);
2535 case OP_LOADU4_MEMBASE:
2536 EMIT_LOAD_MEMBASE (ins, ld);
2538 case OP_LOADU1_MEMBASE:
2539 EMIT_LOAD_MEMBASE (ins, ldub);
2541 case OP_LOADI1_MEMBASE:
2542 EMIT_LOAD_MEMBASE (ins, ldsb);
2544 case OP_LOADU2_MEMBASE:
2545 EMIT_LOAD_MEMBASE (ins, lduh);
2547 case OP_LOADI2_MEMBASE:
2548 EMIT_LOAD_MEMBASE (ins, ldsh);
2550 case OP_LOAD_MEMBASE:
2552 EMIT_LOAD_MEMBASE (ins, ldx);
2554 EMIT_LOAD_MEMBASE (ins, ld);
2558 case OP_LOADI8_MEMBASE:
2559 EMIT_LOAD_MEMBASE (ins, ldx);
2562 case OP_ICONV_TO_I1:
2563 sparc_sll_imm (code, ins->sreg1, 24, sparc_o7);
2564 sparc_sra_imm (code, sparc_o7, 24, ins->dreg);
2566 case OP_ICONV_TO_I2:
2567 sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2568 sparc_sra_imm (code, sparc_o7, 16, ins->dreg);
2570 case OP_ICONV_TO_U1:
2571 sparc_and_imm (code, FALSE, ins->sreg1, 0xff, ins->dreg);
2573 case OP_ICONV_TO_U2:
2574 sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
2575 sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
2577 case OP_LCONV_TO_OVF_U4:
2578 case OP_ICONV_TO_OVF_U4:
2579 /* Only used on V9 */
2580 sparc_cmp_imm (code, ins->sreg1, 0);
2581 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2582 MONO_PATCH_INFO_EXC, "OverflowException");
2583 sparc_branchp (code, 0, sparc_bl, sparc_xcc_short, 0, 0);
2585 sparc_set (code, 1, sparc_o7);
2586 sparc_sllx_imm (code, sparc_o7, 32, sparc_o7);
2587 sparc_cmp (code, ins->sreg1, sparc_o7);
2588 mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
2589 MONO_PATCH_INFO_EXC, "OverflowException");
2590 sparc_branchp (code, 0, sparc_bge, sparc_xcc_short, 0, 0);
2592 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2594 case OP_LCONV_TO_OVF_I4_UN:
2595 case OP_ICONV_TO_OVF_I4_UN:
2596 /* Only used on V9 */
2602 sparc_cmp (code, ins->sreg1, ins->sreg2);
2604 case OP_COMPARE_IMM:
2605 case OP_ICOMPARE_IMM:
2606 if (sparc_is_imm13 (ins->inst_imm))
2607 sparc_cmp_imm (code, ins->sreg1, ins->inst_imm);
2609 sparc_set (code, ins->inst_imm, sparc_o7);
2610 sparc_cmp (code, ins->sreg1, sparc_o7);
2615 * gdb does not like encountering 'ta 1' in the debugged code. So
2616 * instead of emitting a trap, we emit a call a C function and place a
2619 //sparc_ta (code, 1);
2620 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, mono_break);
2625 sparc_add (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2628 sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2633 /* according to inssel-long32.brg, this should set cc */
2634 EMIT_ALU_IMM (ins, add, TRUE);
2638 /* according to inssel-long32.brg, this should set cc */
2639 sparc_addx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2643 EMIT_ALU_IMM (ins, addx, TRUE);
2647 sparc_sub (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2650 sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2655 /* according to inssel-long32.brg, this should set cc */
2656 EMIT_ALU_IMM (ins, sub, TRUE);
2660 /* according to inssel-long32.brg, this should set cc */
2661 sparc_subx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2665 EMIT_ALU_IMM (ins, subx, TRUE);
2668 sparc_and (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2672 EMIT_ALU_IMM (ins, and, FALSE);
2675 /* Sign extend sreg1 into %y */
2676 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2677 sparc_wry (code, sparc_o7, sparc_g0);
2678 sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2679 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2682 sparc_wry (code, sparc_g0, sparc_g0);
2683 sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2689 /* Transform division into a shift */
2690 for (i = 1; i < 30; ++i) {
2692 if (ins->inst_imm == imm)
2698 sparc_srl_imm (code, ins->sreg1, 31, sparc_o7);
2699 sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2700 sparc_sra_imm (code, ins->dreg, 1, ins->dreg);
2703 /* http://compilers.iecc.com/comparch/article/93-04-079 */
2704 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2705 sparc_srl_imm (code, sparc_o7, 32 - i, sparc_o7);
2706 sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2707 sparc_sra_imm (code, ins->dreg, i, ins->dreg);
2711 /* Sign extend sreg1 into %y */
2712 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2713 sparc_wry (code, sparc_o7, sparc_g0);
2714 EMIT_ALU_IMM (ins, sdiv, TRUE);
2715 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2719 case OP_IDIV_UN_IMM:
2720 sparc_wry (code, sparc_g0, sparc_g0);
2721 EMIT_ALU_IMM (ins, udiv, FALSE);
2724 /* Sign extend sreg1 into %y */
2725 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2726 sparc_wry (code, sparc_o7, sparc_g0);
2727 sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, sparc_o7);
2728 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2729 sparc_smul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2730 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2733 sparc_wry (code, sparc_g0, sparc_g0);
2734 sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
2735 sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2736 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2740 /* Sign extend sreg1 into %y */
2741 sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
2742 sparc_wry (code, sparc_o7, sparc_g0);
2743 if (!sparc_is_imm13 (ins->inst_imm)) {
2744 sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
2745 sparc_sdiv (code, TRUE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
2746 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2747 sparc_smul (code, FALSE, sparc_o7, GP_SCRATCH_REG, sparc_o7);
2750 sparc_sdiv_imm (code, TRUE, ins->sreg1, ins->inst_imm, sparc_o7);
2751 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
2752 sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
2754 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2756 case OP_IREM_UN_IMM:
2757 sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
2758 sparc_wry (code, sparc_g0, sparc_g0);
2759 sparc_udiv (code, FALSE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
2760 sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
2761 sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
2764 sparc_or (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2768 EMIT_ALU_IMM (ins, or, FALSE);
2771 sparc_xor (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2775 EMIT_ALU_IMM (ins, xor, FALSE);
2778 sparc_sll (code, ins->sreg1, ins->sreg2, ins->dreg);
2782 if (ins->inst_imm < (1 << 5))
2783 sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2785 sparc_set (code, ins->inst_imm, sparc_o7);
2786 sparc_sll (code, ins->sreg1, sparc_o7, ins->dreg);
2790 sparc_sra (code, ins->sreg1, ins->sreg2, ins->dreg);
2794 if (ins->inst_imm < (1 << 5))
2795 sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2797 sparc_set (code, ins->inst_imm, sparc_o7);
2798 sparc_sra (code, ins->sreg1, sparc_o7, ins->dreg);
2802 case OP_ISHR_UN_IMM:
2803 if (ins->inst_imm < (1 << 5))
2804 sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2806 sparc_set (code, ins->inst_imm, sparc_o7);
2807 sparc_srl (code, ins->sreg1, sparc_o7, ins->dreg);
2811 sparc_srl (code, ins->sreg1, ins->sreg2, ins->dreg);
2814 sparc_sllx (code, ins->sreg1, ins->sreg2, ins->dreg);
2817 if (ins->inst_imm < (1 << 6))
2818 sparc_sllx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2820 sparc_set (code, ins->inst_imm, sparc_o7);
2821 sparc_sllx (code, ins->sreg1, sparc_o7, ins->dreg);
2825 sparc_srax (code, ins->sreg1, ins->sreg2, ins->dreg);
2828 if (ins->inst_imm < (1 << 6))
2829 sparc_srax_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2831 sparc_set (code, ins->inst_imm, sparc_o7);
2832 sparc_srax (code, ins->sreg1, sparc_o7, ins->dreg);
2836 sparc_srlx (code, ins->sreg1, ins->sreg2, ins->dreg);
2838 case OP_LSHR_UN_IMM:
2839 if (ins->inst_imm < (1 << 6))
2840 sparc_srlx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
2842 sparc_set (code, ins->inst_imm, sparc_o7);
2843 sparc_srlx (code, ins->sreg1, sparc_o7, ins->dreg);
2847 /* can't use sparc_not */
2848 sparc_xnor (code, FALSE, ins->sreg1, sparc_g0, ins->dreg);
2851 /* can't use sparc_neg */
2852 sparc_sub (code, FALSE, sparc_g0, ins->sreg1, ins->dreg);
2855 sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
2861 if ((ins->inst_imm == 1) && (ins->sreg1 == ins->dreg))
2864 /* Transform multiplication into a shift */
2865 for (i = 0; i < 30; ++i) {
2867 if (ins->inst_imm == imm)
2871 sparc_sll_imm (code, ins->sreg1, i, ins->dreg);
2873 EMIT_ALU_IMM (ins, smul, FALSE);
2877 sparc_smul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2878 sparc_rdy (code, sparc_g1);
2879 sparc_sra_imm (code, ins->dreg, 31, sparc_o7);
2880 sparc_cmp (code, sparc_g1, sparc_o7);
2881 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2883 case OP_IMUL_OVF_UN:
2884 sparc_umul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
2885 sparc_rdy (code, sparc_o7);
2886 sparc_cmp (code, sparc_o7, sparc_g0);
2887 EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
2890 sparc_set (code, ins->inst_c0, ins->dreg);
2893 sparc_set (code, ins->inst_l, ins->dreg);
2896 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2897 sparc_set_template (code, ins->dreg);
2900 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2901 sparc_set_template (code, ins->dreg);
2903 case OP_ICONV_TO_I4:
2904 case OP_ICONV_TO_U4:
2906 if (ins->sreg1 != ins->dreg)
2907 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
2911 if (ins->sreg1 != ins->dreg)
2912 sparc_fmovd (code, ins->sreg1, ins->dreg);
2914 sparc_fmovs (code, ins->sreg1, ins->dreg);
2915 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
2919 if (cfg->method->save_lmf)
2922 code = emit_load_volatile_arguments (cfg, code);
2923 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2924 sparc_set_template (code, sparc_o7);
2925 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_g0);
2926 /* Restore parent frame in delay slot */
2927 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
2930 /* ensure ins->sreg1 is not NULL */
2931 /* Might be misaligned in case of vtypes so use a byte load */
2932 sparc_ldsb_imm (code, ins->sreg1, 0, sparc_g0);
2935 sparc_add_imm (code, FALSE, sparc_fp, cfg->sig_cookie, sparc_o7);
2936 sparc_sti_imm (code, sparc_o7, ins->sreg1, 0);
2944 call = (MonoCallInst*)ins;
2945 g_assert (!call->virtual);
2946 code = emit_save_sp_to_lmf (cfg, code);
2947 if (ins->flags & MONO_INST_HAS_METHOD)
2948 code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
2950 code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
2952 code = emit_vret_token (cfg->generic_sharing_context, ins, code);
2953 code = emit_move_return_value (ins, code);
2959 case OP_VOIDCALL_REG:
2961 call = (MonoCallInst*)ins;
2962 code = emit_save_sp_to_lmf (cfg, code);
2963 sparc_jmpl (code, ins->sreg1, sparc_g0, sparc_callsite);
2965 * We emit a special kind of nop in the delay slot to tell the
2966 * trampoline code that this is a virtual call, thus an unbox
2967 * trampoline might need to be called.
2970 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2974 code = emit_vret_token (cfg->generic_sharing_context, ins, code);
2975 code = emit_move_return_value (ins, code);
2977 case OP_FCALL_MEMBASE:
2978 case OP_LCALL_MEMBASE:
2979 case OP_VCALL_MEMBASE:
2980 case OP_VCALL2_MEMBASE:
2981 case OP_VOIDCALL_MEMBASE:
2982 case OP_CALL_MEMBASE:
2983 call = (MonoCallInst*)ins;
2984 code = emit_save_sp_to_lmf (cfg, code);
2985 if (sparc_is_imm13 (ins->inst_offset)) {
2986 sparc_ldi_imm (code, ins->inst_basereg, ins->inst_offset, sparc_o7);
2988 sparc_set (code, ins->inst_offset, sparc_o7);
2989 sparc_ldi (code, ins->inst_basereg, sparc_o7, sparc_o7);
2991 sparc_jmpl (code, sparc_o7, sparc_g0, sparc_callsite);
2993 sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
2997 code = emit_vret_token (cfg->generic_sharing_context, ins, code);
2998 code = emit_move_return_value (ins, code);
3001 if (mono_method_signature (cfg->method)->ret->type == MONO_TYPE_R4)
3002 sparc_fdtos (code, ins->sreg1, sparc_f0);
3005 sparc_fmovd (code, ins->sreg1, ins->dreg);
3007 /* FIXME: Why not use fmovd ? */
3008 sparc_fmovs (code, ins->sreg1, ins->dreg);
3009 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3017 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3018 /* Perform stack touching */
3022 /* Keep alignment */
3023 /* Add 4 to compensate for the rounding of localloc_offset */
3024 sparc_add_imm (code, FALSE, ins->sreg1, 4 + MONO_ARCH_LOCALLOC_ALIGNMENT - 1, ins->dreg);
3025 sparc_set (code, ~(MONO_ARCH_LOCALLOC_ALIGNMENT - 1), sparc_o7);
3026 sparc_and (code, FALSE, ins->dreg, sparc_o7, ins->dreg);
3028 if ((ins->flags & MONO_INST_INIT) && (ins->sreg1 == ins->dreg)) {
3030 size_reg = sparc_g4;
3032 size_reg = sparc_g1;
3034 sparc_mov_reg_reg (code, ins->dreg, size_reg);
3037 size_reg = ins->sreg1;
3039 sparc_sub (code, FALSE, sparc_sp, ins->dreg, ins->dreg);
3040 /* Keep %sp valid at all times */
3041 sparc_mov_reg_reg (code, ins->dreg, sparc_sp);
3042 /* Round localloc_offset too so the result is at least 8 aligned */
3043 offset2 = ALIGN_TO (cfg->arch.localloc_offset, 8);
3044 g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + offset2));
3045 sparc_add_imm (code, FALSE, ins->dreg, MONO_SPARC_STACK_BIAS + offset2, ins->dreg);
3047 if (ins->flags & MONO_INST_INIT) {
3049 /* Initialize memory region */
3050 sparc_cmp_imm (code, size_reg, 0);
3052 sparc_branch (code, 0, sparc_be, 0);
3054 sparc_set (code, 0, sparc_o7);
3055 sparc_sub_imm (code, 0, size_reg, sparcv9 ? 8 : 4, size_reg);
3059 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
3061 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
3062 sparc_cmp (code, sparc_o7, size_reg);
3064 sparc_branch (code, 0, sparc_bl, 0);
3065 sparc_patch (br [2], br [1]);
3067 sparc_add_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
3068 sparc_patch (br [0], code);
3072 case OP_LOCALLOC_IMM: {
3073 gint32 offset = ins->inst_imm;
3076 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3077 /* Perform stack touching */
3081 /* To compensate for the rounding of localloc_offset */
3082 offset += sizeof (gpointer);
3083 offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3084 if (sparc_is_imm13 (offset))
3085 sparc_sub_imm (code, FALSE, sparc_sp, offset, sparc_sp);
3087 sparc_set (code, offset, sparc_o7);
3088 sparc_sub (code, FALSE, sparc_sp, sparc_o7, sparc_sp);
3090 /* Round localloc_offset too so the result is at least 8 aligned */
3091 offset2 = ALIGN_TO (cfg->arch.localloc_offset, 8);
3092 g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + offset2));
3093 sparc_add_imm (code, FALSE, sparc_sp, MONO_SPARC_STACK_BIAS + offset2, ins->dreg);
3094 if ((ins->flags & MONO_INST_INIT) && (offset > 0)) {
3100 while (i < offset) {
3102 sparc_stx_imm (code, sparc_g0, ins->dreg, i);
3106 sparc_st_imm (code, sparc_g0, ins->dreg, i);
3112 sparc_set (code, offset, sparc_o7);
3113 sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
3114 /* beginning of loop */
3117 sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
3119 sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
3120 sparc_cmp_imm (code, sparc_o7, 0);
3122 sparc_branch (code, 0, sparc_bne, 0);
3124 sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
3125 sparc_patch (br [1], br [0]);
3131 sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3132 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3133 (gpointer)"mono_arch_throw_exception");
3137 sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3138 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3139 (gpointer)"mono_arch_rethrow_exception");
3142 case OP_START_HANDLER: {
3144 * The START_HANDLER instruction marks the beginning of a handler
3145 * block. It is called using a call instruction, so %o7 contains
3146 * the return address. Since the handler executes in the same stack
3147 * frame as the method itself, we can't use save/restore to save
3148 * the return address. Instead, we save it into a dedicated
3151 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3152 if (!sparc_is_imm13 (spvar->inst_offset)) {
3153 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3154 sparc_sti (code, sparc_o7, spvar->inst_basereg, GP_SCRATCH_REG);
3157 sparc_sti_imm (code, sparc_o7, spvar->inst_basereg, spvar->inst_offset);
3160 case OP_ENDFILTER: {
3161 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3162 if (!sparc_is_imm13 (spvar->inst_offset)) {
3163 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3164 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
3167 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3168 sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3170 sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
3173 case OP_ENDFINALLY: {
3174 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3175 if (!sparc_is_imm13 (spvar->inst_offset)) {
3176 sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
3177 sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
3180 sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
3181 sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
3185 case OP_CALL_HANDLER:
3186 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3187 /* This is a jump inside the method, so call_simple works even on V9 */
3188 sparc_call_simple (code, 0);
3192 ins->inst_c0 = (guint8*)code - cfg->native_code;
3194 case OP_RELAXED_NOP:
3197 case OP_DUMMY_STORE:
3198 case OP_NOT_REACHED:
3202 //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
3203 if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
3205 if (ins->inst_target_bb->native_offset) {
3206 gint32 disp = (ins->inst_target_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2;
3207 g_assert (sparc_is_imm22 (disp));
3208 sparc_branch (code, 1, sparc_ba, disp);
3210 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3211 sparc_branch (code, 1, sparc_ba, 0);
3216 sparc_jmp (code, ins->sreg1, sparc_g0);
3224 if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3225 sparc_clr_reg (code, ins->dreg);
3226 sparc_movcc_imm (code, sparc_xcc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3229 sparc_clr_reg (code, ins->dreg);
3231 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), DEFAULT_ICC, 0, 2);
3233 sparc_branch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3236 sparc_set (code, 1, ins->dreg);
3244 if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
3245 sparc_clr_reg (code, ins->dreg);
3246 sparc_movcc_imm (code, sparc_icc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
3249 sparc_clr_reg (code, ins->dreg);
3250 sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), sparc_icc_short, 0, 2);
3252 sparc_set (code, 1, ins->dreg);
3255 case OP_COND_EXC_EQ:
3256 case OP_COND_EXC_NE_UN:
3257 case OP_COND_EXC_LT:
3258 case OP_COND_EXC_LT_UN:
3259 case OP_COND_EXC_GT:
3260 case OP_COND_EXC_GT_UN:
3261 case OP_COND_EXC_GE:
3262 case OP_COND_EXC_GE_UN:
3263 case OP_COND_EXC_LE:
3264 case OP_COND_EXC_LE_UN:
3265 case OP_COND_EXC_OV:
3266 case OP_COND_EXC_NO:
3268 case OP_COND_EXC_NC:
3269 case OP_COND_EXC_IEQ:
3270 case OP_COND_EXC_INE_UN:
3271 case OP_COND_EXC_ILT:
3272 case OP_COND_EXC_ILT_UN:
3273 case OP_COND_EXC_IGT:
3274 case OP_COND_EXC_IGT_UN:
3275 case OP_COND_EXC_IGE:
3276 case OP_COND_EXC_IGE_UN:
3277 case OP_COND_EXC_ILE:
3278 case OP_COND_EXC_ILE_UN:
3279 case OP_COND_EXC_IOV:
3280 case OP_COND_EXC_INO:
3281 case OP_COND_EXC_IC:
3282 case OP_COND_EXC_INC:
3286 EMIT_COND_SYSTEM_EXCEPTION (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1);
3289 case OP_SPARC_COND_EXC_EQZ:
3290 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brz, ins->inst_p1);
3292 case OP_SPARC_COND_EXC_GEZ:
3293 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgez, ins->inst_p1);
3295 case OP_SPARC_COND_EXC_GTZ:
3296 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgz, ins->inst_p1);
3298 case OP_SPARC_COND_EXC_LEZ:
3299 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlez, ins->inst_p1);
3301 case OP_SPARC_COND_EXC_LTZ:
3302 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlz, ins->inst_p1);
3304 case OP_SPARC_COND_EXC_NEZ:
3305 EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brnz, ins->inst_p1);
3319 EMIT_COND_BRANCH_PREDICTED (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3321 EMIT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3326 EMIT_COND_BRANCH_BPR (ins, brz, 1, 1, 1);
3328 case OP_SPARC_BRLEZ:
3329 EMIT_COND_BRANCH_BPR (ins, brlez, 1, 1, 1);
3332 EMIT_COND_BRANCH_BPR (ins, brlz, 1, 1, 1);
3335 EMIT_COND_BRANCH_BPR (ins, brnz, 1, 1, 1);
3338 EMIT_COND_BRANCH_BPR (ins, brgz, 1, 1, 1);
3340 case OP_SPARC_BRGEZ:
3341 EMIT_COND_BRANCH_BPR (ins, brgez, 1, 1, 1);
3344 /* floating point opcodes */
3346 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
3348 sparc_set_template (code, sparc_o7);
3350 sparc_sethi (code, 0, sparc_o7);
3352 sparc_lddf_imm (code, sparc_o7, 0, ins->dreg);
3355 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
3357 sparc_set_template (code, sparc_o7);
3359 sparc_sethi (code, 0, sparc_o7);
3361 sparc_ldf_imm (code, sparc_o7, 0, FP_SCRATCH_REG);
3363 /* Extend to double */
3364 sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3366 case OP_STORER8_MEMBASE_REG:
3367 if (!sparc_is_imm13 (ins->inst_offset + 4)) {
3368 sparc_set (code, ins->inst_offset, sparc_o7);
3369 /* SPARCV9 handles misaligned fp loads/stores */
3370 if (!v64 && (ins->inst_offset % 8)) {
3372 sparc_add (code, FALSE, ins->inst_destbasereg, sparc_o7, sparc_o7);
3373 sparc_stf (code, ins->sreg1, sparc_o7, sparc_g0);
3374 sparc_stf_imm (code, ins->sreg1 + 1, sparc_o7, 4);
3376 sparc_stdf (code, ins->sreg1, ins->inst_destbasereg, sparc_o7);
3379 if (!v64 && (ins->inst_offset % 8)) {
3381 sparc_stf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3382 sparc_stf_imm (code, ins->sreg1 + 1, ins->inst_destbasereg, ins->inst_offset + 4);
3384 sparc_stdf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
3387 case OP_LOADR8_MEMBASE:
3388 EMIT_LOAD_MEMBASE (ins, lddf);
3390 case OP_STORER4_MEMBASE_REG:
3391 /* This requires a double->single conversion */
3392 sparc_fdtos (code, ins->sreg1, FP_SCRATCH_REG);
3393 if (!sparc_is_imm13 (ins->inst_offset)) {
3394 sparc_set (code, ins->inst_offset, sparc_o7);
3395 sparc_stf (code, FP_SCRATCH_REG, ins->inst_destbasereg, sparc_o7);
3398 sparc_stf_imm (code, FP_SCRATCH_REG, ins->inst_destbasereg, ins->inst_offset);
3400 case OP_LOADR4_MEMBASE: {
3401 /* ldf needs a single precision register */
3402 int dreg = ins->dreg;
3403 ins->dreg = FP_SCRATCH_REG;
3404 EMIT_LOAD_MEMBASE (ins, ldf);
3406 /* Extend to double */
3407 sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3410 case OP_ICONV_TO_R4: {
3411 gint32 offset = cfg->arch.float_spill_slot_offset;
3413 if (!sparc_is_imm13 (offset)) {
3414 sparc_set (code, offset, sparc_o7);
3415 sparc_stx (code, ins->sreg1, sparc_sp, offset);
3416 sparc_lddf (code, sparc_sp, offset, FP_SCRATCH_REG);
3418 sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3419 sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3421 sparc_fxtos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3423 if (!sparc_is_imm13 (offset)) {
3424 sparc_set (code, offset, sparc_o7);
3425 sparc_st (code, ins->sreg1, sparc_sp, sparc_o7);
3426 sparc_ldf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3428 sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3429 sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3431 sparc_fitos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
3433 sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
3436 case OP_ICONV_TO_R8: {
3437 gint32 offset = cfg->arch.float_spill_slot_offset;
3439 if (!sparc_is_imm13 (offset)) {
3440 sparc_set (code, offset, sparc_o7);
3441 sparc_stx (code, ins->sreg1, sparc_sp, sparc_o7);
3442 sparc_lddf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3444 sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
3445 sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3447 sparc_fxtod (code, FP_SCRATCH_REG, ins->dreg);
3449 if (!sparc_is_imm13 (offset)) {
3450 sparc_set (code, offset, sparc_o7);
3451 sparc_st (code, ins->sreg1, sparc_sp, sparc_o7);
3452 sparc_ldf (code, sparc_sp, sparc_o7, FP_SCRATCH_REG);
3454 sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
3455 sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
3457 sparc_fitod (code, FP_SCRATCH_REG, ins->dreg);
3461 case OP_FCONV_TO_I1:
3462 case OP_FCONV_TO_U1:
3463 case OP_FCONV_TO_I2:
3464 case OP_FCONV_TO_U2:
3469 case OP_FCONV_TO_I4:
3470 case OP_FCONV_TO_U4: {
3471 gint32 offset = cfg->arch.float_spill_slot_offset;
3472 sparc_fdtoi (code, ins->sreg1, FP_SCRATCH_REG);
3473 if (!sparc_is_imm13 (offset)) {
3474 sparc_set (code, offset, sparc_o7);
3475 sparc_stdf (code, FP_SCRATCH_REG, sparc_sp, sparc_o7);
3476 sparc_ld (code, sparc_sp, sparc_o7, ins->dreg);
3478 sparc_stdf_imm (code, FP_SCRATCH_REG, sparc_sp, offset);
3479 sparc_ld_imm (code, sparc_sp, offset, ins->dreg);
3482 switch (ins->opcode) {
3483 case OP_FCONV_TO_I1:
3484 case OP_FCONV_TO_U1:
3485 sparc_and_imm (code, 0, ins->dreg, 0xff, ins->dreg);
3487 case OP_FCONV_TO_I2:
3488 case OP_FCONV_TO_U2:
3489 sparc_set (code, 0xffff, sparc_o7);
3490 sparc_and (code, 0, ins->dreg, sparc_o7, ins->dreg);
3497 case OP_FCONV_TO_I8:
3498 case OP_FCONV_TO_U8:
3500 g_assert_not_reached ();
3502 case OP_FCONV_TO_R4:
3503 /* FIXME: Change precision ? */
3505 sparc_fmovd (code, ins->sreg1, ins->dreg);
3507 sparc_fmovs (code, ins->sreg1, ins->dreg);
3508 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3511 case OP_LCONV_TO_R_UN: {
3513 g_assert_not_reached ();
3516 case OP_LCONV_TO_OVF_I:
3517 case OP_LCONV_TO_OVF_I4_2: {
3518 guint32 *br [3], *label [1];
3521 * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3523 sparc_cmp_imm (code, ins->sreg1, 0);
3525 sparc_branch (code, 1, sparc_bneg, 0);
3529 /* ms word must be 0 */
3530 sparc_cmp_imm (code, ins->sreg2, 0);
3532 sparc_branch (code, 1, sparc_be, 0);
3537 EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_ba, "OverflowException");
3540 sparc_patch (br [0], code);
3542 /* ms word must 0xfffffff */
3543 sparc_cmp_imm (code, ins->sreg2, -1);
3545 sparc_branch (code, 1, sparc_bne, 0);
3547 sparc_patch (br [2], label [0]);
3550 sparc_patch (br [1], code);
3551 if (ins->sreg1 != ins->dreg)
3552 sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
3556 sparc_faddd (code, ins->sreg1, ins->sreg2, ins->dreg);
3559 sparc_fsubd (code, ins->sreg1, ins->sreg2, ins->dreg);
3562 sparc_fmuld (code, ins->sreg1, ins->sreg2, ins->dreg);
3565 sparc_fdivd (code, ins->sreg1, ins->sreg2, ins->dreg);
3569 sparc_fnegd (code, ins->sreg1, ins->dreg);
3571 /* FIXME: why don't use fnegd ? */
3572 sparc_fnegs (code, ins->sreg1, ins->dreg);
3576 sparc_fdivd (code, ins->sreg1, ins->sreg2, FP_SCRATCH_REG);
3577 sparc_fmuld (code, ins->sreg2, FP_SCRATCH_REG, FP_SCRATCH_REG);
3578 sparc_fsubd (code, ins->sreg1, FP_SCRATCH_REG, ins->dreg);
3581 sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3588 sparc_fcmpd (code, ins->sreg1, ins->sreg2);
3589 sparc_clr_reg (code, ins->dreg);
3590 switch (ins->opcode) {
3593 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 4);
3595 sparc_set (code, 1, ins->dreg);
3596 sparc_fbranch (code, 1, sparc_fbu, 2);
3598 sparc_set (code, 1, ins->dreg);
3601 sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
3603 sparc_set (code, 1, ins->dreg);
3609 EMIT_FLOAT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
3612 /* clt.un + brfalse */
3614 sparc_fbranch (code, 1, sparc_fbul, 0);
3617 EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3618 sparc_patch (p, (guint8*)code);
3622 /* cgt.un + brfalse */
3624 sparc_fbranch (code, 1, sparc_fbug, 0);
3627 EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
3628 sparc_patch (p, (guint8*)code);
3632 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbne, 1, 1);
3633 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3636 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbl, 1, 1);
3637 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3640 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbg, 1, 1);
3641 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3644 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbge, 1, 1);
3645 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3648 EMIT_FLOAT_COND_BRANCH (ins, sparc_fble, 1, 1);
3649 EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
3652 gint32 offset = cfg->arch.float_spill_slot_offset;
3653 if (!sparc_is_imm13 (offset)) {
3654 sparc_set (code, offset, sparc_o7);
3655 sparc_stdf (code, ins->sreg1, sparc_sp, sparc_o7);
3656 sparc_lduh (code, sparc_sp, sparc_o7, sparc_o7);
3658 sparc_stdf_imm (code, ins->sreg1, sparc_sp, offset);
3659 sparc_lduh_imm (code, sparc_sp, offset, sparc_o7);
3661 sparc_srl_imm (code, sparc_o7, 4, sparc_o7);
3662 sparc_and_imm (code, FALSE, sparc_o7, 2047, sparc_o7);
3663 sparc_cmp_imm (code, sparc_o7, 2047);
3664 EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_be, "ArithmeticException");
3666 sparc_fmovd (code, ins->sreg1, ins->dreg);
3668 sparc_fmovs (code, ins->sreg1, ins->dreg);
3669 sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
3674 case OP_MEMORY_BARRIER:
3675 sparc_membar (code, sparc_membar_all);
3680 g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
3682 g_warning ("%s:%d: unknown opcode %s\n", __FILE__, __LINE__, mono_inst_name (ins->opcode));
3684 g_assert_not_reached ();
3687 if ((((guint8*)code) - code_start) > max_len) {
3688 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3689 mono_inst_name (ins->opcode), max_len, ((guint8*)code) - code_start);
3690 g_assert_not_reached ();
3698 cfg->code_len = (guint8*)code - cfg->native_code;
3702 mono_arch_register_lowlevel_calls (void)
3704 mono_register_jit_icall (mono_arch_get_lmf_addr, "mono_arch_get_lmf_addr", NULL, TRUE);
3708 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3710 MonoJumpInfo *patch_info;
3712 /* FIXME: Move part of this to arch independent code */
3713 for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3714 unsigned char *ip = patch_info->ip.i + code;
3717 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3719 switch (patch_info->type) {
3720 case MONO_PATCH_INFO_NONE:
3722 case MONO_PATCH_INFO_CLASS_INIT: {
3723 guint32 *ip2 = (guint32*)ip;
3724 /* Might already been changed to a nop */
3726 sparc_set_template (ip2, sparc_o7);
3727 sparc_jmpl (ip2, sparc_o7, sparc_g0, sparc_o7);
3729 sparc_call_simple (ip2, 0);
3733 case MONO_PATCH_INFO_METHOD_JUMP: {
3734 guint32 *ip2 = (guint32*)ip;
3735 /* Might already been patched */
3736 sparc_set_template (ip2, sparc_o7);
3742 sparc_patch ((guint32*)ip, target);
3747 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
3750 guint32 *code = (guint32*)p;
3751 MonoMethodSignature *sig = mono_method_signature (cfg->method);
3754 /* Save registers to stack */
3755 for (i = 0; i < 6; ++i)
3756 sparc_sti_imm (code, sparc_i0 + i, sparc_fp, ARGS_OFFSET + (i * sizeof (gpointer)));
3758 cinfo = get_call_info (cfg, sig, FALSE);
3760 /* Save float regs on V9, since they are caller saved */
3761 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3762 ArgInfo *ainfo = cinfo->args + i;
3763 gint32 stack_offset;
3765 stack_offset = ainfo->offset + ARGS_OFFSET;
3767 if (ainfo->storage == ArgInFloatReg) {
3768 if (!sparc_is_imm13 (stack_offset))
3770 sparc_stf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3772 else if (ainfo->storage == ArgInDoubleReg) {
3773 /* The offset is guaranteed to be aligned by the ABI rules */
3774 sparc_stdf_imm (code, ainfo->reg, sparc_fp, stack_offset);
3778 sparc_set (code, cfg->method, sparc_o0);
3779 sparc_add_imm (code, FALSE, sparc_fp, MONO_SPARC_STACK_BIAS, sparc_o1);
3781 mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
3784 /* Restore float regs on V9 */
3785 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3786 ArgInfo *ainfo = cinfo->args + i;
3787 gint32 stack_offset;
3789 stack_offset = ainfo->offset + ARGS_OFFSET;
3791 if (ainfo->storage == ArgInFloatReg) {
3792 if (!sparc_is_imm13 (stack_offset))
3794 sparc_ldf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3796 else if (ainfo->storage == ArgInDoubleReg) {
3797 /* The offset is guaranteed to be aligned by the ABI rules */
3798 sparc_lddf_imm (code, sparc_fp, stack_offset, ainfo->reg);
3816 mono_arch_instrument_epilog_full (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments, gboolean preserve_argument_registers)
3818 guint32 *code = (guint32*)p;
3819 int save_mode = SAVE_NONE;
3820 MonoMethod *method = cfg->method;
3822 switch (mono_type_get_underlying_type (mono_method_signature (method)->ret)->type) {
3823 case MONO_TYPE_VOID:
3824 /* special case string .ctor icall */
3825 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
3826 save_mode = SAVE_ONE;
3828 save_mode = SAVE_NONE;
3833 save_mode = SAVE_ONE;
3835 save_mode = SAVE_TWO;
3840 save_mode = SAVE_FP;
3842 case MONO_TYPE_VALUETYPE:
3843 save_mode = SAVE_STRUCT;
3846 save_mode = SAVE_ONE;
3850 /* Save the result to the stack and also put it into the output registers */
3852 switch (save_mode) {
3855 sparc_st_imm (code, sparc_i0, sparc_fp, 68);
3856 sparc_st_imm (code, sparc_i0, sparc_fp, 72);
3857 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3858 sparc_mov_reg_reg (code, sparc_i1, sparc_o2);
3861 sparc_sti_imm (code, sparc_i0, sparc_fp, ARGS_OFFSET);
3862 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3866 sparc_stdf_imm (code, sparc_f0, sparc_fp, ARGS_OFFSET);
3868 sparc_stdf_imm (code, sparc_f0, sparc_fp, 72);
3869 sparc_ld_imm (code, sparc_fp, 72, sparc_o1);
3870 sparc_ld_imm (code, sparc_fp, 72 + 4, sparc_o2);
3875 sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
3877 sparc_ld_imm (code, sparc_fp, 64, sparc_o1);
3885 sparc_set (code, cfg->method, sparc_o0);
3887 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, func);
3890 /* Restore result */
3892 switch (save_mode) {
3894 sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
3895 sparc_ld_imm (code, sparc_fp, 72, sparc_i0);
3898 sparc_ldi_imm (code, sparc_fp, ARGS_OFFSET, sparc_i0);
3901 sparc_lddf_imm (code, sparc_fp, ARGS_OFFSET, sparc_f0);
3912 mono_arch_emit_prolog (MonoCompile *cfg)
3914 MonoMethod *method = cfg->method;
3915 MonoMethodSignature *sig;
3921 cfg->code_size = 256;
3922 cfg->native_code = g_malloc (cfg->code_size);
3923 code = (guint32*)cfg->native_code;
3925 /* FIXME: Generate intermediate code instead */
3927 offset = cfg->stack_offset;
3928 offset += (16 * sizeof (gpointer)); /* register save area */
3930 offset += 4; /* struct/union return pointer */
3933 /* add parameter area size for called functions */
3934 if (cfg->param_area < (6 * sizeof (gpointer)))
3935 /* Reserve space for the first 6 arguments even if it is unused */
3936 offset += 6 * sizeof (gpointer);
3938 offset += cfg->param_area;
3940 /* align the stack size */
3941 offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
3944 * localloc'd memory is stored between the local variables (whose
3945 * size is given by cfg->stack_offset), and between the space reserved
3948 cfg->arch.localloc_offset = offset - cfg->stack_offset;
3950 cfg->stack_offset = offset;
3952 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
3953 /* Perform stack touching */
3957 if (!sparc_is_imm13 (- cfg->stack_offset)) {
3958 /* Can't use sparc_o7 here, since we're still in the caller's frame */
3959 sparc_set (code, (- cfg->stack_offset), GP_SCRATCH_REG);
3960 sparc_save (code, sparc_sp, GP_SCRATCH_REG, sparc_sp);
3963 sparc_save_imm (code, sparc_sp, - cfg->stack_offset, sparc_sp);
3966 if (strstr (cfg->method->name, "foo")) {
3967 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
3968 sparc_call_simple (code, 0);
3973 sig = mono_method_signature (method);
3975 cinfo = get_call_info (cfg, sig, FALSE);
3977 /* Keep in sync with emit_load_volatile_arguments */
3978 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3979 ArgInfo *ainfo = cinfo->args + i;
3980 gint32 stack_offset;
3982 inst = cfg->args [i];
3984 if (sig->hasthis && (i == 0))
3985 arg_type = &mono_defaults.object_class->byval_arg;
3987 arg_type = sig->params [i - sig->hasthis];
3989 stack_offset = ainfo->offset + ARGS_OFFSET;
3991 /* Save the split arguments so they will reside entirely on the stack */
3992 if (ainfo->storage == ArgInSplitRegStack) {
3993 /* Save the register to the stack */
3994 g_assert (inst->opcode == OP_REGOFFSET);
3995 if (!sparc_is_imm13 (stack_offset))
3997 sparc_st_imm (code, sparc_i5, inst->inst_basereg, stack_offset);
4000 if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
4001 /* Save the argument to a dword aligned stack location */
4003 * stack_offset contains the offset of the argument on the stack.
4004 * inst->inst_offset contains the dword aligned offset where the value
4007 if (ainfo->storage == ArgInIRegPair) {
4008 if (!sparc_is_imm13 (inst->inst_offset + 4))
4010 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
4011 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
4014 if (ainfo->storage == ArgInSplitRegStack) {
4016 g_assert_not_reached ();
4018 if (stack_offset != inst->inst_offset) {
4019 /* stack_offset is not dword aligned, so we need to make a copy */
4020 sparc_st_imm (code, sparc_i5, inst->inst_basereg, inst->inst_offset);
4021 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
4022 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
4026 if (ainfo->storage == ArgOnStackPair) {
4028 g_assert_not_reached ();
4030 if (stack_offset != inst->inst_offset) {
4031 /* stack_offset is not dword aligned, so we need to make a copy */
4032 sparc_ld_imm (code, sparc_fp, stack_offset, sparc_o7);
4033 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset);
4034 sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
4035 sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
4039 g_assert_not_reached ();
4042 if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
4043 /* Argument in register, but need to be saved to stack */
4044 if (!sparc_is_imm13 (stack_offset))
4046 if ((stack_offset - ARGS_OFFSET) & 0x1)
4047 sparc_stb_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4049 if ((stack_offset - ARGS_OFFSET) & 0x2)
4050 sparc_sth_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4052 if ((stack_offset - ARGS_OFFSET) & 0x4)
4053 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4056 sparc_stx_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4058 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
4062 if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
4066 /* Argument in regpair, but need to be saved to stack */
4067 if (!sparc_is_imm13 (inst->inst_offset + 4))
4069 sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
4070 sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
4072 else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
4073 if (!sparc_is_imm13 (stack_offset))
4075 sparc_stf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
4077 else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
4078 /* The offset is guaranteed to be aligned by the ABI rules */
4079 sparc_stdf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
4082 if ((ainfo->storage == ArgInFloatReg) && (inst->opcode == OP_REGVAR)) {
4083 /* Need to move into the a double precision register */
4084 sparc_fstod (code, ainfo->reg, ainfo->reg - 1);
4087 if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
4088 if (inst->opcode == OP_REGVAR)
4089 /* FIXME: Load the argument into memory */
4095 if (cfg->method->save_lmf) {
4096 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
4099 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
4100 sparc_set_template (code, sparc_o7);
4101 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ip));
4103 sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
4105 sparc_sti_imm (code, sparc_fp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebp));
4107 /* FIXME: add a relocation for this */
4108 sparc_set (code, cfg->method, sparc_o7);
4109 sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method));
4111 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
4112 (gpointer)"mono_arch_get_lmf_addr");
4115 code = (guint32*)mono_sparc_emit_save_lmf (code, lmf_offset);
4118 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4119 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
4121 cfg->code_len = (guint8*)code - cfg->native_code;
4123 g_assert (cfg->code_len <= cfg->code_size);
4125 return (guint8*)code;
4129 mono_arch_emit_epilog (MonoCompile *cfg)
4131 MonoMethod *method = cfg->method;
4134 int max_epilog_size = 16 + 20 * 4;
4136 if (cfg->method->save_lmf)
4137 max_epilog_size += 128;
4139 if (mono_jit_trace_calls != NULL)
4140 max_epilog_size += 50;
4142 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
4143 max_epilog_size += 50;
4145 while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
4146 cfg->code_size *= 2;
4147 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4148 mono_jit_stats.code_reallocs++;
4151 code = (guint32*)(cfg->native_code + cfg->code_len);
4153 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4154 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
4156 if (cfg->method->save_lmf) {
4157 gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
4159 code = mono_sparc_emit_restore_lmf (code, lmf_offset);
4163 * The V8 ABI requires that calls to functions which return a structure
4166 if (!v64 && mono_method_signature (cfg->method)->pinvoke && MONO_TYPE_ISSTRUCT(mono_method_signature (cfg->method)->ret))
4167 sparc_jmpl_imm (code, sparc_i7, 12, sparc_g0);
4171 /* Only fold last instruction into the restore if the exit block has an in count of 1
4172 and the previous block hasn't been optimized away since it may have an in count > 1 */
4173 if (cfg->bb_exit->in_count == 1 && cfg->bb_exit->in_bb[0]->native_offset != cfg->bb_exit->native_offset)
4177 * FIXME: The last instruction might have a branch pointing into it like in
4178 * int_ceq sparc_i0 <-
4182 /* Try folding last instruction into the restore */
4183 if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && sparc_inst_imm (code [-2]) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4184 /* or reg, imm, %i0 */
4185 int reg = sparc_inst_rs1 (code [-2]);
4186 int imm = (((gint32)(sparc_inst_imm13 (code [-2]))) << 19) >> 19;
4187 code [-2] = code [-1];
4189 sparc_restore_imm (code, reg, imm, sparc_o0);
4192 if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && (!sparc_inst_imm (code [-2])) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
4193 /* or reg, reg, %i0 */
4194 int reg1 = sparc_inst_rs1 (code [-2]);
4195 int reg2 = sparc_inst_rs2 (code [-2]);
4196 code [-2] = code [-1];
4198 sparc_restore (code, reg1, reg2, sparc_o0);
4201 sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
4203 cfg->code_len = (guint8*)code - cfg->native_code;
4205 g_assert (cfg->code_len < cfg->code_size);
4210 mono_arch_emit_exceptions (MonoCompile *cfg)
4212 MonoJumpInfo *patch_info;
4217 MonoClass *exc_classes [16];
4218 guint8 *exc_throw_start [16], *exc_throw_end [16];
4220 /* Compute needed space */
4221 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4222 if (patch_info->type == MONO_PATCH_INFO_EXC)
4227 * make sure we have enough space for exceptions
4230 code_size = exc_count * (20 * 4);
4232 code_size = exc_count * 24;
4235 while (cfg->code_len + code_size > (cfg->code_size - 16)) {
4236 cfg->code_size *= 2;
4237 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
4238 mono_jit_stats.code_reallocs++;
4241 code = (guint32*)(cfg->native_code + cfg->code_len);
4243 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
4244 switch (patch_info->type) {
4245 case MONO_PATCH_INFO_EXC: {
4246 MonoClass *exc_class;
4247 guint32 *buf, *buf2;
4248 guint32 throw_ip, type_idx;
4251 sparc_patch ((guint32*)(cfg->native_code + patch_info->ip.i), code);
4253 exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
4254 g_assert (exc_class);
4255 type_idx = exc_class->type_token - MONO_TOKEN_TYPE_DEF;
4256 throw_ip = patch_info->ip.i;
4258 /* Find a throw sequence for the same exception class */
4259 for (i = 0; i < nthrows; ++i)
4260 if (exc_classes [i] == exc_class)
4264 guint32 throw_offset = (((guint8*)exc_throw_end [i] - cfg->native_code) - throw_ip) >> 2;
4265 if (!sparc_is_imm13 (throw_offset))
4266 sparc_set32 (code, throw_offset, sparc_o1);
4268 disp = (exc_throw_start [i] - (guint8*)code) >> 2;
4269 g_assert (sparc_is_imm22 (disp));
4270 sparc_branch (code, 0, sparc_ba, disp);
4271 if (sparc_is_imm13 (throw_offset))
4272 sparc_set32 (code, throw_offset, sparc_o1);
4275 patch_info->type = MONO_PATCH_INFO_NONE;
4278 /* Emit the template for setting o1 */
4280 if (sparc_is_imm13 (((((guint8*)code - cfg->native_code) - throw_ip) >> 2) - 8))
4281 /* Can use a short form */
4284 sparc_set_template (code, sparc_o1);
4288 exc_classes [nthrows] = exc_class;
4289 exc_throw_start [nthrows] = (guint8*)code;
4293 mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
4297 /* first arg = type token */
4298 /* Pass the type index to reduce the size of the sparc_set */
4299 if (!sparc_is_imm13 (type_idx))
4300 sparc_set32 (code, type_idx, sparc_o0);
4302 /* second arg = offset between the throw ip and the current ip */
4303 /* On sparc, the saved ip points to the call instruction */
4304 disp = (((guint8*)code - cfg->native_code) - throw_ip) >> 2;
4305 sparc_set32 (buf, disp, sparc_o1);
4310 exc_throw_end [nthrows] = (guint8*)code;
4314 patch_info->data.name = "mono_arch_throw_corlib_exception";
4315 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
4316 patch_info->ip.i = (guint8*)code - cfg->native_code;
4320 if (sparc_is_imm13 (type_idx)) {
4321 /* Put it into the delay slot */
4324 sparc_set32 (code, type_idx, sparc_o0);
4325 g_assert (code - buf == 1);
4336 cfg->code_len = (guint8*)code - cfg->native_code;
4338 g_assert (cfg->code_len < cfg->code_size);
4342 gboolean lmf_addr_key_inited = FALSE;
4344 #ifdef MONO_SPARC_THR_TLS
4345 thread_key_t lmf_addr_key;
4347 pthread_key_t lmf_addr_key;
4351 mono_arch_get_lmf_addr (void)
4353 /* This is perf critical so we bypass the IO layer */
4354 /* The thr_... functions seem to be somewhat faster */
4355 #ifdef MONO_SPARC_THR_TLS
4357 thr_getspecific (lmf_addr_key, &res);
4360 return pthread_getspecific (lmf_addr_key);
4364 #ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
4367 * There seems to be no way to determine stack boundaries under solaris,
4368 * so it's not possible to determine whenever a SIGSEGV is caused by stack
4371 #error "--with-sigaltstack=yes not supported on solaris"
4376 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
4378 if (!lmf_addr_key_inited) {
4381 lmf_addr_key_inited = TRUE;
4383 #ifdef MONO_SPARC_THR_TLS
4384 res = thr_keycreate (&lmf_addr_key, NULL);
4386 res = pthread_key_create (&lmf_addr_key, NULL);
4388 g_assert (res == 0);
4392 #ifdef MONO_SPARC_THR_TLS
4393 thr_setspecific (lmf_addr_key, &tls->lmf);
4395 pthread_setspecific (lmf_addr_key, &tls->lmf);
4400 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
4405 mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
4407 MonoInst *ins = NULL;
4413 * mono_arch_get_argument_info:
4414 * @csig: a method signature
4415 * @param_count: the number of parameters to consider
4416 * @arg_info: an array to store the result infos
4418 * Gathers information on parameters such as size, alignment and
4419 * padding. arg_info should be large enought to hold param_count + 1 entries.
4421 * Returns the size of the activation frame.
4424 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
4430 cinfo = get_call_info (NULL, csig, FALSE);
4432 if (csig->hasthis) {
4433 ainfo = &cinfo->args [0];
4434 arg_info [0].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4437 for (k = 0; k < param_count; k++) {
4438 ainfo = &cinfo->args [k + csig->hasthis];
4440 arg_info [k + 1].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
4441 arg_info [k + 1].size = mono_type_size (csig->params [k], &align);
4450 mono_arch_print_tree (MonoInst *tree, int arity)
4455 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
4460 MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
4466 mono_arch_context_get_int_reg (MonoContext *ctx, int reg)
4468 /* FIXME: implement */
4469 g_assert_not_reached ();