2 * mini-ppc.c: PowerPC backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
8 * (C) 2003 Ximian, Inc.
13 #include <mono/metadata/appdomain.h>
14 #include <mono/metadata/debug-helpers.h>
21 int mono_exc_esp_offset = 0;
24 mono_arch_regname (int reg) {
25 static const char * rnames[] = {
26 "ppc_r0", "ppc_sp", "ppc_r2", "ppc_r3", "ppc_r4",
27 "ppc_r5", "ppc_r6", "ppc_r7", "ppc_r8", "ppc_r9",
28 "ppc_r10", "ppc_r11", "ppc_r12", "ppc_r13", "ppc_r14",
29 "ppc_r15", "ppc_r16", "ppc_r17", "ppc_r18", "ppc_r19",
30 "ppc_r20", "ppc_r21", "ppc_r22", "ppc_r23", "ppc_r24",
31 "ppc_r25", "ppc_r26", "ppc_r27", "ppc_r28", "ppc_r29",
34 if (reg >= 0 && reg < 32)
39 /* this function overwrites r0 */
41 emit_memcpy (guint8 *code, int size, int dreg, int doffset, int sreg, int soffset)
43 /* unrolled, use the counter in big */
45 ppc_lwz (code, ppc_r0, soffset, sreg);
46 ppc_stw (code, ppc_r0, doffset, dreg);
52 ppc_lhz (code, ppc_r0, soffset, sreg);
53 ppc_sth (code, ppc_r0, doffset, dreg);
59 ppc_lbz (code, ppc_r0, soffset, sreg);
60 ppc_stb (code, ppc_r0, doffset, dreg);
69 * mono_arch_get_argument_info:
70 * @csig: a method signature
71 * @param_count: the number of parameters to consider
72 * @arg_info: an array to store the result infos
74 * Gathers information on parameters such as size, alignment and
75 * padding. arg_info should be large enought to hold param_count + 1 entries.
77 * Returns the size of the activation frame.
80 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
82 int k, frame_size = 0;
86 if (MONO_TYPE_ISSTRUCT (csig->ret)) {
87 frame_size += sizeof (gpointer);
91 arg_info [0].offset = offset;
94 frame_size += sizeof (gpointer);
98 arg_info [0].size = frame_size;
100 for (k = 0; k < param_count; k++) {
103 size = mono_type_native_stack_size (csig->params [k], &align);
105 size = mono_type_stack_size (csig->params [k], &align);
107 /* ignore alignment for now */
110 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
111 arg_info [k].pad = pad;
113 arg_info [k + 1].pad = 0;
114 arg_info [k + 1].size = size;
116 arg_info [k + 1].offset = offset;
120 align = MONO_ARCH_FRAME_ALIGNMENT;
121 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
122 arg_info [k].pad = pad;
128 * Initialize the cpu to execute managed code.
131 mono_arch_cpu_init (void)
136 * This function returns the optimizations supported on this cpu.
139 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
143 /* no ppc-specific optimizations yet */
144 *exclude_mask = MONO_OPT_INLINE;
149 is_regsize_var (MonoType *t) {
159 case MONO_TYPE_OBJECT:
160 case MONO_TYPE_STRING:
161 case MONO_TYPE_CLASS:
162 case MONO_TYPE_SZARRAY:
163 case MONO_TYPE_ARRAY:
165 case MONO_TYPE_VALUETYPE:
166 if (t->data.klass->enumtype)
167 return is_regsize_var (t->data.klass->enum_basetype);
174 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
179 for (i = 0; i < cfg->num_varinfo; i++) {
180 MonoInst *ins = cfg->varinfo [i];
181 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
184 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
187 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
190 /* we can only allocate 32 bit values */
191 if (is_regsize_var (ins->inst_vtype)) {
192 g_assert (MONO_VARINFO (cfg, i)->reg == -1);
193 g_assert (i == vmv->idx);
194 vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
201 #define USE_EXTRA_TEMPS ((1<<30) | (1<<29))
202 //#define USE_EXTRA_TEMPS 0
205 mono_arch_get_global_int_regs (MonoCompile *cfg)
209 if (cfg->frame_reg != ppc_sp)
214 for (i = 13; i < top; ++i)
215 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
221 * mono_arch_regalloc_cost:
223 * Return the cost, in number of memory references, of the action of
224 * allocating the variable VMV into a register during global register
228 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
234 // code from ppc/tramp.c, try to keep in sync
235 #define MIN_CACHE_LINE 8
238 mono_arch_flush_icache (guint8 *code, gint size)
244 for (i = 0; i < size; i += MIN_CACHE_LINE, p += MIN_CACHE_LINE) {
245 asm ("dcbst 0,%0;" : : "r"(p) : "memory");
249 for (i = 0; i < size; i += MIN_CACHE_LINE, p += MIN_CACHE_LINE) {
250 asm ("icbi 0,%0; sync;" : : "r"(p) : "memory");
256 #define NOT_IMPLEMENTED(x) \
257 g_error ("FIXME: %s is not yet implemented. (trampoline)", x);
260 #define ALWAYS_ON_STACK(s) s
261 #define FP_ALSO_IN_REG(s) s
263 #define ALWAYS_ON_STACK(s)
264 #define FP_ALSO_IN_REG(s) s
265 #define ALIGN_DOUBLES
278 guint16 vtsize; /* in param area */
280 guint8 regtype : 4; /* 0 general, 1 basereg, 2 floating point register, see RegType* */
281 guint8 size : 4; /* 1, 2, 4, 8, or regs used by RegTypeStructByVal */
295 add_general (guint *gr, guint *stack_size, ArgInfo *ainfo, gboolean simple)
298 if (*gr >= 3 + PPC_NUM_REG_ARGS) {
299 ainfo->offset = PPC_STACK_PARAM_OFFSET + *stack_size;
300 ainfo->reg = ppc_sp; /* in the caller */
301 ainfo->regtype = RegTypeBase;
304 ALWAYS_ON_STACK (*stack_size += 4);
308 if (*gr >= 3 + PPC_NUM_REG_ARGS - 1) {
310 //*stack_size += (*stack_size % 8);
312 ainfo->offset = PPC_STACK_PARAM_OFFSET + *stack_size;
313 ainfo->reg = ppc_sp; /* in the caller */
314 ainfo->regtype = RegTypeBase;
321 ALWAYS_ON_STACK (*stack_size += 8);
330 calculate_sizes (MonoMethodSignature *sig, gboolean is_pinvoke)
333 int n = sig->hasthis + sig->param_count;
335 guint32 stack_size = 0;
336 CallInfo *cinfo = g_malloc0 (sizeof (CallInfo) + sizeof (ArgInfo) * n);
338 fr = PPC_FIRST_FPARG_REG;
339 gr = PPC_FIRST_ARG_REG;
341 /* FIXME: handle returning a struct */
342 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
343 add_general (&gr, &stack_size, &cinfo->ret, TRUE);
344 cinfo->struct_ret = PPC_FIRST_ARG_REG;
349 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
352 DEBUG(printf("params: %d\n", sig->param_count));
353 for (i = 0; i < sig->param_count; ++i) {
354 DEBUG(printf("param %d: ", i));
355 if (sig->params [i]->byref) {
356 DEBUG(printf("byref\n"));
357 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
361 simpletype = sig->params [i]->type;
363 switch (simpletype) {
364 case MONO_TYPE_BOOLEAN:
367 cinfo->args [n].size = 1;
368 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
374 cinfo->args [n].size = 2;
375 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
380 cinfo->args [n].size = 4;
381 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
387 case MONO_TYPE_FNPTR:
388 case MONO_TYPE_CLASS:
389 case MONO_TYPE_OBJECT:
390 case MONO_TYPE_STRING:
391 case MONO_TYPE_SZARRAY:
392 case MONO_TYPE_ARRAY:
393 cinfo->args [n].size = sizeof (gpointer);
394 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
397 case MONO_TYPE_VALUETYPE: {
399 if (sig->params [i]->data.klass->enumtype) {
400 simpletype = sig->params [i]->data.klass->enum_basetype->type;
403 size = mono_class_value_size (sig->params [i]->data.klass, NULL);
404 DEBUG(printf ("load %d bytes struct\n",
405 mono_class_value_size (sig->params [i]->data.klass, NULL)));
406 #if PPC_PASS_STRUCTS_BY_VALUE
408 int nwords = (size + sizeof (gpointer) -1 ) / sizeof (gpointer);
409 cinfo->args [n].regtype = RegTypeStructByVal;
410 if (gr <= PPC_LAST_ARG_REG) {
411 int rest = PPC_LAST_ARG_REG - gr + 1;
412 int n_in_regs = rest >= nwords? nwords: rest;
413 cinfo->args [n].size = n_in_regs;
414 cinfo->args [n].vtsize = nwords - n_in_regs;
415 cinfo->args [n].reg = gr;
418 cinfo->args [n].size = 0;
419 cinfo->args [n].vtsize = nwords;
421 cinfo->args [n].offset = PPC_STACK_PARAM_OFFSET + stack_size;
422 /*g_print ("offset for arg %d at %d\n", n, PPC_STACK_PARAM_OFFSET + stack_size);*/
423 stack_size += nwords * sizeof (gpointer);
426 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
427 cinfo->args [n].regtype = RegTypeStructByAddr;
432 case MONO_TYPE_TYPEDBYREF: {
433 int size = sizeof (MonoTypedRef);
434 /* keep in sync or merge with the valuetype case */
435 #if PPC_PASS_STRUCTS_BY_VALUE
437 int nwords = (size + sizeof (gpointer) -1 ) / sizeof (gpointer);
438 cinfo->args [n].regtype = RegTypeStructByVal;
439 if (gr <= PPC_LAST_ARG_REG) {
440 int rest = PPC_LAST_ARG_REG - gr + 1;
441 int n_in_regs = rest >= nwords? nwords: rest;
442 cinfo->args [n].size = n_in_regs;
443 cinfo->args [n].vtsize = nwords - n_in_regs;
444 cinfo->args [n].reg = gr;
447 cinfo->args [n].size = 0;
448 cinfo->args [n].vtsize = nwords;
450 cinfo->args [n].offset = PPC_STACK_PARAM_OFFSET + stack_size;
451 /*g_print ("offset for arg %d at %d\n", n, PPC_STACK_PARAM_OFFSET + stack_size);*/
452 stack_size += nwords * sizeof (gpointer);
455 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
456 cinfo->args [n].regtype = RegTypeStructByAddr;
463 cinfo->args [n].size = 8;
464 add_general (&gr, &stack_size, cinfo->args + n, FALSE);
468 cinfo->args [n].size = 4;
470 /* It was 7, now it is 8 in LinuxPPC */
471 if (fr <= PPC_LAST_FPARG_REG) {
472 cinfo->args [n].regtype = RegTypeFP;
473 cinfo->args [n].reg = fr;
475 FP_ALSO_IN_REG (gr ++);
476 ALWAYS_ON_STACK (stack_size += 4);
478 cinfo->args [n].offset = PPC_STACK_PARAM_OFFSET + stack_size;
479 cinfo->args [n].regtype = RegTypeBase;
480 cinfo->args [n].reg = ppc_sp; /* in the caller*/
486 cinfo->args [n].size = 8;
487 /* It was 7, now it is 8 in LinuxPPC */
488 if (fr <= PPC_LAST_FPARG_REG) {
489 cinfo->args [n].regtype = RegTypeFP;
490 cinfo->args [n].reg = fr;
492 FP_ALSO_IN_REG (gr += 2);
493 ALWAYS_ON_STACK (stack_size += 8);
495 cinfo->args [n].offset = PPC_STACK_PARAM_OFFSET + stack_size;
496 cinfo->args [n].regtype = RegTypeBase;
497 cinfo->args [n].reg = ppc_sp; /* in the caller*/
503 g_error ("Can't trampoline 0x%x", sig->params [i]->type);
508 simpletype = sig->ret->type;
510 switch (simpletype) {
511 case MONO_TYPE_BOOLEAN:
522 case MONO_TYPE_FNPTR:
523 case MONO_TYPE_CLASS:
524 case MONO_TYPE_OBJECT:
525 case MONO_TYPE_SZARRAY:
526 case MONO_TYPE_ARRAY:
527 case MONO_TYPE_STRING:
528 cinfo->ret.reg = ppc_r3;
532 cinfo->ret.reg = ppc_r3;
536 cinfo->ret.reg = ppc_f1;
537 cinfo->ret.regtype = RegTypeFP;
539 case MONO_TYPE_VALUETYPE:
540 if (sig->ret->data.klass->enumtype) {
541 simpletype = sig->ret->data.klass->enum_basetype->type;
545 case MONO_TYPE_TYPEDBYREF:
549 g_error ("Can't handle as return value 0x%x", sig->ret->type);
553 /* align stack size to 16 */
554 DEBUG (printf (" stack size: %d (%d)\n", (stack_size + 15) & ~15, stack_size));
555 stack_size = (stack_size + 15) & ~15;
557 cinfo->stack_usage = stack_size;
563 * Set var information according to the calling convention. ppc version.
564 * The locals var stuff should most likely be split in another method.
567 mono_arch_allocate_vars (MonoCompile *m)
569 MonoMethodSignature *sig;
570 MonoMethodHeader *header;
572 int i, offset, size, align, curinst;
573 int frame_reg = ppc_sp;
575 /* allow room for the vararg method args: void* and long/double */
576 if (mono_jit_trace_calls != NULL && mono_trace_eval (m->method))
577 m->param_area = MAX (m->param_area, sizeof (gpointer)*8);
579 header = ((MonoMethodNormal *)m->method)->header;
582 * We use the frame register also for any method that has
583 * exception clauses. This way, when the handlers are called,
584 * the code will reference local variables using the frame reg instead of
585 * the stack pointer: if we had to restore the stack pointer, we'd
586 * corrupt the method frames that are already on the stack (since
587 * filters get called before stack unwinding happens) when the filter
588 * code would call any method (this also applies to finally etc.).
590 if ((m->flags & MONO_CFG_HAS_ALLOCA) || header->num_clauses)
592 m->frame_reg = frame_reg;
593 if (frame_reg != ppc_sp) {
594 m->used_int_regs |= 1 << frame_reg;
597 sig = m->method->signature;
601 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
602 m->ret->opcode = OP_REGVAR;
603 m->ret->inst_c0 = ppc_r3;
605 /* FIXME: handle long and FP values */
606 switch (sig->ret->type) {
610 m->ret->opcode = OP_REGVAR;
611 m->ret->inst_c0 = ppc_r3;
615 /* local vars are at a positive offset from the stack pointer */
617 * also note that if the function uses alloca, we use ppc_r31
618 * to point at the local variables.
620 offset = PPC_MINIMAL_STACK_SIZE; /* linkage area */
621 /* align the offset to 16 bytes: not sure this is needed here */
623 //offset &= ~(16 - 1);
625 /* add parameter area size for called functions */
626 offset += m->param_area;
630 /* allow room to save the return value */
631 if (mono_jit_trace_calls != NULL && mono_trace_eval (m->method))
634 /* the MonoLMF structure is stored just below the stack pointer */
637 /* this stuff should not be needed on ppc and the new jit,
638 * because a call on ppc to the handlers doesn't change the
639 * stack pointer and the jist doesn't manipulate the stack pointer
640 * for operations involving valuetypes.
642 /* reserve space to store the esp */
643 offset += sizeof (gpointer);
645 /* this is a global constant */
646 mono_exc_esp_offset = offset;
649 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
651 offset += sizeof(gpointer) - 1;
652 offset &= ~(sizeof(gpointer) - 1);
653 inst->inst_offset = offset;
654 inst->opcode = OP_REGOFFSET;
655 inst->inst_basereg = frame_reg;
656 offset += sizeof(gpointer);
658 curinst = m->locals_start;
659 for (i = curinst; i < m->num_varinfo; ++i) {
660 inst = m->varinfo [i];
661 if (inst->opcode == OP_REGVAR)
664 /* inst->unused indicates native sized value types, this is used by the
665 * pinvoke wrappers when they call functions returning structure */
666 if (inst->unused && MONO_TYPE_ISSTRUCT (inst->inst_vtype))
667 size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
669 size = mono_type_size (inst->inst_vtype, &align);
672 offset &= ~(align - 1);
673 inst->inst_offset = offset;
674 inst->opcode = OP_REGOFFSET;
675 inst->inst_basereg = frame_reg;
677 //g_print ("allocating local %d to %d\n", i, inst->inst_offset);
682 inst = m->varinfo [curinst];
683 if (inst->opcode != OP_REGVAR) {
684 inst->opcode = OP_REGOFFSET;
685 inst->inst_basereg = frame_reg;
686 offset += sizeof (gpointer) - 1;
687 offset &= ~(sizeof (gpointer) - 1);
688 inst->inst_offset = offset;
689 offset += sizeof (gpointer);
694 for (i = 0; i < sig->param_count; ++i) {
695 inst = m->varinfo [curinst];
696 if (inst->opcode != OP_REGVAR) {
697 inst->opcode = OP_REGOFFSET;
698 inst->inst_basereg = frame_reg;
699 size = mono_type_size (sig->params [i], &align);
701 offset &= ~(align - 1);
702 inst->inst_offset = offset;
708 /* align the offset to 16 bytes */
713 m->stack_offset = offset;
717 /* Fixme: we need an alignment solution for enter_method and mono_arch_call_opcode,
718 * currently alignment in mono_arch_call_opcode is computed without arch_get_argument_info
722 * take the arguments and generate the arch-specific
723 * instructions to properly call the function in call.
724 * This includes pushing, moving arguments to the right register
726 * Issue: who does the spilling if needed, and when?
729 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
731 MonoMethodSignature *sig;
736 sig = call->signature;
737 n = sig->param_count + sig->hasthis;
739 cinfo = calculate_sizes (sig, sig->pinvoke);
740 if (cinfo->struct_ret)
741 call->used_iregs |= 1 << cinfo->struct_ret;
743 for (i = 0; i < n; ++i) {
744 ainfo = cinfo->args + i;
745 if (is_virtual && i == 0) {
746 /* the argument will be attached to the call instrucion */
748 call->used_iregs |= 1 << ainfo->reg;
750 MONO_INST_NEW (cfg, arg, OP_OUTARG);
752 arg->cil_code = in->cil_code;
754 arg->type = in->type;
755 /* prepend, we'll need to reverse them later */
756 arg->next = call->out_args;
757 call->out_args = arg;
758 if (ainfo->regtype == RegTypeGeneral) {
759 arg->unused = ainfo->reg;
760 call->used_iregs |= 1 << ainfo->reg;
761 if (arg->type == STACK_I8)
762 call->used_iregs |= 1 << (ainfo->reg + 1);
763 } else if (ainfo->regtype == RegTypeStructByAddr) {
764 /* FIXME: where si the data allocated? */
765 arg->unused = ainfo->reg;
766 call->used_iregs |= 1 << ainfo->reg;
767 } else if (ainfo->regtype == RegTypeStructByVal) {
769 /* mark the used regs */
770 for (cur_reg = 0; cur_reg < ainfo->size; ++cur_reg) {
771 call->used_iregs |= 1 << (ainfo->reg + cur_reg);
773 arg->opcode = OP_OUTARG_VT;
774 arg->unused = ainfo->reg | (ainfo->size << 8) | (ainfo->vtsize << 16);
775 arg->inst_imm = ainfo->offset;
776 } else if (ainfo->regtype == RegTypeBase) {
777 arg->opcode = OP_OUTARG;
778 arg->unused = ainfo->reg | (ainfo->size << 8);
779 arg->inst_imm = ainfo->offset;
780 } else if (ainfo->regtype == RegTypeFP) {
781 arg->opcode = OP_OUTARG_R8;
782 arg->unused = ainfo->reg;
783 call->used_fregs |= 1 << ainfo->reg;
784 if (ainfo->size == 4) {
785 arg->opcode = OP_OUTARG_R8;
786 /* we reduce the precision */
788 MONO_INST_NEW (cfg, conv, OP_FCONV_TO_R4);
789 conv->inst_left = arg->inst_left;
790 arg->inst_left = conv;*/
793 g_assert_not_reached ();
798 * Reverse the call->out_args list.
801 MonoInst *prev = NULL, *list = call->out_args, *next;
808 call->out_args = prev;
810 call->stack_usage = cinfo->stack_usage;
811 cfg->param_area = MAX (cfg->param_area, cinfo->stack_usage);
812 cfg->flags |= MONO_CFG_HAS_CALLS;
814 * should set more info in call, such as the stack space
815 * used by the args that needs to be added back to esp
823 * Allow tracing to work with this interface (with an optional argument)
827 * This may be needed on some archs or for debugging support.
830 mono_arch_instrument_mem_needs (MonoMethod *method, int *stack, int *code)
832 /* no stack room needed now (may be needed for FASTCALL-trace support) */
834 /* split prolog-epilog requirements? */
835 *code = 50; /* max bytes needed: check this number */
839 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
843 ppc_load (code, ppc_r3, cfg->method);
844 ppc_li (code, ppc_r4, 0); /* NULL ebp for now */
845 ppc_load (code, ppc_r0, func);
846 ppc_mtlr (code, ppc_r0);
860 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
863 int save_mode = SAVE_NONE;
864 MonoMethod *method = cfg->method;
865 int rtype = method->signature->ret->type;
866 int save_offset = PPC_STACK_PARAM_OFFSET + cfg->param_area;
873 /* special case string .ctor icall */
874 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
875 save_mode = SAVE_ONE;
877 save_mode = SAVE_NONE;
881 save_mode = SAVE_TWO;
887 case MONO_TYPE_VALUETYPE:
888 if (method->signature->ret->data.klass->enumtype) {
889 rtype = method->signature->ret->data.klass->enum_basetype->type;
892 save_mode = SAVE_STRUCT;
895 save_mode = SAVE_ONE;
901 ppc_stw (code, ppc_r3, save_offset, cfg->frame_reg);
902 ppc_stw (code, ppc_r4, save_offset + 4, cfg->frame_reg);
903 if (enable_arguments) {
904 ppc_mr (code, ppc_r5, ppc_r4);
905 ppc_mr (code, ppc_r4, ppc_r3);
909 ppc_stw (code, ppc_r3, save_offset, cfg->frame_reg);
910 if (enable_arguments) {
911 ppc_mr (code, ppc_r4, ppc_r3);
915 ppc_stfd (code, ppc_f1, save_offset, cfg->frame_reg);
916 if (enable_arguments) {
917 /* FIXME: what reg? */
918 ppc_fmr (code, ppc_f3, ppc_f1);
919 ppc_lwz (code, ppc_r4, save_offset, cfg->frame_reg);
920 ppc_lwz (code, ppc_r5, save_offset + 4, cfg->frame_reg);
924 if (enable_arguments) {
925 /* FIXME: get the actual address */
926 ppc_mr (code, ppc_r4, ppc_r3);
934 ppc_load (code, ppc_r3, cfg->method);
935 ppc_load (code, ppc_r0, func);
936 ppc_mtlr (code, ppc_r0);
941 ppc_lwz (code, ppc_r3, save_offset, cfg->frame_reg);
942 ppc_lwz (code, ppc_r4, save_offset + 4, cfg->frame_reg);
945 ppc_lwz (code, ppc_r3, save_offset, cfg->frame_reg);
948 ppc_lfd (code, ppc_f1, save_offset, cfg->frame_reg);
958 * Conditional branches have a small offset, so if it is likely overflowed,
959 * we do a branch to the end of the method (uncond branches have much larger
960 * offsets) where we perform the conditional and jump back unconditionally.
961 * It's slightly slower, since we add two uncond branches, but it's very simple
962 * with the current patch implementation and such large methods are likely not
963 * going to be perf critical anyway.
972 #define EMIT_COND_BRANCH_FLAGS(ins,b0,b1) \
973 if (ins->flags & MONO_INST_BRLABEL) { \
974 if (0 && ins->inst_i0->inst_c0) { \
975 ppc_bc (code, (b0), (b1), (code - cfg->native_code + ins->inst_i0->inst_c0) & 0xffff); \
977 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
978 ppc_bc (code, (b0), (b1), 0); \
981 if (0 && ins->inst_true_bb->native_offset) { \
982 ppc_bc (code, (b0), (b1), (code - cfg->native_code + ins->inst_true_bb->native_offset) & 0xffff); \
984 int br_disp = ins->inst_true_bb->max_offset - offset; \
985 if (!ppc_is_imm16 (br_disp + 1024) || ! ppc_is_imm16 (ppc_is_imm16 (br_disp - 1024))) { \
986 MonoOvfJump *ovfj = mono_mempool_alloc (cfg->mempool, sizeof (MonoOvfJump)); \
987 ovfj->bb = ins->inst_true_bb; \
989 ovfj->b0_cond = (b0); \
990 ovfj->b1_cond = (b1); \
991 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB_OVF, ovfj); \
994 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
995 ppc_bc (code, (b0), (b1), 0); \
1000 #define EMIT_COND_BRANCH(ins,cond) EMIT_COND_BRANCH_FLAGS(ins, branch_b0_table [(cond)], branch_b1_table [(cond)])
1002 /* emit an exception if condition is fail
1004 * We assign the extra code used to throw the implicit exceptions
1005 * to cfg->bb_exit as far as the big branch handling is concerned
1007 #define EMIT_COND_SYSTEM_EXCEPTION_FLAGS(b0,b1,exc_name) \
1009 int br_disp = cfg->bb_exit->max_offset - offset; \
1010 if (!ppc_is_imm16 (br_disp + 1024) || ! ppc_is_imm16 (ppc_is_imm16 (br_disp - 1024))) { \
1011 MonoOvfJump *ovfj = mono_mempool_alloc (cfg->mempool, sizeof (MonoOvfJump)); \
1014 ovfj->b0_cond = (b0); \
1015 ovfj->b1_cond = (b1); \
1016 /* FIXME: test this code */ \
1017 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC_OVF, ovfj); \
1019 cfg->bb_exit->max_offset += 24; \
1021 mono_add_patch_info (cfg, code - cfg->native_code, \
1022 MONO_PATCH_INFO_EXC, exc_name); \
1023 ppc_bc (code, (b0), (b1), 0); \
1027 #define EMIT_COND_SYSTEM_EXCEPTION(cond,exc_name) EMIT_COND_SYSTEM_EXCEPTION_FLAGS(branch_b0_table [(cond)], branch_b1_table [(cond)], (exc_name))
1030 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1032 MonoInst *ins, *last_ins = NULL;
1037 switch (ins->opcode) {
1039 /* remove unnecessary multiplication with 1 */
1040 if (ins->inst_imm == 1) {
1041 if (ins->dreg != ins->sreg1) {
1042 ins->opcode = OP_MOVE;
1044 last_ins->next = ins->next;
1049 int power2 = mono_is_power_of_two (ins->inst_imm);
1051 ins->opcode = OP_SHL_IMM;
1052 ins->inst_imm = power2;
1056 case OP_LOAD_MEMBASE:
1057 case OP_LOADI4_MEMBASE:
1059 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1060 * OP_LOAD_MEMBASE offset(basereg), reg
1062 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
1063 || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1064 ins->inst_basereg == last_ins->inst_destbasereg &&
1065 ins->inst_offset == last_ins->inst_offset) {
1066 if (ins->dreg == last_ins->sreg1) {
1067 last_ins->next = ins->next;
1071 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1072 ins->opcode = OP_MOVE;
1073 ins->sreg1 = last_ins->sreg1;
1077 * Note: reg1 must be different from the basereg in the second load
1078 * OP_LOAD_MEMBASE offset(basereg), reg1
1079 * OP_LOAD_MEMBASE offset(basereg), reg2
1081 * OP_LOAD_MEMBASE offset(basereg), reg1
1082 * OP_MOVE reg1, reg2
1084 } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1085 || last_ins->opcode == OP_LOAD_MEMBASE) &&
1086 ins->inst_basereg != last_ins->dreg &&
1087 ins->inst_basereg == last_ins->inst_basereg &&
1088 ins->inst_offset == last_ins->inst_offset) {
1090 if (ins->dreg == last_ins->dreg) {
1091 last_ins->next = ins->next;
1095 ins->opcode = OP_MOVE;
1096 ins->sreg1 = last_ins->dreg;
1099 //g_assert_not_reached ();
1103 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1104 * OP_LOAD_MEMBASE offset(basereg), reg
1106 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1107 * OP_ICONST reg, imm
1109 } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1110 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1111 ins->inst_basereg == last_ins->inst_destbasereg &&
1112 ins->inst_offset == last_ins->inst_offset) {
1113 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1114 ins->opcode = OP_ICONST;
1115 ins->inst_c0 = last_ins->inst_imm;
1116 g_assert_not_reached (); // check this rule
1120 case OP_LOADU1_MEMBASE:
1121 case OP_LOADI1_MEMBASE:
1122 if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1123 ins->inst_basereg == last_ins->inst_destbasereg &&
1124 ins->inst_offset == last_ins->inst_offset) {
1125 if (ins->dreg == last_ins->sreg1) {
1126 last_ins->next = ins->next;
1130 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1131 ins->opcode = OP_MOVE;
1132 ins->sreg1 = last_ins->sreg1;
1136 case OP_LOADU2_MEMBASE:
1137 case OP_LOADI2_MEMBASE:
1138 if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1139 ins->inst_basereg == last_ins->inst_destbasereg &&
1140 ins->inst_offset == last_ins->inst_offset) {
1141 if (ins->dreg == last_ins->sreg1) {
1142 last_ins->next = ins->next;
1146 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1147 ins->opcode = OP_MOVE;
1148 ins->sreg1 = last_ins->sreg1;
1156 ins->opcode = OP_MOVE;
1160 if (ins->dreg == ins->sreg1) {
1162 last_ins->next = ins->next;
1167 * OP_MOVE sreg, dreg
1168 * OP_MOVE dreg, sreg
1170 if (last_ins && last_ins->opcode == OP_MOVE &&
1171 ins->sreg1 == last_ins->dreg &&
1172 ins->dreg == last_ins->sreg1) {
1173 last_ins->next = ins->next;
1182 bb->last_ins = last_ins;
1186 * the branch_b0_table should maintain the order of these
1200 branch_b0_table [] = {
1215 branch_b1_table [] = {
1230 * returns the offset used by spillvar. It allocates a new
1231 * spill variable if necessary.
1234 mono_spillvar_offset (MonoCompile *cfg, int spillvar)
1236 MonoSpillInfo **si, *info;
1239 si = &cfg->spill_info;
1241 while (i <= spillvar) {
1244 *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1246 info->offset = cfg->stack_offset;
1247 cfg->stack_offset += sizeof (gpointer);
1251 return (*si)->offset;
1257 g_assert_not_reached ();
1262 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
1264 MonoSpillInfo **si, *info;
1267 si = &cfg->spill_info_float;
1269 while (i <= spillvar) {
1272 *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
1274 cfg->stack_offset += 7;
1275 cfg->stack_offset &= ~7;
1276 info->offset = cfg->stack_offset;
1277 cfg->stack_offset += sizeof (double);
1281 return (*si)->offset;
1287 g_assert_not_reached ();
1292 #define DEBUG(a) if (cfg->verbose_level > 1) a
1294 #define reg_is_freeable(r) ((r) >= 3 && (r) <= 10)
1295 #define freg_is_freeable(r) ((r) >= 1 && (r) <= 13)
1304 static const char*const * ins_spec = ppcg4;
1307 print_ins (int i, MonoInst *ins)
1309 const char *spec = ins_spec [ins->opcode];
1310 g_print ("\t%-2d %s", i, mono_inst_name (ins->opcode));
1311 if (spec [MONO_INST_DEST]) {
1312 if (ins->dreg >= MONO_MAX_IREGS)
1313 g_print (" R%d <-", ins->dreg);
1315 g_print (" %s <-", mono_arch_regname (ins->dreg));
1317 if (spec [MONO_INST_SRC1]) {
1318 if (ins->sreg1 >= MONO_MAX_IREGS)
1319 g_print (" R%d", ins->sreg1);
1321 g_print (" %s", mono_arch_regname (ins->sreg1));
1323 if (spec [MONO_INST_SRC2]) {
1324 if (ins->sreg2 >= MONO_MAX_IREGS)
1325 g_print (" R%d", ins->sreg2);
1327 g_print (" %s", mono_arch_regname (ins->sreg2));
1329 if (spec [MONO_INST_CLOB])
1330 g_print (" clobbers: %c", spec [MONO_INST_CLOB]);
1335 print_regtrack (RegTrack *t, int num)
1341 for (i = 0; i < num; ++i) {
1344 if (i >= MONO_MAX_IREGS) {
1345 g_snprintf (buf, sizeof(buf), "R%d", i);
1348 r = mono_arch_regname (i);
1349 g_print ("liveness: %s [%d - %d]\n", r, t [i].born_in, t[i].last_use);
1353 typedef struct InstList InstList;
1361 static inline InstList*
1362 inst_list_prepend (MonoMemPool *pool, InstList *list, MonoInst *data)
1364 InstList *item = mono_mempool_alloc (pool, sizeof (InstList));
1374 * Force the spilling of the variable in the symbolic register 'reg'.
1377 get_register_force_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, int reg)
1382 sel = cfg->rs->iassign [reg];
1383 /*i = cfg->rs->isymbolic [sel];
1384 g_assert (i == reg);*/
1386 spill = ++cfg->spill_count;
1387 cfg->rs->iassign [i] = -spill - 1;
1388 mono_regstate_free_int (cfg->rs, sel);
1389 /* we need to create a spill var and insert a load to sel after the current instruction */
1390 MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1392 load->inst_basereg = cfg->frame_reg;
1393 load->inst_offset = mono_spillvar_offset (cfg, spill);
1395 while (ins->next != item->prev->data)
1398 load->next = ins->next;
1400 DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%sp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1401 i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1402 g_assert (i == sel);
1408 get_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, guint32 regmask, int reg)
1413 DEBUG (g_print ("start regmask to assign R%d: 0x%08x (R%d <- R%d R%d)\n", reg, regmask, ins->dreg, ins->sreg1, ins->sreg2));
1414 /* exclude the registers in the current instruction */
1415 if (reg != ins->sreg1 && (reg_is_freeable (ins->sreg1) || (ins->sreg1 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg1] >= 0))) {
1416 if (ins->sreg1 >= MONO_MAX_IREGS)
1417 regmask &= ~ (1 << cfg->rs->iassign [ins->sreg1]);
1419 regmask &= ~ (1 << ins->sreg1);
1420 DEBUG (g_print ("excluding sreg1 %s\n", mono_arch_regname (ins->sreg1)));
1422 if (reg != ins->sreg2 && (reg_is_freeable (ins->sreg2) || (ins->sreg2 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg2] >= 0))) {
1423 if (ins->sreg2 >= MONO_MAX_IREGS)
1424 regmask &= ~ (1 << cfg->rs->iassign [ins->sreg2]);
1426 regmask &= ~ (1 << ins->sreg2);
1427 DEBUG (g_print ("excluding sreg2 %s %d\n", mono_arch_regname (ins->sreg2), ins->sreg2));
1429 if (reg != ins->dreg && reg_is_freeable (ins->dreg)) {
1430 regmask &= ~ (1 << ins->dreg);
1431 DEBUG (g_print ("excluding dreg %s\n", mono_arch_regname (ins->dreg)));
1434 DEBUG (g_print ("available regmask: 0x%08x\n", regmask));
1435 g_assert (regmask); /* need at least a register we can free */
1437 /* we should track prev_use and spill the register that's farther */
1438 for (i = 0; i < MONO_MAX_IREGS; ++i) {
1439 if (regmask & (1 << i)) {
1441 DEBUG (g_print ("selected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->iassign [sel]));
1445 i = cfg->rs->isymbolic [sel];
1446 spill = ++cfg->spill_count;
1447 cfg->rs->iassign [i] = -spill - 1;
1448 mono_regstate_free_int (cfg->rs, sel);
1449 /* we need to create a spill var and insert a load to sel after the current instruction */
1450 MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
1452 load->inst_basereg = cfg->frame_reg;
1453 load->inst_offset = mono_spillvar_offset (cfg, spill);
1455 while (ins->next != item->prev->data)
1458 load->next = ins->next;
1460 DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%sp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1461 i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
1462 g_assert (i == sel);
1468 get_float_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, guint32 regmask, int reg)
1473 DEBUG (g_print ("start regmask to assign R%d: 0x%08x (R%d <- R%d R%d)\n", reg, regmask, ins->dreg, ins->sreg1, ins->sreg2));
1474 /* exclude the registers in the current instruction */
1475 if (reg != ins->sreg1 && (freg_is_freeable (ins->sreg1) || (ins->sreg1 >= MONO_MAX_FREGS && cfg->rs->fassign [ins->sreg1] >= 0))) {
1476 if (ins->sreg1 >= MONO_MAX_FREGS)
1477 regmask &= ~ (1 << cfg->rs->fassign [ins->sreg1]);
1479 regmask &= ~ (1 << ins->sreg1);
1480 DEBUG (g_print ("excluding sreg1 %s\n", mono_arch_regname (ins->sreg1)));
1482 if (reg != ins->sreg2 && (freg_is_freeable (ins->sreg2) || (ins->sreg2 >= MONO_MAX_FREGS && cfg->rs->fassign [ins->sreg2] >= 0))) {
1483 if (ins->sreg2 >= MONO_MAX_FREGS)
1484 regmask &= ~ (1 << cfg->rs->fassign [ins->sreg2]);
1486 regmask &= ~ (1 << ins->sreg2);
1487 DEBUG (g_print ("excluding sreg2 %s %d\n", mono_arch_regname (ins->sreg2), ins->sreg2));
1489 if (reg != ins->dreg && freg_is_freeable (ins->dreg)) {
1490 regmask &= ~ (1 << ins->dreg);
1491 DEBUG (g_print ("excluding dreg %s\n", mono_arch_regname (ins->dreg)));
1494 DEBUG (g_print ("available regmask: 0x%08x\n", regmask));
1495 g_assert (regmask); /* need at least a register we can free */
1497 /* we should track prev_use and spill the register that's farther */
1498 for (i = 0; i < MONO_MAX_FREGS; ++i) {
1499 if (regmask & (1 << i)) {
1501 DEBUG (g_print ("selected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->fassign [sel]));
1505 i = cfg->rs->fsymbolic [sel];
1506 spill = ++cfg->spill_count;
1507 cfg->rs->fassign [i] = -spill - 1;
1508 mono_regstate_free_float(cfg->rs, sel);
1509 /* we need to create a spill var and insert a load to sel after the current instruction */
1510 MONO_INST_NEW (cfg, load, OP_LOADR8_MEMBASE);
1512 load->inst_basereg = cfg->frame_reg;
1513 load->inst_offset = mono_spillvar_offset_float (cfg, spill);
1515 while (ins->next != item->prev->data)
1518 load->next = ins->next;
1520 DEBUG (g_print ("SPILLED LOAD FP (%d at 0x%08x(%%sp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
1521 i = mono_regstate_alloc_float (cfg->rs, 1 << sel);
1522 g_assert (i == sel);
1528 create_copy_ins (MonoCompile *cfg, int dest, int src, MonoInst *ins)
1531 MONO_INST_NEW (cfg, copy, OP_MOVE);
1535 copy->next = ins->next;
1538 DEBUG (g_print ("\tforced copy from %s to %s\n", mono_arch_regname (src), mono_arch_regname (dest)));
1543 create_copy_ins_float (MonoCompile *cfg, int dest, int src, MonoInst *ins)
1546 MONO_INST_NEW (cfg, copy, OP_FMOVE);
1550 copy->next = ins->next;
1553 DEBUG (g_print ("\tforced copy from %s to %s\n", mono_arch_regname (src), mono_arch_regname (dest)));
1558 create_spilled_store (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins)
1561 MONO_INST_NEW (cfg, store, OP_STORE_MEMBASE_REG);
1563 store->inst_destbasereg = cfg->frame_reg;
1564 store->inst_offset = mono_spillvar_offset (cfg, spill);
1566 store->next = ins->next;
1569 DEBUG (g_print ("SPILLED STORE (%d at 0x%08x(%%sp)) R%d (from %s)\n", spill, store->inst_offset, prev_reg, mono_arch_regname (reg)));
1574 create_spilled_store_float (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins)
1577 MONO_INST_NEW (cfg, store, OP_STORER8_MEMBASE_REG);
1579 store->inst_destbasereg = cfg->frame_reg;
1580 store->inst_offset = mono_spillvar_offset_float (cfg, spill);
1582 store->next = ins->next;
1585 DEBUG (g_print ("SPILLED STORE FP (%d at 0x%08x(%%sp)) R%d (from %s)\n", spill, store->inst_offset, prev_reg, mono_arch_regname (reg)));
1590 insert_before_ins (MonoInst *ins, InstList *item, MonoInst* to_insert)
1593 g_assert (item->next);
1594 prev = item->next->data;
1596 while (prev->next != ins)
1598 to_insert->next = ins;
1599 prev->next = to_insert;
1601 * needed otherwise in the next instruction we can add an ins to the
1602 * end and that would get past this instruction.
1604 item->data = to_insert;
1608 alloc_int_reg (MonoCompile *cfg, InstList *curinst, MonoInst *ins, int sym_reg, guint32 allow_mask)
1610 int val = cfg->rs->iassign [sym_reg];
1614 /* the register gets spilled after this inst */
1617 val = mono_regstate_alloc_int (cfg->rs, allow_mask);
1619 val = get_register_spilling (cfg, curinst, ins, allow_mask, sym_reg);
1620 cfg->rs->iassign [sym_reg] = val;
1621 /* add option to store before the instruction for src registers */
1623 create_spilled_store (cfg, spill, val, sym_reg, ins);
1625 cfg->rs->isymbolic [val] = sym_reg;
1629 /* use ppc_r3-ppc_10,ppc_r12 as temp registers, f1-f13 for FP registers */
1630 #define PPC_CALLER_REGS ((0xff<<3) | (1<<12) | USE_EXTRA_TEMPS)
1631 #define PPC_CALLER_FREGS (0x3ffe)
1634 * Local register allocation.
1635 * We first scan the list of instructions and we save the liveness info of
1636 * each register (when the register is first used, when it's value is set etc.).
1637 * We also reverse the list of instructions (in the InstList list) because assigning
1638 * registers backwards allows for more tricks to be used.
1641 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1644 MonoRegState *rs = cfg->rs;
1646 RegTrack *reginfo, *reginfof;
1647 RegTrack *reginfo1, *reginfo2, *reginfod;
1648 InstList *tmp, *reversed = NULL;
1650 guint32 src1_mask, src2_mask, dest_mask;
1651 guint32 cur_iregs, cur_fregs;
1655 rs->next_vireg = bb->max_ireg;
1656 rs->next_vfreg = bb->max_freg;
1657 mono_regstate_assign (rs);
1658 reginfo = mono_mempool_alloc0 (cfg->mempool, sizeof (RegTrack) * rs->next_vireg);
1659 reginfof = mono_mempool_alloc0 (cfg->mempool, sizeof (RegTrack) * rs->next_vfreg);
1660 rs->ifree_mask = PPC_CALLER_REGS;
1661 rs->ffree_mask = PPC_CALLER_FREGS;
1665 DEBUG (g_print ("LOCAL regalloc: basic block: %d\n", bb->block_num));
1666 /* forward pass on the instructions to collect register liveness info */
1668 spec = ins_spec [ins->opcode];
1669 DEBUG (print_ins (i, ins));
1670 /*if (spec [MONO_INST_CLOB] == 'c') {
1671 MonoCallInst * call = (MonoCallInst*)ins;
1674 if (spec [MONO_INST_SRC1]) {
1675 if (spec [MONO_INST_SRC1] == 'f')
1676 reginfo1 = reginfof;
1679 reginfo1 [ins->sreg1].prev_use = reginfo1 [ins->sreg1].last_use;
1680 reginfo1 [ins->sreg1].last_use = i;
1684 if (spec [MONO_INST_SRC2]) {
1685 if (spec [MONO_INST_SRC2] == 'f')
1686 reginfo2 = reginfof;
1689 reginfo2 [ins->sreg2].prev_use = reginfo2 [ins->sreg2].last_use;
1690 reginfo2 [ins->sreg2].last_use = i;
1694 if (spec [MONO_INST_DEST]) {
1695 if (spec [MONO_INST_DEST] == 'f')
1696 reginfod = reginfof;
1699 if (spec [MONO_INST_DEST] != 'b') /* it's not just a base register */
1700 reginfod [ins->dreg].killed_in = i;
1701 reginfod [ins->dreg].prev_use = reginfod [ins->dreg].last_use;
1702 reginfod [ins->dreg].last_use = i;
1703 if (reginfod [ins->dreg].born_in == 0 || reginfod [ins->dreg].born_in > i)
1704 reginfod [ins->dreg].born_in = i;
1705 if (spec [MONO_INST_DEST] == 'l') {
1706 /* result in eax:edx, the virtual register is allocated sequentially */
1707 reginfod [ins->dreg + 1].prev_use = reginfod [ins->dreg + 1].last_use;
1708 reginfod [ins->dreg + 1].last_use = i;
1709 if (reginfod [ins->dreg + 1].born_in == 0 || reginfod [ins->dreg + 1].born_in > i)
1710 reginfod [ins->dreg + 1].born_in = i;
1715 reversed = inst_list_prepend (cfg->mempool, reversed, ins);
1720 cur_iregs = PPC_CALLER_REGS;
1721 cur_fregs = PPC_CALLER_FREGS;
1723 DEBUG (print_regtrack (reginfo, rs->next_vireg));
1724 DEBUG (print_regtrack (reginfof, rs->next_vfreg));
1727 int prev_dreg, prev_sreg1, prev_sreg2;
1730 spec = ins_spec [ins->opcode];
1731 DEBUG (g_print ("processing:"));
1732 DEBUG (print_ins (i, ins));
1733 /* make the register available for allocation: FIXME add fp reg */
1734 if (ins->opcode == OP_SETREG || ins->opcode == OP_SETREGIMM) {
1735 cur_iregs |= 1 << ins->dreg;
1736 DEBUG (g_print ("adding %d to cur_iregs\n", ins->dreg));
1737 } else if (ins->opcode == OP_SETFREG) {
1738 cur_fregs |= 1 << ins->dreg;
1739 DEBUG (g_print ("adding %d to cur_fregs\n", ins->dreg));
1740 } else if (spec [MONO_INST_CLOB] == 'c') {
1741 MonoCallInst *cinst = (MonoCallInst*)ins;
1742 DEBUG (g_print ("excluding regs 0x%x from cur_iregs (0x%x)\n", cinst->used_iregs, cur_iregs));
1743 DEBUG (g_print ("excluding fpregs 0x%x from cur_fregs (0x%x)\n", cinst->used_fregs, cur_fregs));
1744 cur_iregs &= ~cinst->used_iregs;
1745 cur_fregs &= ~cinst->used_fregs;
1746 DEBUG (g_print ("available cur_iregs: 0x%x\n", cur_iregs));
1747 DEBUG (g_print ("available cur_fregs: 0x%x\n", cur_fregs));
1748 /* registers used by the calling convention are excluded from
1749 * allocation: they will be selectively enabled when they are
1750 * assigned by the special SETREG opcodes.
1753 dest_mask = src1_mask = src2_mask = cur_iregs;
1754 /* update for use with FP regs... */
1755 if (spec [MONO_INST_DEST] == 'f') {
1756 dest_mask = cur_fregs;
1757 if (ins->dreg >= MONO_MAX_FREGS) {
1758 val = rs->fassign [ins->dreg];
1759 prev_dreg = ins->dreg;
1763 /* the register gets spilled after this inst */
1766 val = mono_regstate_alloc_float (rs, dest_mask);
1768 val = get_float_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1769 rs->fassign [ins->dreg] = val;
1771 create_spilled_store_float (cfg, spill, val, prev_dreg, ins);
1773 DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
1774 rs->fsymbolic [val] = prev_dreg;
1776 if (spec [MONO_INST_CLOB] == 'c' && ins->dreg != ppc_f1) {
1777 /* this instruction only outputs to ppc_f1, need to copy */
1778 create_copy_ins_float (cfg, ins->dreg, ppc_f1, ins);
1783 if (freg_is_freeable (ins->dreg) && prev_dreg >= 0 && (reginfof [prev_dreg].born_in >= i || !(cur_fregs & (1 << ins->dreg)))) {
1784 DEBUG (g_print ("\tfreeable float %s (R%d) (born in %d)\n", mono_arch_regname (ins->dreg), prev_dreg, reginfof [prev_dreg].born_in));
1785 mono_regstate_free_float (rs, ins->dreg);
1787 } else if (ins->dreg >= MONO_MAX_IREGS) {
1788 val = rs->iassign [ins->dreg];
1789 prev_dreg = ins->dreg;
1793 /* the register gets spilled after this inst */
1796 val = mono_regstate_alloc_int (rs, dest_mask);
1798 val = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
1799 rs->iassign [ins->dreg] = val;
1801 create_spilled_store (cfg, spill, val, prev_dreg, ins);
1803 DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
1804 rs->isymbolic [val] = prev_dreg;
1806 if (spec [MONO_INST_DEST] == 'l') {
1807 int hreg = prev_dreg + 1;
1808 val = rs->iassign [hreg];
1812 /* the register gets spilled after this inst */
1815 val = mono_regstate_alloc_int (rs, dest_mask);
1817 val = get_register_spilling (cfg, tmp, ins, dest_mask, hreg);
1818 rs->iassign [hreg] = val;
1820 create_spilled_store (cfg, spill, val, hreg, ins);
1822 DEBUG (g_print ("\tassigned hreg %s to dest R%d\n", mono_arch_regname (val), hreg));
1823 rs->isymbolic [val] = hreg;
1824 /* FIXME:? ins->dreg = val; */
1825 if (ins->dreg == ppc_r4) {
1827 create_copy_ins (cfg, val, ppc_r3, ins);
1828 } else if (ins->dreg == ppc_r3) {
1829 if (val == ppc_r4) {
1831 create_copy_ins (cfg, ppc_r4, ppc_r0, ins);
1832 create_copy_ins (cfg, ppc_r3, ppc_r4, ins);
1833 create_copy_ins (cfg, ppc_r0, ppc_r3, ins);
1835 /* two forced copies */
1836 create_copy_ins (cfg, ins->dreg, ppc_r4, ins);
1837 create_copy_ins (cfg, val, ppc_r3, ins);
1840 if (val == ppc_r3) {
1841 create_copy_ins (cfg, ins->dreg, ppc_r4, ins);
1843 /* two forced copies */
1844 create_copy_ins (cfg, val, ppc_r3, ins);
1845 create_copy_ins (cfg, ins->dreg, ppc_r4, ins);
1848 if (reg_is_freeable (val) && hreg >= 0 && (reginfo [hreg].born_in >= i && !(cur_iregs & (1 << val)))) {
1849 DEBUG (g_print ("\tfreeable %s (R%d)\n", mono_arch_regname (val), hreg));
1850 mono_regstate_free_int (rs, val);
1852 } else if (spec [MONO_INST_DEST] == 'a' && ins->dreg != ppc_r3 && spec [MONO_INST_CLOB] != 'd') {
1853 /* this instruction only outputs to ppc_r3, need to copy */
1854 create_copy_ins (cfg, ins->dreg, ppc_r3, ins);
1859 if (spec [MONO_INST_DEST] == 'f' && freg_is_freeable (ins->dreg) && prev_dreg >= 0 && (reginfof [prev_dreg].born_in >= i)) {
1860 DEBUG (g_print ("\tfreeable float %s (R%d) (born in %d)\n", mono_arch_regname (ins->dreg), prev_dreg, reginfof [prev_dreg].born_in));
1861 mono_regstate_free_float (rs, ins->dreg);
1862 } else if (spec [MONO_INST_DEST] != 'f' && reg_is_freeable (ins->dreg) && prev_dreg >= 0 && (reginfo [prev_dreg].born_in >= i)) {
1863 DEBUG (g_print ("\tfreeable %s (R%d) (born in %d)\n", mono_arch_regname (ins->dreg), prev_dreg, reginfo [prev_dreg].born_in));
1864 mono_regstate_free_int (rs, ins->dreg);
1866 if (spec [MONO_INST_SRC1] == 'f') {
1867 src1_mask = cur_fregs;
1868 if (ins->sreg1 >= MONO_MAX_FREGS) {
1869 val = rs->fassign [ins->sreg1];
1870 prev_sreg1 = ins->sreg1;
1874 /* the register gets spilled after this inst */
1877 //g_assert (val == -1); /* source cannot be spilled */
1878 val = mono_regstate_alloc_float (rs, src1_mask);
1880 val = get_float_register_spilling (cfg, tmp, ins, src1_mask, ins->sreg1);
1881 rs->fassign [ins->sreg1] = val;
1882 DEBUG (g_print ("\tassigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1884 MonoInst *store = create_spilled_store_float (cfg, spill, val, prev_sreg1, NULL);
1885 insert_before_ins (ins, tmp, store);
1888 rs->fsymbolic [val] = prev_sreg1;
1893 } else if (ins->sreg1 >= MONO_MAX_IREGS) {
1894 val = rs->iassign [ins->sreg1];
1895 prev_sreg1 = ins->sreg1;
1899 /* the register gets spilled after this inst */
1902 if (0 && ins->opcode == OP_MOVE) {
1904 * small optimization: the dest register is already allocated
1905 * but the src one is not: we can simply assign the same register
1906 * here and peephole will get rid of the instruction later.
1907 * This optimization may interfere with the clobbering handling:
1908 * it removes a mov operation that will be added again to handle clobbering.
1909 * There are also some other issues that should with make testjit.
1911 mono_regstate_alloc_int (rs, 1 << ins->dreg);
1912 val = rs->iassign [ins->sreg1] = ins->dreg;
1913 //g_assert (val >= 0);
1914 DEBUG (g_print ("\tfast assigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1916 //g_assert (val == -1); /* source cannot be spilled */
1917 val = mono_regstate_alloc_int (rs, src1_mask);
1919 val = get_register_spilling (cfg, tmp, ins, src1_mask, ins->sreg1);
1920 rs->iassign [ins->sreg1] = val;
1921 DEBUG (g_print ("\tassigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
1924 MonoInst *store = create_spilled_store (cfg, spill, val, prev_sreg1, NULL);
1925 insert_before_ins (ins, tmp, store);
1928 rs->isymbolic [val] = prev_sreg1;
1933 if (spec [MONO_INST_SRC2] == 'f') {
1934 src2_mask = cur_fregs;
1935 if (ins->sreg2 >= MONO_MAX_FREGS) {
1936 val = rs->fassign [ins->sreg2];
1937 prev_sreg2 = ins->sreg2;
1941 /* the register gets spilled after this inst */
1944 val = mono_regstate_alloc_float (rs, src2_mask);
1946 val = get_float_register_spilling (cfg, tmp, ins, src2_mask, ins->sreg2);
1947 rs->fassign [ins->sreg2] = val;
1948 DEBUG (g_print ("\tassigned sreg2 %s to R%d\n", mono_arch_regname (val), ins->sreg2));
1950 create_spilled_store_float (cfg, spill, val, prev_sreg2, ins);
1952 rs->fsymbolic [val] = prev_sreg2;
1957 } else if (ins->sreg2 >= MONO_MAX_IREGS) {
1958 val = rs->iassign [ins->sreg2];
1959 prev_sreg2 = ins->sreg2;
1963 /* the register gets spilled after this inst */
1966 val = mono_regstate_alloc_int (rs, src2_mask);
1968 val = get_register_spilling (cfg, tmp, ins, src2_mask, ins->sreg2);
1969 rs->iassign [ins->sreg2] = val;
1970 DEBUG (g_print ("\tassigned sreg2 %s to R%d\n", mono_arch_regname (val), ins->sreg2));
1972 create_spilled_store (cfg, spill, val, prev_sreg2, ins);
1974 rs->isymbolic [val] = prev_sreg2;
1980 if (spec [MONO_INST_CLOB] == 'c') {
1982 guint32 clob_mask = PPC_CALLER_REGS;
1983 for (j = 0; j < MONO_MAX_IREGS; ++j) {
1985 if ((clob_mask & s) && !(rs->ifree_mask & s) && j != ins->sreg1) {
1986 //g_warning ("register %s busy at call site\n", mono_arch_regname (j));
1990 /*if (reg_is_freeable (ins->sreg1) && prev_sreg1 >= 0 && reginfo [prev_sreg1].born_in >= i) {
1991 DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg1)));
1992 mono_regstate_free_int (rs, ins->sreg1);
1994 if (reg_is_freeable (ins->sreg2) && prev_sreg2 >= 0 && reginfo [prev_sreg2].born_in >= i) {
1995 DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg2)));
1996 mono_regstate_free_int (rs, ins->sreg2);
1999 //DEBUG (print_ins (i, ins));
2005 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int sreg, int size, gboolean is_signed)
2007 /* sreg is a float, dreg is an integer reg. ppc_f0 is used a scratch */
2008 ppc_fctiwz (code, ppc_f0, sreg);
2009 ppc_stfd (code, ppc_f0, -8, ppc_sp);
2010 ppc_lwz (code, dreg, -4, ppc_sp);
2013 ppc_andid (code, dreg, dreg, 0xff);
2015 ppc_andid (code, dreg, dreg, 0xffff);
2018 ppc_extsb (code, dreg, dreg);
2020 ppc_extsh (code, dreg, dreg);
2025 static unsigned char*
2026 mono_emit_stack_alloc (guchar *code, MonoInst* tree)
2029 int sreg = tree->sreg1;
2030 x86_alu_reg_reg (code, X86_SUB, X86_ESP, tree->sreg1);
2031 if (tree->flags & MONO_INST_INIT) {
2033 if (tree->dreg != X86_EAX && sreg != X86_EAX) {
2034 x86_push_reg (code, X86_EAX);
2037 if (tree->dreg != X86_ECX && sreg != X86_ECX) {
2038 x86_push_reg (code, X86_ECX);
2041 if (tree->dreg != X86_EDI && sreg != X86_EDI) {
2042 x86_push_reg (code, X86_EDI);
2046 x86_shift_reg_imm (code, X86_SHR, sreg, 2);
2047 if (sreg != X86_ECX)
2048 x86_mov_reg_reg (code, X86_ECX, sreg, 4);
2049 x86_alu_reg_reg (code, X86_XOR, X86_EAX, X86_EAX);
2051 x86_lea_membase (code, X86_EDI, X86_ESP, offset);
2053 x86_prefix (code, X86_REP_PREFIX);
2056 if (tree->dreg != X86_EDI && sreg != X86_EDI)
2057 x86_pop_reg (code, X86_EDI);
2058 if (tree->dreg != X86_ECX && sreg != X86_ECX)
2059 x86_pop_reg (code, X86_ECX);
2060 if (tree->dreg != X86_EAX && sreg != X86_EAX)
2061 x86_pop_reg (code, X86_EAX);
2074 #define is_call_imm(diff) ((gint)(diff) >= -33554432 && (gint)(diff) <= 33554431)
2077 search_thunk_slot (void *data, int csize, int bsize, void *user_data) {
2078 PatchData *pdata = (PatchData*)user_data;
2079 guchar *code = data;
2080 guint32 *thunks = data;
2081 guint32 *endthunks = (guint32*)(code + bsize);
2085 int difflow, diffhigh;
2087 /* always ensure a call from pdata->code can reach to the thunks without further thunks */
2088 difflow = (char*)pdata->code - (char*)thunks;
2089 diffhigh = (char*)pdata->code - (char*)endthunks;
2090 if (!((is_call_imm (thunks) && is_call_imm (endthunks)) || (is_call_imm (difflow) && is_call_imm (diffhigh))))
2093 templ = (guchar*)load;
2094 ppc_lis (templ, ppc_r0, (guint32)(pdata->target) >> 16);
2095 ppc_ori (templ, ppc_r0, ppc_r0, (guint32)(pdata->target) & 0xffff);
2097 //g_print ("thunk nentries: %d\n", ((char*)endthunks - (char*)thunks)/16);
2098 if ((pdata->found == 2) || (pdata->code >= code && pdata->code <= code + csize)) {
2099 while (thunks < endthunks) {
2100 //g_print ("looking for target: %p at %p (%08x-%08x)\n", pdata->target, thunks, thunks [0], thunks [1]);
2101 if ((thunks [0] == load [0]) && (thunks [1] == load [1])) {
2102 ppc_patch (pdata->code, (guchar*)thunks);
2103 mono_arch_flush_icache (pdata->code, 4);
2106 } else if ((thunks [0] == 0) && (thunks [1] == 0)) {
2107 /* found a free slot instead: emit thunk */
2108 code = (guchar*)thunks;
2109 ppc_lis (code, ppc_r0, (guint32)(pdata->target) >> 16);
2110 ppc_ori (code, ppc_r0, ppc_r0, (guint32)(pdata->target) & 0xffff);
2111 ppc_mtctr (code, ppc_r0);
2112 ppc_bcctr (code, PPC_BR_ALWAYS, 0);
2113 mono_arch_flush_icache ((guchar*)thunks, 16);
2115 ppc_patch (pdata->code, (guchar*)thunks);
2116 mono_arch_flush_icache (pdata->code, 4);
2120 /* skip 16 bytes, the size of the thunk */
2124 //g_print ("failed thunk lookup for %p from %p at %p (%d entries)\n", pdata->target, pdata->code, data, count);
2130 handle_thunk (int absolute, guchar *code, guchar *target) {
2131 MonoDomain *domain = mono_domain_get ();
2135 pdata.target = target;
2136 pdata.absolute = absolute;
2139 mono_domain_lock (domain);
2140 mono_code_manager_foreach (domain->code_mp, search_thunk_slot, &pdata);
2143 /* this uses the first available slot */
2145 mono_code_manager_foreach (domain->code_mp, search_thunk_slot, &pdata);
2147 mono_domain_unlock (domain);
2149 if (pdata.found != 1)
2150 g_print ("thunk failed for %p from %p\n", target, code);
2151 g_assert (pdata.found == 1);
2155 ppc_patch (guchar *code, guchar *target)
2157 guint32 ins = *(guint32*)code;
2158 guint32 prim = ins >> 26;
2161 //g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
2163 if ((glong)target >= 0){
2164 if ((glong)target <= 33554431){
2165 ins = (18 << 26) | ((guint32) target) | (ins & 1) | 2;
2166 *(guint32*)code = ins;
2170 if ((glong)target >= -33554432){
2171 ins = (18 << 26) | (((guint32)target) & ~0xfc000000) | (ins & 1) | 2;
2172 *(guint32*)code = ins;
2177 gint diff = target - code;
2179 if (diff <= 33554431){
2180 ins = (18 << 26) | (diff) | (ins & 1);
2181 *(guint32*)code = ins;
2184 handle_thunk (TRUE, code, target);
2188 /* diff between 0 and -33554432 */
2189 if (diff >= -33554432){
2190 ins = (18 << 26) | (diff & ~0xfc000000) | (ins & 1);
2191 *(guint32*)code = ins;
2194 handle_thunk (TRUE, code, target);
2198 g_assert_not_reached ();
2205 guint32 li = (guint32)target;
2206 ins = (ins & 0xffff0000) | (ins & 3);
2207 ovf = li & 0xffff0000;
2208 if (ovf != 0 && ovf != 0xffff0000)
2209 g_assert_not_reached ();
2212 // FIXME: assert the top bits of li are 0
2214 gint diff = target - code;
2215 ins = (ins & 0xffff0000) | (ins & 3);
2216 ovf = diff & 0xffff0000;
2217 if (ovf != 0 && ovf != 0xffff0000)
2218 g_assert_not_reached ();
2222 *(guint32*)code = ins;
2224 g_assert_not_reached ();
2226 // g_print ("patched with 0x%08x\n", ins);
2230 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
2235 guint8 *code = cfg->native_code + cfg->code_len;
2236 MonoInst *last_ins = NULL;
2237 guint last_offset = 0;
2240 if (cfg->opt & MONO_OPT_PEEPHOLE)
2241 peephole_pass (cfg, bb);
2243 /* we don't align basic blocks of loops on ppc */
2245 if (cfg->verbose_level > 2)
2246 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
2248 cpos = bb->max_offset;
2250 if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
2251 //MonoCoverageInfo *cov = mono_get_coverage_info (cfg->method);
2252 //g_assert (!mono_compile_aot);
2255 // cov->data [bb->dfn].iloffset = bb->cil_code - cfg->cil_code;
2256 /* this is not thread save, but good enough */
2257 /* fixme: howto handle overflows? */
2258 //x86_inc_mem (code, &cov->data [bb->dfn].count);
2263 offset = code - cfg->native_code;
2265 max_len = ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
2267 if (offset > (cfg->code_size - max_len - 16)) {
2268 cfg->code_size *= 2;
2269 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2270 code = cfg->native_code + offset;
2272 // if (ins->cil_code)
2273 // g_print ("cil code\n");
2275 switch (ins->opcode) {
2277 ppc_mullw (code, ppc_r4, ins->sreg1, ins->sreg2);
2278 ppc_mulhw (code, ppc_r3, ins->sreg1, ins->sreg2);
2281 ppc_mullw (code, ppc_r4, ins->sreg1, ins->sreg2);
2282 ppc_mulhwu (code, ppc_r3, ins->sreg1, ins->sreg2);
2284 case OP_STOREI1_MEMBASE_IMM:
2285 ppc_li (code, ppc_r0, ins->inst_imm);
2286 if (ppc_is_imm16 (ins->inst_offset)) {
2287 ppc_stb (code, ppc_r0, ins->inst_offset, ins->inst_destbasereg);
2289 ppc_load (code, ppc_r11, ins->inst_offset);
2290 ppc_stbx (code, ppc_r0, ppc_r11, ins->inst_destbasereg);
2293 case OP_STOREI2_MEMBASE_IMM:
2294 ppc_li (code, ppc_r0, ins->inst_imm);
2295 if (ppc_is_imm16 (ins->inst_offset)) {
2296 ppc_sth (code, ppc_r0, ins->inst_offset, ins->inst_destbasereg);
2298 ppc_load (code, ppc_r11, ins->inst_offset);
2299 ppc_sthx (code, ppc_r0, ppc_r11, ins->inst_destbasereg);
2302 case OP_STORE_MEMBASE_IMM:
2303 case OP_STOREI4_MEMBASE_IMM:
2304 ppc_load (code, ppc_r0, ins->inst_imm);
2305 if (ppc_is_imm16 (ins->inst_offset)) {
2306 ppc_stw (code, ppc_r0, ins->inst_offset, ins->inst_destbasereg);
2308 ppc_load (code, ppc_r11, ins->inst_offset);
2309 ppc_stwx (code, ppc_r0, ppc_r11, ins->inst_destbasereg);
2312 case OP_STOREI1_MEMBASE_REG:
2313 if (ppc_is_imm16 (ins->inst_offset)) {
2314 ppc_stb (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
2316 ppc_load (code, ppc_r11, ins->inst_offset);
2317 ppc_stbx (code, ins->sreg1, ppc_r11, ins->inst_destbasereg);
2320 case OP_STOREI2_MEMBASE_REG:
2321 if (ppc_is_imm16 (ins->inst_offset)) {
2322 ppc_sth (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
2324 ppc_load (code, ppc_r11, ins->inst_offset);
2325 ppc_sthx (code, ins->sreg1, ppc_r11, ins->inst_destbasereg);
2328 case OP_STORE_MEMBASE_REG:
2329 case OP_STOREI4_MEMBASE_REG:
2330 if (ppc_is_imm16 (ins->inst_offset)) {
2331 ppc_stw (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
2333 ppc_load (code, ppc_r11, ins->inst_offset);
2334 ppc_stwx (code, ins->sreg1, ppc_r11, ins->inst_destbasereg);
2340 g_assert_not_reached ();
2341 //x86_mov_reg_mem (code, ins->dreg, ins->inst_p0, 4);
2344 g_assert_not_reached ();
2345 //x86_mov_reg_imm (code, ins->dreg, ins->inst_p0);
2346 //x86_mov_reg_membase (code, ins->dreg, ins->dreg, 0, 4);
2348 case OP_LOAD_MEMBASE:
2349 case OP_LOADI4_MEMBASE:
2350 case OP_LOADU4_MEMBASE:
2351 if (ppc_is_imm16 (ins->inst_offset)) {
2352 ppc_lwz (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
2354 ppc_load (code, ppc_r11, ins->inst_offset);
2355 ppc_lwzx (code, ins->dreg, ppc_r11, ins->inst_basereg);
2358 case OP_LOADI1_MEMBASE:
2359 case OP_LOADU1_MEMBASE:
2360 if (ppc_is_imm16 (ins->inst_offset)) {
2361 ppc_lbz (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
2363 ppc_load (code, ppc_r11, ins->inst_offset);
2364 ppc_lbzx (code, ins->dreg, ppc_r11, ins->inst_basereg);
2366 if (ins->opcode == OP_LOADI1_MEMBASE)
2367 ppc_extsb (code, ins->dreg, ins->dreg);
2369 case OP_LOADU2_MEMBASE:
2370 if (ppc_is_imm16 (ins->inst_offset)) {
2371 ppc_lhz (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
2373 ppc_load (code, ppc_r11, ins->inst_offset);
2374 ppc_lhzx (code, ins->dreg, ppc_r11, ins->inst_basereg);
2377 case OP_LOADI2_MEMBASE:
2378 if (ppc_is_imm16 (ins->inst_offset)) {
2379 ppc_lha (code, ins->dreg, ins->inst_basereg, ins->inst_offset);
2381 ppc_load (code, ppc_r11, ins->inst_offset);
2382 ppc_lhax (code, ins->dreg, ppc_r11, ins->inst_basereg);
2386 ppc_extsb (code, ins->dreg, ins->sreg1);
2389 ppc_extsh (code, ins->dreg, ins->sreg1);
2392 ppc_rlwinm (code, ins->dreg, ins->sreg1, 0, 24, 31);
2395 ppc_rlwinm (code, ins->dreg, ins->sreg1, 0, 16, 31);
2399 ((ins->next->opcode >= CEE_BNE_UN && ins->next->opcode <= CEE_BLT_UN) ||
2400 (ins->next->opcode >= OP_COND_EXC_NE_UN && ins->next->opcode <= OP_COND_EXC_LT_UN) ||
2401 (ins->next->opcode == OP_CLT_UN || ins->next->opcode == OP_CGT_UN)))
2402 ppc_cmpl (code, 0, 0, ins->sreg1, ins->sreg2);
2404 ppc_cmp (code, 0, 0, ins->sreg1, ins->sreg2);
2406 case OP_COMPARE_IMM:
2408 ((ins->next->opcode >= CEE_BNE_UN && ins->next->opcode <= CEE_BLT_UN) ||
2409 (ins->next->opcode >= OP_COND_EXC_NE_UN && ins->next->opcode <= OP_COND_EXC_LT_UN) ||
2410 (ins->next->opcode == OP_CLT_UN || ins->next->opcode == OP_CGT_UN))) {
2411 if (ppc_is_uimm16 (ins->inst_imm)) {
2412 ppc_cmpli (code, 0, 0, ins->sreg1, (ins->inst_imm & 0xffff));
2414 ppc_load (code, ppc_r11, ins->inst_imm);
2415 ppc_cmpl (code, 0, 0, ins->sreg1, ppc_r11);
2418 if (ppc_is_imm16 (ins->inst_imm)) {
2419 ppc_cmpi (code, 0, 0, ins->sreg1, (ins->inst_imm & 0xffff));
2421 ppc_load (code, ppc_r11, ins->inst_imm);
2422 ppc_cmp (code, 0, 0, ins->sreg1, ppc_r11);
2426 case OP_X86_TEST_NULL:
2427 ppc_cmpi (code, 0, 0, ins->sreg1, 0);
2433 ppc_addc (code, ins->dreg, ins->sreg1, ins->sreg2);
2436 ppc_add (code, ins->dreg, ins->sreg1, ins->sreg2);
2439 ppc_adde (code, ins->dreg, ins->sreg1, ins->sreg2);
2442 if (ppc_is_imm16 (ins->inst_imm)) {
2443 ppc_addi (code, ins->dreg, ins->sreg1, ins->inst_imm);
2445 ppc_load (code, ppc_r11, ins->inst_imm);
2446 ppc_add (code, ins->dreg, ins->sreg1, ppc_r11);
2450 ppc_load (code, ppc_r11, ins->inst_imm);
2451 ppc_adde (code, ins->dreg, ins->sreg1, ppc_r11);
2454 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
2456 ppc_addo (code, ins->dreg, ins->sreg1, ins->sreg2);
2457 ppc_mfspr (code, ppc_r0, ppc_xer);
2458 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
2459 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
2461 case CEE_ADD_OVF_UN:
2462 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
2464 ppc_addco (code, ins->dreg, ins->sreg1, ins->sreg2);
2465 ppc_mfspr (code, ppc_r0, ppc_xer);
2466 ppc_andisd (code, ppc_r0, ppc_r0, (1<<13));
2467 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
2470 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
2472 ppc_subfo (code, ins->dreg, ins->sreg2, ins->sreg1);
2473 ppc_mfspr (code, ppc_r0, ppc_xer);
2474 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
2475 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
2477 case CEE_SUB_OVF_UN:
2478 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
2480 ppc_subfc (code, ins->dreg, ins->sreg2, ins->sreg1);
2481 ppc_mfspr (code, ppc_r0, ppc_xer);
2482 ppc_andisd (code, ppc_r0, ppc_r0, (1<<13));
2483 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_EQ, "OverflowException");
2485 case OP_ADD_OVF_CARRY:
2486 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
2488 ppc_addeo (code, ins->dreg, ins->sreg1, ins->sreg2);
2489 ppc_mfspr (code, ppc_r0, ppc_xer);
2490 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
2491 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
2493 case OP_ADD_OVF_UN_CARRY:
2494 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
2495 * FIXME: missing ovf check
2497 /*ppc_addeo (code, ins->dreg, ins->sreg1, ins->sreg2);*/
2498 ppc_addco (code, ins->dreg, ins->sreg1, ins->sreg2);
2499 /*ppc_mfspr (code, ppc_r0, ppc_xer);
2500 ppc_andisd (code, ppc_r0, ppc_r0, (1<<13));
2501 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");*/
2503 case OP_SUB_OVF_CARRY:
2504 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
2506 ppc_subfeo (code, ins->dreg, ins->sreg2, ins->sreg1);
2507 ppc_mfspr (code, ppc_r0, ppc_xer);
2508 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
2509 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
2511 case OP_SUB_OVF_UN_CARRY:
2512 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
2513 * FIXME: missing ovf check
2515 /*ppc_subfeo (code, ins->dreg, ins->sreg2, ins->sreg1);*/
2516 ppc_subfc (code, ins->dreg, ins->sreg2, ins->sreg1);
2517 /*ppc_mfspr (code, ppc_r0, ppc_xer);
2518 ppc_andisd (code, ppc_r0, ppc_r0, (1<<13));
2519 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_EQ, "OverflowException");*/
2522 ppc_subfc (code, ins->dreg, ins->sreg2, ins->sreg1);
2525 ppc_subf (code, ins->dreg, ins->sreg2, ins->sreg1);
2528 ppc_subfe (code, ins->dreg, ins->sreg2, ins->sreg1);
2531 // we add the negated value
2532 if (ppc_is_imm16 (-ins->inst_imm))
2533 ppc_addi (code, ins->dreg, ins->sreg1, -ins->inst_imm);
2535 ppc_load (code, ppc_r11, ins->inst_imm);
2536 ppc_sub (code, ins->dreg, ins->sreg1, ppc_r11);
2540 ppc_load (code, ppc_r11, ins->inst_imm);
2541 ppc_subfe (code, ins->dreg, ins->sreg2, ppc_r11);
2544 g_assert (ppc_is_imm16 (ins->inst_imm));
2545 ppc_subfic (code, ins->dreg, ins->sreg1, ins->inst_imm);
2548 ppc_subfze (code, ins->dreg, ins->sreg1);
2551 /* FIXME: the ppc macros as inconsistent here: put dest as the first arg! */
2552 ppc_and (code, ins->sreg1, ins->dreg, ins->sreg2);
2555 if (!(ins->inst_imm & 0xffff0000)) {
2556 ppc_andid (code, ins->sreg1, ins->dreg, ins->inst_imm);
2557 } else if (!(ins->inst_imm & 0xffff)) {
2558 ppc_andisd (code, ins->sreg1, ins->dreg, ((guint32)ins->inst_imm >> 16));
2560 ppc_load (code, ppc_r11, ins->inst_imm);
2561 ppc_and (code, ins->sreg1, ins->dreg, ppc_r11);
2565 /* clear the summary overflow flag */
2566 ppc_crxor (code, 28, 28, 28);
2567 ppc_divwod (code, ins->dreg, ins->sreg1, ins->sreg2);
2568 /* FIXME: use OverflowException for 0x80000000/-1 */
2569 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_SO, "DivideByZeroException");
2572 /* clear the summary overflow flag */
2573 ppc_crxor (code, 28, 28, 28);
2574 ppc_divwuod (code, ins->dreg, ins->sreg1, ins->sreg2);
2575 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_SO, "DivideByZeroException");
2578 ppc_load (code, ppc_r11, ins->inst_imm);
2579 /* clear the summary overflow flag */
2580 ppc_crxor (code, 28, 28, 28);
2581 ppc_divwod (code, ins->dreg, ins->sreg1, ppc_r11);
2582 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_SO, "DivideByZeroException");
2585 /* clear the summary overflow flag */
2586 ppc_crxor (code, 28, 28, 28);
2587 ppc_divwod (code, ppc_r11, ins->sreg1, ins->sreg2);
2588 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_SO, "DivideByZeroException");
2589 ppc_mullw (code, ppc_r11, ppc_r11, ins->sreg2);
2590 ppc_subf (code, ins->dreg, ppc_r11, ins->sreg1);
2593 /* clear the summary overflow flag */
2594 ppc_crxor (code, 28, 28, 28);
2595 ppc_divwuod (code, ppc_r11, ins->sreg1, ins->sreg2);
2596 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_SO, "DivideByZeroException");
2597 ppc_mullw (code, ppc_r11, ppc_r11, ins->sreg2);
2598 ppc_subf (code, ins->dreg, ppc_r11, ins->sreg1);
2601 ppc_load (code, ppc_r11, ins->inst_imm);
2602 /* clear the summary overflow flag */
2603 ppc_crxor (code, 28, 28, 28);
2604 ppc_divwod (code, ins->dreg, ins->sreg1, ppc_r11);
2605 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_SO, "DivideByZeroException");
2606 ppc_mullw (code, ins->dreg, ins->dreg, ppc_r11);
2607 ppc_subf (code, ins->dreg, ins->dreg, ins->sreg1);
2610 ppc_or (code, ins->dreg, ins->sreg1, ins->sreg2);
2613 if (!(ins->inst_imm & 0xffff0000)) {
2614 ppc_ori (code, ins->sreg1, ins->dreg, ins->inst_imm);
2615 } else if (!(ins->inst_imm & 0xffff)) {
2616 ppc_oris (code, ins->sreg1, ins->dreg, ((guint32)(ins->inst_imm) >> 16));
2618 ppc_load (code, ppc_r11, ins->inst_imm);
2619 ppc_or (code, ins->sreg1, ins->dreg, ppc_r11);
2623 ppc_xor (code, ins->dreg, ins->sreg1, ins->sreg2);
2626 if (!(ins->inst_imm & 0xffff0000)) {
2627 ppc_xori (code, ins->sreg1, ins->dreg, ins->inst_imm);
2628 } else if (!(ins->inst_imm & 0xffff)) {
2629 ppc_xoris (code, ins->sreg1, ins->dreg, ((guint32)(ins->inst_imm) >> 16));
2631 ppc_load (code, ppc_r11, ins->inst_imm);
2632 ppc_xor (code, ins->sreg1, ins->dreg, ppc_r11);
2636 ppc_slw (code, ins->sreg1, ins->dreg, ins->sreg2);
2639 ppc_rlwinm (code, ins->dreg, ins->sreg1, (ins->inst_imm & 0x1f), 0, (31 - (ins->inst_imm & 0x1f)));
2640 //ppc_load (code, ppc_r11, ins->inst_imm);
2641 //ppc_slw (code, ins->sreg1, ins->dreg, ppc_r11);
2644 ppc_sraw (code, ins->dreg, ins->sreg1, ins->sreg2);
2647 // there is also ppc_srawi
2648 //ppc_load (code, ppc_r11, ins->inst_imm);
2649 //ppc_sraw (code, ins->dreg, ins->sreg1, ppc_r11);
2650 ppc_srawi (code, ins->dreg, ins->sreg1, (ins->inst_imm & 0x1f));
2653 /*ppc_load (code, ppc_r11, ins->inst_imm);
2654 ppc_srw (code, ins->dreg, ins->sreg1, ppc_r11);*/
2655 ppc_rlwinm (code, ins->dreg, ins->sreg1, (32 - (ins->inst_imm & 0x1f)), (ins->inst_imm & 0x1f), 31);
2658 ppc_srw (code, ins->dreg, ins->sreg1, ins->sreg2);
2661 ppc_not (code, ins->dreg, ins->sreg1);
2664 ppc_neg (code, ins->dreg, ins->sreg1);
2667 ppc_mullw (code, ins->dreg, ins->sreg1, ins->sreg2);
2670 ppc_load (code, ppc_r11, ins->inst_imm);
2671 ppc_mullw (code, ins->dreg, ins->sreg1, ppc_r11);
2674 /* we annot use mcrxr, since it's not implemented on some processors
2675 * XER format: SO, OV, CA, reserved [21 bits], count [8 bits]
2677 ppc_mullwo (code, ins->dreg, ins->sreg1, ins->sreg2);
2678 ppc_mfspr (code, ppc_r0, ppc_xer);
2679 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
2680 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
2682 case CEE_MUL_OVF_UN:
2683 /* we first multiply to get the high word and compare to 0
2684 * to set the flags, then the result is discarded and then
2685 * we multiply to get the lower * bits result
2687 ppc_mulhwu (code, ppc_r0, ins->sreg1, ins->sreg2);
2688 ppc_cmpi (code, 0, 0, ppc_r0, 0);
2689 EMIT_COND_SYSTEM_EXCEPTION (CEE_BNE_UN - CEE_BEQ, ins->inst_p1);
2690 ppc_mullw (code, ins->dreg, ins->sreg1, ins->sreg2);
2694 ppc_load (code, ins->dreg, ins->inst_c0);
2697 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
2698 ppc_lis (code, ins->dreg, 0);
2699 ppc_ori (code, ins->dreg, ins->dreg, 0);
2705 ppc_mr (code, ins->dreg, ins->sreg1);
2708 int saved = ins->sreg1;
2709 if (ins->sreg1 == ppc_r3) {
2710 ppc_mr (code, ppc_r0, ins->sreg1);
2713 if (ins->sreg2 != ppc_r3)
2714 ppc_mr (code, ppc_r3, ins->sreg2);
2715 if (saved != ppc_r4)
2716 ppc_mr (code, ppc_r4, saved);
2721 ppc_fmr (code, ins->dreg, ins->sreg1);
2723 case OP_FCONV_TO_R4:
2724 ppc_frsp (code, ins->dreg, ins->sreg1);
2730 * Keep in sync with mono_arch_emit_epilog
2732 g_assert (!cfg->method->save_lmf);
2733 if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
2734 if (ppc_is_imm16 (cfg->stack_usage + PPC_RET_ADDR_OFFSET)) {
2735 ppc_lwz (code, ppc_r0, cfg->stack_usage + PPC_RET_ADDR_OFFSET, cfg->frame_reg);
2737 ppc_load (code, ppc_r11, cfg->stack_usage + PPC_RET_ADDR_OFFSET);
2738 ppc_lwzx (code, ppc_r0, cfg->frame_reg, ppc_r11);
2740 ppc_mtlr (code, ppc_r0);
2742 if (ppc_is_imm16 (cfg->stack_usage)) {
2743 ppc_addic (code, ppc_sp, cfg->frame_reg, cfg->stack_usage);
2745 ppc_load (code, ppc_r11, cfg->stack_usage);
2746 ppc_add (code, ppc_sp, cfg->frame_reg, ppc_r11);
2748 if (!cfg->method->save_lmf) {
2749 /*for (i = 31; i >= 14; --i) {
2750 if (cfg->used_float_regs & (1 << i)) {
2751 pos += sizeof (double);
2752 ppc_lfd (code, i, -pos, cfg->frame_reg);
2755 for (i = 31; i >= 13; --i) {
2756 if (cfg->used_int_regs & (1 << i)) {
2757 pos += sizeof (gulong);
2758 ppc_lwz (code, i, -pos, cfg->frame_reg);
2762 /* FIXME restore from MonoLMF: though this can't happen yet */
2764 mono_add_patch_info (cfg, (guint8*) code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
2769 /* ensure ins->sreg1 is not NULL */
2770 ppc_lwz (code, ppc_r0, 0, ins->sreg1);
2777 call = (MonoCallInst*)ins;
2778 if (ins->flags & MONO_INST_HAS_METHOD)
2779 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD, call->method);
2781 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, call->fptr);
2787 case OP_VOIDCALL_REG:
2789 ppc_mtlr (code, ins->sreg1);
2792 case OP_FCALL_MEMBASE:
2793 case OP_LCALL_MEMBASE:
2794 case OP_VCALL_MEMBASE:
2795 case OP_VOIDCALL_MEMBASE:
2796 case OP_CALL_MEMBASE:
2797 ppc_lwz (code, ppc_r0, ins->inst_offset, ins->sreg1);
2798 ppc_mtlr (code, ppc_r0);
2802 g_assert_not_reached ();
2805 /* keep alignment */
2806 int alloca_waste = PPC_STACK_PARAM_OFFSET + cfg->param_area + 31;
2807 int area_offset = alloca_waste;
2809 ppc_addi (code, ppc_r11, ins->sreg1, alloca_waste);
2810 ppc_rlwinm (code, ppc_r11, ppc_r11, 0, 0, 27);
2811 ppc_lwz (code, ppc_r0, 0, ppc_sp);
2812 ppc_neg (code, ppc_r11, ppc_r11);
2813 ppc_stwux (code, ppc_r0, ppc_sp, ppc_r11);
2814 ppc_addi (code, ins->dreg, ppc_sp, area_offset);
2822 ppc_mr (code, ppc_r3, ins->sreg1);
2823 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2824 (gpointer)"mono_arch_throw_exception");
2828 case OP_START_HANDLER:
2829 ppc_mflr (code, ppc_r0);
2830 if (ppc_is_imm16 (ins->inst_left->inst_offset)) {
2831 ppc_stw (code, ppc_r0, ins->inst_left->inst_offset, ins->inst_left->inst_basereg);
2833 ppc_load (code, ppc_r11, ins->inst_left->inst_offset);
2834 ppc_stwx (code, ppc_r0, ppc_r11, ins->inst_left->inst_basereg);
2838 if (ins->sreg1 != ppc_r3)
2839 ppc_mr (code, ppc_r3, ins->sreg1);
2840 if (ppc_is_imm16 (ins->inst_left->inst_offset)) {
2841 ppc_lwz (code, ppc_r0, ins->inst_left->inst_offset, ins->inst_left->inst_basereg);
2843 ppc_load (code, ppc_r11, ins->inst_left->inst_offset);
2844 ppc_lwzx (code, ppc_r0, ins->inst_left->inst_basereg, ppc_r11);
2846 ppc_mtlr (code, ppc_r0);
2849 case CEE_ENDFINALLY:
2850 ppc_lwz (code, ppc_r0, ins->inst_left->inst_offset, ins->inst_left->inst_basereg);
2851 ppc_mtlr (code, ppc_r0);
2854 case OP_CALL_HANDLER:
2855 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2859 ins->inst_c0 = code - cfg->native_code;
2862 //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
2863 //if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
2865 if (ins->flags & MONO_INST_BRLABEL) {
2866 /*if (ins->inst_i0->inst_c0) {
2868 //x86_jump_code (code, cfg->native_code + ins->inst_i0->inst_c0);
2870 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
2874 /*if (ins->inst_target_bb->native_offset) {
2876 //x86_jump_code (code, cfg->native_code + ins->inst_target_bb->native_offset);
2878 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2884 ppc_mtctr (code, ins->sreg1);
2885 ppc_bcctr (code, PPC_BR_ALWAYS, 0);
2888 ppc_li (code, ins->dreg, 0);
2889 ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 2);
2890 ppc_li (code, ins->dreg, 1);
2894 ppc_li (code, ins->dreg, 1);
2895 ppc_bc (code, PPC_BR_TRUE, PPC_BR_LT, 2);
2896 ppc_li (code, ins->dreg, 0);
2900 ppc_li (code, ins->dreg, 1);
2901 ppc_bc (code, PPC_BR_TRUE, PPC_BR_GT, 2);
2902 ppc_li (code, ins->dreg, 0);
2904 case OP_COND_EXC_EQ:
2905 case OP_COND_EXC_NE_UN:
2906 case OP_COND_EXC_LT:
2907 case OP_COND_EXC_LT_UN:
2908 case OP_COND_EXC_GT:
2909 case OP_COND_EXC_GT_UN:
2910 case OP_COND_EXC_GE:
2911 case OP_COND_EXC_GE_UN:
2912 case OP_COND_EXC_LE:
2913 case OP_COND_EXC_LE_UN:
2914 EMIT_COND_SYSTEM_EXCEPTION (ins->opcode - OP_COND_EXC_EQ, ins->inst_p1);
2917 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
2919 /*ppc_mfspr (code, ppc_r0, ppc_xer);
2920 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
2921 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
2923 case OP_COND_EXC_OV:
2924 /*ppc_mcrxr (code, 0);
2925 EMIT_COND_SYSTEM_EXCEPTION (CEE_BGT - CEE_BEQ, ins->inst_p1);
2927 case OP_COND_EXC_NC:
2928 case OP_COND_EXC_NO:
2929 g_assert_not_reached ();
2941 EMIT_COND_BRANCH (ins, ins->opcode - CEE_BEQ);
2944 /* floating point opcodes */
2946 ppc_load (code, ppc_r11, ins->inst_p0);
2947 ppc_lfd (code, ins->dreg, 0, ppc_r11);
2950 ppc_load (code, ppc_r11, ins->inst_p0);
2951 ppc_lfs (code, ins->dreg, 0, ppc_r11);
2953 case OP_STORER8_MEMBASE_REG:
2954 if (ppc_is_imm16 (ins->inst_offset)) {
2955 ppc_stfd (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
2957 ppc_load (code, ppc_r11, ins->inst_offset);
2958 ppc_stfdx (code, ins->sreg1, ppc_r11, ins->inst_destbasereg);
2961 case OP_LOADR8_MEMBASE:
2962 if (ppc_is_imm16 (ins->inst_offset)) {
2963 ppc_lfd (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
2965 ppc_load (code, ppc_r11, ins->inst_offset);
2966 ppc_lfdx (code, ins->dreg, ppc_r11, ins->inst_basereg);
2969 case OP_STORER4_MEMBASE_REG:
2970 if (ppc_is_imm16 (ins->inst_offset)) {
2971 ppc_stfs (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
2973 ppc_load (code, ppc_r11, ins->inst_offset);
2974 ppc_stfsx (code, ins->sreg1, ppc_r11, ins->inst_destbasereg);
2977 case OP_LOADR4_MEMBASE:
2978 if (ppc_is_imm16 (ins->inst_offset)) {
2979 ppc_lfs (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
2981 ppc_load (code, ppc_r11, ins->inst_offset);
2982 ppc_lfsx (code, ins->dreg, ppc_r11, ins->inst_basereg);
2985 case CEE_CONV_R_UN: {
2986 static const guint64 adjust_val = 0x4330000000000000ULL;
2987 ppc_addis (code, ppc_r0, ppc_r0, 0x4330);
2988 ppc_stw (code, ppc_r0, -8, ppc_sp);
2989 ppc_stw (code, ins->sreg1, -4, ppc_sp);
2990 ppc_load (code, ppc_r11, &adjust_val);
2991 ppc_lfd (code, ins->dreg, -8, ppc_sp);
2992 ppc_lfd (code, ppc_f0, 0, ppc_r11);
2993 ppc_fsub (code, ins->dreg, ins->dreg, ppc_f0);
2996 case CEE_CONV_R4: /* FIXME: change precision */
2998 static const guint64 adjust_val = 0x4330000080000000ULL;
2999 // addis is special for ppc_r0
3000 ppc_addis (code, ppc_r0, ppc_r0, 0x4330);
3001 ppc_stw (code, ppc_r0, -8, ppc_sp);
3002 ppc_xoris (code, ins->sreg1, ppc_r11, 0x8000);
3003 ppc_stw (code, ppc_r11, -4, ppc_sp);
3004 ppc_lfd (code, ins->dreg, -8, ppc_sp);
3005 ppc_load (code, ppc_r11, &adjust_val);
3006 ppc_lfd (code, ppc_f0, 0, ppc_r11);
3007 ppc_fsub (code, ins->dreg, ins->dreg, ppc_f0);
3010 case OP_X86_FP_LOAD_I8:
3011 g_assert_not_reached ();
3012 /*x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);*/
3014 case OP_X86_FP_LOAD_I4:
3015 g_assert_not_reached ();
3016 /*x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);*/
3018 case OP_FCONV_TO_I1:
3019 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 1, TRUE);
3021 case OP_FCONV_TO_U1:
3022 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 1, FALSE);
3024 case OP_FCONV_TO_I2:
3025 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 2, TRUE);
3027 case OP_FCONV_TO_U2:
3028 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 2, FALSE);
3030 case OP_FCONV_TO_I4:
3032 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 4, TRUE);
3034 case OP_FCONV_TO_U4:
3036 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 4, FALSE);
3038 case OP_FCONV_TO_I8:
3039 case OP_FCONV_TO_U8:
3040 g_assert_not_reached ();
3041 /* Implemented as helper calls */
3043 case OP_LCONV_TO_R_UN:
3044 g_assert_not_reached ();
3045 /* Implemented as helper calls */
3047 case OP_LCONV_TO_OVF_I: {
3048 ppc_mr (code, ins->dreg, ins->sreg1);
3049 /* FIXME: emit exception if needed */
3053 ppc_fsqrtd (code, ins->dreg, ins->sreg1);
3056 ppc_fadd (code, ins->dreg, ins->sreg1, ins->sreg2);
3059 ppc_fsub (code, ins->dreg, ins->sreg1, ins->sreg2);
3062 ppc_fmul (code, ins->dreg, ins->sreg1, ins->sreg2);
3065 ppc_fdiv (code, ins->dreg, ins->sreg1, ins->sreg2);
3068 ppc_fneg (code, ins->dreg, ins->sreg1);
3072 g_assert_not_reached ();
3075 ppc_fcmpo (code, 0, ins->sreg1, ins->sreg2);
3078 ppc_fcmpo (code, 0, ins->sreg1, ins->sreg2);
3079 ppc_li (code, ins->dreg, 0);
3080 ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 2);
3081 ppc_li (code, ins->dreg, 1);
3084 ppc_fcmpo (code, 0, ins->sreg1, ins->sreg2);
3085 ppc_li (code, ins->dreg, 1);
3086 ppc_bc (code, PPC_BR_TRUE, PPC_BR_LT, 2);
3087 ppc_li (code, ins->dreg, 0);
3090 ppc_fcmpu (code, 0, ins->sreg1, ins->sreg2);
3091 ppc_li (code, ins->dreg, 1);
3092 ppc_bc (code, PPC_BR_TRUE, PPC_BR_SO, 3);
3093 ppc_bc (code, PPC_BR_TRUE, PPC_BR_LT, 2);
3094 ppc_li (code, ins->dreg, 0);
3097 ppc_fcmpo (code, 0, ins->sreg1, ins->sreg2);
3098 ppc_li (code, ins->dreg, 1);
3099 ppc_bc (code, PPC_BR_TRUE, PPC_BR_GT, 2);
3100 ppc_li (code, ins->dreg, 0);
3103 ppc_fcmpu (code, 0, ins->sreg1, ins->sreg2);
3104 ppc_li (code, ins->dreg, 1);
3105 ppc_bc (code, PPC_BR_TRUE, PPC_BR_SO, 3);
3106 ppc_bc (code, PPC_BR_TRUE, PPC_BR_GT, 2);
3107 ppc_li (code, ins->dreg, 0);
3110 EMIT_COND_BRANCH (ins, CEE_BEQ - CEE_BEQ);
3113 EMIT_COND_BRANCH (ins, CEE_BNE_UN - CEE_BEQ);
3116 EMIT_COND_BRANCH (ins, CEE_BLT - CEE_BEQ);
3119 EMIT_COND_BRANCH_FLAGS (ins, PPC_BR_TRUE, PPC_BR_SO);
3120 EMIT_COND_BRANCH (ins, CEE_BLT_UN - CEE_BEQ);
3123 EMIT_COND_BRANCH (ins, CEE_BGT - CEE_BEQ);
3126 EMIT_COND_BRANCH_FLAGS (ins, PPC_BR_TRUE, PPC_BR_SO);
3127 EMIT_COND_BRANCH (ins, CEE_BGT_UN - CEE_BEQ);
3130 EMIT_COND_BRANCH (ins, CEE_BGE - CEE_BEQ);
3133 EMIT_COND_BRANCH (ins, CEE_BGE_UN - CEE_BEQ);
3136 EMIT_COND_BRANCH (ins, CEE_BLE - CEE_BEQ);
3139 EMIT_COND_BRANCH (ins, CEE_BLE_UN - CEE_BEQ);
3141 case CEE_CKFINITE: {
3142 ppc_stfd (code, ins->sreg1, -8, ppc_sp);
3143 ppc_lwz (code, ppc_r11, -8, ppc_sp);
3144 ppc_rlwinm (code, ppc_r11, ppc_r11, 0, 1, 31);
3145 ppc_addis (code, ppc_r11, ppc_r11, -32752);
3146 ppc_rlwinmd (code, ppc_r11, ppc_r11, 1, 31, 31);
3147 EMIT_COND_SYSTEM_EXCEPTION (CEE_BEQ - CEE_BEQ, "ArithmeticException");
3151 g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
3152 g_assert_not_reached ();
3155 if ((cfg->opt & MONO_OPT_BRANCH) && ((code - cfg->native_code - offset) > max_len)) {
3156 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
3157 mono_inst_name (ins->opcode), max_len, code - cfg->native_code - offset);
3158 g_assert_not_reached ();
3164 last_offset = offset;
3169 cfg->code_len = code - cfg->native_code;
3173 mono_arch_register_lowlevel_calls (void)
3177 #define patch_lis_ori(ip,val) do {\
3178 guint16 *__lis_ori = (guint16*)(ip); \
3179 __lis_ori [1] = (((guint32)(val)) >> 16) & 0xffff; \
3180 __lis_ori [3] = ((guint32)(val)) & 0xffff; \
3184 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
3186 MonoJumpInfo *patch_info;
3188 for (patch_info = ji; patch_info; patch_info = patch_info->next) {
3189 unsigned char *ip = patch_info->ip.i + code;
3190 const unsigned char *target;
3192 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
3194 switch (patch_info->type) {
3195 case MONO_PATCH_INFO_IP:
3196 patch_lis_ori (ip, ip);
3198 case MONO_PATCH_INFO_METHOD_REL:
3199 g_assert_not_reached ();
3200 *((gpointer *)(ip)) = code + patch_info->data.offset;
3202 case MONO_PATCH_INFO_SWITCH: {
3203 gpointer *table = (gpointer *)patch_info->data.target;
3206 // FIXME: inspect code to get the register
3207 ppc_load (ip, ppc_r11, patch_info->data.target);
3208 //*((gconstpointer *)(ip + 2)) = patch_info->data.target;
3210 for (i = 0; i < patch_info->table_size; i++) {
3211 table [i] = (int)patch_info->data.table [i] + code;
3213 /* we put into the table the absolute address, no need for ppc_patch in this case */
3216 case MONO_PATCH_INFO_METHODCONST:
3217 case MONO_PATCH_INFO_CLASS:
3218 case MONO_PATCH_INFO_IMAGE:
3219 case MONO_PATCH_INFO_FIELD:
3220 case MONO_PATCH_INFO_VTABLE:
3221 case MONO_PATCH_INFO_IID:
3222 case MONO_PATCH_INFO_SFLDA:
3223 case MONO_PATCH_INFO_LDSTR:
3224 case MONO_PATCH_INFO_TYPE_FROM_HANDLE:
3225 case MONO_PATCH_INFO_LDTOKEN:
3226 /* from OP_AOTCONST : lis + ori */
3227 patch_lis_ori (ip, target);
3229 case MONO_PATCH_INFO_R4:
3230 case MONO_PATCH_INFO_R8:
3231 g_assert_not_reached ();
3232 *((gconstpointer *)(ip + 2)) = patch_info->data.target;
3234 case MONO_PATCH_INFO_EXC_NAME:
3235 g_assert_not_reached ();
3236 *((gconstpointer *)(ip + 1)) = patch_info->data.name;
3238 case MONO_PATCH_INFO_BB_OVF:
3239 case MONO_PATCH_INFO_EXC_OVF:
3240 /* everything is dealt with at epilog output time */
3245 ppc_patch (ip, target);
3250 mono_arch_max_epilog_size (MonoCompile *cfg)
3252 int max_epilog_size = 16 + 20*4;
3253 MonoJumpInfo *patch_info;
3255 if (cfg->method->save_lmf)
3256 max_epilog_size += 128;
3258 if (mono_jit_trace_calls != NULL)
3259 max_epilog_size += 50;
3261 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
3262 max_epilog_size += 50;
3264 /* count the number of exception infos */
3267 * make sure we have enough space for exceptions
3268 * 24 is the simulated call to throw_exception_by_name
3270 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3271 if (patch_info->type == MONO_PATCH_INFO_EXC)
3272 max_epilog_size += 24;
3273 else if (patch_info->type == MONO_PATCH_INFO_BB_OVF)
3274 max_epilog_size += 12;
3275 else if (patch_info->type == MONO_PATCH_INFO_EXC_OVF)
3276 max_epilog_size += 12;
3279 return max_epilog_size;
3283 * Stack frame layout:
3285 * ------------------- sp
3286 * MonoLMF structure or saved registers
3287 * -------------------
3289 * -------------------
3291 * -------------------
3292 * optional 8 bytes for tracing
3293 * -------------------
3294 * param area size is cfg->param_area
3295 * -------------------
3296 * linkage area size is PPC_STACK_PARAM_OFFSET
3297 * ------------------- sp
3301 mono_arch_emit_prolog (MonoCompile *cfg)
3303 MonoMethod *method = cfg->method;
3305 MonoMethodSignature *sig;
3307 int alloc_size, pos, max_offset, i;
3313 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
3316 cfg->code_size = 256;
3317 code = cfg->native_code = g_malloc (cfg->code_size);
3319 if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
3320 ppc_mflr (code, ppc_r0);
3321 ppc_stw (code, ppc_r0, PPC_RET_ADDR_OFFSET, ppc_sp);
3323 cfg->used_int_regs |= USE_EXTRA_TEMPS;
3325 alloc_size = cfg->stack_offset;
3328 if (!method->save_lmf) {
3329 /*for (i = 31; i >= 14; --i) {
3330 if (cfg->used_float_regs & (1 << i)) {
3331 pos += sizeof (gdouble);
3332 ppc_stfd (code, i, -pos, ppc_sp);
3335 for (i = 31; i >= 13; --i) {
3336 if (cfg->used_int_regs & (1 << i)) {
3337 pos += sizeof (gulong);
3338 ppc_stw (code, i, -pos, ppc_sp);
3343 pos += sizeof (MonoLMF);
3345 ofs = -pos + G_STRUCT_OFFSET(MonoLMF, iregs);
3346 ppc_stmw (code, ppc_r13, ppc_r1, ofs);
3347 for (i = 14; i < 32; i++) {
3348 ppc_stfd (code, i, (-pos + G_STRUCT_OFFSET(MonoLMF, fregs) + ((i-14) * sizeof (gdouble))), ppc_r1);
3352 // align to PPC_STACK_ALIGNMENT bytes
3353 if (alloc_size & (PPC_STACK_ALIGNMENT - 1)) {
3354 alloc_size += PPC_STACK_ALIGNMENT - 1;
3355 alloc_size &= ~(PPC_STACK_ALIGNMENT - 1);
3358 cfg->stack_usage = alloc_size;
3359 g_assert ((alloc_size & (PPC_STACK_ALIGNMENT-1)) == 0);
3361 if (ppc_is_imm16 (-alloc_size)) {
3362 ppc_stwu (code, ppc_sp, -alloc_size, ppc_sp);
3364 ppc_load (code, ppc_r11, -alloc_size);
3365 ppc_stwux (code, ppc_sp, ppc_sp, ppc_r11);
3368 if (cfg->frame_reg != ppc_sp)
3369 ppc_mr (code, cfg->frame_reg, ppc_sp);
3371 /* compute max_offset in order to use short forward jumps
3372 * we always do it on ppc because the immediate displacement
3373 * for jumps is too small
3376 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
3377 MonoInst *ins = bb->code;
3378 bb->max_offset = max_offset;
3380 if (cfg->prof_options & MONO_PROFILE_COVERAGE)
3384 max_offset += ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
3389 /* load arguments allocated to register from the stack */
3390 sig = method->signature;
3393 cinfo = calculate_sizes (sig, sig->pinvoke);
3395 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
3396 ArgInfo *ainfo = &cinfo->ret;
3398 if (ppc_is_imm16 (inst->inst_offset)) {
3399 ppc_stw (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
3401 ppc_load (code, ppc_r11, inst->inst_offset);
3402 ppc_stwx (code, ainfo->reg, ppc_r11, inst->inst_basereg);
3405 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
3406 ArgInfo *ainfo = cinfo->args + i;
3407 inst = cfg->varinfo [pos];
3409 if (inst->opcode == OP_REGVAR) {
3410 if (ainfo->regtype == RegTypeGeneral)
3411 ppc_mr (code, inst->dreg, ainfo->reg);
3412 else if (ainfo->regtype == RegTypeFP)
3413 ppc_fmr (code, inst->dreg, ainfo->reg);
3414 else if (ainfo->regtype == RegTypeBase) {
3415 ppc_lwz (code, ppc_r11, 0, ppc_sp);
3416 ppc_lwz (code, inst->dreg, ainfo->offset, ppc_r11);
3418 g_assert_not_reached ();
3420 if (cfg->verbose_level > 2)
3421 g_print ("Argument %d assigned to register %s\n", pos, mono_arch_regname (inst->dreg));
3423 /* the argument should be put on the stack: FIXME handle size != word */
3424 if (ainfo->regtype == RegTypeGeneral) {
3425 switch (ainfo->size) {
3427 if (ppc_is_imm16 (inst->inst_offset)) {
3428 ppc_stb (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
3430 ppc_load (code, ppc_r11, inst->inst_offset);
3431 ppc_stbx (code, ainfo->reg, ppc_r11, inst->inst_basereg);
3435 if (ppc_is_imm16 (inst->inst_offset)) {
3436 ppc_sth (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
3438 ppc_load (code, ppc_r11, inst->inst_offset);
3439 ppc_sthx (code, ainfo->reg, ppc_r11, inst->inst_basereg);
3443 if (ppc_is_imm16 (inst->inst_offset + 4)) {
3444 ppc_stw (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
3445 ppc_stw (code, ainfo->reg + 1, inst->inst_offset + 4, inst->inst_basereg);
3447 ppc_load (code, ppc_r11, inst->inst_offset);
3448 ppc_add (code, ppc_r11, ppc_r11, inst->inst_basereg);
3449 ppc_stw (code, ainfo->reg, 0, ppc_r11);
3450 ppc_stw (code, ainfo->reg + 1, 4, ppc_r11);
3454 if (ppc_is_imm16 (inst->inst_offset)) {
3455 ppc_stw (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
3457 ppc_load (code, ppc_r11, inst->inst_offset);
3458 ppc_stwx (code, ainfo->reg, ppc_r11, inst->inst_basereg);
3462 } else if (ainfo->regtype == RegTypeBase) {
3463 /* load the previous stack pointer in r11 */
3464 ppc_lwz (code, ppc_r11, 0, ppc_sp);
3465 ppc_lwz (code, ppc_r0, ainfo->offset, ppc_r11);
3466 switch (ainfo->size) {
3468 if (ppc_is_imm16 (inst->inst_offset)) {
3469 ppc_stb (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
3471 ppc_load (code, ppc_r11, inst->inst_offset);
3472 ppc_stbx (code, ppc_r0, ppc_r11, inst->inst_basereg);
3476 if (ppc_is_imm16 (inst->inst_offset)) {
3477 ppc_sth (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
3479 ppc_load (code, ppc_r11, inst->inst_offset);
3480 ppc_sthx (code, ppc_r0, ppc_r11, inst->inst_basereg);
3484 if (ppc_is_imm16 (inst->inst_offset + 4)) {
3485 ppc_stw (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
3486 ppc_lwz (code, ppc_r0, ainfo->offset + 4, ppc_r11);
3487 ppc_stw (code, ppc_r0, inst->inst_offset + 4, inst->inst_basereg);
3490 g_assert_not_reached ();
3494 if (ppc_is_imm16 (inst->inst_offset)) {
3495 ppc_stw (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
3497 ppc_load (code, ppc_r11, inst->inst_offset);
3498 ppc_stwx (code, ppc_r0, ppc_r11, inst->inst_basereg);
3502 } else if (ainfo->regtype == RegTypeFP) {
3503 g_assert (ppc_is_imm16 (inst->inst_offset));
3504 if (ainfo->size == 8)
3505 ppc_stfd (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
3506 else if (ainfo->size == 4)
3507 ppc_stfs (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
3509 g_assert_not_reached ();
3510 } else if (ainfo->regtype == RegTypeStructByVal) {
3511 int doffset = inst->inst_offset;
3514 g_assert (ppc_is_imm16 (inst->inst_offset));
3515 g_assert (ppc_is_imm16 (inst->inst_offset + ainfo->size * sizeof (gpointer)));
3516 for (cur_reg = 0; cur_reg < ainfo->size; ++cur_reg) {
3517 ppc_stw (code, ainfo->reg + cur_reg, doffset, inst->inst_basereg);
3518 soffset += sizeof (gpointer);
3519 doffset += sizeof (gpointer);
3521 if (ainfo->vtsize) {
3522 /* load the previous stack pointer in r11 (r0 gets overwritten by the memcpy) */
3523 ppc_lwz (code, ppc_r11, 0, ppc_sp);
3524 /* FIXME: handle overrun! with struct sizes not multiple of 4 */
3525 code = emit_memcpy (code, ainfo->vtsize * sizeof (gpointer), inst->inst_basereg, doffset, ppc_r11, ainfo->offset + soffset);
3527 } else if (ainfo->regtype == RegTypeStructByAddr) {
3528 g_assert (ppc_is_imm16 (inst->inst_offset));
3529 /* FIXME: handle overrun! with struct sizes not multiple of 4 */
3530 code = emit_memcpy (code, ainfo->vtsize * sizeof (gpointer), inst->inst_basereg, inst->inst_offset, ainfo->reg, 0);
3532 g_assert_not_reached ();
3537 if (method->save_lmf) {
3539 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3540 (gpointer)"mono_get_lmf_addr");
3542 /* we build the MonoLMF structure on the stack - see mini-ppc.h */
3543 /* lmf_offset is the offset from the previous stack pointer,
3544 * alloc_size is the total stack space allocated, so the offset
3545 * of MonoLMF from the current stack ptr is alloc_size - lmf_offset.
3546 * The pointer to the struct is put in ppc_r11 (new_lmf).
3547 * The callee-saved registers are already in the MonoLMF structure
3549 ppc_addi (code, ppc_r11, ppc_sp, alloc_size - lmf_offset);
3550 /* ppc_r3 is the result from mono_get_lmf_addr () */
3551 ppc_stw (code, ppc_r3, G_STRUCT_OFFSET(MonoLMF, lmf_addr), ppc_r11);
3552 /* new_lmf->previous_lmf = *lmf_addr */
3553 ppc_lwz (code, ppc_r0, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r3);
3554 ppc_stw (code, ppc_r0, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r11);
3555 /* *(lmf_addr) = r11 */
3556 ppc_stw (code, ppc_r11, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r3);
3557 /* save method info */
3558 ppc_load (code, ppc_r0, method);
3559 ppc_stw (code, ppc_r0, G_STRUCT_OFFSET(MonoLMF, method), ppc_r11);
3560 ppc_stw (code, ppc_sp, G_STRUCT_OFFSET(MonoLMF, ebp), ppc_r11);
3561 /* save the current IP */
3562 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
3563 ppc_load (code, ppc_r0, 0x01010101);
3564 ppc_stw (code, ppc_r0, G_STRUCT_OFFSET(MonoLMF, eip), ppc_r11);
3568 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
3570 cfg->code_len = code - cfg->native_code;
3577 mono_arch_emit_epilog (MonoCompile *cfg)
3579 MonoJumpInfo *patch_info;
3580 MonoMethod *method = cfg->method;
3585 * Keep in sync with CEE_JMP
3587 code = cfg->native_code + cfg->code_len;
3589 if (mono_jit_trace_calls != NULL && mono_trace_eval (method)) {
3590 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
3594 if (method->save_lmf) {
3596 pos += sizeof (MonoLMF);
3598 /* save the frame reg in r8 */
3599 ppc_mr (code, ppc_r8, cfg->frame_reg);
3600 ppc_addi (code, ppc_r11, cfg->frame_reg, cfg->stack_usage - lmf_offset);
3601 /* r5 = previous_lmf */
3602 ppc_lwz (code, ppc_r5, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r11);
3604 ppc_lwz (code, ppc_r6, G_STRUCT_OFFSET(MonoLMF, lmf_addr), ppc_r11);
3605 /* *(lmf_addr) = previous_lmf */
3606 ppc_stw (code, ppc_r5, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r6);
3607 /* FIXME: speedup: there is no actual need to restore the registers if
3608 * we didn't actually change them (idea from Zoltan).
3611 ppc_lmw (code, ppc_r13, ppc_r11, G_STRUCT_OFFSET(MonoLMF, iregs));
3613 /*for (i = 14; i < 32; i++) {
3614 ppc_lfd (code, i, G_STRUCT_OFFSET(MonoLMF, fregs) + ((i-14) * sizeof (gdouble)), ppc_r11);
3616 g_assert (ppc_is_imm16 (cfg->stack_usage + PPC_RET_ADDR_OFFSET));
3617 /* use the saved copy of the frame reg in r8 */
3618 if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
3619 ppc_lwz (code, ppc_r0, cfg->stack_usage + PPC_RET_ADDR_OFFSET, ppc_r8);
3620 ppc_mtlr (code, ppc_r0);
3622 ppc_addic (code, ppc_sp, ppc_r8, cfg->stack_usage);
3624 if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
3625 if (ppc_is_imm16 (cfg->stack_usage + PPC_RET_ADDR_OFFSET)) {
3626 ppc_lwz (code, ppc_r0, cfg->stack_usage + PPC_RET_ADDR_OFFSET, cfg->frame_reg);
3628 ppc_load (code, ppc_r11, cfg->stack_usage + PPC_RET_ADDR_OFFSET);
3629 ppc_lwzx (code, ppc_r0, cfg->frame_reg, ppc_r11);
3631 ppc_mtlr (code, ppc_r0);
3633 if (ppc_is_imm16 (cfg->stack_usage)) {
3634 ppc_addic (code, ppc_sp, cfg->frame_reg, cfg->stack_usage);
3636 ppc_load (code, ppc_r11, cfg->stack_usage);
3637 ppc_add (code, ppc_sp, cfg->frame_reg, ppc_r11);
3640 /*for (i = 31; i >= 14; --i) {
3641 if (cfg->used_float_regs & (1 << i)) {
3642 pos += sizeof (double);
3643 ppc_lfd (code, i, -pos, ppc_sp);
3646 for (i = 31; i >= 13; --i) {
3647 if (cfg->used_int_regs & (1 << i)) {
3648 pos += sizeof (gulong);
3649 ppc_lwz (code, i, -pos, ppc_sp);
3655 /* add code to raise exceptions */
3656 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
3657 switch (patch_info->type) {
3658 case MONO_PATCH_INFO_BB_OVF: {
3659 MonoOvfJump *ovfj = patch_info->data.target;
3660 unsigned char *ip = patch_info->ip.i + cfg->native_code;
3661 /* patch the initial jump */
3662 ppc_patch (ip, code);
3663 ppc_bc (code, ovfj->b0_cond, ovfj->b1_cond, 2);
3665 ppc_patch (code - 4, ip + 4); /* jump back after the initiali branch */
3666 /* jump back to the true target */
3668 ip = ovfj->bb->native_offset + cfg->native_code;
3669 ppc_patch (code - 4, ip);
3672 case MONO_PATCH_INFO_EXC_OVF: {
3673 MonoOvfJump *ovfj = patch_info->data.target;
3674 unsigned char *ip = patch_info->ip.i + cfg->native_code;
3675 /* patch the initial jump */
3676 ppc_patch (ip, code);
3677 ppc_bc (code, ovfj->b0_cond, ovfj->b1_cond, 2);
3679 ppc_patch (code - 4, ip + 4); /* jump back after the initiali branch */
3680 /* jump back to the true target */
3682 ip = (char*)ovfj->ip + 4;
3683 ppc_patch (code - 4, ip);
3686 case MONO_PATCH_INFO_EXC: {
3687 unsigned char *ip = patch_info->ip.i + cfg->native_code;
3688 ppc_patch (ip, code);
3689 /*mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC_NAME, patch_info->data.target);*/
3690 ppc_load (code, ppc_r3, patch_info->data.target);
3691 /* simulate a call from ip */
3692 ppc_load (code, ppc_r0, ip + 4);
3693 ppc_mtlr (code, ppc_r0);
3694 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
3695 patch_info->data.name = "mono_arch_throw_exception_by_name";
3696 patch_info->ip.i = code - cfg->native_code;
3706 cfg->code_len = code - cfg->native_code;
3708 g_assert (cfg->code_len < cfg->code_size);
3713 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
3718 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
3723 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, int this_reg, int this_type, int vt_reg)
3725 int this_dreg = ppc_r3;
3730 /* add the this argument */
3731 if (this_reg != -1) {
3733 MONO_INST_NEW (cfg, this, OP_SETREG);
3734 this->type = this_type;
3735 this->sreg1 = this_reg;
3736 this->dreg = this_dreg;
3737 mono_bblock_add_inst (cfg->cbb, this);
3742 MONO_INST_NEW (cfg, vtarg, OP_SETREG);
3743 vtarg->type = STACK_MP;
3744 vtarg->sreg1 = vt_reg;
3745 vtarg->dreg = ppc_r3;
3746 mono_bblock_add_inst (cfg->cbb, vtarg);
3751 mono_arch_get_opcode_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
3753 /* optional instruction, need to detect it
3754 if (cmethod->klass == mono_defaults.math_class) {
3755 if (strcmp (cmethod->name, "Sqrt") == 0)
3763 mono_arch_print_tree (MonoInst *tree, int arity)