2 * mini-ppc.c: PowerPC backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
7 * Andreas Faerber <andreas.faerber@web.de>
9 * (C) 2003 Ximian, Inc.
10 * (C) 2007-2008 Andreas Faerber
15 #include <mono/metadata/abi-details.h>
16 #include <mono/metadata/appdomain.h>
17 #include <mono/metadata/debug-helpers.h>
18 #include <mono/utils/mono-proclib.h>
19 #include <mono/utils/mono-mmap.h>
20 #include <mono/utils/mono-hwcap-ppc.h>
23 #ifdef TARGET_POWERPC64
24 #include "cpu-ppc64.h"
31 #include <sys/sysctl.h>
37 #define FORCE_INDIR_CALL 1
48 /* cpu_hw_caps contains the flags defined below */
49 static int cpu_hw_caps = 0;
50 static int cachelinesize = 0;
51 static int cachelineinc = 0;
53 PPC_ICACHE_SNOOP = 1 << 0,
54 PPC_MULTIPLE_LS_UNITS = 1 << 1,
55 PPC_SMP_CAPABLE = 1 << 2,
58 PPC_MOVE_FPR_GPR = 1 << 5,
62 #define BREAKPOINT_SIZE (PPC_LOAD_SEQUENCE_LENGTH + 4)
64 /* This mutex protects architecture specific caches */
65 #define mono_mini_arch_lock() mono_mutex_lock (&mini_arch_mutex)
66 #define mono_mini_arch_unlock() mono_mutex_unlock (&mini_arch_mutex)
67 static mono_mutex_t mini_arch_mutex;
69 int mono_exc_esp_offset = 0;
70 static int tls_mode = TLS_MODE_DETECT;
71 static int lmf_pthread_key = -1;
74 * The code generated for sequence points reads from this location, which is
75 * made read-only when single stepping is enabled.
77 static gpointer ss_trigger_page;
79 /* Enabled breakpoints read from this trigger page */
80 static gpointer bp_trigger_page;
83 offsets_from_pthread_key (guint32 key, int *offset2)
87 *offset2 = idx2 * sizeof (gpointer);
88 return 284 + idx1 * sizeof (gpointer);
91 #define emit_linuxthreads_tls(code,dreg,key) do {\
93 off1 = offsets_from_pthread_key ((key), &off2); \
94 ppc_ldptr ((code), (dreg), off1, ppc_r2); \
95 ppc_ldptr ((code), (dreg), off2, (dreg)); \
98 #define emit_darwing5_tls(code,dreg,key) do {\
99 int off1 = 0x48 + key * sizeof (gpointer); \
100 ppc_mfspr ((code), (dreg), 104); \
101 ppc_ldptr ((code), (dreg), off1, (dreg)); \
104 /* FIXME: ensure the sc call preserves all but r3 */
105 #define emit_darwing4_tls(code,dreg,key) do {\
106 int off1 = 0x48 + key * sizeof (gpointer); \
107 if ((dreg) != ppc_r3) ppc_mr ((code), ppc_r11, ppc_r3); \
108 ppc_li ((code), ppc_r0, 0x7FF2); \
110 ppc_lwz ((code), (dreg), off1, ppc_r3); \
111 if ((dreg) != ppc_r3) ppc_mr ((code), ppc_r3, ppc_r11); \
114 #ifdef PPC_THREAD_PTR_REG
115 #define emit_nptl_tls(code,dreg,key) do { \
117 int off2 = key >> 15; \
118 if ((off2 == 0) || (off2 == -1)) { \
119 ppc_ldptr ((code), (dreg), off1, PPC_THREAD_PTR_REG); \
121 int off3 = (off2 + 1) > 1; \
122 ppc_addis ((code), ppc_r11, PPC_THREAD_PTR_REG, off3); \
123 ppc_ldptr ((code), (dreg), off1, ppc_r11); \
127 #define emit_nptl_tls(code,dreg,key) do { \
128 g_assert_not_reached (); \
132 #define emit_tls_access(code,dreg,key) do { \
133 switch (tls_mode) { \
134 case TLS_MODE_LTHREADS: emit_linuxthreads_tls(code,dreg,key); break; \
135 case TLS_MODE_NPTL: emit_nptl_tls(code,dreg,key); break; \
136 case TLS_MODE_DARWIN_G5: emit_darwing5_tls(code,dreg,key); break; \
137 case TLS_MODE_DARWIN_G4: emit_darwing4_tls(code,dreg,key); break; \
138 default: g_assert_not_reached (); \
142 #define MONO_EMIT_NEW_LOAD_R8(cfg,dr,addr) do { \
144 MONO_INST_NEW ((cfg), (inst), OP_R8CONST); \
145 inst->type = STACK_R8; \
147 inst->inst_p0 = (void*)(addr); \
148 mono_bblock_add_inst (cfg->cbb, inst); \
152 mono_arch_regname (int reg) {
153 static const char rnames[][4] = {
154 "r0", "sp", "r2", "r3", "r4",
155 "r5", "r6", "r7", "r8", "r9",
156 "r10", "r11", "r12", "r13", "r14",
157 "r15", "r16", "r17", "r18", "r19",
158 "r20", "r21", "r22", "r23", "r24",
159 "r25", "r26", "r27", "r28", "r29",
162 if (reg >= 0 && reg < 32)
168 mono_arch_fregname (int reg) {
169 static const char rnames[][4] = {
170 "f0", "f1", "f2", "f3", "f4",
171 "f5", "f6", "f7", "f8", "f9",
172 "f10", "f11", "f12", "f13", "f14",
173 "f15", "f16", "f17", "f18", "f19",
174 "f20", "f21", "f22", "f23", "f24",
175 "f25", "f26", "f27", "f28", "f29",
178 if (reg >= 0 && reg < 32)
183 /* this function overwrites r0, r11, r12 */
185 emit_memcpy (guint8 *code, int size, int dreg, int doffset, int sreg, int soffset)
187 /* unrolled, use the counter in big */
188 if (size > sizeof (gpointer) * 5) {
189 long shifted = size / SIZEOF_VOID_P;
190 guint8 *copy_loop_start, *copy_loop_jump;
192 ppc_load (code, ppc_r0, shifted);
193 ppc_mtctr (code, ppc_r0);
194 //g_assert (sreg == ppc_r11);
195 ppc_addi (code, ppc_r12, dreg, (doffset - sizeof (gpointer)));
196 ppc_addi (code, ppc_r11, sreg, (soffset - sizeof (gpointer)));
197 copy_loop_start = code;
198 ppc_ldptr_update (code, ppc_r0, (unsigned int)sizeof (gpointer), ppc_r11);
199 ppc_stptr_update (code, ppc_r0, (unsigned int)sizeof (gpointer), ppc_r12);
200 copy_loop_jump = code;
201 ppc_bc (code, PPC_BR_DEC_CTR_NONZERO, 0, 0);
202 ppc_patch (copy_loop_jump, copy_loop_start);
203 size -= shifted * sizeof (gpointer);
204 doffset = soffset = 0;
207 #ifdef __mono_ppc64__
208 /* the hardware has multiple load/store units and the move is long
209 enough to use more then one regiester, then use load/load/store/store
210 to execute 2 instructions per cycle. */
211 if ((cpu_hw_caps & PPC_MULTIPLE_LS_UNITS) && (dreg != ppc_r12) && (sreg != ppc_r12)) {
213 ppc_ldptr (code, ppc_r0, soffset, sreg);
214 ppc_ldptr (code, ppc_r12, soffset+8, sreg);
215 ppc_stptr (code, ppc_r0, doffset, dreg);
216 ppc_stptr (code, ppc_r12, doffset+8, dreg);
223 ppc_ldr (code, ppc_r0, soffset, sreg);
224 ppc_str (code, ppc_r0, doffset, dreg);
230 if ((cpu_hw_caps & PPC_MULTIPLE_LS_UNITS) && (dreg != ppc_r12) && (sreg != ppc_r12)) {
232 ppc_lwz (code, ppc_r0, soffset, sreg);
233 ppc_lwz (code, ppc_r12, soffset+4, sreg);
234 ppc_stw (code, ppc_r0, doffset, dreg);
235 ppc_stw (code, ppc_r12, doffset+4, dreg);
243 ppc_lwz (code, ppc_r0, soffset, sreg);
244 ppc_stw (code, ppc_r0, doffset, dreg);
250 ppc_lhz (code, ppc_r0, soffset, sreg);
251 ppc_sth (code, ppc_r0, doffset, dreg);
257 ppc_lbz (code, ppc_r0, soffset, sreg);
258 ppc_stb (code, ppc_r0, doffset, dreg);
267 * mono_arch_get_argument_info:
268 * @csig: a method signature
269 * @param_count: the number of parameters to consider
270 * @arg_info: an array to store the result infos
272 * Gathers information on parameters such as size, alignment and
273 * padding. arg_info should be large enought to hold param_count + 1 entries.
275 * Returns the size of the activation frame.
278 mono_arch_get_argument_info (MonoGenericSharingContext *gsctx, MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
280 #ifdef __mono_ppc64__
284 int k, frame_size = 0;
285 int size, align, pad;
288 if (MONO_TYPE_ISSTRUCT (csig->ret)) {
289 frame_size += sizeof (gpointer);
293 arg_info [0].offset = offset;
296 frame_size += sizeof (gpointer);
300 arg_info [0].size = frame_size;
302 for (k = 0; k < param_count; k++) {
305 size = mono_type_native_stack_size (csig->params [k], (guint32*)&align);
307 size = mini_type_stack_size (NULL, csig->params [k], &align);
309 /* ignore alignment for now */
312 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
313 arg_info [k].pad = pad;
315 arg_info [k + 1].pad = 0;
316 arg_info [k + 1].size = size;
318 arg_info [k + 1].offset = offset;
322 align = MONO_ARCH_FRAME_ALIGNMENT;
323 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
324 arg_info [k].pad = pad;
330 #ifdef __mono_ppc64__
332 is_load_sequence (guint32 *seq)
334 return ppc_opcode (seq [0]) == 15 && /* lis */
335 ppc_opcode (seq [1]) == 24 && /* ori */
336 ppc_opcode (seq [2]) == 30 && /* sldi */
337 ppc_opcode (seq [3]) == 25 && /* oris */
338 ppc_opcode (seq [4]) == 24; /* ori */
341 #define ppc_load_get_dest(l) (((l)>>21) & 0x1f)
342 #define ppc_load_get_off(l) ((gint16)((l) & 0xffff))
346 #define ppc_is_load_op(opcode) (ppc_opcode ((opcode)) == 58 || ppc_opcode ((opcode)) == 32)
348 /* code must point to the blrl */
350 mono_ppc_is_direct_call_sequence (guint32 *code)
352 #ifdef __mono_ppc64__
353 g_assert(*code == 0x4e800021 || *code == 0x4e800020 || *code == 0x4e800420);
355 /* the thunk-less direct call sequence: lis/ori/sldi/oris/ori/mtlr/blrl */
356 if (ppc_opcode (code [-1]) == 31) { /* mtlr */
357 if (ppc_is_load_op (code [-2]) && ppc_is_load_op (code [-3])) { /* ld/ld */
358 if (!is_load_sequence (&code [-8]))
360 /* one of the loads must be "ld r2,8(rX)" or "ld r2,4(rX) for ilp32 */
361 return (ppc_load_get_dest (code [-2]) == ppc_r2 && ppc_load_get_off (code [-2]) == sizeof (gpointer)) ||
362 (ppc_load_get_dest (code [-3]) == ppc_r2 && ppc_load_get_off (code [-3]) == sizeof (gpointer));
364 if (ppc_opcode (code [-2]) == 24 && ppc_opcode (code [-3]) == 31) /* mr/nop */
365 return is_load_sequence (&code [-8]);
367 return is_load_sequence (&code [-6]);
371 g_assert(*code == 0x4e800021);
373 /* the thunk-less direct call sequence: lis/ori/mtlr/blrl */
374 return ppc_opcode (code [-1]) == 31 &&
375 ppc_opcode (code [-2]) == 24 &&
376 ppc_opcode (code [-3]) == 15;
380 #define MAX_ARCH_DELEGATE_PARAMS 7
383 get_delegate_invoke_impl (gboolean has_target, guint32 param_count, guint32 *code_len, gboolean aot)
385 guint8 *code, *start;
388 int size = MONO_PPC_32_64_CASE (32, 32) + PPC_FTNPTR_SIZE;
390 start = code = mono_global_codeman_reserve (size);
392 code = mono_ppc_create_pre_code_ftnptr (code);
394 /* Replace the this argument with the target */
395 ppc_ldptr (code, ppc_r0, MONO_STRUCT_OFFSET (MonoDelegate, method_ptr), ppc_r3);
396 #ifdef PPC_USES_FUNCTION_DESCRIPTOR
397 /* it's a function descriptor */
398 /* Can't use ldptr as it doesn't work with r0 */
399 ppc_ldptr_indexed (code, ppc_r0, 0, ppc_r0);
401 ppc_mtctr (code, ppc_r0);
402 ppc_ldptr (code, ppc_r3, MONO_STRUCT_OFFSET (MonoDelegate, target), ppc_r3);
403 ppc_bcctr (code, PPC_BR_ALWAYS, 0);
405 g_assert ((code - start) <= size);
407 mono_arch_flush_icache (start, size);
411 size = MONO_PPC_32_64_CASE (32, 32) + param_count * 4 + PPC_FTNPTR_SIZE;
412 start = code = mono_global_codeman_reserve (size);
414 code = mono_ppc_create_pre_code_ftnptr (code);
416 ppc_ldptr (code, ppc_r0, MONO_STRUCT_OFFSET (MonoDelegate, method_ptr), ppc_r3);
417 #ifdef PPC_USES_FUNCTION_DESCRIPTOR
418 /* it's a function descriptor */
419 ppc_ldptr_indexed (code, ppc_r0, 0, ppc_r0);
421 ppc_mtctr (code, ppc_r0);
422 /* slide down the arguments */
423 for (i = 0; i < param_count; ++i) {
424 ppc_mr (code, (ppc_r3 + i), (ppc_r3 + i + 1));
426 ppc_bcctr (code, PPC_BR_ALWAYS, 0);
428 g_assert ((code - start) <= size);
430 mono_arch_flush_icache (start, size);
434 *code_len = code - start;
440 mono_arch_get_delegate_invoke_impls (void)
448 code = get_delegate_invoke_impl (TRUE, 0, &code_len, TRUE);
449 res = g_slist_prepend (res, mono_tramp_info_create ("delegate_invoke_impl_has_target", code, code_len, NULL, NULL));
451 for (i = 0; i < MAX_ARCH_DELEGATE_PARAMS; ++i) {
452 code = get_delegate_invoke_impl (FALSE, i, &code_len, TRUE);
453 tramp_name = g_strdup_printf ("delegate_invoke_impl_target_%d", i);
454 res = g_slist_prepend (res, mono_tramp_info_create (tramp_name, code, code_len, NULL, NULL));
462 mono_arch_get_delegate_invoke_impl (MonoMethodSignature *sig, gboolean has_target)
464 guint8 *code, *start;
466 /* FIXME: Support more cases */
467 if (MONO_TYPE_ISSTRUCT (sig->ret))
471 static guint8* cached = NULL;
477 start = mono_aot_get_trampoline ("delegate_invoke_impl_has_target");
479 start = get_delegate_invoke_impl (TRUE, 0, NULL, FALSE);
481 mono_memory_barrier ();
485 static guint8* cache [MAX_ARCH_DELEGATE_PARAMS + 1] = {NULL};
488 if (sig->param_count > MAX_ARCH_DELEGATE_PARAMS)
490 for (i = 0; i < sig->param_count; ++i)
491 if (!mono_is_regsize_var (sig->params [i]))
495 code = cache [sig->param_count];
500 char *name = g_strdup_printf ("delegate_invoke_impl_target_%d", sig->param_count);
501 start = mono_aot_get_trampoline (name);
504 start = get_delegate_invoke_impl (FALSE, sig->param_count, NULL, FALSE);
507 mono_memory_barrier ();
509 cache [sig->param_count] = start;
515 mono_arch_get_delegate_virtual_invoke_impl (MonoMethodSignature *sig, MonoMethod *method, int offset, gboolean load_imt_reg)
521 mono_arch_get_this_arg_from_call (mgreg_t *regs, guint8 *code)
523 mgreg_t *r = (mgreg_t*)regs;
525 return (gpointer)(gsize)r [ppc_r3];
533 #define MAX_AUX_ENTRIES 128
535 * PPC_FEATURE_POWER4, PPC_FEATURE_POWER5, PPC_FEATURE_POWER5_PLUS, PPC_FEATURE_CELL,
536 * PPC_FEATURE_PA6T, PPC_FEATURE_ARCH_2_05 are considered supporting 2X ISA features
538 #define ISA_2X (0x00080000 | 0x00040000 | 0x00020000 | 0x00010000 | 0x00000800 | 0x00001000)
540 /* define PPC_FEATURE_64 HWCAP for 64-bit category. */
541 #define ISA_64 0x40000000
543 /* define PPC_FEATURE_POWER6_EXT HWCAP for power6x mffgpr/mftgpr instructions. */
544 #define ISA_MOVE_FPR_GPR 0x00000200
546 * Initialize the cpu to execute managed code.
549 mono_arch_cpu_init (void)
554 * Initialize architecture specific code.
557 mono_arch_init (void)
559 #if defined(MONO_CROSS_COMPILE)
560 #elif defined(__APPLE__)
562 size_t len = sizeof (cachelinesize);
565 mib [1] = HW_CACHELINE;
567 if (sysctl (mib, 2, &cachelinesize, &len, NULL, 0) == -1) {
571 cachelineinc = cachelinesize;
573 #elif defined(__linux__)
574 AuxVec vec [MAX_AUX_ENTRIES];
575 int i, vec_entries = 0;
576 /* sadly this will work only with 2.6 kernels... */
577 FILE* f = fopen ("/proc/self/auxv", "rb");
580 vec_entries = fread (&vec, sizeof (AuxVec), MAX_AUX_ENTRIES, f);
584 for (i = 0; i < vec_entries; i++) {
585 int type = vec [i].type;
587 if (type == 19) { /* AT_DCACHEBSIZE */
588 cachelinesize = vec [i].value;
592 #elif defined(G_COMPILER_CODEWARRIOR)
596 //#error Need a way to get cache line size
599 if (mono_hwcap_ppc_has_icache_snoop)
600 cpu_hw_caps |= PPC_ICACHE_SNOOP;
602 if (mono_hwcap_ppc_is_isa_2x)
603 cpu_hw_caps |= PPC_ISA_2X;
605 if (mono_hwcap_ppc_is_isa_64)
606 cpu_hw_caps |= PPC_ISA_64;
608 if (mono_hwcap_ppc_has_move_fpr_gpr)
609 cpu_hw_caps |= PPC_MOVE_FPR_GPR;
611 if (mono_hwcap_ppc_has_multiple_ls_units)
612 cpu_hw_caps |= PPC_MULTIPLE_LS_UNITS;
618 cachelineinc = cachelinesize;
620 if (mono_cpu_count () > 1)
621 cpu_hw_caps |= PPC_SMP_CAPABLE;
623 mono_mutex_init_recursive (&mini_arch_mutex);
625 ss_trigger_page = mono_valloc (NULL, mono_pagesize (), MONO_MMAP_READ|MONO_MMAP_32BIT);
626 bp_trigger_page = mono_valloc (NULL, mono_pagesize (), MONO_MMAP_READ|MONO_MMAP_32BIT);
627 mono_mprotect (bp_trigger_page, mono_pagesize (), 0);
629 mono_aot_register_jit_icall ("mono_ppc_throw_exception", mono_ppc_throw_exception);
633 * Cleanup architecture specific code.
636 mono_arch_cleanup (void)
638 mono_mutex_destroy (&mini_arch_mutex);
642 * This function returns the optimizations supported on this cpu.
645 mono_arch_cpu_optimizations (guint32 *exclude_mask)
649 /* no ppc-specific optimizations yet */
655 * This function test for all SIMD functions supported.
657 * Returns a bitmask corresponding to all supported versions.
661 mono_arch_cpu_enumerate_simd_versions (void)
663 /* SIMD is currently unimplemented */
667 #ifdef __mono_ppc64__
668 #define CASE_PPC32(c)
669 #define CASE_PPC64(c) case c:
671 #define CASE_PPC32(c) case c:
672 #define CASE_PPC64(c)
676 is_regsize_var (MonoType *t) {
679 t = mini_type_get_underlying_type (NULL, t);
683 CASE_PPC64 (MONO_TYPE_I8)
684 CASE_PPC64 (MONO_TYPE_U8)
688 case MONO_TYPE_FNPTR:
690 case MONO_TYPE_OBJECT:
691 case MONO_TYPE_STRING:
692 case MONO_TYPE_CLASS:
693 case MONO_TYPE_SZARRAY:
694 case MONO_TYPE_ARRAY:
696 case MONO_TYPE_GENERICINST:
697 if (!mono_type_generic_inst_is_valuetype (t))
700 case MONO_TYPE_VALUETYPE:
708 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
713 for (i = 0; i < cfg->num_varinfo; i++) {
714 MonoInst *ins = cfg->varinfo [i];
715 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
718 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
721 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
724 /* we can only allocate 32 bit values */
725 if (is_regsize_var (ins->inst_vtype)) {
726 g_assert (MONO_VARINFO (cfg, i)->reg == -1);
727 g_assert (i == vmv->idx);
728 vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
734 #endif /* ifndef DISABLE_JIT */
737 mono_arch_get_global_int_regs (MonoCompile *cfg)
741 if (cfg->frame_reg != ppc_sp)
743 /* ppc_r13 is used by the system on PPC EABI */
744 for (i = 14; i < top; ++i) {
746 * Reserve r29 for holding the vtable address for virtual calls in AOT mode,
747 * since the trampolines can clobber r11.
749 if (!(cfg->compile_aot && i == 29))
750 regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
757 * mono_arch_regalloc_cost:
759 * Return the cost, in number of memory references, of the action of
760 * allocating the variable VMV into a register during global register
764 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
771 mono_arch_flush_icache (guint8 *code, gint size)
773 #ifdef MONO_CROSS_COMPILE
776 guint8 *endp, *start;
780 start = (guint8*)((gsize)start & ~(cachelinesize - 1));
781 /* use dcbf for smp support, later optimize for UP, see pem._64bit.d20030611.pdf page 211 */
782 #if defined(G_COMPILER_CODEWARRIOR)
783 if (cpu_hw_caps & PPC_SMP_CAPABLE) {
784 for (p = start; p < endp; p += cachelineinc) {
788 for (p = start; p < endp; p += cachelineinc) {
794 for (p = start; p < endp; p += cachelineinc) {
805 /* For POWER5/6 with ICACHE_SNOOPing only one icbi in the range is required.
806 * The sync is required to insure that the store queue is completely empty.
807 * While the icbi performs no cache operations, icbi/isync is required to
808 * kill local prefetch.
810 if (cpu_hw_caps & PPC_ICACHE_SNOOP) {
812 asm ("icbi 0,%0;" : : "r"(code) : "memory");
816 /* use dcbf for smp support, see pem._64bit.d20030611.pdf page 211 */
817 if (cpu_hw_caps & PPC_SMP_CAPABLE) {
818 for (p = start; p < endp; p += cachelineinc) {
819 asm ("dcbf 0,%0;" : : "r"(p) : "memory");
822 for (p = start; p < endp; p += cachelineinc) {
823 asm ("dcbst 0,%0;" : : "r"(p) : "memory");
828 for (p = start; p < endp; p += cachelineinc) {
829 /* for ISA2.0+ implementations we should not need any extra sync between the
830 * icbi instructions. Both the 2.0 PEM and the PowerISA-2.05 say this.
831 * So I am not sure which chip had this problem but its not an issue on
832 * of the ISA V2 chips.
834 if (cpu_hw_caps & PPC_ISA_2X)
835 asm ("icbi 0,%0;" : : "r"(p) : "memory");
837 asm ("icbi 0,%0; sync;" : : "r"(p) : "memory");
839 if (!(cpu_hw_caps & PPC_ISA_2X))
847 mono_arch_flush_register_windows (void)
852 #define ALWAYS_ON_STACK(s) s
853 #define FP_ALSO_IN_REG(s) s
855 #ifdef __mono_ppc64__
856 #define ALWAYS_ON_STACK(s) s
857 #define FP_ALSO_IN_REG(s) s
859 #define ALWAYS_ON_STACK(s)
860 #define FP_ALSO_IN_REG(s)
862 #define ALIGN_DOUBLES
875 guint32 vtsize; /* in param area */
877 guint8 vtregs; /* number of registers used to pass a RegTypeStructByVal */
878 guint8 regtype : 4; /* 0 general, 1 basereg, 2 floating point register, see RegType* */
879 guint8 size : 4; /* 1, 2, 4, 8, or regs used by RegTypeStructByVal */
880 guint8 bytes : 4; /* size in bytes - only valid for
881 RegTypeStructByVal if the struct fits
882 in one word, otherwise it's 0*/
891 gboolean vtype_retaddr;
899 add_general (guint *gr, guint *stack_size, ArgInfo *ainfo, gboolean simple)
901 #ifdef __mono_ppc64__
906 if (*gr >= 3 + PPC_NUM_REG_ARGS) {
907 ainfo->offset = PPC_STACK_PARAM_OFFSET + *stack_size;
908 ainfo->reg = ppc_sp; /* in the caller */
909 ainfo->regtype = RegTypeBase;
910 *stack_size += sizeof (gpointer);
912 ALWAYS_ON_STACK (*stack_size += sizeof (gpointer));
916 if (*gr >= 3 + PPC_NUM_REG_ARGS - 1) {
918 //*stack_size += (*stack_size % 8);
920 ainfo->offset = PPC_STACK_PARAM_OFFSET + *stack_size;
921 ainfo->reg = ppc_sp; /* in the caller */
922 ainfo->regtype = RegTypeBase;
929 ALWAYS_ON_STACK (*stack_size += 8);
937 #if defined(__APPLE__) || defined(__mono_ppc64__)
939 has_only_a_r48_field (MonoClass *klass)
943 gboolean have_field = FALSE;
945 while ((f = mono_class_get_fields (klass, &iter))) {
946 if (!(f->type->attrs & FIELD_ATTRIBUTE_STATIC)) {
949 if (!f->type->byref && (f->type->type == MONO_TYPE_R4 || f->type->type == MONO_TYPE_R8))
960 get_call_info (MonoGenericSharingContext *gsctx, MonoMethodSignature *sig)
962 guint i, fr, gr, pstart;
963 int n = sig->hasthis + sig->param_count;
964 MonoType *simpletype;
965 guint32 stack_size = 0;
966 CallInfo *cinfo = g_malloc0 (sizeof (CallInfo) + sizeof (ArgInfo) * n);
967 gboolean is_pinvoke = sig->pinvoke;
969 fr = PPC_FIRST_FPARG_REG;
970 gr = PPC_FIRST_ARG_REG;
972 /* FIXME: handle returning a struct */
973 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
974 cinfo->vtype_retaddr = TRUE;
980 * To simplify get_this_arg_reg () and LLVM integration, emit the vret arg after
981 * the first argument, allowing 'this' to be always passed in the first arg reg.
982 * Also do this if the first argument is a reference type, since virtual calls
983 * are sometimes made using calli without sig->hasthis set, like in the delegate
986 if (cinfo->vtype_retaddr && !is_pinvoke && (sig->hasthis || (sig->param_count > 0 && MONO_TYPE_IS_REFERENCE (mini_type_get_underlying_type (gsctx, sig->params [0]))))) {
988 add_general (&gr, &stack_size, cinfo->args + 0, TRUE);
991 add_general (&gr, &stack_size, &cinfo->args [sig->hasthis + 0], TRUE);
995 add_general (&gr, &stack_size, &cinfo->ret, TRUE);
996 cinfo->struct_ret = cinfo->ret.reg;
997 cinfo->vret_arg_index = 1;
1001 add_general (&gr, &stack_size, cinfo->args + 0, TRUE);
1005 if (cinfo->vtype_retaddr) {
1006 add_general (&gr, &stack_size, &cinfo->ret, TRUE);
1007 cinfo->struct_ret = cinfo->ret.reg;
1011 DEBUG(printf("params: %d\n", sig->param_count));
1012 for (i = pstart; i < sig->param_count; ++i) {
1013 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
1014 /* Prevent implicit arguments and sig_cookie from
1015 being passed in registers */
1016 gr = PPC_LAST_ARG_REG + 1;
1017 /* FIXME: don't we have to set fr, too? */
1018 /* Emit the signature cookie just before the implicit arguments */
1019 add_general (&gr, &stack_size, &cinfo->sig_cookie, TRUE);
1021 DEBUG(printf("param %d: ", i));
1022 if (sig->params [i]->byref) {
1023 DEBUG(printf("byref\n"));
1024 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
1028 simpletype = mini_type_get_underlying_type (NULL, sig->params [i]);
1029 switch (simpletype->type) {
1030 case MONO_TYPE_BOOLEAN:
1033 cinfo->args [n].size = 1;
1034 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
1037 case MONO_TYPE_CHAR:
1040 cinfo->args [n].size = 2;
1041 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
1046 cinfo->args [n].size = 4;
1047 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
1053 case MONO_TYPE_FNPTR:
1054 case MONO_TYPE_CLASS:
1055 case MONO_TYPE_OBJECT:
1056 case MONO_TYPE_STRING:
1057 case MONO_TYPE_SZARRAY:
1058 case MONO_TYPE_ARRAY:
1059 cinfo->args [n].size = sizeof (gpointer);
1060 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
1063 case MONO_TYPE_GENERICINST:
1064 if (!mono_type_generic_inst_is_valuetype (simpletype)) {
1065 cinfo->args [n].size = sizeof (gpointer);
1066 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
1071 case MONO_TYPE_VALUETYPE:
1072 case MONO_TYPE_TYPEDBYREF: {
1076 klass = mono_class_from_mono_type (sig->params [i]);
1077 if (simpletype->type == MONO_TYPE_TYPEDBYREF)
1078 size = sizeof (MonoTypedRef);
1079 else if (is_pinvoke)
1080 size = mono_class_native_size (klass, NULL);
1082 size = mono_class_value_size (klass, NULL);
1084 #if defined(__APPLE__) || defined(__mono_ppc64__)
1085 if ((size == 4 || size == 8) && has_only_a_r48_field (klass)) {
1086 cinfo->args [n].size = size;
1088 /* It was 7, now it is 8 in LinuxPPC */
1089 if (fr <= PPC_LAST_FPARG_REG) {
1090 cinfo->args [n].regtype = RegTypeFP;
1091 cinfo->args [n].reg = fr;
1093 FP_ALSO_IN_REG (gr ++);
1095 FP_ALSO_IN_REG (gr ++);
1096 ALWAYS_ON_STACK (stack_size += size);
1098 cinfo->args [n].offset = PPC_STACK_PARAM_OFFSET + stack_size;
1099 cinfo->args [n].regtype = RegTypeBase;
1100 cinfo->args [n].reg = ppc_sp; /* in the caller*/
1107 DEBUG(printf ("load %d bytes struct\n",
1108 mono_class_native_size (sig->params [i]->data.klass, NULL)));
1110 #if PPC_PASS_STRUCTS_BY_VALUE
1112 int align_size = size;
1114 int rest = PPC_LAST_ARG_REG - gr + 1;
1117 align_size += (sizeof (gpointer) - 1);
1118 align_size &= ~(sizeof (gpointer) - 1);
1119 nregs = (align_size + sizeof (gpointer) -1 ) / sizeof (gpointer);
1120 n_in_regs = MIN (rest, nregs);
1124 /* FIXME: check this */
1125 if (size >= 3 && size % 4 != 0)
1128 cinfo->args [n].regtype = RegTypeStructByVal;
1129 cinfo->args [n].vtregs = n_in_regs;
1130 cinfo->args [n].size = n_in_regs;
1131 cinfo->args [n].vtsize = nregs - n_in_regs;
1132 cinfo->args [n].reg = gr;
1134 #ifdef __mono_ppc64__
1135 if (nregs == 1 && is_pinvoke)
1136 cinfo->args [n].bytes = size;
1139 cinfo->args [n].bytes = 0;
1141 cinfo->args [n].offset = PPC_STACK_PARAM_OFFSET + stack_size;
1142 /*g_print ("offset for arg %d at %d\n", n, PPC_STACK_PARAM_OFFSET + stack_size);*/
1143 stack_size += nregs * sizeof (gpointer);
1146 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
1147 cinfo->args [n].regtype = RegTypeStructByAddr;
1148 cinfo->args [n].vtsize = size;
1155 cinfo->args [n].size = 8;
1156 add_general (&gr, &stack_size, cinfo->args + n, SIZEOF_REGISTER == 8);
1160 cinfo->args [n].size = 4;
1162 /* It was 7, now it is 8 in LinuxPPC */
1163 if (fr <= PPC_LAST_FPARG_REG) {
1164 cinfo->args [n].regtype = RegTypeFP;
1165 cinfo->args [n].reg = fr;
1167 FP_ALSO_IN_REG (gr ++);
1168 ALWAYS_ON_STACK (stack_size += SIZEOF_REGISTER);
1170 cinfo->args [n].offset = PPC_STACK_PARAM_OFFSET + stack_size + MONO_PPC_32_64_CASE (0, 4);
1171 cinfo->args [n].regtype = RegTypeBase;
1172 cinfo->args [n].reg = ppc_sp; /* in the caller*/
1173 stack_size += SIZEOF_REGISTER;
1178 cinfo->args [n].size = 8;
1179 /* It was 7, now it is 8 in LinuxPPC */
1180 if (fr <= PPC_LAST_FPARG_REG) {
1181 cinfo->args [n].regtype = RegTypeFP;
1182 cinfo->args [n].reg = fr;
1184 FP_ALSO_IN_REG (gr += sizeof (double) / SIZEOF_REGISTER);
1185 ALWAYS_ON_STACK (stack_size += 8);
1187 cinfo->args [n].offset = PPC_STACK_PARAM_OFFSET + stack_size;
1188 cinfo->args [n].regtype = RegTypeBase;
1189 cinfo->args [n].reg = ppc_sp; /* in the caller*/
1195 g_error ("Can't trampoline 0x%x", sig->params [i]->type);
1200 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
1201 /* Prevent implicit arguments and sig_cookie from
1202 being passed in registers */
1203 gr = PPC_LAST_ARG_REG + 1;
1204 /* Emit the signature cookie just before the implicit arguments */
1205 add_general (&gr, &stack_size, &cinfo->sig_cookie, TRUE);
1209 simpletype = mini_type_get_underlying_type (NULL, sig->ret);
1210 switch (simpletype->type) {
1211 case MONO_TYPE_BOOLEAN:
1216 case MONO_TYPE_CHAR:
1222 case MONO_TYPE_FNPTR:
1223 case MONO_TYPE_CLASS:
1224 case MONO_TYPE_OBJECT:
1225 case MONO_TYPE_SZARRAY:
1226 case MONO_TYPE_ARRAY:
1227 case MONO_TYPE_STRING:
1228 cinfo->ret.reg = ppc_r3;
1232 cinfo->ret.reg = ppc_r3;
1236 cinfo->ret.reg = ppc_f1;
1237 cinfo->ret.regtype = RegTypeFP;
1239 case MONO_TYPE_GENERICINST:
1240 if (!mono_type_generic_inst_is_valuetype (simpletype)) {
1241 cinfo->ret.reg = ppc_r3;
1245 case MONO_TYPE_VALUETYPE:
1247 case MONO_TYPE_TYPEDBYREF:
1248 case MONO_TYPE_VOID:
1251 g_error ("Can't handle as return value 0x%x", sig->ret->type);
1255 /* align stack size to 16 */
1256 DEBUG (printf (" stack size: %d (%d)\n", (stack_size + 15) & ~15, stack_size));
1257 stack_size = (stack_size + 15) & ~15;
1259 cinfo->stack_usage = stack_size;
1264 mono_arch_tail_call_supported (MonoCompile *cfg, MonoMethodSignature *caller_sig, MonoMethodSignature *callee_sig)
1270 c1 = get_call_info (NULL, caller_sig);
1271 c2 = get_call_info (NULL, callee_sig);
1272 res = c1->stack_usage >= c2->stack_usage;
1273 if (callee_sig->ret && MONO_TYPE_ISSTRUCT (callee_sig->ret))
1274 /* An address on the callee's stack is passed as the first argument */
1276 for (i = 0; i < c2->nargs; ++i) {
1277 if (c2->args [i].regtype == RegTypeStructByAddr)
1278 /* An address on the callee's stack is passed as the argument */
1283 if (!mono_debug_count ())
1294 * Set var information according to the calling convention. ppc version.
1295 * The locals var stuff should most likely be split in another method.
1298 mono_arch_allocate_vars (MonoCompile *m)
1300 MonoMethodSignature *sig;
1301 MonoMethodHeader *header;
1303 int i, offset, size, align, curinst;
1304 int frame_reg = ppc_sp;
1306 guint32 locals_stack_size, locals_stack_align;
1308 m->flags |= MONO_CFG_HAS_SPILLUP;
1310 /* allow room for the vararg method args: void* and long/double */
1311 if (mono_jit_trace_calls != NULL && mono_trace_eval (m->method))
1312 m->param_area = MAX (m->param_area, sizeof (gpointer)*8);
1313 /* this is bug #60332: remove when #59509 is fixed, so no weird vararg
1314 * call convs needs to be handled this way.
1316 if (m->flags & MONO_CFG_HAS_VARARGS)
1317 m->param_area = MAX (m->param_area, sizeof (gpointer)*8);
1318 /* gtk-sharp and other broken code will dllimport vararg functions even with
1319 * non-varargs signatures. Since there is little hope people will get this right
1320 * we assume they won't.
1322 if (m->method->wrapper_type == MONO_WRAPPER_MANAGED_TO_NATIVE)
1323 m->param_area = MAX (m->param_area, sizeof (gpointer)*8);
1328 * We use the frame register also for any method that has
1329 * exception clauses. This way, when the handlers are called,
1330 * the code will reference local variables using the frame reg instead of
1331 * the stack pointer: if we had to restore the stack pointer, we'd
1332 * corrupt the method frames that are already on the stack (since
1333 * filters get called before stack unwinding happens) when the filter
1334 * code would call any method (this also applies to finally etc.).
1336 if ((m->flags & MONO_CFG_HAS_ALLOCA) || header->num_clauses)
1337 frame_reg = ppc_r31;
1338 m->frame_reg = frame_reg;
1339 if (frame_reg != ppc_sp) {
1340 m->used_int_regs |= 1 << frame_reg;
1343 sig = mono_method_signature (m->method);
1347 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
1348 m->ret->opcode = OP_REGVAR;
1349 m->ret->inst_c0 = m->ret->dreg = ppc_r3;
1351 /* FIXME: handle long values? */
1352 switch (mini_type_get_underlying_type (m->generic_sharing_context, sig->ret)->type) {
1353 case MONO_TYPE_VOID:
1357 m->ret->opcode = OP_REGVAR;
1358 m->ret->inst_c0 = m->ret->dreg = ppc_f1;
1361 m->ret->opcode = OP_REGVAR;
1362 m->ret->inst_c0 = m->ret->dreg = ppc_r3;
1366 /* local vars are at a positive offset from the stack pointer */
1368 * also note that if the function uses alloca, we use ppc_r31
1369 * to point at the local variables.
1371 offset = PPC_MINIMAL_STACK_SIZE; /* linkage area */
1372 /* align the offset to 16 bytes: not sure this is needed here */
1374 //offset &= ~(16 - 1);
1376 /* add parameter area size for called functions */
1377 offset += m->param_area;
1379 offset &= ~(16 - 1);
1381 /* allow room to save the return value */
1382 if (mono_jit_trace_calls != NULL && mono_trace_eval (m->method))
1385 /* the MonoLMF structure is stored just below the stack pointer */
1388 /* this stuff should not be needed on ppc and the new jit,
1389 * because a call on ppc to the handlers doesn't change the
1390 * stack pointer and the jist doesn't manipulate the stack pointer
1391 * for operations involving valuetypes.
1393 /* reserve space to store the esp */
1394 offset += sizeof (gpointer);
1396 /* this is a global constant */
1397 mono_exc_esp_offset = offset;
1400 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
1401 offset += sizeof(gpointer) - 1;
1402 offset &= ~(sizeof(gpointer) - 1);
1404 m->vret_addr->opcode = OP_REGOFFSET;
1405 m->vret_addr->inst_basereg = frame_reg;
1406 m->vret_addr->inst_offset = offset;
1408 if (G_UNLIKELY (m->verbose_level > 1)) {
1409 printf ("vret_addr =");
1410 mono_print_ins (m->vret_addr);
1413 offset += sizeof(gpointer);
1416 offsets = mono_allocate_stack_slots (m, FALSE, &locals_stack_size, &locals_stack_align);
1417 if (locals_stack_align) {
1418 offset += (locals_stack_align - 1);
1419 offset &= ~(locals_stack_align - 1);
1421 for (i = m->locals_start; i < m->num_varinfo; i++) {
1422 if (offsets [i] != -1) {
1423 MonoInst *inst = m->varinfo [i];
1424 inst->opcode = OP_REGOFFSET;
1425 inst->inst_basereg = frame_reg;
1426 inst->inst_offset = offset + offsets [i];
1428 g_print ("allocating local %d (%s) to %d\n",
1429 i, mono_type_get_name (inst->inst_vtype), inst->inst_offset);
1433 offset += locals_stack_size;
1437 inst = m->args [curinst];
1438 if (inst->opcode != OP_REGVAR) {
1439 inst->opcode = OP_REGOFFSET;
1440 inst->inst_basereg = frame_reg;
1441 offset += sizeof (gpointer) - 1;
1442 offset &= ~(sizeof (gpointer) - 1);
1443 inst->inst_offset = offset;
1444 offset += sizeof (gpointer);
1449 for (i = 0; i < sig->param_count; ++i) {
1450 inst = m->args [curinst];
1451 if (inst->opcode != OP_REGVAR) {
1452 inst->opcode = OP_REGOFFSET;
1453 inst->inst_basereg = frame_reg;
1455 size = mono_type_native_stack_size (sig->params [i], (guint32*)&align);
1456 inst->backend.is_pinvoke = 1;
1458 size = mono_type_size (sig->params [i], &align);
1460 if (MONO_TYPE_ISSTRUCT (sig->params [i]) && size < sizeof (gpointer))
1461 size = align = sizeof (gpointer);
1463 * Use at least 4/8 byte alignment, since these might be passed in registers, and
1464 * they are saved using std in the prolog.
1466 align = sizeof (gpointer);
1467 offset += align - 1;
1468 offset &= ~(align - 1);
1469 inst->inst_offset = offset;
1475 /* some storage for fp conversions */
1478 m->arch.fp_conv_var_offset = offset;
1481 /* align the offset to 16 bytes */
1483 offset &= ~(16 - 1);
1486 m->stack_offset = offset;
1488 if (sig->call_convention == MONO_CALL_VARARG) {
1489 CallInfo *cinfo = get_call_info (m->generic_sharing_context, m->method->signature);
1491 m->sig_cookie = cinfo->sig_cookie.offset;
1498 mono_arch_create_vars (MonoCompile *cfg)
1500 MonoMethodSignature *sig = mono_method_signature (cfg->method);
1502 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
1503 cfg->vret_addr = mono_compile_create_var (cfg, &mono_defaults.int_class->byval_arg, OP_ARG);
1507 /* Fixme: we need an alignment solution for enter_method and mono_arch_call_opcode,
1508 * currently alignment in mono_arch_call_opcode is computed without arch_get_argument_info
1512 emit_sig_cookie (MonoCompile *cfg, MonoCallInst *call, CallInfo *cinfo)
1514 int sig_reg = mono_alloc_ireg (cfg);
1516 /* FIXME: Add support for signature tokens to AOT */
1517 cfg->disable_aot = TRUE;
1519 MONO_EMIT_NEW_ICONST (cfg, sig_reg, (gulong)call->signature);
1520 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORE_MEMBASE_REG,
1521 ppc_r1, cinfo->sig_cookie.offset, sig_reg);
1525 mono_arch_emit_call (MonoCompile *cfg, MonoCallInst *call)
1528 MonoMethodSignature *sig;
1532 sig = call->signature;
1533 n = sig->param_count + sig->hasthis;
1535 cinfo = get_call_info (cfg->generic_sharing_context, sig);
1537 for (i = 0; i < n; ++i) {
1538 ArgInfo *ainfo = cinfo->args + i;
1541 if (i >= sig->hasthis)
1542 t = sig->params [i - sig->hasthis];
1544 t = &mono_defaults.int_class->byval_arg;
1545 t = mini_type_get_underlying_type (cfg->generic_sharing_context, t);
1547 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos))
1548 emit_sig_cookie (cfg, call, cinfo);
1550 in = call->args [i];
1552 if (ainfo->regtype == RegTypeGeneral) {
1553 #ifndef __mono_ppc64__
1554 if (!t->byref && ((t->type == MONO_TYPE_I8) || (t->type == MONO_TYPE_U8))) {
1555 MONO_INST_NEW (cfg, ins, OP_MOVE);
1556 ins->dreg = mono_alloc_ireg (cfg);
1557 ins->sreg1 = in->dreg + 1;
1558 MONO_ADD_INS (cfg->cbb, ins);
1559 mono_call_inst_add_outarg_reg (cfg, call, ins->dreg, ainfo->reg + 1, FALSE);
1561 MONO_INST_NEW (cfg, ins, OP_MOVE);
1562 ins->dreg = mono_alloc_ireg (cfg);
1563 ins->sreg1 = in->dreg + 2;
1564 MONO_ADD_INS (cfg->cbb, ins);
1565 mono_call_inst_add_outarg_reg (cfg, call, ins->dreg, ainfo->reg, FALSE);
1569 MONO_INST_NEW (cfg, ins, OP_MOVE);
1570 ins->dreg = mono_alloc_ireg (cfg);
1571 ins->sreg1 = in->dreg;
1572 MONO_ADD_INS (cfg->cbb, ins);
1574 mono_call_inst_add_outarg_reg (cfg, call, ins->dreg, ainfo->reg, FALSE);
1576 } else if (ainfo->regtype == RegTypeStructByAddr) {
1577 MONO_INST_NEW (cfg, ins, OP_OUTARG_VT);
1578 ins->opcode = OP_OUTARG_VT;
1579 ins->sreg1 = in->dreg;
1580 ins->klass = in->klass;
1581 ins->inst_p0 = call;
1582 ins->inst_p1 = mono_mempool_alloc (cfg->mempool, sizeof (ArgInfo));
1583 memcpy (ins->inst_p1, ainfo, sizeof (ArgInfo));
1584 MONO_ADD_INS (cfg->cbb, ins);
1585 } else if (ainfo->regtype == RegTypeStructByVal) {
1586 /* this is further handled in mono_arch_emit_outarg_vt () */
1587 MONO_INST_NEW (cfg, ins, OP_OUTARG_VT);
1588 ins->opcode = OP_OUTARG_VT;
1589 ins->sreg1 = in->dreg;
1590 ins->klass = in->klass;
1591 ins->inst_p0 = call;
1592 ins->inst_p1 = mono_mempool_alloc (cfg->mempool, sizeof (ArgInfo));
1593 memcpy (ins->inst_p1, ainfo, sizeof (ArgInfo));
1594 MONO_ADD_INS (cfg->cbb, ins);
1595 } else if (ainfo->regtype == RegTypeBase) {
1596 if (!t->byref && ((t->type == MONO_TYPE_I8) || (t->type == MONO_TYPE_U8))) {
1597 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI8_MEMBASE_REG, ppc_r1, ainfo->offset, in->dreg);
1598 } else if (!t->byref && ((t->type == MONO_TYPE_R4) || (t->type == MONO_TYPE_R8))) {
1599 if (t->type == MONO_TYPE_R8)
1600 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER8_MEMBASE_REG, ppc_r1, ainfo->offset, in->dreg);
1602 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER4_MEMBASE_REG, ppc_r1, ainfo->offset, in->dreg);
1604 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORE_MEMBASE_REG, ppc_r1, ainfo->offset, in->dreg);
1606 } else if (ainfo->regtype == RegTypeFP) {
1607 if (t->type == MONO_TYPE_VALUETYPE) {
1608 /* this is further handled in mono_arch_emit_outarg_vt () */
1609 MONO_INST_NEW (cfg, ins, OP_OUTARG_VT);
1610 ins->opcode = OP_OUTARG_VT;
1611 ins->sreg1 = in->dreg;
1612 ins->klass = in->klass;
1613 ins->inst_p0 = call;
1614 ins->inst_p1 = mono_mempool_alloc (cfg->mempool, sizeof (ArgInfo));
1615 memcpy (ins->inst_p1, ainfo, sizeof (ArgInfo));
1616 MONO_ADD_INS (cfg->cbb, ins);
1618 cfg->flags |= MONO_CFG_HAS_FPOUT;
1620 int dreg = mono_alloc_freg (cfg);
1622 if (ainfo->size == 4) {
1623 MONO_EMIT_NEW_UNALU (cfg, OP_FCONV_TO_R4, dreg, in->dreg);
1625 MONO_INST_NEW (cfg, ins, OP_FMOVE);
1627 ins->sreg1 = in->dreg;
1628 MONO_ADD_INS (cfg->cbb, ins);
1631 mono_call_inst_add_outarg_reg (cfg, call, dreg, ainfo->reg, TRUE);
1632 cfg->flags |= MONO_CFG_HAS_FPOUT;
1635 g_assert_not_reached ();
1639 /* Emit the signature cookie in the case that there is no
1640 additional argument */
1641 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n == sig->sentinelpos))
1642 emit_sig_cookie (cfg, call, cinfo);
1644 if (cinfo->struct_ret) {
1647 MONO_INST_NEW (cfg, vtarg, OP_MOVE);
1648 vtarg->sreg1 = call->vret_var->dreg;
1649 vtarg->dreg = mono_alloc_preg (cfg);
1650 MONO_ADD_INS (cfg->cbb, vtarg);
1652 mono_call_inst_add_outarg_reg (cfg, call, vtarg->dreg, cinfo->struct_ret, FALSE);
1655 call->stack_usage = cinfo->stack_usage;
1656 cfg->param_area = MAX (PPC_MINIMAL_PARAM_AREA_SIZE, MAX (cfg->param_area, cinfo->stack_usage));
1657 cfg->flags |= MONO_CFG_HAS_CALLS;
1665 mono_arch_emit_outarg_vt (MonoCompile *cfg, MonoInst *ins, MonoInst *src)
1667 MonoCallInst *call = (MonoCallInst*)ins->inst_p0;
1668 ArgInfo *ainfo = ins->inst_p1;
1669 int ovf_size = ainfo->vtsize;
1670 int doffset = ainfo->offset;
1671 int i, soffset, dreg;
1673 if (ainfo->regtype == RegTypeStructByVal) {
1680 * Darwin pinvokes needs some special handling for 1
1681 * and 2 byte arguments
1683 g_assert (ins->klass);
1684 if (call->signature->pinvoke)
1685 size = mono_class_native_size (ins->klass, NULL);
1686 if (size == 2 || size == 1) {
1687 int tmpr = mono_alloc_ireg (cfg);
1689 MONO_EMIT_NEW_LOAD_MEMBASE_OP (cfg, OP_LOADI1_MEMBASE, tmpr, src->dreg, soffset);
1691 MONO_EMIT_NEW_LOAD_MEMBASE_OP (cfg, OP_LOADI2_MEMBASE, tmpr, src->dreg, soffset);
1692 dreg = mono_alloc_ireg (cfg);
1693 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, dreg, tmpr);
1694 mono_call_inst_add_outarg_reg (cfg, call, dreg, ainfo->reg, FALSE);
1697 for (i = 0; i < ainfo->vtregs; ++i) {
1698 int antipadding = 0;
1701 antipadding = sizeof (gpointer) - ainfo->bytes;
1703 dreg = mono_alloc_ireg (cfg);
1704 MONO_EMIT_NEW_LOAD_MEMBASE (cfg, dreg, src->dreg, soffset);
1706 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SHR_UN_IMM, dreg, dreg, antipadding * 8);
1707 mono_call_inst_add_outarg_reg (cfg, call, dreg, ainfo->reg + i, FALSE);
1708 soffset += sizeof (gpointer);
1711 mini_emit_memcpy (cfg, ppc_r1, doffset + soffset, src->dreg, soffset, ovf_size * sizeof (gpointer), 0);
1712 } else if (ainfo->regtype == RegTypeFP) {
1713 int tmpr = mono_alloc_freg (cfg);
1714 if (ainfo->size == 4)
1715 MONO_EMIT_NEW_LOAD_MEMBASE_OP (cfg, OP_LOADR4_MEMBASE, tmpr, src->dreg, 0);
1717 MONO_EMIT_NEW_LOAD_MEMBASE_OP (cfg, OP_LOADR8_MEMBASE, tmpr, src->dreg, 0);
1718 dreg = mono_alloc_freg (cfg);
1719 MONO_EMIT_NEW_UNALU (cfg, OP_FMOVE, dreg, tmpr);
1720 mono_call_inst_add_outarg_reg (cfg, call, dreg, ainfo->reg, TRUE);
1722 MonoInst *vtcopy = mono_compile_create_var (cfg, &src->klass->byval_arg, OP_LOCAL);
1726 /* FIXME: alignment? */
1727 if (call->signature->pinvoke) {
1728 size = mono_type_native_stack_size (&src->klass->byval_arg, NULL);
1729 vtcopy->backend.is_pinvoke = 1;
1731 size = mini_type_stack_size (cfg->generic_sharing_context, &src->klass->byval_arg, NULL);
1734 g_assert (ovf_size > 0);
1736 EMIT_NEW_VARLOADA (cfg, load, vtcopy, vtcopy->inst_vtype);
1737 mini_emit_memcpy (cfg, load->dreg, 0, src->dreg, 0, size, 0);
1740 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORE_MEMBASE_REG, ppc_r1, ainfo->offset, load->dreg);
1742 mono_call_inst_add_outarg_reg (cfg, call, load->dreg, ainfo->reg, FALSE);
1747 mono_arch_emit_setret (MonoCompile *cfg, MonoMethod *method, MonoInst *val)
1749 MonoType *ret = mini_type_get_underlying_type (cfg->generic_sharing_context,
1750 mono_method_signature (method)->ret);
1753 #ifndef __mono_ppc64__
1754 if (ret->type == MONO_TYPE_I8 || ret->type == MONO_TYPE_U8) {
1757 MONO_INST_NEW (cfg, ins, OP_SETLRET);
1758 ins->sreg1 = val->dreg + 1;
1759 ins->sreg2 = val->dreg + 2;
1760 MONO_ADD_INS (cfg->cbb, ins);
1764 if (ret->type == MONO_TYPE_R8 || ret->type == MONO_TYPE_R4) {
1765 MONO_EMIT_NEW_UNALU (cfg, OP_FMOVE, cfg->ret->dreg, val->dreg);
1769 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, cfg->ret->dreg, val->dreg);
1772 /* FIXME: this is just a useless hint: fix the interface to include the opcode */
1774 mono_arch_is_inst_imm (gint64 imm)
1779 #endif /* DISABLE_JIT */
1782 * Allow tracing to work with this interface (with an optional argument)
1786 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
1790 ppc_load_ptr (code, ppc_r3, cfg->method);
1791 ppc_li (code, ppc_r4, 0); /* NULL ebp for now */
1792 ppc_load_func (code, ppc_r0, func);
1793 ppc_mtlr (code, ppc_r0);
1807 mono_arch_instrument_epilog_full (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments, gboolean preserve_argument_registers)
1810 int save_mode = SAVE_NONE;
1812 MonoMethod *method = cfg->method;
1813 int rtype = mini_type_get_underlying_type (cfg->generic_sharing_context,
1814 mono_method_signature (method)->ret)->type;
1815 int save_offset = PPC_STACK_PARAM_OFFSET + cfg->param_area;
1819 offset = code - cfg->native_code;
1820 /* we need about 16 instructions */
1821 if (offset > (cfg->code_size - 16 * 4)) {
1822 cfg->code_size *= 2;
1823 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
1824 code = cfg->native_code + offset;
1828 case MONO_TYPE_VOID:
1829 /* special case string .ctor icall */
1830 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
1831 save_mode = SAVE_ONE;
1833 save_mode = SAVE_NONE;
1835 #ifndef __mono_ppc64__
1838 save_mode = SAVE_TWO;
1843 save_mode = SAVE_FP;
1845 case MONO_TYPE_VALUETYPE:
1846 save_mode = SAVE_STRUCT;
1849 save_mode = SAVE_ONE;
1853 switch (save_mode) {
1855 ppc_stw (code, ppc_r3, save_offset, cfg->frame_reg);
1856 ppc_stw (code, ppc_r4, save_offset + 4, cfg->frame_reg);
1857 if (enable_arguments) {
1858 ppc_mr (code, ppc_r5, ppc_r4);
1859 ppc_mr (code, ppc_r4, ppc_r3);
1863 ppc_stptr (code, ppc_r3, save_offset, cfg->frame_reg);
1864 if (enable_arguments) {
1865 ppc_mr (code, ppc_r4, ppc_r3);
1869 ppc_stfd (code, ppc_f1, save_offset, cfg->frame_reg);
1870 if (enable_arguments) {
1871 /* FIXME: what reg? */
1872 ppc_fmr (code, ppc_f3, ppc_f1);
1873 /* FIXME: use 8 byte load on PPC64 */
1874 ppc_lwz (code, ppc_r4, save_offset, cfg->frame_reg);
1875 ppc_lwz (code, ppc_r5, save_offset + 4, cfg->frame_reg);
1879 if (enable_arguments) {
1880 /* FIXME: get the actual address */
1881 ppc_mr (code, ppc_r4, ppc_r3);
1889 ppc_load_ptr (code, ppc_r3, cfg->method);
1890 ppc_load_func (code, ppc_r0, func);
1891 ppc_mtlr (code, ppc_r0);
1894 switch (save_mode) {
1896 ppc_lwz (code, ppc_r3, save_offset, cfg->frame_reg);
1897 ppc_lwz (code, ppc_r4, save_offset + 4, cfg->frame_reg);
1900 ppc_ldptr (code, ppc_r3, save_offset, cfg->frame_reg);
1903 ppc_lfd (code, ppc_f1, save_offset, cfg->frame_reg);
1913 * Conditional branches have a small offset, so if it is likely overflowed,
1914 * we do a branch to the end of the method (uncond branches have much larger
1915 * offsets) where we perform the conditional and jump back unconditionally.
1916 * It's slightly slower, since we add two uncond branches, but it's very simple
1917 * with the current patch implementation and such large methods are likely not
1918 * going to be perf critical anyway.
1923 const char *exception;
1930 #define EMIT_COND_BRANCH_FLAGS(ins,b0,b1) \
1931 if (0 && ins->inst_true_bb->native_offset) { \
1932 ppc_bc (code, (b0), (b1), (code - cfg->native_code + ins->inst_true_bb->native_offset) & 0xffff); \
1934 int br_disp = ins->inst_true_bb->max_offset - offset; \
1935 if (!ppc_is_imm16 (br_disp + 1024) || ! ppc_is_imm16 (ppc_is_imm16 (br_disp - 1024))) { \
1936 MonoOvfJump *ovfj = mono_mempool_alloc (cfg->mempool, sizeof (MonoOvfJump)); \
1937 ovfj->data.bb = ins->inst_true_bb; \
1938 ovfj->ip_offset = 0; \
1939 ovfj->b0_cond = (b0); \
1940 ovfj->b1_cond = (b1); \
1941 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB_OVF, ovfj); \
1944 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1945 ppc_bc (code, (b0), (b1), 0); \
1949 #define EMIT_COND_BRANCH(ins,cond) EMIT_COND_BRANCH_FLAGS(ins, branch_b0_table [(cond)], branch_b1_table [(cond)])
1951 /* emit an exception if condition is fail
1953 * We assign the extra code used to throw the implicit exceptions
1954 * to cfg->bb_exit as far as the big branch handling is concerned
1956 #define EMIT_COND_SYSTEM_EXCEPTION_FLAGS(b0,b1,exc_name) \
1958 int br_disp = cfg->bb_exit->max_offset - offset; \
1959 if (!ppc_is_imm16 (br_disp + 1024) || ! ppc_is_imm16 (ppc_is_imm16 (br_disp - 1024))) { \
1960 MonoOvfJump *ovfj = mono_mempool_alloc (cfg->mempool, sizeof (MonoOvfJump)); \
1961 ovfj->data.exception = (exc_name); \
1962 ovfj->ip_offset = code - cfg->native_code; \
1963 ovfj->b0_cond = (b0); \
1964 ovfj->b1_cond = (b1); \
1965 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC_OVF, ovfj); \
1967 cfg->bb_exit->max_offset += 24; \
1969 mono_add_patch_info (cfg, code - cfg->native_code, \
1970 MONO_PATCH_INFO_EXC, exc_name); \
1971 ppc_bcl (code, (b0), (b1), 0); \
1975 #define EMIT_COND_SYSTEM_EXCEPTION(cond,exc_name) EMIT_COND_SYSTEM_EXCEPTION_FLAGS(branch_b0_table [(cond)], branch_b1_table [(cond)], (exc_name))
1978 mono_arch_peephole_pass_1 (MonoCompile *cfg, MonoBasicBlock *bb)
1983 normalize_opcode (int opcode)
1986 #ifndef __mono_ilp32__
1987 case MONO_PPC_32_64_CASE (OP_LOADI4_MEMBASE, OP_LOADI8_MEMBASE):
1988 return OP_LOAD_MEMBASE;
1989 case MONO_PPC_32_64_CASE (OP_LOADI4_MEMINDEX, OP_LOADI8_MEMINDEX):
1990 return OP_LOAD_MEMINDEX;
1991 case MONO_PPC_32_64_CASE (OP_STOREI4_MEMBASE_REG, OP_STOREI8_MEMBASE_REG):
1992 return OP_STORE_MEMBASE_REG;
1993 case MONO_PPC_32_64_CASE (OP_STOREI4_MEMBASE_IMM, OP_STOREI8_MEMBASE_IMM):
1994 return OP_STORE_MEMBASE_IMM;
1995 case MONO_PPC_32_64_CASE (OP_STOREI4_MEMINDEX, OP_STOREI8_MEMINDEX):
1996 return OP_STORE_MEMINDEX;
1998 case MONO_PPC_32_64_CASE (OP_ISHR_IMM, OP_LSHR_IMM):
2000 case MONO_PPC_32_64_CASE (OP_ISHR_UN_IMM, OP_LSHR_UN_IMM):
2001 return OP_SHR_UN_IMM;
2008 mono_arch_peephole_pass_2 (MonoCompile *cfg, MonoBasicBlock *bb)
2010 MonoInst *ins, *n, *last_ins = NULL;
2012 MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
2013 switch (normalize_opcode (ins->opcode)) {
2015 /* remove unnecessary multiplication with 1 */
2016 if (ins->inst_imm == 1) {
2017 if (ins->dreg != ins->sreg1) {
2018 ins->opcode = OP_MOVE;
2020 MONO_DELETE_INS (bb, ins);
2024 int power2 = mono_is_power_of_two (ins->inst_imm);
2026 ins->opcode = OP_SHL_IMM;
2027 ins->inst_imm = power2;
2031 case OP_LOAD_MEMBASE:
2033 * OP_STORE_MEMBASE_REG reg, offset(basereg)
2034 * OP_LOAD_MEMBASE offset(basereg), reg
2036 if (last_ins && normalize_opcode (last_ins->opcode) == OP_STORE_MEMBASE_REG &&
2037 ins->inst_basereg == last_ins->inst_destbasereg &&
2038 ins->inst_offset == last_ins->inst_offset) {
2039 if (ins->dreg == last_ins->sreg1) {
2040 MONO_DELETE_INS (bb, ins);
2043 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
2044 ins->opcode = OP_MOVE;
2045 ins->sreg1 = last_ins->sreg1;
2049 * Note: reg1 must be different from the basereg in the second load
2050 * OP_LOAD_MEMBASE offset(basereg), reg1
2051 * OP_LOAD_MEMBASE offset(basereg), reg2
2053 * OP_LOAD_MEMBASE offset(basereg), reg1
2054 * OP_MOVE reg1, reg2
2056 } else if (last_ins && normalize_opcode (last_ins->opcode) == OP_LOAD_MEMBASE &&
2057 ins->inst_basereg != last_ins->dreg &&
2058 ins->inst_basereg == last_ins->inst_basereg &&
2059 ins->inst_offset == last_ins->inst_offset) {
2061 if (ins->dreg == last_ins->dreg) {
2062 MONO_DELETE_INS (bb, ins);
2065 ins->opcode = OP_MOVE;
2066 ins->sreg1 = last_ins->dreg;
2069 //g_assert_not_reached ();
2073 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
2074 * OP_LOAD_MEMBASE offset(basereg), reg
2076 * OP_STORE_MEMBASE_IMM imm, offset(basereg)
2077 * OP_ICONST reg, imm
2079 } else if (last_ins && normalize_opcode (last_ins->opcode) == OP_STORE_MEMBASE_IMM &&
2080 ins->inst_basereg == last_ins->inst_destbasereg &&
2081 ins->inst_offset == last_ins->inst_offset) {
2082 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
2083 ins->opcode = OP_ICONST;
2084 ins->inst_c0 = last_ins->inst_imm;
2085 g_assert_not_reached (); // check this rule
2089 case OP_LOADU1_MEMBASE:
2090 case OP_LOADI1_MEMBASE:
2091 if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
2092 ins->inst_basereg == last_ins->inst_destbasereg &&
2093 ins->inst_offset == last_ins->inst_offset) {
2094 ins->opcode = (ins->opcode == OP_LOADI1_MEMBASE) ? OP_ICONV_TO_I1 : OP_ICONV_TO_U1;
2095 ins->sreg1 = last_ins->sreg1;
2098 case OP_LOADU2_MEMBASE:
2099 case OP_LOADI2_MEMBASE:
2100 if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
2101 ins->inst_basereg == last_ins->inst_destbasereg &&
2102 ins->inst_offset == last_ins->inst_offset) {
2103 ins->opcode = (ins->opcode == OP_LOADI2_MEMBASE) ? OP_ICONV_TO_I2 : OP_ICONV_TO_U2;
2104 ins->sreg1 = last_ins->sreg1;
2107 #ifdef __mono_ppc64__
2108 case OP_LOADU4_MEMBASE:
2109 case OP_LOADI4_MEMBASE:
2110 if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG) &&
2111 ins->inst_basereg == last_ins->inst_destbasereg &&
2112 ins->inst_offset == last_ins->inst_offset) {
2113 ins->opcode = (ins->opcode == OP_LOADI4_MEMBASE) ? OP_ICONV_TO_I4 : OP_ICONV_TO_U4;
2114 ins->sreg1 = last_ins->sreg1;
2119 ins->opcode = OP_MOVE;
2123 if (ins->dreg == ins->sreg1) {
2124 MONO_DELETE_INS (bb, ins);
2128 * OP_MOVE sreg, dreg
2129 * OP_MOVE dreg, sreg
2131 if (last_ins && last_ins->opcode == OP_MOVE &&
2132 ins->sreg1 == last_ins->dreg &&
2133 ins->dreg == last_ins->sreg1) {
2134 MONO_DELETE_INS (bb, ins);
2142 bb->last_ins = last_ins;
2146 mono_arch_decompose_opts (MonoCompile *cfg, MonoInst *ins)
2148 switch (ins->opcode) {
2149 case OP_ICONV_TO_R_UN: {
2150 #if G_BYTE_ORDER == G_BIG_ENDIAN
2151 static const guint64 adjust_val = 0x4330000000000000ULL;
2153 static const guint64 adjust_val = 0x0000000000003043ULL;
2155 int msw_reg = mono_alloc_ireg (cfg);
2156 int adj_reg = mono_alloc_freg (cfg);
2157 int tmp_reg = mono_alloc_freg (cfg);
2158 int basereg = ppc_sp;
2160 MONO_EMIT_NEW_ICONST (cfg, msw_reg, 0x43300000);
2161 if (!ppc_is_imm16 (offset + 4)) {
2162 basereg = mono_alloc_ireg (cfg);
2163 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_IADD_IMM, basereg, cfg->frame_reg, offset);
2165 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, basereg, offset, msw_reg);
2166 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, basereg, offset + 4, ins->sreg1);
2167 MONO_EMIT_NEW_LOAD_R8 (cfg, adj_reg, &adjust_val);
2168 MONO_EMIT_NEW_LOAD_MEMBASE_OP (cfg, OP_LOADR8_MEMBASE, tmp_reg, basereg, offset);
2169 MONO_EMIT_NEW_BIALU (cfg, OP_FSUB, ins->dreg, tmp_reg, adj_reg);
2170 ins->opcode = OP_NOP;
2173 #ifndef __mono_ppc64__
2174 case OP_ICONV_TO_R4:
2175 case OP_ICONV_TO_R8: {
2176 /* If we have a PPC_FEATURE_64 machine we can avoid
2177 this and use the fcfid instruction. Otherwise
2178 on an old 32-bit chip and we have to do this the
2180 if (!(cpu_hw_caps & PPC_ISA_64)) {
2181 /* FIXME: change precision for CEE_CONV_R4 */
2182 static const guint64 adjust_val = 0x4330000080000000ULL;
2183 int msw_reg = mono_alloc_ireg (cfg);
2184 int xored = mono_alloc_ireg (cfg);
2185 int adj_reg = mono_alloc_freg (cfg);
2186 int tmp_reg = mono_alloc_freg (cfg);
2187 int basereg = ppc_sp;
2189 if (!ppc_is_imm16 (offset + 4)) {
2190 basereg = mono_alloc_ireg (cfg);
2191 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_IADD_IMM, basereg, cfg->frame_reg, offset);
2193 MONO_EMIT_NEW_ICONST (cfg, msw_reg, 0x43300000);
2194 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, basereg, offset, msw_reg);
2195 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_XOR_IMM, xored, ins->sreg1, 0x80000000);
2196 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, basereg, offset + 4, xored);
2197 MONO_EMIT_NEW_LOAD_R8 (cfg, adj_reg, (gpointer)&adjust_val);
2198 MONO_EMIT_NEW_LOAD_MEMBASE_OP (cfg, OP_LOADR8_MEMBASE, tmp_reg, basereg, offset);
2199 MONO_EMIT_NEW_BIALU (cfg, OP_FSUB, ins->dreg, tmp_reg, adj_reg);
2200 if (ins->opcode == OP_ICONV_TO_R4)
2201 MONO_EMIT_NEW_UNALU (cfg, OP_FCONV_TO_R4, ins->dreg, ins->dreg);
2202 ins->opcode = OP_NOP;
2208 int msw_reg = mono_alloc_ireg (cfg);
2209 int basereg = ppc_sp;
2211 if (!ppc_is_imm16 (offset + 4)) {
2212 basereg = mono_alloc_ireg (cfg);
2213 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_IADD_IMM, basereg, cfg->frame_reg, offset);
2215 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORER8_MEMBASE_REG, basereg, offset, ins->sreg1);
2216 MONO_EMIT_NEW_LOAD_MEMBASE_OP (cfg, OP_LOADI4_MEMBASE, msw_reg, basereg, offset);
2217 MONO_EMIT_NEW_UNALU (cfg, OP_CHECK_FINITE, -1, msw_reg);
2218 MONO_EMIT_NEW_UNALU (cfg, OP_FMOVE, ins->dreg, ins->sreg1);
2219 ins->opcode = OP_NOP;
2222 #ifdef __mono_ppc64__
2224 case OP_IADD_OVF_UN:
2226 int shifted1_reg = mono_alloc_ireg (cfg);
2227 int shifted2_reg = mono_alloc_ireg (cfg);
2228 int result_shifted_reg = mono_alloc_ireg (cfg);
2230 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SHL_IMM, shifted1_reg, ins->sreg1, 32);
2231 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SHL_IMM, shifted2_reg, ins->sreg2, 32);
2232 MONO_EMIT_NEW_BIALU (cfg, ins->opcode, result_shifted_reg, shifted1_reg, shifted2_reg);
2233 if (ins->opcode == OP_IADD_OVF_UN)
2234 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SHR_UN_IMM, ins->dreg, result_shifted_reg, 32);
2236 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_SHR_IMM, ins->dreg, result_shifted_reg, 32);
2237 ins->opcode = OP_NOP;
2244 mono_arch_decompose_long_opts (MonoCompile *cfg, MonoInst *ins)
2246 switch (ins->opcode) {
2248 /* ADC sets the condition code */
2249 MONO_EMIT_NEW_BIALU (cfg, OP_ADDCC, ins->dreg + 1, ins->sreg1 + 1, ins->sreg2 + 1);
2250 MONO_EMIT_NEW_BIALU (cfg, OP_ADD_OVF_CARRY, ins->dreg + 2, ins->sreg1 + 2, ins->sreg2 + 2);
2253 case OP_LADD_OVF_UN:
2254 /* ADC sets the condition code */
2255 MONO_EMIT_NEW_BIALU (cfg, OP_ADDCC, ins->dreg + 1, ins->sreg1 + 1, ins->sreg2 + 1);
2256 MONO_EMIT_NEW_BIALU (cfg, OP_ADD_OVF_UN_CARRY, ins->dreg + 2, ins->sreg1 + 2, ins->sreg2 + 2);
2260 /* SBB sets the condition code */
2261 MONO_EMIT_NEW_BIALU (cfg, OP_SUBCC, ins->dreg + 1, ins->sreg1 + 1, ins->sreg2 + 1);
2262 MONO_EMIT_NEW_BIALU (cfg, OP_SUB_OVF_CARRY, ins->dreg + 2, ins->sreg1 + 2, ins->sreg2 + 2);
2265 case OP_LSUB_OVF_UN:
2266 /* SBB sets the condition code */
2267 MONO_EMIT_NEW_BIALU (cfg, OP_SUBCC, ins->dreg + 1, ins->sreg1 + 1, ins->sreg2 + 1);
2268 MONO_EMIT_NEW_BIALU (cfg, OP_SUB_OVF_UN_CARRY, ins->dreg + 2, ins->sreg1 + 2, ins->sreg2 + 2);
2272 /* From gcc generated code */
2273 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_PPC_SUBFIC, ins->dreg + 1, ins->sreg1 + 1, 0);
2274 MONO_EMIT_NEW_UNALU (cfg, OP_PPC_SUBFZE, ins->dreg + 2, ins->sreg1 + 2);
2283 * the branch_b0_table should maintain the order of these
2297 branch_b0_table [] = {
2312 branch_b1_table [] = {
2326 #define NEW_INS(cfg,dest,op) do { \
2327 MONO_INST_NEW((cfg), (dest), (op)); \
2328 mono_bblock_insert_after_ins (bb, last_ins, (dest)); \
2332 map_to_reg_reg_op (int op)
2341 case OP_COMPARE_IMM:
2343 case OP_ICOMPARE_IMM:
2345 case OP_LCOMPARE_IMM:
2361 case OP_LOAD_MEMBASE:
2362 return OP_LOAD_MEMINDEX;
2363 case OP_LOADI4_MEMBASE:
2364 return OP_LOADI4_MEMINDEX;
2365 case OP_LOADU4_MEMBASE:
2366 return OP_LOADU4_MEMINDEX;
2367 case OP_LOADI8_MEMBASE:
2368 return OP_LOADI8_MEMINDEX;
2369 case OP_LOADU1_MEMBASE:
2370 return OP_LOADU1_MEMINDEX;
2371 case OP_LOADI2_MEMBASE:
2372 return OP_LOADI2_MEMINDEX;
2373 case OP_LOADU2_MEMBASE:
2374 return OP_LOADU2_MEMINDEX;
2375 case OP_LOADI1_MEMBASE:
2376 return OP_LOADI1_MEMINDEX;
2377 case OP_LOADR4_MEMBASE:
2378 return OP_LOADR4_MEMINDEX;
2379 case OP_LOADR8_MEMBASE:
2380 return OP_LOADR8_MEMINDEX;
2381 case OP_STOREI1_MEMBASE_REG:
2382 return OP_STOREI1_MEMINDEX;
2383 case OP_STOREI2_MEMBASE_REG:
2384 return OP_STOREI2_MEMINDEX;
2385 case OP_STOREI4_MEMBASE_REG:
2386 return OP_STOREI4_MEMINDEX;
2387 case OP_STOREI8_MEMBASE_REG:
2388 return OP_STOREI8_MEMINDEX;
2389 case OP_STORE_MEMBASE_REG:
2390 return OP_STORE_MEMINDEX;
2391 case OP_STORER4_MEMBASE_REG:
2392 return OP_STORER4_MEMINDEX;
2393 case OP_STORER8_MEMBASE_REG:
2394 return OP_STORER8_MEMINDEX;
2395 case OP_STORE_MEMBASE_IMM:
2396 return OP_STORE_MEMBASE_REG;
2397 case OP_STOREI1_MEMBASE_IMM:
2398 return OP_STOREI1_MEMBASE_REG;
2399 case OP_STOREI2_MEMBASE_IMM:
2400 return OP_STOREI2_MEMBASE_REG;
2401 case OP_STOREI4_MEMBASE_IMM:
2402 return OP_STOREI4_MEMBASE_REG;
2403 case OP_STOREI8_MEMBASE_IMM:
2404 return OP_STOREI8_MEMBASE_REG;
2406 return mono_op_imm_to_op (op);
2409 //#define map_to_reg_reg_op(op) (cfg->new_ir? mono_op_imm_to_op (op): map_to_reg_reg_op (op))
2411 #define compare_opcode_is_unsigned(opcode) \
2412 (((opcode) >= CEE_BNE_UN && (opcode) <= CEE_BLT_UN) || \
2413 ((opcode) >= OP_IBNE_UN && (opcode) <= OP_IBLT_UN) || \
2414 ((opcode) >= OP_LBNE_UN && (opcode) <= OP_LBLT_UN) || \
2415 ((opcode) >= OP_COND_EXC_NE_UN && (opcode) <= OP_COND_EXC_LT_UN) || \
2416 ((opcode) >= OP_COND_EXC_INE_UN && (opcode) <= OP_COND_EXC_ILT_UN) || \
2417 ((opcode) == OP_CLT_UN || (opcode) == OP_CGT_UN || \
2418 (opcode) == OP_ICLT_UN || (opcode) == OP_ICGT_UN || \
2419 (opcode) == OP_LCLT_UN || (opcode) == OP_LCGT_UN))
2422 * Remove from the instruction list the instructions that can't be
2423 * represented with very simple instructions with no register
2427 mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
2429 MonoInst *ins, *next, *temp, *last_ins = NULL;
2432 MONO_BB_FOR_EACH_INS (bb, ins) {
2434 switch (ins->opcode) {
2435 case OP_IDIV_UN_IMM:
2438 case OP_IREM_UN_IMM:
2439 CASE_PPC64 (OP_LREM_IMM) {
2440 NEW_INS (cfg, temp, OP_ICONST);
2441 temp->inst_c0 = ins->inst_imm;
2442 temp->dreg = mono_alloc_ireg (cfg);
2443 ins->sreg2 = temp->dreg;
2444 if (ins->opcode == OP_IDIV_IMM)
2445 ins->opcode = OP_IDIV;
2446 else if (ins->opcode == OP_IREM_IMM)
2447 ins->opcode = OP_IREM;
2448 else if (ins->opcode == OP_IDIV_UN_IMM)
2449 ins->opcode = OP_IDIV_UN;
2450 else if (ins->opcode == OP_IREM_UN_IMM)
2451 ins->opcode = OP_IREM_UN;
2452 else if (ins->opcode == OP_LREM_IMM)
2453 ins->opcode = OP_LREM;
2455 /* handle rem separately */
2460 CASE_PPC64 (OP_LREM)
2461 CASE_PPC64 (OP_LREM_UN) {
2463 /* we change a rem dest, src1, src2 to
2464 * div temp1, src1, src2
2465 * mul temp2, temp1, src2
2466 * sub dest, src1, temp2
2468 if (ins->opcode == OP_IREM || ins->opcode == OP_IREM_UN) {
2469 NEW_INS (cfg, mul, OP_IMUL);
2470 NEW_INS (cfg, temp, ins->opcode == OP_IREM? OP_IDIV: OP_IDIV_UN);
2471 ins->opcode = OP_ISUB;
2473 NEW_INS (cfg, mul, OP_LMUL);
2474 NEW_INS (cfg, temp, ins->opcode == OP_LREM? OP_LDIV: OP_LDIV_UN);
2475 ins->opcode = OP_LSUB;
2477 temp->sreg1 = ins->sreg1;
2478 temp->sreg2 = ins->sreg2;
2479 temp->dreg = mono_alloc_ireg (cfg);
2480 mul->sreg1 = temp->dreg;
2481 mul->sreg2 = ins->sreg2;
2482 mul->dreg = mono_alloc_ireg (cfg);
2483 ins->sreg2 = mul->dreg;
2487 CASE_PPC64 (OP_LADD_IMM)
2490 if (!ppc_is_imm16 (ins->inst_imm)) {
2491 NEW_INS (cfg, temp, OP_ICONST);
2492 temp->inst_c0 = ins->inst_imm;
2493 temp->dreg = mono_alloc_ireg (cfg);
2494 ins->sreg2 = temp->dreg;
2495 ins->opcode = map_to_reg_reg_op (ins->opcode);
2499 CASE_PPC64 (OP_LSUB_IMM)
2501 if (!ppc_is_imm16 (-ins->inst_imm)) {
2502 NEW_INS (cfg, temp, OP_ICONST);
2503 temp->inst_c0 = ins->inst_imm;
2504 temp->dreg = mono_alloc_ireg (cfg);
2505 ins->sreg2 = temp->dreg;
2506 ins->opcode = map_to_reg_reg_op (ins->opcode);
2518 gboolean is_imm = ((ins->inst_imm & 0xffff0000) && (ins->inst_imm & 0xffff));
2519 #ifdef __mono_ppc64__
2520 if (ins->inst_imm & 0xffffffff00000000ULL)
2524 NEW_INS (cfg, temp, OP_ICONST);
2525 temp->inst_c0 = ins->inst_imm;
2526 temp->dreg = mono_alloc_ireg (cfg);
2527 ins->sreg2 = temp->dreg;
2528 ins->opcode = map_to_reg_reg_op (ins->opcode);
2537 NEW_INS (cfg, temp, OP_ICONST);
2538 temp->inst_c0 = ins->inst_imm;
2539 temp->dreg = mono_alloc_ireg (cfg);
2540 ins->sreg2 = temp->dreg;
2541 ins->opcode = map_to_reg_reg_op (ins->opcode);
2543 case OP_COMPARE_IMM:
2544 case OP_ICOMPARE_IMM:
2545 CASE_PPC64 (OP_LCOMPARE_IMM)
2547 /* Branch opts can eliminate the branch */
2548 if (!next || (!(MONO_IS_COND_BRANCH_OP (next) || MONO_IS_COND_EXC (next) || MONO_IS_SETCC (next)))) {
2549 ins->opcode = OP_NOP;
2553 if (compare_opcode_is_unsigned (next->opcode)) {
2554 if (!ppc_is_uimm16 (ins->inst_imm)) {
2555 NEW_INS (cfg, temp, OP_ICONST);
2556 temp->inst_c0 = ins->inst_imm;
2557 temp->dreg = mono_alloc_ireg (cfg);
2558 ins->sreg2 = temp->dreg;
2559 ins->opcode = map_to_reg_reg_op (ins->opcode);
2562 if (!ppc_is_imm16 (ins->inst_imm)) {
2563 NEW_INS (cfg, temp, OP_ICONST);
2564 temp->inst_c0 = ins->inst_imm;
2565 temp->dreg = mono_alloc_ireg (cfg);
2566 ins->sreg2 = temp->dreg;
2567 ins->opcode = map_to_reg_reg_op (ins->opcode);
2573 if (ins->inst_imm == 1) {
2574 ins->opcode = OP_MOVE;
2577 if (ins->inst_imm == 0) {
2578 ins->opcode = OP_ICONST;
2582 imm = mono_is_power_of_two (ins->inst_imm);
2584 ins->opcode = OP_SHL_IMM;
2585 ins->inst_imm = imm;
2588 if (!ppc_is_imm16 (ins->inst_imm)) {
2589 NEW_INS (cfg, temp, OP_ICONST);
2590 temp->inst_c0 = ins->inst_imm;
2591 temp->dreg = mono_alloc_ireg (cfg);
2592 ins->sreg2 = temp->dreg;
2593 ins->opcode = map_to_reg_reg_op (ins->opcode);
2596 case OP_LOCALLOC_IMM:
2597 NEW_INS (cfg, temp, OP_ICONST);
2598 temp->inst_c0 = ins->inst_imm;
2599 temp->dreg = mono_alloc_ireg (cfg);
2600 ins->sreg1 = temp->dreg;
2601 ins->opcode = OP_LOCALLOC;
2603 case OP_LOAD_MEMBASE:
2604 case OP_LOADI4_MEMBASE:
2605 CASE_PPC64 (OP_LOADI8_MEMBASE)
2606 case OP_LOADU4_MEMBASE:
2607 case OP_LOADI2_MEMBASE:
2608 case OP_LOADU2_MEMBASE:
2609 case OP_LOADI1_MEMBASE:
2610 case OP_LOADU1_MEMBASE:
2611 case OP_LOADR4_MEMBASE:
2612 case OP_LOADR8_MEMBASE:
2613 case OP_STORE_MEMBASE_REG:
2614 CASE_PPC64 (OP_STOREI8_MEMBASE_REG)
2615 case OP_STOREI4_MEMBASE_REG:
2616 case OP_STOREI2_MEMBASE_REG:
2617 case OP_STOREI1_MEMBASE_REG:
2618 case OP_STORER4_MEMBASE_REG:
2619 case OP_STORER8_MEMBASE_REG:
2620 /* we can do two things: load the immed in a register
2621 * and use an indexed load, or see if the immed can be
2622 * represented as an ad_imm + a load with a smaller offset
2623 * that fits. We just do the first for now, optimize later.
2625 if (ppc_is_imm16 (ins->inst_offset))
2627 NEW_INS (cfg, temp, OP_ICONST);
2628 temp->inst_c0 = ins->inst_offset;
2629 temp->dreg = mono_alloc_ireg (cfg);
2630 ins->sreg2 = temp->dreg;
2631 ins->opcode = map_to_reg_reg_op (ins->opcode);
2633 case OP_STORE_MEMBASE_IMM:
2634 case OP_STOREI1_MEMBASE_IMM:
2635 case OP_STOREI2_MEMBASE_IMM:
2636 case OP_STOREI4_MEMBASE_IMM:
2637 CASE_PPC64 (OP_STOREI8_MEMBASE_IMM)
2638 NEW_INS (cfg, temp, OP_ICONST);
2639 temp->inst_c0 = ins->inst_imm;
2640 temp->dreg = mono_alloc_ireg (cfg);
2641 ins->sreg1 = temp->dreg;
2642 ins->opcode = map_to_reg_reg_op (ins->opcode);
2644 goto loop_start; /* make it handle the possibly big ins->inst_offset */
2647 if (cfg->compile_aot) {
2648 /* Keep these in the aot case */
2651 NEW_INS (cfg, temp, OP_ICONST);
2652 temp->inst_c0 = (gulong)ins->inst_p0;
2653 temp->dreg = mono_alloc_ireg (cfg);
2654 ins->inst_basereg = temp->dreg;
2655 ins->inst_offset = 0;
2656 ins->opcode = ins->opcode == OP_R4CONST? OP_LOADR4_MEMBASE: OP_LOADR8_MEMBASE;
2658 /* make it handle the possibly big ins->inst_offset
2659 * later optimize to use lis + load_membase
2665 bb->last_ins = last_ins;
2666 bb->max_vreg = cfg->next_vreg;
2670 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int sreg, int size, gboolean is_signed)
2672 long offset = cfg->arch.fp_conv_var_offset;
2674 /* sreg is a float, dreg is an integer reg. ppc_f0 is used a scratch */
2675 #ifdef __mono_ppc64__
2677 ppc_fctidz (code, ppc_f0, sreg);
2682 ppc_fctiwz (code, ppc_f0, sreg);
2685 if (ppc_is_imm16 (offset + sub_offset)) {
2686 ppc_stfd (code, ppc_f0, offset, cfg->frame_reg);
2688 ppc_ldr (code, dreg, offset + sub_offset, cfg->frame_reg);
2690 ppc_lwz (code, dreg, offset + sub_offset, cfg->frame_reg);
2692 ppc_load (code, dreg, offset);
2693 ppc_add (code, dreg, dreg, cfg->frame_reg);
2694 ppc_stfd (code, ppc_f0, 0, dreg);
2696 ppc_ldr (code, dreg, sub_offset, dreg);
2698 ppc_lwz (code, dreg, sub_offset, dreg);
2702 ppc_andid (code, dreg, dreg, 0xff);
2704 ppc_andid (code, dreg, dreg, 0xffff);
2705 #ifdef __mono_ppc64__
2707 ppc_clrldi (code, dreg, dreg, 32);
2711 ppc_extsb (code, dreg, dreg);
2713 ppc_extsh (code, dreg, dreg);
2714 #ifdef __mono_ppc64__
2716 ppc_extsw (code, dreg, dreg);
2724 const guchar *target;
2729 #define is_call_imm(diff) ((glong)(diff) >= -33554432 && (glong)(diff) <= 33554431)
2732 search_thunk_slot (void *data, int csize, int bsize, void *user_data) {
2733 #ifdef __mono_ppc64__
2734 g_assert_not_reached ();
2736 PatchData *pdata = (PatchData*)user_data;
2737 guchar *code = data;
2738 guint32 *thunks = data;
2739 guint32 *endthunks = (guint32*)(code + bsize);
2743 int difflow, diffhigh;
2745 /* always ensure a call from pdata->code can reach to the thunks without further thunks */
2746 difflow = (char*)pdata->code - (char*)thunks;
2747 diffhigh = (char*)pdata->code - (char*)endthunks;
2748 if (!((is_call_imm (thunks) && is_call_imm (endthunks)) || (is_call_imm (difflow) && is_call_imm (diffhigh))))
2751 templ = (guchar*)load;
2752 ppc_load_sequence (templ, ppc_r0, pdata->target);
2754 //g_print ("thunk nentries: %d\n", ((char*)endthunks - (char*)thunks)/16);
2755 if ((pdata->found == 2) || (pdata->code >= code && pdata->code <= code + csize)) {
2756 while (thunks < endthunks) {
2757 //g_print ("looking for target: %p at %p (%08x-%08x)\n", pdata->target, thunks, thunks [0], thunks [1]);
2758 if ((thunks [0] == load [0]) && (thunks [1] == load [1])) {
2759 ppc_patch (pdata->code, (guchar*)thunks);
2762 static int num_thunks = 0;
2764 if ((num_thunks % 20) == 0)
2765 g_print ("num_thunks lookup: %d\n", num_thunks);
2768 } else if ((thunks [0] == 0) && (thunks [1] == 0)) {
2769 /* found a free slot instead: emit thunk */
2770 code = (guchar*)thunks;
2771 ppc_lis (code, ppc_r0, (gulong)(pdata->target) >> 16);
2772 ppc_ori (code, ppc_r0, ppc_r0, (gulong)(pdata->target) & 0xffff);
2773 ppc_mtctr (code, ppc_r0);
2774 ppc_bcctr (code, PPC_BR_ALWAYS, 0);
2775 mono_arch_flush_icache ((guchar*)thunks, 16);
2777 ppc_patch (pdata->code, (guchar*)thunks);
2780 static int num_thunks = 0;
2782 if ((num_thunks % 20) == 0)
2783 g_print ("num_thunks: %d\n", num_thunks);
2787 /* skip 16 bytes, the size of the thunk */
2791 //g_print ("failed thunk lookup for %p from %p at %p (%d entries)\n", pdata->target, pdata->code, data, count);
2798 handle_thunk (int absolute, guchar *code, const guchar *target) {
2799 MonoDomain *domain = mono_domain_get ();
2803 pdata.target = target;
2804 pdata.absolute = absolute;
2807 mono_domain_lock (domain);
2808 mono_domain_code_foreach (domain, search_thunk_slot, &pdata);
2811 /* this uses the first available slot */
2813 mono_domain_code_foreach (domain, search_thunk_slot, &pdata);
2815 mono_domain_unlock (domain);
2817 if (pdata.found != 1)
2818 g_print ("thunk failed for %p from %p\n", target, code);
2819 g_assert (pdata.found == 1);
2823 patch_ins (guint8 *code, guint32 ins)
2825 *(guint32*)code = GUINT32_TO_BE (ins);
2826 mono_arch_flush_icache (code, 4);
2830 ppc_patch_full (guchar *code, const guchar *target, gboolean is_fd)
2832 guint32 ins = GUINT32_FROM_BE (*(guint32*)code);
2833 guint32 prim = ins >> 26;
2836 //g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
2838 // prefer relative branches, they are more position independent (e.g. for AOT compilation).
2839 gint diff = target - code;
2842 if (diff <= 33554431){
2843 ins = (18 << 26) | (diff) | (ins & 1);
2844 patch_ins (code, ins);
2848 /* diff between 0 and -33554432 */
2849 if (diff >= -33554432){
2850 ins = (18 << 26) | (diff & ~0xfc000000) | (ins & 1);
2851 patch_ins (code, ins);
2856 if ((glong)target >= 0){
2857 if ((glong)target <= 33554431){
2858 ins = (18 << 26) | ((gulong) target) | (ins & 1) | 2;
2859 patch_ins (code, ins);
2863 if ((glong)target >= -33554432){
2864 ins = (18 << 26) | (((gulong)target) & ~0xfc000000) | (ins & 1) | 2;
2865 patch_ins (code, ins);
2870 handle_thunk (TRUE, code, target);
2873 g_assert_not_reached ();
2881 guint32 li = (gulong)target;
2882 ins = (ins & 0xffff0000) | (ins & 3);
2883 ovf = li & 0xffff0000;
2884 if (ovf != 0 && ovf != 0xffff0000)
2885 g_assert_not_reached ();
2888 // FIXME: assert the top bits of li are 0
2890 gint diff = target - code;
2891 ins = (ins & 0xffff0000) | (ins & 3);
2892 ovf = diff & 0xffff0000;
2893 if (ovf != 0 && ovf != 0xffff0000)
2894 g_assert_not_reached ();
2898 patch_ins (code, ins);
2902 if (prim == 15 || ins == 0x4e800021 || ins == 0x4e800020 || ins == 0x4e800420) {
2903 #ifdef __mono_ppc64__
2904 guint32 *seq = (guint32*)code;
2905 guint32 *branch_ins;
2907 /* the trampoline code will try to patch the blrl, blr, bcctr */
2908 if (ins == 0x4e800021 || ins == 0x4e800020 || ins == 0x4e800420) {
2910 if (ppc_is_load_op (seq [-3]) || ppc_opcode (seq [-3]) == 31) /* ld || lwz || mr */
2915 if (ppc_is_load_op (seq [5]) || ppc_opcode (seq [5]) == 31) /* ld || lwz || mr */
2916 branch_ins = seq + 8;
2918 branch_ins = seq + 6;
2921 seq = (guint32*)code;
2922 /* this is the lis/ori/sldi/oris/ori/(ld/ld|mr/nop)/mtlr/blrl sequence */
2923 g_assert (mono_ppc_is_direct_call_sequence (branch_ins));
2925 if (ppc_is_load_op (seq [5])) {
2926 g_assert (ppc_is_load_op (seq [6]));
2929 guint8 *buf = (guint8*)&seq [5];
2930 ppc_mr (buf, ppc_r0, ppc_r11);
2935 target = mono_get_addr_from_ftnptr ((gpointer)target);
2938 /* FIXME: make this thread safe */
2939 /* FIXME: we're assuming we're using r11 here */
2940 ppc_load_ptr_sequence (code, ppc_r11, target);
2941 mono_arch_flush_icache ((guint8*)seq, 28);
2944 /* the trampoline code will try to patch the blrl, blr, bcctr */
2945 if (ins == 0x4e800021 || ins == 0x4e800020 || ins == 0x4e800420) {
2948 /* this is the lis/ori/mtlr/blrl sequence */
2949 seq = (guint32*)code;
2950 g_assert ((seq [0] >> 26) == 15);
2951 g_assert ((seq [1] >> 26) == 24);
2952 g_assert ((seq [2] >> 26) == 31);
2953 g_assert (seq [3] == 0x4e800021 || seq [3] == 0x4e800020 || seq [3] == 0x4e800420);
2954 /* FIXME: make this thread safe */
2955 ppc_lis (code, ppc_r0, (guint32)(target) >> 16);
2956 ppc_ori (code, ppc_r0, ppc_r0, (guint32)(target) & 0xffff);
2957 mono_arch_flush_icache (code - 8, 8);
2960 g_assert_not_reached ();
2962 // g_print ("patched with 0x%08x\n", ins);
2966 ppc_patch (guchar *code, const guchar *target)
2968 ppc_patch_full (code, target, FALSE);
2972 mono_ppc_patch (guchar *code, const guchar *target)
2974 ppc_patch (code, target);
2978 emit_move_return_value (MonoCompile *cfg, MonoInst *ins, guint8 *code)
2980 switch (ins->opcode) {
2983 case OP_FCALL_MEMBASE:
2984 if (ins->dreg != ppc_f1)
2985 ppc_fmr (code, ins->dreg, ppc_f1);
2993 ins_native_length (MonoCompile *cfg, MonoInst *ins)
2995 return ((guint8 *)ins_get_spec (ins->opcode))[MONO_INST_LEN];
2999 emit_reserve_param_area (MonoCompile *cfg, guint8 *code)
3001 long size = cfg->param_area;
3003 size += MONO_ARCH_FRAME_ALIGNMENT - 1;
3004 size &= -MONO_ARCH_FRAME_ALIGNMENT;
3009 ppc_ldptr (code, ppc_r0, 0, ppc_sp);
3010 if (ppc_is_imm16 (-size)) {
3011 ppc_stptr_update (code, ppc_r0, -size, ppc_sp);
3013 ppc_load (code, ppc_r11, -size);
3014 ppc_stptr_update_indexed (code, ppc_r0, ppc_sp, ppc_r11);
3021 emit_unreserve_param_area (MonoCompile *cfg, guint8 *code)
3023 long size = cfg->param_area;
3025 size += MONO_ARCH_FRAME_ALIGNMENT - 1;
3026 size &= -MONO_ARCH_FRAME_ALIGNMENT;
3031 ppc_ldptr (code, ppc_r0, 0, ppc_sp);
3032 if (ppc_is_imm16 (size)) {
3033 ppc_stptr_update (code, ppc_r0, size, ppc_sp);
3035 ppc_load (code, ppc_r11, size);
3036 ppc_stptr_update_indexed (code, ppc_r0, ppc_sp, ppc_r11);
3042 #define MASK_SHIFT_IMM(i) ((i) & MONO_PPC_32_64_CASE (0x1f, 0x3f))
3046 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
3048 MonoInst *ins, *next;
3051 guint8 *code = cfg->native_code + cfg->code_len;
3052 MonoInst *last_ins = NULL;
3053 guint last_offset = 0;
3057 /* we don't align basic blocks of loops on ppc */
3059 if (cfg->verbose_level > 2)
3060 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
3062 cpos = bb->max_offset;
3064 if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
3065 //MonoCoverageInfo *cov = mono_get_coverage_info (cfg->method);
3066 //g_assert (!mono_compile_aot);
3069 // cov->data [bb->dfn].iloffset = bb->cil_code - cfg->cil_code;
3070 /* this is not thread save, but good enough */
3071 /* fixme: howto handle overflows? */
3072 //x86_inc_mem (code, &cov->data [bb->dfn].count);
3075 MONO_BB_FOR_EACH_INS (bb, ins) {
3076 offset = code - cfg->native_code;
3078 max_len = ins_native_length (cfg, ins);
3080 if (offset > (cfg->code_size - max_len - 16)) {
3081 cfg->code_size *= 2;
3082 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
3083 code = cfg->native_code + offset;
3085 // if (ins->cil_code)
3086 // g_print ("cil code\n");
3087 mono_debug_record_line_number (cfg, ins, offset);
3089 switch (normalize_opcode (ins->opcode)) {
3090 case OP_RELAXED_NOP:
3093 case OP_DUMMY_STORE:
3094 case OP_NOT_REACHED:
3097 case OP_SEQ_POINT: {
3100 if (cfg->compile_aot)
3104 * Read from the single stepping trigger page. This will cause a
3105 * SIGSEGV when single stepping is enabled.
3106 * We do this _before_ the breakpoint, so single stepping after
3107 * a breakpoint is hit will step to the next IL offset.
3109 if (ins->flags & MONO_INST_SINGLE_STEP_LOC) {
3110 ppc_load (code, ppc_r11, (gsize)ss_trigger_page);
3111 ppc_ldptr (code, ppc_r11, 0, ppc_r11);
3114 mono_add_seq_point (cfg, bb, ins, code - cfg->native_code);
3117 * A placeholder for a possible breakpoint inserted by
3118 * mono_arch_set_breakpoint ().
3120 for (i = 0; i < BREAKPOINT_SIZE / 4; ++i)
3125 emit_tls_access (code, ins->dreg, ins->inst_offset);
3128 ppc_mullw (code, ppc_r0, ins->sreg1, ins->sreg2);
3129 ppc_mulhw (code, ppc_r3, ins->sreg1, ins->sreg2);
3130 ppc_mr (code, ppc_r4, ppc_r0);
3133 ppc_mullw (code, ppc_r0, ins->sreg1, ins->sreg2);
3134 ppc_mulhwu (code, ppc_r3, ins->sreg1, ins->sreg2);
3135 ppc_mr (code, ppc_r4, ppc_r0);
3137 case OP_MEMORY_BARRIER:
3140 case OP_STOREI1_MEMBASE_REG:
3141 if (ppc_is_imm16 (ins->inst_offset)) {
3142 ppc_stb (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
3144 if (ppc_is_imm32 (ins->inst_offset)) {
3145 ppc_addis (code, ppc_r12, ins->inst_destbasereg, ppc_ha(ins->inst_offset));
3146 ppc_stb (code, ins->sreg1, ins->inst_offset, ppc_r12);
3148 ppc_load (code, ppc_r0, ins->inst_offset);
3149 ppc_stbx (code, ins->sreg1, ins->inst_destbasereg, ppc_r0);
3153 case OP_STOREI2_MEMBASE_REG:
3154 if (ppc_is_imm16 (ins->inst_offset)) {
3155 ppc_sth (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
3157 if (ppc_is_imm32 (ins->inst_offset)) {
3158 ppc_addis (code, ppc_r12, ins->inst_destbasereg, ppc_ha(ins->inst_offset));
3159 ppc_sth (code, ins->sreg1, ins->inst_offset, ppc_r12);
3161 ppc_load (code, ppc_r0, ins->inst_offset);
3162 ppc_sthx (code, ins->sreg1, ins->inst_destbasereg, ppc_r0);
3166 case OP_STORE_MEMBASE_REG:
3167 if (ppc_is_imm16 (ins->inst_offset)) {
3168 ppc_stptr (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
3170 if (ppc_is_imm32 (ins->inst_offset)) {
3171 ppc_addis (code, ppc_r12, ins->inst_destbasereg, ppc_ha(ins->inst_offset));
3172 ppc_stptr (code, ins->sreg1, ins->inst_offset, ppc_r12);
3174 ppc_load (code, ppc_r0, ins->inst_offset);
3175 ppc_stptr_indexed (code, ins->sreg1, ins->inst_destbasereg, ppc_r0);
3179 #ifdef __mono_ilp32__
3180 case OP_STOREI8_MEMBASE_REG:
3181 if (ppc_is_imm16 (ins->inst_offset)) {
3182 ppc_str (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
3184 ppc_load (code, ppc_r0, ins->inst_offset);
3185 ppc_str_indexed (code, ins->sreg1, ins->inst_destbasereg, ppc_r0);
3189 case OP_STOREI1_MEMINDEX:
3190 ppc_stbx (code, ins->sreg1, ins->inst_destbasereg, ins->sreg2);
3192 case OP_STOREI2_MEMINDEX:
3193 ppc_sthx (code, ins->sreg1, ins->inst_destbasereg, ins->sreg2);
3195 case OP_STORE_MEMINDEX:
3196 ppc_stptr_indexed (code, ins->sreg1, ins->inst_destbasereg, ins->sreg2);
3199 g_assert_not_reached ();
3201 case OP_LOAD_MEMBASE:
3202 if (ppc_is_imm16 (ins->inst_offset)) {
3203 ppc_ldptr (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
3205 if (ppc_is_imm32 (ins->inst_offset) && (ins->dreg > 0)) {
3206 ppc_addis (code, ins->dreg, ins->inst_basereg, ppc_ha(ins->inst_offset));
3207 ppc_ldptr (code, ins->dreg, ins->inst_offset, ins->dreg);
3209 ppc_load (code, ppc_r0, ins->inst_offset);
3210 ppc_ldptr_indexed (code, ins->dreg, ins->inst_basereg, ppc_r0);
3214 case OP_LOADI4_MEMBASE:
3215 #ifdef __mono_ppc64__
3216 if (ppc_is_imm16 (ins->inst_offset)) {
3217 ppc_lwa (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
3219 if (ppc_is_imm32 (ins->inst_offset) && (ins->dreg > 0)) {
3220 ppc_addis (code, ins->dreg, ins->inst_basereg, ppc_ha(ins->inst_offset));
3221 ppc_lwa (code, ins->dreg, ins->inst_offset, ins->dreg);
3223 ppc_load (code, ppc_r0, ins->inst_offset);
3224 ppc_lwax (code, ins->dreg, ins->inst_basereg, ppc_r0);
3229 case OP_LOADU4_MEMBASE:
3230 if (ppc_is_imm16 (ins->inst_offset)) {
3231 ppc_lwz (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
3233 if (ppc_is_imm32 (ins->inst_offset) && (ins->dreg > 0)) {
3234 ppc_addis (code, ins->dreg, ins->inst_basereg, ppc_ha(ins->inst_offset));
3235 ppc_lwz (code, ins->dreg, ins->inst_offset, ins->dreg);
3237 ppc_load (code, ppc_r0, ins->inst_offset);
3238 ppc_lwzx (code, ins->dreg, ins->inst_basereg, ppc_r0);
3242 case OP_LOADI1_MEMBASE:
3243 case OP_LOADU1_MEMBASE:
3244 if (ppc_is_imm16 (ins->inst_offset)) {
3245 ppc_lbz (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
3247 if (ppc_is_imm32 (ins->inst_offset) && (ins->dreg > 0)) {
3248 ppc_addis (code, ins->dreg, ins->inst_basereg, ppc_ha(ins->inst_offset));
3249 ppc_lbz (code, ins->dreg, ins->inst_offset, ins->dreg);
3251 ppc_load (code, ppc_r0, ins->inst_offset);
3252 ppc_lbzx (code, ins->dreg, ins->inst_basereg, ppc_r0);
3255 if (ins->opcode == OP_LOADI1_MEMBASE)
3256 ppc_extsb (code, ins->dreg, ins->dreg);
3258 case OP_LOADU2_MEMBASE:
3259 if (ppc_is_imm16 (ins->inst_offset)) {
3260 ppc_lhz (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
3262 if (ppc_is_imm32 (ins->inst_offset) && (ins->dreg > 0)) {
3263 ppc_addis (code, ins->dreg, ins->inst_basereg, ppc_ha(ins->inst_offset));
3264 ppc_lhz (code, ins->dreg, ins->inst_offset, ins->dreg);
3266 ppc_load (code, ppc_r0, ins->inst_offset);
3267 ppc_lhzx (code, ins->dreg, ins->inst_basereg, ppc_r0);
3271 case OP_LOADI2_MEMBASE:
3272 if (ppc_is_imm16 (ins->inst_offset)) {
3273 ppc_lha (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
3275 if (ppc_is_imm32 (ins->inst_offset) && (ins->dreg > 0)) {
3276 ppc_addis (code, ins->dreg, ins->inst_basereg, ppc_ha(ins->inst_offset));
3277 ppc_lha (code, ins->dreg, ins->inst_offset, ins->dreg);
3279 ppc_load (code, ppc_r0, ins->inst_offset);
3280 ppc_lhax (code, ins->dreg, ins->inst_basereg, ppc_r0);
3284 #ifdef __mono_ilp32__
3285 case OP_LOADI8_MEMBASE:
3286 if (ppc_is_imm16 (ins->inst_offset)) {
3287 ppc_ldr (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
3289 ppc_load (code, ppc_r0, ins->inst_offset);
3290 ppc_ldr_indexed (code, ins->dreg, ins->inst_basereg, ppc_r0);
3294 case OP_LOAD_MEMINDEX:
3295 ppc_ldptr_indexed (code, ins->dreg, ins->inst_basereg, ins->sreg2);
3297 case OP_LOADI4_MEMINDEX:
3298 #ifdef __mono_ppc64__
3299 ppc_lwax (code, ins->dreg, ins->inst_basereg, ins->sreg2);
3302 case OP_LOADU4_MEMINDEX:
3303 ppc_lwzx (code, ins->dreg, ins->inst_basereg, ins->sreg2);
3305 case OP_LOADU2_MEMINDEX:
3306 ppc_lhzx (code, ins->dreg, ins->inst_basereg, ins->sreg2);
3308 case OP_LOADI2_MEMINDEX:
3309 ppc_lhax (code, ins->dreg, ins->inst_basereg, ins->sreg2);
3311 case OP_LOADU1_MEMINDEX:
3312 ppc_lbzx (code, ins->dreg, ins->inst_basereg, ins->sreg2);
3314 case OP_LOADI1_MEMINDEX:
3315 ppc_lbzx (code, ins->dreg, ins->inst_basereg, ins->sreg2);
3316 ppc_extsb (code, ins->dreg, ins->dreg);
3318 case OP_ICONV_TO_I1:
3319 CASE_PPC64 (OP_LCONV_TO_I1)
3320 ppc_extsb (code, ins->dreg, ins->sreg1);
3322 case OP_ICONV_TO_I2:
3323 CASE_PPC64 (OP_LCONV_TO_I2)
3324 ppc_extsh (code, ins->dreg, ins->sreg1);
3326 case OP_ICONV_TO_U1:
3327 CASE_PPC64 (OP_LCONV_TO_U1)
3328 ppc_clrlwi (code, ins->dreg, ins->sreg1, 24);
3330 case OP_ICONV_TO_U2:
3331 CASE_PPC64 (OP_LCONV_TO_U2)
3332 ppc_clrlwi (code, ins->dreg, ins->sreg1, 16);
3336 CASE_PPC64 (OP_LCOMPARE)
3337 L = (sizeof (mgreg_t) == 4 || ins->opcode == OP_ICOMPARE) ? 0 : 1;
3339 if (next && compare_opcode_is_unsigned (next->opcode))
3340 ppc_cmpl (code, 0, L, ins->sreg1, ins->sreg2);
3342 ppc_cmp (code, 0, L, ins->sreg1, ins->sreg2);
3344 case OP_COMPARE_IMM:
3345 case OP_ICOMPARE_IMM:
3346 CASE_PPC64 (OP_LCOMPARE_IMM)
3347 L = (sizeof (mgreg_t) == 4 || ins->opcode == OP_ICOMPARE_IMM) ? 0 : 1;
3349 if (next && compare_opcode_is_unsigned (next->opcode)) {
3350 if (ppc_is_uimm16 (ins->inst_imm)) {
3351 ppc_cmpli (code, 0, L, ins->sreg1, (ins->inst_imm & 0xffff));
3353 g_assert_not_reached ();
3356 if (ppc_is_imm16 (ins->inst_imm)) {
3357 ppc_cmpi (code, 0, L, ins->sreg1, (ins->inst_imm & 0xffff));
3359 g_assert_not_reached ();
3365 * gdb does not like encountering a trap in the debugged code. So
3366 * instead of emitting a trap, we emit a call a C function and place a
3370 ppc_mr (code, ppc_r3, ins->sreg1);
3371 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3372 (gpointer)"mono_break");
3373 if ((FORCE_INDIR_CALL || cfg->method->dynamic) && !cfg->compile_aot) {
3374 ppc_load_func (code, ppc_r0, 0);
3375 ppc_mtlr (code, ppc_r0);
3383 ppc_addco (code, ins->dreg, ins->sreg1, ins->sreg2);
3386 CASE_PPC64 (OP_LADD)
3387 ppc_add (code, ins->dreg, ins->sreg1, ins->sreg2);
3391 ppc_adde (code, ins->dreg, ins->sreg1, ins->sreg2);
3394 if (ppc_is_imm16 (ins->inst_imm)) {
3395 ppc_addic (code, ins->dreg, ins->sreg1, ins->inst_imm);
3397 g_assert_not_reached ();
3402 CASE_PPC64 (OP_LADD_IMM)
3403 if (ppc_is_imm16 (ins->inst_imm)) {
3404 ppc_addi (code, ins->dreg, ins->sreg1, ins->inst_imm);
3406 g_assert_not_reached ();
3410 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
3412 ppc_addo (code, ins->dreg, ins->sreg1, ins->sreg2);
3413 ppc_mfspr (code, ppc_r0, ppc_xer);
3414 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
3415 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
3417 case OP_IADD_OVF_UN:
3418 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
3420 ppc_addco (code, ins->dreg, ins->sreg1, ins->sreg2);
3421 ppc_mfspr (code, ppc_r0, ppc_xer);
3422 ppc_andisd (code, ppc_r0, ppc_r0, (1<<13));
3423 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
3426 CASE_PPC64 (OP_LSUB_OVF)
3427 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
3429 ppc_subfo (code, ins->dreg, ins->sreg2, ins->sreg1);
3430 ppc_mfspr (code, ppc_r0, ppc_xer);
3431 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
3432 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
3434 case OP_ISUB_OVF_UN:
3435 CASE_PPC64 (OP_LSUB_OVF_UN)
3436 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
3438 ppc_subfc (code, ins->dreg, ins->sreg2, ins->sreg1);
3439 ppc_mfspr (code, ppc_r0, ppc_xer);
3440 ppc_andisd (code, ppc_r0, ppc_r0, (1<<13));
3441 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_EQ, "OverflowException");
3443 case OP_ADD_OVF_CARRY:
3444 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
3446 ppc_addeo (code, ins->dreg, ins->sreg1, ins->sreg2);
3447 ppc_mfspr (code, ppc_r0, ppc_xer);
3448 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
3449 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
3451 case OP_ADD_OVF_UN_CARRY:
3452 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
3454 ppc_addeo (code, ins->dreg, ins->sreg1, ins->sreg2);
3455 ppc_mfspr (code, ppc_r0, ppc_xer);
3456 ppc_andisd (code, ppc_r0, ppc_r0, (1<<13));
3457 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
3459 case OP_SUB_OVF_CARRY:
3460 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
3462 ppc_subfeo (code, ins->dreg, ins->sreg2, ins->sreg1);
3463 ppc_mfspr (code, ppc_r0, ppc_xer);
3464 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
3465 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
3467 case OP_SUB_OVF_UN_CARRY:
3468 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
3470 ppc_subfeo (code, ins->dreg, ins->sreg2, ins->sreg1);
3471 ppc_mfspr (code, ppc_r0, ppc_xer);
3472 ppc_andisd (code, ppc_r0, ppc_r0, (1<<13));
3473 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_EQ, "OverflowException");
3477 ppc_subfco (code, ins->dreg, ins->sreg2, ins->sreg1);
3480 CASE_PPC64 (OP_LSUB)
3481 ppc_subf (code, ins->dreg, ins->sreg2, ins->sreg1);
3485 ppc_subfe (code, ins->dreg, ins->sreg2, ins->sreg1);
3489 CASE_PPC64 (OP_LSUB_IMM)
3490 // we add the negated value
3491 if (ppc_is_imm16 (-ins->inst_imm))
3492 ppc_addi (code, ins->dreg, ins->sreg1, -ins->inst_imm);
3494 g_assert_not_reached ();
3498 g_assert (ppc_is_imm16 (ins->inst_imm));
3499 ppc_subfic (code, ins->dreg, ins->sreg1, ins->inst_imm);
3502 ppc_subfze (code, ins->dreg, ins->sreg1);
3505 CASE_PPC64 (OP_LAND)
3506 /* FIXME: the ppc macros as inconsistent here: put dest as the first arg! */
3507 ppc_and (code, ins->sreg1, ins->dreg, ins->sreg2);
3511 CASE_PPC64 (OP_LAND_IMM)
3512 if (!(ins->inst_imm & 0xffff0000)) {
3513 ppc_andid (code, ins->sreg1, ins->dreg, ins->inst_imm);
3514 } else if (!(ins->inst_imm & 0xffff)) {
3515 ppc_andisd (code, ins->sreg1, ins->dreg, ((guint32)ins->inst_imm >> 16));
3517 g_assert_not_reached ();
3521 CASE_PPC64 (OP_LDIV) {
3522 guint8 *divisor_is_m1;
3523 /* XER format: SO, OV, CA, reserved [21 bits], count [8 bits]
3525 ppc_compare_reg_imm (code, 0, ins->sreg2, -1);
3526 divisor_is_m1 = code;
3527 ppc_bc (code, PPC_BR_FALSE | PPC_BR_LIKELY, PPC_BR_EQ, 0);
3528 ppc_lis (code, ppc_r0, 0x8000);
3529 #ifdef __mono_ppc64__
3530 if (ins->opcode == OP_LDIV)
3531 ppc_sldi (code, ppc_r0, ppc_r0, 32);
3533 ppc_compare (code, 0, ins->sreg1, ppc_r0);
3534 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_EQ, "OverflowException");
3535 ppc_patch (divisor_is_m1, code);
3536 /* XER format: SO, OV, CA, reserved [21 bits], count [8 bits]
3538 if (ins->opcode == OP_IDIV)
3539 ppc_divwod (code, ins->dreg, ins->sreg1, ins->sreg2);
3540 #ifdef __mono_ppc64__
3542 ppc_divdod (code, ins->dreg, ins->sreg1, ins->sreg2);
3544 ppc_mfspr (code, ppc_r0, ppc_xer);
3545 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
3546 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "DivideByZeroException");
3550 CASE_PPC64 (OP_LDIV_UN)
3551 if (ins->opcode == OP_IDIV_UN)
3552 ppc_divwuod (code, ins->dreg, ins->sreg1, ins->sreg2);
3553 #ifdef __mono_ppc64__
3555 ppc_divduod (code, ins->dreg, ins->sreg1, ins->sreg2);
3557 ppc_mfspr (code, ppc_r0, ppc_xer);
3558 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
3559 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "DivideByZeroException");
3565 g_assert_not_reached ();
3568 ppc_or (code, ins->dreg, ins->sreg1, ins->sreg2);
3572 CASE_PPC64 (OP_LOR_IMM)
3573 if (!(ins->inst_imm & 0xffff0000)) {
3574 ppc_ori (code, ins->sreg1, ins->dreg, ins->inst_imm);
3575 } else if (!(ins->inst_imm & 0xffff)) {
3576 ppc_oris (code, ins->dreg, ins->sreg1, ((guint32)(ins->inst_imm) >> 16));
3578 g_assert_not_reached ();
3582 CASE_PPC64 (OP_LXOR)
3583 ppc_xor (code, ins->dreg, ins->sreg1, ins->sreg2);
3587 CASE_PPC64 (OP_LXOR_IMM)
3588 if (!(ins->inst_imm & 0xffff0000)) {
3589 ppc_xori (code, ins->sreg1, ins->dreg, ins->inst_imm);
3590 } else if (!(ins->inst_imm & 0xffff)) {
3591 ppc_xoris (code, ins->sreg1, ins->dreg, ((guint32)(ins->inst_imm) >> 16));
3593 g_assert_not_reached ();
3597 CASE_PPC64 (OP_LSHL)
3598 ppc_shift_left (code, ins->dreg, ins->sreg1, ins->sreg2);
3602 CASE_PPC64 (OP_LSHL_IMM)
3603 ppc_shift_left_imm (code, ins->dreg, ins->sreg1, MASK_SHIFT_IMM (ins->inst_imm));
3606 ppc_sraw (code, ins->dreg, ins->sreg1, ins->sreg2);
3609 ppc_shift_right_arith_imm (code, ins->dreg, ins->sreg1, MASK_SHIFT_IMM (ins->inst_imm));
3612 if (MASK_SHIFT_IMM (ins->inst_imm))
3613 ppc_shift_right_imm (code, ins->dreg, ins->sreg1, MASK_SHIFT_IMM (ins->inst_imm));
3615 ppc_mr (code, ins->dreg, ins->sreg1);
3618 ppc_srw (code, ins->dreg, ins->sreg1, ins->sreg2);
3621 CASE_PPC64 (OP_LNOT)
3622 ppc_not (code, ins->dreg, ins->sreg1);
3625 CASE_PPC64 (OP_LNEG)
3626 ppc_neg (code, ins->dreg, ins->sreg1);
3629 CASE_PPC64 (OP_LMUL)
3630 ppc_multiply (code, ins->dreg, ins->sreg1, ins->sreg2);
3634 CASE_PPC64 (OP_LMUL_IMM)
3635 if (ppc_is_imm16 (ins->inst_imm)) {
3636 ppc_mulli (code, ins->dreg, ins->sreg1, ins->inst_imm);
3638 g_assert_not_reached ();
3642 CASE_PPC64 (OP_LMUL_OVF)
3643 /* we annot use mcrxr, since it's not implemented on some processors
3644 * XER format: SO, OV, CA, reserved [21 bits], count [8 bits]
3646 if (ins->opcode == OP_IMUL_OVF)
3647 ppc_mullwo (code, ins->dreg, ins->sreg1, ins->sreg2);
3648 #ifdef __mono_ppc64__
3650 ppc_mulldo (code, ins->dreg, ins->sreg1, ins->sreg2);
3652 ppc_mfspr (code, ppc_r0, ppc_xer);
3653 ppc_andisd (code, ppc_r0, ppc_r0, (1<<14));
3654 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
3656 case OP_IMUL_OVF_UN:
3657 CASE_PPC64 (OP_LMUL_OVF_UN)
3658 /* we first multiply to get the high word and compare to 0
3659 * to set the flags, then the result is discarded and then
3660 * we multiply to get the lower * bits result
3662 if (ins->opcode == OP_IMUL_OVF_UN)
3663 ppc_mulhwu (code, ppc_r0, ins->sreg1, ins->sreg2);
3664 #ifdef __mono_ppc64__
3666 ppc_mulhdu (code, ppc_r0, ins->sreg1, ins->sreg2);
3668 ppc_cmpi (code, 0, 0, ppc_r0, 0);
3669 EMIT_COND_SYSTEM_EXCEPTION (CEE_BNE_UN - CEE_BEQ, "OverflowException");
3670 ppc_multiply (code, ins->dreg, ins->sreg1, ins->sreg2);
3673 ppc_load (code, ins->dreg, ins->inst_c0);
3676 ppc_load (code, ins->dreg, ins->inst_l);
3679 case OP_LOAD_GOTADDR:
3680 /* The PLT implementation depends on this */
3681 g_assert (ins->dreg == ppc_r30);
3683 code = mono_arch_emit_load_got_addr (cfg->native_code, code, cfg, NULL);
3686 // FIXME: Fix max instruction length
3687 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_right->inst_i1, ins->inst_right->inst_p0);
3688 /* arch_emit_got_access () patches this */
3689 ppc_load32 (code, ppc_r0, 0);
3690 ppc_ldptr_indexed (code, ins->dreg, ins->inst_basereg, ppc_r0);
3693 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
3694 ppc_load_sequence (code, ins->dreg, 0);
3696 CASE_PPC32 (OP_ICONV_TO_I4)
3697 CASE_PPC32 (OP_ICONV_TO_U4)
3699 ppc_mr (code, ins->dreg, ins->sreg1);
3702 int saved = ins->sreg1;
3703 if (ins->sreg1 == ppc_r3) {
3704 ppc_mr (code, ppc_r0, ins->sreg1);
3707 if (ins->sreg2 != ppc_r3)
3708 ppc_mr (code, ppc_r3, ins->sreg2);
3709 if (saved != ppc_r4)
3710 ppc_mr (code, ppc_r4, saved);
3714 ppc_fmr (code, ins->dreg, ins->sreg1);
3716 case OP_FCONV_TO_R4:
3717 ppc_frsp (code, ins->dreg, ins->sreg1);
3721 MonoCallInst *call = (MonoCallInst*)ins;
3724 * Keep in sync with mono_arch_emit_epilog
3726 g_assert (!cfg->method->save_lmf);
3728 * Note: we can use ppc_r11 here because it is dead anyway:
3729 * we're leaving the method.
3731 if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
3732 long ret_offset = cfg->stack_usage + PPC_RET_ADDR_OFFSET;
3733 if (ppc_is_imm16 (ret_offset)) {
3734 ppc_ldptr (code, ppc_r0, ret_offset, cfg->frame_reg);
3736 ppc_load (code, ppc_r11, ret_offset);
3737 ppc_ldptr_indexed (code, ppc_r0, cfg->frame_reg, ppc_r11);
3739 ppc_mtlr (code, ppc_r0);
3742 if (ppc_is_imm16 (cfg->stack_usage)) {
3743 ppc_addi (code, ppc_r11, cfg->frame_reg, cfg->stack_usage);
3745 /* cfg->stack_usage is an int, so we can use
3746 * an addis/addi sequence here even in 64-bit. */
3747 ppc_addis (code, ppc_r11, cfg->frame_reg, ppc_ha(cfg->stack_usage));
3748 ppc_addi (code, ppc_r11, ppc_r11, cfg->stack_usage);
3750 if (!cfg->method->save_lmf) {
3752 for (i = 31; i >= 13; --i) {
3753 if (cfg->used_int_regs & (1 << i)) {
3754 pos += sizeof (gpointer);
3755 ppc_ldptr (code, i, -pos, ppc_r11);
3759 /* FIXME restore from MonoLMF: though this can't happen yet */
3762 /* Copy arguments on the stack to our argument area */
3763 if (call->stack_usage) {
3764 code = emit_memcpy (code, call->stack_usage, ppc_r11, PPC_STACK_PARAM_OFFSET, ppc_sp, PPC_STACK_PARAM_OFFSET);
3765 /* r11 was clobbered */
3766 g_assert (cfg->frame_reg == ppc_sp);
3767 if (ppc_is_imm16 (cfg->stack_usage)) {
3768 ppc_addi (code, ppc_r11, cfg->frame_reg, cfg->stack_usage);
3770 /* cfg->stack_usage is an int, so we can use
3771 * an addis/addi sequence here even in 64-bit. */
3772 ppc_addis (code, ppc_r11, cfg->frame_reg, ppc_ha(cfg->stack_usage));
3773 ppc_addi (code, ppc_r11, ppc_r11, cfg->stack_usage);
3777 ppc_mr (code, ppc_sp, ppc_r11);
3778 mono_add_patch_info (cfg, (guint8*) code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, call->method);
3779 if (cfg->compile_aot) {
3780 /* arch_emit_got_access () patches this */
3781 ppc_load32 (code, ppc_r0, 0);
3782 #ifdef PPC_USES_FUNCTION_DESCRIPTOR
3783 ppc_ldptr_indexed (code, ppc_r11, ppc_r30, ppc_r0);
3784 ppc_ldptr (code, ppc_r0, 0, ppc_r11);
3786 ppc_ldptr_indexed (code, ppc_r0, ppc_r30, ppc_r0);
3788 ppc_mtctr (code, ppc_r0);
3789 ppc_bcctr (code, PPC_BR_ALWAYS, 0);
3796 /* ensure ins->sreg1 is not NULL */
3797 ppc_ldptr (code, ppc_r0, 0, ins->sreg1);
3800 long cookie_offset = cfg->sig_cookie + cfg->stack_usage;
3801 if (ppc_is_imm16 (cookie_offset)) {
3802 ppc_addi (code, ppc_r0, cfg->frame_reg, cookie_offset);
3804 ppc_load (code, ppc_r0, cookie_offset);
3805 ppc_add (code, ppc_r0, cfg->frame_reg, ppc_r0);
3807 ppc_stptr (code, ppc_r0, 0, ins->sreg1);
3816 call = (MonoCallInst*)ins;
3817 if (ins->flags & MONO_INST_HAS_METHOD)
3818 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD, call->method);
3820 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, call->fptr);
3821 if ((FORCE_INDIR_CALL || cfg->method->dynamic) && !cfg->compile_aot) {
3822 ppc_load_func (code, ppc_r0, 0);
3823 ppc_mtlr (code, ppc_r0);
3828 /* FIXME: this should be handled somewhere else in the new jit */
3829 code = emit_move_return_value (cfg, ins, code);
3835 case OP_VOIDCALL_REG:
3837 #ifdef PPC_USES_FUNCTION_DESCRIPTOR
3838 ppc_ldptr (code, ppc_r0, 0, ins->sreg1);
3839 /* FIXME: if we know that this is a method, we
3840 can omit this load */
3841 ppc_ldptr (code, ppc_r2, 8, ins->sreg1);
3842 ppc_mtlr (code, ppc_r0);
3844 ppc_mtlr (code, ins->sreg1);
3847 /* FIXME: this should be handled somewhere else in the new jit */
3848 code = emit_move_return_value (cfg, ins, code);
3850 case OP_FCALL_MEMBASE:
3851 case OP_LCALL_MEMBASE:
3852 case OP_VCALL_MEMBASE:
3853 case OP_VCALL2_MEMBASE:
3854 case OP_VOIDCALL_MEMBASE:
3855 case OP_CALL_MEMBASE:
3856 if (cfg->compile_aot && ins->sreg1 == ppc_r11) {
3857 /* The trampolines clobber this */
3858 ppc_mr (code, ppc_r29, ins->sreg1);
3859 ppc_ldptr (code, ppc_r0, ins->inst_offset, ppc_r29);
3861 ppc_ldptr (code, ppc_r0, ins->inst_offset, ins->sreg1);
3863 ppc_mtlr (code, ppc_r0);
3865 /* FIXME: this should be handled somewhere else in the new jit */
3866 code = emit_move_return_value (cfg, ins, code);
3869 guint8 * zero_loop_jump, * zero_loop_start;
3870 /* keep alignment */
3871 int alloca_waste = PPC_STACK_PARAM_OFFSET + cfg->param_area + 31;
3872 int area_offset = alloca_waste;
3874 ppc_addi (code, ppc_r11, ins->sreg1, alloca_waste + 31);
3875 /* FIXME: should be calculated from MONO_ARCH_FRAME_ALIGNMENT */
3876 ppc_clear_right_imm (code, ppc_r11, ppc_r11, 4);
3877 /* use ctr to store the number of words to 0 if needed */
3878 if (ins->flags & MONO_INST_INIT) {
3879 /* we zero 4 bytes at a time:
3880 * we add 7 instead of 3 so that we set the counter to
3881 * at least 1, otherwise the bdnz instruction will make
3882 * it negative and iterate billions of times.
3884 ppc_addi (code, ppc_r0, ins->sreg1, 7);
3885 ppc_shift_right_arith_imm (code, ppc_r0, ppc_r0, 2);
3886 ppc_mtctr (code, ppc_r0);
3888 ppc_ldptr (code, ppc_r0, 0, ppc_sp);
3889 ppc_neg (code, ppc_r11, ppc_r11);
3890 ppc_stptr_update_indexed (code, ppc_r0, ppc_sp, ppc_r11);
3892 /* FIXME: make this loop work in 8 byte
3893 increments on PPC64 */
3894 if (ins->flags & MONO_INST_INIT) {
3895 /* adjust the dest reg by -4 so we can use stwu */
3896 /* we actually adjust -8 because we let the loop
3899 ppc_addi (code, ins->dreg, ppc_sp, (area_offset - 8));
3900 ppc_li (code, ppc_r11, 0);
3901 zero_loop_start = code;
3902 ppc_stwu (code, ppc_r11, 4, ins->dreg);
3903 zero_loop_jump = code;
3904 ppc_bc (code, PPC_BR_DEC_CTR_NONZERO, 0, 0);
3905 ppc_patch (zero_loop_jump, zero_loop_start);
3907 ppc_addi (code, ins->dreg, ppc_sp, area_offset);
3912 ppc_mr (code, ppc_r3, ins->sreg1);
3913 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3914 (gpointer)"mono_arch_throw_exception");
3915 if ((FORCE_INDIR_CALL || cfg->method->dynamic) && !cfg->compile_aot) {
3916 ppc_load_func (code, ppc_r0, 0);
3917 ppc_mtlr (code, ppc_r0);
3926 ppc_mr (code, ppc_r3, ins->sreg1);
3927 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
3928 (gpointer)"mono_arch_rethrow_exception");
3929 if ((FORCE_INDIR_CALL || cfg->method->dynamic) && !cfg->compile_aot) {
3930 ppc_load_func (code, ppc_r0, 0);
3931 ppc_mtlr (code, ppc_r0);
3938 case OP_START_HANDLER: {
3939 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3940 g_assert (spvar->inst_basereg != ppc_sp);
3941 code = emit_reserve_param_area (cfg, code);
3942 ppc_mflr (code, ppc_r0);
3943 if (ppc_is_imm16 (spvar->inst_offset)) {
3944 ppc_stptr (code, ppc_r0, spvar->inst_offset, spvar->inst_basereg);
3946 ppc_load (code, ppc_r11, spvar->inst_offset);
3947 ppc_stptr_indexed (code, ppc_r0, ppc_r11, spvar->inst_basereg);
3951 case OP_ENDFILTER: {
3952 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3953 g_assert (spvar->inst_basereg != ppc_sp);
3954 code = emit_unreserve_param_area (cfg, code);
3955 if (ins->sreg1 != ppc_r3)
3956 ppc_mr (code, ppc_r3, ins->sreg1);
3957 if (ppc_is_imm16 (spvar->inst_offset)) {
3958 ppc_ldptr (code, ppc_r0, spvar->inst_offset, spvar->inst_basereg);
3960 ppc_load (code, ppc_r11, spvar->inst_offset);
3961 ppc_ldptr_indexed (code, ppc_r0, spvar->inst_basereg, ppc_r11);
3963 ppc_mtlr (code, ppc_r0);
3967 case OP_ENDFINALLY: {
3968 MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
3969 g_assert (spvar->inst_basereg != ppc_sp);
3970 code = emit_unreserve_param_area (cfg, code);
3971 ppc_ldptr (code, ppc_r0, spvar->inst_offset, spvar->inst_basereg);
3972 ppc_mtlr (code, ppc_r0);
3976 case OP_CALL_HANDLER:
3977 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3979 mono_cfg_add_try_hole (cfg, ins->inst_eh_block, code, bb);
3982 ins->inst_c0 = code - cfg->native_code;
3985 /*if (ins->inst_target_bb->native_offset) {
3987 //x86_jump_code (code, cfg->native_code + ins->inst_target_bb->native_offset);
3989 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
3994 ppc_mtctr (code, ins->sreg1);
3995 ppc_bcctr (code, PPC_BR_ALWAYS, 0);
3999 CASE_PPC64 (OP_LCEQ)
4000 ppc_li (code, ins->dreg, 0);
4001 ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 2);
4002 ppc_li (code, ins->dreg, 1);
4008 CASE_PPC64 (OP_LCLT)
4009 CASE_PPC64 (OP_LCLT_UN)
4010 ppc_li (code, ins->dreg, 1);
4011 ppc_bc (code, PPC_BR_TRUE, PPC_BR_LT, 2);
4012 ppc_li (code, ins->dreg, 0);
4018 CASE_PPC64 (OP_LCGT)
4019 CASE_PPC64 (OP_LCGT_UN)
4020 ppc_li (code, ins->dreg, 1);
4021 ppc_bc (code, PPC_BR_TRUE, PPC_BR_GT, 2);
4022 ppc_li (code, ins->dreg, 0);
4024 case OP_COND_EXC_EQ:
4025 case OP_COND_EXC_NE_UN:
4026 case OP_COND_EXC_LT:
4027 case OP_COND_EXC_LT_UN:
4028 case OP_COND_EXC_GT:
4029 case OP_COND_EXC_GT_UN:
4030 case OP_COND_EXC_GE:
4031 case OP_COND_EXC_GE_UN:
4032 case OP_COND_EXC_LE:
4033 case OP_COND_EXC_LE_UN:
4034 EMIT_COND_SYSTEM_EXCEPTION (ins->opcode - OP_COND_EXC_EQ, ins->inst_p1);
4036 case OP_COND_EXC_IEQ:
4037 case OP_COND_EXC_INE_UN:
4038 case OP_COND_EXC_ILT:
4039 case OP_COND_EXC_ILT_UN:
4040 case OP_COND_EXC_IGT:
4041 case OP_COND_EXC_IGT_UN:
4042 case OP_COND_EXC_IGE:
4043 case OP_COND_EXC_IGE_UN:
4044 case OP_COND_EXC_ILE:
4045 case OP_COND_EXC_ILE_UN:
4046 EMIT_COND_SYSTEM_EXCEPTION (ins->opcode - OP_COND_EXC_IEQ, ins->inst_p1);
4058 EMIT_COND_BRANCH (ins, ins->opcode - OP_IBEQ);
4061 /* floating point opcodes */
4063 g_assert (cfg->compile_aot);
4065 /* FIXME: Optimize this */
4067 ppc_mflr (code, ppc_r11);
4069 *(double*)code = *(double*)ins->inst_p0;
4071 ppc_lfd (code, ins->dreg, 8, ppc_r11);
4074 g_assert_not_reached ();
4076 case OP_STORER8_MEMBASE_REG:
4077 if (ppc_is_imm16 (ins->inst_offset)) {
4078 ppc_stfd (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
4080 if (ppc_is_imm32 (ins->inst_offset)) {
4081 ppc_addis (code, ppc_r12, ins->inst_destbasereg, ppc_ha(ins->inst_offset));
4082 ppc_stfd (code, ins->sreg1, ins->inst_offset, ppc_r12);
4084 ppc_load (code, ppc_r0, ins->inst_offset);
4085 ppc_stfdx (code, ins->sreg1, ins->inst_destbasereg, ppc_r0);
4089 case OP_LOADR8_MEMBASE:
4090 if (ppc_is_imm16 (ins->inst_offset)) {
4091 ppc_lfd (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
4093 if (ppc_is_imm32 (ins->inst_offset)) {
4094 ppc_addis (code, ppc_r12, ins->inst_destbasereg, ppc_ha(ins->inst_offset));
4095 ppc_lfd (code, ins->dreg, ins->inst_offset, ppc_r12);
4097 ppc_load (code, ppc_r0, ins->inst_offset);
4098 ppc_lfdx (code, ins->dreg, ins->inst_destbasereg, ppc_r0);
4102 case OP_STORER4_MEMBASE_REG:
4103 ppc_frsp (code, ins->sreg1, ins->sreg1);
4104 if (ppc_is_imm16 (ins->inst_offset)) {
4105 ppc_stfs (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
4107 if (ppc_is_imm32 (ins->inst_offset)) {
4108 ppc_addis (code, ppc_r12, ins->inst_destbasereg, ppc_ha(ins->inst_offset));
4109 ppc_stfs (code, ins->sreg1, ins->inst_offset, ppc_r12);
4111 ppc_load (code, ppc_r0, ins->inst_offset);
4112 ppc_stfsx (code, ins->sreg1, ins->inst_destbasereg, ppc_r0);
4116 case OP_LOADR4_MEMBASE:
4117 if (ppc_is_imm16 (ins->inst_offset)) {
4118 ppc_lfs (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
4120 if (ppc_is_imm32 (ins->inst_offset)) {
4121 ppc_addis (code, ppc_r12, ins->inst_destbasereg, ppc_ha(ins->inst_offset));
4122 ppc_lfs (code, ins->dreg, ins->inst_offset, ppc_r12);
4124 ppc_load (code, ppc_r0, ins->inst_offset);
4125 ppc_lfsx (code, ins->dreg, ins->inst_destbasereg, ppc_r0);
4129 case OP_LOADR4_MEMINDEX:
4130 ppc_lfsx (code, ins->dreg, ins->inst_basereg, ins->sreg2);
4132 case OP_LOADR8_MEMINDEX:
4133 ppc_lfdx (code, ins->dreg, ins->inst_basereg, ins->sreg2);
4135 case OP_STORER4_MEMINDEX:
4136 ppc_frsp (code, ins->sreg1, ins->sreg1);
4137 ppc_stfsx (code, ins->sreg1, ins->inst_destbasereg, ins->sreg2);
4139 case OP_STORER8_MEMINDEX:
4140 ppc_stfdx (code, ins->sreg1, ins->inst_destbasereg, ins->sreg2);
4143 case CEE_CONV_R4: /* FIXME: change precision */
4145 g_assert_not_reached ();
4146 case OP_FCONV_TO_I1:
4147 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 1, TRUE);
4149 case OP_FCONV_TO_U1:
4150 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 1, FALSE);
4152 case OP_FCONV_TO_I2:
4153 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 2, TRUE);
4155 case OP_FCONV_TO_U2:
4156 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 2, FALSE);
4158 case OP_FCONV_TO_I4:
4160 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 4, TRUE);
4162 case OP_FCONV_TO_U4:
4164 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 4, FALSE);
4166 case OP_LCONV_TO_R_UN:
4167 g_assert_not_reached ();
4168 /* Implemented as helper calls */
4170 case OP_LCONV_TO_OVF_I4_2:
4171 case OP_LCONV_TO_OVF_I: {
4172 #ifdef __mono_ppc64__
4175 guint8 *negative_branch, *msword_positive_branch, *msword_negative_branch, *ovf_ex_target;
4176 // Check if its negative
4177 ppc_cmpi (code, 0, 0, ins->sreg1, 0);
4178 negative_branch = code;
4179 ppc_bc (code, PPC_BR_TRUE, PPC_BR_LT, 0);
4180 // Its positive msword == 0
4181 ppc_cmpi (code, 0, 0, ins->sreg2, 0);
4182 msword_positive_branch = code;
4183 ppc_bc (code, PPC_BR_TRUE, PPC_BR_EQ, 0);
4185 ovf_ex_target = code;
4186 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_ALWAYS, 0, "OverflowException");
4188 ppc_patch (negative_branch, code);
4189 ppc_cmpi (code, 0, 0, ins->sreg2, -1);
4190 msword_negative_branch = code;
4191 ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 0);
4192 ppc_patch (msword_negative_branch, ovf_ex_target);
4194 ppc_patch (msword_positive_branch, code);
4195 if (ins->dreg != ins->sreg1)
4196 ppc_mr (code, ins->dreg, ins->sreg1);
4201 ppc_fsqrtd (code, ins->dreg, ins->sreg1);
4204 ppc_fadd (code, ins->dreg, ins->sreg1, ins->sreg2);
4207 ppc_fsub (code, ins->dreg, ins->sreg1, ins->sreg2);
4210 ppc_fmul (code, ins->dreg, ins->sreg1, ins->sreg2);
4213 ppc_fdiv (code, ins->dreg, ins->sreg1, ins->sreg2);
4216 ppc_fneg (code, ins->dreg, ins->sreg1);
4220 g_assert_not_reached ();
4223 ppc_fcmpu (code, 0, ins->sreg1, ins->sreg2);
4226 ppc_fcmpo (code, 0, ins->sreg1, ins->sreg2);
4227 ppc_li (code, ins->dreg, 0);
4228 ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 2);
4229 ppc_li (code, ins->dreg, 1);
4232 ppc_fcmpo (code, 0, ins->sreg1, ins->sreg2);
4233 ppc_li (code, ins->dreg, 1);
4234 ppc_bc (code, PPC_BR_TRUE, PPC_BR_LT, 2);
4235 ppc_li (code, ins->dreg, 0);
4238 ppc_fcmpu (code, 0, ins->sreg1, ins->sreg2);
4239 ppc_li (code, ins->dreg, 1);
4240 ppc_bc (code, PPC_BR_TRUE, PPC_BR_SO, 3);
4241 ppc_bc (code, PPC_BR_TRUE, PPC_BR_LT, 2);
4242 ppc_li (code, ins->dreg, 0);
4245 ppc_fcmpo (code, 0, ins->sreg1, ins->sreg2);
4246 ppc_li (code, ins->dreg, 1);
4247 ppc_bc (code, PPC_BR_TRUE, PPC_BR_GT, 2);
4248 ppc_li (code, ins->dreg, 0);
4251 ppc_fcmpu (code, 0, ins->sreg1, ins->sreg2);
4252 ppc_li (code, ins->dreg, 1);
4253 ppc_bc (code, PPC_BR_TRUE, PPC_BR_SO, 3);
4254 ppc_bc (code, PPC_BR_TRUE, PPC_BR_GT, 2);
4255 ppc_li (code, ins->dreg, 0);
4258 EMIT_COND_BRANCH (ins, CEE_BEQ - CEE_BEQ);
4261 EMIT_COND_BRANCH (ins, CEE_BNE_UN - CEE_BEQ);
4264 ppc_bc (code, PPC_BR_TRUE, PPC_BR_SO, 2);
4265 EMIT_COND_BRANCH (ins, CEE_BLT - CEE_BEQ);
4268 EMIT_COND_BRANCH_FLAGS (ins, PPC_BR_TRUE, PPC_BR_SO);
4269 EMIT_COND_BRANCH (ins, CEE_BLT_UN - CEE_BEQ);
4272 ppc_bc (code, PPC_BR_TRUE, PPC_BR_SO, 2);
4273 EMIT_COND_BRANCH (ins, CEE_BGT - CEE_BEQ);
4276 EMIT_COND_BRANCH_FLAGS (ins, PPC_BR_TRUE, PPC_BR_SO);
4277 EMIT_COND_BRANCH (ins, CEE_BGT_UN - CEE_BEQ);
4280 ppc_bc (code, PPC_BR_TRUE, PPC_BR_SO, 2);
4281 EMIT_COND_BRANCH (ins, CEE_BGE - CEE_BEQ);
4284 EMIT_COND_BRANCH (ins, CEE_BGE_UN - CEE_BEQ);
4287 ppc_bc (code, PPC_BR_TRUE, PPC_BR_SO, 2);
4288 EMIT_COND_BRANCH (ins, CEE_BLE - CEE_BEQ);
4291 EMIT_COND_BRANCH (ins, CEE_BLE_UN - CEE_BEQ);
4294 g_assert_not_reached ();
4295 case OP_CHECK_FINITE: {
4296 ppc_rlwinm (code, ins->sreg1, ins->sreg1, 0, 1, 31);
4297 ppc_addis (code, ins->sreg1, ins->sreg1, -32752);
4298 ppc_rlwinmd (code, ins->sreg1, ins->sreg1, 1, 31, 31);
4299 EMIT_COND_SYSTEM_EXCEPTION (CEE_BEQ - CEE_BEQ, "ArithmeticException");
4302 mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_c1, ins->inst_p0);
4303 #ifdef __mono_ppc64__
4304 ppc_load_sequence (code, ins->dreg, (guint64)0x0f0f0f0f0f0f0f0fLL);
4306 ppc_load_sequence (code, ins->dreg, (gulong)0x0f0f0f0fL);
4311 #ifdef __mono_ppc64__
4312 case OP_ICONV_TO_I4:
4314 ppc_extsw (code, ins->dreg, ins->sreg1);
4316 case OP_ICONV_TO_U4:
4318 ppc_clrldi (code, ins->dreg, ins->sreg1, 32);
4320 case OP_ICONV_TO_R4:
4321 case OP_ICONV_TO_R8:
4322 case OP_LCONV_TO_R4:
4323 case OP_LCONV_TO_R8: {
4325 if (ins->opcode == OP_ICONV_TO_R4 || ins->opcode == OP_ICONV_TO_R8) {
4326 ppc_extsw (code, ppc_r0, ins->sreg1);
4331 if (cpu_hw_caps & PPC_MOVE_FPR_GPR) {
4332 ppc_mffgpr (code, ins->dreg, tmp);
4334 ppc_str (code, tmp, -8, ppc_r1);
4335 ppc_lfd (code, ins->dreg, -8, ppc_r1);
4337 ppc_fcfid (code, ins->dreg, ins->dreg);
4338 if (ins->opcode == OP_ICONV_TO_R4 || ins->opcode == OP_LCONV_TO_R4)
4339 ppc_frsp (code, ins->dreg, ins->dreg);
4343 ppc_srad (code, ins->dreg, ins->sreg1, ins->sreg2);
4346 ppc_srd (code, ins->dreg, ins->sreg1, ins->sreg2);
4349 /* check XER [0-3] (SO, OV, CA): we can't use mcrxr
4351 ppc_mfspr (code, ppc_r0, ppc_xer);
4352 ppc_andisd (code, ppc_r0, ppc_r0, (1 << 13)); /* CA */
4353 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, ins->inst_p1);
4355 case OP_COND_EXC_OV:
4356 ppc_mfspr (code, ppc_r0, ppc_xer);
4357 ppc_andisd (code, ppc_r0, ppc_r0, (1 << 14)); /* OV */
4358 EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, ins->inst_p1);
4370 EMIT_COND_BRANCH (ins, ins->opcode - OP_LBEQ);
4372 case OP_FCONV_TO_I8:
4373 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 8, TRUE);
4375 case OP_FCONV_TO_U8:
4376 code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 8, FALSE);
4378 case OP_STOREI4_MEMBASE_REG:
4379 if (ppc_is_imm16 (ins->inst_offset)) {
4380 ppc_stw (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
4382 ppc_load (code, ppc_r0, ins->inst_offset);
4383 ppc_stwx (code, ins->sreg1, ins->inst_destbasereg, ppc_r0);
4386 case OP_STOREI4_MEMINDEX:
4387 ppc_stwx (code, ins->sreg1, ins->sreg2, ins->inst_destbasereg);
4390 ppc_srawi (code, ins->dreg, ins->sreg1, (ins->inst_imm & 0x1f));
4392 case OP_ISHR_UN_IMM:
4393 if (ins->inst_imm & 0x1f)
4394 ppc_srwi (code, ins->dreg, ins->sreg1, (ins->inst_imm & 0x1f));
4396 ppc_mr (code, ins->dreg, ins->sreg1);
4398 case OP_ATOMIC_ADD_I4:
4399 CASE_PPC64 (OP_ATOMIC_ADD_I8) {
4400 int location = ins->inst_basereg;
4401 int addend = ins->sreg2;
4402 guint8 *loop, *branch;
4403 g_assert (ins->inst_offset == 0);
4407 if (ins->opcode == OP_ATOMIC_ADD_I4)
4408 ppc_lwarx (code, ppc_r0, 0, location);
4409 #ifdef __mono_ppc64__
4411 ppc_ldarx (code, ppc_r0, 0, location);
4414 ppc_add (code, ppc_r0, ppc_r0, addend);
4416 if (ins->opcode == OP_ATOMIC_ADD_I4)
4417 ppc_stwcxd (code, ppc_r0, 0, location);
4418 #ifdef __mono_ppc64__
4420 ppc_stdcxd (code, ppc_r0, 0, location);
4424 ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 0);
4425 ppc_patch (branch, loop);
4428 ppc_mr (code, ins->dreg, ppc_r0);
4432 case OP_ICONV_TO_R4:
4433 case OP_ICONV_TO_R8: {
4434 if (cpu_hw_caps & PPC_ISA_64) {
4435 ppc_srawi(code, ppc_r0, ins->sreg1, 31);
4436 ppc_stw (code, ppc_r0, -8, ppc_r1);
4437 ppc_stw (code, ins->sreg1, -4, ppc_r1);
4438 ppc_lfd (code, ins->dreg, -8, ppc_r1);
4439 ppc_fcfid (code, ins->dreg, ins->dreg);
4440 if (ins->opcode == OP_ICONV_TO_R4)
4441 ppc_frsp (code, ins->dreg, ins->dreg);
4446 case OP_ATOMIC_CAS_I4:
4447 CASE_PPC64 (OP_ATOMIC_CAS_I8) {
4448 int location = ins->sreg1;
4449 int value = ins->sreg2;
4450 int comparand = ins->sreg3;
4451 guint8 *start, *not_equal, *lost_reservation;
4455 if (ins->opcode == OP_ATOMIC_CAS_I4)
4456 ppc_lwarx (code, ppc_r0, 0, location);
4457 #ifdef __mono_ppc64__
4459 ppc_ldarx (code, ppc_r0, 0, location);
4462 ppc_cmp (code, 0, ins->opcode == OP_ATOMIC_CAS_I4 ? 0 : 1, ppc_r0, comparand);
4464 ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 0);
4466 if (ins->opcode == OP_ATOMIC_CAS_I4)
4467 ppc_stwcxd (code, value, 0, location);
4468 #ifdef __mono_ppc64__
4470 ppc_stdcxd (code, value, 0, location);
4473 lost_reservation = code;
4474 ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 0);
4475 ppc_patch (lost_reservation, start);
4476 ppc_patch (not_equal, code);
4479 ppc_mr (code, ins->dreg, ppc_r0);
4484 g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
4485 g_assert_not_reached ();
4488 if ((cfg->opt & MONO_OPT_BRANCH) && ((code - cfg->native_code - offset) > max_len)) {
4489 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %ld)",
4490 mono_inst_name (ins->opcode), max_len, (glong)(code - cfg->native_code - offset));
4491 g_assert_not_reached ();
4497 last_offset = offset;
4500 cfg->code_len = code - cfg->native_code;
4502 #endif /* !DISABLE_JIT */
4505 mono_arch_register_lowlevel_calls (void)
4507 /* The signature doesn't matter */
4508 mono_register_jit_icall (mono_ppc_throw_exception, "mono_ppc_throw_exception", mono_create_icall_signature ("void"), TRUE);
4511 #ifdef __mono_ppc64__
4512 #define patch_load_sequence(ip,val) do {\
4513 guint16 *__load = (guint16*)(ip); \
4514 g_assert (sizeof (val) == sizeof (gsize)); \
4515 __load [1] = (((guint64)(gsize)(val)) >> 48) & 0xffff; \
4516 __load [3] = (((guint64)(gsize)(val)) >> 32) & 0xffff; \
4517 __load [7] = (((guint64)(gsize)(val)) >> 16) & 0xffff; \
4518 __load [9] = ((guint64)(gsize)(val)) & 0xffff; \
4521 #define patch_load_sequence(ip,val) do {\
4522 guint16 *__lis_ori = (guint16*)(ip); \
4523 __lis_ori [1] = (((gulong)(val)) >> 16) & 0xffff; \
4524 __lis_ori [3] = ((gulong)(val)) & 0xffff; \
4530 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, MonoCodeManager *dyn_code_mp, gboolean run_cctors)
4532 MonoJumpInfo *patch_info;
4533 gboolean compile_aot = !run_cctors;
4535 for (patch_info = ji; patch_info; patch_info = patch_info->next) {
4536 unsigned char *ip = patch_info->ip.i + code;
4537 unsigned char *target;
4538 gboolean is_fd = FALSE;
4540 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
4543 switch (patch_info->type) {
4544 case MONO_PATCH_INFO_BB:
4545 case MONO_PATCH_INFO_LABEL:
4548 /* No need to patch these */
4553 switch (patch_info->type) {
4554 case MONO_PATCH_INFO_IP:
4555 patch_load_sequence (ip, ip);
4557 case MONO_PATCH_INFO_METHOD_REL:
4558 g_assert_not_reached ();
4559 *((gpointer *)(ip)) = code + patch_info->data.offset;
4561 case MONO_PATCH_INFO_SWITCH: {
4562 gpointer *table = (gpointer *)patch_info->data.table->table;
4565 patch_load_sequence (ip, table);
4567 for (i = 0; i < patch_info->data.table->table_size; i++) {
4568 table [i] = (glong)patch_info->data.table->table [i] + code;
4570 /* we put into the table the absolute address, no need for ppc_patch in this case */
4573 case MONO_PATCH_INFO_METHODCONST:
4574 case MONO_PATCH_INFO_CLASS:
4575 case MONO_PATCH_INFO_IMAGE:
4576 case MONO_PATCH_INFO_FIELD:
4577 case MONO_PATCH_INFO_VTABLE:
4578 case MONO_PATCH_INFO_IID:
4579 case MONO_PATCH_INFO_SFLDA:
4580 case MONO_PATCH_INFO_LDSTR:
4581 case MONO_PATCH_INFO_TYPE_FROM_HANDLE:
4582 case MONO_PATCH_INFO_LDTOKEN:
4583 /* from OP_AOTCONST : lis + ori */
4584 patch_load_sequence (ip, target);
4586 case MONO_PATCH_INFO_R4:
4587 case MONO_PATCH_INFO_R8:
4588 g_assert_not_reached ();
4589 *((gconstpointer *)(ip + 2)) = patch_info->data.target;
4591 case MONO_PATCH_INFO_EXC_NAME:
4592 g_assert_not_reached ();
4593 *((gconstpointer *)(ip + 1)) = patch_info->data.name;
4595 case MONO_PATCH_INFO_NONE:
4596 case MONO_PATCH_INFO_BB_OVF:
4597 case MONO_PATCH_INFO_EXC_OVF:
4598 /* everything is dealt with at epilog output time */
4600 #ifdef PPC_USES_FUNCTION_DESCRIPTOR
4601 case MONO_PATCH_INFO_INTERNAL_METHOD:
4602 case MONO_PATCH_INFO_ABS:
4603 case MONO_PATCH_INFO_CLASS_INIT:
4604 case MONO_PATCH_INFO_RGCTX_FETCH:
4605 case MONO_PATCH_INFO_JIT_ICALL_ADDR:
4612 ppc_patch_full (ip, target, is_fd);
4617 * Emit code to save the registers in used_int_regs or the registers in the MonoLMF
4618 * structure at positive offset pos from register base_reg. pos is guaranteed to fit into
4619 * the instruction offset immediate for all the registers.
4622 save_registers (MonoCompile *cfg, guint8* code, int pos, int base_reg, gboolean save_lmf, guint32 used_int_regs, int cfa_offset)
4626 for (i = 13; i <= 31; i++) {
4627 if (used_int_regs & (1 << i)) {
4628 ppc_str (code, i, pos, base_reg);
4629 mono_emit_unwind_op_offset (cfg, code, i, pos - cfa_offset);
4630 pos += sizeof (mgreg_t);
4634 /* pos is the start of the MonoLMF structure */
4635 int offset = pos + G_STRUCT_OFFSET (MonoLMF, iregs);
4636 for (i = 13; i <= 31; i++) {
4637 ppc_str (code, i, offset, base_reg);
4638 mono_emit_unwind_op_offset (cfg, code, i, offset - cfa_offset);
4639 offset += sizeof (mgreg_t);
4641 offset = pos + G_STRUCT_OFFSET (MonoLMF, fregs);
4642 for (i = 14; i < 32; i++) {
4643 ppc_stfd (code, i, offset, base_reg);
4644 offset += sizeof (gdouble);
4651 * Stack frame layout:
4653 * ------------------- sp
4654 * MonoLMF structure or saved registers
4655 * -------------------
4657 * -------------------
4659 * -------------------
4660 * optional 8 bytes for tracing
4661 * -------------------
4662 * param area size is cfg->param_area
4663 * -------------------
4664 * linkage area size is PPC_STACK_PARAM_OFFSET
4665 * ------------------- sp
4669 mono_arch_emit_prolog (MonoCompile *cfg)
4671 MonoMethod *method = cfg->method;
4673 MonoMethodSignature *sig;
4675 long alloc_size, pos, max_offset, cfa_offset;
4681 int tailcall_struct_index;
4683 if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
4686 sig = mono_method_signature (method);
4687 cfg->code_size = 512 + sig->param_count * 32;
4688 code = cfg->native_code = g_malloc (cfg->code_size);
4692 /* We currently emit unwind info for aot, but don't use it */
4693 mono_emit_unwind_op_def_cfa (cfg, code, ppc_r1, 0);
4695 if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
4696 ppc_mflr (code, ppc_r0);
4697 ppc_str (code, ppc_r0, PPC_RET_ADDR_OFFSET, ppc_sp);
4698 mono_emit_unwind_op_offset (cfg, code, ppc_lr, PPC_RET_ADDR_OFFSET);
4701 alloc_size = cfg->stack_offset;
4704 if (!method->save_lmf) {
4705 for (i = 31; i >= 13; --i) {
4706 if (cfg->used_int_regs & (1 << i)) {
4707 pos += sizeof (mgreg_t);
4711 pos += sizeof (MonoLMF);
4715 // align to MONO_ARCH_FRAME_ALIGNMENT bytes
4716 if (alloc_size & (MONO_ARCH_FRAME_ALIGNMENT - 1)) {
4717 alloc_size += MONO_ARCH_FRAME_ALIGNMENT - 1;
4718 alloc_size &= ~(MONO_ARCH_FRAME_ALIGNMENT - 1);
4721 cfg->stack_usage = alloc_size;
4722 g_assert ((alloc_size & (MONO_ARCH_FRAME_ALIGNMENT-1)) == 0);
4724 if (ppc_is_imm16 (-alloc_size)) {
4725 ppc_str_update (code, ppc_sp, -alloc_size, ppc_sp);
4726 cfa_offset = alloc_size;
4727 mono_emit_unwind_op_def_cfa_offset (cfg, code, alloc_size);
4728 code = save_registers (cfg, code, alloc_size - pos, ppc_sp, method->save_lmf, cfg->used_int_regs, cfa_offset);
4731 ppc_addi (code, ppc_r11, ppc_sp, -pos);
4732 ppc_load (code, ppc_r0, -alloc_size);
4733 ppc_str_update_indexed (code, ppc_sp, ppc_sp, ppc_r0);
4734 cfa_offset = alloc_size;
4735 mono_emit_unwind_op_def_cfa_offset (cfg, code, alloc_size);
4736 code = save_registers (cfg, code, 0, ppc_r11, method->save_lmf, cfg->used_int_regs, cfa_offset);
4739 if (cfg->frame_reg != ppc_sp) {
4740 ppc_mr (code, cfg->frame_reg, ppc_sp);
4741 mono_emit_unwind_op_def_cfa_reg (cfg, code, cfg->frame_reg);
4744 /* store runtime generic context */
4745 if (cfg->rgctx_var) {
4746 g_assert (cfg->rgctx_var->opcode == OP_REGOFFSET &&
4747 (cfg->rgctx_var->inst_basereg == ppc_r1 || cfg->rgctx_var->inst_basereg == ppc_r31));
4749 ppc_stptr (code, MONO_ARCH_RGCTX_REG, cfg->rgctx_var->inst_offset, cfg->rgctx_var->inst_basereg);
4752 /* compute max_offset in order to use short forward jumps
4753 * we always do it on ppc because the immediate displacement
4754 * for jumps is too small
4757 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
4759 bb->max_offset = max_offset;
4761 if (cfg->prof_options & MONO_PROFILE_COVERAGE)
4764 MONO_BB_FOR_EACH_INS (bb, ins)
4765 max_offset += ins_native_length (cfg, ins);
4768 /* load arguments allocated to register from the stack */
4771 cinfo = get_call_info (cfg->generic_sharing_context, sig);
4773 if (MONO_TYPE_ISSTRUCT (sig->ret)) {
4774 ArgInfo *ainfo = &cinfo->ret;
4776 inst = cfg->vret_addr;
4779 if (ppc_is_imm16 (inst->inst_offset)) {
4780 ppc_stptr (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
4782 ppc_load (code, ppc_r11, inst->inst_offset);
4783 ppc_stptr_indexed (code, ainfo->reg, ppc_r11, inst->inst_basereg);
4787 tailcall_struct_index = 0;
4788 for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
4789 ArgInfo *ainfo = cinfo->args + i;
4790 inst = cfg->args [pos];
4792 if (cfg->verbose_level > 2)
4793 g_print ("Saving argument %d (type: %d)\n", i, ainfo->regtype);
4794 if (inst->opcode == OP_REGVAR) {
4795 if (ainfo->regtype == RegTypeGeneral)
4796 ppc_mr (code, inst->dreg, ainfo->reg);
4797 else if (ainfo->regtype == RegTypeFP)
4798 ppc_fmr (code, inst->dreg, ainfo->reg);
4799 else if (ainfo->regtype == RegTypeBase) {
4800 ppc_ldr (code, ppc_r11, 0, ppc_sp);
4801 ppc_ldptr (code, inst->dreg, ainfo->offset, ppc_r11);
4803 g_assert_not_reached ();
4805 if (cfg->verbose_level > 2)
4806 g_print ("Argument %ld assigned to register %s\n", pos, mono_arch_regname (inst->dreg));
4808 /* the argument should be put on the stack: FIXME handle size != word */
4809 if (ainfo->regtype == RegTypeGeneral) {
4810 switch (ainfo->size) {
4812 if (ppc_is_imm16 (inst->inst_offset)) {
4813 ppc_stb (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
4815 if (ppc_is_imm32 (inst->inst_offset)) {
4816 ppc_addis (code, ppc_r11, inst->inst_basereg, ppc_ha(inst->inst_offset));
4817 ppc_stb (code, ainfo->reg, inst->inst_offset, ppc_r11);
4819 ppc_load (code, ppc_r11, inst->inst_offset);
4820 ppc_stbx (code, ainfo->reg, inst->inst_basereg, ppc_r11);
4825 if (ppc_is_imm16 (inst->inst_offset)) {
4826 ppc_sth (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
4828 if (ppc_is_imm32 (inst->inst_offset)) {
4829 ppc_addis (code, ppc_r11, inst->inst_basereg, ppc_ha(inst->inst_offset));
4830 ppc_sth (code, ainfo->reg, inst->inst_offset, ppc_r11);
4832 ppc_load (code, ppc_r11, inst->inst_offset);
4833 ppc_sthx (code, ainfo->reg, inst->inst_basereg, ppc_r11);
4837 #ifdef __mono_ppc64__
4839 if (ppc_is_imm16 (inst->inst_offset)) {
4840 ppc_stw (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
4842 if (ppc_is_imm32 (inst->inst_offset)) {
4843 ppc_addis (code, ppc_r11, inst->inst_basereg, ppc_ha(inst->inst_offset));
4844 ppc_stw (code, ainfo->reg, inst->inst_offset, ppc_r11);
4846 ppc_load (code, ppc_r11, inst->inst_offset);
4847 ppc_stwx (code, ainfo->reg, inst->inst_basereg, ppc_r11);
4852 if (ppc_is_imm16 (inst->inst_offset)) {
4853 ppc_str (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
4855 ppc_load (code, ppc_r11, inst->inst_offset);
4856 ppc_str_indexed (code, ainfo->reg, ppc_r11, inst->inst_basereg);
4861 if (ppc_is_imm16 (inst->inst_offset + 4)) {
4862 ppc_stw (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
4863 ppc_stw (code, ainfo->reg + 1, inst->inst_offset + 4, inst->inst_basereg);
4865 ppc_addis (code, ppc_r11, inst->inst_basereg, ppc_ha(inst->inst_offset));
4866 ppc_addi (code, ppc_r11, ppc_r11, inst->inst_offset);
4867 ppc_stw (code, ainfo->reg, 0, ppc_r11);
4868 ppc_stw (code, ainfo->reg + 1, 4, ppc_r11);
4873 if (ppc_is_imm16 (inst->inst_offset)) {
4874 ppc_stptr (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
4876 if (ppc_is_imm32 (inst->inst_offset)) {
4877 ppc_addis (code, ppc_r11, inst->inst_basereg, ppc_ha(inst->inst_offset));
4878 ppc_stptr (code, ainfo->reg, inst->inst_offset, ppc_r11);
4880 ppc_load (code, ppc_r11, inst->inst_offset);
4881 ppc_stptr_indexed (code, ainfo->reg, inst->inst_basereg, ppc_r11);
4886 } else if (ainfo->regtype == RegTypeBase) {
4887 g_assert (ppc_is_imm16 (ainfo->offset));
4888 /* load the previous stack pointer in r11 */
4889 ppc_ldr (code, ppc_r11, 0, ppc_sp);
4890 ppc_ldptr (code, ppc_r0, ainfo->offset, ppc_r11);
4891 switch (ainfo->size) {
4893 if (ppc_is_imm16 (inst->inst_offset)) {
4894 ppc_stb (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
4896 if (ppc_is_imm32 (inst->inst_offset)) {
4897 ppc_addis (code, ppc_r11, inst->inst_basereg, ppc_ha(inst->inst_offset));
4898 ppc_stb (code, ppc_r0, inst->inst_offset, ppc_r11);
4900 ppc_load (code, ppc_r11, inst->inst_offset);
4901 ppc_stbx (code, ppc_r0, inst->inst_basereg, ppc_r11);
4906 if (ppc_is_imm16 (inst->inst_offset)) {
4907 ppc_sth (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
4909 if (ppc_is_imm32 (inst->inst_offset)) {
4910 ppc_addis (code, ppc_r11, inst->inst_basereg, ppc_ha(inst->inst_offset));
4911 ppc_sth (code, ppc_r0, inst->inst_offset, ppc_r11);
4913 ppc_load (code, ppc_r11, inst->inst_offset);
4914 ppc_sthx (code, ppc_r0, inst->inst_basereg, ppc_r11);
4918 #ifdef __mono_ppc64__
4920 if (ppc_is_imm16 (inst->inst_offset)) {
4921 ppc_stw (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
4923 if (ppc_is_imm32 (inst->inst_offset)) {
4924 ppc_addis (code, ppc_r11, inst->inst_basereg, ppc_ha(inst->inst_offset));
4925 ppc_stw (code, ppc_r0, inst->inst_offset, ppc_r11);
4927 ppc_load (code, ppc_r11, inst->inst_offset);
4928 ppc_stwx (code, ppc_r0, inst->inst_basereg, ppc_r11);
4933 if (ppc_is_imm16 (inst->inst_offset)) {
4934 ppc_str (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
4936 ppc_load (code, ppc_r11, inst->inst_offset);
4937 ppc_str_indexed (code, ppc_r0, ppc_r11, inst->inst_basereg);
4942 g_assert (ppc_is_imm16 (ainfo->offset + 4));
4943 if (ppc_is_imm16 (inst->inst_offset + 4)) {
4944 ppc_stw (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
4945 ppc_lwz (code, ppc_r0, ainfo->offset + 4, ppc_r11);
4946 ppc_stw (code, ppc_r0, inst->inst_offset + 4, inst->inst_basereg);
4948 /* use r12 to load the 2nd half of the long before we clobber r11. */
4949 ppc_lwz (code, ppc_r12, ainfo->offset + 4, ppc_r11);
4950 ppc_addis (code, ppc_r11, inst->inst_basereg, ppc_ha(inst->inst_offset));
4951 ppc_addi (code, ppc_r11, ppc_r11, inst->inst_offset);
4952 ppc_stw (code, ppc_r0, 0, ppc_r11);
4953 ppc_stw (code, ppc_r12, 4, ppc_r11);
4958 if (ppc_is_imm16 (inst->inst_offset)) {
4959 ppc_stptr (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
4961 if (ppc_is_imm32 (inst->inst_offset)) {
4962 ppc_addis (code, ppc_r11, inst->inst_basereg, ppc_ha(inst->inst_offset));
4963 ppc_stptr (code, ppc_r0, inst->inst_offset, ppc_r11);
4965 ppc_load (code, ppc_r11, inst->inst_offset);
4966 ppc_stptr_indexed (code, ppc_r0, inst->inst_basereg, ppc_r11);
4971 } else if (ainfo->regtype == RegTypeFP) {
4972 g_assert (ppc_is_imm16 (inst->inst_offset));
4973 if (ainfo->size == 8)
4974 ppc_stfd (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
4975 else if (ainfo->size == 4)
4976 ppc_stfs (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
4978 g_assert_not_reached ();
4979 } else if (ainfo->regtype == RegTypeStructByVal) {
4980 int doffset = inst->inst_offset;
4984 g_assert (ppc_is_imm16 (inst->inst_offset));
4985 g_assert (ppc_is_imm16 (inst->inst_offset + ainfo->vtregs * sizeof (gpointer)));
4986 /* FIXME: what if there is no class? */
4987 if (sig->pinvoke && mono_class_from_mono_type (inst->inst_vtype))
4988 size = mono_class_native_size (mono_class_from_mono_type (inst->inst_vtype), NULL);
4989 for (cur_reg = 0; cur_reg < ainfo->vtregs; ++cur_reg) {
4992 * Darwin handles 1 and 2 byte
4993 * structs specially by
4994 * loading h/b into the arg
4995 * register. Only done for
4999 ppc_sth (code, ainfo->reg + cur_reg, doffset, inst->inst_basereg);
5001 ppc_stb (code, ainfo->reg + cur_reg, doffset, inst->inst_basereg);
5005 #ifdef __mono_ppc64__
5007 g_assert (cur_reg == 0);
5008 ppc_sldi (code, ppc_r0, ainfo->reg,
5009 (sizeof (gpointer) - ainfo->bytes) * 8);
5010 ppc_stptr (code, ppc_r0, doffset, inst->inst_basereg);
5014 ppc_stptr (code, ainfo->reg + cur_reg, doffset,
5015 inst->inst_basereg);
5018 soffset += sizeof (gpointer);
5019 doffset += sizeof (gpointer);
5021 if (ainfo->vtsize) {
5022 /* FIXME: we need to do the shifting here, too */
5025 /* load the previous stack pointer in r11 (r0 gets overwritten by the memcpy) */
5026 ppc_ldr (code, ppc_r11, 0, ppc_sp);
5027 if ((size & MONO_PPC_32_64_CASE (3, 7)) != 0) {
5028 code = emit_memcpy (code, size - soffset,
5029 inst->inst_basereg, doffset,
5030 ppc_r11, ainfo->offset + soffset);
5032 code = emit_memcpy (code, ainfo->vtsize * sizeof (gpointer),
5033 inst->inst_basereg, doffset,
5034 ppc_r11, ainfo->offset + soffset);
5037 } else if (ainfo->regtype == RegTypeStructByAddr) {
5038 /* if it was originally a RegTypeBase */
5039 if (ainfo->offset) {
5040 /* load the previous stack pointer in r11 */
5041 ppc_ldr (code, ppc_r11, 0, ppc_sp);
5042 ppc_ldptr (code, ppc_r11, ainfo->offset, ppc_r11);
5044 ppc_mr (code, ppc_r11, ainfo->reg);
5047 if (cfg->tailcall_valuetype_addrs) {
5048 MonoInst *addr = cfg->tailcall_valuetype_addrs [tailcall_struct_index];
5050 g_assert (ppc_is_imm16 (addr->inst_offset));
5051 ppc_stptr (code, ppc_r11, addr->inst_offset, addr->inst_basereg);
5053 tailcall_struct_index++;
5056 g_assert (ppc_is_imm16 (inst->inst_offset));
5057 code = emit_memcpy (code, ainfo->vtsize, inst->inst_basereg, inst->inst_offset, ppc_r11, 0);
5058 /*g_print ("copy in %s: %d bytes from %d to offset: %d\n", method->name, ainfo->vtsize, ainfo->reg, inst->inst_offset);*/
5060 g_assert_not_reached ();
5065 if (method->save_lmf) {
5066 if (lmf_pthread_key != -1) {
5067 emit_tls_access (code, ppc_r3, lmf_pthread_key);
5068 if (tls_mode != TLS_MODE_NPTL && G_STRUCT_OFFSET (MonoJitTlsData, lmf))
5069 ppc_addi (code, ppc_r3, ppc_r3, G_STRUCT_OFFSET (MonoJitTlsData, lmf));
5071 if (cfg->compile_aot) {
5072 /* Compute the got address which is needed by the PLT entry */
5073 code = mono_arch_emit_load_got_addr (cfg->native_code, code, cfg, NULL);
5075 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
5076 (gpointer)"mono_get_lmf_addr");
5077 if ((FORCE_INDIR_CALL || cfg->method->dynamic) && !cfg->compile_aot) {
5078 ppc_load_func (code, ppc_r0, 0);
5079 ppc_mtlr (code, ppc_r0);
5085 /* we build the MonoLMF structure on the stack - see mini-ppc.h */
5086 /* lmf_offset is the offset from the previous stack pointer,
5087 * alloc_size is the total stack space allocated, so the offset
5088 * of MonoLMF from the current stack ptr is alloc_size - lmf_offset.
5089 * The pointer to the struct is put in ppc_r11 (new_lmf).
5090 * The callee-saved registers are already in the MonoLMF structure
5092 ppc_addi (code, ppc_r11, ppc_sp, alloc_size - lmf_offset);
5093 /* ppc_r3 is the result from mono_get_lmf_addr () */
5094 ppc_stptr (code, ppc_r3, G_STRUCT_OFFSET(MonoLMF, lmf_addr), ppc_r11);
5095 /* new_lmf->previous_lmf = *lmf_addr */
5096 ppc_ldptr (code, ppc_r0, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r3);
5097 ppc_stptr (code, ppc_r0, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r11);
5098 /* *(lmf_addr) = r11 */
5099 ppc_stptr (code, ppc_r11, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r3);
5100 /* save method info */
5101 if (cfg->compile_aot)
5103 ppc_load (code, ppc_r0, 0);
5105 ppc_load_ptr (code, ppc_r0, method);
5106 ppc_stptr (code, ppc_r0, G_STRUCT_OFFSET(MonoLMF, method), ppc_r11);
5107 ppc_stptr (code, ppc_sp, G_STRUCT_OFFSET(MonoLMF, ebp), ppc_r11);
5108 /* save the current IP */
5109 if (cfg->compile_aot) {
5111 ppc_mflr (code, ppc_r0);
5113 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
5114 #ifdef __mono_ppc64__
5115 ppc_load_sequence (code, ppc_r0, (guint64)0x0101010101010101LL);
5117 ppc_load_sequence (code, ppc_r0, (gulong)0x01010101L);
5120 ppc_stptr (code, ppc_r0, G_STRUCT_OFFSET(MonoLMF, eip), ppc_r11);
5124 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
5126 cfg->code_len = code - cfg->native_code;
5127 g_assert (cfg->code_len <= cfg->code_size);
5134 mono_arch_emit_epilog (MonoCompile *cfg)
5136 MonoMethod *method = cfg->method;
5138 int max_epilog_size = 16 + 20*4;
5141 if (cfg->method->save_lmf)
5142 max_epilog_size += 128;
5144 if (mono_jit_trace_calls != NULL)
5145 max_epilog_size += 50;
5147 if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
5148 max_epilog_size += 50;
5150 while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
5151 cfg->code_size *= 2;
5152 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
5153 cfg->stat_code_reallocs++;
5157 * Keep in sync with OP_JMP
5159 code = cfg->native_code + cfg->code_len;
5161 if (mono_jit_trace_calls != NULL && mono_trace_eval (method)) {
5162 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
5166 if (method->save_lmf) {
5168 pos += sizeof (MonoLMF);
5170 /* save the frame reg in r8 */
5171 ppc_mr (code, ppc_r8, cfg->frame_reg);
5172 ppc_addi (code, ppc_r11, cfg->frame_reg, cfg->stack_usage - lmf_offset);
5173 /* r5 = previous_lmf */
5174 ppc_ldptr (code, ppc_r5, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r11);
5176 ppc_ldptr (code, ppc_r6, G_STRUCT_OFFSET(MonoLMF, lmf_addr), ppc_r11);
5177 /* *(lmf_addr) = previous_lmf */
5178 ppc_stptr (code, ppc_r5, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r6);
5179 /* FIXME: speedup: there is no actual need to restore the registers if
5180 * we didn't actually change them (idea from Zoltan).
5183 ppc_ldr_multiple (code, ppc_r13, G_STRUCT_OFFSET(MonoLMF, iregs), ppc_r11);
5185 /*for (i = 14; i < 32; i++) {
5186 ppc_lfd (code, i, G_STRUCT_OFFSET(MonoLMF, fregs) + ((i-14) * sizeof (gdouble)), ppc_r11);
5188 g_assert (ppc_is_imm16 (cfg->stack_usage + PPC_RET_ADDR_OFFSET));
5189 /* use the saved copy of the frame reg in r8 */
5190 if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
5191 ppc_ldr (code, ppc_r0, cfg->stack_usage + PPC_RET_ADDR_OFFSET, ppc_r8);
5192 ppc_mtlr (code, ppc_r0);
5194 ppc_addic (code, ppc_sp, ppc_r8, cfg->stack_usage);
5196 if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
5197 long return_offset = cfg->stack_usage + PPC_RET_ADDR_OFFSET;
5198 if (ppc_is_imm16 (return_offset)) {
5199 ppc_ldr (code, ppc_r0, return_offset, cfg->frame_reg);
5201 ppc_load (code, ppc_r11, return_offset);
5202 ppc_ldr_indexed (code, ppc_r0, cfg->frame_reg, ppc_r11);
5204 ppc_mtlr (code, ppc_r0);
5206 if (ppc_is_imm16 (cfg->stack_usage)) {
5207 int offset = cfg->stack_usage;
5208 for (i = 13; i <= 31; i++) {
5209 if (cfg->used_int_regs & (1 << i))
5210 offset -= sizeof (mgreg_t);
5212 if (cfg->frame_reg != ppc_sp)
5213 ppc_mr (code, ppc_r11, cfg->frame_reg);
5214 /* note r31 (possibly the frame register) is restored last */
5215 for (i = 13; i <= 31; i++) {
5216 if (cfg->used_int_regs & (1 << i)) {
5217 ppc_ldr (code, i, offset, cfg->frame_reg);
5218 offset += sizeof (mgreg_t);
5221 if (cfg->frame_reg != ppc_sp)
5222 ppc_addi (code, ppc_sp, ppc_r11, cfg->stack_usage);
5224 ppc_addi (code, ppc_sp, ppc_sp, cfg->stack_usage);
5226 ppc_load32 (code, ppc_r11, cfg->stack_usage);
5227 if (cfg->used_int_regs) {
5228 ppc_add (code, ppc_r11, cfg->frame_reg, ppc_r11);
5229 for (i = 31; i >= 13; --i) {
5230 if (cfg->used_int_regs & (1 << i)) {
5231 pos += sizeof (mgreg_t);
5232 ppc_ldr (code, i, -pos, ppc_r11);
5235 ppc_mr (code, ppc_sp, ppc_r11);
5237 ppc_add (code, ppc_sp, cfg->frame_reg, ppc_r11);
5244 cfg->code_len = code - cfg->native_code;
5246 g_assert (cfg->code_len < cfg->code_size);
5249 #endif /* ifndef DISABLE_JIT */
5251 /* remove once throw_exception_by_name is eliminated */
5253 exception_id_by_name (const char *name)
5255 if (strcmp (name, "IndexOutOfRangeException") == 0)
5256 return MONO_EXC_INDEX_OUT_OF_RANGE;
5257 if (strcmp (name, "OverflowException") == 0)
5258 return MONO_EXC_OVERFLOW;
5259 if (strcmp (name, "ArithmeticException") == 0)
5260 return MONO_EXC_ARITHMETIC;
5261 if (strcmp (name, "DivideByZeroException") == 0)
5262 return MONO_EXC_DIVIDE_BY_ZERO;
5263 if (strcmp (name, "InvalidCastException") == 0)
5264 return MONO_EXC_INVALID_CAST;
5265 if (strcmp (name, "NullReferenceException") == 0)
5266 return MONO_EXC_NULL_REF;
5267 if (strcmp (name, "ArrayTypeMismatchException") == 0)
5268 return MONO_EXC_ARRAY_TYPE_MISMATCH;
5269 if (strcmp (name, "ArgumentException") == 0)
5270 return MONO_EXC_ARGUMENT;
5271 g_error ("Unknown intrinsic exception %s\n", name);
5277 mono_arch_emit_exceptions (MonoCompile *cfg)
5279 MonoJumpInfo *patch_info;
5282 guint8* exc_throw_pos [MONO_EXC_INTRINS_NUM];
5283 guint8 exc_throw_found [MONO_EXC_INTRINS_NUM];
5284 int max_epilog_size = 50;
5286 for (i = 0; i < MONO_EXC_INTRINS_NUM; i++) {
5287 exc_throw_pos [i] = NULL;
5288 exc_throw_found [i] = 0;
5291 /* count the number of exception infos */
5294 * make sure we have enough space for exceptions
5296 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
5297 if (patch_info->type == MONO_PATCH_INFO_EXC) {
5298 i = exception_id_by_name (patch_info->data.target);
5299 if (!exc_throw_found [i]) {
5300 max_epilog_size += (2 * PPC_LOAD_SEQUENCE_LENGTH) + 5 * 4;
5301 exc_throw_found [i] = TRUE;
5303 } else if (patch_info->type == MONO_PATCH_INFO_BB_OVF)
5304 max_epilog_size += 12;
5305 else if (patch_info->type == MONO_PATCH_INFO_EXC_OVF) {
5306 MonoOvfJump *ovfj = (MonoOvfJump*)patch_info->data.target;
5307 i = exception_id_by_name (ovfj->data.exception);
5308 if (!exc_throw_found [i]) {
5309 max_epilog_size += (2 * PPC_LOAD_SEQUENCE_LENGTH) + 5 * 4;
5310 exc_throw_found [i] = TRUE;
5312 max_epilog_size += 8;
5316 while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
5317 cfg->code_size *= 2;
5318 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
5319 cfg->stat_code_reallocs++;
5322 code = cfg->native_code + cfg->code_len;
5324 /* add code to raise exceptions */
5325 for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
5326 switch (patch_info->type) {
5327 case MONO_PATCH_INFO_BB_OVF: {
5328 MonoOvfJump *ovfj = (MonoOvfJump*)patch_info->data.target;
5329 unsigned char *ip = patch_info->ip.i + cfg->native_code;
5330 /* patch the initial jump */
5331 ppc_patch (ip, code);
5332 ppc_bc (code, ovfj->b0_cond, ovfj->b1_cond, 2);
5334 ppc_patch (code - 4, ip + 4); /* jump back after the initiali branch */
5335 /* jump back to the true target */
5337 ip = ovfj->data.bb->native_offset + cfg->native_code;
5338 ppc_patch (code - 4, ip);
5339 patch_info->type = MONO_PATCH_INFO_NONE;
5342 case MONO_PATCH_INFO_EXC_OVF: {
5343 MonoOvfJump *ovfj = (MonoOvfJump*)patch_info->data.target;
5344 MonoJumpInfo *newji;
5345 unsigned char *ip = patch_info->ip.i + cfg->native_code;
5346 unsigned char *bcl = code;
5347 /* patch the initial jump: we arrived here with a call */
5348 ppc_patch (ip, code);
5349 ppc_bc (code, ovfj->b0_cond, ovfj->b1_cond, 0);
5351 ppc_patch (code - 4, ip + 4); /* jump back after the initiali branch */
5352 /* patch the conditional jump to the right handler */
5353 /* make it processed next */
5354 newji = mono_mempool_alloc (cfg->mempool, sizeof (MonoJumpInfo));
5355 newji->type = MONO_PATCH_INFO_EXC;
5356 newji->ip.i = bcl - cfg->native_code;
5357 newji->data.target = ovfj->data.exception;
5358 newji->next = patch_info->next;
5359 patch_info->next = newji;
5360 patch_info->type = MONO_PATCH_INFO_NONE;
5363 case MONO_PATCH_INFO_EXC: {
5364 MonoClass *exc_class;
5366 unsigned char *ip = patch_info->ip.i + cfg->native_code;
5367 i = exception_id_by_name (patch_info->data.target);
5368 if (exc_throw_pos [i] && !(ip > exc_throw_pos [i] && ip - exc_throw_pos [i] > 50000)) {
5369 ppc_patch (ip, exc_throw_pos [i]);
5370 patch_info->type = MONO_PATCH_INFO_NONE;
5373 exc_throw_pos [i] = code;
5376 exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
5377 g_assert (exc_class);
5379 ppc_patch (ip, code);
5380 /*mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC_NAME, patch_info->data.target);*/
5381 ppc_load (code, ppc_r3, exc_class->type_token);
5382 /* we got here from a conditional call, so the calling ip is set in lr */
5383 ppc_mflr (code, ppc_r4);
5384 patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
5385 patch_info->data.name = "mono_arch_throw_corlib_exception";
5386 patch_info->ip.i = code - cfg->native_code;
5387 if (FORCE_INDIR_CALL || cfg->method->dynamic) {
5388 ppc_load_func (code, ppc_r0, 0);
5389 ppc_mtctr (code, ppc_r0);
5390 ppc_bcctr (code, PPC_BR_ALWAYS, 0);
5402 cfg->code_len = code - cfg->native_code;
5404 g_assert (cfg->code_len <= cfg->code_size);
5410 try_offset_access (void *value, guint32 idx)
5412 register void* me __asm__ ("r2");
5413 void ***p = (void***)((char*)me + 284);
5414 int idx1 = idx / 32;
5415 int idx2 = idx % 32;
5418 if (value != p[idx1][idx2])
5425 setup_tls_access (void)
5427 #if defined(__linux__) && defined(_CS_GNU_LIBPTHREAD_VERSION)
5428 size_t conf_size = 0;
5431 /* FIXME for darwin */
5432 guint32 *ins, *code;
5433 guint32 cmplwi_1023, li_0x48, blr_ins;
5437 tls_mode = TLS_MODE_FAILED;
5440 if (tls_mode == TLS_MODE_FAILED)
5442 if (g_getenv ("MONO_NO_TLS")) {
5443 tls_mode = TLS_MODE_FAILED;
5447 if (tls_mode == TLS_MODE_DETECT) {
5448 #if defined(__APPLE__) && defined(__mono_ppc__) && !defined(__mono_ppc64__)
5449 tls_mode = TLS_MODE_DARWIN_G4;
5450 #elif defined(__linux__) && defined(_CS_GNU_LIBPTHREAD_VERSION)
5451 conf_size = confstr ( _CS_GNU_LIBPTHREAD_VERSION, confbuf, sizeof(confbuf));
5452 if ((conf_size > 4) && (strncmp (confbuf, "NPTL", 4) == 0))
5453 tls_mode = TLS_MODE_NPTL;
5454 #elif !defined(TARGET_PS3)
5455 ins = (guint32*)pthread_getspecific;
5456 /* uncond branch to the real method */
5457 if ((*ins >> 26) == 18) {
5459 val = (*ins & ~3) << 6;
5463 ins = (guint32*)(long)val;
5465 ins = (guint32*) ((char*)ins + val);
5468 code = &cmplwi_1023;
5469 ppc_cmpli (code, 0, 0, ppc_r3, 1023);
5471 ppc_li (code, ppc_r4, 0x48);
5474 if (*ins == cmplwi_1023) {
5475 int found_lwz_284 = 0;
5477 for (ptk = 0; ptk < 20; ++ptk) {
5479 if (!*ins || *ins == blr_ins)
5481 if ((guint16)*ins == 284 && (*ins >> 26) == 32) {
5486 if (!found_lwz_284) {
5487 tls_mode = TLS_MODE_FAILED;
5490 tls_mode = TLS_MODE_LTHREADS;
5491 } else if (*ins == li_0x48) {
5493 /* uncond branch to the real method */
5494 if ((*ins >> 26) == 18) {
5496 val = (*ins & ~3) << 6;
5500 ins = (guint32*)(long)val;
5502 ins = (guint32*) ((char*)ins + val);
5504 code = (guint32*)&val;
5505 ppc_li (code, ppc_r0, 0x7FF2);
5506 if (ins [1] == val) {
5507 /* Darwin on G4, implement */
5508 tls_mode = TLS_MODE_FAILED;
5511 code = (guint32*)&val;
5512 ppc_mfspr (code, ppc_r3, 104);
5513 if (ins [1] != val) {
5514 tls_mode = TLS_MODE_FAILED;
5517 tls_mode = TLS_MODE_DARWIN_G5;
5520 tls_mode = TLS_MODE_FAILED;
5524 tls_mode = TLS_MODE_FAILED;
5530 if (tls_mode == TLS_MODE_DETECT)
5531 tls_mode = TLS_MODE_FAILED;
5532 if (tls_mode == TLS_MODE_FAILED)
5534 if ((lmf_pthread_key == -1) && (tls_mode == TLS_MODE_NPTL)) {
5535 lmf_pthread_key = mono_get_lmf_addr_tls_offset();
5539 /* if not TLS_MODE_NPTL or local dynamic (as indicated by
5540 mono_get_lmf_addr_tls_offset returning -1) then use keyed access. */
5541 if (lmf_pthread_key == -1) {
5542 guint32 ptk = mono_jit_tls_id;
5544 /*g_print ("MonoLMF at: %d\n", ptk);*/
5545 /*if (!try_offset_access (mono_get_lmf_addr (), ptk)) {
5546 init_tls_failed = 1;
5549 lmf_pthread_key = ptk;
5558 mono_arch_finish_init (void)
5560 setup_tls_access ();
5564 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
5568 #define CMP_SIZE (PPC_LOAD_SEQUENCE_LENGTH + 4)
5570 #define LOADSTORE_SIZE 4
5571 #define JUMP_IMM_SIZE 12
5572 #define JUMP_IMM32_SIZE (PPC_LOAD_SEQUENCE_LENGTH + 8)
5573 #define ENABLE_WRONG_METHOD_CHECK 0
5576 * LOCKING: called with the domain lock held
5579 mono_arch_build_imt_thunk (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count,
5580 gpointer fail_tramp)
5584 guint8 *code, *start;
5586 for (i = 0; i < count; ++i) {
5587 MonoIMTCheckItem *item = imt_entries [i];
5588 if (item->is_equals) {
5589 if (item->check_target_idx) {
5590 if (!item->compare_done)
5591 item->chunk_size += CMP_SIZE;
5592 if (item->has_target_code)
5593 item->chunk_size += BR_SIZE + JUMP_IMM32_SIZE;
5595 item->chunk_size += LOADSTORE_SIZE + BR_SIZE + JUMP_IMM_SIZE;
5598 item->chunk_size += CMP_SIZE + BR_SIZE + JUMP_IMM32_SIZE * 2;
5599 if (!item->has_target_code)
5600 item->chunk_size += LOADSTORE_SIZE;
5602 item->chunk_size += LOADSTORE_SIZE + JUMP_IMM_SIZE;
5603 #if ENABLE_WRONG_METHOD_CHECK
5604 item->chunk_size += CMP_SIZE + BR_SIZE + 4;
5609 item->chunk_size += CMP_SIZE + BR_SIZE;
5610 imt_entries [item->check_target_idx]->compare_done = TRUE;
5612 size += item->chunk_size;
5614 /* the initial load of the vtable address */
5615 size += PPC_LOAD_SEQUENCE_LENGTH + LOADSTORE_SIZE;
5617 code = mono_method_alloc_generic_virtual_thunk (domain, size);
5619 code = mono_domain_code_reserve (domain, size);
5624 * We need to save and restore r11 because it might be
5625 * used by the caller as the vtable register, so
5626 * clobbering it will trip up the magic trampoline.
5628 * FIXME: Get rid of this by making sure that r11 is
5629 * not used as the vtable register in interface calls.
5631 ppc_stptr (code, ppc_r11, PPC_RET_ADDR_OFFSET, ppc_sp);
5632 ppc_load (code, ppc_r11, (gsize)(& (vtable->vtable [0])));
5634 for (i = 0; i < count; ++i) {
5635 MonoIMTCheckItem *item = imt_entries [i];
5636 item->code_target = code;
5637 if (item->is_equals) {
5638 if (item->check_target_idx) {
5639 if (!item->compare_done) {
5640 ppc_load (code, ppc_r0, (gsize)item->key);
5641 ppc_compare_log (code, 0, MONO_ARCH_IMT_REG, ppc_r0);
5643 item->jmp_code = code;
5644 ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 0);
5645 if (item->has_target_code) {
5646 ppc_load_ptr (code, ppc_r0, item->value.target_code);
5648 ppc_ldptr (code, ppc_r0, (sizeof (gpointer) * item->value.vtable_slot), ppc_r11);
5649 ppc_ldptr (code, ppc_r11, PPC_RET_ADDR_OFFSET, ppc_sp);
5651 ppc_mtctr (code, ppc_r0);
5652 ppc_bcctr (code, PPC_BR_ALWAYS, 0);
5655 ppc_load (code, ppc_r0, (gulong)item->key);
5656 ppc_compare_log (code, 0, MONO_ARCH_IMT_REG, ppc_r0);
5657 item->jmp_code = code;
5658 ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 0);
5659 if (item->has_target_code) {
5660 ppc_load_ptr (code, ppc_r0, item->value.target_code);
5663 ppc_load_ptr (code, ppc_r0, & (vtable->vtable [item->value.vtable_slot]));
5664 ppc_ldptr_indexed (code, ppc_r0, 0, ppc_r0);
5666 ppc_mtctr (code, ppc_r0);
5667 ppc_bcctr (code, PPC_BR_ALWAYS, 0);
5668 ppc_patch (item->jmp_code, code);
5669 ppc_load_ptr (code, ppc_r0, fail_tramp);
5670 ppc_mtctr (code, ppc_r0);
5671 ppc_bcctr (code, PPC_BR_ALWAYS, 0);
5672 item->jmp_code = NULL;
5674 /* enable the commented code to assert on wrong method */
5675 #if ENABLE_WRONG_METHOD_CHECK
5676 ppc_load (code, ppc_r0, (guint32)item->key);
5677 ppc_compare_log (code, 0, MONO_ARCH_IMT_REG, ppc_r0);
5678 item->jmp_code = code;
5679 ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 0);
5681 ppc_ldptr (code, ppc_r0, (sizeof (gpointer) * item->value.vtable_slot), ppc_r11);
5682 ppc_ldptr (code, ppc_r11, PPC_RET_ADDR_OFFSET, ppc_sp);
5683 ppc_mtctr (code, ppc_r0);
5684 ppc_bcctr (code, PPC_BR_ALWAYS, 0);
5685 #if ENABLE_WRONG_METHOD_CHECK
5686 ppc_patch (item->jmp_code, code);
5688 item->jmp_code = NULL;
5693 ppc_load (code, ppc_r0, (gulong)item->key);
5694 ppc_compare_log (code, 0, MONO_ARCH_IMT_REG, ppc_r0);
5695 item->jmp_code = code;
5696 ppc_bc (code, PPC_BR_FALSE, PPC_BR_LT, 0);
5699 /* patch the branches to get to the target items */
5700 for (i = 0; i < count; ++i) {
5701 MonoIMTCheckItem *item = imt_entries [i];
5702 if (item->jmp_code) {
5703 if (item->check_target_idx) {
5704 ppc_patch (item->jmp_code, imt_entries [item->check_target_idx]->code_target);
5710 mono_stats.imt_thunks_size += code - start;
5711 g_assert (code - start <= size);
5712 mono_arch_flush_icache (start, size);
5717 mono_arch_find_imt_method (mgreg_t *regs, guint8 *code)
5719 mgreg_t *r = (mgreg_t*)regs;
5721 return (MonoMethod*)(gsize) r [MONO_ARCH_IMT_REG];
5725 mono_arch_find_static_call_vtable (mgreg_t *regs, guint8 *code)
5727 mgreg_t *r = (mgreg_t*)regs;
5729 return (MonoVTable*)(gsize) r [MONO_ARCH_RGCTX_REG];
5733 mono_arch_get_cie_program (void)
5737 mono_add_unwind_op_def_cfa (l, (guint8*)NULL, (guint8*)NULL, ppc_r1, 0);
5743 mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
5750 mono_arch_print_tree (MonoInst *tree, int arity)
5756 mono_arch_context_get_int_reg (MonoContext *ctx, int reg)
5759 return (mgreg_t)MONO_CONTEXT_GET_SP (ctx);
5761 g_assert (reg >= ppc_r13);
5763 return ctx->regs [reg - ppc_r13];
5767 mono_arch_get_patch_offset (guint8 *code)
5773 * mono_aot_emit_load_got_addr:
5775 * Emit code to load the got address.
5776 * On PPC, the result is placed into r30.
5779 mono_arch_emit_load_got_addr (guint8 *start, guint8 *code, MonoCompile *cfg, MonoJumpInfo **ji)
5782 ppc_mflr (code, ppc_r30);
5784 mono_add_patch_info (cfg, code - start, MONO_PATCH_INFO_GOT_OFFSET, NULL);
5786 *ji = mono_patch_info_list_prepend (*ji, code - start, MONO_PATCH_INFO_GOT_OFFSET, NULL);
5787 /* arch_emit_got_address () patches this */
5788 #if defined(TARGET_POWERPC64)
5794 ppc_load32 (code, ppc_r0, 0);
5795 ppc_add (code, ppc_r30, ppc_r30, ppc_r0);
5802 * mono_ppc_emit_load_aotconst:
5804 * Emit code to load the contents of the GOT slot identified by TRAMP_TYPE and
5805 * TARGET from the mscorlib GOT in full-aot code.
5806 * On PPC, the GOT address is assumed to be in r30, and the result is placed into
5810 mono_arch_emit_load_aotconst (guint8 *start, guint8 *code, MonoJumpInfo **ji, int tramp_type, gconstpointer target)
5812 /* Load the mscorlib got address */
5813 ppc_ldptr (code, ppc_r11, sizeof (gpointer), ppc_r30);
5814 *ji = mono_patch_info_list_prepend (*ji, code - start, tramp_type, target);
5815 /* arch_emit_got_access () patches this */
5816 ppc_load32 (code, ppc_r0, 0);
5817 ppc_ldptr_indexed (code, ppc_r11, ppc_r11, ppc_r0);
5822 /* Soft Debug support */
5823 #ifdef MONO_ARCH_SOFT_DEBUG_SUPPORTED
5830 * mono_arch_set_breakpoint:
5832 * See mini-amd64.c for docs.
5835 mono_arch_set_breakpoint (MonoJitInfo *ji, guint8 *ip)
5838 guint8 *orig_code = code;
5840 ppc_load_sequence (code, ppc_r11, (gsize)bp_trigger_page);
5841 ppc_ldptr (code, ppc_r11, 0, ppc_r11);
5843 g_assert (code - orig_code == BREAKPOINT_SIZE);
5845 mono_arch_flush_icache (orig_code, code - orig_code);
5849 * mono_arch_clear_breakpoint:
5851 * See mini-amd64.c for docs.
5854 mono_arch_clear_breakpoint (MonoJitInfo *ji, guint8 *ip)
5859 for (i = 0; i < BREAKPOINT_SIZE / 4; ++i)
5862 mono_arch_flush_icache (ip, code - ip);
5866 * mono_arch_is_breakpoint_event:
5868 * See mini-amd64.c for docs.
5871 mono_arch_is_breakpoint_event (void *info, void *sigctx)
5873 siginfo_t* sinfo = (siginfo_t*) info;
5874 /* Sometimes the address is off by 4 */
5875 if (sinfo->si_addr >= bp_trigger_page && (guint8*)sinfo->si_addr <= (guint8*)bp_trigger_page + 128)
5882 * mono_arch_skip_breakpoint:
5884 * See mini-amd64.c for docs.
5887 mono_arch_skip_breakpoint (MonoContext *ctx, MonoJitInfo *ji)
5889 /* skip the ldptr */
5890 MONO_CONTEXT_SET_IP (ctx, (guint8*)MONO_CONTEXT_GET_IP (ctx) + 4);
5898 * mono_arch_start_single_stepping:
5900 * See mini-amd64.c for docs.
5903 mono_arch_start_single_stepping (void)
5905 mono_mprotect (ss_trigger_page, mono_pagesize (), 0);
5909 * mono_arch_stop_single_stepping:
5911 * See mini-amd64.c for docs.
5914 mono_arch_stop_single_stepping (void)
5916 mono_mprotect (ss_trigger_page, mono_pagesize (), MONO_MMAP_READ);
5920 * mono_arch_is_single_step_event:
5922 * See mini-amd64.c for docs.
5925 mono_arch_is_single_step_event (void *info, void *sigctx)
5927 siginfo_t* sinfo = (siginfo_t*) info;
5928 /* Sometimes the address is off by 4 */
5929 if (sinfo->si_addr >= ss_trigger_page && (guint8*)sinfo->si_addr <= (guint8*)ss_trigger_page + 128)
5936 * mono_arch_skip_single_step:
5938 * See mini-amd64.c for docs.
5941 mono_arch_skip_single_step (MonoContext *ctx)
5943 /* skip the ldptr */
5944 MONO_CONTEXT_SET_IP (ctx, (guint8*)MONO_CONTEXT_GET_IP (ctx) + 4);
5948 * mono_arch_create_seq_point_info:
5950 * See mini-amd64.c for docs.
5953 mono_arch_get_seq_point_info (MonoDomain *domain, guint8 *code)
5960 mono_arch_init_lmf_ext (MonoLMFExt *ext, gpointer prev_lmf)
5962 ext->lmf.previous_lmf = prev_lmf;
5963 /* Mark that this is a MonoLMFExt */
5964 ext->lmf.previous_lmf = (gpointer)(((gssize)ext->lmf.previous_lmf) | 2);
5965 ext->lmf.ebp = (gssize)ext;
5971 mono_arch_opcode_supported (int opcode)
5974 case OP_ATOMIC_ADD_I4:
5975 case OP_ATOMIC_CAS_I4:
5976 #ifdef TARGET_POWERPC64
5977 case OP_ATOMIC_ADD_I8:
5978 case OP_ATOMIC_CAS_I8: