1 #ifndef __MONO_MINI_MIPS_H__
2 #define __MONO_MINI_MIPS_H__
5 #include <mono/arch/mips/mips-codegen.h>
6 #include <mono/utils/mono-context.h>
8 #if _MIPS_SIM == _ABIO32
9 /* o32 fully supported */
10 #elif _MIPS_SIM == _ABIN32
11 /* n32 under development */
12 #warning "MIPS using n32 - under development"
14 /* o64 not supported */
15 /* n64 not supported */
16 #error "MIPS unsupported ABI"
20 #define MONO_ARCH_CPU_SPEC mips_desc
22 #define MONO_MAX_IREGS 32
23 #define MONO_MAX_FREGS 32
25 #define MONO_SAVED_GREGS 32
26 #define MONO_SAVED_FREGS 32
29 #if SIZEOF_REGISTER == 4
31 typedef guint32 mips_ireg;
33 typedef gfloat mips_freg;
35 #elif SIZEOF_REGISTER == 8
38 typedef guint64 mips_ireg;
40 typedef gdouble mips_freg;
43 #error Unknown REGISTER_SIZE
46 #if G_BYTE_ORDER == G_LITTLE_ENDIAN
47 #define MSW_OFFSET sizeof(mips_ireg)
51 #define LSW_OFFSET sizeof(mips_ireg)
55 * at and t0 used internally
56 * v0, v1 aren't here for clarity reasons
57 * a0, a1, a2, a3 are for arguments
58 * Use t9 for indirect calls to match the ABI
61 #define MIPS_V_REGS ((1 << mips_v0) | \
63 #if _MIPS_SIM == _ABIO32
64 #define MIPS_T_REGS ((1 << mips_t0) | \
72 #elif _MIPS_SIM == _ABIN32
73 #define MIPS_T_REGS ((1 << mips_t0) | \
80 #define MIPS_S_REGS ((1 << mips_s0) | \
89 #if _MIPS_SIM == _ABIO32
90 #define MIPS_A_REGS ((1 << mips_a0) | \
94 #elif _MIPS_SIM == _ABIN32
95 #define MIPS_A_REGS ((1 << mips_a0) | \
105 #define mips_temp mips_t8
107 #define MONO_ARCH_CALLEE_REGS (MIPS_T_REGS | MIPS_V_REGS)
108 #define MONO_ARCH_CALLEE_SAVED_REGS MIPS_S_REGS
109 #define MIPS_ARG_REGS MIPS_A_REGS
112 #define MIPS_FP_PAIR(reg) ((1 << (reg)) | (1 << ((reg)+1)))
114 /* Only put the even regs in */
115 #define MIPS_FP_PAIR(reg) (1 << (reg))
118 #if _MIPS_SIM == _ABIO32
119 #define MONO_ARCH_CALLEE_FREGS (MIPS_FP_PAIR(mips_f0) | \
120 MIPS_FP_PAIR(mips_f2) | \
121 MIPS_FP_PAIR(mips_f4) | \
122 MIPS_FP_PAIR(mips_f6) | \
123 MIPS_FP_PAIR(mips_f8) | \
124 MIPS_FP_PAIR(mips_f10) | \
125 MIPS_FP_PAIR(mips_f12) | \
126 MIPS_FP_PAIR(mips_f14) | \
127 MIPS_FP_PAIR(mips_f16) | \
128 MIPS_FP_PAIR(mips_f18))
130 #define MONO_ARCH_CALLEE_SAVED_FREGS (MIPS_FP_PAIR(mips_f20) | \
131 MIPS_FP_PAIR(mips_f22) | \
132 MIPS_FP_PAIR(mips_f24) | \
133 MIPS_FP_PAIR(mips_f26) | \
134 MIPS_FP_PAIR(mips_f28) | \
135 MIPS_FP_PAIR(mips_f30))
136 #elif _MIPS_SIM == _ABIN32
137 #define MONO_ARCH_CALLEE_FREGS (MIPS_FP_PAIR(mips_f0) | \
138 MIPS_FP_PAIR(mips_f1) | \
139 MIPS_FP_PAIR(mips_f2) | \
140 MIPS_FP_PAIR(mips_f3) | \
141 MIPS_FP_PAIR(mips_f4) | \
142 MIPS_FP_PAIR(mips_f5) | \
143 MIPS_FP_PAIR(mips_f6) | \
144 MIPS_FP_PAIR(mips_f7) | \
145 MIPS_FP_PAIR(mips_f8) | \
146 MIPS_FP_PAIR(mips_f9) | \
147 MIPS_FP_PAIR(mips_f10) | \
148 MIPS_FP_PAIR(mips_f11) | \
149 MIPS_FP_PAIR(mips_f12) | \
150 MIPS_FP_PAIR(mips_f13) | \
151 MIPS_FP_PAIR(mips_f14) | \
152 MIPS_FP_PAIR(mips_f15) | \
153 MIPS_FP_PAIR(mips_f16) | \
154 MIPS_FP_PAIR(mips_f17) | \
155 MIPS_FP_PAIR(mips_f18) | \
156 MIPS_FP_PAIR(mips_f19))
158 #define MONO_ARCH_CALLEE_SAVED_FREGS (MIPS_FP_PAIR(mips_f20) | \
159 MIPS_FP_PAIR(mips_f21) | \
160 MIPS_FP_PAIR(mips_f22) | \
161 MIPS_FP_PAIR(mips_f23) | \
162 MIPS_FP_PAIR(mips_f24) | \
163 MIPS_FP_PAIR(mips_f25) | \
164 MIPS_FP_PAIR(mips_f26) | \
165 MIPS_FP_PAIR(mips_f27) | \
166 MIPS_FP_PAIR(mips_f28) | \
167 MIPS_FP_PAIR(mips_f29) | \
168 MIPS_FP_PAIR(mips_f30) | \
169 MIPS_FP_PAIR(mips_f31))
172 #define mips_ftemp mips_f18
174 #define MONO_ARCH_USE_FPSTACK FALSE
175 #define MONO_ARCH_FPSTACK_SIZE 0
177 /* Parameters used by the register allocator */
179 /* On Mips, for regpairs, the lower-numbered reg is most significant
180 * This is true in both big and little endian
183 #if G_BYTE_ORDER == G_LITTLE_ENDIAN
184 #define RET_REG1 mips_v0
185 #define RET_REG2 mips_v1
187 #define RET_REG1 mips_v1
188 #define RET_REG2 mips_v0
191 #define MONO_ARCH_INST_SREG2_MASK(ins) (0)
192 #define MONO_ARCH_INST_IS_REGPAIR(desc) ((desc) == 'V' || (desc) == 'l')
193 #define MONO_ARCH_INST_REGPAIR_REG2(desc,hreg1) (((desc) == 'l') ? ((hreg1) + 1) : (((desc) == 'V') ? RET_REG2 : -1))
194 #define MONO_ARCH_INST_IS_FLOAT(desc) ((desc == 'f') || (desc == 'g'))
196 // This define is called to get specific dest register as defined
197 // by md file (letter after "dest"). Overwise return -1
199 #define MONO_ARCH_INST_FIXED_REG(desc) (((desc) == '0') ? mips_zero : (((desc) == 'a') ? mips_at : ((((desc) == 'v')) ? mips_v0 : (((desc) == 'V') ? RET_REG1 : (((desc) == 'g') ? mips_f0 : -1)))))
201 #define MONO_ARCH_FRAME_ALIGNMENT 8
203 /* fixme: align to 16byte instead of 32byte (we align to 32byte to get
204 * reproduceable results for benchmarks */
205 #define MONO_ARCH_CODE_ALIGNMENT 32
207 void mips_patch (guint32 *code, guint32 target);
209 #define MIPS_LMF_MAGIC1 0xa5a5a5a5
210 #define MIPS_LMF_MAGIC2 0xc3c3c3c3
213 gpointer previous_lmf;
218 mips_ireg iregs [MONO_SAVED_GREGS];
219 mips_freg fregs [MONO_SAVED_FREGS];
223 typedef struct MonoCompileArch {
226 guint local_alloc_offset;
227 guint spillvar_offset;
228 guint spillvar_offset_float;
229 guint tracing_offset;
233 #if SIZEOF_REGISTER == 4
234 #define MONO_ARCH_EMULATE_FCONV_TO_I8 1
235 #define MONO_ARCH_EMULATE_LCONV_TO_R8 1
236 #define MONO_ARCH_EMULATE_LCONV_TO_R4 1
237 #define MONO_ARCH_EMULATE_LCONV_TO_R8_UN 1
238 #define MONO_ARCH_EMULATE_FREM 1
239 #define MONO_ARCH_BIGMUL_INTRINS 1
242 #if SIZEOF_REGISTER == 8
243 #define MONO_ARCH_NO_EMULATE_LONG_MUL_OPTS
246 #define MIPS_RET_ADDR_OFFSET (-sizeof(gpointer))
247 #define MIPS_FP_ADDR_OFFSET (-8)
248 #define MIPS_STACK_ALIGNMENT 16
249 #define MIPS_STACK_PARAM_OFFSET 16 /* from sp to first parameter */
250 #define MIPS_MINIMAL_STACK_SIZE (4*sizeof(mips_ireg) + 4*sizeof(mips_ireg))
251 #define MIPS_EXTRA_STACK_SIZE 16 /* from last parameter to top of frame */
253 #if _MIPS_SIM == _ABIO32
254 #define MIPS_FIRST_ARG_REG mips_a0
255 #define MIPS_LAST_ARG_REG mips_a3
256 #define MIPS_FIRST_FPARG_REG mips_f12
257 #define MIPS_LAST_FPARG_REG mips_f14
258 #elif _MIPS_SIM == _ABIN32
259 #define MIPS_FIRST_ARG_REG mips_a0
260 #define MIPS_LAST_ARG_REG mips_t3
261 #define MIPS_FIRST_FPARG_REG mips_f12
262 #define MIPS_LAST_FPARG_REG mips_f19
265 #define MONO_ARCH_HAVE_IMT 1
266 #define MONO_ARCH_IMT_REG mips_t0
268 #define MONO_ARCH_VTABLE_REG mips_t0
269 #define MONO_ARCH_RGCTX_REG mips_t0
271 #define MONO_ARCH_HAVE_DECOMPOSE_OPTS 1
272 #define MONO_ARCH_HAVE_DECOMPOSE_LONG_OPTS 1
274 #define MONO_ARCH_HAVE_GENERALIZED_IMT_THUNK 1
276 /* XXX - a mystery, but it works */
277 #define MONO_GET_CONTEXT \
278 void *ctx = (void *)(((int)context)+24);
280 /* set the next to 0 once inssel-mips.brg is updated */
281 #define MIPS_PASS_STRUCTS_BY_VALUE 1
282 #define MIPS_SMALL_RET_STRUCT_IN_REG 0
284 #define MONO_ARCH_USE_SIGACTION
285 #define MONO_ARCH_NEED_DIV_CHECK 1
286 #define MONO_ARCH_NO_IOV_CHECK 1
288 #define MONO_ARCH_THIS_AS_FIRST_ARG 1
290 #define MIPS_NUM_REG_ARGS (MIPS_LAST_ARG_REG-MIPS_FIRST_ARG_REG+1)
291 #define MIPS_NUM_REG_FPARGS (MIPS_LAST_FPARG_REG-MIPS_FIRST_FPARG_REG+1)
295 unsigned long at; /* assembler temp */
296 unsigned long v0; /* return values */
298 unsigned long a0; /* 4 - func arguments */
302 unsigned long t0; /* 8 temporaries */
310 unsigned long s0; /* 16 calle saved */
318 unsigned long t8; /* 24 temps */
319 unsigned long t9; /* 25 temp / pic call-through register */
320 unsigned long k0; /* 26 kernel-reserved */
322 unsigned long gp; /* 28 */
323 unsigned long sp; /* stack pointer */
324 unsigned long fp; /* frame pointer */
325 unsigned long ra; /* return address */
326 } MonoMipsStackFrame;
328 #define MONO_INIT_CONTEXT_FROM_FUNC(ctx,func) do { \
330 guint32 *code = (guint32 *)(void *)func; \
332 memset ((ctx), 0, sizeof (*(ctx))); \
333 __asm__ volatile("addu %0,$0,$29" : "=r" (sp)); \
334 /* Look for adjustment of sp */ \
335 while ((*code & 0xffff0000) != 0x27bd0000) \
337 imm = (short) (*code & 0xffff); \
338 MONO_CONTEXT_SET_BP ((ctx), sp + (-imm)); \
339 ra = *(guint32 *)(sp + (-imm) + MIPS_RET_ADDR_OFFSET); \
340 MONO_CONTEXT_SET_IP ((ctx),ra); \
341 MONO_CONTEXT_SET_SP ((ctx), MONO_CONTEXT_GET_BP (ctx)); \
344 #define MONO_ARCH_INIT_TOP_LMF_ENTRY(lmf) do { (lmf)->ebp = -1; } while (0)
346 /* re-attaches with gdb - sometimes causes executable to hang */
347 #undef HAVE_BACKTRACE_SYMBOLS
349 #undef DEBUG_EXCEPTIONS
351 #define MONO_ZERO_REG mips_zero
353 #define MONO_EMIT_NEW_MIPS_COND_EXC(cfg,cond,sr1,sr2,name) do { \
355 MONO_INST_NEW ((cfg), (inst), cond); \
356 inst->inst_p1 = (char*)name; \
359 MONO_ADD_INS ((cfg)->cbb, inst); \
362 #ifndef MONO_EMIT_NEW_COMPARE_EXC
363 #define MONO_EMIT_NEW_COMPARE_EXC(cfg, cmp_op, sreg1, sreg2, exc) do { \
364 switch (OP_MIPS_COND_EXC_##cmp_op) { \
365 case OP_MIPS_COND_EXC_EQ: \
366 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_EQ, sreg1, sreg2, exc); \
368 case OP_MIPS_COND_EXC_NE_UN: \
369 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_NE_UN, sreg1, sreg2, exc); \
371 case OP_MIPS_COND_EXC_GT: \
372 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLT, mips_at, sreg2, sreg1); \
373 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_NE_UN, mips_at, mips_zero, exc); \
375 case OP_MIPS_COND_EXC_GT_UN: \
376 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLTU, mips_at, sreg2, sreg1); \
377 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_NE_UN, mips_at, mips_zero, exc); \
379 case OP_MIPS_COND_EXC_LE: \
380 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLT, mips_at, sreg2, sreg1); \
381 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_EQ, mips_at, mips_zero, exc); \
383 case OP_MIPS_COND_EXC_LE_UN: \
384 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLTU, mips_at, sreg2, sreg1); \
385 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_EQ, mips_at, mips_zero, exc); \
387 case OP_MIPS_COND_EXC_LT: \
388 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLT, mips_at, sreg1, sreg2); \
389 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_NE_UN, mips_at, mips_zero, exc); \
391 case OP_MIPS_COND_EXC_LT_UN: \
392 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLTU, mips_at, sreg1, sreg2); \
393 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_NE_UN, mips_at, mips_zero, exc); \
396 g_warning ("unknown comparison %s\n", #cmp_op); \
397 g_assert_not_reached (); \
402 #ifndef MONO_EMIT_NEW_COMPARE_IMM_EXC
403 #define MONO_EMIT_NEW_COMPARE_IMM_EXC(cfg, cmp_op, sreg1, imm, exc) do { \
406 cmp_reg = mips_zero; \
410 MONO_EMIT_NEW_ICONST (cfg, cmp_reg, (imm)); \
412 MONO_EMIT_NEW_COMPARE_EXC (cfg, cmp_op, sreg1, cmp_reg, exc); \
416 #ifndef MONO_EMIT_NEW_ICOMPARE_IMM_EXC
417 #define MONO_EMIT_NEW_ICOMPARE_IMM_EXC(cfg, cmp_op, sreg1, imm, exc) do { \
418 MONO_EMIT_NEW_COMPARE_IMM_EXC(cfg, cmp_op, sreg1, imm, exc); \
429 extern guint8 *mips_emit_load_const(guint8 *code, int dreg, mgreg_t v);
431 #endif /* __MONO_MINI_MIPS_H__ */